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d787dcdb CYT |
1 | /* |
2 | * RSB (Reduced Serial Bus) driver. | |
3 | * | |
4 | * Author: Chen-Yu Tsai <wens@csie.org> | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | * | |
10 | * The RSB controller looks like an SMBus controller which only supports | |
11 | * byte and word data transfers. But, it differs from standard SMBus | |
12 | * protocol on several aspects: | |
13 | * - it uses addresses set at runtime to address slaves. Runtime addresses | |
14 | * are sent to slaves using their 12bit hardware addresses. Up to 15 | |
15 | * runtime addresses are available. | |
16 | * - it adds a parity bit every 8bits of data and address for read and | |
17 | * write accesses; this replaces the ack bit | |
18 | * - only one read access is required to read a byte (instead of a write | |
19 | * followed by a read access in standard SMBus protocol) | |
20 | * - there's no Ack bit after each read access | |
21 | * | |
22 | * This means this bus cannot be used to interface with standard SMBus | |
23 | * devices. Devices known to support this interface include the AXP223, | |
24 | * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers. | |
25 | * | |
26 | * A description of the operation and wire protocol can be found in the | |
27 | * RSB section of Allwinner's A80 user manual, which can be found at | |
28 | * | |
29 | * https://github.com/allwinner-zh/documents/tree/master/A80 | |
30 | * | |
31 | * This document is officially released by Allwinner. | |
32 | * | |
33 | * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver. | |
34 | * | |
35 | */ | |
36 | ||
37 | #include <linux/clk.h> | |
38 | #include <linux/clk/clk-conf.h> | |
39 | #include <linux/device.h> | |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/io.h> | |
42 | #include <linux/iopoll.h> | |
43 | #include <linux/module.h> | |
44 | #include <linux/of.h> | |
45 | #include <linux/of_irq.h> | |
46 | #include <linux/of_platform.h> | |
47 | #include <linux/platform_device.h> | |
48 | #include <linux/regmap.h> | |
49 | #include <linux/reset.h> | |
50 | #include <linux/slab.h> | |
51 | #include <linux/sunxi-rsb.h> | |
52 | #include <linux/types.h> | |
53 | ||
54 | /* RSB registers */ | |
55 | #define RSB_CTRL 0x0 /* Global control */ | |
56 | #define RSB_CCR 0x4 /* Clock control */ | |
57 | #define RSB_INTE 0x8 /* Interrupt controls */ | |
58 | #define RSB_INTS 0xc /* Interrupt status */ | |
59 | #define RSB_ADDR 0x10 /* Address to send with read/write command */ | |
60 | #define RSB_DATA 0x1c /* Data to read/write */ | |
61 | #define RSB_LCR 0x24 /* Line control */ | |
62 | #define RSB_DMCR 0x28 /* Device mode (init) control */ | |
63 | #define RSB_CMD 0x2c /* RSB Command */ | |
64 | #define RSB_DAR 0x30 /* Device address / runtime address */ | |
65 | ||
66 | /* CTRL fields */ | |
67 | #define RSB_CTRL_START_TRANS BIT(7) | |
68 | #define RSB_CTRL_ABORT_TRANS BIT(6) | |
69 | #define RSB_CTRL_GLOBAL_INT_ENB BIT(1) | |
70 | #define RSB_CTRL_SOFT_RST BIT(0) | |
71 | ||
72 | /* CLK CTRL fields */ | |
73 | #define RSB_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8) | |
74 | #define RSB_CCR_MAX_CLK_DIV 0xff | |
75 | #define RSB_CCR_CLK_DIV(v) ((v) & RSB_CCR_MAX_CLK_DIV) | |
76 | ||
77 | /* STATUS fields */ | |
78 | #define RSB_INTS_TRANS_ERR_ACK BIT(16) | |
79 | #define RSB_INTS_TRANS_ERR_DATA_BIT(v) (((v) >> 8) & 0xf) | |
80 | #define RSB_INTS_TRANS_ERR_DATA GENMASK(11, 8) | |
81 | #define RSB_INTS_LOAD_BSY BIT(2) | |
82 | #define RSB_INTS_TRANS_ERR BIT(1) | |
83 | #define RSB_INTS_TRANS_OVER BIT(0) | |
84 | ||
85 | /* LINE CTRL fields*/ | |
86 | #define RSB_LCR_SCL_STATE BIT(5) | |
87 | #define RSB_LCR_SDA_STATE BIT(4) | |
88 | #define RSB_LCR_SCL_CTL BIT(3) | |
89 | #define RSB_LCR_SCL_CTL_EN BIT(2) | |
90 | #define RSB_LCR_SDA_CTL BIT(1) | |
91 | #define RSB_LCR_SDA_CTL_EN BIT(0) | |
92 | ||
93 | /* DEVICE MODE CTRL field values */ | |
94 | #define RSB_DMCR_DEVICE_START BIT(31) | |
95 | #define RSB_DMCR_MODE_DATA (0x7c << 16) | |
96 | #define RSB_DMCR_MODE_REG (0x3e << 8) | |
97 | #define RSB_DMCR_DEV_ADDR 0x00 | |
98 | ||
99 | /* CMD values */ | |
100 | #define RSB_CMD_RD8 0x8b | |
101 | #define RSB_CMD_RD16 0x9c | |
102 | #define RSB_CMD_RD32 0xa6 | |
103 | #define RSB_CMD_WR8 0x4e | |
104 | #define RSB_CMD_WR16 0x59 | |
105 | #define RSB_CMD_WR32 0x63 | |
106 | #define RSB_CMD_STRA 0xe8 | |
107 | ||
108 | /* DAR fields */ | |
109 | #define RSB_DAR_RTA(v) (((v) & 0xff) << 16) | |
110 | #define RSB_DAR_DA(v) ((v) & 0xffff) | |
111 | ||
112 | #define RSB_MAX_FREQ 20000000 | |
113 | ||
114 | #define RSB_CTRL_NAME "sunxi-rsb" | |
115 | ||
116 | struct sunxi_rsb_addr_map { | |
117 | u16 hwaddr; | |
118 | u8 rtaddr; | |
119 | }; | |
120 | ||
121 | struct sunxi_rsb { | |
122 | struct device *dev; | |
123 | void __iomem *regs; | |
124 | struct clk *clk; | |
125 | struct reset_control *rstc; | |
126 | struct completion complete; | |
127 | struct mutex lock; | |
128 | unsigned int status; | |
129 | }; | |
130 | ||
131 | /* bus / slave device related functions */ | |
132 | static struct bus_type sunxi_rsb_bus; | |
133 | ||
134 | static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv) | |
135 | { | |
136 | return of_driver_match_device(dev, drv); | |
137 | } | |
138 | ||
139 | static int sunxi_rsb_device_probe(struct device *dev) | |
140 | { | |
141 | const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver); | |
142 | struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); | |
143 | int ret; | |
144 | ||
145 | if (!drv->probe) | |
146 | return -ENODEV; | |
147 | ||
148 | if (!rdev->irq) { | |
149 | int irq = -ENOENT; | |
150 | ||
151 | if (dev->of_node) | |
152 | irq = of_irq_get(dev->of_node, 0); | |
153 | ||
154 | if (irq == -EPROBE_DEFER) | |
155 | return irq; | |
156 | if (irq < 0) | |
157 | irq = 0; | |
158 | ||
159 | rdev->irq = irq; | |
160 | } | |
161 | ||
162 | ret = of_clk_set_defaults(dev->of_node, false); | |
163 | if (ret < 0) | |
164 | return ret; | |
165 | ||
166 | return drv->probe(rdev); | |
167 | } | |
168 | ||
169 | static int sunxi_rsb_device_remove(struct device *dev) | |
170 | { | |
171 | const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver); | |
172 | ||
173 | return drv->remove(to_sunxi_rsb_device(dev)); | |
174 | } | |
175 | ||
176 | static struct bus_type sunxi_rsb_bus = { | |
177 | .name = RSB_CTRL_NAME, | |
178 | .match = sunxi_rsb_device_match, | |
179 | .probe = sunxi_rsb_device_probe, | |
180 | .remove = sunxi_rsb_device_remove, | |
181 | }; | |
182 | ||
183 | static void sunxi_rsb_dev_release(struct device *dev) | |
184 | { | |
185 | struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); | |
186 | ||
187 | kfree(rdev); | |
188 | } | |
189 | ||
190 | /** | |
191 | * sunxi_rsb_device_create() - allocate and add an RSB device | |
192 | * @rsb: RSB controller | |
193 | * @node: RSB slave device node | |
194 | * @hwaddr: RSB slave hardware address | |
195 | * @rtaddr: RSB slave runtime address | |
196 | */ | |
197 | static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb, | |
198 | struct device_node *node, u16 hwaddr, u8 rtaddr) | |
199 | { | |
200 | int err; | |
201 | struct sunxi_rsb_device *rdev; | |
202 | ||
203 | rdev = kzalloc(sizeof(*rdev), GFP_KERNEL); | |
204 | if (!rdev) | |
205 | return ERR_PTR(-ENOMEM); | |
206 | ||
207 | rdev->rsb = rsb; | |
208 | rdev->hwaddr = hwaddr; | |
209 | rdev->rtaddr = rtaddr; | |
210 | rdev->dev.bus = &sunxi_rsb_bus; | |
211 | rdev->dev.parent = rsb->dev; | |
212 | rdev->dev.of_node = node; | |
213 | rdev->dev.release = sunxi_rsb_dev_release; | |
214 | ||
215 | dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr); | |
216 | ||
217 | err = device_register(&rdev->dev); | |
218 | if (err < 0) { | |
219 | dev_err(&rdev->dev, "Can't add %s, status %d\n", | |
220 | dev_name(&rdev->dev), err); | |
221 | goto err_device_add; | |
222 | } | |
223 | ||
224 | dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev)); | |
225 | ||
226 | err_device_add: | |
227 | put_device(&rdev->dev); | |
228 | ||
229 | return ERR_PTR(err); | |
230 | } | |
231 | ||
232 | /** | |
233 | * sunxi_rsb_device_unregister(): unregister an RSB device | |
234 | * @rdev: rsb_device to be removed | |
235 | */ | |
236 | static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev) | |
237 | { | |
238 | device_unregister(&rdev->dev); | |
239 | } | |
240 | ||
241 | static int sunxi_rsb_remove_devices(struct device *dev, void *data) | |
242 | { | |
243 | struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev); | |
244 | ||
245 | if (dev->bus == &sunxi_rsb_bus) | |
246 | sunxi_rsb_device_unregister(rdev); | |
247 | ||
248 | return 0; | |
249 | } | |
250 | ||
251 | /** | |
252 | * sunxi_rsb_driver_register() - Register device driver with RSB core | |
253 | * @rdrv: device driver to be associated with slave-device. | |
254 | * | |
255 | * This API will register the client driver with the RSB framework. | |
256 | * It is typically called from the driver's module-init function. | |
257 | */ | |
258 | int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv) | |
259 | { | |
260 | rdrv->driver.bus = &sunxi_rsb_bus; | |
261 | return driver_register(&rdrv->driver); | |
262 | } | |
263 | EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register); | |
264 | ||
265 | /* common code that starts a transfer */ | |
266 | static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb) | |
267 | { | |
268 | if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) { | |
269 | dev_dbg(rsb->dev, "RSB transfer still in progress\n"); | |
270 | return -EBUSY; | |
271 | } | |
272 | ||
273 | reinit_completion(&rsb->complete); | |
274 | ||
275 | writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER, | |
276 | rsb->regs + RSB_INTE); | |
277 | writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB, | |
278 | rsb->regs + RSB_CTRL); | |
279 | ||
280 | if (!wait_for_completion_io_timeout(&rsb->complete, | |
281 | msecs_to_jiffies(100))) { | |
282 | dev_dbg(rsb->dev, "RSB timeout\n"); | |
283 | ||
284 | /* abort the transfer */ | |
285 | writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL); | |
286 | ||
287 | /* clear any interrupt flags */ | |
288 | writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS); | |
289 | ||
290 | return -ETIMEDOUT; | |
291 | } | |
292 | ||
293 | if (rsb->status & RSB_INTS_LOAD_BSY) { | |
294 | dev_dbg(rsb->dev, "RSB busy\n"); | |
295 | return -EBUSY; | |
296 | } | |
297 | ||
298 | if (rsb->status & RSB_INTS_TRANS_ERR) { | |
299 | if (rsb->status & RSB_INTS_TRANS_ERR_ACK) { | |
300 | dev_dbg(rsb->dev, "RSB slave nack\n"); | |
301 | return -EINVAL; | |
302 | } | |
303 | ||
304 | if (rsb->status & RSB_INTS_TRANS_ERR_DATA) { | |
305 | dev_dbg(rsb->dev, "RSB transfer data error\n"); | |
306 | return -EIO; | |
307 | } | |
308 | } | |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
313 | static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr, | |
314 | u32 *buf, size_t len) | |
315 | { | |
316 | u32 cmd; | |
317 | int ret; | |
318 | ||
319 | if (!buf) | |
320 | return -EINVAL; | |
321 | ||
322 | switch (len) { | |
323 | case 1: | |
324 | cmd = RSB_CMD_RD8; | |
325 | break; | |
326 | case 2: | |
327 | cmd = RSB_CMD_RD16; | |
328 | break; | |
329 | case 4: | |
330 | cmd = RSB_CMD_RD32; | |
331 | break; | |
332 | default: | |
333 | dev_err(rsb->dev, "Invalid access width: %d\n", len); | |
334 | return -EINVAL; | |
335 | } | |
336 | ||
337 | mutex_lock(&rsb->lock); | |
338 | ||
339 | writel(addr, rsb->regs + RSB_ADDR); | |
340 | writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR); | |
341 | writel(cmd, rsb->regs + RSB_CMD); | |
342 | ||
343 | ret = _sunxi_rsb_run_xfer(rsb); | |
344 | if (ret) | |
43675ffa | 345 | goto unlock; |
d787dcdb CYT |
346 | |
347 | *buf = readl(rsb->regs + RSB_DATA); | |
348 | ||
43675ffa | 349 | unlock: |
d787dcdb CYT |
350 | mutex_unlock(&rsb->lock); |
351 | ||
d787dcdb CYT |
352 | return ret; |
353 | } | |
354 | ||
355 | static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr, | |
356 | const u32 *buf, size_t len) | |
357 | { | |
358 | u32 cmd; | |
359 | int ret; | |
360 | ||
361 | if (!buf) | |
362 | return -EINVAL; | |
363 | ||
364 | switch (len) { | |
365 | case 1: | |
366 | cmd = RSB_CMD_WR8; | |
367 | break; | |
368 | case 2: | |
369 | cmd = RSB_CMD_WR16; | |
370 | break; | |
371 | case 4: | |
372 | cmd = RSB_CMD_WR32; | |
373 | break; | |
374 | default: | |
375 | dev_err(rsb->dev, "Invalid access width: %d\n", len); | |
376 | return -EINVAL; | |
377 | } | |
378 | ||
379 | mutex_lock(&rsb->lock); | |
380 | ||
381 | writel(addr, rsb->regs + RSB_ADDR); | |
382 | writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR); | |
383 | writel(*buf, rsb->regs + RSB_DATA); | |
384 | writel(cmd, rsb->regs + RSB_CMD); | |
385 | ret = _sunxi_rsb_run_xfer(rsb); | |
386 | ||
387 | mutex_unlock(&rsb->lock); | |
388 | ||
389 | return ret; | |
390 | } | |
391 | ||
392 | /* RSB regmap functions */ | |
393 | struct sunxi_rsb_ctx { | |
394 | struct sunxi_rsb_device *rdev; | |
395 | int size; | |
396 | }; | |
397 | ||
398 | static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg, | |
399 | unsigned int *val) | |
400 | { | |
401 | struct sunxi_rsb_ctx *ctx = context; | |
402 | struct sunxi_rsb_device *rdev = ctx->rdev; | |
403 | ||
404 | if (reg > 0xff) | |
405 | return -EINVAL; | |
406 | ||
407 | return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size); | |
408 | } | |
409 | ||
410 | static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg, | |
411 | unsigned int val) | |
412 | { | |
413 | struct sunxi_rsb_ctx *ctx = context; | |
414 | struct sunxi_rsb_device *rdev = ctx->rdev; | |
415 | ||
416 | return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size); | |
417 | } | |
418 | ||
419 | static void regmap_sunxi_rsb_free_ctx(void *context) | |
420 | { | |
421 | struct sunxi_rsb_ctx *ctx = context; | |
422 | ||
423 | kfree(ctx); | |
424 | } | |
425 | ||
426 | static struct regmap_bus regmap_sunxi_rsb = { | |
427 | .reg_write = regmap_sunxi_rsb_reg_write, | |
428 | .reg_read = regmap_sunxi_rsb_reg_read, | |
429 | .free_context = regmap_sunxi_rsb_free_ctx, | |
430 | .reg_format_endian_default = REGMAP_ENDIAN_NATIVE, | |
431 | .val_format_endian_default = REGMAP_ENDIAN_NATIVE, | |
432 | }; | |
433 | ||
434 | static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev, | |
435 | const struct regmap_config *config) | |
436 | { | |
437 | struct sunxi_rsb_ctx *ctx; | |
438 | ||
439 | switch (config->val_bits) { | |
440 | case 8: | |
441 | case 16: | |
442 | case 32: | |
443 | break; | |
444 | default: | |
445 | return ERR_PTR(-EINVAL); | |
446 | } | |
447 | ||
448 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); | |
449 | if (!ctx) | |
450 | return ERR_PTR(-ENOMEM); | |
451 | ||
452 | ctx->rdev = rdev; | |
453 | ctx->size = config->val_bits / 8; | |
454 | ||
455 | return ctx; | |
456 | } | |
457 | ||
458 | struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev, | |
459 | const struct regmap_config *config, | |
460 | struct lock_class_key *lock_key, | |
461 | const char *lock_name) | |
462 | { | |
463 | struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config); | |
464 | ||
465 | if (IS_ERR(ctx)) | |
466 | return ERR_CAST(ctx); | |
467 | ||
468 | return __devm_regmap_init(&rdev->dev, ®map_sunxi_rsb, ctx, config, | |
469 | lock_key, lock_name); | |
470 | } | |
471 | EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb); | |
472 | ||
473 | /* RSB controller driver functions */ | |
474 | static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id) | |
475 | { | |
476 | struct sunxi_rsb *rsb = dev_id; | |
477 | u32 status; | |
478 | ||
479 | status = readl(rsb->regs + RSB_INTS); | |
480 | rsb->status = status; | |
481 | ||
482 | /* Clear interrupts */ | |
483 | status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | | |
484 | RSB_INTS_TRANS_OVER); | |
485 | writel(status, rsb->regs + RSB_INTS); | |
486 | ||
487 | complete(&rsb->complete); | |
488 | ||
489 | return IRQ_HANDLED; | |
490 | } | |
491 | ||
492 | static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb) | |
493 | { | |
494 | int ret = 0; | |
495 | u32 reg; | |
496 | ||
497 | /* send init sequence */ | |
498 | writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA | | |
499 | RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR); | |
500 | ||
501 | readl_poll_timeout(rsb->regs + RSB_DMCR, reg, | |
502 | !(reg & RSB_DMCR_DEVICE_START), 100, 250000); | |
503 | if (reg & RSB_DMCR_DEVICE_START) | |
504 | ret = -ETIMEDOUT; | |
505 | ||
506 | /* clear interrupt status bits */ | |
507 | writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS); | |
508 | ||
509 | return ret; | |
510 | } | |
511 | ||
512 | /* | |
513 | * There are 15 valid runtime addresses, though Allwinner typically | |
514 | * skips the first, for unknown reasons, and uses the following three. | |
515 | * | |
516 | * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b, | |
517 | * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff | |
518 | * | |
519 | * No designs with 2 RSB slave devices sharing identical hardware | |
520 | * addresses on the same bus have been seen in the wild. All designs | |
521 | * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if | |
522 | * there is one, and 0x45 for peripheral ICs. | |
523 | * | |
524 | * The hardware does not seem to support re-setting runtime addresses. | |
525 | * Attempts to do so result in the slave devices returning a NACK. | |
526 | * Hence we just hardcode the mapping here, like Allwinner does. | |
527 | */ | |
528 | ||
529 | static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = { | |
427d6e48 | 530 | { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */ |
d787dcdb | 531 | { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */ |
bccd240f | 532 | { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */ |
d787dcdb CYT |
533 | }; |
534 | ||
535 | static u8 sunxi_rsb_get_rtaddr(u16 hwaddr) | |
536 | { | |
537 | int i; | |
538 | ||
539 | for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++) | |
540 | if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr) | |
541 | return sunxi_rsb_addr_maps[i].rtaddr; | |
542 | ||
543 | return 0; /* 0 is an invalid runtime address */ | |
544 | } | |
545 | ||
546 | static int of_rsb_register_devices(struct sunxi_rsb *rsb) | |
547 | { | |
548 | struct device *dev = rsb->dev; | |
549 | struct device_node *child, *np = dev->of_node; | |
550 | u32 hwaddr; | |
551 | u8 rtaddr; | |
552 | int ret; | |
553 | ||
554 | if (!np) | |
555 | return -EINVAL; | |
556 | ||
557 | /* Runtime addresses for all slaves should be set first */ | |
558 | for_each_available_child_of_node(np, child) { | |
559 | dev_dbg(dev, "setting child %s runtime address\n", | |
560 | child->full_name); | |
561 | ||
562 | ret = of_property_read_u32(child, "reg", &hwaddr); | |
563 | if (ret) { | |
564 | dev_err(dev, "%s: invalid 'reg' property: %d\n", | |
565 | child->full_name, ret); | |
566 | continue; | |
567 | } | |
568 | ||
569 | rtaddr = sunxi_rsb_get_rtaddr(hwaddr); | |
570 | if (!rtaddr) { | |
571 | dev_err(dev, "%s: unknown hardware device address\n", | |
572 | child->full_name); | |
573 | continue; | |
574 | } | |
575 | ||
576 | /* | |
577 | * Since no devices have been registered yet, we are the | |
578 | * only ones using the bus, we can skip locking the bus. | |
579 | */ | |
580 | ||
581 | /* setup command parameters */ | |
582 | writel(RSB_CMD_STRA, rsb->regs + RSB_CMD); | |
583 | writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr), | |
584 | rsb->regs + RSB_DAR); | |
585 | ||
586 | /* send command */ | |
587 | ret = _sunxi_rsb_run_xfer(rsb); | |
588 | if (ret) | |
589 | dev_warn(dev, "%s: set runtime address failed: %d\n", | |
590 | child->full_name, ret); | |
591 | } | |
592 | ||
593 | /* Then we start adding devices and probing them */ | |
594 | for_each_available_child_of_node(np, child) { | |
595 | struct sunxi_rsb_device *rdev; | |
596 | ||
597 | dev_dbg(dev, "adding child %s\n", child->full_name); | |
598 | ||
599 | ret = of_property_read_u32(child, "reg", &hwaddr); | |
600 | if (ret) | |
601 | continue; | |
602 | ||
603 | rtaddr = sunxi_rsb_get_rtaddr(hwaddr); | |
604 | if (!rtaddr) | |
605 | continue; | |
606 | ||
607 | rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr); | |
608 | if (IS_ERR(rdev)) | |
609 | dev_err(dev, "failed to add child device %s: %ld\n", | |
610 | child->full_name, PTR_ERR(rdev)); | |
611 | } | |
612 | ||
613 | return 0; | |
614 | } | |
615 | ||
616 | static const struct of_device_id sunxi_rsb_of_match_table[] = { | |
617 | { .compatible = "allwinner,sun8i-a23-rsb" }, | |
618 | {} | |
619 | }; | |
620 | MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table); | |
621 | ||
622 | static int sunxi_rsb_probe(struct platform_device *pdev) | |
623 | { | |
624 | struct device *dev = &pdev->dev; | |
625 | struct device_node *np = dev->of_node; | |
626 | struct resource *r; | |
627 | struct sunxi_rsb *rsb; | |
628 | unsigned long p_clk_freq; | |
629 | u32 clk_delay, clk_freq = 3000000; | |
630 | int clk_div, irq, ret; | |
631 | u32 reg; | |
632 | ||
633 | of_property_read_u32(np, "clock-frequency", &clk_freq); | |
634 | if (clk_freq > RSB_MAX_FREQ) { | |
635 | dev_err(dev, | |
636 | "clock-frequency (%u Hz) is too high (max = 20MHz)\n", | |
637 | clk_freq); | |
638 | return -EINVAL; | |
639 | } | |
640 | ||
641 | rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL); | |
642 | if (!rsb) | |
643 | return -ENOMEM; | |
644 | ||
645 | rsb->dev = dev; | |
646 | platform_set_drvdata(pdev, rsb); | |
647 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
648 | rsb->regs = devm_ioremap_resource(dev, r); | |
649 | if (IS_ERR(rsb->regs)) | |
650 | return PTR_ERR(rsb->regs); | |
651 | ||
652 | irq = platform_get_irq(pdev, 0); | |
653 | if (irq < 0) { | |
654 | dev_err(dev, "failed to retrieve irq: %d\n", irq); | |
655 | return irq; | |
656 | } | |
657 | ||
658 | rsb->clk = devm_clk_get(dev, NULL); | |
659 | if (IS_ERR(rsb->clk)) { | |
660 | ret = PTR_ERR(rsb->clk); | |
661 | dev_err(dev, "failed to retrieve clk: %d\n", ret); | |
662 | return ret; | |
663 | } | |
664 | ||
665 | ret = clk_prepare_enable(rsb->clk); | |
666 | if (ret) { | |
667 | dev_err(dev, "failed to enable clk: %d\n", ret); | |
668 | return ret; | |
669 | } | |
670 | ||
671 | p_clk_freq = clk_get_rate(rsb->clk); | |
672 | ||
673 | rsb->rstc = devm_reset_control_get(dev, NULL); | |
674 | if (IS_ERR(rsb->rstc)) { | |
675 | ret = PTR_ERR(rsb->rstc); | |
676 | dev_err(dev, "failed to retrieve reset controller: %d\n", ret); | |
677 | goto err_clk_disable; | |
678 | } | |
679 | ||
680 | ret = reset_control_deassert(rsb->rstc); | |
681 | if (ret) { | |
682 | dev_err(dev, "failed to deassert reset line: %d\n", ret); | |
683 | goto err_clk_disable; | |
684 | } | |
685 | ||
686 | init_completion(&rsb->complete); | |
687 | mutex_init(&rsb->lock); | |
688 | ||
689 | /* reset the controller */ | |
690 | writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL); | |
691 | readl_poll_timeout(rsb->regs + RSB_CTRL, reg, | |
692 | !(reg & RSB_CTRL_SOFT_RST), 1000, 100000); | |
693 | ||
694 | /* | |
695 | * Clock frequency and delay calculation code is from | |
696 | * Allwinner U-boot sources. | |
697 | * | |
698 | * From A83 user manual: | |
699 | * bus clock frequency = parent clock frequency / (2 * (divider + 1)) | |
700 | */ | |
701 | clk_div = p_clk_freq / clk_freq / 2; | |
702 | if (!clk_div) | |
703 | clk_div = 1; | |
704 | else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1) | |
705 | clk_div = RSB_CCR_MAX_CLK_DIV + 1; | |
706 | ||
707 | clk_delay = clk_div >> 1; | |
708 | if (!clk_delay) | |
709 | clk_delay = 1; | |
710 | ||
711 | dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2); | |
712 | writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1), | |
713 | rsb->regs + RSB_CCR); | |
714 | ||
715 | ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb); | |
716 | if (ret) { | |
717 | dev_err(dev, "can't register interrupt handler irq %d: %d\n", | |
718 | irq, ret); | |
719 | goto err_reset_assert; | |
720 | } | |
721 | ||
722 | /* initialize all devices on the bus into RSB mode */ | |
723 | ret = sunxi_rsb_init_device_mode(rsb); | |
724 | if (ret) | |
725 | dev_warn(dev, "Initialize device mode failed: %d\n", ret); | |
726 | ||
727 | of_rsb_register_devices(rsb); | |
728 | ||
729 | return 0; | |
730 | ||
731 | err_reset_assert: | |
732 | reset_control_assert(rsb->rstc); | |
733 | ||
734 | err_clk_disable: | |
735 | clk_disable_unprepare(rsb->clk); | |
736 | ||
737 | return ret; | |
738 | } | |
739 | ||
740 | static int sunxi_rsb_remove(struct platform_device *pdev) | |
741 | { | |
742 | struct sunxi_rsb *rsb = platform_get_drvdata(pdev); | |
743 | ||
744 | device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices); | |
745 | reset_control_assert(rsb->rstc); | |
746 | clk_disable_unprepare(rsb->clk); | |
747 | ||
748 | return 0; | |
749 | } | |
750 | ||
751 | static struct platform_driver sunxi_rsb_driver = { | |
752 | .probe = sunxi_rsb_probe, | |
753 | .remove = sunxi_rsb_remove, | |
754 | .driver = { | |
755 | .name = RSB_CTRL_NAME, | |
756 | .of_match_table = sunxi_rsb_of_match_table, | |
757 | }, | |
758 | }; | |
759 | ||
760 | static int __init sunxi_rsb_init(void) | |
761 | { | |
762 | int ret; | |
763 | ||
764 | ret = bus_register(&sunxi_rsb_bus); | |
765 | if (ret) { | |
766 | pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret); | |
767 | return ret; | |
768 | } | |
769 | ||
770 | return platform_driver_register(&sunxi_rsb_driver); | |
771 | } | |
772 | module_init(sunxi_rsb_init); | |
773 | ||
774 | static void __exit sunxi_rsb_exit(void) | |
775 | { | |
776 | platform_driver_unregister(&sunxi_rsb_driver); | |
777 | bus_unregister(&sunxi_rsb_bus); | |
778 | } | |
779 | module_exit(sunxi_rsb_exit); | |
780 | ||
781 | MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>"); | |
782 | MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver"); | |
783 | MODULE_LICENSE("GPL v2"); |