Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * ALi AGPGART routines. | |
3 | */ | |
4 | ||
5 | #include <linux/types.h> | |
6 | #include <linux/module.h> | |
7 | #include <linux/pci.h> | |
8 | #include <linux/init.h> | |
9 | #include <linux/agp_backend.h> | |
4e57b681 | 10 | #include <asm/page.h> /* PAGE_SIZE */ |
1da177e4 LT |
11 | #include "agp.h" |
12 | ||
13 | #define ALI_AGPCTRL 0xb8 | |
14 | #define ALI_ATTBASE 0xbc | |
15 | #define ALI_TLBCTRL 0xc0 | |
16 | #define ALI_TAGCTRL 0xc4 | |
17 | #define ALI_CACHE_FLUSH_CTRL 0xD0 | |
18 | #define ALI_CACHE_FLUSH_ADDR_MASK 0xFFFFF000 | |
19 | #define ALI_CACHE_FLUSH_EN 0x100 | |
20 | ||
21 | static int ali_fetch_size(void) | |
22 | { | |
23 | int i; | |
24 | u32 temp; | |
25 | struct aper_size_info_32 *values; | |
26 | ||
27 | pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp); | |
28 | temp &= ~(0xfffffff0); | |
29 | values = A_SIZE_32(agp_bridge->driver->aperture_sizes); | |
30 | ||
31 | for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { | |
32 | if (temp == values[i].size_value) { | |
33 | agp_bridge->previous_size = | |
34 | agp_bridge->current_size = (void *) (values + i); | |
35 | agp_bridge->aperture_size_idx = i; | |
36 | return values[i].size; | |
37 | } | |
38 | } | |
39 | ||
40 | return 0; | |
41 | } | |
42 | ||
43 | static void ali_tlbflush(struct agp_memory *mem) | |
44 | { | |
45 | u32 temp; | |
46 | ||
47 | pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); | |
48 | temp &= 0xfffffff0; | |
49 | temp |= (1<<0 | 1<<1); | |
50 | pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL, temp); | |
51 | } | |
52 | ||
53 | static void ali_cleanup(void) | |
54 | { | |
55 | struct aper_size_info_32 *previous_size; | |
56 | u32 temp; | |
57 | ||
58 | previous_size = A_SIZE_32(agp_bridge->previous_size); | |
59 | ||
60 | pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); | |
61 | // clear tag | |
62 | pci_write_config_dword(agp_bridge->dev, ALI_TAGCTRL, | |
63 | ((temp & 0xffffff00) | 0x00000001|0x00000002)); | |
64 | ||
65 | pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp); | |
66 | pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE, | |
67 | ((temp & 0x00000ff0) | previous_size->size_value)); | |
68 | } | |
69 | ||
70 | static int ali_configure(void) | |
71 | { | |
72 | u32 temp; | |
73 | struct aper_size_info_32 *current_size; | |
74 | ||
75 | current_size = A_SIZE_32(agp_bridge->current_size); | |
76 | ||
77 | /* aperture size and gatt addr */ | |
78 | pci_read_config_dword(agp_bridge->dev, ALI_ATTBASE, &temp); | |
79 | temp = (((temp & 0x00000ff0) | (agp_bridge->gatt_bus_addr & 0xfffff000)) | |
80 | | (current_size->size_value & 0xf)); | |
81 | pci_write_config_dword(agp_bridge->dev, ALI_ATTBASE, temp); | |
82 | ||
83 | /* tlb control */ | |
84 | pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); | |
85 | pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, ((temp & 0xffffff00) | 0x00000010)); | |
86 | ||
87 | /* address to map to */ | |
88 | pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp); | |
89 | agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); | |
90 | ||
91 | #if 0 | |
92 | if (agp_bridge->type == ALI_M1541) { | |
93 | u32 nlvm_addr = 0; | |
94 | ||
95 | switch (current_size->size_value) { | |
96 | case 0: break; | |
97 | case 1: nlvm_addr = 0x100000;break; | |
98 | case 2: nlvm_addr = 0x200000;break; | |
99 | case 3: nlvm_addr = 0x400000;break; | |
100 | case 4: nlvm_addr = 0x800000;break; | |
101 | case 6: nlvm_addr = 0x1000000;break; | |
102 | case 7: nlvm_addr = 0x2000000;break; | |
103 | case 8: nlvm_addr = 0x4000000;break; | |
104 | case 9: nlvm_addr = 0x8000000;break; | |
105 | case 10: nlvm_addr = 0x10000000;break; | |
106 | default: break; | |
107 | } | |
108 | nlvm_addr--; | |
109 | nlvm_addr&=0xfff00000; | |
110 | ||
111 | nlvm_addr+= agp_bridge->gart_bus_addr; | |
112 | nlvm_addr|=(agp_bridge->gart_bus_addr>>12); | |
113 | printk(KERN_INFO PFX "nlvm top &base = %8x\n",nlvm_addr); | |
114 | } | |
115 | #endif | |
116 | ||
117 | pci_read_config_dword(agp_bridge->dev, ALI_TLBCTRL, &temp); | |
118 | temp &= 0xffffff7f; //enable TLB | |
119 | pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, temp); | |
120 | ||
121 | return 0; | |
122 | } | |
123 | ||
124 | ||
125 | static void m1541_cache_flush(void) | |
126 | { | |
127 | int i, page_count; | |
128 | u32 temp; | |
129 | ||
130 | global_cache_flush(); | |
131 | ||
132 | page_count = 1 << A_SIZE_32(agp_bridge->current_size)->page_order; | |
133 | for (i = 0; i < PAGE_SIZE * page_count; i += PAGE_SIZE) { | |
134 | pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, | |
135 | &temp); | |
136 | pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, | |
137 | (((temp & ALI_CACHE_FLUSH_ADDR_MASK) | | |
138 | (agp_bridge->gatt_bus_addr + i)) | | |
139 | ALI_CACHE_FLUSH_EN)); | |
140 | } | |
141 | } | |
142 | ||
143 | static void *m1541_alloc_page(struct agp_bridge_data *bridge) | |
144 | { | |
145 | void *addr = agp_generic_alloc_page(agp_bridge); | |
146 | u32 temp; | |
147 | ||
77ec430e | 148 | global_flush_tlb(); |
1da177e4 LT |
149 | if (!addr) |
150 | return NULL; | |
6a92a4e0 | 151 | |
1da177e4 LT |
152 | pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp); |
153 | pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, | |
154 | (((temp & ALI_CACHE_FLUSH_ADDR_MASK) | | |
07eee78e | 155 | virt_to_gart(addr)) | ALI_CACHE_FLUSH_EN )); |
1da177e4 LT |
156 | return addr; |
157 | } | |
158 | ||
a2721e99 | 159 | static void ali_destroy_page(void * addr, int flags) |
1da177e4 LT |
160 | { |
161 | if (addr) { | |
a2721e99 DA |
162 | if (flags & AGP_PAGE_DESTROY_UNMAP) { |
163 | global_cache_flush(); /* is this really needed? --hch */ | |
164 | agp_generic_destroy_page(addr, flags); | |
165 | global_flush_tlb(); | |
166 | } else | |
167 | agp_generic_destroy_page(addr, flags); | |
1da177e4 LT |
168 | } |
169 | } | |
170 | ||
a2721e99 | 171 | static void m1541_destroy_page(void * addr, int flags) |
1da177e4 LT |
172 | { |
173 | u32 temp; | |
174 | ||
175 | if (addr == NULL) | |
176 | return; | |
177 | ||
a2721e99 DA |
178 | if (flags & AGP_PAGE_DESTROY_UNMAP) { |
179 | global_cache_flush(); | |
1da177e4 | 180 | |
a2721e99 DA |
181 | pci_read_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, &temp); |
182 | pci_write_config_dword(agp_bridge->dev, ALI_CACHE_FLUSH_CTRL, | |
183 | (((temp & ALI_CACHE_FLUSH_ADDR_MASK) | | |
184 | virt_to_gart(addr)) | ALI_CACHE_FLUSH_EN)); | |
185 | } | |
186 | agp_generic_destroy_page(addr, flags); | |
1da177e4 LT |
187 | } |
188 | ||
189 | ||
190 | /* Setup function */ | |
191 | ||
e5524f35 | 192 | static const struct aper_size_info_32 ali_generic_sizes[7] = |
1da177e4 LT |
193 | { |
194 | {256, 65536, 6, 10}, | |
195 | {128, 32768, 5, 9}, | |
196 | {64, 16384, 4, 8}, | |
197 | {32, 8192, 3, 7}, | |
198 | {16, 4096, 2, 6}, | |
199 | {8, 2048, 1, 4}, | |
200 | {4, 1024, 0, 3} | |
201 | }; | |
202 | ||
e5524f35 | 203 | static const struct agp_bridge_driver ali_generic_bridge = { |
1da177e4 LT |
204 | .owner = THIS_MODULE, |
205 | .aperture_sizes = ali_generic_sizes, | |
206 | .size_type = U32_APER_SIZE, | |
207 | .num_aperture_sizes = 7, | |
208 | .configure = ali_configure, | |
209 | .fetch_size = ali_fetch_size, | |
210 | .cleanup = ali_cleanup, | |
211 | .tlb_flush = ali_tlbflush, | |
212 | .mask_memory = agp_generic_mask_memory, | |
213 | .masks = NULL, | |
214 | .agp_enable = agp_generic_enable, | |
215 | .cache_flush = global_cache_flush, | |
216 | .create_gatt_table = agp_generic_create_gatt_table, | |
217 | .free_gatt_table = agp_generic_free_gatt_table, | |
218 | .insert_memory = agp_generic_insert_memory, | |
219 | .remove_memory = agp_generic_remove_memory, | |
220 | .alloc_by_type = agp_generic_alloc_by_type, | |
221 | .free_by_type = agp_generic_free_by_type, | |
222 | .agp_alloc_page = agp_generic_alloc_page, | |
223 | .agp_destroy_page = ali_destroy_page, | |
a030ce44 | 224 | .agp_type_to_mask_type = agp_generic_type_to_mask_type, |
1da177e4 LT |
225 | }; |
226 | ||
e5524f35 | 227 | static const struct agp_bridge_driver ali_m1541_bridge = { |
1da177e4 LT |
228 | .owner = THIS_MODULE, |
229 | .aperture_sizes = ali_generic_sizes, | |
230 | .size_type = U32_APER_SIZE, | |
231 | .num_aperture_sizes = 7, | |
232 | .configure = ali_configure, | |
233 | .fetch_size = ali_fetch_size, | |
234 | .cleanup = ali_cleanup, | |
235 | .tlb_flush = ali_tlbflush, | |
236 | .mask_memory = agp_generic_mask_memory, | |
237 | .masks = NULL, | |
238 | .agp_enable = agp_generic_enable, | |
239 | .cache_flush = m1541_cache_flush, | |
240 | .create_gatt_table = agp_generic_create_gatt_table, | |
241 | .free_gatt_table = agp_generic_free_gatt_table, | |
242 | .insert_memory = agp_generic_insert_memory, | |
243 | .remove_memory = agp_generic_remove_memory, | |
244 | .alloc_by_type = agp_generic_alloc_by_type, | |
245 | .free_by_type = agp_generic_free_by_type, | |
246 | .agp_alloc_page = m1541_alloc_page, | |
247 | .agp_destroy_page = m1541_destroy_page, | |
a030ce44 | 248 | .agp_type_to_mask_type = agp_generic_type_to_mask_type, |
1da177e4 LT |
249 | }; |
250 | ||
251 | ||
252 | static struct agp_device_ids ali_agp_device_ids[] __devinitdata = | |
253 | { | |
254 | { | |
255 | .device_id = PCI_DEVICE_ID_AL_M1541, | |
256 | .chipset_name = "M1541", | |
257 | }, | |
258 | { | |
259 | .device_id = PCI_DEVICE_ID_AL_M1621, | |
260 | .chipset_name = "M1621", | |
261 | }, | |
262 | { | |
263 | .device_id = PCI_DEVICE_ID_AL_M1631, | |
264 | .chipset_name = "M1631", | |
265 | }, | |
266 | { | |
267 | .device_id = PCI_DEVICE_ID_AL_M1632, | |
268 | .chipset_name = "M1632", | |
269 | }, | |
270 | { | |
271 | .device_id = PCI_DEVICE_ID_AL_M1641, | |
272 | .chipset_name = "M1641", | |
273 | }, | |
274 | { | |
275 | .device_id = PCI_DEVICE_ID_AL_M1644, | |
276 | .chipset_name = "M1644", | |
277 | }, | |
278 | { | |
279 | .device_id = PCI_DEVICE_ID_AL_M1647, | |
280 | .chipset_name = "M1647", | |
281 | }, | |
282 | { | |
283 | .device_id = PCI_DEVICE_ID_AL_M1651, | |
284 | .chipset_name = "M1651", | |
285 | }, | |
286 | { | |
287 | .device_id = PCI_DEVICE_ID_AL_M1671, | |
288 | .chipset_name = "M1671", | |
289 | }, | |
290 | { | |
291 | .device_id = PCI_DEVICE_ID_AL_M1681, | |
292 | .chipset_name = "M1681", | |
293 | }, | |
294 | { | |
295 | .device_id = PCI_DEVICE_ID_AL_M1683, | |
296 | .chipset_name = "M1683", | |
297 | }, | |
298 | ||
299 | { }, /* dummy final entry, always present */ | |
300 | }; | |
301 | ||
302 | static int __devinit agp_ali_probe(struct pci_dev *pdev, | |
303 | const struct pci_device_id *ent) | |
304 | { | |
305 | struct agp_device_ids *devs = ali_agp_device_ids; | |
306 | struct agp_bridge_data *bridge; | |
307 | u8 hidden_1621_id, cap_ptr; | |
308 | int j; | |
309 | ||
310 | cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); | |
311 | if (!cap_ptr) | |
312 | return -ENODEV; | |
313 | ||
314 | /* probe for known chipsets */ | |
315 | for (j = 0; devs[j].chipset_name; j++) { | |
316 | if (pdev->device == devs[j].device_id) | |
317 | goto found; | |
318 | } | |
319 | ||
320 | printk(KERN_ERR PFX "Unsupported ALi chipset (device id: %04x)\n", | |
321 | pdev->device); | |
322 | return -ENODEV; | |
323 | ||
324 | ||
325 | found: | |
326 | bridge = agp_alloc_bridge(); | |
327 | if (!bridge) | |
328 | return -ENOMEM; | |
329 | ||
330 | bridge->dev = pdev; | |
331 | bridge->capndx = cap_ptr; | |
332 | ||
333 | switch (pdev->device) { | |
334 | case PCI_DEVICE_ID_AL_M1541: | |
335 | bridge->driver = &ali_m1541_bridge; | |
336 | break; | |
337 | case PCI_DEVICE_ID_AL_M1621: | |
338 | pci_read_config_byte(pdev, 0xFB, &hidden_1621_id); | |
339 | switch (hidden_1621_id) { | |
340 | case 0x31: | |
341 | devs[j].chipset_name = "M1631"; | |
342 | break; | |
343 | case 0x32: | |
344 | devs[j].chipset_name = "M1632"; | |
345 | break; | |
346 | case 0x41: | |
347 | devs[j].chipset_name = "M1641"; | |
348 | break; | |
349 | case 0x43: | |
350 | devs[j].chipset_name = "M????"; | |
351 | break; | |
352 | case 0x47: | |
353 | devs[j].chipset_name = "M1647"; | |
354 | break; | |
355 | case 0x51: | |
356 | devs[j].chipset_name = "M1651"; | |
357 | break; | |
358 | default: | |
359 | break; | |
360 | } | |
361 | /*FALLTHROUGH*/ | |
362 | default: | |
363 | bridge->driver = &ali_generic_bridge; | |
364 | } | |
365 | ||
366 | printk(KERN_INFO PFX "Detected ALi %s chipset\n", | |
367 | devs[j].chipset_name); | |
368 | ||
369 | /* Fill in the mode register */ | |
370 | pci_read_config_dword(pdev, | |
371 | bridge->capndx+PCI_AGP_STATUS, | |
372 | &bridge->mode); | |
373 | ||
374 | pci_set_drvdata(pdev, bridge); | |
375 | return agp_add_bridge(bridge); | |
376 | } | |
377 | ||
378 | static void __devexit agp_ali_remove(struct pci_dev *pdev) | |
379 | { | |
380 | struct agp_bridge_data *bridge = pci_get_drvdata(pdev); | |
381 | ||
382 | agp_remove_bridge(bridge); | |
383 | agp_put_bridge(bridge); | |
384 | } | |
385 | ||
386 | static struct pci_device_id agp_ali_pci_table[] = { | |
387 | { | |
388 | .class = (PCI_CLASS_BRIDGE_HOST << 8), | |
389 | .class_mask = ~0, | |
390 | .vendor = PCI_VENDOR_ID_AL, | |
391 | .device = PCI_ANY_ID, | |
392 | .subvendor = PCI_ANY_ID, | |
393 | .subdevice = PCI_ANY_ID, | |
394 | }, | |
395 | { } | |
396 | }; | |
397 | ||
398 | MODULE_DEVICE_TABLE(pci, agp_ali_pci_table); | |
399 | ||
400 | static struct pci_driver agp_ali_pci_driver = { | |
401 | .name = "agpgart-ali", | |
402 | .id_table = agp_ali_pci_table, | |
403 | .probe = agp_ali_probe, | |
404 | .remove = agp_ali_remove, | |
405 | }; | |
406 | ||
407 | static int __init agp_ali_init(void) | |
408 | { | |
409 | if (agp_off) | |
410 | return -EINVAL; | |
411 | return pci_register_driver(&agp_ali_pci_driver); | |
412 | } | |
413 | ||
414 | static void __exit agp_ali_cleanup(void) | |
415 | { | |
416 | pci_unregister_driver(&agp_ali_pci_driver); | |
417 | } | |
418 | ||
419 | module_init(agp_ali_init); | |
420 | module_exit(agp_ali_cleanup); | |
421 | ||
422 | MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>"); | |
423 | MODULE_LICENSE("GPL and additional rights"); | |
424 |