Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /** |
2 | * \file drm_os_linux.h | |
3 | * OS abstraction macros. | |
4 | */ | |
5 | ||
1da177e4 LT |
6 | #include <linux/interrupt.h> /* For task queue support */ |
7 | #include <linux/delay.h> | |
8 | ||
9 | /** File pointer type */ | |
10 | #define DRMFILE struct file * | |
11 | /** Ioctl arguments */ | |
12 | #define DRM_IOCTL_ARGS struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data | |
13 | #define DRM_ERR(d) -(d) | |
14 | /** Current process ID */ | |
15 | #define DRM_CURRENTPID current->pid | |
16 | #define DRM_UDELAY(d) udelay(d) | |
17 | /** Read a byte from a MMIO region */ | |
18 | #define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset)) | |
19 | /** Read a word from a MMIO region */ | |
20 | #define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset)) | |
21 | /** Read a dword from a MMIO region */ | |
22 | #define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset)) | |
23 | /** Write a byte into a MMIO region */ | |
24 | #define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset)) | |
25 | /** Write a word into a MMIO region */ | |
26 | #define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset)) | |
27 | /** Write a dword into a MMIO region */ | |
28 | #define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset)) | |
29 | /** Read memory barrier */ | |
30 | #define DRM_READMEMORYBARRIER() rmb() | |
31 | /** Write memory barrier */ | |
32 | #define DRM_WRITEMEMORYBARRIER() wmb() | |
33 | /** Read/write memory barrier */ | |
34 | #define DRM_MEMORYBARRIER() mb() | |
35 | /** DRM device local declaration */ | |
36 | #define DRM_DEVICE drm_file_t *priv = filp->private_data; \ | |
37 | drm_device_t *dev = priv->head->dev | |
38 | ||
39 | /** IRQ handler arguments and return type and values */ | |
40 | #define DRM_IRQ_ARGS int irq, void *arg, struct pt_regs *regs | |
41 | ||
42 | /** AGP types */ | |
43 | #if __OS_HAS_AGP | |
44 | #define DRM_AGP_MEM struct agp_memory | |
45 | #define DRM_AGP_KERN struct agp_kern_info | |
46 | #else | |
47 | /* define some dummy types for non AGP supporting kernels */ | |
48 | struct no_agp_kern { | |
b5e89ed5 DA |
49 | unsigned long aper_base; |
50 | unsigned long aper_size; | |
1da177e4 LT |
51 | }; |
52 | #define DRM_AGP_MEM int | |
53 | #define DRM_AGP_KERN struct no_agp_kern | |
54 | #endif | |
55 | ||
56 | #if !(__OS_HAS_MTRR) | |
b5e89ed5 DA |
57 | static __inline__ int mtrr_add(unsigned long base, unsigned long size, |
58 | unsigned int type, char increment) | |
1da177e4 LT |
59 | { |
60 | return -ENODEV; | |
61 | } | |
62 | ||
b5e89ed5 | 63 | static __inline__ int mtrr_del(int reg, unsigned long base, unsigned long size) |
1da177e4 LT |
64 | { |
65 | return -ENODEV; | |
66 | } | |
b5e89ed5 | 67 | |
1da177e4 LT |
68 | #define MTRR_TYPE_WRCOMB 1 |
69 | ||
70 | #endif | |
71 | ||
72 | /** Task queue handler arguments */ | |
73 | #define DRM_TASKQUEUE_ARGS void *arg | |
74 | ||
75 | /** For data going into the kernel through the ioctl argument */ | |
76 | #define DRM_COPY_FROM_USER_IOCTL(arg1, arg2, arg3) \ | |
77 | if ( copy_from_user(&arg1, arg2, arg3) ) \ | |
78 | return -EFAULT | |
79 | /** For data going from the kernel through the ioctl argument */ | |
80 | #define DRM_COPY_TO_USER_IOCTL(arg1, arg2, arg3) \ | |
81 | if ( copy_to_user(arg1, &arg2, arg3) ) \ | |
82 | return -EFAULT | |
83 | /** Other copying of data to kernel space */ | |
84 | #define DRM_COPY_FROM_USER(arg1, arg2, arg3) \ | |
85 | copy_from_user(arg1, arg2, arg3) | |
86 | /** Other copying of data from kernel space */ | |
87 | #define DRM_COPY_TO_USER(arg1, arg2, arg3) \ | |
88 | copy_to_user(arg1, arg2, arg3) | |
89 | /* Macros for copyfrom user, but checking readability only once */ | |
90 | #define DRM_VERIFYAREA_READ( uaddr, size ) \ | |
91 | (access_ok( VERIFY_READ, uaddr, size ) ? 0 : -EFAULT) | |
92 | #define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \ | |
93 | __copy_from_user(arg1, arg2, arg3) | |
94 | #define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \ | |
95 | __copy_to_user(arg1, arg2, arg3) | |
96 | #define DRM_GET_USER_UNCHECKED(val, uaddr) \ | |
97 | __get_user(val, uaddr) | |
98 | ||
99 | #define DRM_GET_PRIV_WITH_RETURN(_priv, _filp) _priv = _filp->private_data | |
100 | ||
b5e89ed5 | 101 | /** |
1da177e4 LT |
102 | * Get the pointer to the SAREA. |
103 | * | |
104 | * Searches the SAREA on the mapping lists and points drm_device::sarea to it. | |
105 | */ | |
106 | #define DRM_GETSAREA() \ | |
107 | do { \ | |
108 | drm_map_list_t *entry; \ | |
109 | list_for_each_entry( entry, &dev->maplist->head, head ) { \ | |
110 | if ( entry->map && \ | |
111 | entry->map->type == _DRM_SHM && \ | |
112 | (entry->map->flags & _DRM_CONTAINS_LOCK) ) { \ | |
113 | dev_priv->sarea = entry->map; \ | |
114 | break; \ | |
115 | } \ | |
116 | } \ | |
117 | } while (0) | |
118 | ||
119 | #define DRM_HZ HZ | |
120 | ||
121 | #define DRM_WAIT_ON( ret, queue, timeout, condition ) \ | |
122 | do { \ | |
123 | DECLARE_WAITQUEUE(entry, current); \ | |
124 | unsigned long end = jiffies + (timeout); \ | |
125 | add_wait_queue(&(queue), &entry); \ | |
126 | \ | |
127 | for (;;) { \ | |
128 | __set_current_state(TASK_INTERRUPTIBLE); \ | |
129 | if (condition) \ | |
130 | break; \ | |
131 | if (time_after_eq(jiffies, end)) { \ | |
132 | ret = -EBUSY; \ | |
133 | break; \ | |
134 | } \ | |
135 | schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \ | |
136 | if (signal_pending(current)) { \ | |
137 | ret = -EINTR; \ | |
138 | break; \ | |
139 | } \ | |
140 | } \ | |
141 | __set_current_state(TASK_RUNNING); \ | |
142 | remove_wait_queue(&(queue), &entry); \ | |
143 | } while (0) | |
144 | ||
1da177e4 LT |
145 | #define DRM_WAKEUP( queue ) wake_up_interruptible( queue ) |
146 | #define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue ) |