Commit | Line | Data |
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1da177e4 LT |
1 | /* i810_dma.c -- DMA support for the i810 -*- linux-c -*- |
2 | * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com | |
3 | * | |
4 | * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. | |
5 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. | |
6 | * All Rights Reserved. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a | |
9 | * copy of this software and associated documentation files (the "Software"), | |
10 | * to deal in the Software without restriction, including without limitation | |
11 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
12 | * and/or sell copies of the Software, and to permit persons to whom the | |
13 | * Software is furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice (including the next | |
16 | * paragraph) shall be included in all copies or substantial portions of the | |
17 | * Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
23 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
25 | * DEALINGS IN THE SOFTWARE. | |
26 | * | |
27 | * Authors: Rickard E. (Rik) Faith <faith@valinux.com> | |
28 | * Jeff Hartmann <jhartmann@valinux.com> | |
29 | * Keith Whitwell <keith@tungstengraphics.com> | |
30 | * | |
31 | */ | |
32 | ||
33 | #include "drmP.h" | |
34 | #include "drm.h" | |
35 | #include "i810_drm.h" | |
36 | #include "i810_drv.h" | |
37 | #include <linux/interrupt.h> /* For task queue support */ | |
38 | #include <linux/delay.h> | |
39 | #include <linux/pagemap.h> | |
40 | ||
41 | #define I810_BUF_FREE 2 | |
42 | #define I810_BUF_CLIENT 1 | |
43 | #define I810_BUF_HARDWARE 0 | |
44 | ||
45 | #define I810_BUF_UNMAPPED 0 | |
46 | #define I810_BUF_MAPPED 1 | |
47 | ||
056219e2 | 48 | static struct drm_buf *i810_freelist_get(struct drm_device * dev) |
1da177e4 | 49 | { |
cdd55a29 | 50 | struct drm_device_dma *dma = dev->dma; |
b5e89ed5 DA |
51 | int i; |
52 | int used; | |
1da177e4 LT |
53 | |
54 | /* Linear search might not be the best solution */ | |
55 | ||
b5e89ed5 | 56 | for (i = 0; i < dma->buf_count; i++) { |
056219e2 | 57 | struct drm_buf *buf = dma->buflist[i]; |
b5e89ed5 | 58 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
1da177e4 | 59 | /* In use is already a pointer */ |
b5e89ed5 | 60 | used = cmpxchg(buf_priv->in_use, I810_BUF_FREE, |
1da177e4 LT |
61 | I810_BUF_CLIENT); |
62 | if (used == I810_BUF_FREE) { | |
63 | return buf; | |
64 | } | |
65 | } | |
b5e89ed5 | 66 | return NULL; |
1da177e4 LT |
67 | } |
68 | ||
69 | /* This should only be called if the buffer is not sent to the hardware | |
70 | * yet, the hardware updates in use for us once its on the ring buffer. | |
71 | */ | |
72 | ||
056219e2 | 73 | static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf) |
1da177e4 | 74 | { |
b5e89ed5 DA |
75 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
76 | int used; | |
1da177e4 | 77 | |
b5e89ed5 DA |
78 | /* In use is already a pointer */ |
79 | used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE); | |
1da177e4 | 80 | if (used != I810_BUF_CLIENT) { |
b5e89ed5 DA |
81 | DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); |
82 | return -EINVAL; | |
1da177e4 LT |
83 | } |
84 | ||
b5e89ed5 | 85 | return 0; |
1da177e4 LT |
86 | } |
87 | ||
c94f7029 | 88 | static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) |
1da177e4 | 89 | { |
eddca551 DA |
90 | struct drm_file *priv = filp->private_data; |
91 | struct drm_device *dev; | |
b5e89ed5 | 92 | drm_i810_private_t *dev_priv; |
056219e2 | 93 | struct drm_buf *buf; |
1da177e4 LT |
94 | drm_i810_buf_priv_t *buf_priv; |
95 | ||
96 | lock_kernel(); | |
b5e89ed5 | 97 | dev = priv->head->dev; |
1da177e4 | 98 | dev_priv = dev->dev_private; |
b5e89ed5 | 99 | buf = dev_priv->mmap_buffer; |
1da177e4 LT |
100 | buf_priv = buf->dev_private; |
101 | ||
102 | vma->vm_flags |= (VM_IO | VM_DONTCOPY); | |
103 | vma->vm_file = filp; | |
104 | ||
b5e89ed5 | 105 | buf_priv->currently_mapped = I810_BUF_MAPPED; |
1da177e4 LT |
106 | unlock_kernel(); |
107 | ||
108 | if (io_remap_pfn_range(vma, vma->vm_start, | |
3d77461e | 109 | vma->vm_pgoff, |
b5e89ed5 DA |
110 | vma->vm_end - vma->vm_start, vma->vm_page_prot)) |
111 | return -EAGAIN; | |
1da177e4 LT |
112 | return 0; |
113 | } | |
114 | ||
2b8693c0 | 115 | static const struct file_operations i810_buffer_fops = { |
b5e89ed5 | 116 | .open = drm_open, |
c94f7029 | 117 | .release = drm_release, |
b5e89ed5 DA |
118 | .ioctl = drm_ioctl, |
119 | .mmap = i810_mmap_buffers, | |
120 | .fasync = drm_fasync, | |
c94f7029 DA |
121 | }; |
122 | ||
6c340eac | 123 | static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv) |
1da177e4 | 124 | { |
6c340eac | 125 | struct drm_device *dev = file_priv->head->dev; |
1da177e4 | 126 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
b5e89ed5 | 127 | drm_i810_private_t *dev_priv = dev->dev_private; |
99ac48f5 | 128 | const struct file_operations *old_fops; |
1da177e4 LT |
129 | int retcode = 0; |
130 | ||
b5e89ed5 | 131 | if (buf_priv->currently_mapped == I810_BUF_MAPPED) |
1da177e4 LT |
132 | return -EINVAL; |
133 | ||
b5e89ed5 | 134 | down_write(¤t->mm->mmap_sem); |
6c340eac EA |
135 | old_fops = file_priv->filp->f_op; |
136 | file_priv->filp->f_op = &i810_buffer_fops; | |
1da177e4 | 137 | dev_priv->mmap_buffer = buf; |
6c340eac | 138 | buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total, |
b5e89ed5 DA |
139 | PROT_READ | PROT_WRITE, |
140 | MAP_SHARED, buf->bus_address); | |
1da177e4 | 141 | dev_priv->mmap_buffer = NULL; |
6c340eac | 142 | file_priv->filp->f_op = old_fops; |
c7aed179 | 143 | if (IS_ERR(buf_priv->virtual)) { |
1da177e4 LT |
144 | /* Real error */ |
145 | DRM_ERROR("mmap error\n"); | |
c7aed179 | 146 | retcode = PTR_ERR(buf_priv->virtual); |
1da177e4 LT |
147 | buf_priv->virtual = NULL; |
148 | } | |
b5e89ed5 | 149 | up_write(¤t->mm->mmap_sem); |
1da177e4 LT |
150 | |
151 | return retcode; | |
152 | } | |
153 | ||
056219e2 | 154 | static int i810_unmap_buffer(struct drm_buf * buf) |
1da177e4 LT |
155 | { |
156 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; | |
157 | int retcode = 0; | |
158 | ||
159 | if (buf_priv->currently_mapped != I810_BUF_MAPPED) | |
160 | return -EINVAL; | |
161 | ||
162 | down_write(¤t->mm->mmap_sem); | |
163 | retcode = do_munmap(current->mm, | |
164 | (unsigned long)buf_priv->virtual, | |
165 | (size_t) buf->total); | |
166 | up_write(¤t->mm->mmap_sem); | |
167 | ||
b5e89ed5 DA |
168 | buf_priv->currently_mapped = I810_BUF_UNMAPPED; |
169 | buf_priv->virtual = NULL; | |
1da177e4 LT |
170 | |
171 | return retcode; | |
172 | } | |
173 | ||
eddca551 | 174 | static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d, |
6c340eac | 175 | struct drm_file *file_priv) |
1da177e4 | 176 | { |
056219e2 | 177 | struct drm_buf *buf; |
1da177e4 LT |
178 | drm_i810_buf_priv_t *buf_priv; |
179 | int retcode = 0; | |
180 | ||
181 | buf = i810_freelist_get(dev); | |
182 | if (!buf) { | |
183 | retcode = -ENOMEM; | |
b5e89ed5 | 184 | DRM_DEBUG("retcode=%d\n", retcode); |
1da177e4 LT |
185 | return retcode; |
186 | } | |
187 | ||
6c340eac | 188 | retcode = i810_map_buffer(buf, file_priv); |
1da177e4 LT |
189 | if (retcode) { |
190 | i810_freelist_put(dev, buf); | |
b5e89ed5 | 191 | DRM_ERROR("mapbuf failed, retcode %d\n", retcode); |
1da177e4 LT |
192 | return retcode; |
193 | } | |
6c340eac | 194 | buf->file_priv = file_priv; |
1da177e4 LT |
195 | buf_priv = buf->dev_private; |
196 | d->granted = 1; | |
b5e89ed5 DA |
197 | d->request_idx = buf->idx; |
198 | d->request_size = buf->total; | |
199 | d->virtual = buf_priv->virtual; | |
1da177e4 LT |
200 | |
201 | return retcode; | |
202 | } | |
203 | ||
eddca551 | 204 | static int i810_dma_cleanup(struct drm_device * dev) |
1da177e4 | 205 | { |
cdd55a29 | 206 | struct drm_device_dma *dma = dev->dma; |
1da177e4 LT |
207 | |
208 | /* Make sure interrupts are disabled here because the uninstall ioctl | |
209 | * may not have been called from userspace and after dev_private | |
210 | * is freed, it's too late. | |
211 | */ | |
212 | if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled) | |
213 | drm_irq_uninstall(dev); | |
214 | ||
215 | if (dev->dev_private) { | |
216 | int i; | |
b5e89ed5 DA |
217 | drm_i810_private_t *dev_priv = |
218 | (drm_i810_private_t *) dev->dev_private; | |
1da177e4 LT |
219 | |
220 | if (dev_priv->ring.virtual_start) { | |
b9094d3a | 221 | drm_core_ioremapfree(&dev_priv->ring.map, dev); |
1da177e4 | 222 | } |
b5e89ed5 DA |
223 | if (dev_priv->hw_status_page) { |
224 | pci_free_consistent(dev->pdev, PAGE_SIZE, | |
1da177e4 LT |
225 | dev_priv->hw_status_page, |
226 | dev_priv->dma_status_page); | |
b5e89ed5 DA |
227 | /* Need to rewrite hardware status page */ |
228 | I810_WRITE(0x02080, 0x1ffff000); | |
1da177e4 | 229 | } |
b5e89ed5 | 230 | drm_free(dev->dev_private, sizeof(drm_i810_private_t), |
1da177e4 | 231 | DRM_MEM_DRIVER); |
b5e89ed5 | 232 | dev->dev_private = NULL; |
1da177e4 LT |
233 | |
234 | for (i = 0; i < dma->buf_count; i++) { | |
056219e2 | 235 | struct drm_buf *buf = dma->buflist[i]; |
1da177e4 | 236 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
b9094d3a | 237 | |
b5e89ed5 | 238 | if (buf_priv->kernel_virtual && buf->total) |
b9094d3a | 239 | drm_core_ioremapfree(&buf_priv->map, dev); |
1da177e4 LT |
240 | } |
241 | } | |
b5e89ed5 | 242 | return 0; |
1da177e4 LT |
243 | } |
244 | ||
eddca551 | 245 | static int i810_wait_ring(struct drm_device * dev, int n) |
1da177e4 | 246 | { |
b5e89ed5 DA |
247 | drm_i810_private_t *dev_priv = dev->dev_private; |
248 | drm_i810_ring_buffer_t *ring = &(dev_priv->ring); | |
249 | int iters = 0; | |
250 | unsigned long end; | |
1da177e4 LT |
251 | unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; |
252 | ||
b5e89ed5 DA |
253 | end = jiffies + (HZ * 3); |
254 | while (ring->space < n) { | |
255 | ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; | |
256 | ring->space = ring->head - (ring->tail + 8); | |
257 | if (ring->space < 0) | |
258 | ring->space += ring->Size; | |
259 | ||
1da177e4 | 260 | if (ring->head != last_head) { |
b5e89ed5 | 261 | end = jiffies + (HZ * 3); |
1da177e4 LT |
262 | last_head = ring->head; |
263 | } | |
b5e89ed5 DA |
264 | |
265 | iters++; | |
1da177e4 | 266 | if (time_before(end, jiffies)) { |
b5e89ed5 DA |
267 | DRM_ERROR("space: %d wanted %d\n", ring->space, n); |
268 | DRM_ERROR("lockup\n"); | |
269 | goto out_wait_ring; | |
1da177e4 LT |
270 | } |
271 | udelay(1); | |
272 | } | |
273 | ||
b5e89ed5 DA |
274 | out_wait_ring: |
275 | return iters; | |
1da177e4 LT |
276 | } |
277 | ||
eddca551 | 278 | static void i810_kernel_lost_context(struct drm_device * dev) |
1da177e4 | 279 | { |
b5e89ed5 DA |
280 | drm_i810_private_t *dev_priv = dev->dev_private; |
281 | drm_i810_ring_buffer_t *ring = &(dev_priv->ring); | |
1da177e4 | 282 | |
b5e89ed5 DA |
283 | ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; |
284 | ring->tail = I810_READ(LP_RING + RING_TAIL); | |
285 | ring->space = ring->head - (ring->tail + 8); | |
286 | if (ring->space < 0) | |
287 | ring->space += ring->Size; | |
1da177e4 LT |
288 | } |
289 | ||
eddca551 | 290 | static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv) |
1da177e4 | 291 | { |
cdd55a29 | 292 | struct drm_device_dma *dma = dev->dma; |
b5e89ed5 DA |
293 | int my_idx = 24; |
294 | u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx); | |
295 | int i; | |
1da177e4 LT |
296 | |
297 | if (dma->buf_count > 1019) { | |
b5e89ed5 DA |
298 | /* Not enough space in the status page for the freelist */ |
299 | return -EINVAL; | |
1da177e4 LT |
300 | } |
301 | ||
b5e89ed5 | 302 | for (i = 0; i < dma->buf_count; i++) { |
056219e2 | 303 | struct drm_buf *buf = dma->buflist[i]; |
b5e89ed5 | 304 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
1da177e4 | 305 | |
b5e89ed5 DA |
306 | buf_priv->in_use = hw_status++; |
307 | buf_priv->my_use_idx = my_idx; | |
308 | my_idx += 4; | |
1da177e4 | 309 | |
b5e89ed5 | 310 | *buf_priv->in_use = I810_BUF_FREE; |
1da177e4 | 311 | |
b9094d3a DA |
312 | buf_priv->map.offset = buf->bus_address; |
313 | buf_priv->map.size = buf->total; | |
314 | buf_priv->map.type = _DRM_AGP; | |
315 | buf_priv->map.flags = 0; | |
316 | buf_priv->map.mtrr = 0; | |
317 | ||
318 | drm_core_ioremap(&buf_priv->map, dev); | |
319 | buf_priv->kernel_virtual = buf_priv->map.handle; | |
320 | ||
1da177e4 LT |
321 | } |
322 | return 0; | |
323 | } | |
324 | ||
eddca551 | 325 | static int i810_dma_initialize(struct drm_device * dev, |
b5e89ed5 DA |
326 | drm_i810_private_t * dev_priv, |
327 | drm_i810_init_t * init) | |
1da177e4 | 328 | { |
55910517 | 329 | struct drm_map_list *r_list; |
b5e89ed5 | 330 | memset(dev_priv, 0, sizeof(drm_i810_private_t)); |
1da177e4 | 331 | |
bd1b331f | 332 | list_for_each_entry(r_list, &dev->maplist, head) { |
1da177e4 LT |
333 | if (r_list->map && |
334 | r_list->map->type == _DRM_SHM && | |
b5e89ed5 | 335 | r_list->map->flags & _DRM_CONTAINS_LOCK) { |
1da177e4 | 336 | dev_priv->sarea_map = r_list->map; |
b5e89ed5 DA |
337 | break; |
338 | } | |
339 | } | |
1da177e4 LT |
340 | if (!dev_priv->sarea_map) { |
341 | dev->dev_private = (void *)dev_priv; | |
b5e89ed5 DA |
342 | i810_dma_cleanup(dev); |
343 | DRM_ERROR("can not find sarea!\n"); | |
344 | return -EINVAL; | |
1da177e4 LT |
345 | } |
346 | dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset); | |
347 | if (!dev_priv->mmio_map) { | |
348 | dev->dev_private = (void *)dev_priv; | |
b5e89ed5 DA |
349 | i810_dma_cleanup(dev); |
350 | DRM_ERROR("can not find mmio map!\n"); | |
351 | return -EINVAL; | |
1da177e4 | 352 | } |
d1f2b55a | 353 | dev->agp_buffer_token = init->buffers_offset; |
1da177e4 LT |
354 | dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset); |
355 | if (!dev->agp_buffer_map) { | |
356 | dev->dev_private = (void *)dev_priv; | |
b5e89ed5 DA |
357 | i810_dma_cleanup(dev); |
358 | DRM_ERROR("can not find dma buffer map!\n"); | |
359 | return -EINVAL; | |
1da177e4 LT |
360 | } |
361 | ||
362 | dev_priv->sarea_priv = (drm_i810_sarea_t *) | |
b5e89ed5 | 363 | ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset); |
1da177e4 | 364 | |
b5e89ed5 DA |
365 | dev_priv->ring.Start = init->ring_start; |
366 | dev_priv->ring.End = init->ring_end; | |
367 | dev_priv->ring.Size = init->ring_size; | |
1da177e4 | 368 | |
b9094d3a DA |
369 | dev_priv->ring.map.offset = dev->agp->base + init->ring_start; |
370 | dev_priv->ring.map.size = init->ring_size; | |
371 | dev_priv->ring.map.type = _DRM_AGP; | |
372 | dev_priv->ring.map.flags = 0; | |
373 | dev_priv->ring.map.mtrr = 0; | |
1da177e4 | 374 | |
b9094d3a DA |
375 | drm_core_ioremap(&dev_priv->ring.map, dev); |
376 | ||
377 | if (dev_priv->ring.map.handle == NULL) { | |
b5e89ed5 DA |
378 | dev->dev_private = (void *)dev_priv; |
379 | i810_dma_cleanup(dev); | |
380 | DRM_ERROR("can not ioremap virtual address for" | |
1da177e4 | 381 | " ring buffer\n"); |
20caafa6 | 382 | return -ENOMEM; |
1da177e4 LT |
383 | } |
384 | ||
b9094d3a DA |
385 | dev_priv->ring.virtual_start = dev_priv->ring.map.handle; |
386 | ||
b5e89ed5 | 387 | dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; |
1da177e4 LT |
388 | |
389 | dev_priv->w = init->w; | |
390 | dev_priv->h = init->h; | |
391 | dev_priv->pitch = init->pitch; | |
392 | dev_priv->back_offset = init->back_offset; | |
393 | dev_priv->depth_offset = init->depth_offset; | |
394 | dev_priv->front_offset = init->front_offset; | |
395 | ||
396 | dev_priv->overlay_offset = init->overlay_offset; | |
397 | dev_priv->overlay_physical = init->overlay_physical; | |
398 | ||
399 | dev_priv->front_di1 = init->front_offset | init->pitch_bits; | |
400 | dev_priv->back_di1 = init->back_offset | init->pitch_bits; | |
401 | dev_priv->zi1 = init->depth_offset | init->pitch_bits; | |
402 | ||
b5e89ed5 DA |
403 | /* Program Hardware Status Page */ |
404 | dev_priv->hw_status_page = | |
405 | pci_alloc_consistent(dev->pdev, PAGE_SIZE, | |
406 | &dev_priv->dma_status_page); | |
407 | if (!dev_priv->hw_status_page) { | |
1da177e4 LT |
408 | dev->dev_private = (void *)dev_priv; |
409 | i810_dma_cleanup(dev); | |
410 | DRM_ERROR("Can not allocate hardware status page\n"); | |
411 | return -ENOMEM; | |
412 | } | |
b5e89ed5 DA |
413 | memset(dev_priv->hw_status_page, 0, PAGE_SIZE); |
414 | DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page); | |
1da177e4 LT |
415 | |
416 | I810_WRITE(0x02080, dev_priv->dma_status_page); | |
b5e89ed5 | 417 | DRM_DEBUG("Enabled hardware status page\n"); |
1da177e4 | 418 | |
b5e89ed5 | 419 | /* Now we need to init our freelist */ |
1da177e4 LT |
420 | if (i810_freelist_init(dev, dev_priv) != 0) { |
421 | dev->dev_private = (void *)dev_priv; | |
b5e89ed5 DA |
422 | i810_dma_cleanup(dev); |
423 | DRM_ERROR("Not enough space in the status page for" | |
1da177e4 | 424 | " the freelist\n"); |
b5e89ed5 | 425 | return -ENOMEM; |
1da177e4 LT |
426 | } |
427 | dev->dev_private = (void *)dev_priv; | |
428 | ||
b5e89ed5 | 429 | return 0; |
1da177e4 LT |
430 | } |
431 | ||
432 | /* i810 DRM version 1.1 used a smaller init structure with different | |
433 | * ordering of values than is currently used (drm >= 1.2). There is | |
434 | * no defined way to detect the XFree version to correct this problem, | |
435 | * however by checking using this procedure we can detect the correct | |
436 | * thing to do. | |
437 | * | |
438 | * #1 Read the Smaller init structure from user-space | |
439 | * #2 Verify the overlay_physical is a valid physical address, or NULL | |
440 | * If it isn't then we have a v1.1 client. Fix up params. | |
441 | * If it is, then we have a 1.2 client... get the rest of the data. | |
442 | */ | |
b5e89ed5 | 443 | static int i810_dma_init_compat(drm_i810_init_t * init, unsigned long arg) |
1da177e4 LT |
444 | { |
445 | ||
446 | /* Get v1.1 init data */ | |
b5e89ed5 DA |
447 | if (copy_from_user(init, (drm_i810_pre12_init_t __user *) arg, |
448 | sizeof(drm_i810_pre12_init_t))) { | |
1da177e4 LT |
449 | return -EFAULT; |
450 | } | |
451 | ||
452 | if ((!init->overlay_physical) || (init->overlay_physical > 4096)) { | |
453 | ||
454 | /* This is a v1.2 client, just get the v1.2 init data */ | |
455 | DRM_INFO("Using POST v1.2 init.\n"); | |
b5e89ed5 | 456 | if (copy_from_user(init, (drm_i810_init_t __user *) arg, |
1da177e4 LT |
457 | sizeof(drm_i810_init_t))) { |
458 | return -EFAULT; | |
459 | } | |
460 | } else { | |
461 | ||
462 | /* This is a v1.1 client, fix the params */ | |
463 | DRM_INFO("Using PRE v1.2 init.\n"); | |
b5e89ed5 DA |
464 | init->pitch_bits = init->h; |
465 | init->pitch = init->w; | |
466 | init->h = init->overlay_physical; | |
467 | init->w = init->overlay_offset; | |
468 | init->overlay_physical = 0; | |
469 | init->overlay_offset = 0; | |
1da177e4 LT |
470 | } |
471 | ||
472 | return 0; | |
473 | } | |
474 | ||
6c340eac | 475 | static int i810_dma_init(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 476 | unsigned int cmd, unsigned long arg) |
1da177e4 | 477 | { |
6c340eac | 478 | struct drm_device *dev = file_priv->head->dev; |
b5e89ed5 DA |
479 | drm_i810_private_t *dev_priv; |
480 | drm_i810_init_t init; | |
481 | int retcode = 0; | |
1da177e4 LT |
482 | |
483 | /* Get only the init func */ | |
b5e89ed5 DA |
484 | if (copy_from_user |
485 | (&init, (void __user *)arg, sizeof(drm_i810_init_func_t))) | |
1da177e4 LT |
486 | return -EFAULT; |
487 | ||
b5e89ed5 DA |
488 | switch (init.func) { |
489 | case I810_INIT_DMA: | |
490 | /* This case is for backward compatibility. It | |
491 | * handles XFree 4.1.0 and 4.2.0, and has to | |
492 | * do some parameter checking as described below. | |
493 | * It will someday go away. | |
494 | */ | |
495 | retcode = i810_dma_init_compat(&init, arg); | |
496 | if (retcode) | |
497 | return retcode; | |
498 | ||
499 | dev_priv = drm_alloc(sizeof(drm_i810_private_t), | |
500 | DRM_MEM_DRIVER); | |
501 | if (dev_priv == NULL) | |
502 | return -ENOMEM; | |
503 | retcode = i810_dma_initialize(dev, dev_priv, &init); | |
504 | break; | |
505 | ||
506 | default: | |
507 | case I810_INIT_DMA_1_4: | |
508 | DRM_INFO("Using v1.4 init.\n"); | |
509 | if (copy_from_user(&init, (drm_i810_init_t __user *) arg, | |
510 | sizeof(drm_i810_init_t))) { | |
511 | return -EFAULT; | |
512 | } | |
513 | dev_priv = drm_alloc(sizeof(drm_i810_private_t), | |
514 | DRM_MEM_DRIVER); | |
515 | if (dev_priv == NULL) | |
516 | return -ENOMEM; | |
517 | retcode = i810_dma_initialize(dev, dev_priv, &init); | |
518 | break; | |
519 | ||
520 | case I810_CLEANUP_DMA: | |
521 | DRM_INFO("DMA Cleanup\n"); | |
522 | retcode = i810_dma_cleanup(dev); | |
523 | break; | |
1da177e4 LT |
524 | } |
525 | ||
b5e89ed5 | 526 | return retcode; |
1da177e4 LT |
527 | } |
528 | ||
1da177e4 LT |
529 | /* Most efficient way to verify state for the i810 is as it is |
530 | * emitted. Non-conformant state is silently dropped. | |
531 | * | |
532 | * Use 'volatile' & local var tmp to force the emitted values to be | |
533 | * identical to the verified ones. | |
534 | */ | |
eddca551 | 535 | static void i810EmitContextVerified(struct drm_device * dev, |
b5e89ed5 | 536 | volatile unsigned int *code) |
1da177e4 | 537 | { |
b5e89ed5 | 538 | drm_i810_private_t *dev_priv = dev->dev_private; |
1da177e4 LT |
539 | int i, j = 0; |
540 | unsigned int tmp; | |
541 | RING_LOCALS; | |
542 | ||
b5e89ed5 | 543 | BEGIN_LP_RING(I810_CTX_SETUP_SIZE); |
1da177e4 | 544 | |
b5e89ed5 DA |
545 | OUT_RING(GFX_OP_COLOR_FACTOR); |
546 | OUT_RING(code[I810_CTXREG_CF1]); | |
1da177e4 | 547 | |
b5e89ed5 DA |
548 | OUT_RING(GFX_OP_STIPPLE); |
549 | OUT_RING(code[I810_CTXREG_ST1]); | |
1da177e4 | 550 | |
b5e89ed5 | 551 | for (i = 4; i < I810_CTX_SETUP_SIZE; i++) { |
1da177e4 LT |
552 | tmp = code[i]; |
553 | ||
b5e89ed5 DA |
554 | if ((tmp & (7 << 29)) == (3 << 29) && |
555 | (tmp & (0x1f << 24)) < (0x1d << 24)) { | |
556 | OUT_RING(tmp); | |
1da177e4 | 557 | j++; |
b5e89ed5 DA |
558 | } else |
559 | printk("constext state dropped!!!\n"); | |
1da177e4 LT |
560 | } |
561 | ||
562 | if (j & 1) | |
b5e89ed5 | 563 | OUT_RING(0); |
1da177e4 LT |
564 | |
565 | ADVANCE_LP_RING(); | |
566 | } | |
567 | ||
eddca551 | 568 | static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code) |
1da177e4 | 569 | { |
b5e89ed5 | 570 | drm_i810_private_t *dev_priv = dev->dev_private; |
1da177e4 LT |
571 | int i, j = 0; |
572 | unsigned int tmp; | |
573 | RING_LOCALS; | |
574 | ||
b5e89ed5 | 575 | BEGIN_LP_RING(I810_TEX_SETUP_SIZE); |
1da177e4 | 576 | |
b5e89ed5 DA |
577 | OUT_RING(GFX_OP_MAP_INFO); |
578 | OUT_RING(code[I810_TEXREG_MI1]); | |
579 | OUT_RING(code[I810_TEXREG_MI2]); | |
580 | OUT_RING(code[I810_TEXREG_MI3]); | |
1da177e4 | 581 | |
b5e89ed5 | 582 | for (i = 4; i < I810_TEX_SETUP_SIZE; i++) { |
1da177e4 LT |
583 | tmp = code[i]; |
584 | ||
b5e89ed5 DA |
585 | if ((tmp & (7 << 29)) == (3 << 29) && |
586 | (tmp & (0x1f << 24)) < (0x1d << 24)) { | |
587 | OUT_RING(tmp); | |
1da177e4 | 588 | j++; |
b5e89ed5 DA |
589 | } else |
590 | printk("texture state dropped!!!\n"); | |
1da177e4 LT |
591 | } |
592 | ||
593 | if (j & 1) | |
b5e89ed5 | 594 | OUT_RING(0); |
1da177e4 LT |
595 | |
596 | ADVANCE_LP_RING(); | |
597 | } | |
598 | ||
1da177e4 LT |
599 | /* Need to do some additional checking when setting the dest buffer. |
600 | */ | |
eddca551 | 601 | static void i810EmitDestVerified(struct drm_device * dev, |
b5e89ed5 | 602 | volatile unsigned int *code) |
1da177e4 | 603 | { |
b5e89ed5 | 604 | drm_i810_private_t *dev_priv = dev->dev_private; |
1da177e4 LT |
605 | unsigned int tmp; |
606 | RING_LOCALS; | |
607 | ||
b5e89ed5 | 608 | BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2); |
1da177e4 LT |
609 | |
610 | tmp = code[I810_DESTREG_DI1]; | |
611 | if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { | |
b5e89ed5 DA |
612 | OUT_RING(CMD_OP_DESTBUFFER_INFO); |
613 | OUT_RING(tmp); | |
1da177e4 | 614 | } else |
b5e89ed5 DA |
615 | DRM_DEBUG("bad di1 %x (allow %x or %x)\n", |
616 | tmp, dev_priv->front_di1, dev_priv->back_di1); | |
1da177e4 LT |
617 | |
618 | /* invarient: | |
619 | */ | |
b5e89ed5 DA |
620 | OUT_RING(CMD_OP_Z_BUFFER_INFO); |
621 | OUT_RING(dev_priv->zi1); | |
1da177e4 | 622 | |
b5e89ed5 DA |
623 | OUT_RING(GFX_OP_DESTBUFFER_VARS); |
624 | OUT_RING(code[I810_DESTREG_DV1]); | |
1da177e4 | 625 | |
b5e89ed5 DA |
626 | OUT_RING(GFX_OP_DRAWRECT_INFO); |
627 | OUT_RING(code[I810_DESTREG_DR1]); | |
628 | OUT_RING(code[I810_DESTREG_DR2]); | |
629 | OUT_RING(code[I810_DESTREG_DR3]); | |
630 | OUT_RING(code[I810_DESTREG_DR4]); | |
631 | OUT_RING(0); | |
1da177e4 LT |
632 | |
633 | ADVANCE_LP_RING(); | |
634 | } | |
635 | ||
eddca551 | 636 | static void i810EmitState(struct drm_device * dev) |
1da177e4 | 637 | { |
b5e89ed5 DA |
638 | drm_i810_private_t *dev_priv = dev->dev_private; |
639 | drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; | |
1da177e4 | 640 | unsigned int dirty = sarea_priv->dirty; |
b5e89ed5 | 641 | |
1da177e4 LT |
642 | DRM_DEBUG("%s %x\n", __FUNCTION__, dirty); |
643 | ||
644 | if (dirty & I810_UPLOAD_BUFFERS) { | |
b5e89ed5 | 645 | i810EmitDestVerified(dev, sarea_priv->BufferState); |
1da177e4 LT |
646 | sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS; |
647 | } | |
648 | ||
649 | if (dirty & I810_UPLOAD_CTX) { | |
b5e89ed5 | 650 | i810EmitContextVerified(dev, sarea_priv->ContextState); |
1da177e4 LT |
651 | sarea_priv->dirty &= ~I810_UPLOAD_CTX; |
652 | } | |
653 | ||
654 | if (dirty & I810_UPLOAD_TEX0) { | |
b5e89ed5 | 655 | i810EmitTexVerified(dev, sarea_priv->TexState[0]); |
1da177e4 LT |
656 | sarea_priv->dirty &= ~I810_UPLOAD_TEX0; |
657 | } | |
658 | ||
659 | if (dirty & I810_UPLOAD_TEX1) { | |
b5e89ed5 | 660 | i810EmitTexVerified(dev, sarea_priv->TexState[1]); |
1da177e4 LT |
661 | sarea_priv->dirty &= ~I810_UPLOAD_TEX1; |
662 | } | |
663 | } | |
664 | ||
1da177e4 LT |
665 | /* need to verify |
666 | */ | |
eddca551 | 667 | static void i810_dma_dispatch_clear(struct drm_device * dev, int flags, |
b5e89ed5 DA |
668 | unsigned int clear_color, |
669 | unsigned int clear_zval) | |
1da177e4 | 670 | { |
b5e89ed5 DA |
671 | drm_i810_private_t *dev_priv = dev->dev_private; |
672 | drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; | |
1da177e4 | 673 | int nbox = sarea_priv->nbox; |
eddca551 | 674 | struct drm_clip_rect *pbox = sarea_priv->boxes; |
1da177e4 LT |
675 | int pitch = dev_priv->pitch; |
676 | int cpp = 2; | |
677 | int i; | |
678 | RING_LOCALS; | |
b5e89ed5 DA |
679 | |
680 | if (dev_priv->current_page == 1) { | |
681 | unsigned int tmp = flags; | |
682 | ||
1da177e4 | 683 | flags &= ~(I810_FRONT | I810_BACK); |
b5e89ed5 DA |
684 | if (tmp & I810_FRONT) |
685 | flags |= I810_BACK; | |
686 | if (tmp & I810_BACK) | |
687 | flags |= I810_FRONT; | |
1da177e4 LT |
688 | } |
689 | ||
b5e89ed5 | 690 | i810_kernel_lost_context(dev); |
1da177e4 | 691 | |
b5e89ed5 DA |
692 | if (nbox > I810_NR_SAREA_CLIPRECTS) |
693 | nbox = I810_NR_SAREA_CLIPRECTS; | |
1da177e4 | 694 | |
b5e89ed5 | 695 | for (i = 0; i < nbox; i++, pbox++) { |
1da177e4 LT |
696 | unsigned int x = pbox->x1; |
697 | unsigned int y = pbox->y1; | |
698 | unsigned int width = (pbox->x2 - x) * cpp; | |
699 | unsigned int height = pbox->y2 - y; | |
700 | unsigned int start = y * pitch + x * cpp; | |
701 | ||
702 | if (pbox->x1 > pbox->x2 || | |
703 | pbox->y1 > pbox->y2 || | |
b5e89ed5 | 704 | pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h) |
1da177e4 LT |
705 | continue; |
706 | ||
b5e89ed5 DA |
707 | if (flags & I810_FRONT) { |
708 | BEGIN_LP_RING(6); | |
709 | OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3); | |
710 | OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch); | |
711 | OUT_RING((height << 16) | width); | |
712 | OUT_RING(start); | |
713 | OUT_RING(clear_color); | |
714 | OUT_RING(0); | |
1da177e4 LT |
715 | ADVANCE_LP_RING(); |
716 | } | |
717 | ||
b5e89ed5 DA |
718 | if (flags & I810_BACK) { |
719 | BEGIN_LP_RING(6); | |
720 | OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3); | |
721 | OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch); | |
722 | OUT_RING((height << 16) | width); | |
723 | OUT_RING(dev_priv->back_offset + start); | |
724 | OUT_RING(clear_color); | |
725 | OUT_RING(0); | |
1da177e4 LT |
726 | ADVANCE_LP_RING(); |
727 | } | |
728 | ||
b5e89ed5 DA |
729 | if (flags & I810_DEPTH) { |
730 | BEGIN_LP_RING(6); | |
731 | OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3); | |
732 | OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch); | |
733 | OUT_RING((height << 16) | width); | |
734 | OUT_RING(dev_priv->depth_offset + start); | |
735 | OUT_RING(clear_zval); | |
736 | OUT_RING(0); | |
1da177e4 LT |
737 | ADVANCE_LP_RING(); |
738 | } | |
739 | } | |
740 | } | |
741 | ||
eddca551 | 742 | static void i810_dma_dispatch_swap(struct drm_device * dev) |
1da177e4 | 743 | { |
b5e89ed5 DA |
744 | drm_i810_private_t *dev_priv = dev->dev_private; |
745 | drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; | |
1da177e4 | 746 | int nbox = sarea_priv->nbox; |
eddca551 | 747 | struct drm_clip_rect *pbox = sarea_priv->boxes; |
1da177e4 LT |
748 | int pitch = dev_priv->pitch; |
749 | int cpp = 2; | |
750 | int i; | |
751 | RING_LOCALS; | |
752 | ||
753 | DRM_DEBUG("swapbuffers\n"); | |
754 | ||
b5e89ed5 | 755 | i810_kernel_lost_context(dev); |
1da177e4 | 756 | |
b5e89ed5 DA |
757 | if (nbox > I810_NR_SAREA_CLIPRECTS) |
758 | nbox = I810_NR_SAREA_CLIPRECTS; | |
1da177e4 | 759 | |
b5e89ed5 | 760 | for (i = 0; i < nbox; i++, pbox++) { |
1da177e4 LT |
761 | unsigned int w = pbox->x2 - pbox->x1; |
762 | unsigned int h = pbox->y2 - pbox->y1; | |
b5e89ed5 | 763 | unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch; |
1da177e4 LT |
764 | unsigned int start = dst; |
765 | ||
766 | if (pbox->x1 > pbox->x2 || | |
767 | pbox->y1 > pbox->y2 || | |
b5e89ed5 | 768 | pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h) |
1da177e4 LT |
769 | continue; |
770 | ||
b5e89ed5 DA |
771 | BEGIN_LP_RING(6); |
772 | OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4); | |
773 | OUT_RING(pitch | (0xCC << 16)); | |
774 | OUT_RING((h << 16) | (w * cpp)); | |
1da177e4 | 775 | if (dev_priv->current_page == 0) |
b5e89ed5 | 776 | OUT_RING(dev_priv->front_offset + start); |
1da177e4 | 777 | else |
b5e89ed5 DA |
778 | OUT_RING(dev_priv->back_offset + start); |
779 | OUT_RING(pitch); | |
1da177e4 | 780 | if (dev_priv->current_page == 0) |
b5e89ed5 | 781 | OUT_RING(dev_priv->back_offset + start); |
1da177e4 | 782 | else |
b5e89ed5 | 783 | OUT_RING(dev_priv->front_offset + start); |
1da177e4 LT |
784 | ADVANCE_LP_RING(); |
785 | } | |
786 | } | |
787 | ||
eddca551 | 788 | static void i810_dma_dispatch_vertex(struct drm_device * dev, |
056219e2 | 789 | struct drm_buf * buf, int discard, int used) |
1da177e4 | 790 | { |
b5e89ed5 | 791 | drm_i810_private_t *dev_priv = dev->dev_private; |
1da177e4 | 792 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
b5e89ed5 | 793 | drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; |
eddca551 | 794 | struct drm_clip_rect *box = sarea_priv->boxes; |
b5e89ed5 | 795 | int nbox = sarea_priv->nbox; |
1da177e4 LT |
796 | unsigned long address = (unsigned long)buf->bus_address; |
797 | unsigned long start = address - dev->agp->base; | |
798 | int i = 0; | |
b5e89ed5 | 799 | RING_LOCALS; |
1da177e4 | 800 | |
b5e89ed5 | 801 | i810_kernel_lost_context(dev); |
1da177e4 | 802 | |
b5e89ed5 | 803 | if (nbox > I810_NR_SAREA_CLIPRECTS) |
1da177e4 LT |
804 | nbox = I810_NR_SAREA_CLIPRECTS; |
805 | ||
b5e89ed5 | 806 | if (used > 4 * 1024) |
1da177e4 LT |
807 | used = 0; |
808 | ||
809 | if (sarea_priv->dirty) | |
b5e89ed5 | 810 | i810EmitState(dev); |
1da177e4 LT |
811 | |
812 | if (buf_priv->currently_mapped == I810_BUF_MAPPED) { | |
813 | unsigned int prim = (sarea_priv->vertex_prim & PR_MASK); | |
814 | ||
b5e89ed5 DA |
815 | *(u32 *) buf_priv->kernel_virtual = |
816 | ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2))); | |
1da177e4 LT |
817 | |
818 | if (used & 4) { | |
c7aed179 | 819 | *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0; |
1da177e4 LT |
820 | used += 4; |
821 | } | |
822 | ||
823 | i810_unmap_buffer(buf); | |
824 | } | |
825 | ||
826 | if (used) { | |
827 | do { | |
828 | if (i < nbox) { | |
829 | BEGIN_LP_RING(4); | |
b5e89ed5 DA |
830 | OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR | |
831 | SC_ENABLE); | |
832 | OUT_RING(GFX_OP_SCISSOR_INFO); | |
833 | OUT_RING(box[i].x1 | (box[i].y1 << 16)); | |
834 | OUT_RING((box[i].x2 - | |
835 | 1) | ((box[i].y2 - 1) << 16)); | |
1da177e4 LT |
836 | ADVANCE_LP_RING(); |
837 | } | |
838 | ||
839 | BEGIN_LP_RING(4); | |
b5e89ed5 DA |
840 | OUT_RING(CMD_OP_BATCH_BUFFER); |
841 | OUT_RING(start | BB1_PROTECTED); | |
842 | OUT_RING(start + used - 4); | |
843 | OUT_RING(0); | |
1da177e4 LT |
844 | ADVANCE_LP_RING(); |
845 | ||
846 | } while (++i < nbox); | |
847 | } | |
848 | ||
849 | if (discard) { | |
850 | dev_priv->counter++; | |
851 | ||
b5e89ed5 DA |
852 | (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, |
853 | I810_BUF_HARDWARE); | |
1da177e4 LT |
854 | |
855 | BEGIN_LP_RING(8); | |
b5e89ed5 DA |
856 | OUT_RING(CMD_STORE_DWORD_IDX); |
857 | OUT_RING(20); | |
858 | OUT_RING(dev_priv->counter); | |
859 | OUT_RING(CMD_STORE_DWORD_IDX); | |
860 | OUT_RING(buf_priv->my_use_idx); | |
861 | OUT_RING(I810_BUF_FREE); | |
862 | OUT_RING(CMD_REPORT_HEAD); | |
863 | OUT_RING(0); | |
1da177e4 LT |
864 | ADVANCE_LP_RING(); |
865 | } | |
866 | } | |
867 | ||
eddca551 | 868 | static void i810_dma_dispatch_flip(struct drm_device * dev) |
1da177e4 | 869 | { |
b5e89ed5 | 870 | drm_i810_private_t *dev_priv = dev->dev_private; |
1da177e4 LT |
871 | int pitch = dev_priv->pitch; |
872 | RING_LOCALS; | |
873 | ||
b5e89ed5 DA |
874 | DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n", |
875 | __FUNCTION__, | |
876 | dev_priv->current_page, | |
877 | dev_priv->sarea_priv->pf_current_page); | |
878 | ||
879 | i810_kernel_lost_context(dev); | |
1da177e4 | 880 | |
b5e89ed5 DA |
881 | BEGIN_LP_RING(2); |
882 | OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); | |
883 | OUT_RING(0); | |
1da177e4 LT |
884 | ADVANCE_LP_RING(); |
885 | ||
b5e89ed5 | 886 | BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2); |
1da177e4 LT |
887 | /* On i815 at least ASYNC is buggy */ |
888 | /* pitch<<5 is from 11.2.8 p158, | |
889 | its the pitch / 8 then left shifted 8, | |
890 | so (pitch >> 3) << 8 */ | |
b5e89ed5 DA |
891 | OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ ); |
892 | if (dev_priv->current_page == 0) { | |
893 | OUT_RING(dev_priv->back_offset); | |
1da177e4 LT |
894 | dev_priv->current_page = 1; |
895 | } else { | |
b5e89ed5 | 896 | OUT_RING(dev_priv->front_offset); |
1da177e4 LT |
897 | dev_priv->current_page = 0; |
898 | } | |
899 | OUT_RING(0); | |
900 | ADVANCE_LP_RING(); | |
901 | ||
902 | BEGIN_LP_RING(2); | |
b5e89ed5 DA |
903 | OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP); |
904 | OUT_RING(0); | |
1da177e4 LT |
905 | ADVANCE_LP_RING(); |
906 | ||
907 | /* Increment the frame counter. The client-side 3D driver must | |
908 | * throttle the framerate by waiting for this value before | |
909 | * performing the swapbuffer ioctl. | |
910 | */ | |
911 | dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; | |
912 | ||
913 | } | |
914 | ||
eddca551 | 915 | static void i810_dma_quiescent(struct drm_device * dev) |
1da177e4 | 916 | { |
b5e89ed5 DA |
917 | drm_i810_private_t *dev_priv = dev->dev_private; |
918 | RING_LOCALS; | |
1da177e4 LT |
919 | |
920 | /* printk("%s\n", __FUNCTION__); */ | |
921 | ||
b5e89ed5 | 922 | i810_kernel_lost_context(dev); |
1da177e4 | 923 | |
b5e89ed5 DA |
924 | BEGIN_LP_RING(4); |
925 | OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); | |
926 | OUT_RING(CMD_REPORT_HEAD); | |
927 | OUT_RING(0); | |
928 | OUT_RING(0); | |
929 | ADVANCE_LP_RING(); | |
1da177e4 | 930 | |
b5e89ed5 | 931 | i810_wait_ring(dev, dev_priv->ring.Size - 8); |
1da177e4 LT |
932 | } |
933 | ||
eddca551 | 934 | static int i810_flush_queue(struct drm_device * dev) |
1da177e4 | 935 | { |
b5e89ed5 | 936 | drm_i810_private_t *dev_priv = dev->dev_private; |
cdd55a29 | 937 | struct drm_device_dma *dma = dev->dma; |
b5e89ed5 DA |
938 | int i, ret = 0; |
939 | RING_LOCALS; | |
940 | ||
1da177e4 LT |
941 | /* printk("%s\n", __FUNCTION__); */ |
942 | ||
b5e89ed5 | 943 | i810_kernel_lost_context(dev); |
1da177e4 | 944 | |
b5e89ed5 DA |
945 | BEGIN_LP_RING(2); |
946 | OUT_RING(CMD_REPORT_HEAD); | |
947 | OUT_RING(0); | |
948 | ADVANCE_LP_RING(); | |
1da177e4 | 949 | |
b5e89ed5 | 950 | i810_wait_ring(dev, dev_priv->ring.Size - 8); |
1da177e4 | 951 | |
b5e89ed5 | 952 | for (i = 0; i < dma->buf_count; i++) { |
056219e2 | 953 | struct drm_buf *buf = dma->buflist[i]; |
b5e89ed5 | 954 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
1da177e4 LT |
955 | |
956 | int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE, | |
957 | I810_BUF_FREE); | |
958 | ||
959 | if (used == I810_BUF_HARDWARE) | |
960 | DRM_DEBUG("reclaimed from HARDWARE\n"); | |
961 | if (used == I810_BUF_CLIENT) | |
962 | DRM_DEBUG("still on client\n"); | |
963 | } | |
964 | ||
b5e89ed5 | 965 | return ret; |
1da177e4 LT |
966 | } |
967 | ||
968 | /* Must be called with the lock held */ | |
6c340eac EA |
969 | static void i810_reclaim_buffers(struct drm_device * dev, |
970 | struct drm_file *file_priv) | |
1da177e4 | 971 | { |
cdd55a29 | 972 | struct drm_device_dma *dma = dev->dma; |
b5e89ed5 | 973 | int i; |
1da177e4 | 974 | |
b5e89ed5 DA |
975 | if (!dma) |
976 | return; | |
977 | if (!dev->dev_private) | |
978 | return; | |
979 | if (!dma->buflist) | |
980 | return; | |
1da177e4 | 981 | |
b5e89ed5 | 982 | i810_flush_queue(dev); |
1da177e4 LT |
983 | |
984 | for (i = 0; i < dma->buf_count; i++) { | |
056219e2 | 985 | struct drm_buf *buf = dma->buflist[i]; |
b5e89ed5 | 986 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; |
1da177e4 | 987 | |
6c340eac | 988 | if (buf->file_priv == file_priv && buf_priv) { |
1da177e4 LT |
989 | int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, |
990 | I810_BUF_FREE); | |
991 | ||
992 | if (used == I810_BUF_CLIENT) | |
993 | DRM_DEBUG("reclaimed from client\n"); | |
994 | if (buf_priv->currently_mapped == I810_BUF_MAPPED) | |
b5e89ed5 | 995 | buf_priv->currently_mapped = I810_BUF_UNMAPPED; |
1da177e4 LT |
996 | } |
997 | } | |
998 | } | |
999 | ||
6c340eac | 1000 | static int i810_flush_ioctl(struct inode *inode, struct drm_file *file_priv, |
c94f7029 | 1001 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1002 | { |
6c340eac | 1003 | struct drm_device *dev = file_priv->head->dev; |
1da177e4 | 1004 | |
6c340eac | 1005 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 | 1006 | |
b5e89ed5 DA |
1007 | i810_flush_queue(dev); |
1008 | return 0; | |
1da177e4 LT |
1009 | } |
1010 | ||
6c340eac | 1011 | static int i810_dma_vertex(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 1012 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1013 | { |
6c340eac | 1014 | struct drm_device *dev = file_priv->head->dev; |
cdd55a29 | 1015 | struct drm_device_dma *dma = dev->dma; |
b5e89ed5 DA |
1016 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; |
1017 | u32 *hw_status = dev_priv->hw_status_page; | |
1018 | drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) | |
1019 | dev_priv->sarea_priv; | |
1da177e4 LT |
1020 | drm_i810_vertex_t vertex; |
1021 | ||
b5e89ed5 DA |
1022 | if (copy_from_user |
1023 | (&vertex, (drm_i810_vertex_t __user *) arg, sizeof(vertex))) | |
1da177e4 LT |
1024 | return -EFAULT; |
1025 | ||
6c340eac | 1026 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 LT |
1027 | |
1028 | DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n", | |
1029 | vertex.idx, vertex.used, vertex.discard); | |
1030 | ||
b5e89ed5 | 1031 | if (vertex.idx < 0 || vertex.idx > dma->buf_count) |
1da177e4 LT |
1032 | return -EINVAL; |
1033 | ||
b5e89ed5 DA |
1034 | i810_dma_dispatch_vertex(dev, |
1035 | dma->buflist[vertex.idx], | |
1036 | vertex.discard, vertex.used); | |
1da177e4 | 1037 | |
b5e89ed5 | 1038 | atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]); |
1da177e4 | 1039 | atomic_inc(&dev->counts[_DRM_STAT_DMA]); |
b5e89ed5 DA |
1040 | sarea_priv->last_enqueue = dev_priv->counter - 1; |
1041 | sarea_priv->last_dispatch = (int)hw_status[5]; | |
1da177e4 LT |
1042 | |
1043 | return 0; | |
1044 | } | |
1045 | ||
6c340eac | 1046 | static int i810_clear_bufs(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 1047 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1048 | { |
6c340eac | 1049 | struct drm_device *dev = file_priv->head->dev; |
1da177e4 LT |
1050 | drm_i810_clear_t clear; |
1051 | ||
b5e89ed5 DA |
1052 | if (copy_from_user |
1053 | (&clear, (drm_i810_clear_t __user *) arg, sizeof(clear))) | |
1da177e4 LT |
1054 | return -EFAULT; |
1055 | ||
6c340eac | 1056 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 | 1057 | |
b5e89ed5 DA |
1058 | /* GH: Someone's doing nasty things... */ |
1059 | if (!dev->dev_private) { | |
1060 | return -EINVAL; | |
1061 | } | |
1da177e4 | 1062 | |
b5e89ed5 DA |
1063 | i810_dma_dispatch_clear(dev, clear.flags, |
1064 | clear.clear_color, clear.clear_depth); | |
1065 | return 0; | |
1da177e4 LT |
1066 | } |
1067 | ||
6c340eac | 1068 | static int i810_swap_bufs(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 1069 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1070 | { |
6c340eac | 1071 | struct drm_device *dev = file_priv->head->dev; |
1da177e4 LT |
1072 | |
1073 | DRM_DEBUG("i810_swap_bufs\n"); | |
1074 | ||
6c340eac | 1075 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 | 1076 | |
b5e89ed5 DA |
1077 | i810_dma_dispatch_swap(dev); |
1078 | return 0; | |
1da177e4 LT |
1079 | } |
1080 | ||
6c340eac EA |
1081 | static int i810_getage(struct inode *inode, struct drm_file *file_priv, |
1082 | unsigned int cmd, | |
b5e89ed5 | 1083 | unsigned long arg) |
1da177e4 | 1084 | { |
6c340eac | 1085 | struct drm_device *dev = file_priv->head->dev; |
b5e89ed5 DA |
1086 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; |
1087 | u32 *hw_status = dev_priv->hw_status_page; | |
1088 | drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) | |
1089 | dev_priv->sarea_priv; | |
1090 | ||
1091 | sarea_priv->last_dispatch = (int)hw_status[5]; | |
1da177e4 LT |
1092 | return 0; |
1093 | } | |
1094 | ||
6c340eac EA |
1095 | static int i810_getbuf(struct inode *inode, struct drm_file *file_priv, |
1096 | unsigned int cmd, unsigned long arg) | |
1da177e4 | 1097 | { |
6c340eac | 1098 | struct drm_device *dev = file_priv->head->dev; |
b5e89ed5 DA |
1099 | int retcode = 0; |
1100 | drm_i810_dma_t d; | |
1101 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; | |
1102 | u32 *hw_status = dev_priv->hw_status_page; | |
1103 | drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) | |
1104 | dev_priv->sarea_priv; | |
1105 | ||
1106 | if (copy_from_user(&d, (drm_i810_dma_t __user *) arg, sizeof(d))) | |
1da177e4 LT |
1107 | return -EFAULT; |
1108 | ||
6c340eac | 1109 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 LT |
1110 | |
1111 | d.granted = 0; | |
1112 | ||
6c340eac | 1113 | retcode = i810_dma_get_buffer(dev, &d, file_priv); |
1da177e4 LT |
1114 | |
1115 | DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n", | |
1116 | current->pid, retcode, d.granted); | |
1117 | ||
eddca551 | 1118 | if (copy_to_user((void __user *) arg, &d, sizeof(d))) |
1da177e4 | 1119 | return -EFAULT; |
b5e89ed5 | 1120 | sarea_priv->last_dispatch = (int)hw_status[5]; |
1da177e4 LT |
1121 | |
1122 | return retcode; | |
1123 | } | |
1124 | ||
6c340eac EA |
1125 | static int i810_copybuf(struct inode *inode, struct drm_file *file_priv, |
1126 | unsigned int cmd, unsigned long arg) | |
1da177e4 LT |
1127 | { |
1128 | /* Never copy - 2.4.x doesn't need it */ | |
1129 | return 0; | |
1130 | } | |
1131 | ||
6c340eac EA |
1132 | static int i810_docopy(struct inode *inode, struct drm_file *file_priv, |
1133 | unsigned int cmd, unsigned long arg) | |
1da177e4 LT |
1134 | { |
1135 | /* Never copy - 2.4.x doesn't need it */ | |
1136 | return 0; | |
1137 | } | |
1138 | ||
056219e2 | 1139 | static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used, |
b5e89ed5 | 1140 | unsigned int last_render) |
1da177e4 LT |
1141 | { |
1142 | drm_i810_private_t *dev_priv = dev->dev_private; | |
1143 | drm_i810_buf_priv_t *buf_priv = buf->dev_private; | |
1144 | drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; | |
1145 | unsigned long address = (unsigned long)buf->bus_address; | |
1146 | unsigned long start = address - dev->agp->base; | |
1147 | int u; | |
1148 | RING_LOCALS; | |
1149 | ||
1150 | i810_kernel_lost_context(dev); | |
1151 | ||
b5e89ed5 | 1152 | u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE); |
1da177e4 LT |
1153 | if (u != I810_BUF_CLIENT) { |
1154 | DRM_DEBUG("MC found buffer that isn't mine!\n"); | |
1155 | } | |
1156 | ||
b5e89ed5 | 1157 | if (used > 4 * 1024) |
1da177e4 LT |
1158 | used = 0; |
1159 | ||
1160 | sarea_priv->dirty = 0x7f; | |
1161 | ||
b5e89ed5 | 1162 | DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", address, used); |
1da177e4 LT |
1163 | |
1164 | dev_priv->counter++; | |
1165 | DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter); | |
1166 | DRM_DEBUG("i810_dma_dispatch_mc\n"); | |
1167 | DRM_DEBUG("start : %lx\n", start); | |
1168 | DRM_DEBUG("used : %d\n", used); | |
1169 | DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4); | |
1170 | ||
1171 | if (buf_priv->currently_mapped == I810_BUF_MAPPED) { | |
1172 | if (used & 4) { | |
c7aed179 | 1173 | *(u32 *) ((char *) buf_priv->virtual + used) = 0; |
1da177e4 LT |
1174 | used += 4; |
1175 | } | |
1176 | ||
1177 | i810_unmap_buffer(buf); | |
1178 | } | |
1179 | BEGIN_LP_RING(4); | |
b5e89ed5 DA |
1180 | OUT_RING(CMD_OP_BATCH_BUFFER); |
1181 | OUT_RING(start | BB1_PROTECTED); | |
1182 | OUT_RING(start + used - 4); | |
1183 | OUT_RING(0); | |
1da177e4 LT |
1184 | ADVANCE_LP_RING(); |
1185 | ||
1da177e4 | 1186 | BEGIN_LP_RING(8); |
b5e89ed5 DA |
1187 | OUT_RING(CMD_STORE_DWORD_IDX); |
1188 | OUT_RING(buf_priv->my_use_idx); | |
1189 | OUT_RING(I810_BUF_FREE); | |
1190 | OUT_RING(0); | |
1191 | ||
1192 | OUT_RING(CMD_STORE_DWORD_IDX); | |
1193 | OUT_RING(16); | |
1194 | OUT_RING(last_render); | |
1195 | OUT_RING(0); | |
1da177e4 LT |
1196 | ADVANCE_LP_RING(); |
1197 | } | |
1198 | ||
6c340eac | 1199 | static int i810_dma_mc(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 1200 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1201 | { |
6c340eac | 1202 | struct drm_device *dev = file_priv->head->dev; |
cdd55a29 | 1203 | struct drm_device_dma *dma = dev->dma; |
b5e89ed5 | 1204 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; |
1da177e4 LT |
1205 | u32 *hw_status = dev_priv->hw_status_page; |
1206 | drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) | |
b5e89ed5 | 1207 | dev_priv->sarea_priv; |
1da177e4 LT |
1208 | drm_i810_mc_t mc; |
1209 | ||
b5e89ed5 | 1210 | if (copy_from_user(&mc, (drm_i810_mc_t __user *) arg, sizeof(mc))) |
1da177e4 LT |
1211 | return -EFAULT; |
1212 | ||
6c340eac | 1213 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 LT |
1214 | |
1215 | if (mc.idx >= dma->buf_count || mc.idx < 0) | |
1216 | return -EINVAL; | |
1217 | ||
1218 | i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used, | |
b5e89ed5 | 1219 | mc.last_render); |
1da177e4 LT |
1220 | |
1221 | atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]); | |
1222 | atomic_inc(&dev->counts[_DRM_STAT_DMA]); | |
b5e89ed5 DA |
1223 | sarea_priv->last_enqueue = dev_priv->counter - 1; |
1224 | sarea_priv->last_dispatch = (int)hw_status[5]; | |
1da177e4 LT |
1225 | |
1226 | return 0; | |
1227 | } | |
1228 | ||
6c340eac | 1229 | static int i810_rstatus(struct inode *inode, struct drm_file *file_priv, |
1da177e4 LT |
1230 | unsigned int cmd, unsigned long arg) |
1231 | { | |
6c340eac | 1232 | struct drm_device *dev = file_priv->head->dev; |
b5e89ed5 | 1233 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; |
1da177e4 | 1234 | |
b5e89ed5 | 1235 | return (int)(((u32 *) (dev_priv->hw_status_page))[4]); |
1da177e4 LT |
1236 | } |
1237 | ||
6c340eac | 1238 | static int i810_ov0_info(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 1239 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1240 | { |
6c340eac | 1241 | struct drm_device *dev = file_priv->head->dev; |
b5e89ed5 | 1242 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; |
1da177e4 LT |
1243 | drm_i810_overlay_t data; |
1244 | ||
1245 | data.offset = dev_priv->overlay_offset; | |
1246 | data.physical = dev_priv->overlay_physical; | |
b5e89ed5 DA |
1247 | if (copy_to_user |
1248 | ((drm_i810_overlay_t __user *) arg, &data, sizeof(data))) | |
1da177e4 LT |
1249 | return -EFAULT; |
1250 | return 0; | |
1251 | } | |
1252 | ||
6c340eac | 1253 | static int i810_fstatus(struct inode *inode, struct drm_file *file_priv, |
1da177e4 LT |
1254 | unsigned int cmd, unsigned long arg) |
1255 | { | |
6c340eac | 1256 | struct drm_device *dev = file_priv->head->dev; |
b5e89ed5 | 1257 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; |
1da177e4 | 1258 | |
6c340eac | 1259 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 LT |
1260 | |
1261 | return I810_READ(0x30008); | |
1262 | } | |
1263 | ||
6c340eac | 1264 | static int i810_ov0_flip(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 1265 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1266 | { |
6c340eac | 1267 | struct drm_device *dev = file_priv->head->dev; |
b5e89ed5 | 1268 | drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private; |
1da177e4 | 1269 | |
6c340eac | 1270 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 LT |
1271 | |
1272 | //Tell the overlay to update | |
b5e89ed5 | 1273 | I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000); |
1da177e4 LT |
1274 | |
1275 | return 0; | |
1276 | } | |
1277 | ||
1da177e4 | 1278 | /* Not sure why this isn't set all the time: |
b5e89ed5 | 1279 | */ |
eddca551 | 1280 | static void i810_do_init_pageflip(struct drm_device * dev) |
1da177e4 LT |
1281 | { |
1282 | drm_i810_private_t *dev_priv = dev->dev_private; | |
b5e89ed5 | 1283 | |
1da177e4 LT |
1284 | DRM_DEBUG("%s\n", __FUNCTION__); |
1285 | dev_priv->page_flipping = 1; | |
1286 | dev_priv->current_page = 0; | |
1287 | dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; | |
1288 | } | |
1289 | ||
eddca551 | 1290 | static int i810_do_cleanup_pageflip(struct drm_device * dev) |
1da177e4 LT |
1291 | { |
1292 | drm_i810_private_t *dev_priv = dev->dev_private; | |
1293 | ||
1294 | DRM_DEBUG("%s\n", __FUNCTION__); | |
1295 | if (dev_priv->current_page != 0) | |
b5e89ed5 | 1296 | i810_dma_dispatch_flip(dev); |
1da177e4 LT |
1297 | |
1298 | dev_priv->page_flipping = 0; | |
1299 | return 0; | |
1300 | } | |
1301 | ||
6c340eac | 1302 | static int i810_flip_bufs(struct inode *inode, struct drm_file *file_priv, |
b5e89ed5 | 1303 | unsigned int cmd, unsigned long arg) |
1da177e4 | 1304 | { |
6c340eac | 1305 | struct drm_device *dev = file_priv->head->dev; |
1da177e4 LT |
1306 | drm_i810_private_t *dev_priv = dev->dev_private; |
1307 | ||
1308 | DRM_DEBUG("%s\n", __FUNCTION__); | |
1309 | ||
6c340eac | 1310 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 | 1311 | |
b5e89ed5 DA |
1312 | if (!dev_priv->page_flipping) |
1313 | i810_do_init_pageflip(dev); | |
1da177e4 | 1314 | |
b5e89ed5 DA |
1315 | i810_dma_dispatch_flip(dev); |
1316 | return 0; | |
1da177e4 LT |
1317 | } |
1318 | ||
eddca551 | 1319 | int i810_driver_load(struct drm_device *dev, unsigned long flags) |
22eae947 DA |
1320 | { |
1321 | /* i810 has 4 more counters */ | |
1322 | dev->counters += 4; | |
1323 | dev->types[6] = _DRM_STAT_IRQ; | |
1324 | dev->types[7] = _DRM_STAT_PRIMARY; | |
1325 | dev->types[8] = _DRM_STAT_SECONDARY; | |
1326 | dev->types[9] = _DRM_STAT_DMA; | |
1327 | ||
1328 | return 0; | |
1329 | } | |
1330 | ||
eddca551 | 1331 | void i810_driver_lastclose(struct drm_device * dev) |
1da177e4 | 1332 | { |
b5e89ed5 | 1333 | i810_dma_cleanup(dev); |
1da177e4 LT |
1334 | } |
1335 | ||
6c340eac | 1336 | void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) |
1da177e4 LT |
1337 | { |
1338 | if (dev->dev_private) { | |
1339 | drm_i810_private_t *dev_priv = dev->dev_private; | |
1340 | if (dev_priv->page_flipping) { | |
1341 | i810_do_cleanup_pageflip(dev); | |
1342 | } | |
1343 | } | |
1344 | } | |
1345 | ||
6c340eac EA |
1346 | void i810_driver_reclaim_buffers_locked(struct drm_device * dev, |
1347 | struct drm_file *file_priv) | |
1da177e4 | 1348 | { |
6c340eac | 1349 | i810_reclaim_buffers(dev, file_priv); |
1da177e4 LT |
1350 | } |
1351 | ||
eddca551 | 1352 | int i810_driver_dma_quiescent(struct drm_device * dev) |
1da177e4 | 1353 | { |
b5e89ed5 | 1354 | i810_dma_quiescent(dev); |
1da177e4 LT |
1355 | return 0; |
1356 | } | |
1357 | ||
1358 | drm_ioctl_desc_t i810_ioctls[] = { | |
a7a2cc31 DA |
1359 | [DRM_IOCTL_NR(DRM_I810_INIT)] = {i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY}, |
1360 | [DRM_IOCTL_NR(DRM_I810_VERTEX)] = {i810_dma_vertex, DRM_AUTH}, | |
1361 | [DRM_IOCTL_NR(DRM_I810_CLEAR)] = {i810_clear_bufs, DRM_AUTH}, | |
1362 | [DRM_IOCTL_NR(DRM_I810_FLUSH)] = {i810_flush_ioctl, DRM_AUTH}, | |
1363 | [DRM_IOCTL_NR(DRM_I810_GETAGE)] = {i810_getage, DRM_AUTH}, | |
1364 | [DRM_IOCTL_NR(DRM_I810_GETBUF)] = {i810_getbuf, DRM_AUTH}, | |
1365 | [DRM_IOCTL_NR(DRM_I810_SWAP)] = {i810_swap_bufs, DRM_AUTH}, | |
1366 | [DRM_IOCTL_NR(DRM_I810_COPY)] = {i810_copybuf, DRM_AUTH}, | |
1367 | [DRM_IOCTL_NR(DRM_I810_DOCOPY)] = {i810_docopy, DRM_AUTH}, | |
1368 | [DRM_IOCTL_NR(DRM_I810_OV0INFO)] = {i810_ov0_info, DRM_AUTH}, | |
1369 | [DRM_IOCTL_NR(DRM_I810_FSTATUS)] = {i810_fstatus, DRM_AUTH}, | |
1370 | [DRM_IOCTL_NR(DRM_I810_OV0FLIP)] = {i810_ov0_flip, DRM_AUTH}, | |
1371 | [DRM_IOCTL_NR(DRM_I810_MC)] = {i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY}, | |
1372 | [DRM_IOCTL_NR(DRM_I810_RSTATUS)] = {i810_rstatus, DRM_AUTH}, | |
1373 | [DRM_IOCTL_NR(DRM_I810_FLIP)] = {i810_flip_bufs, DRM_AUTH} | |
1da177e4 LT |
1374 | }; |
1375 | ||
1376 | int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls); | |
cda17380 DA |
1377 | |
1378 | /** | |
1379 | * Determine if the device really is AGP or not. | |
1380 | * | |
1381 | * All Intel graphics chipsets are treated as AGP, even if they are really | |
1382 | * PCI-e. | |
1383 | * | |
1384 | * \param dev The device to be tested. | |
1385 | * | |
1386 | * \returns | |
1387 | * A value of 1 is always retured to indictate every i810 is AGP. | |
1388 | */ | |
eddca551 | 1389 | int i810_driver_device_is_agp(struct drm_device * dev) |
cda17380 DA |
1390 | { |
1391 | return 1; | |
1392 | } |