Commit | Line | Data |
---|---|---|
0d6aa60b | 1 | /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*- |
1da177e4 | 2 | */ |
0d6aa60b | 3 | /* |
1da177e4 LT |
4 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
5 | * All Rights Reserved. | |
bc54fd1a DA |
6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining a | |
8 | * copy of this software and associated documentation files (the | |
9 | * "Software"), to deal in the Software without restriction, including | |
10 | * without limitation the rights to use, copy, modify, merge, publish, | |
11 | * distribute, sub license, and/or sell copies of the Software, and to | |
12 | * permit persons to whom the Software is furnished to do so, subject to | |
13 | * the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice (including the | |
16 | * next paragraph) shall be included in all copies or substantial portions | |
17 | * of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS | |
20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. | |
22 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR | |
23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, | |
24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE | |
25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
26 | * | |
0d6aa60b | 27 | */ |
1da177e4 LT |
28 | |
29 | #include "drmP.h" | |
30 | #include "drm.h" | |
31 | #include "i915_drm.h" | |
32 | #include "i915_drv.h" | |
33 | ||
0d6aa60b DA |
34 | #define USER_INT_FLAG (1<<1) |
35 | #define VSYNC_PIPEB_FLAG (1<<5) | |
36 | #define VSYNC_PIPEA_FLAG (1<<7) | |
37 | ||
1da177e4 | 38 | #define MAX_NOPID ((u32)~0) |
1da177e4 | 39 | |
a6b54f3f MCA |
40 | /** |
41 | * Emit blits for scheduled buffer swaps. | |
42 | * | |
43 | * This function will be called with the HW lock held. | |
44 | */ | |
45 | static void i915_vblank_tasklet(drm_device_t *dev) | |
46 | { | |
47 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
48 | unsigned int irqflags; | |
49 | struct list_head *list, *tmp; | |
50 | ||
51 | DRM_DEBUG("\n"); | |
52 | ||
53 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); | |
54 | ||
55 | list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) { | |
56 | drm_i915_vbl_swap_t *vbl_swap = | |
57 | list_entry(list, drm_i915_vbl_swap_t, head); | |
58 | atomic_t *counter = vbl_swap->pipe ? &dev->vbl_received2 : | |
59 | &dev->vbl_received; | |
60 | ||
61 | if ((atomic_read(counter) - vbl_swap->sequence) <= (1<<23)) { | |
62 | drm_drawable_info_t *drw; | |
63 | ||
64 | spin_unlock(&dev_priv->swaps_lock); | |
65 | ||
66 | spin_lock(&dev->drw_lock); | |
67 | ||
68 | drw = drm_get_drawable_info(dev, vbl_swap->drw_id); | |
69 | ||
70 | if (drw) { | |
71 | int i, num_rects = drw->num_rects; | |
72 | drm_clip_rect_t *rect = drw->rects; | |
73 | drm_i915_sarea_t *sarea_priv = | |
74 | dev_priv->sarea_priv; | |
75 | u32 cpp = dev_priv->cpp; | |
76 | u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD | | |
77 | XY_SRC_COPY_BLT_WRITE_ALPHA | | |
78 | XY_SRC_COPY_BLT_WRITE_RGB) | |
79 | : XY_SRC_COPY_BLT_CMD; | |
80 | u32 pitchropcpp = (sarea_priv->pitch * cpp) | | |
81 | (0xcc << 16) | (cpp << 23) | | |
82 | (1 << 24); | |
83 | RING_LOCALS; | |
84 | ||
85 | i915_kernel_lost_context(dev); | |
86 | ||
87 | BEGIN_LP_RING(6); | |
88 | ||
89 | OUT_RING(GFX_OP_DRAWRECT_INFO); | |
90 | OUT_RING(0); | |
91 | OUT_RING(0); | |
92 | OUT_RING(sarea_priv->width | | |
93 | sarea_priv->height << 16); | |
94 | OUT_RING(sarea_priv->width | | |
95 | sarea_priv->height << 16); | |
96 | OUT_RING(0); | |
97 | ||
98 | ADVANCE_LP_RING(); | |
99 | ||
100 | sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT; | |
101 | ||
102 | for (i = 0; i < num_rects; i++, rect++) { | |
103 | BEGIN_LP_RING(8); | |
104 | ||
105 | OUT_RING(cmd); | |
106 | OUT_RING(pitchropcpp); | |
107 | OUT_RING((rect->y1 << 16) | rect->x1); | |
108 | OUT_RING((rect->y2 << 16) | rect->x2); | |
109 | OUT_RING(sarea_priv->front_offset); | |
110 | OUT_RING((rect->y1 << 16) | rect->x1); | |
111 | OUT_RING(pitchropcpp & 0xffff); | |
112 | OUT_RING(sarea_priv->back_offset); | |
113 | ||
114 | ADVANCE_LP_RING(); | |
115 | } | |
116 | } | |
117 | ||
118 | spin_unlock(&dev->drw_lock); | |
119 | ||
120 | spin_lock(&dev_priv->swaps_lock); | |
121 | ||
122 | list_del(list); | |
123 | ||
124 | drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER); | |
125 | ||
126 | dev_priv->swaps_pending--; | |
127 | } | |
128 | } | |
129 | ||
130 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
131 | } | |
132 | ||
1da177e4 LT |
133 | irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) |
134 | { | |
135 | drm_device_t *dev = (drm_device_t *) arg; | |
136 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
137 | u16 temp; | |
138 | ||
139 | temp = I915_READ16(I915REG_INT_IDENTITY_R); | |
702880f2 DA |
140 | |
141 | temp &= (USER_INT_FLAG | VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG); | |
1da177e4 LT |
142 | |
143 | DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp); | |
144 | ||
145 | if (temp == 0) | |
146 | return IRQ_NONE; | |
147 | ||
148 | I915_WRITE16(I915REG_INT_IDENTITY_R, temp); | |
0d6aa60b | 149 | |
6e5fca53 DA |
150 | dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
151 | ||
0d6aa60b DA |
152 | if (temp & USER_INT_FLAG) |
153 | DRM_WAKEUP(&dev_priv->irq_queue); | |
154 | ||
702880f2 | 155 | if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) { |
68815bad MCA |
156 | if ((dev_priv->vblank_pipe & |
157 | (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) | |
158 | == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) { | |
159 | if (temp & VSYNC_PIPEA_FLAG) | |
160 | atomic_inc(&dev->vbl_received); | |
161 | if (temp & VSYNC_PIPEB_FLAG) | |
162 | atomic_inc(&dev->vbl_received2); | |
163 | } else | |
164 | atomic_inc(&dev->vbl_received); | |
165 | ||
0d6aa60b DA |
166 | DRM_WAKEUP(&dev->vbl_queue); |
167 | drm_vbl_send_signals(dev); | |
a6b54f3f MCA |
168 | |
169 | drm_locked_tasklet(dev, i915_vblank_tasklet); | |
0d6aa60b | 170 | } |
1da177e4 LT |
171 | |
172 | return IRQ_HANDLED; | |
173 | } | |
174 | ||
c94f7029 | 175 | static int i915_emit_irq(drm_device_t * dev) |
1da177e4 LT |
176 | { |
177 | drm_i915_private_t *dev_priv = dev->dev_private; | |
1da177e4 LT |
178 | RING_LOCALS; |
179 | ||
180 | i915_kernel_lost_context(dev); | |
181 | ||
182 | DRM_DEBUG("%s\n", __FUNCTION__); | |
183 | ||
c29b669c | 184 | dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter; |
1da177e4 | 185 | |
c29b669c AH |
186 | if (dev_priv->counter > 0x7FFFFFFFUL) |
187 | dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1; | |
188 | ||
189 | BEGIN_LP_RING(6); | |
190 | OUT_RING(CMD_STORE_DWORD_IDX); | |
191 | OUT_RING(20); | |
192 | OUT_RING(dev_priv->counter); | |
193 | OUT_RING(0); | |
1da177e4 LT |
194 | OUT_RING(0); |
195 | OUT_RING(GFX_OP_USER_INTERRUPT); | |
196 | ADVANCE_LP_RING(); | |
c29b669c AH |
197 | |
198 | return dev_priv->counter; | |
1da177e4 LT |
199 | } |
200 | ||
c94f7029 | 201 | static int i915_wait_irq(drm_device_t * dev, int irq_nr) |
1da177e4 LT |
202 | { |
203 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
204 | int ret = 0; | |
205 | ||
206 | DRM_DEBUG("%s irq_nr=%d breadcrumb=%d\n", __FUNCTION__, irq_nr, | |
207 | READ_BREADCRUMB(dev_priv)); | |
208 | ||
209 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) | |
210 | return 0; | |
211 | ||
212 | dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; | |
213 | ||
214 | DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, | |
215 | READ_BREADCRUMB(dev_priv) >= irq_nr); | |
216 | ||
217 | if (ret == DRM_ERR(EBUSY)) { | |
218 | DRM_ERROR("%s: EBUSY -- rec: %d emitted: %d\n", | |
219 | __FUNCTION__, | |
220 | READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); | |
221 | } | |
222 | ||
223 | dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); | |
224 | return ret; | |
225 | } | |
226 | ||
68815bad MCA |
227 | static int i915_driver_vblank_do_wait(drm_device_t *dev, unsigned int *sequence, |
228 | atomic_t *counter) | |
0d6aa60b DA |
229 | { |
230 | drm_i915_private_t *dev_priv = dev->dev_private; | |
231 | unsigned int cur_vblank; | |
232 | int ret = 0; | |
233 | ||
234 | if (!dev_priv) { | |
235 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | |
236 | return DRM_ERR(EINVAL); | |
237 | } | |
238 | ||
239 | DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, | |
68815bad | 240 | (((cur_vblank = atomic_read(counter)) |
0d6aa60b DA |
241 | - *sequence) <= (1<<23))); |
242 | ||
243 | *sequence = cur_vblank; | |
244 | ||
245 | return ret; | |
246 | } | |
247 | ||
248 | ||
68815bad MCA |
249 | int i915_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence) |
250 | { | |
251 | return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received); | |
252 | } | |
253 | ||
254 | int i915_driver_vblank_wait2(drm_device_t *dev, unsigned int *sequence) | |
255 | { | |
256 | return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received2); | |
257 | } | |
258 | ||
1da177e4 LT |
259 | /* Needs the lock as it touches the ring. |
260 | */ | |
261 | int i915_irq_emit(DRM_IOCTL_ARGS) | |
262 | { | |
263 | DRM_DEVICE; | |
264 | drm_i915_private_t *dev_priv = dev->dev_private; | |
265 | drm_i915_irq_emit_t emit; | |
266 | int result; | |
267 | ||
268 | LOCK_TEST_WITH_RETURN(dev, filp); | |
269 | ||
270 | if (!dev_priv) { | |
271 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | |
272 | return DRM_ERR(EINVAL); | |
273 | } | |
274 | ||
275 | DRM_COPY_FROM_USER_IOCTL(emit, (drm_i915_irq_emit_t __user *) data, | |
276 | sizeof(emit)); | |
277 | ||
278 | result = i915_emit_irq(dev); | |
279 | ||
280 | if (DRM_COPY_TO_USER(emit.irq_seq, &result, sizeof(int))) { | |
281 | DRM_ERROR("copy_to_user\n"); | |
282 | return DRM_ERR(EFAULT); | |
283 | } | |
284 | ||
285 | return 0; | |
286 | } | |
287 | ||
288 | /* Doesn't need the hardware lock. | |
289 | */ | |
290 | int i915_irq_wait(DRM_IOCTL_ARGS) | |
291 | { | |
292 | DRM_DEVICE; | |
293 | drm_i915_private_t *dev_priv = dev->dev_private; | |
294 | drm_i915_irq_wait_t irqwait; | |
295 | ||
296 | if (!dev_priv) { | |
297 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | |
298 | return DRM_ERR(EINVAL); | |
299 | } | |
300 | ||
301 | DRM_COPY_FROM_USER_IOCTL(irqwait, (drm_i915_irq_wait_t __user *) data, | |
302 | sizeof(irqwait)); | |
303 | ||
304 | return i915_wait_irq(dev, irqwait.irq_seq); | |
305 | } | |
306 | ||
5b51694a | 307 | static void i915_enable_interrupt (drm_device_t *dev) |
702880f2 DA |
308 | { |
309 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
310 | u16 flag; | |
311 | ||
312 | flag = 0; | |
313 | if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A) | |
314 | flag |= VSYNC_PIPEA_FLAG; | |
315 | if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B) | |
316 | flag |= VSYNC_PIPEB_FLAG; | |
5b51694a | 317 | |
702880f2 | 318 | I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG | flag); |
702880f2 DA |
319 | } |
320 | ||
321 | /* Set the vblank monitor pipe | |
322 | */ | |
323 | int i915_vblank_pipe_set(DRM_IOCTL_ARGS) | |
324 | { | |
325 | DRM_DEVICE; | |
326 | drm_i915_private_t *dev_priv = dev->dev_private; | |
327 | drm_i915_vblank_pipe_t pipe; | |
328 | ||
329 | if (!dev_priv) { | |
330 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | |
331 | return DRM_ERR(EINVAL); | |
332 | } | |
333 | ||
334 | DRM_COPY_FROM_USER_IOCTL(pipe, (drm_i915_vblank_pipe_t __user *) data, | |
335 | sizeof(pipe)); | |
336 | ||
5b51694a MCA |
337 | if (pipe.pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) { |
338 | DRM_ERROR("%s called with invalid pipe 0x%x\n", | |
339 | __FUNCTION__, pipe.pipe); | |
340 | return DRM_ERR(EINVAL); | |
341 | } | |
342 | ||
702880f2 | 343 | dev_priv->vblank_pipe = pipe.pipe; |
5b51694a MCA |
344 | |
345 | i915_enable_interrupt (dev); | |
346 | ||
347 | return 0; | |
702880f2 DA |
348 | } |
349 | ||
350 | int i915_vblank_pipe_get(DRM_IOCTL_ARGS) | |
351 | { | |
352 | DRM_DEVICE; | |
353 | drm_i915_private_t *dev_priv = dev->dev_private; | |
354 | drm_i915_vblank_pipe_t pipe; | |
355 | u16 flag; | |
356 | ||
357 | if (!dev_priv) { | |
358 | DRM_ERROR("%s called with no initialization\n", __FUNCTION__); | |
359 | return DRM_ERR(EINVAL); | |
360 | } | |
361 | ||
362 | flag = I915_READ(I915REG_INT_ENABLE_R); | |
363 | pipe.pipe = 0; | |
364 | if (flag & VSYNC_PIPEA_FLAG) | |
365 | pipe.pipe |= DRM_I915_VBLANK_PIPE_A; | |
366 | if (flag & VSYNC_PIPEB_FLAG) | |
367 | pipe.pipe |= DRM_I915_VBLANK_PIPE_B; | |
368 | DRM_COPY_TO_USER_IOCTL((drm_i915_vblank_pipe_t __user *) data, pipe, | |
369 | sizeof(pipe)); | |
370 | return 0; | |
371 | } | |
372 | ||
a6b54f3f MCA |
373 | /** |
374 | * Schedule buffer swap at given vertical blank. | |
375 | */ | |
376 | int i915_vblank_swap(DRM_IOCTL_ARGS) | |
377 | { | |
378 | DRM_DEVICE; | |
379 | drm_i915_private_t *dev_priv = dev->dev_private; | |
380 | drm_i915_vblank_swap_t swap; | |
381 | drm_i915_vbl_swap_t *vbl_swap; | |
541f29aa | 382 | unsigned int pipe, seqtype, irqflags, curseq; |
a6b54f3f MCA |
383 | struct list_head *list; |
384 | ||
385 | if (!dev_priv) { | |
386 | DRM_ERROR("%s called with no initialization\n", __func__); | |
387 | return DRM_ERR(EINVAL); | |
388 | } | |
389 | ||
390 | if (dev_priv->sarea_priv->rotation) { | |
391 | DRM_DEBUG("Rotation not supported\n"); | |
392 | return DRM_ERR(EINVAL); | |
393 | } | |
394 | ||
395 | if (dev_priv->swaps_pending >= 100) { | |
396 | DRM_DEBUG("Too many swaps queued\n"); | |
397 | return DRM_ERR(EBUSY); | |
398 | } | |
399 | ||
400 | DRM_COPY_FROM_USER_IOCTL(swap, (drm_i915_vblank_swap_t __user *) data, | |
401 | sizeof(swap)); | |
402 | ||
541f29aa MCA |
403 | if (swap.seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE | |
404 | _DRM_VBLANK_SECONDARY)) { | |
405 | DRM_ERROR("Invalid sequence type 0x%x\n", swap.seqtype); | |
406 | return DRM_ERR(EINVAL); | |
407 | } | |
408 | ||
409 | pipe = (swap.seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0; | |
410 | ||
411 | seqtype = swap.seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE); | |
412 | ||
413 | if (seqtype == _DRM_VBLANK_RELATIVE && swap.sequence == 0) { | |
414 | DRM_DEBUG("Not scheduling swap for current sequence\n"); | |
415 | return DRM_ERR(EINVAL); | |
416 | } | |
417 | ||
418 | if (!(dev_priv->vblank_pipe & (1 << pipe))) { | |
419 | DRM_ERROR("Invalid pipe %d\n", pipe); | |
a6b54f3f MCA |
420 | return DRM_ERR(EINVAL); |
421 | } | |
422 | ||
423 | spin_lock_irqsave(&dev->drw_lock, irqflags); | |
424 | ||
425 | if (!drm_get_drawable_info(dev, swap.drawable)) { | |
426 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); | |
427 | DRM_ERROR("Invalid drawable ID %d\n", swap.drawable); | |
428 | return DRM_ERR(EINVAL); | |
429 | } | |
430 | ||
431 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); | |
432 | ||
541f29aa MCA |
433 | curseq = atomic_read(pipe ? &dev->vbl_received2 : &dev->vbl_received); |
434 | ||
a6b54f3f MCA |
435 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); |
436 | ||
541f29aa MCA |
437 | switch (seqtype) { |
438 | case _DRM_VBLANK_RELATIVE: | |
439 | swap.sequence += curseq; | |
440 | break; | |
441 | case _DRM_VBLANK_ABSOLUTE: | |
442 | if ((curseq - swap.sequence) > (1<<23)) { | |
443 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
444 | DRM_DEBUG("Missed target sequence\n"); | |
445 | return DRM_ERR(EINVAL); | |
446 | } | |
447 | break; | |
448 | } | |
449 | ||
a6b54f3f MCA |
450 | list_for_each(list, &dev_priv->vbl_swaps.head) { |
451 | vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head); | |
452 | ||
453 | if (vbl_swap->drw_id == swap.drawable && | |
541f29aa | 454 | vbl_swap->pipe == pipe && |
a6b54f3f MCA |
455 | vbl_swap->sequence == swap.sequence) { |
456 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
457 | DRM_DEBUG("Already scheduled\n"); | |
458 | return 0; | |
459 | } | |
460 | } | |
461 | ||
462 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
463 | ||
464 | vbl_swap = drm_calloc(1, sizeof(vbl_swap), DRM_MEM_DRIVER); | |
465 | ||
466 | if (!vbl_swap) { | |
467 | DRM_ERROR("Failed to allocate memory to queue swap\n"); | |
468 | return DRM_ERR(ENOMEM); | |
469 | } | |
470 | ||
471 | DRM_DEBUG("\n"); | |
472 | ||
473 | vbl_swap->drw_id = swap.drawable; | |
541f29aa | 474 | vbl_swap->pipe = pipe; |
a6b54f3f MCA |
475 | vbl_swap->sequence = swap.sequence; |
476 | ||
477 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); | |
478 | ||
479 | list_add_tail((struct list_head *)vbl_swap, &dev_priv->vbl_swaps.head); | |
480 | dev_priv->swaps_pending++; | |
481 | ||
482 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
483 | ||
541f29aa MCA |
484 | DRM_COPY_TO_USER_IOCTL((drm_i915_vblank_swap_t __user *) data, swap, |
485 | sizeof(swap)); | |
486 | ||
a6b54f3f MCA |
487 | return 0; |
488 | } | |
489 | ||
1da177e4 LT |
490 | /* drm_dma.h hooks |
491 | */ | |
492 | void i915_driver_irq_preinstall(drm_device_t * dev) | |
493 | { | |
494 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
495 | ||
496 | I915_WRITE16(I915REG_HWSTAM, 0xfffe); | |
497 | I915_WRITE16(I915REG_INT_MASK_R, 0x0); | |
498 | I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); | |
499 | } | |
500 | ||
501 | void i915_driver_irq_postinstall(drm_device_t * dev) | |
502 | { | |
503 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
504 | ||
a6b54f3f MCA |
505 | dev_priv->swaps_lock = SPIN_LOCK_UNLOCKED; |
506 | INIT_LIST_HEAD(&dev_priv->vbl_swaps.head); | |
507 | dev_priv->swaps_pending = 0; | |
508 | ||
5b51694a MCA |
509 | if (!dev_priv->vblank_pipe) |
510 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A; | |
702880f2 | 511 | i915_enable_interrupt(dev); |
1da177e4 LT |
512 | DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); |
513 | } | |
514 | ||
515 | void i915_driver_irq_uninstall(drm_device_t * dev) | |
516 | { | |
517 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
91e3738e DA |
518 | u16 temp; |
519 | ||
1da177e4 LT |
520 | if (!dev_priv) |
521 | return; | |
522 | ||
523 | I915_WRITE16(I915REG_HWSTAM, 0xffff); | |
524 | I915_WRITE16(I915REG_INT_MASK_R, 0xffff); | |
525 | I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); | |
91e3738e DA |
526 | |
527 | temp = I915_READ16(I915REG_INT_IDENTITY_R); | |
528 | I915_WRITE16(I915REG_INT_IDENTITY_R, temp); | |
1da177e4 | 529 | } |