[deliverable/linux.git] / drivers / char / drm / via_irq.c

/* via_irq.c
 *
 * Copyright 2004 BEAM Ltd.
 * Copyright 2002 Tungsten Graphics, Inc.
 * Copyright 2005 Thomas Hellstrom.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * BEAM LTD, TUNGSTEN GRAPHICS  AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *    Terry Barnaby <terry1@beam.ltd.uk>
 *    Keith Whitwell <keith@tungstengraphics.com>
 *    Thomas Hellstrom <unichrome@shipmail.org>
 *
 * This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
 * interrupt, as well as an infrastructure to handle other interrupts of the chip.
 * The refresh rate is also calculated for video playback sync purposes.
 */

#include "drmP.h"
#include "drm.h"
#include "via_drm.h"
#include "via_drv.h"

#define VIA_REG_INTERRUPT       0x200

/* VIA_REG_INTERRUPT */
#define VIA_IRQ_GLOBAL          (1 << 31)
#define VIA_IRQ_VBLANK_ENABLE   (1 << 19)
#define VIA_IRQ_VBLANK_PENDING  (1 << 3)
#define VIA_IRQ_HQV0_ENABLE     (1 << 11)
#define VIA_IRQ_HQV1_ENABLE     (1 << 25)
#define VIA_IRQ_HQV0_PENDING    (1 << 9)
#define VIA_IRQ_HQV1_PENDING    (1 << 10)

/*
 * Device-specific IRQs go here. This type might need to be extended with
 * the register if there are multiple IRQ control registers.
 * Currently we activate the HQV interrupts of  Unichrome Pro group A.
 */

static maskarray_t via_pro_group_a_irqs[] = {
	{VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
	 0x00000000},
	{VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
	 0x00000000}
};
static int via_num_pro_group_a =
    sizeof(via_pro_group_a_irqs) / sizeof(maskarray_t);

static maskarray_t via_unichrome_irqs[] = { };
static int via_num_unichrome = sizeof(via_unichrome_irqs) / sizeof(maskarray_t);

static unsigned time_diff(struct timeval *now, struct timeval *then)
{
	return (now->tv_usec >= then->tv_usec) ?
	    now->tv_usec - then->tv_usec :
	    1000000 - (then->tv_usec - now->tv_usec);
}

irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
{
	drm_device_t *dev = (drm_device_t *) arg;
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;
	int handled = 0;
	struct timeval cur_vblank;
	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	int i;

	status = VIA_READ(VIA_REG_INTERRUPT);
	if (status & VIA_IRQ_VBLANK_PENDING) {
		atomic_inc(&dev->vbl_received);
		if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
			do_gettimeofday(&cur_vblank);
			if (dev_priv->last_vblank_valid) {
				dev_priv->usec_per_vblank =
				    time_diff(&cur_vblank,
					      &dev_priv->last_vblank) >> 4;
			}
			dev_priv->last_vblank = cur_vblank;
			dev_priv->last_vblank_valid = 1;
		}
		if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
			DRM_DEBUG("US per vblank is: %u\n",
				  dev_priv->usec_per_vblank);
		}
		DRM_WAKEUP(&dev->vbl_queue);
		drm_vbl_send_signals(dev);
		handled = 1;
	}

	for (i = 0; i < dev_priv->num_irqs; ++i) {
		if (status & cur_irq->pending_mask) {
			atomic_inc(&cur_irq->irq_received);
			DRM_WAKEUP(&cur_irq->irq_queue);
			handled = 1;
		}
		cur_irq++;
	}

	/* Acknowlege interrupts */
	VIA_WRITE(VIA_REG_INTERRUPT, status);

	if (handled)
		return IRQ_HANDLED;
	else
		return IRQ_NONE;
}

static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
{
	u32 status;

	if (dev_priv) {
		/* Acknowlege interrupts */
		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status |
			  dev_priv->irq_pending_mask);
	}
}

int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	unsigned int cur_vblank;
	int ret = 0;

	DRM_DEBUG("viadrv_vblank_wait\n");
	if (!dev_priv) {
		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
		return -EINVAL;
	}

	viadrv_acknowledge_irqs(dev_priv);

	/* Assume that the user has missed the current sequence number
	 * by about a day rather than she wants to wait for years
	 * using vertical blanks...
	 */

	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
		    (((cur_vblank = atomic_read(&dev->vbl_received)) -
		      *sequence) <= (1 << 23)));

	*sequence = cur_vblank;
	return ret;
}

static int
via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence,
		    unsigned int *sequence)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	unsigned int cur_irq_sequence;
	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	int ret = 0;
	maskarray_t *masks = dev_priv->irq_masks;

	DRM_DEBUG("%s\n", __FUNCTION__);

	if (!dev_priv) {
		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
		return DRM_ERR(EINVAL);
	}

	if (irq >= dev_priv->num_irqs) {
		DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
			  irq);
		return DRM_ERR(EINVAL);
	}

	cur_irq += irq;

	if (masks[irq][2] && !force_sequence) {
		DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
			    ((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
			     masks[irq][4]));
		cur_irq_sequence = atomic_read(&cur_irq->irq_received);
	} else {
		DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
			    (((cur_irq_sequence =
			       atomic_read(&cur_irq->irq_received)) -
			      *sequence) <= (1 << 23)));
	}
	*sequence = cur_irq_sequence;
	return ret;
}

/*
 * drm_dma.h hooks
 */

void via_driver_irq_preinstall(drm_device_t * dev)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;
	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	int i;

	DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
	if (dev_priv) {

		dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
		dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;

		dev_priv->irq_masks = (dev_priv->pro_group_a) ?
		    via_pro_group_a_irqs : via_unichrome_irqs;
		dev_priv->num_irqs = (dev_priv->pro_group_a) ?
		    via_num_pro_group_a : via_num_unichrome;

		for (i = 0; i < dev_priv->num_irqs; ++i) {
			atomic_set(&cur_irq->irq_received, 0);
			cur_irq->enable_mask = dev_priv->irq_masks[i][0];
			cur_irq->pending_mask = dev_priv->irq_masks[i][1];
			DRM_INIT_WAITQUEUE(&cur_irq->irq_queue);
			dev_priv->irq_enable_mask |= cur_irq->enable_mask;
			dev_priv->irq_pending_mask |= cur_irq->pending_mask;
			cur_irq++;

			DRM_DEBUG("Initializing IRQ %d\n", i);
		}

		dev_priv->last_vblank_valid = 0;

		// Clear VSync interrupt regs
		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status &
			  ~(dev_priv->irq_enable_mask));

		/* Clear bits if they're already high */
		viadrv_acknowledge_irqs(dev_priv);
	}
}

void via_driver_irq_postinstall(drm_device_t * dev)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;

	DRM_DEBUG("via_driver_irq_postinstall\n");
	if (dev_priv) {
		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL
			  | dev_priv->irq_enable_mask);

		/* Some magic, oh for some data sheets ! */

		VIA_WRITE8(0x83d4, 0x11);
		VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30);

	}
}

void via_driver_irq_uninstall(drm_device_t * dev)
{
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	u32 status;

	DRM_DEBUG("driver_irq_uninstall)\n");
	if (dev_priv) {

		/* Some more magic, oh for some data sheets ! */

		VIA_WRITE8(0x83d4, 0x11);
		VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);

		status = VIA_READ(VIA_REG_INTERRUPT);
		VIA_WRITE(VIA_REG_INTERRUPT, status &
			  ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
	}
}

int via_wait_irq(DRM_IOCTL_ARGS)
{
	drm_file_t *priv = filp->private_data;
	drm_device_t *dev = priv->head->dev;
	drm_via_irqwait_t __user *argp = (void __user *)data;
	drm_via_irqwait_t irqwait;
	struct timeval now;
	int ret = 0;
	drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	int force_sequence;

	if (!dev->irq)
		return DRM_ERR(EINVAL);

	DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait));
	if (irqwait.request.irq >= dev_priv->num_irqs) {
		DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
			  irqwait.request.irq);
		return DRM_ERR(EINVAL);
	}

	cur_irq += irqwait.request.irq;

	switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) {
	case VIA_IRQ_RELATIVE:
		irqwait.request.sequence += atomic_read(&cur_irq->irq_received);
		irqwait.request.type &= ~_DRM_VBLANK_RELATIVE;
	case VIA_IRQ_ABSOLUTE:
		break;
	default:
		return DRM_ERR(EINVAL);
	}

	if (irqwait.request.type & VIA_IRQ_SIGNAL) {
		DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
			  __FUNCTION__);
		return DRM_ERR(EINVAL);
	}

	force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE);

	ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence,
				  &irqwait.request.sequence);
	do_gettimeofday(&now);
	irqwait.reply.tval_sec = now.tv_sec;
	irqwait.reply.tval_usec = now.tv_usec;

	DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait));

	return ret;
}
Commit	Line	Data
22f579c6 DA	1	/* via_irq.c
	2	*
	3	* Copyright 2004 BEAM Ltd.
	4	* Copyright 2002 Tungsten Graphics, Inc.
	5	* Copyright 2005 Thomas Hellstrom.
	6	* All Rights Reserved.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a
	9	* copy of this software and associated documentation files (the "Software"),
	10	* to deal in the Software without restriction, including without limitation
	11	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	12	* and/or sell copies of the Software, and to permit persons to whom the
	13	* Software is furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice (including the next
	16	* paragraph) shall be included in all copies or substantial portions of the
	17	* Software.
	18	*
	19	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	20	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	21	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	22	* BEAM LTD, TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	23	* DAMAGES OR
	24	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	25	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	26	* DEALINGS IN THE SOFTWARE.
	27	*
	28	* Authors:
	29	* Terry Barnaby <terry1@beam.ltd.uk>
	30	* Keith Whitwell <keith@tungstengraphics.com>
	31	* Thomas Hellstrom <unichrome@shipmail.org>
	32	*
	33	* This code provides standard DRM access to the Via Unichrome / Pro Vertical blank
	34	* interrupt, as well as an infrastructure to handle other interrupts of the chip.
	35	* The refresh rate is also calculated for video playback sync purposes.
	36	*/
	37
	38	#include "drmP.h"
	39	#include "drm.h"
	40	#include "via_drm.h"
	41	#include "via_drv.h"
	42
	43	#define VIA_REG_INTERRUPT 0x200
	44
	45	/* VIA_REG_INTERRUPT */
	46	#define VIA_IRQ_GLOBAL (1 << 31)
	47	#define VIA_IRQ_VBLANK_ENABLE (1 << 19)
	48	#define VIA_IRQ_VBLANK_PENDING (1 << 3)
	49	#define VIA_IRQ_HQV0_ENABLE (1 << 11)
	50	#define VIA_IRQ_HQV1_ENABLE (1 << 25)
	51	#define VIA_IRQ_HQV0_PENDING (1 << 9)
	52	#define VIA_IRQ_HQV1_PENDING (1 << 10)
	53
	54	/*
	55	* Device-specific IRQs go here. This type might need to be extended with
	56	* the register if there are multiple IRQ control registers.
b5e89ed5	57	* Currently we activate the HQV interrupts of Unichrome Pro group A.
22f579c6 DA	58	*/
	59
	60	static maskarray_t via_pro_group_a_irqs[] = {
b5e89ed5 DA	61	{VIA_IRQ_HQV0_ENABLE, VIA_IRQ_HQV0_PENDING, 0x000003D0, 0x00008010,
	62	0x00000000},
	63	{VIA_IRQ_HQV1_ENABLE, VIA_IRQ_HQV1_PENDING, 0x000013D0, 0x00008010,
	64	0x00000000}
	65	};
	66	static int via_num_pro_group_a =
	67	sizeof(via_pro_group_a_irqs) / sizeof(maskarray_t);
	68
	69	static maskarray_t via_unichrome_irqs[] = { };
	70	static int via_num_unichrome = sizeof(via_unichrome_irqs) / sizeof(maskarray_t);
	71
	72	static unsigned time_diff(struct timeval now, struct timeval then)
22f579c6	73	{
b5e89ed5 DA	74	return (now->tv_usec >= then->tv_usec) ?
	75	now->tv_usec - then->tv_usec :
	76	1000000 - (then->tv_usec - now->tv_usec);
22f579c6 DA	77	}
	78
	79	irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
	80	{
	81	drm_device_t dev = (drm_device_t ) arg;
	82	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	83	u32 status;
	84	int handled = 0;
	85	struct timeval cur_vblank;
	86	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	87	int i;
	88
	89	status = VIA_READ(VIA_REG_INTERRUPT);
	90	if (status & VIA_IRQ_VBLANK_PENDING) {
	91	atomic_inc(&dev->vbl_received);
b5e89ed5	92	if (!(atomic_read(&dev->vbl_received) & 0x0F)) {
22f579c6	93	do_gettimeofday(&cur_vblank);
b5e89ed5 DA	94	if (dev_priv->last_vblank_valid) {
	95	dev_priv->usec_per_vblank =
	96	time_diff(&cur_vblank,
	97	&dev_priv->last_vblank) >> 4;
22f579c6 DA	98	}
	99	dev_priv->last_vblank = cur_vblank;
	100	dev_priv->last_vblank_valid = 1;
b5e89ed5 DA	101	}
b5e89ed5 DA	102	if (!(atomic_read(&dev->vbl_received) & 0xFF)) {
22f579c6	103	DRM_DEBUG("US per vblank is: %u\n",
b5e89ed5	104	dev_priv->usec_per_vblank);
22f579c6 DA	105	}
	106	DRM_WAKEUP(&dev->vbl_queue);
	107	drm_vbl_send_signals(dev);
	108	handled = 1;
	109	}
22f579c6	110
b5e89ed5	111	for (i = 0; i < dev_priv->num_irqs; ++i) {
22f579c6	112	if (status & cur_irq->pending_mask) {
b5e89ed5 DA	113	atomic_inc(&cur_irq->irq_received);
b5e89ed5 DA	114	DRM_WAKEUP(&cur_irq->irq_queue);
22f579c6 DA	115	handled = 1;
	116	}
	117	cur_irq++;
	118	}
b5e89ed5	119
22f579c6 DA	120	/* Acknowlege interrupts */
	121	VIA_WRITE(VIA_REG_INTERRUPT, status);
	122
22f579c6 DA	123	if (handled)
	124	return IRQ_HANDLED;
	125	else
	126	return IRQ_NONE;
	127	}
	128
	129	static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv)
	130	{
	131	u32 status;
	132
	133	if (dev_priv) {
	134	/* Acknowlege interrupts */
	135	status = VIA_READ(VIA_REG_INTERRUPT);
b5e89ed5	136	VIA_WRITE(VIA_REG_INTERRUPT, status \|
22f579c6 DA	137	dev_priv->irq_pending_mask);
	138	}
	139	}
	140
	141	int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
	142	{
	143	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	144	unsigned int cur_vblank;
	145	int ret = 0;
	146
	147	DRM_DEBUG("viadrv_vblank_wait\n");
	148	if (!dev_priv) {
	149	DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
	150	return -EINVAL;
	151	}
	152
	153	viadrv_acknowledge_irqs(dev_priv);
	154
	155	/* Assume that the user has missed the current sequence number
	156	* by about a day rather than she wants to wait for years
	157	* using vertical blanks...
	158	*/
	159
	160	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
	161	(((cur_vblank = atomic_read(&dev->vbl_received)) -
	162	*sequence) <= (1 << 23)));
b5e89ed5	163
22f579c6 DA	164	*sequence = cur_vblank;
	165	return ret;
	166	}
	167
b5e89ed5	168	static int
22f579c6 DA	169	via_driver_irq_wait(drm_device_t * dev, unsigned int irq, int force_sequence,
	170	unsigned int *sequence)
	171	{
	172	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	173	unsigned int cur_irq_sequence;
	174	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	175	int ret = 0;
	176	maskarray_t *masks = dev_priv->irq_masks;
	177
	178	DRM_DEBUG("%s\n", __FUNCTION__);
	179
	180	if (!dev_priv) {
	181	DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
	182	return DRM_ERR(EINVAL);
	183	}
	184
b5e89ed5 DA	185	if (irq >= dev_priv->num_irqs) {
	186	DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
	187	irq);
22f579c6 DA	188	return DRM_ERR(EINVAL);
22f579c6 DA	189	}
b5e89ed5	190
22f579c6 DA	191	cur_irq += irq;
	192
	193	if (masks[irq][2] && !force_sequence) {
	194	DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
b5e89ed5 DA	195	((VIA_READ(masks[irq][2]) & masks[irq][3]) ==
b5e89ed5 DA	196	masks[irq][4]));
22f579c6 DA	197	cur_irq_sequence = atomic_read(&cur_irq->irq_received);
	198	} else {
	199	DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ,
b5e89ed5 DA	200	(((cur_irq_sequence =
	201	atomic_read(&cur_irq->irq_received)) -
	202	*sequence) <= (1 << 23)));
22f579c6 DA	203	}
	204	*sequence = cur_irq_sequence;
	205	return ret;
	206	}
	207
22f579c6 DA	208	/*
	209	* drm_dma.h hooks
	210	*/
	211
	212	void via_driver_irq_preinstall(drm_device_t * dev)
	213	{
	214	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	215	u32 status;
	216	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	217	int i;
	218
	219	DRM_DEBUG("driver_irq_preinstall: dev_priv: %p\n", dev_priv);
	220	if (dev_priv) {
	221
	222	dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
	223	dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;
	224
	225	dev_priv->irq_masks = (dev_priv->pro_group_a) ?
b5e89ed5	226	via_pro_group_a_irqs : via_unichrome_irqs;
22f579c6	227	dev_priv->num_irqs = (dev_priv->pro_group_a) ?
b5e89ed5 DA	228	via_num_pro_group_a : via_num_unichrome;
	229
	230	for (i = 0; i < dev_priv->num_irqs; ++i) {
22f579c6	231	atomic_set(&cur_irq->irq_received, 0);
b5e89ed5	232	cur_irq->enable_mask = dev_priv->irq_masks[i][0];
22f579c6	233	cur_irq->pending_mask = dev_priv->irq_masks[i][1];
b5e89ed5	234	DRM_INIT_WAITQUEUE(&cur_irq->irq_queue);
22f579c6 DA	235	dev_priv->irq_enable_mask \|= cur_irq->enable_mask;
	236	dev_priv->irq_pending_mask \|= cur_irq->pending_mask;
	237	cur_irq++;
b5e89ed5	238
22f579c6 DA	239	DRM_DEBUG("Initializing IRQ %d\n", i);
22f579c6 DA	240	}
b5e89ed5 DA	241
b5e89ed5 DA	242	dev_priv->last_vblank_valid = 0;
22f579c6 DA	243
	244	// Clear VSync interrupt regs
	245	status = VIA_READ(VIA_REG_INTERRUPT);
b5e89ed5	246	VIA_WRITE(VIA_REG_INTERRUPT, status &
22f579c6	247	~(dev_priv->irq_enable_mask));
b5e89ed5	248
22f579c6 DA	249	/* Clear bits if they're already high */
	250	viadrv_acknowledge_irqs(dev_priv);
	251	}
	252	}
	253
	254	void via_driver_irq_postinstall(drm_device_t * dev)
	255	{
	256	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	257	u32 status;
	258
	259	DRM_DEBUG("via_driver_irq_postinstall\n");
	260	if (dev_priv) {
	261	status = VIA_READ(VIA_REG_INTERRUPT);
	262	VIA_WRITE(VIA_REG_INTERRUPT, status \| VIA_IRQ_GLOBAL
	263	\| dev_priv->irq_enable_mask);
	264
	265	/* Some magic, oh for some data sheets ! */
	266
	267	VIA_WRITE8(0x83d4, 0x11);
	268	VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) \| 0x30);
b5e89ed5	269
22f579c6 DA	270	}
	271	}
	272
	273	void via_driver_irq_uninstall(drm_device_t * dev)
	274	{
	275	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	276	u32 status;
	277
	278	DRM_DEBUG("driver_irq_uninstall)\n");
	279	if (dev_priv) {
	280
	281	/* Some more magic, oh for some data sheets ! */
	282
	283	VIA_WRITE8(0x83d4, 0x11);
	284	VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30);
	285
	286	status = VIA_READ(VIA_REG_INTERRUPT);
b5e89ed5	287	VIA_WRITE(VIA_REG_INTERRUPT, status &
22f579c6 DA	288	~(VIA_IRQ_VBLANK_ENABLE \| dev_priv->irq_enable_mask));
	289	}
	290	}
	291
	292	int via_wait_irq(DRM_IOCTL_ARGS)
	293	{
	294	drm_file_t *priv = filp->private_data;
	295	drm_device_t *dev = priv->head->dev;
	296	drm_via_irqwait_t __user argp = (void __user )data;
	297	drm_via_irqwait_t irqwait;
	298	struct timeval now;
	299	int ret = 0;
	300	drm_via_private_t dev_priv = (drm_via_private_t ) dev->dev_private;
	301	drm_via_irq_t *cur_irq = dev_priv->via_irqs;
	302	int force_sequence;
	303
	304	if (!dev->irq)
	305	return DRM_ERR(EINVAL);
	306
	307	DRM_COPY_FROM_USER_IOCTL(irqwait, argp, sizeof(irqwait));
	308	if (irqwait.request.irq >= dev_priv->num_irqs) {
b5e89ed5	309	DRM_ERROR("%s Trying to wait on unknown irq %d\n", __FUNCTION__,
22f579c6 DA	310	irqwait.request.irq);
	311	return DRM_ERR(EINVAL);
	312	}
	313
	314	cur_irq += irqwait.request.irq;
	315
	316	switch (irqwait.request.type & ~VIA_IRQ_FLAGS_MASK) {
	317	case VIA_IRQ_RELATIVE:
	318	irqwait.request.sequence += atomic_read(&cur_irq->irq_received);
	319	irqwait.request.type &= ~_DRM_VBLANK_RELATIVE;
	320	case VIA_IRQ_ABSOLUTE:
	321	break;
	322	default:
	323	return DRM_ERR(EINVAL);
	324	}
	325
	326	if (irqwait.request.type & VIA_IRQ_SIGNAL) {
b5e89ed5	327	DRM_ERROR("%s Signals on Via IRQs not implemented yet.\n",
22f579c6 DA	328	__FUNCTION__);
	329	return DRM_ERR(EINVAL);
	330	}
	331
	332	force_sequence = (irqwait.request.type & VIA_IRQ_FORCE_SEQUENCE);
	333
	334	ret = via_driver_irq_wait(dev, irqwait.request.irq, force_sequence,
	335	&irqwait.request.sequence);
	336	do_gettimeofday(&now);
	337	irqwait.reply.tval_sec = now.tv_sec;
	338	irqwait.reply.tval_usec = now.tv_usec;
	339
	340	DRM_COPY_TO_USER_IOCTL(argp, irqwait, sizeof(irqwait));
	341
	342	return ret;
	343	}