Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Intel & MS High Precision Event Timer Implementation. | |
3 | * | |
4 | * Copyright (C) 2003 Intel Corporation | |
5 | * Venki Pallipadi | |
6 | * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. | |
7 | * Bob Picco <robert.picco@hp.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/types.h> | |
18 | #include <linux/miscdevice.h> | |
19 | #include <linux/major.h> | |
20 | #include <linux/ioport.h> | |
21 | #include <linux/fcntl.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/poll.h> | |
f23f6e08 | 24 | #include <linux/mm.h> |
1da177e4 LT |
25 | #include <linux/proc_fs.h> |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/sysctl.h> | |
28 | #include <linux/wait.h> | |
29 | #include <linux/bcd.h> | |
30 | #include <linux/seq_file.h> | |
31 | #include <linux/bitops.h> | |
54066a57 | 32 | #include <linux/compat.h> |
0aa366f3 | 33 | #include <linux/clocksource.h> |
0ca01763 | 34 | #include <linux/uaccess.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
0ca01763 | 36 | #include <linux/io.h> |
1da177e4 LT |
37 | |
38 | #include <asm/current.h> | |
1da177e4 | 39 | #include <asm/system.h> |
1da177e4 LT |
40 | #include <asm/irq.h> |
41 | #include <asm/div64.h> | |
42 | ||
43 | #include <linux/acpi.h> | |
44 | #include <acpi/acpi_bus.h> | |
45 | #include <linux/hpet.h> | |
46 | ||
47 | /* | |
48 | * The High Precision Event Timer driver. | |
49 | * This driver is closely modelled after the rtc.c driver. | |
e45f2c07 | 50 | * http://www.intel.com/hardwaredesign/hpetspec_1.pdf |
1da177e4 LT |
51 | */ |
52 | #define HPET_USER_FREQ (64) | |
53 | #define HPET_DRIFT (500) | |
54 | ||
757c4724 RD |
55 | #define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
56 | ||
64a76f66 DB |
57 | |
58 | /* WARNING -- don't get confused. These macros are never used | |
59 | * to write the (single) counter, and rarely to read it. | |
60 | * They're badly named; to fix, someday. | |
61 | */ | |
0aa366f3 TL |
62 | #if BITS_PER_LONG == 64 |
63 | #define write_counter(V, MC) writeq(V, MC) | |
64 | #define read_counter(MC) readq(MC) | |
65 | #else | |
66 | #define write_counter(V, MC) writel(V, MC) | |
67 | #define read_counter(MC) readl(MC) | |
68 | #endif | |
69 | ||
54066a57 | 70 | static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ |
642d30bb | 71 | static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
1da177e4 | 72 | |
3dffec45 ÇO |
73 | /* This clocksource driver currently only works on ia64 */ |
74 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
75 | static void __iomem *hpet_mctr; |
76 | ||
8e19608e | 77 | static cycle_t read_hpet(struct clocksource *cs) |
0aa366f3 TL |
78 | { |
79 | return (cycle_t)read_counter((void __iomem *)hpet_mctr); | |
80 | } | |
81 | ||
82 | static struct clocksource clocksource_hpet = { | |
0ca01763 JSR |
83 | .name = "hpet", |
84 | .rating = 250, | |
85 | .read = read_hpet, | |
86 | .mask = CLOCKSOURCE_MASK(64), | |
87 | .mult = 0, /* to be calculated */ | |
88 | .shift = 10, | |
89 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
0aa366f3 TL |
90 | }; |
91 | static struct clocksource *hpet_clocksource; | |
3dffec45 | 92 | #endif |
0aa366f3 | 93 | |
1da177e4 LT |
94 | /* A lock for concurrent access by app and isr hpet activity. */ |
95 | static DEFINE_SPINLOCK(hpet_lock); | |
1da177e4 LT |
96 | |
97 | #define HPET_DEV_NAME (7) | |
98 | ||
99 | struct hpet_dev { | |
100 | struct hpets *hd_hpets; | |
101 | struct hpet __iomem *hd_hpet; | |
102 | struct hpet_timer __iomem *hd_timer; | |
103 | unsigned long hd_ireqfreq; | |
104 | unsigned long hd_irqdata; | |
105 | wait_queue_head_t hd_waitqueue; | |
106 | struct fasync_struct *hd_async_queue; | |
1da177e4 LT |
107 | unsigned int hd_flags; |
108 | unsigned int hd_irq; | |
109 | unsigned int hd_hdwirq; | |
110 | char hd_name[HPET_DEV_NAME]; | |
111 | }; | |
112 | ||
113 | struct hpets { | |
114 | struct hpets *hp_next; | |
115 | struct hpet __iomem *hp_hpet; | |
116 | unsigned long hp_hpet_phys; | |
0aa366f3 | 117 | struct clocksource *hp_clocksource; |
ba3f213f | 118 | unsigned long long hp_tick_freq; |
1da177e4 LT |
119 | unsigned long hp_delta; |
120 | unsigned int hp_ntimer; | |
121 | unsigned int hp_which; | |
122 | struct hpet_dev hp_dev[1]; | |
123 | }; | |
124 | ||
125 | static struct hpets *hpets; | |
126 | ||
127 | #define HPET_OPEN 0x0001 | |
128 | #define HPET_IE 0x0002 /* interrupt enabled */ | |
129 | #define HPET_PERIODIC 0x0004 | |
0d290861 | 130 | #define HPET_SHARED_IRQ 0x0008 |
1da177e4 | 131 | |
1da177e4 LT |
132 | |
133 | #ifndef readq | |
887c27f3 | 134 | static inline unsigned long long readq(void __iomem *addr) |
1da177e4 LT |
135 | { |
136 | return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); | |
137 | } | |
138 | #endif | |
139 | ||
140 | #ifndef writeq | |
887c27f3 | 141 | static inline void writeq(unsigned long long v, void __iomem *addr) |
1da177e4 LT |
142 | { |
143 | writel(v & 0xffffffff, addr); | |
144 | writel(v >> 32, addr + 4); | |
145 | } | |
146 | #endif | |
147 | ||
7d12e780 | 148 | static irqreturn_t hpet_interrupt(int irq, void *data) |
1da177e4 LT |
149 | { |
150 | struct hpet_dev *devp; | |
151 | unsigned long isr; | |
152 | ||
153 | devp = data; | |
0d290861 CL |
154 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
155 | ||
156 | if ((devp->hd_flags & HPET_SHARED_IRQ) && | |
157 | !(isr & readl(&devp->hd_hpet->hpet_isr))) | |
158 | return IRQ_NONE; | |
1da177e4 LT |
159 | |
160 | spin_lock(&hpet_lock); | |
161 | devp->hd_irqdata++; | |
162 | ||
163 | /* | |
164 | * For non-periodic timers, increment the accumulator. | |
165 | * This has the effect of treating non-periodic like periodic. | |
166 | */ | |
167 | if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { | |
168 | unsigned long m, t; | |
169 | ||
170 | t = devp->hd_ireqfreq; | |
ae21cf92 NC |
171 | m = read_counter(&devp->hd_timer->hpet_compare); |
172 | write_counter(t + m, &devp->hd_timer->hpet_compare); | |
1da177e4 LT |
173 | } |
174 | ||
0d290861 CL |
175 | if (devp->hd_flags & HPET_SHARED_IRQ) |
176 | writel(isr, &devp->hd_hpet->hpet_isr); | |
1da177e4 LT |
177 | spin_unlock(&hpet_lock); |
178 | ||
1da177e4 LT |
179 | wake_up_interruptible(&devp->hd_waitqueue); |
180 | ||
181 | kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); | |
182 | ||
183 | return IRQ_HANDLED; | |
184 | } | |
185 | ||
70ef6d59 KH |
186 | static void hpet_timer_set_irq(struct hpet_dev *devp) |
187 | { | |
188 | unsigned long v; | |
189 | int irq, gsi; | |
190 | struct hpet_timer __iomem *timer; | |
191 | ||
192 | spin_lock_irq(&hpet_lock); | |
193 | if (devp->hd_hdwirq) { | |
194 | spin_unlock_irq(&hpet_lock); | |
195 | return; | |
196 | } | |
197 | ||
198 | timer = devp->hd_timer; | |
199 | ||
200 | /* we prefer level triggered mode */ | |
201 | v = readl(&timer->hpet_config); | |
202 | if (!(v & Tn_INT_TYPE_CNF_MASK)) { | |
203 | v |= Tn_INT_TYPE_CNF_MASK; | |
204 | writel(v, &timer->hpet_config); | |
205 | } | |
206 | spin_unlock_irq(&hpet_lock); | |
207 | ||
208 | v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> | |
209 | Tn_INT_ROUTE_CAP_SHIFT; | |
210 | ||
211 | /* | |
212 | * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by | |
213 | * legacy device. In IO APIC mode, we skip all the legacy IRQS. | |
214 | */ | |
215 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) | |
216 | v &= ~0xf3df; | |
217 | else | |
218 | v &= ~0xffff; | |
219 | ||
e5d61511 | 220 | for_each_set_bit(irq, &v, HPET_MAX_IRQ) { |
1f45f562 | 221 | if (irq >= nr_irqs) { |
70ef6d59 KH |
222 | irq = HPET_MAX_IRQ; |
223 | break; | |
224 | } | |
225 | ||
a2f809b0 | 226 | gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, |
70ef6d59 KH |
227 | ACPI_ACTIVE_LOW); |
228 | if (gsi > 0) | |
229 | break; | |
230 | ||
231 | /* FIXME: Setup interrupt source table */ | |
232 | } | |
233 | ||
234 | if (irq < HPET_MAX_IRQ) { | |
235 | spin_lock_irq(&hpet_lock); | |
236 | v = readl(&timer->hpet_config); | |
237 | v |= irq << Tn_INT_ROUTE_CNF_SHIFT; | |
238 | writel(v, &timer->hpet_config); | |
239 | devp->hd_hdwirq = gsi; | |
240 | spin_unlock_irq(&hpet_lock); | |
241 | } | |
242 | return; | |
243 | } | |
244 | ||
1da177e4 LT |
245 | static int hpet_open(struct inode *inode, struct file *file) |
246 | { | |
247 | struct hpet_dev *devp; | |
248 | struct hpets *hpetp; | |
249 | int i; | |
250 | ||
251 | if (file->f_mode & FMODE_WRITE) | |
252 | return -EINVAL; | |
253 | ||
54066a57 | 254 | mutex_lock(&hpet_mutex); |
1da177e4 LT |
255 | spin_lock_irq(&hpet_lock); |
256 | ||
257 | for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) | |
258 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
64a76f66 | 259 | if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) |
1da177e4 LT |
260 | continue; |
261 | else { | |
262 | devp = &hpetp->hp_dev[i]; | |
263 | break; | |
264 | } | |
265 | ||
266 | if (!devp) { | |
267 | spin_unlock_irq(&hpet_lock); | |
54066a57 | 268 | mutex_unlock(&hpet_mutex); |
1da177e4 LT |
269 | return -EBUSY; |
270 | } | |
271 | ||
272 | file->private_data = devp; | |
273 | devp->hd_irqdata = 0; | |
274 | devp->hd_flags |= HPET_OPEN; | |
275 | spin_unlock_irq(&hpet_lock); | |
54066a57 | 276 | mutex_unlock(&hpet_mutex); |
1da177e4 | 277 | |
70ef6d59 KH |
278 | hpet_timer_set_irq(devp); |
279 | ||
1da177e4 LT |
280 | return 0; |
281 | } | |
282 | ||
283 | static ssize_t | |
284 | hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) | |
285 | { | |
286 | DECLARE_WAITQUEUE(wait, current); | |
287 | unsigned long data; | |
288 | ssize_t retval; | |
289 | struct hpet_dev *devp; | |
290 | ||
291 | devp = file->private_data; | |
292 | if (!devp->hd_ireqfreq) | |
293 | return -EIO; | |
294 | ||
295 | if (count < sizeof(unsigned long)) | |
296 | return -EINVAL; | |
297 | ||
298 | add_wait_queue(&devp->hd_waitqueue, &wait); | |
299 | ||
300 | for ( ; ; ) { | |
301 | set_current_state(TASK_INTERRUPTIBLE); | |
302 | ||
303 | spin_lock_irq(&hpet_lock); | |
304 | data = devp->hd_irqdata; | |
305 | devp->hd_irqdata = 0; | |
306 | spin_unlock_irq(&hpet_lock); | |
307 | ||
308 | if (data) | |
309 | break; | |
310 | else if (file->f_flags & O_NONBLOCK) { | |
311 | retval = -EAGAIN; | |
312 | goto out; | |
313 | } else if (signal_pending(current)) { | |
314 | retval = -ERESTARTSYS; | |
315 | goto out; | |
316 | } | |
317 | schedule(); | |
318 | } | |
319 | ||
320 | retval = put_user(data, (unsigned long __user *)buf); | |
321 | if (!retval) | |
322 | retval = sizeof(unsigned long); | |
323 | out: | |
324 | __set_current_state(TASK_RUNNING); | |
325 | remove_wait_queue(&devp->hd_waitqueue, &wait); | |
326 | ||
327 | return retval; | |
328 | } | |
329 | ||
330 | static unsigned int hpet_poll(struct file *file, poll_table * wait) | |
331 | { | |
332 | unsigned long v; | |
333 | struct hpet_dev *devp; | |
334 | ||
335 | devp = file->private_data; | |
336 | ||
337 | if (!devp->hd_ireqfreq) | |
338 | return 0; | |
339 | ||
340 | poll_wait(file, &devp->hd_waitqueue, wait); | |
341 | ||
342 | spin_lock_irq(&hpet_lock); | |
343 | v = devp->hd_irqdata; | |
344 | spin_unlock_irq(&hpet_lock); | |
345 | ||
346 | if (v != 0) | |
347 | return POLLIN | POLLRDNORM; | |
348 | ||
349 | return 0; | |
350 | } | |
351 | ||
352 | static int hpet_mmap(struct file *file, struct vm_area_struct *vma) | |
353 | { | |
354 | #ifdef CONFIG_HPET_MMAP | |
355 | struct hpet_dev *devp; | |
356 | unsigned long addr; | |
357 | ||
358 | if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) | |
359 | return -EINVAL; | |
360 | ||
361 | devp = file->private_data; | |
362 | addr = devp->hd_hpets->hp_hpet_phys; | |
363 | ||
364 | if (addr & (PAGE_SIZE - 1)) | |
365 | return -ENOSYS; | |
366 | ||
367 | vma->vm_flags |= VM_IO; | |
368 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
1da177e4 LT |
369 | |
370 | if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, | |
371 | PAGE_SIZE, vma->vm_page_prot)) { | |
3e6716e7 | 372 | printk(KERN_ERR "%s: io_remap_pfn_range failed\n", |
bf9d8929 | 373 | __func__); |
1da177e4 LT |
374 | return -EAGAIN; |
375 | } | |
376 | ||
377 | return 0; | |
378 | #else | |
379 | return -ENOSYS; | |
380 | #endif | |
381 | } | |
382 | ||
383 | static int hpet_fasync(int fd, struct file *file, int on) | |
384 | { | |
385 | struct hpet_dev *devp; | |
386 | ||
387 | devp = file->private_data; | |
388 | ||
389 | if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) | |
390 | return 0; | |
391 | else | |
392 | return -EIO; | |
393 | } | |
394 | ||
395 | static int hpet_release(struct inode *inode, struct file *file) | |
396 | { | |
397 | struct hpet_dev *devp; | |
398 | struct hpet_timer __iomem *timer; | |
399 | int irq = 0; | |
400 | ||
401 | devp = file->private_data; | |
402 | timer = devp->hd_timer; | |
403 | ||
404 | spin_lock_irq(&hpet_lock); | |
405 | ||
406 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
407 | &timer->hpet_config); | |
408 | ||
409 | irq = devp->hd_irq; | |
410 | devp->hd_irq = 0; | |
411 | ||
412 | devp->hd_ireqfreq = 0; | |
413 | ||
414 | if (devp->hd_flags & HPET_PERIODIC | |
415 | && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
416 | unsigned long v; | |
417 | ||
418 | v = readq(&timer->hpet_config); | |
419 | v ^= Tn_TYPE_CNF_MASK; | |
420 | writeq(v, &timer->hpet_config); | |
421 | } | |
422 | ||
423 | devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); | |
424 | spin_unlock_irq(&hpet_lock); | |
425 | ||
426 | if (irq) | |
427 | free_irq(irq, devp); | |
428 | ||
1da177e4 LT |
429 | file->private_data = NULL; |
430 | return 0; | |
431 | } | |
432 | ||
1da177e4 LT |
433 | static int hpet_ioctl_ieon(struct hpet_dev *devp) |
434 | { | |
435 | struct hpet_timer __iomem *timer; | |
436 | struct hpet __iomem *hpet; | |
437 | struct hpets *hpetp; | |
438 | int irq; | |
439 | unsigned long g, v, t, m; | |
440 | unsigned long flags, isr; | |
441 | ||
442 | timer = devp->hd_timer; | |
443 | hpet = devp->hd_hpet; | |
444 | hpetp = devp->hd_hpets; | |
445 | ||
9090e6db CL |
446 | if (!devp->hd_ireqfreq) |
447 | return -EIO; | |
448 | ||
1da177e4 LT |
449 | spin_lock_irq(&hpet_lock); |
450 | ||
451 | if (devp->hd_flags & HPET_IE) { | |
452 | spin_unlock_irq(&hpet_lock); | |
453 | return -EBUSY; | |
454 | } | |
455 | ||
456 | devp->hd_flags |= HPET_IE; | |
0d290861 CL |
457 | |
458 | if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) | |
459 | devp->hd_flags |= HPET_SHARED_IRQ; | |
1da177e4 LT |
460 | spin_unlock_irq(&hpet_lock); |
461 | ||
1da177e4 LT |
462 | irq = devp->hd_hdwirq; |
463 | ||
464 | if (irq) { | |
0d290861 | 465 | unsigned long irq_flags; |
1da177e4 | 466 | |
96e9694d CL |
467 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
468 | /* | |
469 | * To prevent the interrupt handler from seeing an | |
470 | * unwanted interrupt status bit, program the timer | |
471 | * so that it will not fire in the near future ... | |
472 | */ | |
473 | writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, | |
474 | &timer->hpet_config); | |
475 | write_counter(read_counter(&hpet->hpet_mc), | |
476 | &timer->hpet_compare); | |
477 | /* ... and clear any left-over status. */ | |
478 | isr = 1 << (devp - devp->hd_hpets->hp_dev); | |
479 | writel(isr, &hpet->hpet_isr); | |
480 | } | |
481 | ||
0d290861 CL |
482 | sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
483 | irq_flags = devp->hd_flags & HPET_SHARED_IRQ | |
0f2ed4c6 | 484 | ? IRQF_SHARED : IRQF_DISABLED; |
0d290861 CL |
485 | if (request_irq(irq, hpet_interrupt, irq_flags, |
486 | devp->hd_name, (void *)devp)) { | |
1da177e4 LT |
487 | printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
488 | irq = 0; | |
489 | } | |
490 | } | |
491 | ||
492 | if (irq == 0) { | |
493 | spin_lock_irq(&hpet_lock); | |
494 | devp->hd_flags ^= HPET_IE; | |
495 | spin_unlock_irq(&hpet_lock); | |
496 | return -EIO; | |
497 | } | |
498 | ||
499 | devp->hd_irq = irq; | |
500 | t = devp->hd_ireqfreq; | |
501 | v = readq(&timer->hpet_config); | |
64a76f66 DB |
502 | |
503 | /* 64-bit comparators are not yet supported through the ioctls, | |
504 | * so force this into 32-bit mode if it supports both modes | |
505 | */ | |
506 | g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; | |
1da177e4 LT |
507 | |
508 | if (devp->hd_flags & HPET_PERIODIC) { | |
1da177e4 | 509 | g |= Tn_TYPE_CNF_MASK; |
ae21cf92 | 510 | v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; |
1da177e4 LT |
511 | writeq(v, &timer->hpet_config); |
512 | local_irq_save(flags); | |
64a76f66 | 513 | |
ae21cf92 NC |
514 | /* |
515 | * NOTE: First we modify the hidden accumulator | |
64a76f66 DB |
516 | * register supported by periodic-capable comparators. |
517 | * We never want to modify the (single) counter; that | |
ae21cf92 NC |
518 | * would affect all the comparators. The value written |
519 | * is the counter value when the first interrupt is due. | |
64a76f66 | 520 | */ |
1da177e4 LT |
521 | m = read_counter(&hpet->hpet_mc); |
522 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
ae21cf92 NC |
523 | /* |
524 | * Then we modify the comparator, indicating the period | |
525 | * for subsequent interrupt. | |
526 | */ | |
527 | write_counter(t, &timer->hpet_compare); | |
1da177e4 LT |
528 | } else { |
529 | local_irq_save(flags); | |
530 | m = read_counter(&hpet->hpet_mc); | |
531 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
532 | } | |
533 | ||
0d290861 | 534 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
3d5640d1 | 535 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
0d290861 CL |
536 | writel(isr, &hpet->hpet_isr); |
537 | } | |
1da177e4 LT |
538 | writeq(g, &timer->hpet_config); |
539 | local_irq_restore(flags); | |
540 | ||
541 | return 0; | |
542 | } | |
543 | ||
ba3f213f CL |
544 | /* converts Hz to number of timer ticks */ |
545 | static inline unsigned long hpet_time_div(struct hpets *hpets, | |
546 | unsigned long dis) | |
1da177e4 | 547 | { |
ba3f213f | 548 | unsigned long long m; |
1da177e4 | 549 | |
ba3f213f | 550 | m = hpets->hp_tick_freq + (dis >> 1); |
1da177e4 | 551 | do_div(m, dis); |
1da177e4 LT |
552 | return (unsigned long)m; |
553 | } | |
554 | ||
555 | static int | |
54066a57 AB |
556 | hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, |
557 | struct hpet_info *info) | |
1da177e4 LT |
558 | { |
559 | struct hpet_timer __iomem *timer; | |
560 | struct hpet __iomem *hpet; | |
561 | struct hpets *hpetp; | |
562 | int err; | |
563 | unsigned long v; | |
564 | ||
565 | switch (cmd) { | |
566 | case HPET_IE_OFF: | |
567 | case HPET_INFO: | |
568 | case HPET_EPI: | |
569 | case HPET_DPI: | |
570 | case HPET_IRQFREQ: | |
571 | timer = devp->hd_timer; | |
572 | hpet = devp->hd_hpet; | |
573 | hpetp = devp->hd_hpets; | |
574 | break; | |
575 | case HPET_IE_ON: | |
576 | return hpet_ioctl_ieon(devp); | |
577 | default: | |
578 | return -EINVAL; | |
579 | } | |
580 | ||
581 | err = 0; | |
582 | ||
583 | switch (cmd) { | |
584 | case HPET_IE_OFF: | |
585 | if ((devp->hd_flags & HPET_IE) == 0) | |
586 | break; | |
587 | v = readq(&timer->hpet_config); | |
588 | v &= ~Tn_INT_ENB_CNF_MASK; | |
589 | writeq(v, &timer->hpet_config); | |
590 | if (devp->hd_irq) { | |
591 | free_irq(devp->hd_irq, devp); | |
592 | devp->hd_irq = 0; | |
593 | } | |
594 | devp->hd_flags ^= HPET_IE; | |
595 | break; | |
596 | case HPET_INFO: | |
597 | { | |
dae512ed | 598 | memset(info, 0, sizeof(*info)); |
af95eade | 599 | if (devp->hd_ireqfreq) |
54066a57 | 600 | info->hi_ireqfreq = |
af95eade | 601 | hpet_time_div(hpetp, devp->hd_ireqfreq); |
54066a57 | 602 | info->hi_flags = |
1da177e4 | 603 | readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; |
54066a57 AB |
604 | info->hi_hpet = hpetp->hp_which; |
605 | info->hi_timer = devp - hpetp->hp_dev; | |
1da177e4 LT |
606 | break; |
607 | } | |
608 | case HPET_EPI: | |
609 | v = readq(&timer->hpet_config); | |
610 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
611 | err = -ENXIO; | |
612 | break; | |
613 | } | |
614 | devp->hd_flags |= HPET_PERIODIC; | |
615 | break; | |
616 | case HPET_DPI: | |
617 | v = readq(&timer->hpet_config); | |
618 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
619 | err = -ENXIO; | |
620 | break; | |
621 | } | |
622 | if (devp->hd_flags & HPET_PERIODIC && | |
623 | readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
624 | v = readq(&timer->hpet_config); | |
625 | v ^= Tn_TYPE_CNF_MASK; | |
626 | writeq(v, &timer->hpet_config); | |
627 | } | |
628 | devp->hd_flags &= ~HPET_PERIODIC; | |
629 | break; | |
630 | case HPET_IRQFREQ: | |
54066a57 | 631 | if ((arg > hpet_max_freq) && |
1da177e4 LT |
632 | !capable(CAP_SYS_RESOURCE)) { |
633 | err = -EACCES; | |
634 | break; | |
635 | } | |
636 | ||
189e2dd1 | 637 | if (!arg) { |
1da177e4 LT |
638 | err = -EINVAL; |
639 | break; | |
640 | } | |
641 | ||
ba3f213f | 642 | devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
1da177e4 LT |
643 | } |
644 | ||
645 | return err; | |
646 | } | |
647 | ||
54066a57 AB |
648 | static long |
649 | hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
650 | { | |
651 | struct hpet_info info; | |
652 | int err; | |
653 | ||
654 | mutex_lock(&hpet_mutex); | |
655 | err = hpet_ioctl_common(file->private_data, cmd, arg, &info); | |
656 | mutex_unlock(&hpet_mutex); | |
657 | ||
658 | if ((cmd == HPET_INFO) && !err && | |
659 | (copy_to_user((void __user *)arg, &info, sizeof(info)))) | |
660 | err = -EFAULT; | |
661 | ||
662 | return err; | |
663 | } | |
664 | ||
665 | #ifdef CONFIG_COMPAT | |
666 | struct compat_hpet_info { | |
667 | compat_ulong_t hi_ireqfreq; /* Hz */ | |
668 | compat_ulong_t hi_flags; /* information */ | |
669 | unsigned short hi_hpet; | |
670 | unsigned short hi_timer; | |
671 | }; | |
672 | ||
673 | static long | |
674 | hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
675 | { | |
676 | struct hpet_info info; | |
677 | int err; | |
678 | ||
679 | mutex_lock(&hpet_mutex); | |
680 | err = hpet_ioctl_common(file->private_data, cmd, arg, &info); | |
681 | mutex_unlock(&hpet_mutex); | |
682 | ||
683 | if ((cmd == HPET_INFO) && !err) { | |
684 | struct compat_hpet_info __user *u = compat_ptr(arg); | |
685 | if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || | |
686 | put_user(info.hi_flags, &u->hi_flags) || | |
687 | put_user(info.hi_hpet, &u->hi_hpet) || | |
688 | put_user(info.hi_timer, &u->hi_timer)) | |
689 | err = -EFAULT; | |
690 | } | |
691 | ||
692 | return err; | |
693 | } | |
694 | #endif | |
695 | ||
62322d25 | 696 | static const struct file_operations hpet_fops = { |
1da177e4 LT |
697 | .owner = THIS_MODULE, |
698 | .llseek = no_llseek, | |
699 | .read = hpet_read, | |
700 | .poll = hpet_poll, | |
55929332 | 701 | .unlocked_ioctl = hpet_ioctl, |
54066a57 AB |
702 | #ifdef CONFIG_COMPAT |
703 | .compat_ioctl = hpet_compat_ioctl, | |
704 | #endif | |
1da177e4 LT |
705 | .open = hpet_open, |
706 | .release = hpet_release, | |
707 | .fasync = hpet_fasync, | |
708 | .mmap = hpet_mmap, | |
709 | }; | |
710 | ||
3e6716e7 RD |
711 | static int hpet_is_known(struct hpet_data *hdp) |
712 | { | |
713 | struct hpets *hpetp; | |
714 | ||
715 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
716 | if (hpetp->hp_hpet_phys == hdp->hd_phys_address) | |
717 | return 1; | |
718 | ||
719 | return 0; | |
720 | } | |
721 | ||
1da177e4 LT |
722 | static ctl_table hpet_table[] = { |
723 | { | |
1da177e4 LT |
724 | .procname = "max-user-freq", |
725 | .data = &hpet_max_freq, | |
726 | .maxlen = sizeof(int), | |
727 | .mode = 0644, | |
6d456111 | 728 | .proc_handler = proc_dointvec, |
1da177e4 | 729 | }, |
894d2491 | 730 | {} |
1da177e4 LT |
731 | }; |
732 | ||
733 | static ctl_table hpet_root[] = { | |
734 | { | |
1da177e4 LT |
735 | .procname = "hpet", |
736 | .maxlen = 0, | |
737 | .mode = 0555, | |
738 | .child = hpet_table, | |
739 | }, | |
894d2491 | 740 | {} |
1da177e4 LT |
741 | }; |
742 | ||
743 | static ctl_table dev_root[] = { | |
744 | { | |
1da177e4 LT |
745 | .procname = "dev", |
746 | .maxlen = 0, | |
747 | .mode = 0555, | |
748 | .child = hpet_root, | |
749 | }, | |
894d2491 | 750 | {} |
1da177e4 LT |
751 | }; |
752 | ||
753 | static struct ctl_table_header *sysctl_header; | |
754 | ||
1da177e4 LT |
755 | /* |
756 | * Adjustment for when arming the timer with | |
757 | * initial conditions. That is, main counter | |
758 | * ticks expired before interrupts are enabled. | |
759 | */ | |
760 | #define TICK_CALIBRATE (1000UL) | |
761 | ||
303d379c | 762 | static unsigned long __hpet_calibrate(struct hpets *hpetp) |
1da177e4 LT |
763 | { |
764 | struct hpet_timer __iomem *timer = NULL; | |
765 | unsigned long t, m, count, i, flags, start; | |
766 | struct hpet_dev *devp; | |
767 | int j; | |
768 | struct hpet __iomem *hpet; | |
769 | ||
770 | for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) | |
771 | if ((devp->hd_flags & HPET_OPEN) == 0) { | |
772 | timer = devp->hd_timer; | |
773 | break; | |
774 | } | |
775 | ||
776 | if (!timer) | |
777 | return 0; | |
778 | ||
3d5640d1 | 779 | hpet = hpetp->hp_hpet; |
1da177e4 LT |
780 | t = read_counter(&timer->hpet_compare); |
781 | ||
782 | i = 0; | |
ba3f213f | 783 | count = hpet_time_div(hpetp, TICK_CALIBRATE); |
1da177e4 LT |
784 | |
785 | local_irq_save(flags); | |
786 | ||
787 | start = read_counter(&hpet->hpet_mc); | |
788 | ||
789 | do { | |
790 | m = read_counter(&hpet->hpet_mc); | |
791 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
792 | } while (i++, (m - start) < count); | |
793 | ||
794 | local_irq_restore(flags); | |
795 | ||
796 | return (m - start) / i; | |
797 | } | |
798 | ||
303d379c YG |
799 | static unsigned long hpet_calibrate(struct hpets *hpetp) |
800 | { | |
801 | unsigned long ret = -1; | |
802 | unsigned long tmp; | |
803 | ||
804 | /* | |
805 | * Try to calibrate until return value becomes stable small value. | |
806 | * If SMI interruption occurs in calibration loop, the return value | |
807 | * will be big. This avoids its impact. | |
808 | */ | |
809 | for ( ; ; ) { | |
810 | tmp = __hpet_calibrate(hpetp); | |
811 | if (ret <= tmp) | |
812 | break; | |
813 | ret = tmp; | |
814 | } | |
815 | ||
816 | return ret; | |
817 | } | |
818 | ||
1da177e4 LT |
819 | int hpet_alloc(struct hpet_data *hdp) |
820 | { | |
5761d64b | 821 | u64 cap, mcfg; |
1da177e4 | 822 | struct hpet_dev *devp; |
5761d64b | 823 | u32 i, ntimer; |
1da177e4 LT |
824 | struct hpets *hpetp; |
825 | size_t siz; | |
826 | struct hpet __iomem *hpet; | |
0ca01763 | 827 | static struct hpets *last; |
5761d64b | 828 | unsigned long period; |
ba3f213f | 829 | unsigned long long temp; |
f92a789d | 830 | u32 remainder; |
1da177e4 LT |
831 | |
832 | /* | |
833 | * hpet_alloc can be called by platform dependent code. | |
3e6716e7 RD |
834 | * If platform dependent code has allocated the hpet that |
835 | * ACPI has also reported, then we catch it here. | |
1da177e4 | 836 | */ |
3e6716e7 RD |
837 | if (hpet_is_known(hdp)) { |
838 | printk(KERN_DEBUG "%s: duplicate HPET ignored\n", | |
bf9d8929 | 839 | __func__); |
3e6716e7 RD |
840 | return 0; |
841 | } | |
1da177e4 LT |
842 | |
843 | siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * | |
844 | sizeof(struct hpet_dev)); | |
845 | ||
3e6716e7 | 846 | hpetp = kzalloc(siz, GFP_KERNEL); |
1da177e4 LT |
847 | |
848 | if (!hpetp) | |
849 | return -ENOMEM; | |
850 | ||
1da177e4 LT |
851 | hpetp->hp_which = hpet_nhpet++; |
852 | hpetp->hp_hpet = hdp->hd_address; | |
853 | hpetp->hp_hpet_phys = hdp->hd_phys_address; | |
854 | ||
855 | hpetp->hp_ntimer = hdp->hd_nirqs; | |
e3f37a54 | 856 | |
5761d64b TG |
857 | for (i = 0; i < hdp->hd_nirqs; i++) |
858 | hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; | |
37a47db8 | 859 | |
5761d64b | 860 | hpet = hpetp->hp_hpet; |
e3f37a54 | 861 | |
1da177e4 LT |
862 | cap = readq(&hpet->hpet_cap); |
863 | ||
864 | ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; | |
865 | ||
866 | if (hpetp->hp_ntimer != ntimer) { | |
867 | printk(KERN_WARNING "hpet: number irqs doesn't agree" | |
868 | " with number of timers\n"); | |
869 | kfree(hpetp); | |
870 | return -ENODEV; | |
871 | } | |
872 | ||
873 | if (last) | |
874 | last->hp_next = hpetp; | |
875 | else | |
876 | hpets = hpetp; | |
877 | ||
878 | last = hpetp; | |
879 | ||
ba3f213f CL |
880 | period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
881 | HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ | |
882 | temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ | |
883 | temp += period >> 1; /* round */ | |
884 | do_div(temp, period); | |
885 | hpetp->hp_tick_freq = temp; /* ticks per second */ | |
1da177e4 | 886 | |
3034d11c AK |
887 | printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
888 | hpetp->hp_which, hdp->hd_phys_address, | |
1da177e4 LT |
889 | hpetp->hp_ntimer > 1 ? "s" : ""); |
890 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
5761d64b | 891 | printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
1da177e4 LT |
892 | printk("\n"); |
893 | ||
f92a789d DB |
894 | temp = hpetp->hp_tick_freq; |
895 | remainder = do_div(temp, 1000000); | |
64a76f66 DB |
896 | printk(KERN_INFO |
897 | "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", | |
898 | hpetp->hp_which, hpetp->hp_ntimer, | |
899 | cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, | |
f92a789d | 900 | (unsigned) temp, remainder); |
1da177e4 LT |
901 | |
902 | mcfg = readq(&hpet->hpet_config); | |
903 | if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { | |
904 | write_counter(0L, &hpet->hpet_mc); | |
905 | mcfg |= HPET_ENABLE_CNF_MASK; | |
906 | writeq(mcfg, &hpet->hpet_config); | |
907 | } | |
908 | ||
642d30bb | 909 | for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
1da177e4 LT |
910 | struct hpet_timer __iomem *timer; |
911 | ||
912 | timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; | |
1da177e4 LT |
913 | |
914 | devp->hd_hpets = hpetp; | |
915 | devp->hd_hpet = hpet; | |
916 | devp->hd_timer = timer; | |
917 | ||
918 | /* | |
919 | * If the timer was reserved by platform code, | |
920 | * then make timer unavailable for opens. | |
921 | */ | |
922 | if (hdp->hd_state & (1 << i)) { | |
923 | devp->hd_flags = HPET_OPEN; | |
924 | continue; | |
925 | } | |
926 | ||
927 | init_waitqueue_head(&devp->hd_waitqueue); | |
928 | } | |
929 | ||
930 | hpetp->hp_delta = hpet_calibrate(hpetp); | |
0aa366f3 | 931 | |
3b2b64fd LT |
932 | /* This clocksource driver currently only works on ia64 */ |
933 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
934 | if (!hpet_clocksource) { |
935 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | |
936 | CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); | |
937 | clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, | |
938 | clocksource_hpet.shift); | |
939 | clocksource_register(&clocksource_hpet); | |
940 | hpetp->hp_clocksource = &clocksource_hpet; | |
941 | hpet_clocksource = &clocksource_hpet; | |
942 | } | |
3b2b64fd | 943 | #endif |
1da177e4 LT |
944 | |
945 | return 0; | |
946 | } | |
947 | ||
948 | static acpi_status hpet_resources(struct acpi_resource *res, void *data) | |
949 | { | |
950 | struct hpet_data *hdp; | |
951 | acpi_status status; | |
952 | struct acpi_resource_address64 addr; | |
1da177e4 LT |
953 | |
954 | hdp = data; | |
955 | ||
956 | status = acpi_resource_to_address64(res, &addr); | |
957 | ||
958 | if (ACPI_SUCCESS(status)) { | |
50eca3eb | 959 | hdp->hd_phys_address = addr.minimum; |
9224a867 | 960 | hdp->hd_address = ioremap(addr.minimum, addr.address_length); |
1da177e4 | 961 | |
3e6716e7 | 962 | if (hpet_is_known(hdp)) { |
3e6716e7 | 963 | iounmap(hdp->hd_address); |
78e1ca49 | 964 | return AE_ALREADY_EXISTS; |
3e6716e7 | 965 | } |
50eca3eb BM |
966 | } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
967 | struct acpi_resource_fixed_memory32 *fixmem32; | |
757c4724 RD |
968 | |
969 | fixmem32 = &res->data.fixed_memory32; | |
970 | if (!fixmem32) | |
78e1ca49 | 971 | return AE_NO_MEMORY; |
757c4724 | 972 | |
50eca3eb BM |
973 | hdp->hd_phys_address = fixmem32->address; |
974 | hdp->hd_address = ioremap(fixmem32->address, | |
757c4724 RD |
975 | HPET_RANGE_SIZE); |
976 | ||
3e6716e7 | 977 | if (hpet_is_known(hdp)) { |
3e6716e7 | 978 | iounmap(hdp->hd_address); |
78e1ca49 | 979 | return AE_ALREADY_EXISTS; |
3e6716e7 | 980 | } |
50eca3eb BM |
981 | } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
982 | struct acpi_resource_extended_irq *irqp; | |
be5efffb | 983 | int i, irq; |
1da177e4 LT |
984 | |
985 | irqp = &res->data.extended_irq; | |
986 | ||
be5efffb | 987 | for (i = 0; i < irqp->interrupt_count; i++) { |
a2f809b0 | 988 | irq = acpi_register_gsi(NULL, irqp->interrupts[i], |
be5efffb BH |
989 | irqp->triggering, irqp->polarity); |
990 | if (irq < 0) | |
991 | return AE_ERROR; | |
992 | ||
993 | hdp->hd_irq[hdp->hd_nirqs] = irq; | |
994 | hdp->hd_nirqs++; | |
1da177e4 LT |
995 | } |
996 | } | |
997 | ||
998 | return AE_OK; | |
999 | } | |
1000 | ||
1001 | static int hpet_acpi_add(struct acpi_device *device) | |
1002 | { | |
1003 | acpi_status result; | |
1004 | struct hpet_data data; | |
1005 | ||
1006 | memset(&data, 0, sizeof(data)); | |
1007 | ||
1008 | result = | |
1009 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | |
1010 | hpet_resources, &data); | |
1011 | ||
1012 | if (ACPI_FAILURE(result)) | |
1013 | return -ENODEV; | |
1014 | ||
1015 | if (!data.hd_address || !data.hd_nirqs) { | |
a56d5318 JS |
1016 | if (data.hd_address) |
1017 | iounmap(data.hd_address); | |
bf9d8929 | 1018 | printk("%s: no address or irqs in _CRS\n", __func__); |
1da177e4 LT |
1019 | return -ENODEV; |
1020 | } | |
1021 | ||
1022 | return hpet_alloc(&data); | |
1023 | } | |
1024 | ||
1025 | static int hpet_acpi_remove(struct acpi_device *device, int type) | |
1026 | { | |
0aa366f3 | 1027 | /* XXX need to unregister clocksource, dealloc mem, etc */ |
1da177e4 LT |
1028 | return -EINVAL; |
1029 | } | |
1030 | ||
1ba90e3a TR |
1031 | static const struct acpi_device_id hpet_device_ids[] = { |
1032 | {"PNP0103", 0}, | |
1033 | {"", 0}, | |
1034 | }; | |
1035 | MODULE_DEVICE_TABLE(acpi, hpet_device_ids); | |
1036 | ||
1da177e4 LT |
1037 | static struct acpi_driver hpet_acpi_driver = { |
1038 | .name = "hpet", | |
1ba90e3a | 1039 | .ids = hpet_device_ids, |
1da177e4 LT |
1040 | .ops = { |
1041 | .add = hpet_acpi_add, | |
1042 | .remove = hpet_acpi_remove, | |
1043 | }, | |
1044 | }; | |
1045 | ||
1046 | static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; | |
1047 | ||
1048 | static int __init hpet_init(void) | |
1049 | { | |
1050 | int result; | |
1051 | ||
1052 | result = misc_register(&hpet_misc); | |
1053 | if (result < 0) | |
1054 | return -ENODEV; | |
1055 | ||
0b4d4147 | 1056 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
1057 | |
1058 | result = acpi_bus_register_driver(&hpet_acpi_driver); | |
1059 | if (result < 0) { | |
1060 | if (sysctl_header) | |
1061 | unregister_sysctl_table(sysctl_header); | |
1062 | misc_deregister(&hpet_misc); | |
1063 | return result; | |
1064 | } | |
1065 | ||
1066 | return 0; | |
1067 | } | |
1068 | ||
1069 | static void __exit hpet_exit(void) | |
1070 | { | |
1071 | acpi_bus_unregister_driver(&hpet_acpi_driver); | |
1072 | ||
1073 | if (sysctl_header) | |
1074 | unregister_sysctl_table(sysctl_header); | |
1075 | misc_deregister(&hpet_misc); | |
1076 | ||
1077 | return; | |
1078 | } | |
1079 | ||
1080 | module_init(hpet_init); | |
1081 | module_exit(hpet_exit); | |
1082 | MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); | |
1083 | MODULE_LICENSE("GPL"); |