Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Intel & MS High Precision Event Timer Implementation. | |
3 | * | |
4 | * Copyright (C) 2003 Intel Corporation | |
5 | * Venki Pallipadi | |
6 | * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. | |
7 | * Bob Picco <robert.picco@hp.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
48b81880 | 17 | #include <linux/smp_lock.h> |
1da177e4 LT |
18 | #include <linux/types.h> |
19 | #include <linux/miscdevice.h> | |
20 | #include <linux/major.h> | |
21 | #include <linux/ioport.h> | |
22 | #include <linux/fcntl.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/poll.h> | |
f23f6e08 | 25 | #include <linux/mm.h> |
1da177e4 LT |
26 | #include <linux/proc_fs.h> |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/sysctl.h> | |
29 | #include <linux/wait.h> | |
30 | #include <linux/bcd.h> | |
31 | #include <linux/seq_file.h> | |
32 | #include <linux/bitops.h> | |
0aa366f3 | 33 | #include <linux/clocksource.h> |
1da177e4 LT |
34 | |
35 | #include <asm/current.h> | |
36 | #include <asm/uaccess.h> | |
37 | #include <asm/system.h> | |
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/div64.h> | |
41 | ||
42 | #include <linux/acpi.h> | |
43 | #include <acpi/acpi_bus.h> | |
44 | #include <linux/hpet.h> | |
45 | ||
46 | /* | |
47 | * The High Precision Event Timer driver. | |
48 | * This driver is closely modelled after the rtc.c driver. | |
e45f2c07 | 49 | * http://www.intel.com/hardwaredesign/hpetspec_1.pdf |
1da177e4 LT |
50 | */ |
51 | #define HPET_USER_FREQ (64) | |
52 | #define HPET_DRIFT (500) | |
53 | ||
757c4724 RD |
54 | #define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
55 | ||
64a76f66 DB |
56 | |
57 | /* WARNING -- don't get confused. These macros are never used | |
58 | * to write the (single) counter, and rarely to read it. | |
59 | * They're badly named; to fix, someday. | |
60 | */ | |
0aa366f3 TL |
61 | #if BITS_PER_LONG == 64 |
62 | #define write_counter(V, MC) writeq(V, MC) | |
63 | #define read_counter(MC) readq(MC) | |
64 | #else | |
65 | #define write_counter(V, MC) writel(V, MC) | |
66 | #define read_counter(MC) readl(MC) | |
67 | #endif | |
68 | ||
642d30bb | 69 | static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
1da177e4 | 70 | |
3dffec45 ÇO |
71 | /* This clocksource driver currently only works on ia64 */ |
72 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
73 | static void __iomem *hpet_mctr; |
74 | ||
8e19608e | 75 | static cycle_t read_hpet(struct clocksource *cs) |
0aa366f3 TL |
76 | { |
77 | return (cycle_t)read_counter((void __iomem *)hpet_mctr); | |
78 | } | |
79 | ||
80 | static struct clocksource clocksource_hpet = { | |
81 | .name = "hpet", | |
82 | .rating = 250, | |
83 | .read = read_hpet, | |
712aaa1c | 84 | .mask = CLOCKSOURCE_MASK(64), |
64a76f66 | 85 | .mult = 0, /* to be calculated */ |
0aa366f3 TL |
86 | .shift = 10, |
87 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
88 | }; | |
89 | static struct clocksource *hpet_clocksource; | |
3dffec45 | 90 | #endif |
0aa366f3 | 91 | |
1da177e4 LT |
92 | /* A lock for concurrent access by app and isr hpet activity. */ |
93 | static DEFINE_SPINLOCK(hpet_lock); | |
1da177e4 LT |
94 | |
95 | #define HPET_DEV_NAME (7) | |
96 | ||
97 | struct hpet_dev { | |
98 | struct hpets *hd_hpets; | |
99 | struct hpet __iomem *hd_hpet; | |
100 | struct hpet_timer __iomem *hd_timer; | |
101 | unsigned long hd_ireqfreq; | |
102 | unsigned long hd_irqdata; | |
103 | wait_queue_head_t hd_waitqueue; | |
104 | struct fasync_struct *hd_async_queue; | |
1da177e4 LT |
105 | unsigned int hd_flags; |
106 | unsigned int hd_irq; | |
107 | unsigned int hd_hdwirq; | |
108 | char hd_name[HPET_DEV_NAME]; | |
109 | }; | |
110 | ||
111 | struct hpets { | |
112 | struct hpets *hp_next; | |
113 | struct hpet __iomem *hp_hpet; | |
114 | unsigned long hp_hpet_phys; | |
0aa366f3 | 115 | struct clocksource *hp_clocksource; |
ba3f213f | 116 | unsigned long long hp_tick_freq; |
1da177e4 LT |
117 | unsigned long hp_delta; |
118 | unsigned int hp_ntimer; | |
119 | unsigned int hp_which; | |
120 | struct hpet_dev hp_dev[1]; | |
121 | }; | |
122 | ||
123 | static struct hpets *hpets; | |
124 | ||
125 | #define HPET_OPEN 0x0001 | |
126 | #define HPET_IE 0x0002 /* interrupt enabled */ | |
127 | #define HPET_PERIODIC 0x0004 | |
0d290861 | 128 | #define HPET_SHARED_IRQ 0x0008 |
1da177e4 | 129 | |
1da177e4 LT |
130 | |
131 | #ifndef readq | |
887c27f3 | 132 | static inline unsigned long long readq(void __iomem *addr) |
1da177e4 LT |
133 | { |
134 | return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); | |
135 | } | |
136 | #endif | |
137 | ||
138 | #ifndef writeq | |
887c27f3 | 139 | static inline void writeq(unsigned long long v, void __iomem *addr) |
1da177e4 LT |
140 | { |
141 | writel(v & 0xffffffff, addr); | |
142 | writel(v >> 32, addr + 4); | |
143 | } | |
144 | #endif | |
145 | ||
7d12e780 | 146 | static irqreturn_t hpet_interrupt(int irq, void *data) |
1da177e4 LT |
147 | { |
148 | struct hpet_dev *devp; | |
149 | unsigned long isr; | |
150 | ||
151 | devp = data; | |
0d290861 CL |
152 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
153 | ||
154 | if ((devp->hd_flags & HPET_SHARED_IRQ) && | |
155 | !(isr & readl(&devp->hd_hpet->hpet_isr))) | |
156 | return IRQ_NONE; | |
1da177e4 LT |
157 | |
158 | spin_lock(&hpet_lock); | |
159 | devp->hd_irqdata++; | |
160 | ||
161 | /* | |
162 | * For non-periodic timers, increment the accumulator. | |
163 | * This has the effect of treating non-periodic like periodic. | |
164 | */ | |
165 | if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { | |
166 | unsigned long m, t; | |
167 | ||
168 | t = devp->hd_ireqfreq; | |
ae21cf92 NC |
169 | m = read_counter(&devp->hd_timer->hpet_compare); |
170 | write_counter(t + m, &devp->hd_timer->hpet_compare); | |
1da177e4 LT |
171 | } |
172 | ||
0d290861 CL |
173 | if (devp->hd_flags & HPET_SHARED_IRQ) |
174 | writel(isr, &devp->hd_hpet->hpet_isr); | |
1da177e4 LT |
175 | spin_unlock(&hpet_lock); |
176 | ||
1da177e4 LT |
177 | wake_up_interruptible(&devp->hd_waitqueue); |
178 | ||
179 | kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); | |
180 | ||
181 | return IRQ_HANDLED; | |
182 | } | |
183 | ||
70ef6d59 KH |
184 | static void hpet_timer_set_irq(struct hpet_dev *devp) |
185 | { | |
186 | unsigned long v; | |
187 | int irq, gsi; | |
188 | struct hpet_timer __iomem *timer; | |
189 | ||
190 | spin_lock_irq(&hpet_lock); | |
191 | if (devp->hd_hdwirq) { | |
192 | spin_unlock_irq(&hpet_lock); | |
193 | return; | |
194 | } | |
195 | ||
196 | timer = devp->hd_timer; | |
197 | ||
198 | /* we prefer level triggered mode */ | |
199 | v = readl(&timer->hpet_config); | |
200 | if (!(v & Tn_INT_TYPE_CNF_MASK)) { | |
201 | v |= Tn_INT_TYPE_CNF_MASK; | |
202 | writel(v, &timer->hpet_config); | |
203 | } | |
204 | spin_unlock_irq(&hpet_lock); | |
205 | ||
206 | v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> | |
207 | Tn_INT_ROUTE_CAP_SHIFT; | |
208 | ||
209 | /* | |
210 | * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by | |
211 | * legacy device. In IO APIC mode, we skip all the legacy IRQS. | |
212 | */ | |
213 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) | |
214 | v &= ~0xf3df; | |
215 | else | |
216 | v &= ~0xffff; | |
217 | ||
e5d61511 | 218 | for_each_set_bit(irq, &v, HPET_MAX_IRQ) { |
1f45f562 | 219 | if (irq >= nr_irqs) { |
70ef6d59 KH |
220 | irq = HPET_MAX_IRQ; |
221 | break; | |
222 | } | |
223 | ||
a2f809b0 | 224 | gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, |
70ef6d59 KH |
225 | ACPI_ACTIVE_LOW); |
226 | if (gsi > 0) | |
227 | break; | |
228 | ||
229 | /* FIXME: Setup interrupt source table */ | |
230 | } | |
231 | ||
232 | if (irq < HPET_MAX_IRQ) { | |
233 | spin_lock_irq(&hpet_lock); | |
234 | v = readl(&timer->hpet_config); | |
235 | v |= irq << Tn_INT_ROUTE_CNF_SHIFT; | |
236 | writel(v, &timer->hpet_config); | |
237 | devp->hd_hdwirq = gsi; | |
238 | spin_unlock_irq(&hpet_lock); | |
239 | } | |
240 | return; | |
241 | } | |
242 | ||
1da177e4 LT |
243 | static int hpet_open(struct inode *inode, struct file *file) |
244 | { | |
245 | struct hpet_dev *devp; | |
246 | struct hpets *hpetp; | |
247 | int i; | |
248 | ||
249 | if (file->f_mode & FMODE_WRITE) | |
250 | return -EINVAL; | |
251 | ||
48b81880 | 252 | lock_kernel(); |
1da177e4 LT |
253 | spin_lock_irq(&hpet_lock); |
254 | ||
255 | for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) | |
256 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
64a76f66 | 257 | if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) |
1da177e4 LT |
258 | continue; |
259 | else { | |
260 | devp = &hpetp->hp_dev[i]; | |
261 | break; | |
262 | } | |
263 | ||
264 | if (!devp) { | |
265 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 266 | unlock_kernel(); |
1da177e4 LT |
267 | return -EBUSY; |
268 | } | |
269 | ||
270 | file->private_data = devp; | |
271 | devp->hd_irqdata = 0; | |
272 | devp->hd_flags |= HPET_OPEN; | |
273 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 274 | unlock_kernel(); |
1da177e4 | 275 | |
70ef6d59 KH |
276 | hpet_timer_set_irq(devp); |
277 | ||
1da177e4 LT |
278 | return 0; |
279 | } | |
280 | ||
281 | static ssize_t | |
282 | hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) | |
283 | { | |
284 | DECLARE_WAITQUEUE(wait, current); | |
285 | unsigned long data; | |
286 | ssize_t retval; | |
287 | struct hpet_dev *devp; | |
288 | ||
289 | devp = file->private_data; | |
290 | if (!devp->hd_ireqfreq) | |
291 | return -EIO; | |
292 | ||
293 | if (count < sizeof(unsigned long)) | |
294 | return -EINVAL; | |
295 | ||
296 | add_wait_queue(&devp->hd_waitqueue, &wait); | |
297 | ||
298 | for ( ; ; ) { | |
299 | set_current_state(TASK_INTERRUPTIBLE); | |
300 | ||
301 | spin_lock_irq(&hpet_lock); | |
302 | data = devp->hd_irqdata; | |
303 | devp->hd_irqdata = 0; | |
304 | spin_unlock_irq(&hpet_lock); | |
305 | ||
306 | if (data) | |
307 | break; | |
308 | else if (file->f_flags & O_NONBLOCK) { | |
309 | retval = -EAGAIN; | |
310 | goto out; | |
311 | } else if (signal_pending(current)) { | |
312 | retval = -ERESTARTSYS; | |
313 | goto out; | |
314 | } | |
315 | schedule(); | |
316 | } | |
317 | ||
318 | retval = put_user(data, (unsigned long __user *)buf); | |
319 | if (!retval) | |
320 | retval = sizeof(unsigned long); | |
321 | out: | |
322 | __set_current_state(TASK_RUNNING); | |
323 | remove_wait_queue(&devp->hd_waitqueue, &wait); | |
324 | ||
325 | return retval; | |
326 | } | |
327 | ||
328 | static unsigned int hpet_poll(struct file *file, poll_table * wait) | |
329 | { | |
330 | unsigned long v; | |
331 | struct hpet_dev *devp; | |
332 | ||
333 | devp = file->private_data; | |
334 | ||
335 | if (!devp->hd_ireqfreq) | |
336 | return 0; | |
337 | ||
338 | poll_wait(file, &devp->hd_waitqueue, wait); | |
339 | ||
340 | spin_lock_irq(&hpet_lock); | |
341 | v = devp->hd_irqdata; | |
342 | spin_unlock_irq(&hpet_lock); | |
343 | ||
344 | if (v != 0) | |
345 | return POLLIN | POLLRDNORM; | |
346 | ||
347 | return 0; | |
348 | } | |
349 | ||
350 | static int hpet_mmap(struct file *file, struct vm_area_struct *vma) | |
351 | { | |
352 | #ifdef CONFIG_HPET_MMAP | |
353 | struct hpet_dev *devp; | |
354 | unsigned long addr; | |
355 | ||
356 | if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) | |
357 | return -EINVAL; | |
358 | ||
359 | devp = file->private_data; | |
360 | addr = devp->hd_hpets->hp_hpet_phys; | |
361 | ||
362 | if (addr & (PAGE_SIZE - 1)) | |
363 | return -ENOSYS; | |
364 | ||
365 | vma->vm_flags |= VM_IO; | |
366 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
1da177e4 LT |
367 | |
368 | if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, | |
369 | PAGE_SIZE, vma->vm_page_prot)) { | |
3e6716e7 | 370 | printk(KERN_ERR "%s: io_remap_pfn_range failed\n", |
bf9d8929 | 371 | __func__); |
1da177e4 LT |
372 | return -EAGAIN; |
373 | } | |
374 | ||
375 | return 0; | |
376 | #else | |
377 | return -ENOSYS; | |
378 | #endif | |
379 | } | |
380 | ||
381 | static int hpet_fasync(int fd, struct file *file, int on) | |
382 | { | |
383 | struct hpet_dev *devp; | |
384 | ||
385 | devp = file->private_data; | |
386 | ||
387 | if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) | |
388 | return 0; | |
389 | else | |
390 | return -EIO; | |
391 | } | |
392 | ||
393 | static int hpet_release(struct inode *inode, struct file *file) | |
394 | { | |
395 | struct hpet_dev *devp; | |
396 | struct hpet_timer __iomem *timer; | |
397 | int irq = 0; | |
398 | ||
399 | devp = file->private_data; | |
400 | timer = devp->hd_timer; | |
401 | ||
402 | spin_lock_irq(&hpet_lock); | |
403 | ||
404 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
405 | &timer->hpet_config); | |
406 | ||
407 | irq = devp->hd_irq; | |
408 | devp->hd_irq = 0; | |
409 | ||
410 | devp->hd_ireqfreq = 0; | |
411 | ||
412 | if (devp->hd_flags & HPET_PERIODIC | |
413 | && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
414 | unsigned long v; | |
415 | ||
416 | v = readq(&timer->hpet_config); | |
417 | v ^= Tn_TYPE_CNF_MASK; | |
418 | writeq(v, &timer->hpet_config); | |
419 | } | |
420 | ||
421 | devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); | |
422 | spin_unlock_irq(&hpet_lock); | |
423 | ||
424 | if (irq) | |
425 | free_irq(irq, devp); | |
426 | ||
1da177e4 LT |
427 | file->private_data = NULL; |
428 | return 0; | |
429 | } | |
430 | ||
431 | static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int); | |
432 | ||
433 | static int | |
434 | hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |
435 | unsigned long arg) | |
436 | { | |
437 | struct hpet_dev *devp; | |
438 | ||
439 | devp = file->private_data; | |
440 | return hpet_ioctl_common(devp, cmd, arg, 0); | |
441 | } | |
442 | ||
443 | static int hpet_ioctl_ieon(struct hpet_dev *devp) | |
444 | { | |
445 | struct hpet_timer __iomem *timer; | |
446 | struct hpet __iomem *hpet; | |
447 | struct hpets *hpetp; | |
448 | int irq; | |
449 | unsigned long g, v, t, m; | |
450 | unsigned long flags, isr; | |
451 | ||
452 | timer = devp->hd_timer; | |
453 | hpet = devp->hd_hpet; | |
454 | hpetp = devp->hd_hpets; | |
455 | ||
9090e6db CL |
456 | if (!devp->hd_ireqfreq) |
457 | return -EIO; | |
458 | ||
1da177e4 LT |
459 | spin_lock_irq(&hpet_lock); |
460 | ||
461 | if (devp->hd_flags & HPET_IE) { | |
462 | spin_unlock_irq(&hpet_lock); | |
463 | return -EBUSY; | |
464 | } | |
465 | ||
466 | devp->hd_flags |= HPET_IE; | |
0d290861 CL |
467 | |
468 | if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) | |
469 | devp->hd_flags |= HPET_SHARED_IRQ; | |
1da177e4 LT |
470 | spin_unlock_irq(&hpet_lock); |
471 | ||
1da177e4 LT |
472 | irq = devp->hd_hdwirq; |
473 | ||
474 | if (irq) { | |
0d290861 | 475 | unsigned long irq_flags; |
1da177e4 | 476 | |
0d290861 CL |
477 | sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
478 | irq_flags = devp->hd_flags & HPET_SHARED_IRQ | |
0f2ed4c6 | 479 | ? IRQF_SHARED : IRQF_DISABLED; |
0d290861 CL |
480 | if (request_irq(irq, hpet_interrupt, irq_flags, |
481 | devp->hd_name, (void *)devp)) { | |
1da177e4 LT |
482 | printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
483 | irq = 0; | |
484 | } | |
485 | } | |
486 | ||
487 | if (irq == 0) { | |
488 | spin_lock_irq(&hpet_lock); | |
489 | devp->hd_flags ^= HPET_IE; | |
490 | spin_unlock_irq(&hpet_lock); | |
491 | return -EIO; | |
492 | } | |
493 | ||
494 | devp->hd_irq = irq; | |
495 | t = devp->hd_ireqfreq; | |
496 | v = readq(&timer->hpet_config); | |
64a76f66 DB |
497 | |
498 | /* 64-bit comparators are not yet supported through the ioctls, | |
499 | * so force this into 32-bit mode if it supports both modes | |
500 | */ | |
501 | g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; | |
1da177e4 LT |
502 | |
503 | if (devp->hd_flags & HPET_PERIODIC) { | |
1da177e4 | 504 | g |= Tn_TYPE_CNF_MASK; |
ae21cf92 | 505 | v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; |
1da177e4 LT |
506 | writeq(v, &timer->hpet_config); |
507 | local_irq_save(flags); | |
64a76f66 | 508 | |
ae21cf92 NC |
509 | /* |
510 | * NOTE: First we modify the hidden accumulator | |
64a76f66 DB |
511 | * register supported by periodic-capable comparators. |
512 | * We never want to modify the (single) counter; that | |
ae21cf92 NC |
513 | * would affect all the comparators. The value written |
514 | * is the counter value when the first interrupt is due. | |
64a76f66 | 515 | */ |
1da177e4 LT |
516 | m = read_counter(&hpet->hpet_mc); |
517 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
ae21cf92 NC |
518 | /* |
519 | * Then we modify the comparator, indicating the period | |
520 | * for subsequent interrupt. | |
521 | */ | |
522 | write_counter(t, &timer->hpet_compare); | |
1da177e4 LT |
523 | } else { |
524 | local_irq_save(flags); | |
525 | m = read_counter(&hpet->hpet_mc); | |
526 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
527 | } | |
528 | ||
0d290861 | 529 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
3d5640d1 | 530 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
0d290861 CL |
531 | writel(isr, &hpet->hpet_isr); |
532 | } | |
1da177e4 LT |
533 | writeq(g, &timer->hpet_config); |
534 | local_irq_restore(flags); | |
535 | ||
536 | return 0; | |
537 | } | |
538 | ||
ba3f213f CL |
539 | /* converts Hz to number of timer ticks */ |
540 | static inline unsigned long hpet_time_div(struct hpets *hpets, | |
541 | unsigned long dis) | |
1da177e4 | 542 | { |
ba3f213f | 543 | unsigned long long m; |
1da177e4 | 544 | |
ba3f213f | 545 | m = hpets->hp_tick_freq + (dis >> 1); |
1da177e4 | 546 | do_div(m, dis); |
1da177e4 LT |
547 | return (unsigned long)m; |
548 | } | |
549 | ||
550 | static int | |
551 | hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel) | |
552 | { | |
553 | struct hpet_timer __iomem *timer; | |
554 | struct hpet __iomem *hpet; | |
555 | struct hpets *hpetp; | |
556 | int err; | |
557 | unsigned long v; | |
558 | ||
559 | switch (cmd) { | |
560 | case HPET_IE_OFF: | |
561 | case HPET_INFO: | |
562 | case HPET_EPI: | |
563 | case HPET_DPI: | |
564 | case HPET_IRQFREQ: | |
565 | timer = devp->hd_timer; | |
566 | hpet = devp->hd_hpet; | |
567 | hpetp = devp->hd_hpets; | |
568 | break; | |
569 | case HPET_IE_ON: | |
570 | return hpet_ioctl_ieon(devp); | |
571 | default: | |
572 | return -EINVAL; | |
573 | } | |
574 | ||
575 | err = 0; | |
576 | ||
577 | switch (cmd) { | |
578 | case HPET_IE_OFF: | |
579 | if ((devp->hd_flags & HPET_IE) == 0) | |
580 | break; | |
581 | v = readq(&timer->hpet_config); | |
582 | v &= ~Tn_INT_ENB_CNF_MASK; | |
583 | writeq(v, &timer->hpet_config); | |
584 | if (devp->hd_irq) { | |
585 | free_irq(devp->hd_irq, devp); | |
586 | devp->hd_irq = 0; | |
587 | } | |
588 | devp->hd_flags ^= HPET_IE; | |
589 | break; | |
590 | case HPET_INFO: | |
591 | { | |
592 | struct hpet_info info; | |
593 | ||
af95eade CL |
594 | if (devp->hd_ireqfreq) |
595 | info.hi_ireqfreq = | |
596 | hpet_time_div(hpetp, devp->hd_ireqfreq); | |
597 | else | |
598 | info.hi_ireqfreq = 0; | |
1da177e4 LT |
599 | info.hi_flags = |
600 | readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; | |
c860ed9f CL |
601 | info.hi_hpet = hpetp->hp_which; |
602 | info.hi_timer = devp - hpetp->hp_dev; | |
8e8505be CL |
603 | if (kernel) |
604 | memcpy((void *)arg, &info, sizeof(info)); | |
605 | else | |
606 | if (copy_to_user((void __user *)arg, &info, | |
607 | sizeof(info))) | |
608 | err = -EFAULT; | |
1da177e4 LT |
609 | break; |
610 | } | |
611 | case HPET_EPI: | |
612 | v = readq(&timer->hpet_config); | |
613 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
614 | err = -ENXIO; | |
615 | break; | |
616 | } | |
617 | devp->hd_flags |= HPET_PERIODIC; | |
618 | break; | |
619 | case HPET_DPI: | |
620 | v = readq(&timer->hpet_config); | |
621 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
622 | err = -ENXIO; | |
623 | break; | |
624 | } | |
625 | if (devp->hd_flags & HPET_PERIODIC && | |
626 | readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
627 | v = readq(&timer->hpet_config); | |
628 | v ^= Tn_TYPE_CNF_MASK; | |
629 | writeq(v, &timer->hpet_config); | |
630 | } | |
631 | devp->hd_flags &= ~HPET_PERIODIC; | |
632 | break; | |
633 | case HPET_IRQFREQ: | |
634 | if (!kernel && (arg > hpet_max_freq) && | |
635 | !capable(CAP_SYS_RESOURCE)) { | |
636 | err = -EACCES; | |
637 | break; | |
638 | } | |
639 | ||
189e2dd1 | 640 | if (!arg) { |
1da177e4 LT |
641 | err = -EINVAL; |
642 | break; | |
643 | } | |
644 | ||
ba3f213f | 645 | devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
1da177e4 LT |
646 | } |
647 | ||
648 | return err; | |
649 | } | |
650 | ||
62322d25 | 651 | static const struct file_operations hpet_fops = { |
1da177e4 LT |
652 | .owner = THIS_MODULE, |
653 | .llseek = no_llseek, | |
654 | .read = hpet_read, | |
655 | .poll = hpet_poll, | |
656 | .ioctl = hpet_ioctl, | |
657 | .open = hpet_open, | |
658 | .release = hpet_release, | |
659 | .fasync = hpet_fasync, | |
660 | .mmap = hpet_mmap, | |
661 | }; | |
662 | ||
3e6716e7 RD |
663 | static int hpet_is_known(struct hpet_data *hdp) |
664 | { | |
665 | struct hpets *hpetp; | |
666 | ||
667 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
668 | if (hpetp->hp_hpet_phys == hdp->hd_phys_address) | |
669 | return 1; | |
670 | ||
671 | return 0; | |
672 | } | |
673 | ||
1da177e4 LT |
674 | static ctl_table hpet_table[] = { |
675 | { | |
1da177e4 LT |
676 | .procname = "max-user-freq", |
677 | .data = &hpet_max_freq, | |
678 | .maxlen = sizeof(int), | |
679 | .mode = 0644, | |
6d456111 | 680 | .proc_handler = proc_dointvec, |
1da177e4 | 681 | }, |
894d2491 | 682 | {} |
1da177e4 LT |
683 | }; |
684 | ||
685 | static ctl_table hpet_root[] = { | |
686 | { | |
1da177e4 LT |
687 | .procname = "hpet", |
688 | .maxlen = 0, | |
689 | .mode = 0555, | |
690 | .child = hpet_table, | |
691 | }, | |
894d2491 | 692 | {} |
1da177e4 LT |
693 | }; |
694 | ||
695 | static ctl_table dev_root[] = { | |
696 | { | |
1da177e4 LT |
697 | .procname = "dev", |
698 | .maxlen = 0, | |
699 | .mode = 0555, | |
700 | .child = hpet_root, | |
701 | }, | |
894d2491 | 702 | {} |
1da177e4 LT |
703 | }; |
704 | ||
705 | static struct ctl_table_header *sysctl_header; | |
706 | ||
1da177e4 LT |
707 | /* |
708 | * Adjustment for when arming the timer with | |
709 | * initial conditions. That is, main counter | |
710 | * ticks expired before interrupts are enabled. | |
711 | */ | |
712 | #define TICK_CALIBRATE (1000UL) | |
713 | ||
303d379c | 714 | static unsigned long __hpet_calibrate(struct hpets *hpetp) |
1da177e4 LT |
715 | { |
716 | struct hpet_timer __iomem *timer = NULL; | |
717 | unsigned long t, m, count, i, flags, start; | |
718 | struct hpet_dev *devp; | |
719 | int j; | |
720 | struct hpet __iomem *hpet; | |
721 | ||
722 | for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) | |
723 | if ((devp->hd_flags & HPET_OPEN) == 0) { | |
724 | timer = devp->hd_timer; | |
725 | break; | |
726 | } | |
727 | ||
728 | if (!timer) | |
729 | return 0; | |
730 | ||
3d5640d1 | 731 | hpet = hpetp->hp_hpet; |
1da177e4 LT |
732 | t = read_counter(&timer->hpet_compare); |
733 | ||
734 | i = 0; | |
ba3f213f | 735 | count = hpet_time_div(hpetp, TICK_CALIBRATE); |
1da177e4 LT |
736 | |
737 | local_irq_save(flags); | |
738 | ||
739 | start = read_counter(&hpet->hpet_mc); | |
740 | ||
741 | do { | |
742 | m = read_counter(&hpet->hpet_mc); | |
743 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
744 | } while (i++, (m - start) < count); | |
745 | ||
746 | local_irq_restore(flags); | |
747 | ||
748 | return (m - start) / i; | |
749 | } | |
750 | ||
303d379c YG |
751 | static unsigned long hpet_calibrate(struct hpets *hpetp) |
752 | { | |
753 | unsigned long ret = -1; | |
754 | unsigned long tmp; | |
755 | ||
756 | /* | |
757 | * Try to calibrate until return value becomes stable small value. | |
758 | * If SMI interruption occurs in calibration loop, the return value | |
759 | * will be big. This avoids its impact. | |
760 | */ | |
761 | for ( ; ; ) { | |
762 | tmp = __hpet_calibrate(hpetp); | |
763 | if (ret <= tmp) | |
764 | break; | |
765 | ret = tmp; | |
766 | } | |
767 | ||
768 | return ret; | |
769 | } | |
770 | ||
1da177e4 LT |
771 | int hpet_alloc(struct hpet_data *hdp) |
772 | { | |
5761d64b | 773 | u64 cap, mcfg; |
1da177e4 | 774 | struct hpet_dev *devp; |
5761d64b | 775 | u32 i, ntimer; |
1da177e4 LT |
776 | struct hpets *hpetp; |
777 | size_t siz; | |
778 | struct hpet __iomem *hpet; | |
3e6716e7 | 779 | static struct hpets *last = NULL; |
5761d64b | 780 | unsigned long period; |
ba3f213f | 781 | unsigned long long temp; |
f92a789d | 782 | u32 remainder; |
1da177e4 LT |
783 | |
784 | /* | |
785 | * hpet_alloc can be called by platform dependent code. | |
3e6716e7 RD |
786 | * If platform dependent code has allocated the hpet that |
787 | * ACPI has also reported, then we catch it here. | |
1da177e4 | 788 | */ |
3e6716e7 RD |
789 | if (hpet_is_known(hdp)) { |
790 | printk(KERN_DEBUG "%s: duplicate HPET ignored\n", | |
bf9d8929 | 791 | __func__); |
3e6716e7 RD |
792 | return 0; |
793 | } | |
1da177e4 LT |
794 | |
795 | siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * | |
796 | sizeof(struct hpet_dev)); | |
797 | ||
3e6716e7 | 798 | hpetp = kzalloc(siz, GFP_KERNEL); |
1da177e4 LT |
799 | |
800 | if (!hpetp) | |
801 | return -ENOMEM; | |
802 | ||
1da177e4 LT |
803 | hpetp->hp_which = hpet_nhpet++; |
804 | hpetp->hp_hpet = hdp->hd_address; | |
805 | hpetp->hp_hpet_phys = hdp->hd_phys_address; | |
806 | ||
807 | hpetp->hp_ntimer = hdp->hd_nirqs; | |
e3f37a54 | 808 | |
5761d64b TG |
809 | for (i = 0; i < hdp->hd_nirqs; i++) |
810 | hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; | |
37a47db8 | 811 | |
5761d64b | 812 | hpet = hpetp->hp_hpet; |
e3f37a54 | 813 | |
1da177e4 LT |
814 | cap = readq(&hpet->hpet_cap); |
815 | ||
816 | ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; | |
817 | ||
818 | if (hpetp->hp_ntimer != ntimer) { | |
819 | printk(KERN_WARNING "hpet: number irqs doesn't agree" | |
820 | " with number of timers\n"); | |
821 | kfree(hpetp); | |
822 | return -ENODEV; | |
823 | } | |
824 | ||
825 | if (last) | |
826 | last->hp_next = hpetp; | |
827 | else | |
828 | hpets = hpetp; | |
829 | ||
830 | last = hpetp; | |
831 | ||
ba3f213f CL |
832 | period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
833 | HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ | |
834 | temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ | |
835 | temp += period >> 1; /* round */ | |
836 | do_div(temp, period); | |
837 | hpetp->hp_tick_freq = temp; /* ticks per second */ | |
1da177e4 | 838 | |
3034d11c AK |
839 | printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
840 | hpetp->hp_which, hdp->hd_phys_address, | |
1da177e4 LT |
841 | hpetp->hp_ntimer > 1 ? "s" : ""); |
842 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
5761d64b | 843 | printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
1da177e4 LT |
844 | printk("\n"); |
845 | ||
f92a789d DB |
846 | temp = hpetp->hp_tick_freq; |
847 | remainder = do_div(temp, 1000000); | |
64a76f66 DB |
848 | printk(KERN_INFO |
849 | "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", | |
850 | hpetp->hp_which, hpetp->hp_ntimer, | |
851 | cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, | |
f92a789d | 852 | (unsigned) temp, remainder); |
1da177e4 LT |
853 | |
854 | mcfg = readq(&hpet->hpet_config); | |
855 | if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { | |
856 | write_counter(0L, &hpet->hpet_mc); | |
857 | mcfg |= HPET_ENABLE_CNF_MASK; | |
858 | writeq(mcfg, &hpet->hpet_config); | |
859 | } | |
860 | ||
642d30bb | 861 | for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
1da177e4 LT |
862 | struct hpet_timer __iomem *timer; |
863 | ||
864 | timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; | |
1da177e4 LT |
865 | |
866 | devp->hd_hpets = hpetp; | |
867 | devp->hd_hpet = hpet; | |
868 | devp->hd_timer = timer; | |
869 | ||
870 | /* | |
871 | * If the timer was reserved by platform code, | |
872 | * then make timer unavailable for opens. | |
873 | */ | |
874 | if (hdp->hd_state & (1 << i)) { | |
875 | devp->hd_flags = HPET_OPEN; | |
876 | continue; | |
877 | } | |
878 | ||
879 | init_waitqueue_head(&devp->hd_waitqueue); | |
880 | } | |
881 | ||
882 | hpetp->hp_delta = hpet_calibrate(hpetp); | |
0aa366f3 | 883 | |
3b2b64fd LT |
884 | /* This clocksource driver currently only works on ia64 */ |
885 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
886 | if (!hpet_clocksource) { |
887 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | |
888 | CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); | |
889 | clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, | |
890 | clocksource_hpet.shift); | |
891 | clocksource_register(&clocksource_hpet); | |
892 | hpetp->hp_clocksource = &clocksource_hpet; | |
893 | hpet_clocksource = &clocksource_hpet; | |
894 | } | |
3b2b64fd | 895 | #endif |
1da177e4 LT |
896 | |
897 | return 0; | |
898 | } | |
899 | ||
900 | static acpi_status hpet_resources(struct acpi_resource *res, void *data) | |
901 | { | |
902 | struct hpet_data *hdp; | |
903 | acpi_status status; | |
904 | struct acpi_resource_address64 addr; | |
1da177e4 LT |
905 | |
906 | hdp = data; | |
907 | ||
908 | status = acpi_resource_to_address64(res, &addr); | |
909 | ||
910 | if (ACPI_SUCCESS(status)) { | |
50eca3eb | 911 | hdp->hd_phys_address = addr.minimum; |
9224a867 | 912 | hdp->hd_address = ioremap(addr.minimum, addr.address_length); |
1da177e4 | 913 | |
3e6716e7 | 914 | if (hpet_is_known(hdp)) { |
3e6716e7 | 915 | iounmap(hdp->hd_address); |
78e1ca49 | 916 | return AE_ALREADY_EXISTS; |
3e6716e7 | 917 | } |
50eca3eb BM |
918 | } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
919 | struct acpi_resource_fixed_memory32 *fixmem32; | |
757c4724 RD |
920 | |
921 | fixmem32 = &res->data.fixed_memory32; | |
922 | if (!fixmem32) | |
78e1ca49 | 923 | return AE_NO_MEMORY; |
757c4724 | 924 | |
50eca3eb BM |
925 | hdp->hd_phys_address = fixmem32->address; |
926 | hdp->hd_address = ioremap(fixmem32->address, | |
757c4724 RD |
927 | HPET_RANGE_SIZE); |
928 | ||
3e6716e7 | 929 | if (hpet_is_known(hdp)) { |
3e6716e7 | 930 | iounmap(hdp->hd_address); |
78e1ca49 | 931 | return AE_ALREADY_EXISTS; |
3e6716e7 | 932 | } |
50eca3eb BM |
933 | } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
934 | struct acpi_resource_extended_irq *irqp; | |
be5efffb | 935 | int i, irq; |
1da177e4 LT |
936 | |
937 | irqp = &res->data.extended_irq; | |
938 | ||
be5efffb | 939 | for (i = 0; i < irqp->interrupt_count; i++) { |
a2f809b0 | 940 | irq = acpi_register_gsi(NULL, irqp->interrupts[i], |
be5efffb BH |
941 | irqp->triggering, irqp->polarity); |
942 | if (irq < 0) | |
943 | return AE_ERROR; | |
944 | ||
945 | hdp->hd_irq[hdp->hd_nirqs] = irq; | |
946 | hdp->hd_nirqs++; | |
1da177e4 LT |
947 | } |
948 | } | |
949 | ||
950 | return AE_OK; | |
951 | } | |
952 | ||
953 | static int hpet_acpi_add(struct acpi_device *device) | |
954 | { | |
955 | acpi_status result; | |
956 | struct hpet_data data; | |
957 | ||
958 | memset(&data, 0, sizeof(data)); | |
959 | ||
960 | result = | |
961 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | |
962 | hpet_resources, &data); | |
963 | ||
964 | if (ACPI_FAILURE(result)) | |
965 | return -ENODEV; | |
966 | ||
967 | if (!data.hd_address || !data.hd_nirqs) { | |
bf9d8929 | 968 | printk("%s: no address or irqs in _CRS\n", __func__); |
1da177e4 LT |
969 | return -ENODEV; |
970 | } | |
971 | ||
972 | return hpet_alloc(&data); | |
973 | } | |
974 | ||
975 | static int hpet_acpi_remove(struct acpi_device *device, int type) | |
976 | { | |
0aa366f3 | 977 | /* XXX need to unregister clocksource, dealloc mem, etc */ |
1da177e4 LT |
978 | return -EINVAL; |
979 | } | |
980 | ||
1ba90e3a TR |
981 | static const struct acpi_device_id hpet_device_ids[] = { |
982 | {"PNP0103", 0}, | |
983 | {"", 0}, | |
984 | }; | |
985 | MODULE_DEVICE_TABLE(acpi, hpet_device_ids); | |
986 | ||
1da177e4 LT |
987 | static struct acpi_driver hpet_acpi_driver = { |
988 | .name = "hpet", | |
1ba90e3a | 989 | .ids = hpet_device_ids, |
1da177e4 LT |
990 | .ops = { |
991 | .add = hpet_acpi_add, | |
992 | .remove = hpet_acpi_remove, | |
993 | }, | |
994 | }; | |
995 | ||
996 | static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; | |
997 | ||
998 | static int __init hpet_init(void) | |
999 | { | |
1000 | int result; | |
1001 | ||
1002 | result = misc_register(&hpet_misc); | |
1003 | if (result < 0) | |
1004 | return -ENODEV; | |
1005 | ||
0b4d4147 | 1006 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
1007 | |
1008 | result = acpi_bus_register_driver(&hpet_acpi_driver); | |
1009 | if (result < 0) { | |
1010 | if (sysctl_header) | |
1011 | unregister_sysctl_table(sysctl_header); | |
1012 | misc_deregister(&hpet_misc); | |
1013 | return result; | |
1014 | } | |
1015 | ||
1016 | return 0; | |
1017 | } | |
1018 | ||
1019 | static void __exit hpet_exit(void) | |
1020 | { | |
1021 | acpi_bus_unregister_driver(&hpet_acpi_driver); | |
1022 | ||
1023 | if (sysctl_header) | |
1024 | unregister_sysctl_table(sysctl_header); | |
1025 | misc_deregister(&hpet_misc); | |
1026 | ||
1027 | return; | |
1028 | } | |
1029 | ||
1030 | module_init(hpet_init); | |
1031 | module_exit(hpet_exit); | |
1032 | MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); | |
1033 | MODULE_LICENSE("GPL"); |