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1da177e4 | 1 | /* |
76832c28 | 2 | * Timer device implementation for SGI SN platforms. |
1da177e4 LT |
3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
76832c28 | 8 | * Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
9 | * |
10 | * This driver exports an API that should be supportable by any HPET or IA-PC | |
11 | * multimedia timer. The code below is currently specific to the SGI Altix | |
12 | * SHub RTC, however. | |
13 | * | |
14 | * 11/01/01 - jbarnes - initial revision | |
15 | * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion | |
16 | * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE | |
17 | * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt | |
18 | * support via the posix timer interface | |
19 | */ | |
20 | ||
21 | #include <linux/types.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/ioctl.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/errno.h> | |
27 | #include <linux/mm.h> | |
4e950f6f | 28 | #include <linux/fs.h> |
1da177e4 LT |
29 | #include <linux/mmtimer.h> |
30 | #include <linux/miscdevice.h> | |
31 | #include <linux/posix-timers.h> | |
32 | #include <linux/interrupt.h> | |
33 | ||
34 | #include <asm/uaccess.h> | |
35 | #include <asm/sn/addrs.h> | |
36 | #include <asm/sn/intr.h> | |
37 | #include <asm/sn/shub_mmr.h> | |
38 | #include <asm/sn/nodepda.h> | |
39 | #include <asm/sn/shubio.h> | |
40 | ||
41 | MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>"); | |
42 | MODULE_DESCRIPTION("SGI Altix RTC Timer"); | |
43 | MODULE_LICENSE("GPL"); | |
44 | ||
45 | /* name of the device, usually in /dev */ | |
46 | #define MMTIMER_NAME "mmtimer" | |
47 | #define MMTIMER_DESC "SGI Altix RTC Timer" | |
76832c28 | 48 | #define MMTIMER_VERSION "2.1" |
1da177e4 LT |
49 | |
50 | #define RTC_BITS 55 /* 55 bits for this implementation */ | |
51 | ||
52 | extern unsigned long sn_rtc_cycles_per_second; | |
53 | ||
54 | #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC)) | |
55 | ||
56 | #define rtc_time() (*RTC_COUNTER_ADDR) | |
57 | ||
58 | static int mmtimer_ioctl(struct inode *inode, struct file *file, | |
59 | unsigned int cmd, unsigned long arg); | |
60 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma); | |
61 | ||
62 | /* | |
63 | * Period in femtoseconds (10^-15 s) | |
64 | */ | |
65 | static unsigned long mmtimer_femtoperiod = 0; | |
66 | ||
62322d25 | 67 | static const struct file_operations mmtimer_fops = { |
1da177e4 LT |
68 | .owner = THIS_MODULE, |
69 | .mmap = mmtimer_mmap, | |
70 | .ioctl = mmtimer_ioctl, | |
71 | }; | |
72 | ||
73 | /* | |
74 | * We only have comparison registers RTC1-4 currently available per | |
75 | * node. RTC0 is used by SAL. | |
76 | */ | |
77 | #define NUM_COMPARATORS 3 | |
78 | /* Check for an RTC interrupt pending */ | |
79 | static int inline mmtimer_int_pending(int comparator) | |
80 | { | |
81 | if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) & | |
82 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator) | |
83 | return 1; | |
84 | else | |
85 | return 0; | |
86 | } | |
87 | /* Clear the RTC interrupt pending bit */ | |
88 | static void inline mmtimer_clr_int_pending(int comparator) | |
89 | { | |
90 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), | |
91 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator); | |
92 | } | |
93 | ||
94 | /* Setup timer on comparator RTC1 */ | |
95 | static void inline mmtimer_setup_int_0(u64 expires) | |
96 | { | |
97 | u64 val; | |
98 | ||
99 | /* Disable interrupt */ | |
100 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); | |
101 | ||
102 | /* Initialize comparator value */ | |
103 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L); | |
104 | ||
105 | /* Clear pending bit */ | |
106 | mmtimer_clr_int_pending(0); | |
107 | ||
108 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) | | |
109 | ((u64)cpu_physical_id(smp_processor_id()) << | |
110 | SH_RTC1_INT_CONFIG_PID_SHFT); | |
111 | ||
112 | /* Set configuration */ | |
113 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val); | |
114 | ||
115 | /* Enable RTC interrupts */ | |
116 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL); | |
117 | ||
118 | /* Initialize comparator value */ | |
119 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires); | |
120 | ||
121 | ||
122 | } | |
123 | ||
124 | /* Setup timer on comparator RTC2 */ | |
125 | static void inline mmtimer_setup_int_1(u64 expires) | |
126 | { | |
127 | u64 val; | |
128 | ||
129 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); | |
130 | ||
131 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L); | |
132 | ||
133 | mmtimer_clr_int_pending(1); | |
134 | ||
135 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) | | |
136 | ((u64)cpu_physical_id(smp_processor_id()) << | |
137 | SH_RTC2_INT_CONFIG_PID_SHFT); | |
138 | ||
139 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val); | |
140 | ||
141 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL); | |
142 | ||
143 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires); | |
144 | } | |
145 | ||
146 | /* Setup timer on comparator RTC3 */ | |
147 | static void inline mmtimer_setup_int_2(u64 expires) | |
148 | { | |
149 | u64 val; | |
150 | ||
151 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); | |
152 | ||
153 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L); | |
154 | ||
155 | mmtimer_clr_int_pending(2); | |
156 | ||
157 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) | | |
158 | ((u64)cpu_physical_id(smp_processor_id()) << | |
159 | SH_RTC3_INT_CONFIG_PID_SHFT); | |
160 | ||
161 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val); | |
162 | ||
163 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL); | |
164 | ||
165 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires); | |
166 | } | |
167 | ||
168 | /* | |
169 | * This function must be called with interrupts disabled and preemption off | |
170 | * in order to insure that the setup succeeds in a deterministic time frame. | |
171 | * It will check if the interrupt setup succeeded. | |
172 | */ | |
173 | static int inline mmtimer_setup(int comparator, unsigned long expires) | |
174 | { | |
175 | ||
176 | switch (comparator) { | |
177 | case 0: | |
178 | mmtimer_setup_int_0(expires); | |
179 | break; | |
180 | case 1: | |
181 | mmtimer_setup_int_1(expires); | |
182 | break; | |
183 | case 2: | |
184 | mmtimer_setup_int_2(expires); | |
185 | break; | |
186 | } | |
187 | /* We might've missed our expiration time */ | |
188 | if (rtc_time() < expires) | |
189 | return 1; | |
190 | ||
191 | /* | |
192 | * If an interrupt is already pending then its okay | |
193 | * if not then we failed | |
194 | */ | |
195 | return mmtimer_int_pending(comparator); | |
196 | } | |
197 | ||
198 | static int inline mmtimer_disable_int(long nasid, int comparator) | |
199 | { | |
200 | switch (comparator) { | |
201 | case 0: | |
202 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), | |
203 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL); | |
204 | break; | |
205 | case 1: | |
206 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), | |
207 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL); | |
208 | break; | |
209 | case 2: | |
210 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), | |
211 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL); | |
212 | break; | |
213 | default: | |
214 | return -EFAULT; | |
215 | } | |
216 | return 0; | |
217 | } | |
218 | ||
219 | #define TIMER_OFF 0xbadcabLL | |
220 | ||
221 | /* There is one of these for each comparator */ | |
222 | typedef struct mmtimer { | |
223 | spinlock_t lock ____cacheline_aligned; | |
224 | struct k_itimer *timer; | |
225 | int i; | |
226 | int cpu; | |
227 | struct tasklet_struct tasklet; | |
228 | } mmtimer_t; | |
229 | ||
76832c28 | 230 | static mmtimer_t ** timers; |
1da177e4 LT |
231 | |
232 | /** | |
233 | * mmtimer_ioctl - ioctl interface for /dev/mmtimer | |
234 | * @inode: inode of the device | |
235 | * @file: file structure for the device | |
236 | * @cmd: command to execute | |
237 | * @arg: optional argument to command | |
238 | * | |
239 | * Executes the command specified by @cmd. Returns 0 for success, < 0 for | |
240 | * failure. | |
241 | * | |
242 | * Valid commands: | |
243 | * | |
244 | * %MMTIMER_GETOFFSET - Should return the offset (relative to the start | |
245 | * of the page where the registers are mapped) for the counter in question. | |
246 | * | |
247 | * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15) | |
248 | * seconds | |
249 | * | |
250 | * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address | |
251 | * specified by @arg | |
252 | * | |
253 | * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter | |
254 | * | |
255 | * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace | |
256 | * | |
257 | * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it | |
258 | * in the address specified by @arg. | |
259 | */ | |
260 | static int mmtimer_ioctl(struct inode *inode, struct file *file, | |
261 | unsigned int cmd, unsigned long arg) | |
262 | { | |
263 | int ret = 0; | |
264 | ||
265 | switch (cmd) { | |
266 | case MMTIMER_GETOFFSET: /* offset of the counter */ | |
267 | /* | |
268 | * SN RTC registers are on their own 64k page | |
269 | */ | |
270 | if(PAGE_SIZE <= (1 << 16)) | |
271 | ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8; | |
272 | else | |
273 | ret = -ENOSYS; | |
274 | break; | |
275 | ||
276 | case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */ | |
277 | if(copy_to_user((unsigned long __user *)arg, | |
278 | &mmtimer_femtoperiod, sizeof(unsigned long))) | |
279 | return -EFAULT; | |
280 | break; | |
281 | ||
282 | case MMTIMER_GETFREQ: /* frequency in Hz */ | |
283 | if(copy_to_user((unsigned long __user *)arg, | |
284 | &sn_rtc_cycles_per_second, | |
285 | sizeof(unsigned long))) | |
286 | return -EFAULT; | |
287 | ret = 0; | |
288 | break; | |
289 | ||
290 | case MMTIMER_GETBITS: /* number of bits in the clock */ | |
291 | ret = RTC_BITS; | |
292 | break; | |
293 | ||
294 | case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */ | |
295 | ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0; | |
296 | break; | |
297 | ||
298 | case MMTIMER_GETCOUNTER: | |
299 | if(copy_to_user((unsigned long __user *)arg, | |
300 | RTC_COUNTER_ADDR, sizeof(unsigned long))) | |
301 | return -EFAULT; | |
302 | break; | |
303 | default: | |
304 | ret = -ENOSYS; | |
305 | break; | |
306 | } | |
307 | ||
308 | return ret; | |
309 | } | |
310 | ||
311 | /** | |
312 | * mmtimer_mmap - maps the clock's registers into userspace | |
313 | * @file: file structure for the device | |
314 | * @vma: VMA to map the registers into | |
315 | * | |
316 | * Calls remap_pfn_range() to map the clock's registers into | |
317 | * the calling process' address space. | |
318 | */ | |
319 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma) | |
320 | { | |
321 | unsigned long mmtimer_addr; | |
322 | ||
323 | if (vma->vm_end - vma->vm_start != PAGE_SIZE) | |
324 | return -EINVAL; | |
325 | ||
326 | if (vma->vm_flags & VM_WRITE) | |
327 | return -EPERM; | |
328 | ||
329 | if (PAGE_SIZE > (1 << 16)) | |
330 | return -ENOSYS; | |
331 | ||
1da177e4 LT |
332 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
333 | ||
334 | mmtimer_addr = __pa(RTC_COUNTER_ADDR); | |
335 | mmtimer_addr &= ~(PAGE_SIZE - 1); | |
336 | mmtimer_addr &= 0xfffffffffffffffUL; | |
337 | ||
338 | if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT, | |
339 | PAGE_SIZE, vma->vm_page_prot)) { | |
340 | printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n"); | |
341 | return -EAGAIN; | |
342 | } | |
343 | ||
344 | return 0; | |
345 | } | |
346 | ||
347 | static struct miscdevice mmtimer_miscdev = { | |
348 | SGI_MMTIMER, | |
349 | MMTIMER_NAME, | |
350 | &mmtimer_fops | |
351 | }; | |
352 | ||
353 | static struct timespec sgi_clock_offset; | |
354 | static int sgi_clock_period; | |
355 | ||
356 | /* | |
357 | * Posix Timer Interface | |
358 | */ | |
359 | ||
360 | static struct timespec sgi_clock_offset; | |
361 | static int sgi_clock_period; | |
362 | ||
363 | static int sgi_clock_get(clockid_t clockid, struct timespec *tp) | |
364 | { | |
365 | u64 nsec; | |
366 | ||
367 | nsec = rtc_time() * sgi_clock_period | |
368 | + sgi_clock_offset.tv_nsec; | |
369 | tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec) | |
370 | + sgi_clock_offset.tv_sec; | |
371 | return 0; | |
372 | }; | |
373 | ||
374 | static int sgi_clock_set(clockid_t clockid, struct timespec *tp) | |
375 | { | |
376 | ||
377 | u64 nsec; | |
378 | u64 rem; | |
379 | ||
380 | nsec = rtc_time() * sgi_clock_period; | |
381 | ||
382 | sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem); | |
383 | ||
384 | if (rem <= tp->tv_nsec) | |
385 | sgi_clock_offset.tv_nsec = tp->tv_sec - rem; | |
386 | else { | |
387 | sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem; | |
388 | sgi_clock_offset.tv_sec--; | |
389 | } | |
390 | return 0; | |
391 | } | |
392 | ||
393 | /* | |
394 | * Schedule the next periodic interrupt. This function will attempt | |
395 | * to schedule a periodic interrupt later if necessary. If the scheduling | |
396 | * of an interrupt fails then the time to skip is lengthened | |
397 | * exponentially in order to ensure that the next interrupt | |
398 | * can be properly scheduled.. | |
399 | */ | |
400 | static int inline reschedule_periodic_timer(mmtimer_t *x) | |
401 | { | |
402 | int n; | |
403 | struct k_itimer *t = x->timer; | |
404 | ||
405 | t->it.mmtimer.clock = x->i; | |
406 | t->it_overrun--; | |
407 | ||
408 | n = 0; | |
409 | do { | |
410 | ||
411 | t->it.mmtimer.expires += t->it.mmtimer.incr << n; | |
412 | t->it_overrun += 1 << n; | |
413 | n++; | |
414 | if (n > 20) | |
415 | return 1; | |
416 | ||
417 | } while (!mmtimer_setup(x->i, t->it.mmtimer.expires)); | |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
422 | /** | |
423 | * mmtimer_interrupt - timer interrupt handler | |
424 | * @irq: irq received | |
425 | * @dev_id: device the irq came from | |
1da177e4 LT |
426 | * |
427 | * Called when one of the comarators matches the counter, This | |
428 | * routine will send signals to processes that have requested | |
429 | * them. | |
430 | * | |
431 | * This interrupt is run in an interrupt context | |
432 | * by the SHUB. It is therefore safe to locally access SHub | |
433 | * registers. | |
434 | */ | |
435 | static irqreturn_t | |
7d12e780 | 436 | mmtimer_interrupt(int irq, void *dev_id) |
1da177e4 LT |
437 | { |
438 | int i; | |
1da177e4 LT |
439 | unsigned long expires = 0; |
440 | int result = IRQ_NONE; | |
76832c28 | 441 | unsigned indx = cpu_to_node(smp_processor_id()); |
1da177e4 LT |
442 | |
443 | /* | |
444 | * Do this once for each comparison register | |
445 | */ | |
446 | for (i = 0; i < NUM_COMPARATORS; i++) { | |
76832c28 | 447 | mmtimer_t *base = timers[indx] + i; |
1da177e4 | 448 | /* Make sure this doesn't get reused before tasklet_sched */ |
76832c28 DS |
449 | spin_lock(&base->lock); |
450 | if (base->cpu == smp_processor_id()) { | |
451 | if (base->timer) | |
452 | expires = base->timer->it.mmtimer.expires; | |
1da177e4 LT |
453 | /* expires test won't work with shared irqs */ |
454 | if ((mmtimer_int_pending(i) > 0) || | |
455 | (expires && (expires < rtc_time()))) { | |
456 | mmtimer_clr_int_pending(i); | |
76832c28 | 457 | tasklet_schedule(&base->tasklet); |
1da177e4 LT |
458 | result = IRQ_HANDLED; |
459 | } | |
460 | } | |
76832c28 | 461 | spin_unlock(&base->lock); |
1da177e4 LT |
462 | expires = 0; |
463 | } | |
464 | return result; | |
465 | } | |
466 | ||
467 | void mmtimer_tasklet(unsigned long data) { | |
468 | mmtimer_t *x = (mmtimer_t *)data; | |
469 | struct k_itimer *t = x->timer; | |
470 | unsigned long flags; | |
471 | ||
472 | if (t == NULL) | |
473 | return; | |
474 | ||
475 | /* Send signal and deal with periodic signals */ | |
476 | spin_lock_irqsave(&t->it_lock, flags); | |
477 | spin_lock(&x->lock); | |
478 | /* If timer was deleted between interrupt and here, leave */ | |
479 | if (t != x->timer) | |
480 | goto out; | |
481 | t->it_overrun = 0; | |
482 | ||
8d38eadb | 483 | if (posix_timer_event(t, 0) != 0) { |
1da177e4 LT |
484 | |
485 | // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n"); | |
486 | ||
487 | t->it_overrun++; | |
488 | } | |
489 | if(t->it.mmtimer.incr) { | |
490 | /* Periodic timer */ | |
491 | if (reschedule_periodic_timer(x)) { | |
492 | printk(KERN_WARNING "mmtimer: unable to reschedule\n"); | |
493 | x->timer = NULL; | |
494 | } | |
495 | } else { | |
496 | /* Ensure we don't false trigger in mmtimer_interrupt */ | |
497 | t->it.mmtimer.expires = 0; | |
498 | } | |
499 | t->it_overrun_last = t->it_overrun; | |
500 | out: | |
501 | spin_unlock(&x->lock); | |
502 | spin_unlock_irqrestore(&t->it_lock, flags); | |
503 | } | |
504 | ||
505 | static int sgi_timer_create(struct k_itimer *timer) | |
506 | { | |
507 | /* Insure that a newly created timer is off */ | |
508 | timer->it.mmtimer.clock = TIMER_OFF; | |
509 | return 0; | |
510 | } | |
511 | ||
512 | /* This does not really delete a timer. It just insures | |
513 | * that the timer is not active | |
514 | * | |
515 | * Assumption: it_lock is already held with irq's disabled | |
516 | */ | |
517 | static int sgi_timer_del(struct k_itimer *timr) | |
518 | { | |
519 | int i = timr->it.mmtimer.clock; | |
520 | cnodeid_t nodeid = timr->it.mmtimer.node; | |
76832c28 | 521 | mmtimer_t *t = timers[nodeid] + i; |
1da177e4 LT |
522 | unsigned long irqflags; |
523 | ||
524 | if (i != TIMER_OFF) { | |
525 | spin_lock_irqsave(&t->lock, irqflags); | |
526 | mmtimer_disable_int(cnodeid_to_nasid(nodeid),i); | |
527 | t->timer = NULL; | |
528 | timr->it.mmtimer.clock = TIMER_OFF; | |
529 | timr->it.mmtimer.expires = 0; | |
530 | spin_unlock_irqrestore(&t->lock, irqflags); | |
531 | } | |
532 | return 0; | |
533 | } | |
534 | ||
535 | #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC) | |
536 | #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec) | |
537 | ||
538 | /* Assumption: it_lock is already held with irq's disabled */ | |
539 | static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting) | |
540 | { | |
541 | ||
542 | if (timr->it.mmtimer.clock == TIMER_OFF) { | |
543 | cur_setting->it_interval.tv_nsec = 0; | |
544 | cur_setting->it_interval.tv_sec = 0; | |
545 | cur_setting->it_value.tv_nsec = 0; | |
546 | cur_setting->it_value.tv_sec =0; | |
547 | return; | |
548 | } | |
549 | ||
550 | ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period); | |
551 | ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period); | |
552 | return; | |
553 | } | |
554 | ||
555 | ||
556 | static int sgi_timer_set(struct k_itimer *timr, int flags, | |
557 | struct itimerspec * new_setting, | |
558 | struct itimerspec * old_setting) | |
559 | { | |
560 | ||
561 | int i; | |
562 | unsigned long when, period, irqflags; | |
563 | int err = 0; | |
564 | cnodeid_t nodeid; | |
565 | mmtimer_t *base; | |
566 | ||
567 | if (old_setting) | |
568 | sgi_timer_get(timr, old_setting); | |
569 | ||
570 | sgi_timer_del(timr); | |
571 | when = timespec_to_ns(new_setting->it_value); | |
572 | period = timespec_to_ns(new_setting->it_interval); | |
573 | ||
574 | if (when == 0) | |
575 | /* Clear timer */ | |
576 | return 0; | |
577 | ||
578 | if (flags & TIMER_ABSTIME) { | |
579 | struct timespec n; | |
580 | unsigned long now; | |
581 | ||
582 | getnstimeofday(&n); | |
583 | now = timespec_to_ns(n); | |
584 | if (when > now) | |
585 | when -= now; | |
586 | else | |
587 | /* Fire the timer immediately */ | |
588 | when = 0; | |
589 | } | |
590 | ||
591 | /* | |
592 | * Convert to sgi clock period. Need to keep rtc_time() as near as possible | |
593 | * to getnstimeofday() in order to be as faithful as possible to the time | |
594 | * specified. | |
595 | */ | |
596 | when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time(); | |
597 | period = (period + sgi_clock_period - 1) / sgi_clock_period; | |
598 | ||
599 | /* | |
600 | * We are allocating a local SHub comparator. If we would be moved to another | |
601 | * cpu then another SHub may be local to us. Prohibit that by switching off | |
602 | * preemption. | |
603 | */ | |
604 | preempt_disable(); | |
605 | ||
55642d36 | 606 | nodeid = cpu_to_node(smp_processor_id()); |
1da177e4 LT |
607 | retry: |
608 | /* Don't use an allocated timer, or a deleted one that's pending */ | |
609 | for(i = 0; i< NUM_COMPARATORS; i++) { | |
76832c28 DS |
610 | base = timers[nodeid] + i; |
611 | if (!base->timer && !base->tasklet.state) { | |
1da177e4 LT |
612 | break; |
613 | } | |
614 | } | |
615 | ||
616 | if (i == NUM_COMPARATORS) { | |
617 | preempt_enable(); | |
618 | return -EBUSY; | |
619 | } | |
620 | ||
76832c28 | 621 | spin_lock_irqsave(&base->lock, irqflags); |
1da177e4 | 622 | |
76832c28 DS |
623 | if (base->timer || base->tasklet.state != 0) { |
624 | spin_unlock_irqrestore(&base->lock, irqflags); | |
1da177e4 LT |
625 | goto retry; |
626 | } | |
76832c28 DS |
627 | base->timer = timr; |
628 | base->cpu = smp_processor_id(); | |
1da177e4 LT |
629 | |
630 | timr->it.mmtimer.clock = i; | |
631 | timr->it.mmtimer.node = nodeid; | |
632 | timr->it.mmtimer.incr = period; | |
633 | timr->it.mmtimer.expires = when; | |
634 | ||
635 | if (period == 0) { | |
636 | if (!mmtimer_setup(i, when)) { | |
637 | mmtimer_disable_int(-1, i); | |
638 | posix_timer_event(timr, 0); | |
639 | timr->it.mmtimer.expires = 0; | |
640 | } | |
641 | } else { | |
642 | timr->it.mmtimer.expires -= period; | |
76832c28 | 643 | if (reschedule_periodic_timer(base)) |
1da177e4 LT |
644 | err = -EINVAL; |
645 | } | |
646 | ||
76832c28 | 647 | spin_unlock_irqrestore(&base->lock, irqflags); |
1da177e4 LT |
648 | |
649 | preempt_enable(); | |
650 | ||
651 | return err; | |
652 | } | |
653 | ||
654 | static struct k_clock sgi_clock = { | |
655 | .res = 0, | |
656 | .clock_set = sgi_clock_set, | |
657 | .clock_get = sgi_clock_get, | |
658 | .timer_create = sgi_timer_create, | |
659 | .nsleep = do_posix_clock_nonanosleep, | |
660 | .timer_set = sgi_timer_set, | |
661 | .timer_del = sgi_timer_del, | |
662 | .timer_get = sgi_timer_get | |
663 | }; | |
664 | ||
665 | /** | |
666 | * mmtimer_init - device initialization routine | |
667 | * | |
668 | * Does initial setup for the mmtimer device. | |
669 | */ | |
670 | static int __init mmtimer_init(void) | |
671 | { | |
672 | unsigned i; | |
76832c28 | 673 | cnodeid_t node, maxn = -1; |
1da177e4 LT |
674 | |
675 | if (!ia64_platform_is("sn2")) | |
f032f908 | 676 | return 0; |
1da177e4 LT |
677 | |
678 | /* | |
679 | * Sanity check the cycles/sec variable | |
680 | */ | |
681 | if (sn_rtc_cycles_per_second < 100000) { | |
682 | printk(KERN_ERR "%s: unable to determine clock frequency\n", | |
683 | MMTIMER_NAME); | |
5d469ec0 | 684 | goto out1; |
1da177e4 LT |
685 | } |
686 | ||
687 | mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second / | |
688 | 2) / sn_rtc_cycles_per_second; | |
689 | ||
0f2ed4c6 | 690 | if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, IRQF_PERCPU, MMTIMER_NAME, NULL)) { |
1da177e4 LT |
691 | printk(KERN_WARNING "%s: unable to allocate interrupt.", |
692 | MMTIMER_NAME); | |
5d469ec0 | 693 | goto out1; |
1da177e4 LT |
694 | } |
695 | ||
1da177e4 LT |
696 | if (misc_register(&mmtimer_miscdev)) { |
697 | printk(KERN_ERR "%s: failed to register device\n", | |
698 | MMTIMER_NAME); | |
5d469ec0 | 699 | goto out2; |
1da177e4 LT |
700 | } |
701 | ||
76832c28 DS |
702 | /* Get max numbered node, calculate slots needed */ |
703 | for_each_online_node(node) { | |
704 | maxn = node; | |
705 | } | |
706 | maxn++; | |
707 | ||
708 | /* Allocate list of node ptrs to mmtimer_t's */ | |
1cfb9c94 | 709 | timers = kzalloc(sizeof(mmtimer_t *)*maxn, GFP_KERNEL); |
76832c28 DS |
710 | if (timers == NULL) { |
711 | printk(KERN_ERR "%s: failed to allocate memory for device\n", | |
712 | MMTIMER_NAME); | |
5d469ec0 | 713 | goto out3; |
76832c28 DS |
714 | } |
715 | ||
716 | /* Allocate mmtimer_t's for each online node */ | |
717 | for_each_online_node(node) { | |
718 | timers[node] = kmalloc_node(sizeof(mmtimer_t)*NUM_COMPARATORS, GFP_KERNEL, node); | |
719 | if (timers[node] == NULL) { | |
720 | printk(KERN_ERR "%s: failed to allocate memory for device\n", | |
721 | MMTIMER_NAME); | |
5d469ec0 | 722 | goto out4; |
76832c28 DS |
723 | } |
724 | for (i=0; i< NUM_COMPARATORS; i++) { | |
725 | mmtimer_t * base = timers[node] + i; | |
726 | ||
727 | spin_lock_init(&base->lock); | |
728 | base->timer = NULL; | |
729 | base->cpu = 0; | |
730 | base->i = i; | |
731 | tasklet_init(&base->tasklet, mmtimer_tasklet, | |
732 | (unsigned long) (base)); | |
733 | } | |
734 | } | |
735 | ||
1da177e4 LT |
736 | sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second; |
737 | register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock); | |
738 | ||
739 | printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION, | |
740 | sn_rtc_cycles_per_second/(unsigned long)1E6); | |
741 | ||
742 | return 0; | |
5d469ec0 NH |
743 | |
744 | out4: | |
745 | for_each_online_node(node) { | |
746 | kfree(timers[node]); | |
747 | } | |
748 | out3: | |
749 | misc_deregister(&mmtimer_miscdev); | |
750 | out2: | |
751 | free_irq(SGI_MMTIMER_VECTOR, NULL); | |
752 | out1: | |
753 | return -1; | |
1da177e4 LT |
754 | } |
755 | ||
756 | module_init(mmtimer_init); | |
757 |