Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
76832c28 | 2 | * Timer device implementation for SGI SN platforms. |
1da177e4 LT |
3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
76832c28 | 8 | * Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved. |
1da177e4 LT |
9 | * |
10 | * This driver exports an API that should be supportable by any HPET or IA-PC | |
11 | * multimedia timer. The code below is currently specific to the SGI Altix | |
12 | * SHub RTC, however. | |
13 | * | |
14 | * 11/01/01 - jbarnes - initial revision | |
15 | * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion | |
16 | * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE | |
17 | * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt | |
18 | * support via the posix timer interface | |
19 | */ | |
20 | ||
21 | #include <linux/types.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/ioctl.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/errno.h> | |
27 | #include <linux/mm.h> | |
4e950f6f | 28 | #include <linux/fs.h> |
1da177e4 LT |
29 | #include <linux/mmtimer.h> |
30 | #include <linux/miscdevice.h> | |
31 | #include <linux/posix-timers.h> | |
32 | #include <linux/interrupt.h> | |
f8bd2258 RZ |
33 | #include <linux/time.h> |
34 | #include <linux/math64.h> | |
4cddb886 | 35 | #include <linux/smp_lock.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
1da177e4 LT |
37 | |
38 | #include <asm/uaccess.h> | |
39 | #include <asm/sn/addrs.h> | |
40 | #include <asm/sn/intr.h> | |
41 | #include <asm/sn/shub_mmr.h> | |
42 | #include <asm/sn/nodepda.h> | |
43 | #include <asm/sn/shubio.h> | |
44 | ||
45 | MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>"); | |
46 | MODULE_DESCRIPTION("SGI Altix RTC Timer"); | |
47 | MODULE_LICENSE("GPL"); | |
48 | ||
49 | /* name of the device, usually in /dev */ | |
50 | #define MMTIMER_NAME "mmtimer" | |
51 | #define MMTIMER_DESC "SGI Altix RTC Timer" | |
76832c28 | 52 | #define MMTIMER_VERSION "2.1" |
1da177e4 LT |
53 | |
54 | #define RTC_BITS 55 /* 55 bits for this implementation */ | |
55 | ||
56 | extern unsigned long sn_rtc_cycles_per_second; | |
57 | ||
58 | #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC)) | |
59 | ||
60 | #define rtc_time() (*RTC_COUNTER_ADDR) | |
61 | ||
4cddb886 AC |
62 | static long mmtimer_ioctl(struct file *file, unsigned int cmd, |
63 | unsigned long arg); | |
1da177e4 LT |
64 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma); |
65 | ||
66 | /* | |
67 | * Period in femtoseconds (10^-15 s) | |
68 | */ | |
69 | static unsigned long mmtimer_femtoperiod = 0; | |
70 | ||
62322d25 | 71 | static const struct file_operations mmtimer_fops = { |
4cddb886 AC |
72 | .owner = THIS_MODULE, |
73 | .mmap = mmtimer_mmap, | |
74 | .unlocked_ioctl = mmtimer_ioctl, | |
6038f373 | 75 | .llseek = noop_llseek, |
1da177e4 LT |
76 | }; |
77 | ||
78 | /* | |
79 | * We only have comparison registers RTC1-4 currently available per | |
80 | * node. RTC0 is used by SAL. | |
81 | */ | |
1da177e4 | 82 | /* Check for an RTC interrupt pending */ |
cbacdd95 | 83 | static int mmtimer_int_pending(int comparator) |
1da177e4 LT |
84 | { |
85 | if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) & | |
86 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator) | |
87 | return 1; | |
88 | else | |
89 | return 0; | |
90 | } | |
cbacdd95 | 91 | |
1da177e4 | 92 | /* Clear the RTC interrupt pending bit */ |
cbacdd95 | 93 | static void mmtimer_clr_int_pending(int comparator) |
1da177e4 LT |
94 | { |
95 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), | |
96 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator); | |
97 | } | |
98 | ||
99 | /* Setup timer on comparator RTC1 */ | |
cbacdd95 | 100 | static void mmtimer_setup_int_0(int cpu, u64 expires) |
1da177e4 LT |
101 | { |
102 | u64 val; | |
103 | ||
104 | /* Disable interrupt */ | |
105 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); | |
106 | ||
107 | /* Initialize comparator value */ | |
108 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L); | |
109 | ||
110 | /* Clear pending bit */ | |
111 | mmtimer_clr_int_pending(0); | |
112 | ||
113 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) | | |
cbacdd95 | 114 | ((u64)cpu_physical_id(cpu) << |
1da177e4 LT |
115 | SH_RTC1_INT_CONFIG_PID_SHFT); |
116 | ||
117 | /* Set configuration */ | |
118 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val); | |
119 | ||
120 | /* Enable RTC interrupts */ | |
121 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL); | |
122 | ||
123 | /* Initialize comparator value */ | |
124 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires); | |
125 | ||
126 | ||
127 | } | |
128 | ||
129 | /* Setup timer on comparator RTC2 */ | |
cbacdd95 | 130 | static void mmtimer_setup_int_1(int cpu, u64 expires) |
1da177e4 LT |
131 | { |
132 | u64 val; | |
133 | ||
134 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); | |
135 | ||
136 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L); | |
137 | ||
138 | mmtimer_clr_int_pending(1); | |
139 | ||
140 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) | | |
cbacdd95 | 141 | ((u64)cpu_physical_id(cpu) << |
1da177e4 LT |
142 | SH_RTC2_INT_CONFIG_PID_SHFT); |
143 | ||
144 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val); | |
145 | ||
146 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL); | |
147 | ||
148 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires); | |
149 | } | |
150 | ||
151 | /* Setup timer on comparator RTC3 */ | |
cbacdd95 | 152 | static void mmtimer_setup_int_2(int cpu, u64 expires) |
1da177e4 LT |
153 | { |
154 | u64 val; | |
155 | ||
156 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); | |
157 | ||
158 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L); | |
159 | ||
160 | mmtimer_clr_int_pending(2); | |
161 | ||
162 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) | | |
cbacdd95 | 163 | ((u64)cpu_physical_id(cpu) << |
1da177e4 LT |
164 | SH_RTC3_INT_CONFIG_PID_SHFT); |
165 | ||
166 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val); | |
167 | ||
168 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL); | |
169 | ||
170 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires); | |
171 | } | |
172 | ||
173 | /* | |
174 | * This function must be called with interrupts disabled and preemption off | |
175 | * in order to insure that the setup succeeds in a deterministic time frame. | |
176 | * It will check if the interrupt setup succeeded. | |
177 | */ | |
cbacdd95 | 178 | static int mmtimer_setup(int cpu, int comparator, unsigned long expires) |
1da177e4 LT |
179 | { |
180 | ||
181 | switch (comparator) { | |
182 | case 0: | |
cbacdd95 | 183 | mmtimer_setup_int_0(cpu, expires); |
1da177e4 LT |
184 | break; |
185 | case 1: | |
cbacdd95 | 186 | mmtimer_setup_int_1(cpu, expires); |
1da177e4 LT |
187 | break; |
188 | case 2: | |
cbacdd95 | 189 | mmtimer_setup_int_2(cpu, expires); |
1da177e4 LT |
190 | break; |
191 | } | |
192 | /* We might've missed our expiration time */ | |
cbacdd95 | 193 | if (rtc_time() <= expires) |
1da177e4 LT |
194 | return 1; |
195 | ||
196 | /* | |
197 | * If an interrupt is already pending then its okay | |
198 | * if not then we failed | |
199 | */ | |
200 | return mmtimer_int_pending(comparator); | |
201 | } | |
202 | ||
cbacdd95 | 203 | static int mmtimer_disable_int(long nasid, int comparator) |
1da177e4 LT |
204 | { |
205 | switch (comparator) { | |
206 | case 0: | |
207 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), | |
208 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL); | |
209 | break; | |
210 | case 1: | |
211 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), | |
212 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL); | |
213 | break; | |
214 | case 2: | |
215 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), | |
216 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL); | |
217 | break; | |
218 | default: | |
219 | return -EFAULT; | |
220 | } | |
221 | return 0; | |
222 | } | |
223 | ||
cbacdd95 | 224 | #define COMPARATOR 1 /* The comparator to use */ |
1da177e4 | 225 | |
cbacdd95 DS |
226 | #define TIMER_OFF 0xbadcabLL /* Timer is not setup */ |
227 | #define TIMER_SET 0 /* Comparator is set for this timer */ | |
228 | ||
229 | /* There is one of these for each timer */ | |
230 | struct mmtimer { | |
231 | struct rb_node list; | |
1da177e4 | 232 | struct k_itimer *timer; |
1da177e4 | 233 | int cpu; |
cbacdd95 DS |
234 | }; |
235 | ||
236 | struct mmtimer_node { | |
237 | spinlock_t lock ____cacheline_aligned; | |
238 | struct rb_root timer_head; | |
239 | struct rb_node *next; | |
1da177e4 | 240 | struct tasklet_struct tasklet; |
cbacdd95 DS |
241 | }; |
242 | static struct mmtimer_node *timers; | |
243 | ||
244 | ||
245 | /* | |
246 | * Add a new mmtimer struct to the node's mmtimer list. | |
247 | * This function assumes the struct mmtimer_node is locked. | |
248 | */ | |
249 | static void mmtimer_add_list(struct mmtimer *n) | |
250 | { | |
251 | int nodeid = n->timer->it.mmtimer.node; | |
252 | unsigned long expires = n->timer->it.mmtimer.expires; | |
253 | struct rb_node **link = &timers[nodeid].timer_head.rb_node; | |
254 | struct rb_node *parent = NULL; | |
255 | struct mmtimer *x; | |
256 | ||
257 | /* | |
258 | * Find the right place in the rbtree: | |
259 | */ | |
260 | while (*link) { | |
261 | parent = *link; | |
262 | x = rb_entry(parent, struct mmtimer, list); | |
263 | ||
264 | if (expires < x->timer->it.mmtimer.expires) | |
265 | link = &(*link)->rb_left; | |
266 | else | |
267 | link = &(*link)->rb_right; | |
268 | } | |
269 | ||
270 | /* | |
271 | * Insert the timer to the rbtree and check whether it | |
272 | * replaces the first pending timer | |
273 | */ | |
274 | rb_link_node(&n->list, parent, link); | |
275 | rb_insert_color(&n->list, &timers[nodeid].timer_head); | |
276 | ||
277 | if (!timers[nodeid].next || expires < rb_entry(timers[nodeid].next, | |
278 | struct mmtimer, list)->timer->it.mmtimer.expires) | |
279 | timers[nodeid].next = &n->list; | |
280 | } | |
281 | ||
282 | /* | |
283 | * Set the comparator for the next timer. | |
284 | * This function assumes the struct mmtimer_node is locked. | |
285 | */ | |
286 | static void mmtimer_set_next_timer(int nodeid) | |
287 | { | |
288 | struct mmtimer_node *n = &timers[nodeid]; | |
289 | struct mmtimer *x; | |
290 | struct k_itimer *t; | |
291 | int o; | |
292 | ||
293 | restart: | |
294 | if (n->next == NULL) | |
295 | return; | |
1da177e4 | 296 | |
cbacdd95 DS |
297 | x = rb_entry(n->next, struct mmtimer, list); |
298 | t = x->timer; | |
299 | if (!t->it.mmtimer.incr) { | |
300 | /* Not an interval timer */ | |
301 | if (!mmtimer_setup(x->cpu, COMPARATOR, | |
302 | t->it.mmtimer.expires)) { | |
303 | /* Late setup, fire now */ | |
304 | tasklet_schedule(&n->tasklet); | |
305 | } | |
306 | return; | |
307 | } | |
308 | ||
309 | /* Interval timer */ | |
310 | o = 0; | |
311 | while (!mmtimer_setup(x->cpu, COMPARATOR, t->it.mmtimer.expires)) { | |
312 | unsigned long e, e1; | |
313 | struct rb_node *next; | |
314 | t->it.mmtimer.expires += t->it.mmtimer.incr << o; | |
315 | t->it_overrun += 1 << o; | |
316 | o++; | |
317 | if (o > 20) { | |
318 | printk(KERN_ALERT "mmtimer: cannot reschedule timer\n"); | |
319 | t->it.mmtimer.clock = TIMER_OFF; | |
320 | n->next = rb_next(&x->list); | |
321 | rb_erase(&x->list, &n->timer_head); | |
322 | kfree(x); | |
323 | goto restart; | |
324 | } | |
325 | ||
326 | e = t->it.mmtimer.expires; | |
327 | next = rb_next(&x->list); | |
328 | ||
329 | if (next == NULL) | |
330 | continue; | |
331 | ||
332 | e1 = rb_entry(next, struct mmtimer, list)-> | |
333 | timer->it.mmtimer.expires; | |
334 | if (e > e1) { | |
335 | n->next = next; | |
336 | rb_erase(&x->list, &n->timer_head); | |
337 | mmtimer_add_list(x); | |
338 | goto restart; | |
339 | } | |
340 | } | |
341 | } | |
1da177e4 LT |
342 | |
343 | /** | |
344 | * mmtimer_ioctl - ioctl interface for /dev/mmtimer | |
1da177e4 LT |
345 | * @file: file structure for the device |
346 | * @cmd: command to execute | |
347 | * @arg: optional argument to command | |
348 | * | |
349 | * Executes the command specified by @cmd. Returns 0 for success, < 0 for | |
350 | * failure. | |
351 | * | |
352 | * Valid commands: | |
353 | * | |
354 | * %MMTIMER_GETOFFSET - Should return the offset (relative to the start | |
355 | * of the page where the registers are mapped) for the counter in question. | |
356 | * | |
357 | * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15) | |
358 | * seconds | |
359 | * | |
360 | * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address | |
361 | * specified by @arg | |
362 | * | |
363 | * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter | |
364 | * | |
365 | * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace | |
366 | * | |
367 | * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it | |
368 | * in the address specified by @arg. | |
369 | */ | |
4cddb886 AC |
370 | static long mmtimer_ioctl(struct file *file, unsigned int cmd, |
371 | unsigned long arg) | |
1da177e4 LT |
372 | { |
373 | int ret = 0; | |
374 | ||
4cddb886 AC |
375 | lock_kernel(); |
376 | ||
1da177e4 LT |
377 | switch (cmd) { |
378 | case MMTIMER_GETOFFSET: /* offset of the counter */ | |
379 | /* | |
380 | * SN RTC registers are on their own 64k page | |
381 | */ | |
382 | if(PAGE_SIZE <= (1 << 16)) | |
383 | ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8; | |
384 | else | |
385 | ret = -ENOSYS; | |
386 | break; | |
387 | ||
388 | case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */ | |
389 | if(copy_to_user((unsigned long __user *)arg, | |
390 | &mmtimer_femtoperiod, sizeof(unsigned long))) | |
4cddb886 | 391 | ret = -EFAULT; |
1da177e4 LT |
392 | break; |
393 | ||
394 | case MMTIMER_GETFREQ: /* frequency in Hz */ | |
395 | if(copy_to_user((unsigned long __user *)arg, | |
396 | &sn_rtc_cycles_per_second, | |
397 | sizeof(unsigned long))) | |
4cddb886 | 398 | ret = -EFAULT; |
1da177e4 LT |
399 | break; |
400 | ||
401 | case MMTIMER_GETBITS: /* number of bits in the clock */ | |
402 | ret = RTC_BITS; | |
403 | break; | |
404 | ||
405 | case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */ | |
406 | ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0; | |
407 | break; | |
408 | ||
409 | case MMTIMER_GETCOUNTER: | |
410 | if(copy_to_user((unsigned long __user *)arg, | |
411 | RTC_COUNTER_ADDR, sizeof(unsigned long))) | |
4cddb886 | 412 | ret = -EFAULT; |
1da177e4 LT |
413 | break; |
414 | default: | |
4cddb886 | 415 | ret = -ENOTTY; |
1da177e4 LT |
416 | break; |
417 | } | |
4cddb886 | 418 | unlock_kernel(); |
1da177e4 LT |
419 | return ret; |
420 | } | |
421 | ||
422 | /** | |
423 | * mmtimer_mmap - maps the clock's registers into userspace | |
424 | * @file: file structure for the device | |
425 | * @vma: VMA to map the registers into | |
426 | * | |
427 | * Calls remap_pfn_range() to map the clock's registers into | |
428 | * the calling process' address space. | |
429 | */ | |
430 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma) | |
431 | { | |
432 | unsigned long mmtimer_addr; | |
433 | ||
434 | if (vma->vm_end - vma->vm_start != PAGE_SIZE) | |
435 | return -EINVAL; | |
436 | ||
437 | if (vma->vm_flags & VM_WRITE) | |
438 | return -EPERM; | |
439 | ||
440 | if (PAGE_SIZE > (1 << 16)) | |
441 | return -ENOSYS; | |
442 | ||
1da177e4 LT |
443 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
444 | ||
445 | mmtimer_addr = __pa(RTC_COUNTER_ADDR); | |
446 | mmtimer_addr &= ~(PAGE_SIZE - 1); | |
447 | mmtimer_addr &= 0xfffffffffffffffUL; | |
448 | ||
449 | if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT, | |
450 | PAGE_SIZE, vma->vm_page_prot)) { | |
451 | printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n"); | |
452 | return -EAGAIN; | |
453 | } | |
454 | ||
455 | return 0; | |
456 | } | |
457 | ||
458 | static struct miscdevice mmtimer_miscdev = { | |
459 | SGI_MMTIMER, | |
460 | MMTIMER_NAME, | |
461 | &mmtimer_fops | |
462 | }; | |
463 | ||
464 | static struct timespec sgi_clock_offset; | |
465 | static int sgi_clock_period; | |
466 | ||
467 | /* | |
468 | * Posix Timer Interface | |
469 | */ | |
470 | ||
471 | static struct timespec sgi_clock_offset; | |
472 | static int sgi_clock_period; | |
473 | ||
474 | static int sgi_clock_get(clockid_t clockid, struct timespec *tp) | |
475 | { | |
476 | u64 nsec; | |
477 | ||
478 | nsec = rtc_time() * sgi_clock_period | |
479 | + sgi_clock_offset.tv_nsec; | |
f8bd2258 RZ |
480 | *tp = ns_to_timespec(nsec); |
481 | tp->tv_sec += sgi_clock_offset.tv_sec; | |
1da177e4 LT |
482 | return 0; |
483 | }; | |
484 | ||
485 | static int sgi_clock_set(clockid_t clockid, struct timespec *tp) | |
486 | { | |
487 | ||
488 | u64 nsec; | |
f8bd2258 | 489 | u32 rem; |
1da177e4 LT |
490 | |
491 | nsec = rtc_time() * sgi_clock_period; | |
492 | ||
f8bd2258 | 493 | sgi_clock_offset.tv_sec = tp->tv_sec - div_u64_rem(nsec, NSEC_PER_SEC, &rem); |
1da177e4 LT |
494 | |
495 | if (rem <= tp->tv_nsec) | |
496 | sgi_clock_offset.tv_nsec = tp->tv_sec - rem; | |
497 | else { | |
498 | sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem; | |
499 | sgi_clock_offset.tv_sec--; | |
500 | } | |
501 | return 0; | |
502 | } | |
503 | ||
1da177e4 LT |
504 | /** |
505 | * mmtimer_interrupt - timer interrupt handler | |
506 | * @irq: irq received | |
507 | * @dev_id: device the irq came from | |
1da177e4 LT |
508 | * |
509 | * Called when one of the comarators matches the counter, This | |
510 | * routine will send signals to processes that have requested | |
511 | * them. | |
512 | * | |
513 | * This interrupt is run in an interrupt context | |
514 | * by the SHUB. It is therefore safe to locally access SHub | |
515 | * registers. | |
516 | */ | |
517 | static irqreturn_t | |
7d12e780 | 518 | mmtimer_interrupt(int irq, void *dev_id) |
1da177e4 | 519 | { |
1da177e4 LT |
520 | unsigned long expires = 0; |
521 | int result = IRQ_NONE; | |
76832c28 | 522 | unsigned indx = cpu_to_node(smp_processor_id()); |
cbacdd95 | 523 | struct mmtimer *base; |
1da177e4 | 524 | |
cbacdd95 DS |
525 | spin_lock(&timers[indx].lock); |
526 | base = rb_entry(timers[indx].next, struct mmtimer, list); | |
527 | if (base == NULL) { | |
528 | spin_unlock(&timers[indx].lock); | |
529 | return result; | |
530 | } | |
531 | ||
532 | if (base->cpu == smp_processor_id()) { | |
533 | if (base->timer) | |
534 | expires = base->timer->it.mmtimer.expires; | |
535 | /* expires test won't work with shared irqs */ | |
536 | if ((mmtimer_int_pending(COMPARATOR) > 0) || | |
537 | (expires && (expires <= rtc_time()))) { | |
538 | mmtimer_clr_int_pending(COMPARATOR); | |
539 | tasklet_schedule(&timers[indx].tasklet); | |
540 | result = IRQ_HANDLED; | |
1da177e4 | 541 | } |
1da177e4 | 542 | } |
cbacdd95 | 543 | spin_unlock(&timers[indx].lock); |
1da177e4 LT |
544 | return result; |
545 | } | |
546 | ||
cbacdd95 DS |
547 | static void mmtimer_tasklet(unsigned long data) |
548 | { | |
549 | int nodeid = data; | |
550 | struct mmtimer_node *mn = &timers[nodeid]; | |
0fbcae22 | 551 | struct mmtimer *x; |
cbacdd95 | 552 | struct k_itimer *t; |
1da177e4 LT |
553 | unsigned long flags; |
554 | ||
1da177e4 | 555 | /* Send signal and deal with periodic signals */ |
cbacdd95 DS |
556 | spin_lock_irqsave(&mn->lock, flags); |
557 | if (!mn->next) | |
1da177e4 | 558 | goto out; |
1da177e4 | 559 | |
cbacdd95 DS |
560 | x = rb_entry(mn->next, struct mmtimer, list); |
561 | t = x->timer; | |
562 | ||
563 | if (t->it.mmtimer.clock == TIMER_OFF) | |
564 | goto out; | |
565 | ||
566 | t->it_overrun = 0; | |
1da177e4 | 567 | |
cbacdd95 DS |
568 | mn->next = rb_next(&x->list); |
569 | rb_erase(&x->list, &mn->timer_head); | |
1da177e4 | 570 | |
cbacdd95 | 571 | if (posix_timer_event(t, 0) != 0) |
1da177e4 | 572 | t->it_overrun++; |
cbacdd95 | 573 | |
1da177e4 | 574 | if(t->it.mmtimer.incr) { |
cbacdd95 DS |
575 | t->it.mmtimer.expires += t->it.mmtimer.incr; |
576 | mmtimer_add_list(x); | |
1da177e4 LT |
577 | } else { |
578 | /* Ensure we don't false trigger in mmtimer_interrupt */ | |
cbacdd95 | 579 | t->it.mmtimer.clock = TIMER_OFF; |
1da177e4 | 580 | t->it.mmtimer.expires = 0; |
cbacdd95 | 581 | kfree(x); |
1da177e4 | 582 | } |
cbacdd95 DS |
583 | /* Set comparator for next timer, if there is one */ |
584 | mmtimer_set_next_timer(nodeid); | |
585 | ||
1da177e4 LT |
586 | t->it_overrun_last = t->it_overrun; |
587 | out: | |
cbacdd95 | 588 | spin_unlock_irqrestore(&mn->lock, flags); |
1da177e4 LT |
589 | } |
590 | ||
591 | static int sgi_timer_create(struct k_itimer *timer) | |
592 | { | |
593 | /* Insure that a newly created timer is off */ | |
594 | timer->it.mmtimer.clock = TIMER_OFF; | |
595 | return 0; | |
596 | } | |
597 | ||
598 | /* This does not really delete a timer. It just insures | |
599 | * that the timer is not active | |
600 | * | |
601 | * Assumption: it_lock is already held with irq's disabled | |
602 | */ | |
603 | static int sgi_timer_del(struct k_itimer *timr) | |
604 | { | |
1da177e4 | 605 | cnodeid_t nodeid = timr->it.mmtimer.node; |
1da177e4 LT |
606 | unsigned long irqflags; |
607 | ||
cbacdd95 DS |
608 | spin_lock_irqsave(&timers[nodeid].lock, irqflags); |
609 | if (timr->it.mmtimer.clock != TIMER_OFF) { | |
610 | unsigned long expires = timr->it.mmtimer.expires; | |
611 | struct rb_node *n = timers[nodeid].timer_head.rb_node; | |
612 | struct mmtimer *uninitialized_var(t); | |
613 | int r = 0; | |
614 | ||
1da177e4 LT |
615 | timr->it.mmtimer.clock = TIMER_OFF; |
616 | timr->it.mmtimer.expires = 0; | |
cbacdd95 DS |
617 | |
618 | while (n) { | |
619 | t = rb_entry(n, struct mmtimer, list); | |
620 | if (t->timer == timr) | |
621 | break; | |
622 | ||
623 | if (expires < t->timer->it.mmtimer.expires) | |
624 | n = n->rb_left; | |
625 | else | |
626 | n = n->rb_right; | |
627 | } | |
628 | ||
629 | if (!n) { | |
630 | spin_unlock_irqrestore(&timers[nodeid].lock, irqflags); | |
631 | return 0; | |
632 | } | |
633 | ||
634 | if (timers[nodeid].next == n) { | |
635 | timers[nodeid].next = rb_next(n); | |
636 | r = 1; | |
637 | } | |
638 | ||
639 | rb_erase(n, &timers[nodeid].timer_head); | |
640 | kfree(t); | |
641 | ||
642 | if (r) { | |
643 | mmtimer_disable_int(cnodeid_to_nasid(nodeid), | |
644 | COMPARATOR); | |
645 | mmtimer_set_next_timer(nodeid); | |
646 | } | |
1da177e4 | 647 | } |
cbacdd95 | 648 | spin_unlock_irqrestore(&timers[nodeid].lock, irqflags); |
1da177e4 LT |
649 | return 0; |
650 | } | |
651 | ||
1da177e4 LT |
652 | /* Assumption: it_lock is already held with irq's disabled */ |
653 | static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting) | |
654 | { | |
655 | ||
656 | if (timr->it.mmtimer.clock == TIMER_OFF) { | |
657 | cur_setting->it_interval.tv_nsec = 0; | |
658 | cur_setting->it_interval.tv_sec = 0; | |
659 | cur_setting->it_value.tv_nsec = 0; | |
660 | cur_setting->it_value.tv_sec =0; | |
661 | return; | |
662 | } | |
663 | ||
f8bd2258 RZ |
664 | cur_setting->it_interval = ns_to_timespec(timr->it.mmtimer.incr * sgi_clock_period); |
665 | cur_setting->it_value = ns_to_timespec((timr->it.mmtimer.expires - rtc_time()) * sgi_clock_period); | |
1da177e4 LT |
666 | } |
667 | ||
668 | ||
669 | static int sgi_timer_set(struct k_itimer *timr, int flags, | |
670 | struct itimerspec * new_setting, | |
671 | struct itimerspec * old_setting) | |
672 | { | |
1da177e4 LT |
673 | unsigned long when, period, irqflags; |
674 | int err = 0; | |
675 | cnodeid_t nodeid; | |
cbacdd95 DS |
676 | struct mmtimer *base; |
677 | struct rb_node *n; | |
1da177e4 LT |
678 | |
679 | if (old_setting) | |
680 | sgi_timer_get(timr, old_setting); | |
681 | ||
682 | sgi_timer_del(timr); | |
f8bd2258 RZ |
683 | when = timespec_to_ns(&new_setting->it_value); |
684 | period = timespec_to_ns(&new_setting->it_interval); | |
1da177e4 LT |
685 | |
686 | if (when == 0) | |
687 | /* Clear timer */ | |
688 | return 0; | |
689 | ||
cbacdd95 DS |
690 | base = kmalloc(sizeof(struct mmtimer), GFP_KERNEL); |
691 | if (base == NULL) | |
692 | return -ENOMEM; | |
693 | ||
1da177e4 LT |
694 | if (flags & TIMER_ABSTIME) { |
695 | struct timespec n; | |
696 | unsigned long now; | |
697 | ||
698 | getnstimeofday(&n); | |
f8bd2258 | 699 | now = timespec_to_ns(&n); |
1da177e4 LT |
700 | if (when > now) |
701 | when -= now; | |
702 | else | |
703 | /* Fire the timer immediately */ | |
704 | when = 0; | |
705 | } | |
706 | ||
707 | /* | |
708 | * Convert to sgi clock period. Need to keep rtc_time() as near as possible | |
709 | * to getnstimeofday() in order to be as faithful as possible to the time | |
710 | * specified. | |
711 | */ | |
712 | when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time(); | |
713 | period = (period + sgi_clock_period - 1) / sgi_clock_period; | |
714 | ||
715 | /* | |
716 | * We are allocating a local SHub comparator. If we would be moved to another | |
717 | * cpu then another SHub may be local to us. Prohibit that by switching off | |
718 | * preemption. | |
719 | */ | |
720 | preempt_disable(); | |
721 | ||
55642d36 | 722 | nodeid = cpu_to_node(smp_processor_id()); |
1da177e4 | 723 | |
cbacdd95 DS |
724 | /* Lock the node timer structure */ |
725 | spin_lock_irqsave(&timers[nodeid].lock, irqflags); | |
1da177e4 | 726 | |
76832c28 DS |
727 | base->timer = timr; |
728 | base->cpu = smp_processor_id(); | |
1da177e4 | 729 | |
cbacdd95 | 730 | timr->it.mmtimer.clock = TIMER_SET; |
1da177e4 LT |
731 | timr->it.mmtimer.node = nodeid; |
732 | timr->it.mmtimer.incr = period; | |
733 | timr->it.mmtimer.expires = when; | |
734 | ||
cbacdd95 DS |
735 | n = timers[nodeid].next; |
736 | ||
737 | /* Add the new struct mmtimer to node's timer list */ | |
738 | mmtimer_add_list(base); | |
739 | ||
740 | if (timers[nodeid].next == n) { | |
741 | /* No need to reprogram comparator for now */ | |
742 | spin_unlock_irqrestore(&timers[nodeid].lock, irqflags); | |
743 | preempt_enable(); | |
744 | return err; | |
1da177e4 LT |
745 | } |
746 | ||
cbacdd95 DS |
747 | /* We need to reprogram the comparator */ |
748 | if (n) | |
749 | mmtimer_disable_int(cnodeid_to_nasid(nodeid), COMPARATOR); | |
750 | ||
751 | mmtimer_set_next_timer(nodeid); | |
752 | ||
753 | /* Unlock the node timer structure */ | |
754 | spin_unlock_irqrestore(&timers[nodeid].lock, irqflags); | |
1da177e4 LT |
755 | |
756 | preempt_enable(); | |
757 | ||
758 | return err; | |
759 | } | |
760 | ||
761 | static struct k_clock sgi_clock = { | |
762 | .res = 0, | |
763 | .clock_set = sgi_clock_set, | |
764 | .clock_get = sgi_clock_get, | |
765 | .timer_create = sgi_timer_create, | |
766 | .nsleep = do_posix_clock_nonanosleep, | |
767 | .timer_set = sgi_timer_set, | |
768 | .timer_del = sgi_timer_del, | |
769 | .timer_get = sgi_timer_get | |
770 | }; | |
771 | ||
772 | /** | |
773 | * mmtimer_init - device initialization routine | |
774 | * | |
775 | * Does initial setup for the mmtimer device. | |
776 | */ | |
777 | static int __init mmtimer_init(void) | |
778 | { | |
76832c28 | 779 | cnodeid_t node, maxn = -1; |
1da177e4 LT |
780 | |
781 | if (!ia64_platform_is("sn2")) | |
f032f908 | 782 | return 0; |
1da177e4 LT |
783 | |
784 | /* | |
785 | * Sanity check the cycles/sec variable | |
786 | */ | |
787 | if (sn_rtc_cycles_per_second < 100000) { | |
788 | printk(KERN_ERR "%s: unable to determine clock frequency\n", | |
789 | MMTIMER_NAME); | |
5d469ec0 | 790 | goto out1; |
1da177e4 LT |
791 | } |
792 | ||
793 | mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second / | |
794 | 2) / sn_rtc_cycles_per_second; | |
795 | ||
0f2ed4c6 | 796 | if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, IRQF_PERCPU, MMTIMER_NAME, NULL)) { |
1da177e4 LT |
797 | printk(KERN_WARNING "%s: unable to allocate interrupt.", |
798 | MMTIMER_NAME); | |
5d469ec0 | 799 | goto out1; |
1da177e4 LT |
800 | } |
801 | ||
1da177e4 LT |
802 | if (misc_register(&mmtimer_miscdev)) { |
803 | printk(KERN_ERR "%s: failed to register device\n", | |
804 | MMTIMER_NAME); | |
5d469ec0 | 805 | goto out2; |
1da177e4 LT |
806 | } |
807 | ||
76832c28 DS |
808 | /* Get max numbered node, calculate slots needed */ |
809 | for_each_online_node(node) { | |
810 | maxn = node; | |
811 | } | |
812 | maxn++; | |
813 | ||
814 | /* Allocate list of node ptrs to mmtimer_t's */ | |
cbacdd95 | 815 | timers = kzalloc(sizeof(struct mmtimer_node)*maxn, GFP_KERNEL); |
76832c28 DS |
816 | if (timers == NULL) { |
817 | printk(KERN_ERR "%s: failed to allocate memory for device\n", | |
818 | MMTIMER_NAME); | |
5d469ec0 | 819 | goto out3; |
76832c28 DS |
820 | } |
821 | ||
cbacdd95 | 822 | /* Initialize struct mmtimer's for each online node */ |
76832c28 | 823 | for_each_online_node(node) { |
cbacdd95 DS |
824 | spin_lock_init(&timers[node].lock); |
825 | tasklet_init(&timers[node].tasklet, mmtimer_tasklet, | |
826 | (unsigned long) node); | |
76832c28 DS |
827 | } |
828 | ||
1da177e4 LT |
829 | sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second; |
830 | register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock); | |
831 | ||
832 | printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION, | |
833 | sn_rtc_cycles_per_second/(unsigned long)1E6); | |
834 | ||
835 | return 0; | |
5d469ec0 | 836 | |
5d469ec0 | 837 | out3: |
cbacdd95 | 838 | kfree(timers); |
5d469ec0 NH |
839 | misc_deregister(&mmtimer_miscdev); |
840 | out2: | |
841 | free_irq(SGI_MMTIMER_VECTOR, NULL); | |
842 | out1: | |
843 | return -1; | |
1da177e4 LT |
844 | } |
845 | ||
846 | module_init(mmtimer_init); |