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Resume TTY on SUSP and fix CRNL order in N_TTY line discipline
[deliverable/linux.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4
LT		 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
19 * - Fixed sleep with spinlock held in mxser_send_break
20 */
21
1da177e4 22#include <linux/module.h>
1da177e4
LT		 23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/timer.h>
27#include <linux/interrupt.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30#include <linux/serial.h>
31#include <linux/serial_reg.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/gfp.h>
37#include <linux/ioport.h>
38#include <linux/mm.h>
1da177e4
LT		 39#include <linux/delay.h>
40#include <linux/pci.h>
1977f032 41#include <linux/bitops.h>
1da177e4
LT		 42
43#include <asm/system.h>
44#include <asm/io.h>
45#include <asm/irq.h>
1da177e4
LT		 46#include <asm/uaccess.h>
47
48#include "mxser.h"
49
80ff8a80 50#define MXSER_VERSION "2.0.3" /* 1.11 */
1da177e4
LT		 51#define MXSERMAJOR 174
52#define MXSERCUMAJOR 175
53
1da177e4 54#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 55#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 56#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57#define MXSER_ISR_PASS_LIMIT 100
1da177e4
LT		 58
59#define MXSER_ERR_IOADDR -1
60#define MXSER_ERR_IRQ -2
61#define MXSER_ERR_IRQ_CONFLIT -3
62#define MXSER_ERR_VECTOR -4
63
1c45607a
JS		 64/*CheckIsMoxaMust return value*/
65#define MOXA_OTHER_UART 0x00
66#define MOXA_MUST_MU150_HWID 0x01
67#define MOXA_MUST_MU860_HWID 0x02
68
1da177e4
LT		 69#define WAKEUP_CHARS 256
70
71#define UART_MCR_AFE 0x20
72#define UART_LSR_SPECIAL 0x1E
73
1c45607a
JS		 74#define PCI_DEVICE_ID_CB108 0x1080
75#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 76#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 77#define PCI_DEVICE_ID_CB134I 0x1341
78#define PCI_DEVICE_ID_CP138U 0x1380
79#define PCI_DEVICE_ID_POS104UL 0x1044
1da177e4 80
1da177e4
LT		 81
82#define C168_ASIC_ID 1
83#define C104_ASIC_ID 2
84#define C102_ASIC_ID 0xB
85#define CI132_ASIC_ID 4
86#define CI134_ASIC_ID 3
87#define CI104J_ASIC_ID 5
88
1c45607a
JS		 89#define MXSER_HIGHBAUD 1
90#define MXSER_HAS2 2
1da177e4 91
8ea2c2ec 92/* This is only for PCI */
1c45607a 93static const struct {
1da177e4
LT		 94 int type;
95 int tx_fifo;
96 int rx_fifo;
97 int xmit_fifo_size;
98 int rx_high_water;
99 int rx_trigger;
100 int rx_low_water;
101 long max_baud;
1c45607a 102} Gpci_uart_info[] = {
1da177e4
LT		 103 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
104 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
105 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
106};
1c45607a 107#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 108
1c45607a
JS		 109struct mxser_cardinfo {
110 char *name;
111 unsigned int nports;
112 unsigned int flags;
113};
1da177e4 114
1c45607a
JS		 115static const struct mxser_cardinfo mxser_cards[] = {
116/* 0*/ { "C168 series", 8, },
117 { "C104 series", 4, },
118 { "CI-104J series", 4, },
119 { "C168H/PCI series", 8, },
120 { "C104H/PCI series", 4, },
121/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
122 { "CI-132 series", 4, MXSER_HAS2 },
123 { "CI-134 series", 4, },
124 { "CP-132 series", 2, },
125 { "CP-114 series", 4, },
126/*10*/ { "CT-114 series", 4, },
127 { "CP-102 series", 2, MXSER_HIGHBAUD },
128 { "CP-104U series", 4, },
129 { "CP-168U series", 8, },
130 { "CP-132U series", 2, },
131/*15*/ { "CP-134U series", 4, },
132 { "CP-104JU series", 4, },
133 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
134 { "CP-118U series", 8, },
135 { "CP-102UL series", 2, },
136/*20*/ { "CP-102U series", 2, },
137 { "CP-118EL series", 8, },
138 { "CP-168EL series", 8, },
139 { "CP-104EL series", 4, },
140 { "CB-108 series", 8, },
141/*25*/ { "CB-114 series", 4, },
142 { "CB-134I series", 4, },
143 { "CP-138U series", 8, },
80ff8a80
JS		 144 { "POS-104UL series", 4, },
145 { "CP-114UL series", 4, }
1c45607a 146};
1da177e4 147
1c45607a
JS		 148/* driver_data correspond to the lines in the structure above
149 see also ISA probe function before you change something */
1da177e4 150static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
1c45607a 175 { }
1da177e4 176};
1da177e4
LT		 177MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
178
1da177e4
LT		 179static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
180static int ttymajor = MXSERMAJOR;
1da177e4
LT		 181
182/* Variables for insmod */
183
184MODULE_AUTHOR("Casper Yang");
185MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 186module_param_array(ioaddr, int, NULL, 0);
187module_param(ttymajor, int, 0);
1da177e4
LT		 188MODULE_LICENSE("GPL");
189
190struct mxser_log {
191 int tick;
192 unsigned long rxcnt[MXSER_PORTS];
193 unsigned long txcnt[MXSER_PORTS];
194};
195
196
197struct mxser_mon {
198 unsigned long rxcnt;
199 unsigned long txcnt;
200 unsigned long up_rxcnt;
201 unsigned long up_txcnt;
202 int modem_status;
203 unsigned char hold_reason;
204};
205
206struct mxser_mon_ext {
207 unsigned long rx_cnt[32];
208 unsigned long tx_cnt[32];
209 unsigned long up_rxcnt[32];
210 unsigned long up_txcnt[32];
211 int modem_status[32];
212
213 long baudrate[32];
214 int databits[32];
215 int stopbits[32];
216 int parity[32];
217 int flowctrl[32];
218 int fifo[32];
219 int iftype[32];
220};
8ea2c2ec 221
1c45607a
JS		 222struct mxser_board;
223
224struct mxser_port {
225 struct mxser_board *board;
226 struct tty_struct *tty;
227
228 unsigned long ioaddr;
229 unsigned long opmode_ioaddr;
230 int max_baud;
1da177e4 231
1da177e4
LT		 232 int rx_high_water;
233 int rx_trigger; /* Rx fifo trigger level */
234 int rx_low_water;
235 int baud_base; /* max. speed */
1da177e4 236 int type; /* UART type */
1c45607a
JS		 237 int flags; /* defined in tty.h */
238
1da177e4 239 int x_char; /* xon/xoff character */
1da177e4
LT		 240 int IER; /* Interrupt Enable Register */
241 int MCR; /* Modem control register */
1c45607a
JS		 242
243 unsigned char stop_rx;
244 unsigned char ldisc_stop_rx;
245
246 int custom_divisor;
247 int close_delay;
248 unsigned short closing_wait;
249 unsigned char err_shadow;
1da177e4 250 unsigned long event;
1c45607a 251
1da177e4
LT		 252 int count; /* # of fd on device */
253 int blocked_open; /* # of blocked opens */
1c45607a
JS		 254 struct async_icount icount; /* kernel counters for 4 input interrupts */
255 int timeout;
256
257 int read_status_mask;
258 int ignore_status_mask;
259 int xmit_fifo_size;
1da177e4
LT		 260 unsigned char *xmit_buf;
261 int xmit_head;
262 int xmit_tail;
263 int xmit_cnt;
1c45607a 264
606d099c 265 struct ktermios normal_termios;
1c45607a 266
1da177e4 267 struct mxser_mon mon_data;
1c45607a 268
1da177e4 269 spinlock_t slock;
1c45607a
JS		 270 wait_queue_head_t open_wait;
271 wait_queue_head_t delta_msr_wait;
272};
273
274struct mxser_board {
275 unsigned int idx;
276 int irq;
277 const struct mxser_cardinfo *info;
278 unsigned long vector;
279 unsigned long vector_mask;
280
281 int chip_flag;
282 int uart_type;
283
284 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 285};
286
1da177e4
LT		 287struct mxser_mstatus {
288 tcflag_t cflag;
289 int cts;
290 int dsr;
291 int ri;
292 int dcd;
293};
294
295static struct mxser_mstatus GMStatus[MXSER_PORTS];
296
297static int mxserBoardCAP[MXSER_BOARDS] = {
298 0, 0, 0, 0
8ea2c2ec 299 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 300};
301
1c45607a 302static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 303static struct tty_driver *mxvar_sdriver;
1da177e4
LT		 304static struct mxser_log mxvar_log;
305static int mxvar_diagflag;
306static unsigned char mxser_msr[MXSER_PORTS + 1];
307static struct mxser_mon_ext mon_data_ext;
308static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 309
b8cc5549 310#ifdef CONFIG_PCI
1c45607a 311static int __devinit CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 312{
313 u8 oldmcr, hwid;
314 int i;
315
316 outb(0, io + UART_LCR);
317 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
318 oldmcr = inb(io + UART_MCR);
319 outb(0, io + UART_MCR);
320 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
321 if ((hwid = inb(io + UART_MCR)) != 0) {
322 outb(oldmcr, io + UART_MCR);
8ea2c2ec 323 return MOXA_OTHER_UART;
1da177e4
LT		 324 }
325
326 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
1c45607a
JS		 327 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
328 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 329 return (int)hwid;
1da177e4
LT		 330 }
331 return MOXA_OTHER_UART;
332}
b8cc5549 333#endif
1da177e4 334
1c45607a 335static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 336{
337 int i;
338
339 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
340 info->rx_trigger = 1;
341 info->rx_high_water = 1;
342 info->rx_low_water = 1;
343 info->xmit_fifo_size = 1;
1c45607a
JS		 344 } else
345 for (i = 0; i < UART_INFO_NUM; i++)
346 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 347 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
348 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
349 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
350 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
351 break;
352 }
1da177e4
LT		 353}
354
1c45607a 355static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 356{
1c45607a 357 unsigned char status = 0;
1da177e4 358
1c45607a 359 status = inb(baseaddr + UART_MSR);
1da177e4 360
1c45607a
JS		 361 mxser_msr[port] &= 0x0F;
362 mxser_msr[port] |= status;
363 status = mxser_msr[port];
364 if (mode)
365 mxser_msr[port] = 0;
1da177e4 366
1c45607a
JS		 367 return status;
368}
1da177e4 369
1c45607a
JS		 370static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
371 struct mxser_port *port)
372{
373 DECLARE_WAITQUEUE(wait, current);
374 int retval;
375 int do_clocal = 0;
376 unsigned long flags;
1da177e4 377
1c45607a
JS		 378 /*
379 * If non-blocking mode is set, or the port is not enabled,
380 * then make the check up front and then exit.
381 */
382 if ((filp->f_flags & O_NONBLOCK) ||
383 test_bit(TTY_IO_ERROR, &tty->flags)) {
384 port->flags |= ASYNC_NORMAL_ACTIVE;
385 return 0;
386 }
1da177e4 387
1c45607a
JS		 388 if (tty->termios->c_cflag & CLOCAL)
389 do_clocal = 1;
1da177e4 390
1da177e4 391 /*
1c45607a
JS		 392 * Block waiting for the carrier detect and the line to become
393 * free (i.e., not in use by the callout). While we are in
394 * this loop, port->count is dropped by one, so that
395 * mxser_close() knows when to free things. We restore it upon
396 * exit, either normal or abnormal.
1da177e4 397 */
1c45607a
JS		 398 retval = 0;
399 add_wait_queue(&port->open_wait, &wait);
1da177e4 400
1c45607a
JS		 401 spin_lock_irqsave(&port->slock, flags);
402 if (!tty_hung_up_p(filp))
403 port->count--;
404 spin_unlock_irqrestore(&port->slock, flags);
405 port->blocked_open++;
406 while (1) {
407 spin_lock_irqsave(&port->slock, flags);
408 outb(inb(port->ioaddr + UART_MCR) |
409 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
410 spin_unlock_irqrestore(&port->slock, flags);
411 set_current_state(TASK_INTERRUPTIBLE);
412 if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
413 if (port->flags & ASYNC_HUP_NOTIFY)
414 retval = -EAGAIN;
415 else
416 retval = -ERESTARTSYS;
417 break;
418 }
419 if (!(port->flags & ASYNC_CLOSING) &&
420 (do_clocal ||
421 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
422 break;
423 if (signal_pending(current)) {
424 retval = -ERESTARTSYS;
425 break;
426 }
427 schedule();
1da177e4 428 }
1c45607a
JS		 429 set_current_state(TASK_RUNNING);
430 remove_wait_queue(&port->open_wait, &wait);
431 if (!tty_hung_up_p(filp))
432 port->count++;
433 port->blocked_open--;
434 if (retval)
1da177e4 435 return retval;
1c45607a 436 port->flags |= ASYNC_NORMAL_ACTIVE;
1da177e4
LT		 437 return 0;
438}
439
1c45607a 440static int mxser_set_baud(struct mxser_port *info, long newspd)
1da177e4 441{
1c45607a
JS		 442 int quot = 0, baud;
443 unsigned char cval;
1da177e4 444
1c45607a
JS		 445 if (!info->tty || !info->tty->termios)
446 return -1;
1da177e4 447
1c45607a
JS		 448 if (!(info->ioaddr))
449 return -1;
1da177e4 450
1c45607a
JS		 451 if (newspd > info->max_baud)
452 return -1;
1da177e4 453
1c45607a
JS		 454 if (newspd == 134) {
455 quot = 2 * info->baud_base / 269;
456 tty_encode_baud_rate(info->tty, 134, 134);
457 } else if (newspd) {
458 quot = info->baud_base / newspd;
459 if (quot == 0)
460 quot = 1;
461 baud = info->baud_base/quot;
462 tty_encode_baud_rate(info->tty, baud, baud);
463 } else {
464 quot = 0;
465 }
1da177e4 466
1c45607a
JS		 467 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
468 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 469
1c45607a
JS		 470 if (quot) {
471 info->MCR |= UART_MCR_DTR;
472 outb(info->MCR, info->ioaddr + UART_MCR);
473 } else {
474 info->MCR &= ~UART_MCR_DTR;
475 outb(info->MCR, info->ioaddr + UART_MCR);
476 return 0;
477 }
1da177e4 478
1c45607a 479 cval = inb(info->ioaddr + UART_LCR);
1da177e4 480
1c45607a 481 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 482
1c45607a
JS		 483 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
484 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
485 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 486
1c45607a
JS		 487#ifdef BOTHER
488 if (C_BAUD(info->tty) == BOTHER) {
489 quot = info->baud_base % newspd;
490 quot *= 8;
491 if (quot % newspd > newspd / 2) {
492 quot /= newspd;
493 quot++;
494 } else
495 quot /= newspd;
496
497 SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, quot);
498 } else
499#endif
500 SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, 0);
1da177e4 501
8ea2c2ec 502 return 0;
1da177e4 503}
1da177e4 504
1c45607a
JS		 505/*
506 * This routine is called to set the UART divisor registers to match
507 * the specified baud rate for a serial port.
508 */
509static int mxser_change_speed(struct mxser_port *info,
510 struct ktermios *old_termios)
1da177e4 511{
1c45607a
JS		 512 unsigned cflag, cval, fcr;
513 int ret = 0;
514 unsigned char status;
1da177e4 515
1c45607a
JS		 516 if (!info->tty || !info->tty->termios)
517 return ret;
518 cflag = info->tty->termios->c_cflag;
519 if (!(info->ioaddr))
520 return ret;
1da177e4 521
1c45607a
JS		 522 if (mxser_set_baud_method[info->tty->index] == 0)
523 mxser_set_baud(info, tty_get_baud_rate(info->tty));
1da177e4 524
1c45607a
JS		 525 /* byte size and parity */
526 switch (cflag & CSIZE) {
527 case CS5:
528 cval = 0x00;
529 break;
530 case CS6:
531 cval = 0x01;
532 break;
533 case CS7:
534 cval = 0x02;
535 break;
536 case CS8:
537 cval = 0x03;
538 break;
539 default:
540 cval = 0x00;
541 break; /* too keep GCC shut... */
542 }
543 if (cflag & CSTOPB)
544 cval |= 0x04;
545 if (cflag & PARENB)
546 cval |= UART_LCR_PARITY;
547 if (!(cflag & PARODD))
548 cval |= UART_LCR_EPAR;
549 if (cflag & CMSPAR)
550 cval |= UART_LCR_SPAR;
1da177e4 551
1c45607a
JS		 552 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
553 if (info->board->chip_flag) {
554 fcr = UART_FCR_ENABLE_FIFO;
555 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
556 SET_MOXA_MUST_FIFO_VALUE(info);
557 } else
558 fcr = 0;
559 } else {
560 fcr = UART_FCR_ENABLE_FIFO;
561 if (info->board->chip_flag) {
562 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
563 SET_MOXA_MUST_FIFO_VALUE(info);
564 } else {
565 switch (info->rx_trigger) {
566 case 1:
567 fcr |= UART_FCR_TRIGGER_1;
568 break;
569 case 4:
570 fcr |= UART_FCR_TRIGGER_4;
571 break;
572 case 8:
573 fcr |= UART_FCR_TRIGGER_8;
574 break;
575 default:
576 fcr |= UART_FCR_TRIGGER_14;
577 break;
578 }
1da177e4 579 }
1da177e4
LT		 580 }
581
1c45607a
JS		 582 /* CTS flow control flag and modem status interrupts */
583 info->IER &= ~UART_IER_MSI;
584 info->MCR &= ~UART_MCR_AFE;
585 if (cflag & CRTSCTS) {
586 info->flags |= ASYNC_CTS_FLOW;
587 info->IER |= UART_IER_MSI;
588 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
589 info->MCR |= UART_MCR_AFE;
590 } else {
591 status = inb(info->ioaddr + UART_MSR);
592 if (info->tty->hw_stopped) {
593 if (status & UART_MSR_CTS) {
594 info->tty->hw_stopped = 0;
595 if (info->type != PORT_16550A &&
596 !info->board->chip_flag) {
597 outb(info->IER & ~UART_IER_THRI,
598 info->ioaddr +
599 UART_IER);
600 info->IER |= UART_IER_THRI;
601 outb(info->IER, info->ioaddr +
602 UART_IER);
603 }
604 tty_wakeup(info->tty);
605 }
606 } else {
607 if (!(status & UART_MSR_CTS)) {
608 info->tty->hw_stopped = 1;
609 if ((info->type != PORT_16550A) &&
610 (!info->board->chip_flag)) {
611 info->IER &= ~UART_IER_THRI;
612 outb(info->IER, info->ioaddr +
613 UART_IER);
614 }
615 }
616 }
1da177e4 617 }
1c45607a
JS		 618 } else {
619 info->flags &= ~ASYNC_CTS_FLOW;
620 }
621 outb(info->MCR, info->ioaddr + UART_MCR);
622 if (cflag & CLOCAL) {
623 info->flags &= ~ASYNC_CHECK_CD;
624 } else {
625 info->flags |= ASYNC_CHECK_CD;
626 info->IER |= UART_IER_MSI;
627 }
628 outb(info->IER, info->ioaddr + UART_IER);
629
630 /*
631 * Set up parity check flag
632 */
633 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
634 if (I_INPCK(info->tty))
635 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
636 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
637 info->read_status_mask |= UART_LSR_BI;
1da177e4 638
1c45607a 639 info->ignore_status_mask = 0;
1da177e4 640
1c45607a
JS		 641 if (I_IGNBRK(info->tty)) {
642 info->ignore_status_mask |= UART_LSR_BI;
643 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 644 /*
1c45607a
JS		 645 * If we're ignore parity and break indicators, ignore
646 * overruns too. (For real raw support).
8ea2c2ec 647 */
1c45607a
JS		 648 if (I_IGNPAR(info->tty)) {
649 info->ignore_status_mask |=
650 UART_LSR_OE |
651 UART_LSR_PE |
652 UART_LSR_FE;
653 info->read_status_mask |=
654 UART_LSR_OE |
655 UART_LSR_PE |
656 UART_LSR_FE;
657 }
1da177e4 658 }
1c45607a
JS		 659 if (info->board->chip_flag) {
660 SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty));
661 SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty));
662 if (I_IXON(info->tty)) {
663 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
664 } else {
665 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1da177e4 666 }
1c45607a
JS		 667 if (I_IXOFF(info->tty)) {
668 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
669 } else {
670 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1da177e4
LT		 671 }
672 }
1da177e4 673
1da177e4 674
1c45607a
JS		 675 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
676 outb(cval, info->ioaddr + UART_LCR);
1da177e4 677
1c45607a 678 return ret;
1da177e4
LT		 679}
680
1c45607a 681static void mxser_check_modem_status(struct mxser_port *port, int status)
1da177e4 682{
1c45607a
JS		 683 /* update input line counters */
684 if (status & UART_MSR_TERI)
685 port->icount.rng++;
686 if (status & UART_MSR_DDSR)
687 port->icount.dsr++;
688 if (status & UART_MSR_DDCD)
689 port->icount.dcd++;
690 if (status & UART_MSR_DCTS)
691 port->icount.cts++;
692 port->mon_data.modem_status = status;
693 wake_up_interruptible(&port->delta_msr_wait);
1da177e4 694
1c45607a
JS		 695 if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
696 if (status & UART_MSR_DCD)
697 wake_up_interruptible(&port->open_wait);
698 }
1da177e4 699
1c45607a
JS		 700 if (port->flags & ASYNC_CTS_FLOW) {
701 if (port->tty->hw_stopped) {
702 if (status & UART_MSR_CTS) {
703 port->tty->hw_stopped = 0;
704
705 if ((port->type != PORT_16550A) &&
706 (!port->board->chip_flag)) {
707 outb(port->IER & ~UART_IER_THRI,
708 port->ioaddr + UART_IER);
709 port->IER |= UART_IER_THRI;
710 outb(port->IER, port->ioaddr +
711 UART_IER);
712 }
713 tty_wakeup(port->tty);
714 }
715 } else {
716 if (!(status & UART_MSR_CTS)) {
717 port->tty->hw_stopped = 1;
718 if (port->type != PORT_16550A &&
719 !port->board->chip_flag) {
720 port->IER &= ~UART_IER_THRI;
721 outb(port->IER, port->ioaddr +
722 UART_IER);
723 }
724 }
725 }
1da177e4
LT		 726 }
727}
728
1c45607a 729static int mxser_startup(struct mxser_port *info)
1da177e4 730{
1c45607a
JS		 731 unsigned long page;
732 unsigned long flags;
1da177e4 733
1c45607a
JS		 734 page = __get_free_page(GFP_KERNEL);
735 if (!page)
736 return -ENOMEM;
1da177e4 737
1c45607a 738 spin_lock_irqsave(&info->slock, flags);
1da177e4 739
1c45607a
JS		 740 if (info->flags & ASYNC_INITIALIZED) {
741 free_page(page);
742 spin_unlock_irqrestore(&info->slock, flags);
743 return 0;
744 }
6f08b72c 745
1c45607a
JS		 746 if (!info->ioaddr || !info->type) {
747 if (info->tty)
748 set_bit(TTY_IO_ERROR, &info->tty->flags);
749 free_page(page);
750 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 751 return 0;
1c45607a
JS		 752 }
753 if (info->xmit_buf)
754 free_page(page);
755 else
756 info->xmit_buf = (unsigned char *) page;
1da177e4 757
1da177e4 758 /*
1c45607a
JS		 759 * Clear the FIFO buffers and disable them
760 * (they will be reenabled in mxser_change_speed())
1da177e4 761 */
1c45607a
JS		 762 if (info->board->chip_flag)
763 outb((UART_FCR_CLEAR_RCVR |
764 UART_FCR_CLEAR_XMIT |
765 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
766 else
767 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
768 info->ioaddr + UART_FCR);
1da177e4 769
1c45607a
JS		 770 /*
771 * At this point there's no way the LSR could still be 0xFF;
772 * if it is, then bail out, because there's likely no UART
773 * here.
774 */
775 if (inb(info->ioaddr + UART_LSR) == 0xff) {
776 spin_unlock_irqrestore(&info->slock, flags);
777 if (capable(CAP_SYS_ADMIN)) {
778 if (info->tty)
779 set_bit(TTY_IO_ERROR, &info->tty->flags);
780 return 0;
781 } else
782 return -ENODEV;
783 }
1da177e4 784
1c45607a
JS		 785 /*
786 * Clear the interrupt registers.
787 */
788 (void) inb(info->ioaddr + UART_LSR);
789 (void) inb(info->ioaddr + UART_RX);
790 (void) inb(info->ioaddr + UART_IIR);
791 (void) inb(info->ioaddr + UART_MSR);
792
793 /*
794 * Now, initialize the UART
795 */
796 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
797 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
798 outb(info->MCR, info->ioaddr + UART_MCR);
799
800 /*
801 * Finally, enable interrupts
802 */
803 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
804
805 if (info->board->chip_flag)
806 info->IER |= MOXA_MUST_IER_EGDAI;
807 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
808
809 /*
810 * And clear the interrupt registers again for luck.
811 */
812 (void) inb(info->ioaddr + UART_LSR);
813 (void) inb(info->ioaddr + UART_RX);
814 (void) inb(info->ioaddr + UART_IIR);
815 (void) inb(info->ioaddr + UART_MSR);
816
817 if (info->tty)
818 clear_bit(TTY_IO_ERROR, &info->tty->flags);
819 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
820
821 /*
822 * and set the speed of the serial port
823 */
824 mxser_change_speed(info, NULL);
825 info->flags |= ASYNC_INITIALIZED;
826 spin_unlock_irqrestore(&info->slock, flags);
827
828 return 0;
829}
830
831/*
832 * This routine will shutdown a serial port; interrupts maybe disabled, and
833 * DTR is dropped if the hangup on close termio flag is on.
834 */
835static void mxser_shutdown(struct mxser_port *info)
836{
837 unsigned long flags;
838
839 if (!(info->flags & ASYNC_INITIALIZED))
840 return;
841
842 spin_lock_irqsave(&info->slock, flags);
843
844 /*
845 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
846 * here so the queue might never be waken up
847 */
848 wake_up_interruptible(&info->delta_msr_wait);
849
850 /*
851 * Free the IRQ, if necessary
852 */
853 if (info->xmit_buf) {
854 free_page((unsigned long) info->xmit_buf);
855 info->xmit_buf = NULL;
1da177e4
LT		 856 }
857
1c45607a
JS		 858 info->IER = 0;
859 outb(0x00, info->ioaddr + UART_IER);
860
861 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
862 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
863 outb(info->MCR, info->ioaddr + UART_MCR);
864
865 /* clear Rx/Tx FIFO's */
866 if (info->board->chip_flag)
867 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
868 MOXA_MUST_FCR_GDA_MODE_ENABLE,
869 info->ioaddr + UART_FCR);
870 else
871 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
872 info->ioaddr + UART_FCR);
873
874 /* read data port to reset things */
875 (void) inb(info->ioaddr + UART_RX);
876
877 if (info->tty)
878 set_bit(TTY_IO_ERROR, &info->tty->flags);
879
880 info->flags &= ~ASYNC_INITIALIZED;
881
882 if (info->board->chip_flag)
883 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
884
885 spin_unlock_irqrestore(&info->slock, flags);
886}
887
888/*
889 * This routine is called whenever a serial port is opened. It
890 * enables interrupts for a serial port, linking in its async structure into
891 * the IRQ chain. It also performs the serial-specific
892 * initialization for the tty structure.
893 */
894static int mxser_open(struct tty_struct *tty, struct file *filp)
895{
896 struct mxser_port *info;
897 unsigned long flags;
898 int retval, line;
899
900 line = tty->index;
901 if (line == MXSER_PORTS)
902 return 0;
903 if (line < 0 || line > MXSER_PORTS)
904 return -ENODEV;
905 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
906 if (!info->ioaddr)
907 return -ENODEV;
908
909 tty->driver_data = info;
910 info->tty = tty;
8ea2c2ec 911 /*
1c45607a
JS		 912 * Start up serial port
913 */
914 spin_lock_irqsave(&info->slock, flags);
915 info->count++;
916 spin_unlock_irqrestore(&info->slock, flags);
917 retval = mxser_startup(info);
918 if (retval)
919 return retval;
920
921 retval = mxser_block_til_ready(tty, filp, info);
922 if (retval)
923 return retval;
1da177e4 924
8cddd707 925 /* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 926 tty->low_latency = 1;
927 return 0;
928}
929
930/*
931 * This routine is called when the serial port gets closed. First, we
932 * wait for the last remaining data to be sent. Then, we unlink its
933 * async structure from the interrupt chain if necessary, and we free
934 * that IRQ if nothing is left in the chain.
935 */
936static void mxser_close(struct tty_struct *tty, struct file *filp)
937{
1c45607a 938 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 939
940 unsigned long timeout;
941 unsigned long flags;
1da177e4
LT		 942
943 if (tty->index == MXSER_PORTS)
944 return;
945 if (!info)
6f08b72c 946 return;
1da177e4
LT		 947
948 spin_lock_irqsave(&info->slock, flags);
949
950 if (tty_hung_up_p(filp)) {
951 spin_unlock_irqrestore(&info->slock, flags);
952 return;
953 }
954 if ((tty->count == 1) && (info->count != 1)) {
955 /*
956 * Uh, oh. tty->count is 1, which means that the tty
957 * structure will be freed. Info->count should always
958 * be one in these conditions. If it's greater than
959 * one, we've got real problems, since it means the
960 * serial port won't be shutdown.
961 */
8ea2c2ec
JJ		 962 printk(KERN_ERR "mxser_close: bad serial port count; "
963 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 964 info->count = 1;
965 }
966 if (--info->count < 0) {
8ea2c2ec 967 printk(KERN_ERR "mxser_close: bad serial port count for "
1c45607a 968 "ttys%d: %d\n", tty->index, info->count);
1da177e4
LT		 969 info->count = 0;
970 }
971 if (info->count) {
972 spin_unlock_irqrestore(&info->slock, flags);
973 return;
974 }
975 info->flags |= ASYNC_CLOSING;
976 spin_unlock_irqrestore(&info->slock, flags);
977 /*
978 * Save the termios structure, since this port may have
979 * separate termios for callout and dialin.
980 */
981 if (info->flags & ASYNC_NORMAL_ACTIVE)
982 info->normal_termios = *tty->termios;
983 /*
984 * Now we wait for the transmit buffer to clear; and we notify
985 * the line discipline to only process XON/XOFF characters.
986 */
987 tty->closing = 1;
988 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
989 tty_wait_until_sent(tty, info->closing_wait);
990 /*
991 * At this point we stop accepting input. To do this, we
992 * disable the receive line status interrupts, and tell the
993 * interrupt driver to stop checking the data ready bit in the
994 * line status register.
995 */
996 info->IER &= ~UART_IER_RLSI;
1c45607a 997 if (info->board->chip_flag)
1da177e4 998 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 999
1da177e4 1000 if (info->flags & ASYNC_INITIALIZED) {
1c45607a 1001 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1002 /*
1003 * Before we drop DTR, make sure the UART transmitter
1004 * has completely drained; this is especially
1005 * important if there is a transmit FIFO!
1006 */
1007 timeout = jiffies + HZ;
1c45607a 1008 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1009 schedule_timeout_interruptible(5);
1da177e4
LT		 1010 if (time_after(jiffies, timeout))
1011 break;
1012 }
1013 }
1014 mxser_shutdown(info);
1015
1016 if (tty->driver->flush_buffer)
1017 tty->driver->flush_buffer(tty);
1c45607a
JS		 1018
1019 tty_ldisc_flush(tty);
1020
1da177e4
LT		 1021 tty->closing = 0;
1022 info->event = 0;
1023 info->tty = NULL;
1024 if (info->blocked_open) {
da4cd8df
NA		 1025 if (info->close_delay)
1026 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1027 wake_up_interruptible(&info->open_wait);
1028 }
1029
1030 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1da177e4
LT		 1031}
1032
1033static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1034{
1035 int c, total = 0;
1c45607a 1036 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1037 unsigned long flags;
1038
8a7f7c93 1039 if (!info->xmit_buf)
8ea2c2ec 1040 return 0;
1da177e4
LT		 1041
1042 while (1) {
8ea2c2ec
JJ		 1043 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1044 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1045 if (c <= 0)
1046 break;
1047
1048 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1049 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1050 info->xmit_head = (info->xmit_head + c) &
1051 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1052 info->xmit_cnt += c;
1053 spin_unlock_irqrestore(&info->slock, flags);
1054
1055 buf += c;
1056 count -= c;
1057 total += c;
1da177e4
LT		 1058 }
1059
1c45607a 1060 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1061 if (!tty->hw_stopped ||
1062 (info->type == PORT_16550A) ||
1c45607a 1063 (info->board->chip_flag)) {
1da177e4 1064 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1065 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1066 UART_IER);
1da177e4 1067 info->IER |= UART_IER_THRI;
1c45607a 1068 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1069 spin_unlock_irqrestore(&info->slock, flags);
1070 }
1071 }
1072 return total;
1073}
1074
1075static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1076{
1c45607a 1077 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1078 unsigned long flags;
1079
8a7f7c93 1080 if (!info->xmit_buf)
1da177e4
LT		 1081 return;
1082
1083 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1084 return;
1085
1086 spin_lock_irqsave(&info->slock, flags);
1087 info->xmit_buf[info->xmit_head++] = ch;
1088 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1089 info->xmit_cnt++;
1090 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1091 if (!tty->stopped) {
8ea2c2ec
JJ		 1092 if (!tty->hw_stopped ||
1093 (info->type == PORT_16550A) ||
1c45607a 1094 info->board->chip_flag) {
1da177e4 1095 spin_lock_irqsave(&info->slock, flags);
1c45607a 1096 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1097 info->IER |= UART_IER_THRI;
1c45607a 1098 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1099 spin_unlock_irqrestore(&info->slock, flags);
1100 }
1101 }
1102}
1103
1104
1105static void mxser_flush_chars(struct tty_struct *tty)
1106{
1c45607a 1107 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1108 unsigned long flags;
1109
8ea2c2ec
JJ		 1110 if (info->xmit_cnt <= 0 ||
1111 tty->stopped ||
1112 !info->xmit_buf ||
1113 (tty->hw_stopped &&
1114 (info->type != PORT_16550A) &&
1c45607a 1115 (!info->board->chip_flag)
8ea2c2ec 1116 ))
1da177e4
LT		 1117 return;
1118
1119 spin_lock_irqsave(&info->slock, flags);
1120
1c45607a 1121 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1122 info->IER |= UART_IER_THRI;
1c45607a 1123 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1124
1125 spin_unlock_irqrestore(&info->slock, flags);
1126}
1127
1128static int mxser_write_room(struct tty_struct *tty)
1129{
1c45607a 1130 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1131 int ret;
1132
1133 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1134 if (ret < 0)
1135 ret = 0;
8ea2c2ec 1136 return ret;
1da177e4
LT		 1137}
1138
1139static int mxser_chars_in_buffer(struct tty_struct *tty)
1140{
1c45607a 1141 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1142 return info->xmit_cnt;
1143}
1144
1145static void mxser_flush_buffer(struct tty_struct *tty)
1146{
1c45607a 1147 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1148 char fcr;
1149 unsigned long flags;
1150
1151
1152 spin_lock_irqsave(&info->slock, flags);
1153 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1154
1c45607a 1155 fcr = inb(info->ioaddr + UART_FCR);
8ea2c2ec 1156 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1c45607a
JS		 1157 info->ioaddr + UART_FCR);
1158 outb(fcr, info->ioaddr + UART_FCR);
1da177e4
LT		 1159
1160 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1161
b963a844 1162 tty_wakeup(tty);
1da177e4
LT		 1163}
1164
1c45607a
JS		 1165/*
1166 * ------------------------------------------------------------
1167 * friends of mxser_ioctl()
1168 * ------------------------------------------------------------
1169 */
1170static int mxser_get_serial_info(struct mxser_port *info,
1171 struct serial_struct __user *retinfo)
1172{
1173 struct serial_struct tmp = {
1174 .type = info->type,
1175 .line = info->tty->index,
1176 .port = info->ioaddr,
1177 .irq = info->board->irq,
1178 .flags = info->flags,
1179 .baud_base = info->baud_base,
1180 .close_delay = info->close_delay,
1181 .closing_wait = info->closing_wait,
1182 .custom_divisor = info->custom_divisor,
1183 .hub6 = 0
1184 };
1185 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1186 return -EFAULT;
1187 return 0;
1188}
1189
1190static int mxser_set_serial_info(struct mxser_port *info,
1191 struct serial_struct __user *new_info)
1da177e4 1192{
1c45607a 1193 struct serial_struct new_serial;
80ff8a80 1194 speed_t baud;
1c45607a
JS		 1195 unsigned long sl_flags;
1196 unsigned int flags;
1197 int retval = 0;
1da177e4 1198
1c45607a 1199 if (!new_info || !info->ioaddr)
80ff8a80 1200 return -ENODEV;
1c45607a
JS		 1201 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1202 return -EFAULT;
1da177e4 1203
80ff8a80
JS		 1204 if (new_serial.irq != info->board->irq ||
1205 new_serial.port != info->ioaddr)
1206 return -EINVAL;
1da177e4 1207
1c45607a 1208 flags = info->flags & ASYNC_SPD_MASK;
1da177e4 1209
1c45607a
JS		 1210 if (!capable(CAP_SYS_ADMIN)) {
1211 if ((new_serial.baud_base != info->baud_base) ||
1212 (new_serial.close_delay != info->close_delay) ||
1213 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
1214 return -EPERM;
1215 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1216 (new_serial.flags & ASYNC_USR_MASK));
1217 } else {
1da177e4 1218 /*
1c45607a
JS		 1219 * OK, past this point, all the error checking has been done.
1220 * At this point, we start making changes.....
1da177e4 1221 */
1c45607a
JS		 1222 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1223 (new_serial.flags & ASYNC_FLAGS));
1224 info->close_delay = new_serial.close_delay * HZ / 100;
1225 info->closing_wait = new_serial.closing_wait * HZ / 100;
1226 info->tty->low_latency =
1227 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1228 info->tty->low_latency = 0;
80ff8a80
JS		 1229 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1230 (new_serial.baud_base != info->baud_base ||
1231 new_serial.custom_divisor !=
1232 info->custom_divisor)) {
1233 baud = new_serial.baud_base / new_serial.custom_divisor;
1234 tty_encode_baud_rate(info->tty, baud, baud);
1235 }
1c45607a 1236 }
fc83815c 1237
1c45607a 1238 info->type = new_serial.type;
1da177e4 1239
1c45607a
JS		 1240 process_txrx_fifo(info);
1241
1242 if (info->flags & ASYNC_INITIALIZED) {
1243 if (flags != (info->flags & ASYNC_SPD_MASK)) {
1244 spin_lock_irqsave(&info->slock, sl_flags);
1245 mxser_change_speed(info, NULL);
1246 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1247 }
1c45607a
JS		 1248 } else
1249 retval = mxser_startup(info);
1da177e4 1250
1c45607a
JS		 1251 return retval;
1252}
1da177e4 1253
1c45607a
JS		 1254/*
1255 * mxser_get_lsr_info - get line status register info
1256 *
1257 * Purpose: Let user call ioctl() to get info when the UART physically
1258 * is emptied. On bus types like RS485, the transmitter must
1259 * release the bus after transmitting. This must be done when
1260 * the transmit shift register is empty, not be done when the
1261 * transmit holding register is empty. This functionality
1262 * allows an RS485 driver to be written in user space.
1263 */
1264static int mxser_get_lsr_info(struct mxser_port *info,
1265 unsigned int __user *value)
1266{
1267 unsigned char status;
1268 unsigned int result;
1269 unsigned long flags;
1da177e4 1270
1c45607a
JS		 1271 spin_lock_irqsave(&info->slock, flags);
1272 status = inb(info->ioaddr + UART_LSR);
1273 spin_unlock_irqrestore(&info->slock, flags);
1274 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1275 return put_user(result, value);
1276}
1da177e4 1277
1c45607a
JS		 1278/*
1279 * This routine sends a break character out the serial port.
1280 */
1281static void mxser_send_break(struct mxser_port *info, int duration)
1282{
1283 unsigned long flags;
1da177e4 1284
1c45607a
JS		 1285 if (!info->ioaddr)
1286 return;
1287 set_current_state(TASK_INTERRUPTIBLE);
1288 spin_lock_irqsave(&info->slock, flags);
1289 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
1290 info->ioaddr + UART_LCR);
1291 spin_unlock_irqrestore(&info->slock, flags);
1292 schedule_timeout(duration);
1293 spin_lock_irqsave(&info->slock, flags);
1294 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
1295 info->ioaddr + UART_LCR);
1296 spin_unlock_irqrestore(&info->slock, flags);
1297}
1da177e4 1298
1c45607a
JS		 1299static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1300{
1301 struct mxser_port *info = tty->driver_data;
1302 unsigned char control, status;
1303 unsigned long flags;
1da177e4 1304
8ea2c2ec 1305
1c45607a
JS		 1306 if (tty->index == MXSER_PORTS)
1307 return -ENOIOCTLCMD;
1308 if (test_bit(TTY_IO_ERROR, &tty->flags))
1309 return -EIO;
1da177e4 1310
1c45607a 1311 control = info->MCR;
1da177e4 1312
1c45607a
JS		 1313 spin_lock_irqsave(&info->slock, flags);
1314 status = inb(info->ioaddr + UART_MSR);
1315 if (status & UART_MSR_ANY_DELTA)
1316 mxser_check_modem_status(info, status);
1317 spin_unlock_irqrestore(&info->slock, flags);
1318 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1319 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1320 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1321 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1322 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1323 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1324}
1da177e4 1325
1c45607a
JS		 1326static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1327 unsigned int set, unsigned int clear)
1328{
1329 struct mxser_port *info = tty->driver_data;
1330 unsigned long flags;
1da177e4 1331
1da177e4 1332
1c45607a
JS		 1333 if (tty->index == MXSER_PORTS)
1334 return -ENOIOCTLCMD;
1335 if (test_bit(TTY_IO_ERROR, &tty->flags))
1336 return -EIO;
1da177e4 1337
1c45607a 1338 spin_lock_irqsave(&info->slock, flags);
1da177e4 1339
1c45607a
JS		 1340 if (set & TIOCM_RTS)
1341 info->MCR |= UART_MCR_RTS;
1342 if (set & TIOCM_DTR)
1343 info->MCR |= UART_MCR_DTR;
1da177e4 1344
1c45607a
JS		 1345 if (clear & TIOCM_RTS)
1346 info->MCR &= ~UART_MCR_RTS;
1347 if (clear & TIOCM_DTR)
1348 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1349
1c45607a
JS		 1350 outb(info->MCR, info->ioaddr + UART_MCR);
1351 spin_unlock_irqrestore(&info->slock, flags);
1352 return 0;
1353}
1da177e4 1354
1c45607a
JS		 1355static int __init mxser_program_mode(int port)
1356{
1357 int id, i, j, n;
1358
1359 outb(0, port);
1360 outb(0, port);
1361 outb(0, port);
1362 (void)inb(port);
1363 (void)inb(port);
1364 outb(0, port);
1365 (void)inb(port);
1366
1367 id = inb(port + 1) & 0x1F;
1368 if ((id != C168_ASIC_ID) &&
1369 (id != C104_ASIC_ID) &&
1370 (id != C102_ASIC_ID) &&
1371 (id != CI132_ASIC_ID) &&
1372 (id != CI134_ASIC_ID) &&
1373 (id != CI104J_ASIC_ID))
1374 return -1;
1375 for (i = 0, j = 0; i < 4; i++) {
1376 n = inb(port + 2);
1377 if (n == 'M') {
1378 j = 1;
1379 } else if ((j == 1) && (n == 1)) {
1380 j = 2;
1381 break;
1382 } else
1383 j = 0;
1da177e4 1384 }
1c45607a
JS		 1385 if (j != 2)
1386 id = -2;
1387 return id;
1da177e4
LT		 1388}
1389
1c45607a
JS		 1390static void __init mxser_normal_mode(int port)
1391{
1392 int i, n;
1393
1394 outb(0xA5, port + 1);
1395 outb(0x80, port + 3);
1396 outb(12, port + 0); /* 9600 bps */
1397 outb(0, port + 1);
1398 outb(0x03, port + 3); /* 8 data bits */
1399 outb(0x13, port + 4); /* loop back mode */
1400 for (i = 0; i < 16; i++) {
1401 n = inb(port + 5);
1402 if ((n & 0x61) == 0x60)
1403 break;
1404 if ((n & 1) == 1)
1405 (void)inb(port);
1406 }
1407 outb(0x00, port + 4);
1408}
1409
1410#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1411#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1412#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1413#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1414#define EN_CCMD 0x000 /* Chip's command register */
1415#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1416#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1417#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1418#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1419#define EN0_DCFG 0x00E /* Data configuration reg WR */
1420#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1421#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1422#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1423static int __init mxser_read_register(int port, unsigned short *regs)
1424{
1425 int i, k, value, id;
1426 unsigned int j;
1427
1428 id = mxser_program_mode(port);
1429 if (id < 0)
1430 return id;
1431 for (i = 0; i < 14; i++) {
1432 k = (i & 0x3F) | 0x180;
1433 for (j = 0x100; j > 0; j >>= 1) {
1434 outb(CHIP_CS, port);
1435 if (k & j) {
1436 outb(CHIP_CS | CHIP_DO, port);
1437 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1438 } else {
1439 outb(CHIP_CS, port);
1440 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1441 }
1442 }
1443 (void)inb(port);
1444 value = 0;
1445 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1446 outb(CHIP_CS, port);
1447 outb(CHIP_CS | CHIP_SK, port);
1448 if (inb(port) & CHIP_DI)
1449 value |= j;
1450 }
1451 regs[i] = value;
1452 outb(0, port);
1453 }
1454 mxser_normal_mode(port);
1455 return id;
1456}
1da177e4
LT		 1457
1458static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1459{
1c45607a
JS		 1460 struct mxser_port *port;
1461 int result, status;
1462 unsigned int i, j;
9d6d162d 1463 int ret = 0;
1da177e4
LT		 1464
1465 switch (cmd) {
1da177e4 1466 case MOXA_GET_MAJOR:
1c45607a 1467 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1468
1469 case MOXA_CHKPORTENABLE:
1470 result = 0;
9d6d162d 1471 lock_kernel();
1c45607a
JS		 1472 for (i = 0; i < MXSER_BOARDS; i++)
1473 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1474 if (mxser_boards[i].ports[j].ioaddr)
1475 result |= (1 << i);
9d6d162d 1476 unlock_kernel();
8ea2c2ec 1477 return put_user(result, (unsigned long __user *)argp);
1da177e4 1478 case MOXA_GETDATACOUNT:
9d6d162d 1479 lock_kernel();
1da177e4 1480 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d
AC		 1481 ret = -EFAULT;
1482 unlock_kernel();
1483 return ret;
1da177e4 1484 case MOXA_GETMSTATUS:
9d6d162d 1485 lock_kernel();
1c45607a
JS		 1486 for (i = 0; i < MXSER_BOARDS; i++)
1487 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1488 port = &mxser_boards[i].ports[j];
1489
1490 GMStatus[i].ri = 0;
1491 if (!port->ioaddr) {
1492 GMStatus[i].dcd = 0;
1493 GMStatus[i].dsr = 0;
1494 GMStatus[i].cts = 0;
1495 continue;
1496 }
1da177e4 1497
1c45607a
JS		 1498 if (!port->tty || !port->tty->termios)
1499 GMStatus[i].cflag =
1500 port->normal_termios.c_cflag;
1501 else
1502 GMStatus[i].cflag =
1503 port->tty->termios->c_cflag;
1da177e4 1504
1c45607a
JS		 1505 status = inb(port->ioaddr + UART_MSR);
1506 if (status & 0x80 /*UART_MSR_DCD */ )
1507 GMStatus[i].dcd = 1;
1508 else
1509 GMStatus[i].dcd = 0;
1da177e4 1510
1c45607a
JS		 1511 if (status & 0x20 /*UART_MSR_DSR */ )
1512 GMStatus[i].dsr = 1;
1513 else
1514 GMStatus[i].dsr = 0;
1da177e4
LT		 1515
1516
1c45607a
JS		 1517 if (status & 0x10 /*UART_MSR_CTS */ )
1518 GMStatus[i].cts = 1;
1519 else
1520 GMStatus[i].cts = 0;
1521 }
9d6d162d 1522 unlock_kernel();
8ea2c2ec
JJ		 1523 if (copy_to_user(argp, GMStatus,
1524 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1525 return -EFAULT;
1526 return 0;
8ea2c2ec 1527 case MOXA_ASPP_MON_EXT: {
1c45607a
JS		 1528 int p, shiftbit;
1529 unsigned long opmode;
1530 unsigned cflag, iflag;
1531
9d6d162d
AC		 1532 lock_kernel();
1533 for (i = 0; i < MXSER_BOARDS; i++) {
1c45607a
JS		 1534 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1535 port = &mxser_boards[i].ports[j];
1536 if (!port->ioaddr)
1da177e4
LT		 1537 continue;
1538
1c45607a
JS		 1539 status = mxser_get_msr(port->ioaddr, 0, i);
1540
1da177e4 1541 if (status & UART_MSR_TERI)
1c45607a 1542 port->icount.rng++;
1da177e4 1543 if (status & UART_MSR_DDSR)
1c45607a 1544 port->icount.dsr++;
1da177e4 1545 if (status & UART_MSR_DDCD)
1c45607a 1546 port->icount.dcd++;
1da177e4 1547 if (status & UART_MSR_DCTS)
1c45607a
JS		 1548 port->icount.cts++;
1549
1550 port->mon_data.modem_status = status;
1551 mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
1552 mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
1553 mon_data_ext.up_rxcnt[i] =
1554 port->mon_data.up_rxcnt;
1555 mon_data_ext.up_txcnt[i] =
1556 port->mon_data.up_txcnt;
1557 mon_data_ext.modem_status[i] =
1558 port->mon_data.modem_status;
1559 mon_data_ext.baudrate[i] =
1560 tty_get_baud_rate(port->tty);
1561
1562 if (!port->tty || !port->tty->termios) {
1563 cflag = port->normal_termios.c_cflag;
1564 iflag = port->normal_termios.c_iflag;
1da177e4 1565 } else {
1c45607a
JS		 1566 cflag = port->tty->termios->c_cflag;
1567 iflag = port->tty->termios->c_iflag;
1da177e4
LT		 1568 }
1569
1570 mon_data_ext.databits[i] = cflag & CSIZE;
1571
1572 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1573
1c45607a
JS		 1574 mon_data_ext.parity[i] =
1575 cflag & (PARENB | PARODD | CMSPAR);
1da177e4
LT		 1576
1577 mon_data_ext.flowctrl[i] = 0x00;
1578
1579 if (cflag & CRTSCTS)
1580 mon_data_ext.flowctrl[i] |= 0x03;
1581
1582 if (iflag & (IXON | IXOFF))
1583 mon_data_ext.flowctrl[i] |= 0x0C;
1584
1c45607a 1585 if (port->type == PORT_16550A)
1da177e4
LT		 1586 mon_data_ext.fifo[i] = 1;
1587 else
1588 mon_data_ext.fifo[i] = 0;
1589
1590 p = i % 4;
1591 shiftbit = p * 2;
1c45607a 1592 opmode = inb(port->opmode_ioaddr) >> shiftbit;
1da177e4
LT		 1593 opmode &= OP_MODE_MASK;
1594
1595 mon_data_ext.iftype[i] = opmode;
1596
1597 }
9d6d162d
AC		 1598 }
1599 unlock_kernel();
1600 if (copy_to_user(argp, &mon_data_ext,
1601 sizeof(mon_data_ext)))
1602 return -EFAULT;
1603 return 0;
1604 }
1605 default:
1da177e4
LT		 1606 return -ENOIOCTLCMD;
1607 }
1608 return 0;
1609}
1610
1c45607a
JS		 1611static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1612 struct async_icount *cprev)
1da177e4 1613{
1c45607a
JS		 1614 struct async_icount cnow;
1615 unsigned long flags;
1616 int ret;
1da177e4 1617
1c45607a
JS		 1618 spin_lock_irqsave(&info->slock, flags);
1619 cnow = info->icount; /* atomic copy */
1620 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1621
1c45607a
JS		 1622 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1623 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1624 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1625 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1626
1c45607a
JS		 1627 *cprev = cnow;
1628
1629 return ret;
1630}
1631
1632static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1633 unsigned int cmd, unsigned long arg)
1da177e4 1634{
1c45607a
JS		 1635 struct mxser_port *info = tty->driver_data;
1636 struct async_icount cnow;
1637 struct serial_icounter_struct __user *p_cuser;
1638 unsigned long flags;
1639 void __user *argp = (void __user *)arg;
1640 int retval;
1da177e4 1641
1c45607a
JS		 1642 if (tty->index == MXSER_PORTS)
1643 return mxser_ioctl_special(cmd, argp);
1da177e4 1644
1c45607a
JS		 1645 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1646 int p;
1647 unsigned long opmode;
1648 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1649 int shiftbit;
1650 unsigned char val, mask;
1da177e4 1651
1c45607a
JS		 1652 p = tty->index % 4;
1653 if (cmd == MOXA_SET_OP_MODE) {
1654 if (get_user(opmode, (int __user *) argp))
1655 return -EFAULT;
1656 if (opmode != RS232_MODE &&
1657 opmode != RS485_2WIRE_MODE &&
1658 opmode != RS422_MODE &&
1659 opmode != RS485_4WIRE_MODE)
1660 return -EFAULT;
9d6d162d 1661 lock_kernel();
1c45607a
JS		 1662 mask = ModeMask[p];
1663 shiftbit = p * 2;
1664 val = inb(info->opmode_ioaddr);
1665 val &= mask;
1666 val |= (opmode << shiftbit);
1667 outb(val, info->opmode_ioaddr);
9d6d162d 1668 unlock_kernel();
1c45607a 1669 } else {
9d6d162d 1670 lock_kernel();
1c45607a
JS		 1671 shiftbit = p * 2;
1672 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1673 opmode &= OP_MODE_MASK;
9d6d162d 1674 unlock_kernel();
1c45607a
JS		 1675 if (put_user(opmode, (int __user *)argp))
1676 return -EFAULT;
1677 }
1678 return 0;
1679 }
1680
1681 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1682 test_bit(TTY_IO_ERROR, &tty->flags))
1683 return -EIO;
1684
1685 switch (cmd) {
1686 case TCSBRK: /* SVID version: non-zero arg --> no break */
1687 retval = tty_check_change(tty);
1688 if (retval)
1689 return retval;
1690 tty_wait_until_sent(tty, 0);
1691 if (!arg)
1692 mxser_send_break(info, HZ / 4); /* 1/4 second */
1693 return 0;
1694 case TCSBRKP: /* support for POSIX tcsendbreak() */
1695 retval = tty_check_change(tty);
1696 if (retval)
1697 return retval;
1698 tty_wait_until_sent(tty, 0);
1699 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1700 return 0;
1c45607a 1701 case TIOCGSERIAL:
9d6d162d
AC		 1702 lock_kernel();
1703 retval = mxser_get_serial_info(info, argp);
1704 unlock_kernel();
1705 return retval;
1c45607a 1706 case TIOCSSERIAL:
9d6d162d
AC		 1707 lock_kernel();
1708 retval = mxser_set_serial_info(info, argp);
1709 unlock_kernel();
1710 return retval;
1c45607a 1711 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1712 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1713 /*
1714 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1715 * - mask passed in arg for lines of interest
1716 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1717 * Caller should use TIOCGICOUNT to see which one it was
1718 */
1719 case TIOCMIWAIT:
1720 spin_lock_irqsave(&info->slock, flags);
1721 cnow = info->icount; /* note the counters on entry */
1722 spin_unlock_irqrestore(&info->slock, flags);
1723
1724 return wait_event_interruptible(info->delta_msr_wait,
1725 mxser_cflags_changed(info, arg, &cnow));
1726 /*
1727 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1728 * Return: write counters to the user passed counter struct
1729 * NB: both 1->0 and 0->1 transitions are counted except for
1730 * RI where only 0->1 is counted.
1731 */
1732 case TIOCGICOUNT:
1733 spin_lock_irqsave(&info->slock, flags);
1734 cnow = info->icount;
1735 spin_unlock_irqrestore(&info->slock, flags);
1736 p_cuser = argp;
1737 if (put_user(cnow.frame, &p_cuser->frame))
1738 return -EFAULT;
1739 if (put_user(cnow.brk, &p_cuser->brk))
1740 return -EFAULT;
1741 if (put_user(cnow.overrun, &p_cuser->overrun))
1742 return -EFAULT;
1743 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1744 return -EFAULT;
1745 if (put_user(cnow.parity, &p_cuser->parity))
1746 return -EFAULT;
1747 if (put_user(cnow.rx, &p_cuser->rx))
1748 return -EFAULT;
1749 if (put_user(cnow.tx, &p_cuser->tx))
1750 return -EFAULT;
1751 put_user(cnow.cts, &p_cuser->cts);
1752 put_user(cnow.dsr, &p_cuser->dsr);
1753 put_user(cnow.rng, &p_cuser->rng);
1754 put_user(cnow.dcd, &p_cuser->dcd);
1755 return 0;
1756 case MOXA_HighSpeedOn:
1757 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1758 case MOXA_SDS_RSTICOUNTER:
9d6d162d 1759 lock_kernel();
1c45607a
JS		 1760 info->mon_data.rxcnt = 0;
1761 info->mon_data.txcnt = 0;
9d6d162d 1762 unlock_kernel();
1c45607a
JS		 1763 return 0;
1764
1765 case MOXA_ASPP_OQUEUE:{
1766 int len, lsr;
1767
9d6d162d 1768 lock_kernel();
1c45607a 1769 len = mxser_chars_in_buffer(tty);
1c45607a 1770 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1c45607a 1771 len += (lsr ? 0 : 1);
9d6d162d 1772 unlock_kernel();
1c45607a
JS		 1773
1774 return put_user(len, (int __user *)argp);
1775 }
1776 case MOXA_ASPP_MON: {
1777 int mcr, status;
1778
9d6d162d 1779 lock_kernel();
1c45607a
JS		 1780 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1781 mxser_check_modem_status(info, status);
1782
1783 mcr = inb(info->ioaddr + UART_MCR);
1784 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1785 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1786 else
1787 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1788
1789 if (mcr & MOXA_MUST_MCR_TX_XON)
1790 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1791 else
1792 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1793
1794 if (info->tty->hw_stopped)
1795 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1796 else
1797 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
9d6d162d 1798 unlock_kernel();
1c45607a
JS		 1799 if (copy_to_user(argp, &info->mon_data,
1800 sizeof(struct mxser_mon)))
1801 return -EFAULT;
1802
1803 return 0;
1804 }
1805 case MOXA_ASPP_LSTATUS: {
1806 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1807 return -EFAULT;
1808
1809 info->err_shadow = 0;
1810 return 0;
1811 }
1812 case MOXA_SET_BAUD_METHOD: {
1813 int method;
1814
1815 if (get_user(method, (int __user *)argp))
1816 return -EFAULT;
1817 mxser_set_baud_method[tty->index] = method;
1818 return put_user(method, (int __user *)argp);
1819 }
1820 default:
1821 return -ENOIOCTLCMD;
1822 }
1823 return 0;
1824}
1825
1826static void mxser_stoprx(struct tty_struct *tty)
1827{
1828 struct mxser_port *info = tty->driver_data;
1829
1830 info->ldisc_stop_rx = 1;
1831 if (I_IXOFF(tty)) {
1832 if (info->board->chip_flag) {
1833 info->IER &= ~MOXA_MUST_RECV_ISR;
1834 outb(info->IER, info->ioaddr + UART_IER);
1835 } else {
1836 info->x_char = STOP_CHAR(tty);
1837 outb(0, info->ioaddr + UART_IER);
1838 info->IER |= UART_IER_THRI;
1839 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1840 }
1841 }
1842
1843 if (info->tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1844 info->MCR &= ~UART_MCR_RTS;
1845 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1846 }
1847}
1848
1849/*
1850 * This routine is called by the upper-layer tty layer to signal that
1851 * incoming characters should be throttled.
1852 */
1853static void mxser_throttle(struct tty_struct *tty)
1854{
1da177e4 1855 mxser_stoprx(tty);
1da177e4
LT		 1856}
1857
1858static void mxser_unthrottle(struct tty_struct *tty)
1859{
1c45607a 1860 struct mxser_port *info = tty->driver_data;
1da177e4 1861
1c45607a
JS		 1862 /* startrx */
1863 info->ldisc_stop_rx = 0;
1864 if (I_IXOFF(tty)) {
1865 if (info->x_char)
1866 info->x_char = 0;
1867 else {
1868 if (info->board->chip_flag) {
1869 info->IER |= MOXA_MUST_RECV_ISR;
1870 outb(info->IER, info->ioaddr + UART_IER);
1871 } else {
1872 info->x_char = START_CHAR(tty);
1873 outb(0, info->ioaddr + UART_IER);
1874 info->IER |= UART_IER_THRI;
1875 outb(info->IER, info->ioaddr + UART_IER);
1876 }
1da177e4 1877 }
1c45607a 1878 }
1da177e4 1879
1c45607a
JS		 1880 if (info->tty->termios->c_cflag & CRTSCTS) {
1881 info->MCR |= UART_MCR_RTS;
1882 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1883 }
1884}
1885
1886/*
1887 * mxser_stop() and mxser_start()
1888 *
1889 * This routines are called before setting or resetting tty->stopped.
1890 * They enable or disable transmitter interrupts, as necessary.
1891 */
1892static void mxser_stop(struct tty_struct *tty)
1893{
1c45607a 1894 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1895 unsigned long flags;
1896
1897 spin_lock_irqsave(&info->slock, flags);
1898 if (info->IER & UART_IER_THRI) {
1899 info->IER &= ~UART_IER_THRI;
1c45607a 1900 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1901 }
1902 spin_unlock_irqrestore(&info->slock, flags);
1903}
1904
1905static void mxser_start(struct tty_struct *tty)
1906{
1c45607a 1907 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1908 unsigned long flags;
1909
1910 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1911 if (info->xmit_cnt && info->xmit_buf) {
1912 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1913 info->IER |= UART_IER_THRI;
1c45607a 1914 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1915 }
1916 spin_unlock_irqrestore(&info->slock, flags);
1917}
1918
1c45607a
JS		 1919static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1920{
1921 struct mxser_port *info = tty->driver_data;
1922 unsigned long flags;
1923
1924 spin_lock_irqsave(&info->slock, flags);
1925 mxser_change_speed(info, old_termios);
1926 spin_unlock_irqrestore(&info->slock, flags);
1927
1928 if ((old_termios->c_cflag & CRTSCTS) &&
1929 !(tty->termios->c_cflag & CRTSCTS)) {
1930 tty->hw_stopped = 0;
1931 mxser_start(tty);
1932 }
1933
1934 /* Handle sw stopped */
1935 if ((old_termios->c_iflag & IXON) &&
1936 !(tty->termios->c_iflag & IXON)) {
1937 tty->stopped = 0;
1938
1939 if (info->board->chip_flag) {
1940 spin_lock_irqsave(&info->slock, flags);
1941 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1942 spin_unlock_irqrestore(&info->slock, flags);
1943 }
1944
1945 mxser_start(tty);
1946 }
1947}
1948
1da177e4
LT		 1949/*
1950 * mxser_wait_until_sent() --- wait until the transmitter is empty
1951 */
1952static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1953{
1c45607a 1954 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1955 unsigned long orig_jiffies, char_time;
1956 int lsr;
1957
1958 if (info->type == PORT_UNKNOWN)
1959 return;
1960
1961 if (info->xmit_fifo_size == 0)
1962 return; /* Just in case.... */
1963
1964 orig_jiffies = jiffies;
1965 /*
1966 * Set the check interval to be 1/5 of the estimated time to
1967 * send a single character, and make it at least 1. The check
1968 * interval should also be less than the timeout.
1969 *
1970 * Note: we have to use pretty tight timings here to satisfy
1971 * the NIST-PCTS.
1972 */
1973 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1974 char_time = char_time / 5;
1975 if (char_time == 0)
1976 char_time = 1;
1977 if (timeout && timeout < char_time)
1978 char_time = timeout;
1979 /*
1980 * If the transmitter hasn't cleared in twice the approximate
1981 * amount of time to send the entire FIFO, it probably won't
1982 * ever clear. This assumes the UART isn't doing flow
1983 * control, which is currently the case. Hence, if it ever
1984 * takes longer than info->timeout, this is probably due to a
1985 * UART bug of some kind. So, we clamp the timeout parameter at
1986 * 2*info->timeout.
1987 */
1988 if (!timeout || timeout > 2 * info->timeout)
1989 timeout = 2 * info->timeout;
1990#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1991 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1992 timeout, char_time);
1da177e4
LT		 1993 printk("jiff=%lu...", jiffies);
1994#endif
1c45607a 1995 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1da177e4
LT		 1996#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1997 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1998#endif
da4cd8df 1999 schedule_timeout_interruptible(char_time);
1da177e4 2000 if (signal_pending(current))
1c45607a
JS		 2001 break;
2002 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2003 break;
1da177e4 2004 }
1c45607a 2005 set_current_state(TASK_RUNNING);
1da177e4 2006
1c45607a
JS		 2007#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2008 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2009#endif
2010}
1da177e4 2011
1c45607a
JS		 2012/*
2013 * This routine is called by tty_hangup() when a hangup is signaled.
2014 */
2015static void mxser_hangup(struct tty_struct *tty)
2016{
2017 struct mxser_port *info = tty->driver_data;
1da177e4 2018
1c45607a
JS		 2019 mxser_flush_buffer(tty);
2020 mxser_shutdown(info);
2021 info->event = 0;
2022 info->count = 0;
2023 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2024 info->tty = NULL;
2025 wake_up_interruptible(&info->open_wait);
1da177e4
LT		 2026}
2027
1c45607a
JS		 2028/*
2029 * mxser_rs_break() --- routine which turns the break handling on or off
2030 */
2031static void mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2032{
1c45607a 2033 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2034 unsigned long flags;
2035
1c45607a
JS		 2036 spin_lock_irqsave(&info->slock, flags);
2037 if (break_state == -1)
2038 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2039 info->ioaddr + UART_LCR);
2040 else
2041 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2042 info->ioaddr + UART_LCR);
2043 spin_unlock_irqrestore(&info->slock, flags);
2044}
1da177e4 2045
1c45607a
JS		 2046static void mxser_receive_chars(struct mxser_port *port, int *status)
2047{
2048 struct tty_struct *tty = port->tty;
2049 unsigned char ch, gdl;
2050 int ignored = 0;
2051 int cnt = 0;
2052 int recv_room;
2053 int max = 256;
1da177e4 2054
1c45607a
JS		 2055 recv_room = tty->receive_room;
2056 if ((recv_room == 0) && (!port->ldisc_stop_rx))
2057 mxser_stoprx(tty);
1da177e4 2058
1c45607a 2059 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2060
1c45607a
JS		 2061 if (*status & UART_LSR_SPECIAL)
2062 goto intr_old;
2063 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2064 (*status & MOXA_MUST_LSR_RERR))
2065 goto intr_old;
2066 if (*status & MOXA_MUST_LSR_RERR)
2067 goto intr_old;
1da177e4 2068
1c45607a
JS		 2069 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2070
2071 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2072 gdl &= MOXA_MUST_GDL_MASK;
2073 if (gdl >= recv_room) {
2074 if (!port->ldisc_stop_rx)
2075 mxser_stoprx(tty);
2076 }
2077 while (gdl--) {
2078 ch = inb(port->ioaddr + UART_RX);
2079 tty_insert_flip_char(tty, ch, 0);
2080 cnt++;
2081 }
2082 goto end_intr;
1da177e4 2083 }
1c45607a
JS		 2084intr_old:
2085
2086 do {
2087 if (max-- < 0)
2088 break;
1da177e4 2089
1c45607a
JS		 2090 ch = inb(port->ioaddr + UART_RX);
2091 if (port->board->chip_flag && (*status & UART_LSR_OE))
2092 outb(0x23, port->ioaddr + UART_FCR);
2093 *status &= port->read_status_mask;
2094 if (*status & port->ignore_status_mask) {
2095 if (++ignored > 100)
2096 break;
2097 } else {
2098 char flag = 0;
2099 if (*status & UART_LSR_SPECIAL) {
2100 if (*status & UART_LSR_BI) {
2101 flag = TTY_BREAK;
2102 port->icount.brk++;
1da177e4 2103
1c45607a
JS		 2104 if (port->flags & ASYNC_SAK)
2105 do_SAK(tty);
2106 } else if (*status & UART_LSR_PE) {
2107 flag = TTY_PARITY;
2108 port->icount.parity++;
2109 } else if (*status & UART_LSR_FE) {
2110 flag = TTY_FRAME;
2111 port->icount.frame++;
2112 } else if (*status & UART_LSR_OE) {
2113 flag = TTY_OVERRUN;
2114 port->icount.overrun++;
2115 } else
2116 flag = TTY_BREAK;
2117 }
2118 tty_insert_flip_char(tty, ch, flag);
2119 cnt++;
2120 if (cnt >= recv_room) {
2121 if (!port->ldisc_stop_rx)
2122 mxser_stoprx(tty);
2123 break;
2124 }
1da177e4 2125
1c45607a 2126 }
1da177e4 2127
1c45607a
JS		 2128 if (port->board->chip_flag)
2129 break;
1da177e4 2130
1c45607a
JS		 2131 *status = inb(port->ioaddr + UART_LSR);
2132 } while (*status & UART_LSR_DR);
1da177e4 2133
1c45607a
JS		 2134end_intr:
2135 mxvar_log.rxcnt[port->tty->index] += cnt;
2136 port->mon_data.rxcnt += cnt;
2137 port->mon_data.up_rxcnt += cnt;
1da177e4 2138
1c45607a
JS		 2139 /*
2140 * We are called from an interrupt context with &port->slock
2141 * being held. Drop it temporarily in order to prevent
2142 * recursive locking.
2143 */
2144 spin_unlock(&port->slock);
2145 tty_flip_buffer_push(tty);
2146 spin_lock(&port->slock);
1da177e4
LT		 2147}
2148
1c45607a 2149static void mxser_transmit_chars(struct mxser_port *port)
1da177e4 2150{
1c45607a 2151 int count, cnt;
1da177e4 2152
1c45607a
JS		 2153 if (port->x_char) {
2154 outb(port->x_char, port->ioaddr + UART_TX);
2155 port->x_char = 0;
2156 mxvar_log.txcnt[port->tty->index]++;
2157 port->mon_data.txcnt++;
2158 port->mon_data.up_txcnt++;
2159 port->icount.tx++;
2160 return;
2161 }
1da177e4 2162
1c45607a
JS		 2163 if (port->xmit_buf == NULL)
2164 return;
1da177e4 2165
1c45607a
JS		 2166 if ((port->xmit_cnt <= 0) || port->tty->stopped ||
2167 (port->tty->hw_stopped &&
2168 (port->type != PORT_16550A) &&
2169 (!port->board->chip_flag))) {
2170 port->IER &= ~UART_IER_THRI;
2171 outb(port->IER, port->ioaddr + UART_IER);
2172 return;
1da177e4
LT		 2173 }
2174
1c45607a
JS		 2175 cnt = port->xmit_cnt;
2176 count = port->xmit_fifo_size;
2177 do {
2178 outb(port->xmit_buf[port->xmit_tail++],
2179 port->ioaddr + UART_TX);
2180 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2181 if (--port->xmit_cnt <= 0)
2182 break;
2183 } while (--count > 0);
2184 mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
1da177e4 2185
1c45607a
JS		 2186 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2187 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2188 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2189
1c45607a
JS		 2190 if (port->xmit_cnt < WAKEUP_CHARS)
2191 tty_wakeup(port->tty);
2192
2193 if (port->xmit_cnt <= 0) {
2194 port->IER &= ~UART_IER_THRI;
2195 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2196 }
1da177e4
LT		 2197}
2198
2199/*
1c45607a 2200 * This is the serial driver's generic interrupt routine
1da177e4 2201 */
1c45607a 2202static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2203{
1c45607a
JS		 2204 int status, iir, i;
2205 struct mxser_board *brd = NULL;
2206 struct mxser_port *port;
2207 int max, irqbits, bits, msr;
2208 unsigned int int_cnt, pass_counter = 0;
2209 int handled = IRQ_NONE;
1da177e4 2210
1c45607a
JS		 2211 for (i = 0; i < MXSER_BOARDS; i++)
2212 if (dev_id == &mxser_boards[i]) {
2213 brd = dev_id;
2214 break;
2215 }
1da177e4 2216
1c45607a
JS		 2217 if (i == MXSER_BOARDS)
2218 goto irq_stop;
2219 if (brd == NULL)
2220 goto irq_stop;
2221 max = brd->info->nports;
2222 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2223 irqbits = inb(brd->vector) & brd->vector_mask;
2224 if (irqbits == brd->vector_mask)
2225 break;
1da177e4 2226
1c45607a
JS		 2227 handled = IRQ_HANDLED;
2228 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2229 if (irqbits == brd->vector_mask)
2230 break;
2231 if (bits & irqbits)
2232 continue;
2233 port = &brd->ports[i];
2234
2235 int_cnt = 0;
2236 spin_lock(&port->slock);
2237 do {
2238 iir = inb(port->ioaddr + UART_IIR);
2239 if (iir & UART_IIR_NO_INT)
2240 break;
2241 iir &= MOXA_MUST_IIR_MASK;
2242 if (!port->tty ||
2243 (port->flags & ASYNC_CLOSING) ||
2244 !(port->flags &
2245 ASYNC_INITIALIZED)) {
2246 status = inb(port->ioaddr + UART_LSR);
2247 outb(0x27, port->ioaddr + UART_FCR);
2248 inb(port->ioaddr + UART_MSR);
2249 break;
2250 }
1da177e4 2251
1c45607a
JS		 2252 status = inb(port->ioaddr + UART_LSR);
2253
2254 if (status & UART_LSR_PE)
2255 port->err_shadow |= NPPI_NOTIFY_PARITY;
2256 if (status & UART_LSR_FE)
2257 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2258 if (status & UART_LSR_OE)
2259 port->err_shadow |=
2260 NPPI_NOTIFY_HW_OVERRUN;
2261 if (status & UART_LSR_BI)
2262 port->err_shadow |= NPPI_NOTIFY_BREAK;
2263
2264 if (port->board->chip_flag) {
2265 if (iir == MOXA_MUST_IIR_GDA ||
2266 iir == MOXA_MUST_IIR_RDA ||
2267 iir == MOXA_MUST_IIR_RTO ||
2268 iir == MOXA_MUST_IIR_LSR)
2269 mxser_receive_chars(port,
2270 &status);
2271
2272 } else {
2273 status &= port->read_status_mask;
2274 if (status & UART_LSR_DR)
2275 mxser_receive_chars(port,
2276 &status);
2277 }
2278 msr = inb(port->ioaddr + UART_MSR);
2279 if (msr & UART_MSR_ANY_DELTA)
2280 mxser_check_modem_status(port, msr);
2281
2282 if (port->board->chip_flag) {
2283 if (iir == 0x02 && (status &
2284 UART_LSR_THRE))
2285 mxser_transmit_chars(port);
2286 } else {
2287 if (status & UART_LSR_THRE)
2288 mxser_transmit_chars(port);
2289 }
2290 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2291 spin_unlock(&port->slock);
2292 }
2293 }
1da177e4 2294
1c45607a
JS		 2295irq_stop:
2296 return handled;
2297}
1da177e4 2298
1c45607a
JS		 2299static const struct tty_operations mxser_ops = {
2300 .open = mxser_open,
2301 .close = mxser_close,
2302 .write = mxser_write,
2303 .put_char = mxser_put_char,
2304 .flush_chars = mxser_flush_chars,
2305 .write_room = mxser_write_room,
2306 .chars_in_buffer = mxser_chars_in_buffer,
2307 .flush_buffer = mxser_flush_buffer,
2308 .ioctl = mxser_ioctl,
2309 .throttle = mxser_throttle,
2310 .unthrottle = mxser_unthrottle,
2311 .set_termios = mxser_set_termios,
2312 .stop = mxser_stop,
2313 .start = mxser_start,
2314 .hangup = mxser_hangup,
2315 .break_ctl = mxser_rs_break,
2316 .wait_until_sent = mxser_wait_until_sent,
2317 .tiocmget = mxser_tiocmget,
2318 .tiocmset = mxser_tiocmset,
2319};
1da177e4 2320
1c45607a
JS		 2321/*
2322 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2323 */
1da177e4 2324
1c45607a
JS		 2325static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2326 unsigned int irq)
2327{
2328 if (irq)
2329 free_irq(brd->irq, brd);
2330 if (pdev != NULL) { /* PCI */
2331#ifdef CONFIG_PCI
2332 pci_release_region(pdev, 2);
2333 pci_release_region(pdev, 3);
2334#endif
2335 } else {
2336 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2337 release_region(brd->vector, 1);
2338 }
1da177e4
LT		 2339}
2340
1c45607a
JS		 2341static int __devinit mxser_initbrd(struct mxser_board *brd,
2342 struct pci_dev *pdev)
1da177e4 2343{
1c45607a
JS		 2344 struct mxser_port *info;
2345 unsigned int i;
2346 int retval;
1da177e4 2347
1c45607a 2348 printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
1da177e4 2349
1c45607a
JS		 2350 for (i = 0; i < brd->info->nports; i++) {
2351 info = &brd->ports[i];
2352 info->board = brd;
2353 info->stop_rx = 0;
2354 info->ldisc_stop_rx = 0;
1da177e4 2355
1c45607a
JS		 2356 /* Enhance mode enabled here */
2357 if (brd->chip_flag != MOXA_OTHER_UART)
2358 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr);
1da177e4 2359
1c45607a
JS		 2360 info->flags = ASYNC_SHARE_IRQ;
2361 info->type = brd->uart_type;
1da177e4 2362
1c45607a 2363 process_txrx_fifo(info);
1da177e4 2364
1c45607a
JS		 2365 info->custom_divisor = info->baud_base * 16;
2366 info->close_delay = 5 * HZ / 10;
2367 info->closing_wait = 30 * HZ;
2368 info->normal_termios = mxvar_sdriver->init_termios;
2369 init_waitqueue_head(&info->open_wait);
2370 init_waitqueue_head(&info->delta_msr_wait);
2371 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2372 info->err_shadow = 0;
2373 spin_lock_init(&info->slock);
1da177e4 2374
1c45607a
JS		 2375 /* before set INT ISR, disable all int */
2376 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2377 info->ioaddr + UART_IER);
2378 }
1da177e4 2379
1c45607a
JS		 2380 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2381 brd);
2382 if (retval) {
2383 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2384 "conflict with another device.\n",
2385 brd->info->name, brd->irq);
2386 /* We hold resources, we need to release them. */
2387 mxser_release_res(brd, pdev, 0);
2388 }
2389 return retval;
2390}
1da177e4 2391
1c45607a 2392static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4
LT		 2393{
2394 int id, i, bits;
2395 unsigned short regs[16], irq;
2396 unsigned char scratch, scratch2;
2397
1c45607a 2398 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2399
2400 id = mxser_read_register(cap, regs);
1c45607a
JS		 2401 switch (id) {
2402 case C168_ASIC_ID:
2403 brd->info = &mxser_cards[0];
2404 break;
2405 case C104_ASIC_ID:
2406 brd->info = &mxser_cards[1];
2407 break;
2408 case CI104J_ASIC_ID:
2409 brd->info = &mxser_cards[2];
2410 break;
2411 case C102_ASIC_ID:
2412 brd->info = &mxser_cards[5];
2413 break;
2414 case CI132_ASIC_ID:
2415 brd->info = &mxser_cards[6];
2416 break;
2417 case CI134_ASIC_ID:
2418 brd->info = &mxser_cards[7];
2419 break;
2420 default:
8ea2c2ec 2421 return 0;
1c45607a 2422 }
1da177e4
LT		 2423
2424 irq = 0;
1c45607a
JS		 2425 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2426 Flag-hack checks if configuration should be read as 2-port here. */
2427 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2428 irq = regs[9] & 0xF000;
2429 irq = irq | (irq >> 4);
2430 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 2431 return MXSER_ERR_IRQ_CONFLIT;
1c45607a 2432 } else if (brd->info->nports == 4) {
1da177e4
LT		 2433 irq = regs[9] & 0xF000;
2434 irq = irq | (irq >> 4);
2435 irq = irq | (irq >> 8);
2436 if (irq != regs[9])
8ea2c2ec 2437 return MXSER_ERR_IRQ_CONFLIT;
1c45607a 2438 } else if (brd->info->nports == 8) {
1da177e4
LT		 2439 irq = regs[9] & 0xF000;
2440 irq = irq | (irq >> 4);
2441 irq = irq | (irq >> 8);
2442 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 2443 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 2444 }
2445
8ea2c2ec
JJ		 2446 if (!irq)
2447 return MXSER_ERR_IRQ;
1c45607a 2448 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2449 for (i = 0; i < 8; i++)
1c45607a 2450 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 2451 if ((regs[12] & 0x80) == 0)
2452 return MXSER_ERR_VECTOR;
1c45607a 2453 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2454 if (id == 1)
1c45607a 2455 brd->vector_mask = 0x00FF;
1da177e4 2456 else
1c45607a 2457 brd->vector_mask = 0x000F;
1da177e4
LT		 2458 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2459 if (regs[12] & bits) {
1c45607a
JS		 2460 brd->ports[i].baud_base = 921600;
2461 brd->ports[i].max_baud = 921600;
1da177e4 2462 } else {
1c45607a
JS		 2463 brd->ports[i].baud_base = 115200;
2464 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2465 }
2466 }
2467 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2468 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2469 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2470 outb(scratch2, cap + UART_LCR);
2471 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2472 scratch = inb(cap + UART_IIR);
2473
2474 if (scratch & 0xC0)
1c45607a 2475 brd->uart_type = PORT_16550A;
1da177e4 2476 else
1c45607a
JS		 2477 brd->uart_type = PORT_16450;
2478 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2479 "mxser(IO)"))
2480 return MXSER_ERR_IOADDR;
2481 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2482 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2483 return MXSER_ERR_VECTOR;
2484 }
2485 return brd->info->nports;
1da177e4
LT		 2486}
2487
1c45607a
JS		 2488static int __devinit mxser_probe(struct pci_dev *pdev,
2489 const struct pci_device_id *ent)
1da177e4 2490{
1c45607a
JS		 2491#ifdef CONFIG_PCI
2492 struct mxser_board *brd;
2493 unsigned int i, j;
2494 unsigned long ioaddress;
2495 int retval = -EINVAL;
1da177e4 2496
1c45607a
JS		 2497 for (i = 0; i < MXSER_BOARDS; i++)
2498 if (mxser_boards[i].info == NULL)
2499 break;
2500
2501 if (i >= MXSER_BOARDS) {
2502 printk(KERN_ERR "Too many Smartio/Industio family boards found "
2503 "(maximum %d), board not configured\n", MXSER_BOARDS);
2504 goto err;
2505 }
2506
2507 brd = &mxser_boards[i];
2508 brd->idx = i * MXSER_PORTS_PER_BOARD;
2509 printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2510 mxser_cards[ent->driver_data].name,
2511 pdev->bus->number, PCI_SLOT(pdev->devfn));
2512
2513 retval = pci_enable_device(pdev);
2514 if (retval) {
2515 printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
2516 goto err;
2517 }
2518
2519 /* io address */
2520 ioaddress = pci_resource_start(pdev, 2);
2521 retval = pci_request_region(pdev, 2, "mxser(IO)");
2522 if (retval)
2523 goto err;
2524
2525 brd->info = &mxser_cards[ent->driver_data];
2526 for (i = 0; i < brd->info->nports; i++)
2527 brd->ports[i].ioaddr = ioaddress + 8 * i;
2528
2529 /* vector */
2530 ioaddress = pci_resource_start(pdev, 3);
2531 retval = pci_request_region(pdev, 3, "mxser(vector)");
2532 if (retval)
2533 goto err_relio;
2534 brd->vector = ioaddress;
2535
2536 /* irq */
2537 brd->irq = pdev->irq;
2538
2539 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2540 brd->uart_type = PORT_16550A;
2541 brd->vector_mask = 0;
2542
2543 for (i = 0; i < brd->info->nports; i++) {
2544 for (j = 0; j < UART_INFO_NUM; j++) {
2545 if (Gpci_uart_info[j].type == brd->chip_flag) {
2546 brd->ports[i].max_baud =
2547 Gpci_uart_info[j].max_baud;
2548
2549 /* exception....CP-102 */
2550 if (brd->info->flags & MXSER_HIGHBAUD)
2551 brd->ports[i].max_baud = 921600;
2552 break;
1da177e4
LT		 2553 }
2554 }
1c45607a
JS		 2555 }
2556
2557 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2558 for (i = 0; i < brd->info->nports; i++) {
2559 if (i < 4)
2560 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2561 else
2562 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2563 }
1c45607a
JS		 2564 outb(0, ioaddress + 4); /* default set to RS232 mode */
2565 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2566 }
1c45607a
JS		 2567
2568 for (i = 0; i < brd->info->nports; i++) {
2569 brd->vector_mask |= (1 << i);
2570 brd->ports[i].baud_base = 921600;
2571 }
2572
2573 /* mxser_initbrd will hook ISR. */
2574 retval = mxser_initbrd(brd, pdev);
2575 if (retval)
2576 goto err_null;
2577
2578 for (i = 0; i < brd->info->nports; i++)
2579 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2580
2581 pci_set_drvdata(pdev, brd);
2582
2583 return 0;
2584err_relio:
2585 pci_release_region(pdev, 2);
2586err_null:
2587 brd->info = NULL;
2588err:
2589 return retval;
2590#else
2591 return -ENODEV;
2592#endif
1da177e4
LT		 2593}
2594
1c45607a 2595static void __devexit mxser_remove(struct pci_dev *pdev)
1da177e4 2596{
1c45607a
JS		 2597 struct mxser_board *brd = pci_get_drvdata(pdev);
2598 unsigned int i;
1da177e4 2599
1c45607a
JS		 2600 for (i = 0; i < brd->info->nports; i++)
2601 tty_unregister_device(mxvar_sdriver, brd->idx + i);
1da177e4 2602
1c45607a
JS		 2603 mxser_release_res(brd, pdev, 1);
2604 brd->info = NULL;
1da177e4
LT		 2605}
2606
1c45607a
JS		 2607static struct pci_driver mxser_driver = {
2608 .name = "mxser",
2609 .id_table = mxser_pcibrds,
2610 .probe = mxser_probe,
2611 .remove = __devexit_p(mxser_remove)
2612};
2613
2614static int __init mxser_module_init(void)
1da177e4 2615{
1c45607a
JS		 2616 struct mxser_board *brd;
2617 unsigned long cap;
2618 unsigned int i, m, isaloop;
2619 int retval, b;
1da177e4 2620
1c45607a
JS		 2621 pr_debug("Loading module mxser ...\n");
2622
2623 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2624 if (!mxvar_sdriver)
2625 return -ENOMEM;
2626
2627 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2628 MXSER_VERSION);
2629
2630 /* Initialize the tty_driver structure */
2631 mxvar_sdriver->owner = THIS_MODULE;
2632 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2633 mxvar_sdriver->name = "ttyMI";
2634 mxvar_sdriver->major = ttymajor;
2635 mxvar_sdriver->minor_start = 0;
2636 mxvar_sdriver->num = MXSER_PORTS + 1;
2637 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2638 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2639 mxvar_sdriver->init_termios = tty_std_termios;
2640 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2641 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2642 tty_set_operations(mxvar_sdriver, &mxser_ops);
2643
2644 retval = tty_register_driver(mxvar_sdriver);
2645 if (retval) {
2646 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2647 "tty driver !\n");
2648 goto err_put;
1da177e4 2649 }
1c45607a
JS		 2650
2651 mxvar_diagflag = 0;
2652
2653 m = 0;
2654 /* Start finding ISA boards here */
2655 for (isaloop = 0; isaloop < 2; isaloop++)
2656 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
2657 if (!isaloop)
2658 cap = mxserBoardCAP[b]; /* predefined */
2659 else
2660 cap = ioaddr[b]; /* module param */
2661
2662 if (!cap)
2663 continue;
2664
2665 brd = &mxser_boards[m];
2666 retval = mxser_get_ISA_conf(cap, brd);
2667
2668 if (retval != 0)
2669 printk(KERN_INFO "Found MOXA %s board "
2670 "(CAP=0x%x)\n",
2671 brd->info->name, ioaddr[b]);
2672
2673 if (retval <= 0) {
2674 if (retval == MXSER_ERR_IRQ)
2675 printk(KERN_ERR "Invalid interrupt "
2676 "number, board not "
2677 "configured\n");
2678 else if (retval == MXSER_ERR_IRQ_CONFLIT)
2679 printk(KERN_ERR "Invalid interrupt "
2680 "number, board not "
2681 "configured\n");
2682 else if (retval == MXSER_ERR_VECTOR)
2683 printk(KERN_ERR "Invalid interrupt "
2684 "vector, board not "
2685 "configured\n");
2686 else if (retval == MXSER_ERR_IOADDR)
2687 printk(KERN_ERR "Invalid I/O address, "
2688 "board not configured\n");
2689
2690 brd->info = NULL;
2691 continue;
2692 }
2693
2694 /* mxser_initbrd will hook ISR. */
2695 if (mxser_initbrd(brd, NULL) < 0) {
2696 brd->info = NULL;
2697 continue;
2698 }
2699
2700 brd->idx = m * MXSER_PORTS_PER_BOARD;
2701 for (i = 0; i < brd->info->nports; i++)
2702 tty_register_device(mxvar_sdriver, brd->idx + i,
2703 NULL);
2704
2705 m++;
2706 }
2707
2708 retval = pci_register_driver(&mxser_driver);
2709 if (retval) {
2710 printk(KERN_ERR "Can't register pci driver\n");
2711 if (!m) {
2712 retval = -ENODEV;
2713 goto err_unr;
2714 } /* else: we have some ISA cards under control */
2715 }
2716
2717 pr_debug("Done.\n");
2718
2719 return 0;
2720err_unr:
2721 tty_unregister_driver(mxvar_sdriver);
2722err_put:
2723 put_tty_driver(mxvar_sdriver);
2724 return retval;
2725}
2726
2727static void __exit mxser_module_exit(void)
2728{
2729 unsigned int i, j;
2730
2731 pr_debug("Unloading module mxser ...\n");
2732
2733 pci_unregister_driver(&mxser_driver);
2734
2735 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2736 if (mxser_boards[i].info != NULL)
2737 for (j = 0; j < mxser_boards[i].info->nports; j++)
2738 tty_unregister_device(mxvar_sdriver,
2739 mxser_boards[i].idx + j);
2740 tty_unregister_driver(mxvar_sdriver);
2741 put_tty_driver(mxvar_sdriver);
2742
2743 for (i = 0; i < MXSER_BOARDS; i++)
2744 if (mxser_boards[i].info != NULL)
2745 mxser_release_res(&mxser_boards[i], NULL, 1);
2746
2747 pr_debug("Done.\n");
1da177e4
LT		 2748}
2749
2750module_init(mxser_module_init);
2751module_exit(mxser_module_exit);
Linux kernel - Deliverables
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