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Merge ssh://master.kernel.org/pub/scm/linux/kernel/git/sam/kbuild
[deliverable/linux.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 12 * (at your option) any later version.
1da177e4
LT		 13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
1da177e4 39#include <linux/module.h>
1da177e4
LT		 40#include <linux/autoconf.h>
41#include <linux/errno.h>
42#include <linux/signal.h>
43#include <linux/sched.h>
44#include <linux/timer.h>
45#include <linux/interrupt.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48#include <linux/serial.h>
49#include <linux/serial_reg.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/gfp.h>
55#include <linux/ioport.h>
56#include <linux/mm.h>
1da177e4
LT		 57#include <linux/delay.h>
58#include <linux/pci.h>
59
60#include <asm/system.h>
61#include <asm/io.h>
62#include <asm/irq.h>
1da177e4
LT		 63#include <asm/bitops.h>
64#include <asm/uaccess.h>
65
66#include "mxser.h"
67
68#define MXSER_VERSION "1.8"
69#define MXSERMAJOR 174
70#define MXSERCUMAJOR 175
71
8ea2c2ec
JJ		 72#define MXSER_EVENT_TXLOW 1
73#define MXSER_EVENT_HANGUP 2
1da177e4
LT		 74
75#define MXSER_BOARDS 4 /* Max. boards */
76#define MXSER_PORTS 32 /* Max. ports */
77#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
78#define MXSER_ISR_PASS_LIMIT 256
79
80#define MXSER_ERR_IOADDR -1
81#define MXSER_ERR_IRQ -2
82#define MXSER_ERR_IRQ_CONFLIT -3
83#define MXSER_ERR_VECTOR -4
84
85#define SERIAL_TYPE_NORMAL 1
86#define SERIAL_TYPE_CALLOUT 2
87
88#define WAKEUP_CHARS 256
89
90#define UART_MCR_AFE 0x20
91#define UART_LSR_SPECIAL 0x1E
92
1da177e4 93
0f2ed4c6 94#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
1da177e4
LT		 95
96#define C168_ASIC_ID 1
97#define C104_ASIC_ID 2
98#define C102_ASIC_ID 0xB
99#define CI132_ASIC_ID 4
100#define CI134_ASIC_ID 3
101#define CI104J_ASIC_ID 5
102
103enum {
104 MXSER_BOARD_C168_ISA = 1,
105 MXSER_BOARD_C104_ISA,
106 MXSER_BOARD_CI104J,
107 MXSER_BOARD_C168_PCI,
108 MXSER_BOARD_C104_PCI,
109 MXSER_BOARD_C102_ISA,
110 MXSER_BOARD_CI132,
111 MXSER_BOARD_CI134,
112 MXSER_BOARD_CP132,
113 MXSER_BOARD_CP114,
114 MXSER_BOARD_CT114,
115 MXSER_BOARD_CP102,
116 MXSER_BOARD_CP104U,
117 MXSER_BOARD_CP168U,
118 MXSER_BOARD_CP132U,
119 MXSER_BOARD_CP134U,
120 MXSER_BOARD_CP104JU,
121 MXSER_BOARD_RC7000,
122 MXSER_BOARD_CP118U,
123 MXSER_BOARD_CP102UL,
124 MXSER_BOARD_CP102U,
125};
126
127static char *mxser_brdname[] = {
128 "C168 series",
129 "C104 series",
130 "CI-104J series",
131 "C168H/PCI series",
132 "C104H/PCI series",
133 "C102 series",
134 "CI-132 series",
135 "CI-134 series",
136 "CP-132 series",
137 "CP-114 series",
138 "CT-114 series",
139 "CP-102 series",
140 "CP-104U series",
141 "CP-168U series",
142 "CP-132U series",
143 "CP-134U series",
144 "CP-104JU series",
145 "Moxa UC7000 Serial",
146 "CP-118U series",
147 "CP-102UL series",
148 "CP-102U series",
149};
150
151static int mxser_numports[] = {
8ea2c2ec
JJ		 152 8, /* C168-ISA */
153 4, /* C104-ISA */
154 4, /* CI104J */
155 8, /* C168-PCI */
156 4, /* C104-PCI */
157 2, /* C102-ISA */
158 2, /* CI132 */
159 4, /* CI134 */
160 2, /* CP132 */
161 4, /* CP114 */
162 4, /* CT114 */
163 2, /* CP102 */
164 4, /* CP104U */
165 8, /* CP168U */
166 2, /* CP132U */
167 4, /* CP134U */
168 4, /* CP104JU */
169 8, /* RC7000 */
170 8, /* CP118U */
171 2, /* CP102UL */
172 2, /* CP102U */
1da177e4
LT		 173};
174
175#define UART_TYPE_NUM 2
176
177static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
178 MOXA_MUST_MU150_HWID,
179 MOXA_MUST_MU860_HWID
180};
181
8ea2c2ec 182/* This is only for PCI */
1da177e4
LT		 183#define UART_INFO_NUM 3
184struct mxpciuart_info {
185 int type;
186 int tx_fifo;
187 int rx_fifo;
188 int xmit_fifo_size;
189 int rx_high_water;
190 int rx_trigger;
191 int rx_low_water;
192 long max_baud;
193};
194
195static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
196 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
197 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
198 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
199};
200
201
202#ifdef CONFIG_PCI
203
204static struct pci_device_id mxser_pcibrds[] = {
205 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
206 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
207 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
220 {0}
221};
222
223MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
224
225
226#endif
227
228typedef struct _moxa_pci_info {
229 unsigned short busNum;
230 unsigned short devNum;
8ea2c2ec 231 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
1da177e4
LT		 232} moxa_pci_info;
233
234static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
235static int ttymajor = MXSERMAJOR;
236static int calloutmajor = MXSERCUMAJOR;
237static int verbose = 0;
238
239/* Variables for insmod */
240
241MODULE_AUTHOR("Casper Yang");
242MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 243module_param_array(ioaddr, int, NULL, 0);
244module_param(ttymajor, int, 0);
245module_param(calloutmajor, int, 0);
246module_param(verbose, bool, 0);
1da177e4
LT		 247MODULE_LICENSE("GPL");
248
249struct mxser_log {
250 int tick;
251 unsigned long rxcnt[MXSER_PORTS];
252 unsigned long txcnt[MXSER_PORTS];
253};
254
255
256struct mxser_mon {
257 unsigned long rxcnt;
258 unsigned long txcnt;
259 unsigned long up_rxcnt;
260 unsigned long up_txcnt;
261 int modem_status;
262 unsigned char hold_reason;
263};
264
265struct mxser_mon_ext {
266 unsigned long rx_cnt[32];
267 unsigned long tx_cnt[32];
268 unsigned long up_rxcnt[32];
269 unsigned long up_txcnt[32];
270 int modem_status[32];
271
272 long baudrate[32];
273 int databits[32];
274 int stopbits[32];
275 int parity[32];
276 int flowctrl[32];
277 int fifo[32];
278 int iftype[32];
279};
8ea2c2ec 280
1da177e4
LT		 281struct mxser_hwconf {
282 int board_type;
283 int ports;
284 int irq;
285 int vector;
286 int vector_mask;
287 int uart_type;
288 int ioaddr[MXSER_PORTS_PER_BOARD];
289 int baud_base[MXSER_PORTS_PER_BOARD];
290 moxa_pci_info pciInfo;
8ea2c2ec
JJ		 291 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
292 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
293 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 294};
295
296struct mxser_struct {
297 int port;
298 int base; /* port base address */
299 int irq; /* port using irq no. */
300 int vector; /* port irq vector */
301 int vectormask; /* port vector mask */
302 int rx_high_water;
303 int rx_trigger; /* Rx fifo trigger level */
304 int rx_low_water;
305 int baud_base; /* max. speed */
306 int flags; /* defined in tty.h */
307 int type; /* UART type */
308 struct tty_struct *tty;
309 int read_status_mask;
310 int ignore_status_mask;
311 int xmit_fifo_size;
312 int custom_divisor;
313 int x_char; /* xon/xoff character */
314 int close_delay;
315 unsigned short closing_wait;
316 int IER; /* Interrupt Enable Register */
317 int MCR; /* Modem control register */
318 unsigned long event;
319 int count; /* # of fd on device */
320 int blocked_open; /* # of blocked opens */
1da177e4
LT		 321 unsigned char *xmit_buf;
322 int xmit_head;
323 int xmit_tail;
324 int xmit_cnt;
325 struct work_struct tqueue;
606d099c
AC		 326 struct ktermios normal_termios;
327 struct ktermios callout_termios;
1da177e4
LT		 328 wait_queue_head_t open_wait;
329 wait_queue_head_t close_wait;
330 wait_queue_head_t delta_msr_wait;
331 struct async_icount icount; /* kernel counters for the 4 input interrupts */
332 int timeout;
8ea2c2ec
JJ		 333 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
334 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
335 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 336 unsigned char stop_rx;
337 unsigned char ldisc_stop_rx;
338 long realbaud;
339 struct mxser_mon mon_data;
340 unsigned char err_shadow;
341 spinlock_t slock;
342};
343
1da177e4
LT		 344struct mxser_mstatus {
345 tcflag_t cflag;
346 int cts;
347 int dsr;
348 int ri;
349 int dcd;
350};
351
352static struct mxser_mstatus GMStatus[MXSER_PORTS];
353
354static int mxserBoardCAP[MXSER_BOARDS] = {
355 0, 0, 0, 0
8ea2c2ec 356 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 357};
358
359static struct tty_driver *mxvar_sdriver;
360static struct mxser_struct mxvar_table[MXSER_PORTS];
361static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
606d099c
AC		 362static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
363static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
1da177e4
LT		 364static struct mxser_log mxvar_log;
365static int mxvar_diagflag;
366static unsigned char mxser_msr[MXSER_PORTS + 1];
367static struct mxser_mon_ext mon_data_ext;
368static int mxser_set_baud_method[MXSER_PORTS + 1];
369static spinlock_t gm_lock;
370
371/*
372 * This is used to figure out the divisor speeds and the timeouts
373 */
374
375static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
376
377/*
378 * static functions:
379 */
380
381static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
382static int mxser_init(void);
383
8ea2c2ec 384/* static void mxser_poll(unsigned long); */
1da177e4
LT		 385static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
386static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
c4028958 387static void mxser_do_softint(struct work_struct *);
1da177e4
LT		 388static int mxser_open(struct tty_struct *, struct file *);
389static void mxser_close(struct tty_struct *, struct file *);
390static int mxser_write(struct tty_struct *, const unsigned char *, int);
391static int mxser_write_room(struct tty_struct *);
392static void mxser_flush_buffer(struct tty_struct *);
393static int mxser_chars_in_buffer(struct tty_struct *);
394static void mxser_flush_chars(struct tty_struct *);
395static void mxser_put_char(struct tty_struct *, unsigned char);
396static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
397static int mxser_ioctl_special(unsigned int, void __user *);
398static void mxser_throttle(struct tty_struct *);
399static void mxser_unthrottle(struct tty_struct *);
606d099c 400static void mxser_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 401static void mxser_stop(struct tty_struct *);
402static void mxser_start(struct tty_struct *);
403static void mxser_hangup(struct tty_struct *);
404static void mxser_rs_break(struct tty_struct *, int);
7d12e780 405static irqreturn_t mxser_interrupt(int, void *);
1da177e4
LT		 406static void mxser_receive_chars(struct mxser_struct *, int *);
407static void mxser_transmit_chars(struct mxser_struct *);
408static void mxser_check_modem_status(struct mxser_struct *, int);
409static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
410static int mxser_startup(struct mxser_struct *);
411static void mxser_shutdown(struct mxser_struct *);
606d099c 412static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
1da177e4
LT		 413static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
414static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
415static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
416static void mxser_send_break(struct mxser_struct *, int);
417static int mxser_tiocmget(struct tty_struct *, struct file *);
418static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
419static int mxser_set_baud(struct mxser_struct *info, long newspd);
420static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
421
422static void mxser_startrx(struct tty_struct *tty);
423static void mxser_stoprx(struct tty_struct *tty);
424
425
426static int CheckIsMoxaMust(int io)
427{
428 u8 oldmcr, hwid;
429 int i;
430
431 outb(0, io + UART_LCR);
432 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
433 oldmcr = inb(io + UART_MCR);
434 outb(0, io + UART_MCR);
435 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
436 if ((hwid = inb(io + UART_MCR)) != 0) {
437 outb(oldmcr, io + UART_MCR);
8ea2c2ec 438 return MOXA_OTHER_UART;
1da177e4
LT		 439 }
440
441 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
442 for (i = 0; i < UART_TYPE_NUM; i++) {
443 if (hwid == Gmoxa_uart_id[i])
8ea2c2ec 444 return (int)hwid;
1da177e4
LT		 445 }
446 return MOXA_OTHER_UART;
447}
448
8ea2c2ec 449/* above is modified by Victor Yu. 08-15-2002 */
1da177e4 450
b68e31d0 451static const struct tty_operations mxser_ops = {
1da177e4
LT		 452 .open = mxser_open,
453 .close = mxser_close,
454 .write = mxser_write,
455 .put_char = mxser_put_char,
456 .flush_chars = mxser_flush_chars,
457 .write_room = mxser_write_room,
458 .chars_in_buffer = mxser_chars_in_buffer,
459 .flush_buffer = mxser_flush_buffer,
460 .ioctl = mxser_ioctl,
461 .throttle = mxser_throttle,
462 .unthrottle = mxser_unthrottle,
463 .set_termios = mxser_set_termios,
464 .stop = mxser_stop,
465 .start = mxser_start,
466 .hangup = mxser_hangup,
57432345
KS		 467 .break_ctl = mxser_rs_break,
468 .wait_until_sent = mxser_wait_until_sent,
1da177e4
LT		 469 .tiocmget = mxser_tiocmget,
470 .tiocmset = mxser_tiocmset,
471};
472
473/*
474 * The MOXA Smartio/Industio serial driver boot-time initialization code!
475 */
476
477static int __init mxser_module_init(void)
478{
479 int ret;
480
481 if (verbose)
482 printk(KERN_DEBUG "Loading module mxser ...\n");
483 ret = mxser_init();
484 if (verbose)
485 printk(KERN_DEBUG "Done.\n");
486 return ret;
487}
488
489static void __exit mxser_module_exit(void)
490{
64698b69 491 int i, err;
1da177e4
LT		 492
493 if (verbose)
494 printk(KERN_DEBUG "Unloading module mxser ...\n");
495
64698b69
KS		 496 err = tty_unregister_driver(mxvar_sdriver);
497 if (!err)
498 put_tty_driver(mxvar_sdriver);
499 else
1da177e4
LT		 500 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
501
502 for (i = 0; i < MXSER_BOARDS; i++) {
503 struct pci_dev *pdev;
504
505 if (mxsercfg[i].board_type == -1)
506 continue;
507 else {
508 pdev = mxsercfg[i].pciInfo.pdev;
509 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 510 if (pdev != NULL) { /* PCI */
1da177e4
LT		 511 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
512 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
1187ece3 513 pci_dev_put(pdev);
1da177e4
LT		 514 } else {
515 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
516 release_region(mxsercfg[i].vector, 1);
517 }
518 }
519 }
520 if (verbose)
521 printk(KERN_DEBUG "Done.\n");
1da177e4
LT		 522}
523
524static void process_txrx_fifo(struct mxser_struct *info)
525{
526 int i;
527
528 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
529 info->rx_trigger = 1;
530 info->rx_high_water = 1;
531 info->rx_low_water = 1;
532 info->xmit_fifo_size = 1;
533 } else {
534 for (i = 0; i < UART_INFO_NUM; i++) {
535 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
536 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
537 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
538 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
539 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
540 break;
541 }
542 }
543 }
544}
545
546static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
547{
548 struct mxser_struct *info;
549 int retval;
550 int i, n;
551
552 n = board * MXSER_PORTS_PER_BOARD;
553 info = &mxvar_table[n];
554 /*if (verbose) */ {
ae25f8ec 555 printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
8ea2c2ec
JJ		 556 n, n + hwconf->ports - 1);
557 printk(" max. baud rate = %d bps.\n",
558 hwconf->MaxCanSetBaudRate[0]);
1da177e4
LT		 559 }
560
561 for (i = 0; i < hwconf->ports; i++, n++, info++) {
562 info->port = n;
563 info->base = hwconf->ioaddr[i];
564 info->irq = hwconf->irq;
565 info->vector = hwconf->vector;
566 info->vectormask = hwconf->vector_mask;
8ea2c2ec 567 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 568 info->stop_rx = 0;
569 info->ldisc_stop_rx = 0;
570
571 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
8ea2c2ec 572 /* Enhance mode enabled here */
1da177e4
LT		 573 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
574 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
575 }
576
577 info->flags = ASYNC_SHARE_IRQ;
578 info->type = hwconf->uart_type;
579 info->baud_base = hwconf->baud_base[i];
580
581 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
582
583 process_txrx_fifo(info);
584
585
586 info->custom_divisor = hwconf->baud_base[i] * 16;
587 info->close_delay = 5 * HZ / 10;
588 info->closing_wait = 30 * HZ;
c4028958 589 INIT_WORK(&info->tqueue, mxser_do_softint);
1da177e4
LT		 590 info->normal_termios = mxvar_sdriver->init_termios;
591 init_waitqueue_head(&info->open_wait);
592 init_waitqueue_head(&info->close_wait);
593 init_waitqueue_head(&info->delta_msr_wait);
594 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
595 info->err_shadow = 0;
596 spin_lock_init(&info->slock);
597 }
598 /*
599 * Allocate the IRQ if necessary
600 */
601
602
603 /* before set INT ISR, disable all int */
604 for (i = 0; i < hwconf->ports; i++) {
8ea2c2ec
JJ		 605 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
606 hwconf->ioaddr[i] + UART_IER);
1da177e4
LT		 607 }
608
609 n = board * MXSER_PORTS_PER_BOARD;
610 info = &mxvar_table[n];
611
8ea2c2ec
JJ		 612 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
613 "mxser", info);
1da177e4 614 if (retval) {
8ea2c2ec
JJ		 615 printk(KERN_ERR "Board %d: %s",
616 board, mxser_brdname[hwconf->board_type - 1]);
617 printk(" Request irq failed, IRQ (%d) may conflict with"
618 " another device.\n", info->irq);
1da177e4
LT		 619 return retval;
620 }
621 return 0;
622}
623
1da177e4
LT		 624static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
625{
626 mxsercfg[board] = *hwconf;
627}
628
629#ifdef CONFIG_PCI
630static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
631{
632 int i, j;
8ea2c2ec 633 /* unsigned int val; */
1da177e4
LT		 634 unsigned int ioaddress;
635 struct pci_dev *pdev = hwconf->pciInfo.pdev;
636
8ea2c2ec 637 /* io address */
1da177e4
LT		 638 hwconf->board_type = board_type;
639 hwconf->ports = mxser_numports[board_type - 1];
640 ioaddress = pci_resource_start(pdev, 2);
8ea2c2ec
JJ		 641 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
642 "mxser(IO)");
1da177e4 643
8ea2c2ec 644 for (i = 0; i < hwconf->ports; i++)
1da177e4 645 hwconf->ioaddr[i] = ioaddress + 8 * i;
1da177e4 646
8ea2c2ec 647 /* vector */
1da177e4 648 ioaddress = pci_resource_start(pdev, 3);
8ea2c2ec
JJ		 649 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
650 "mxser(vector)");
1da177e4
LT		 651 hwconf->vector = ioaddress;
652
8ea2c2ec 653 /* irq */
1da177e4
LT		 654 hwconf->irq = hwconf->pciInfo.pdev->irq;
655
656 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
657 hwconf->uart_type = PORT_16550A;
658 hwconf->vector_mask = 0;
659
660
661 for (i = 0; i < hwconf->ports; i++) {
662 for (j = 0; j < UART_INFO_NUM; j++) {
663 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
664 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
665
8ea2c2ec 666 /* exception....CP-102 */
1da177e4
LT		 667 if (board_type == MXSER_BOARD_CP102)
668 hwconf->MaxCanSetBaudRate[i] = 921600;
669 break;
670 }
671 }
672 }
673
674 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
675 for (i = 0; i < hwconf->ports; i++) {
676 if (i < 4)
677 hwconf->opmode_ioaddr[i] = ioaddress + 4;
678 else
679 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
680 }
8ea2c2ec
JJ		 681 outb(0, ioaddress + 4); /* default set to RS232 mode */
682 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4
LT		 683 }
684
685 for (i = 0; i < hwconf->ports; i++) {
686 hwconf->vector_mask |= (1 << i);
687 hwconf->baud_base[i] = 921600;
688 }
8ea2c2ec 689 return 0;
1da177e4
LT		 690}
691#endif
692
693static int mxser_init(void)
694{
695 int i, m, retval, b, n;
1da177e4
LT		 696 struct pci_dev *pdev = NULL;
697 int index;
698 unsigned char busnum, devnum;
699 struct mxser_hwconf hwconf;
700
701 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
702 if (!mxvar_sdriver)
703 return -ENOMEM;
704 spin_lock_init(&gm_lock);
705
706 for (i = 0; i < MXSER_BOARDS; i++) {
707 mxsercfg[i].board_type = -1;
708 }
709
8ea2c2ec
JJ		 710 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
711 MXSER_VERSION);
1da177e4
LT		 712
713 /* Initialize the tty_driver structure */
714 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
31f87cf4 715 mxvar_sdriver->owner = THIS_MODULE;
1da177e4 716 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
ae25f8ec 717 mxvar_sdriver->name = "ttyMI";
1da177e4
LT		 718 mxvar_sdriver->major = ttymajor;
719 mxvar_sdriver->minor_start = 0;
720 mxvar_sdriver->num = MXSER_PORTS + 1;
721 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
722 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
723 mxvar_sdriver->init_termios = tty_std_termios;
8ea2c2ec 724 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
606d099c
AC		 725 mxvar_sdriver->init_termios.c_ispeed = 9600;
726 mxvar_sdriver->init_termios.c_ospeed = 9600;
1da177e4
LT		 727 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
728 tty_set_operations(mxvar_sdriver, &mxser_ops);
729 mxvar_sdriver->ttys = mxvar_tty;
730 mxvar_sdriver->termios = mxvar_termios;
731 mxvar_sdriver->termios_locked = mxvar_termios_locked;
732
1da177e4
LT		 733 mxvar_diagflag = 0;
734 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
735 memset(&mxvar_log, 0, sizeof(struct mxser_log));
736
737 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
738 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
739 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
740 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
741
742 m = 0;
743 /* Start finding ISA boards here */
744 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
745 int cap;
8ea2c2ec 746
1da177e4
LT		 747 if (!(cap = mxserBoardCAP[b]))
748 continue;
749
750 retval = mxser_get_ISA_conf(cap, &hwconf);
751
752 if (retval != 0)
8ea2c2ec
JJ		 753 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
754 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 755
756 if (retval <= 0) {
757 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 758 printk(KERN_ERR "Invalid interrupt number, "
759 "board not configured\n");
1da177e4 760 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 761 printk(KERN_ERR "Invalid interrupt number, "
762 "board not configured\n");
1da177e4 763 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 764 printk(KERN_ERR "Invalid interrupt vector, "
765 "board not configured\n");
1da177e4 766 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 767 printk(KERN_ERR "Invalid I/O address, "
768 "board not configured\n");
1da177e4
LT		 769
770 continue;
771 }
772
773 hwconf.pciInfo.busNum = 0;
774 hwconf.pciInfo.devNum = 0;
775 hwconf.pciInfo.pdev = NULL;
776
777 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 778 /*
779 * init mxsercfg first,
780 * or mxsercfg data is not correct on ISR.
781 */
782 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 783 if (mxser_initbrd(m, &hwconf) < 0)
784 continue;
785
1da177e4
LT		 786 m++;
787 }
788
789 /* Start finding ISA boards from module arg */
790 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
791 int cap;
8ea2c2ec 792
1da177e4
LT		 793 if (!(cap = ioaddr[b]))
794 continue;
795
796 retval = mxser_get_ISA_conf(cap, &hwconf);
797
798 if (retval != 0)
8ea2c2ec
JJ		 799 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
800 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 801
802 if (retval <= 0) {
803 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 804 printk(KERN_ERR "Invalid interrupt number, "
805 "board not configured\n");
1da177e4 806 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 807 printk(KERN_ERR "Invalid interrupt number, "
808 "board not configured\n");
1da177e4 809 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 810 printk(KERN_ERR "Invalid interrupt vector, "
811 "board not configured\n");
1da177e4 812 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 813 printk(KERN_ERR "Invalid I/O address, "
814 "board not configured\n");
1da177e4
LT		 815
816 continue;
817 }
818
819 hwconf.pciInfo.busNum = 0;
820 hwconf.pciInfo.devNum = 0;
821 hwconf.pciInfo.pdev = NULL;
822
823 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 824 /*
825 * init mxsercfg first,
826 * or mxsercfg data is not correct on ISR.
827 */
828 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 829 if (mxser_initbrd(m, &hwconf) < 0)
830 continue;
831
832 m++;
833 }
834
835 /* start finding PCI board here */
836#ifdef CONFIG_PCI
fe971071 837 n = ARRAY_SIZE(mxser_pcibrds) - 1;
1da177e4
LT		 838 index = 0;
839 b = 0;
840 while (b < n) {
1187ece3 841 pdev = pci_get_device(mxser_pcibrds[b].vendor,
8ea2c2ec 842 mxser_pcibrds[b].device, pdev);
1187ece3 843 if (pdev == NULL) {
1da177e4
LT		 844 b++;
845 continue;
846 }
847 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
848 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
849 hwconf.pciInfo.pdev = pdev;
8ea2c2ec
JJ		 850 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
851 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
852 busnum, devnum >> 3);
1da177e4 853 index++;
8ea2c2ec
JJ		 854 if (m >= MXSER_BOARDS)
855 printk(KERN_ERR
856 "Too many Smartio/Industio family boards find "
857 "(maximum %d), board not configured\n",
858 MXSER_BOARDS);
859 else {
1da177e4 860 if (pci_enable_device(pdev)) {
8ea2c2ec
JJ		 861 printk(KERN_ERR "Moxa SmartI/O PCI enable "
862 "fail !\n");
1da177e4
LT		 863 continue;
864 }
8ea2c2ec
JJ		 865 retval = mxser_get_PCI_conf(busnum, devnum,
866 (int)mxser_pcibrds[b].driver_data,
867 &hwconf);
1da177e4
LT		 868 if (retval < 0) {
869 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 870 printk(KERN_ERR
871 "Invalid interrupt number, "
872 "board not configured\n");
1da177e4 873 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 874 printk(KERN_ERR
875 "Invalid interrupt number, "
876 "board not configured\n");
1da177e4 877 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 878 printk(KERN_ERR
879 "Invalid interrupt vector, "
880 "board not configured\n");
1da177e4 881 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 882 printk(KERN_ERR
883 "Invalid I/O address, "
884 "board not configured\n");
1da177e4
LT		 885 continue;
886 }
887 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 888 /* init mxsercfg first,
889 * or mxsercfg data is not correct on ISR.
890 */
891 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 892 if (mxser_initbrd(m, &hwconf) < 0)
893 continue;
894 m++;
1187ece3
AC		 895 /* Keep an extra reference if we succeeded. It will
896 be returned at unload time */
897 pci_dev_get(pdev);
1da177e4
LT		 898 }
899 }
900#endif
901
64698b69
KS		 902 retval = tty_register_driver(mxvar_sdriver);
903 if (retval) {
8ea2c2ec
JJ		 904 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
905 " driver !\n");
64698b69 906 put_tty_driver(mxvar_sdriver);
1da177e4 907
1da177e4
LT		 908 for (i = 0; i < MXSER_BOARDS; i++) {
909 if (mxsercfg[i].board_type == -1)
910 continue;
911 else {
912 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 913 /* todo: release io, vector */
1da177e4
LT		 914 }
915 }
64698b69 916 return retval;
1da177e4
LT		 917 }
918
64698b69 919 return 0;
1da177e4
LT		 920}
921
c4028958 922static void mxser_do_softint(struct work_struct *work)
1da177e4 923{
c4028958
DH		 924 struct mxser_struct *info =
925 container_of(work, struct mxser_struct, tqueue);
1da177e4
LT		 926 struct tty_struct *tty;
927
928 tty = info->tty;
929
930 if (tty) {
931 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
932 tty_wakeup(tty);
933 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
934 tty_hangup(tty);
935 }
936}
937
938static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
939{
940 unsigned char status = 0;
941
942 status = inb(baseaddr + UART_MSR);
943
944 mxser_msr[port] &= 0x0F;
945 mxser_msr[port] |= status;
946 status = mxser_msr[port];
947 if (mode)
948 mxser_msr[port] = 0;
949
950 return status;
951}
952
953/*
954 * This routine is called whenever a serial port is opened. It
955 * enables interrupts for a serial port, linking in its async structure into
956 * the IRQ chain. It also performs the serial-specific
957 * initialization for the tty structure.
958 */
959static int mxser_open(struct tty_struct *tty, struct file *filp)
960{
961 struct mxser_struct *info;
962 int retval, line;
963
6f08b72c
KS		 964 /* initialize driver_data in case something fails */
965 tty->driver_data = NULL;
966
1da177e4
LT		 967 line = tty->index;
968 if (line == MXSER_PORTS)
969 return 0;
970 if (line < 0 || line > MXSER_PORTS)
971 return -ENODEV;
972 info = mxvar_table + line;
973 if (!info->base)
8ea2c2ec 974 return -ENODEV;
1da177e4
LT		 975
976 tty->driver_data = info;
977 info->tty = tty;
978 /*
979 * Start up serial port
980 */
981 retval = mxser_startup(info);
982 if (retval)
8ea2c2ec 983 return retval;
1da177e4
LT		 984
985 retval = mxser_block_til_ready(tty, filp, info);
986 if (retval)
8ea2c2ec 987 return retval;
1da177e4
LT		 988
989 info->count++;
990
991 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
992 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
993 *tty->termios = info->normal_termios;
994 else
995 *tty->termios = info->callout_termios;
996 mxser_change_speed(info, NULL);
997 }
998
8ea2c2ec
JJ		 999 /*
1000 status = mxser_get_msr(info->base, 0, info->port);
1001 mxser_check_modem_status(info, status);
1002 */
1da177e4 1003
8cddd707 1004 /* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1005 tty->low_latency = 1;
1006 return 0;
1007}
1008
1009/*
1010 * This routine is called when the serial port gets closed. First, we
1011 * wait for the last remaining data to be sent. Then, we unlink its
1012 * async structure from the interrupt chain if necessary, and we free
1013 * that IRQ if nothing is left in the chain.
1014 */
1015static void mxser_close(struct tty_struct *tty, struct file *filp)
1016{
56e139f6 1017 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1018
1019 unsigned long timeout;
1020 unsigned long flags;
1021 struct tty_ldisc *ld;
1022
1023 if (tty->index == MXSER_PORTS)
1024 return;
1025 if (!info)
6f08b72c 1026 return;
1da177e4
LT		 1027
1028 spin_lock_irqsave(&info->slock, flags);
1029
1030 if (tty_hung_up_p(filp)) {
1031 spin_unlock_irqrestore(&info->slock, flags);
1032 return;
1033 }
1034 if ((tty->count == 1) && (info->count != 1)) {
1035 /*
1036 * Uh, oh. tty->count is 1, which means that the tty
1037 * structure will be freed. Info->count should always
1038 * be one in these conditions. If it's greater than
1039 * one, we've got real problems, since it means the
1040 * serial port won't be shutdown.
1041 */
8ea2c2ec
JJ		 1042 printk(KERN_ERR "mxser_close: bad serial port count; "
1043 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 1044 info->count = 1;
1045 }
1046 if (--info->count < 0) {
8ea2c2ec
JJ		 1047 printk(KERN_ERR "mxser_close: bad serial port count for "
1048 "ttys%d: %d\n", info->port, info->count);
1da177e4
LT		 1049 info->count = 0;
1050 }
1051 if (info->count) {
1052 spin_unlock_irqrestore(&info->slock, flags);
1053 return;
1054 }
1055 info->flags |= ASYNC_CLOSING;
1056 spin_unlock_irqrestore(&info->slock, flags);
1057 /*
1058 * Save the termios structure, since this port may have
1059 * separate termios for callout and dialin.
1060 */
1061 if (info->flags & ASYNC_NORMAL_ACTIVE)
1062 info->normal_termios = *tty->termios;
1063 /*
1064 * Now we wait for the transmit buffer to clear; and we notify
1065 * the line discipline to only process XON/XOFF characters.
1066 */
1067 tty->closing = 1;
1068 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1069 tty_wait_until_sent(tty, info->closing_wait);
1070 /*
1071 * At this point we stop accepting input. To do this, we
1072 * disable the receive line status interrupts, and tell the
1073 * interrupt driver to stop checking the data ready bit in the
1074 * line status register.
1075 */
1076 info->IER &= ~UART_IER_RLSI;
1077 if (info->IsMoxaMustChipFlag)
1078 info->IER &= ~MOXA_MUST_RECV_ISR;
1079/* by William
1080 info->read_status_mask &= ~UART_LSR_DR;
1081*/
1082 if (info->flags & ASYNC_INITIALIZED) {
1083 outb(info->IER, info->base + UART_IER);
1084 /*
1085 * Before we drop DTR, make sure the UART transmitter
1086 * has completely drained; this is especially
1087 * important if there is a transmit FIFO!
1088 */
1089 timeout = jiffies + HZ;
1090 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1091 schedule_timeout_interruptible(5);
1da177e4
LT		 1092 if (time_after(jiffies, timeout))
1093 break;
1094 }
1095 }
1096 mxser_shutdown(info);
1097
1098 if (tty->driver->flush_buffer)
1099 tty->driver->flush_buffer(tty);
1100
1101 ld = tty_ldisc_ref(tty);
1102 if (ld) {
8ea2c2ec 1103 if (ld->flush_buffer)
1da177e4
LT		 1104 ld->flush_buffer(tty);
1105 tty_ldisc_deref(ld);
1106 }
1107
1108 tty->closing = 0;
1109 info->event = 0;
1110 info->tty = NULL;
1111 if (info->blocked_open) {
da4cd8df
NA		 1112 if (info->close_delay)
1113 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1114 wake_up_interruptible(&info->open_wait);
1115 }
1116
1117 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1118 wake_up_interruptible(&info->close_wait);
1119
1120}
1121
1122static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1123{
1124 int c, total = 0;
56e139f6 1125 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1126 unsigned long flags;
1127
8a7f7c93 1128 if (!info->xmit_buf)
8ea2c2ec 1129 return 0;
1da177e4
LT		 1130
1131 while (1) {
8ea2c2ec
JJ		 1132 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1133 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1134 if (c <= 0)
1135 break;
1136
1137 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1138 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1139 info->xmit_head = (info->xmit_head + c) &
1140 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1141 info->xmit_cnt += c;
1142 spin_unlock_irqrestore(&info->slock, flags);
1143
1144 buf += c;
1145 count -= c;
1146 total += c;
1da177e4
LT		 1147 }
1148
1149 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1150 if (!tty->hw_stopped ||
1151 (info->type == PORT_16550A) ||
1152 (info->IsMoxaMustChipFlag)) {
1da177e4
LT		 1153 spin_lock_irqsave(&info->slock, flags);
1154 info->IER |= UART_IER_THRI;
1155 outb(info->IER, info->base + UART_IER);
1156 spin_unlock_irqrestore(&info->slock, flags);
1157 }
1158 }
1159 return total;
1160}
1161
1162static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1163{
56e139f6 1164 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1165 unsigned long flags;
1166
8a7f7c93 1167 if (!info->xmit_buf)
1da177e4
LT		 1168 return;
1169
1170 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1171 return;
1172
1173 spin_lock_irqsave(&info->slock, flags);
1174 info->xmit_buf[info->xmit_head++] = ch;
1175 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1176 info->xmit_cnt++;
1177 spin_unlock_irqrestore(&info->slock, flags);
1178 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1179 if (!tty->hw_stopped ||
1180 (info->type == PORT_16550A) ||
1181 info->IsMoxaMustChipFlag) {
1da177e4
LT		 1182 spin_lock_irqsave(&info->slock, flags);
1183 info->IER |= UART_IER_THRI;
1184 outb(info->IER, info->base + UART_IER);
1185 spin_unlock_irqrestore(&info->slock, flags);
1186 }
1187 }
1188}
1189
1190
1191static void mxser_flush_chars(struct tty_struct *tty)
1192{
56e139f6 1193 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1194 unsigned long flags;
1195
8ea2c2ec
JJ		 1196 if (info->xmit_cnt <= 0 ||
1197 tty->stopped ||
1198 !info->xmit_buf ||
1199 (tty->hw_stopped &&
1200 (info->type != PORT_16550A) &&
1201 (!info->IsMoxaMustChipFlag)
1202 ))
1da177e4
LT		 1203 return;
1204
1205 spin_lock_irqsave(&info->slock, flags);
1206
1207 info->IER |= UART_IER_THRI;
1208 outb(info->IER, info->base + UART_IER);
1209
1210 spin_unlock_irqrestore(&info->slock, flags);
1211}
1212
1213static int mxser_write_room(struct tty_struct *tty)
1214{
56e139f6 1215 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1216 int ret;
1217
1218 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1219 if (ret < 0)
1220 ret = 0;
8ea2c2ec 1221 return ret;
1da177e4
LT		 1222}
1223
1224static int mxser_chars_in_buffer(struct tty_struct *tty)
1225{
56e139f6 1226 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1227 return info->xmit_cnt;
1228}
1229
1230static void mxser_flush_buffer(struct tty_struct *tty)
1231{
56e139f6 1232 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1233 char fcr;
1234 unsigned long flags;
1235
1236
1237 spin_lock_irqsave(&info->slock, flags);
1238 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1239
1240 /* below added by shinhay */
1241 fcr = inb(info->base + UART_FCR);
8ea2c2ec
JJ		 1242 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1243 info->base + UART_FCR);
1da177e4
LT		 1244 outb(fcr, info->base + UART_FCR);
1245
1246 spin_unlock_irqrestore(&info->slock, flags);
1247 /* above added by shinhay */
1248
b963a844 1249 tty_wakeup(tty);
1da177e4
LT		 1250}
1251
1252static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1253{
56e139f6 1254 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1255 int retval;
1256 struct async_icount cprev, cnow; /* kernel counter temps */
1257 struct serial_icounter_struct __user *p_cuser;
1258 unsigned long templ;
1259 unsigned long flags;
1260 void __user *argp = (void __user *)arg;
1261
1262 if (tty->index == MXSER_PORTS)
8ea2c2ec 1263 return mxser_ioctl_special(cmd, argp);
1da177e4 1264
8ea2c2ec 1265 /* following add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1266 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1267 int opmode, p;
1268 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1269 int shiftbit;
1270 unsigned char val, mask;
1271
1272 p = info->port % 4;
1273 if (cmd == MOXA_SET_OP_MODE) {
1274 if (get_user(opmode, (int __user *) argp))
1275 return -EFAULT;
8ea2c2ec
JJ		 1276 if (opmode != RS232_MODE &&
1277 opmode != RS485_2WIRE_MODE &&
1278 opmode != RS422_MODE &&
1279 opmode != RS485_4WIRE_MODE)
1da177e4
LT		 1280 return -EFAULT;
1281 mask = ModeMask[p];
1282 shiftbit = p * 2;
1283 val = inb(info->opmode_ioaddr);
1284 val &= mask;
1285 val |= (opmode << shiftbit);
1286 outb(val, info->opmode_ioaddr);
1287 } else {
1288 shiftbit = p * 2;
1289 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1290 opmode &= OP_MODE_MASK;
1291 if (copy_to_user(argp, &opmode, sizeof(int)))
1292 return -EFAULT;
1293 }
1294 return 0;
1295 }
8ea2c2ec 1296 /* above add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1297
1298 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1299 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 1300 return -EIO;
1da177e4
LT		 1301 }
1302 switch (cmd) {
1303 case TCSBRK: /* SVID version: non-zero arg --> no break */
1304 retval = tty_check_change(tty);
1305 if (retval)
8ea2c2ec 1306 return retval;
1da177e4
LT		 1307 tty_wait_until_sent(tty, 0);
1308 if (!arg)
1309 mxser_send_break(info, HZ / 4); /* 1/4 second */
8ea2c2ec 1310 return 0;
1da177e4
LT		 1311 case TCSBRKP: /* support for POSIX tcsendbreak() */
1312 retval = tty_check_change(tty);
1313 if (retval)
8ea2c2ec 1314 return retval;
1da177e4
LT		 1315 tty_wait_until_sent(tty, 0);
1316 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
8ea2c2ec 1317 return 0;
1da177e4 1318 case TIOCGSOFTCAR:
8ea2c2ec 1319 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1da177e4
LT		 1320 case TIOCSSOFTCAR:
1321 if (get_user(templ, (unsigned long __user *) argp))
1322 return -EFAULT;
1323 arg = templ;
1324 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
8ea2c2ec 1325 return 0;
1da177e4
LT		 1326 case TIOCGSERIAL:
1327 return mxser_get_serial_info(info, argp);
1328 case TIOCSSERIAL:
1329 return mxser_set_serial_info(info, argp);
1330 case TIOCSERGETLSR: /* Get line status register */
1331 return mxser_get_lsr_info(info, argp);
1332 /*
1333 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1334 * - mask passed in arg for lines of interest
1335 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1336 * Caller should use TIOCGICOUNT to see which one it was
1337 */
fc83815c
JS		 1338 case TIOCMIWAIT:
1339 spin_lock_irqsave(&info->slock, flags);
1340 cnow = info->icount; /* note the counters on entry */
1341 spin_unlock_irqrestore(&info->slock, flags);
1342
1343 wait_event_interruptible(info->delta_msr_wait, ({
1344 cprev = cnow;
1da177e4 1345 spin_lock_irqsave(&info->slock, flags);
fc83815c 1346 cnow = info->icount; /* atomic copy */
1da177e4
LT		 1347 spin_unlock_irqrestore(&info->slock, flags);
1348
fc83815c
JS		 1349 ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1350 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1351 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1352 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
1353 }));
1354 break;
1da177e4
LT		 1355 /*
1356 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1357 * Return: write counters to the user passed counter struct
1358 * NB: both 1->0 and 0->1 transitions are counted except for
1359 * RI where only 0->1 is counted.
1360 */
1361 case TIOCGICOUNT:
1362 spin_lock_irqsave(&info->slock, flags);
1363 cnow = info->icount;
1364 spin_unlock_irqrestore(&info->slock, flags);
1365 p_cuser = argp;
1366 /* modified by casper 1/11/2000 */
1367 if (put_user(cnow.frame, &p_cuser->frame))
1368 return -EFAULT;
1369 if (put_user(cnow.brk, &p_cuser->brk))
1370 return -EFAULT;
1371 if (put_user(cnow.overrun, &p_cuser->overrun))
1372 return -EFAULT;
1373 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1374 return -EFAULT;
1375 if (put_user(cnow.parity, &p_cuser->parity))
1376 return -EFAULT;
1377 if (put_user(cnow.rx, &p_cuser->rx))
1378 return -EFAULT;
1379 if (put_user(cnow.tx, &p_cuser->tx))
1380 return -EFAULT;
1381 put_user(cnow.cts, &p_cuser->cts);
1382 put_user(cnow.dsr, &p_cuser->dsr);
1383 put_user(cnow.rng, &p_cuser->rng);
1384 put_user(cnow.dcd, &p_cuser->dcd);
1da177e4
LT		 1385 return 0;
1386 case MOXA_HighSpeedOn:
8ea2c2ec
JJ		 1387 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1388 case MOXA_SDS_RSTICOUNTER: {
1da177e4
LT		 1389 info->mon_data.rxcnt = 0;
1390 info->mon_data.txcnt = 0;
1391 return 0;
1392 }
8ea2c2ec 1393/* (above) added by James. */
1da177e4
LT		 1394 case MOXA_ASPP_SETBAUD:{
1395 long baud;
8ea2c2ec 1396 if (get_user(baud, (long __user *)argp))
1da177e4
LT		 1397 return -EFAULT;
1398 mxser_set_baud(info, baud);
1399 return 0;
1400 }
1401 case MOXA_ASPP_GETBAUD:
1402 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1403 return -EFAULT;
1404
1405 return 0;
1406
1407 case MOXA_ASPP_OQUEUE:{
1408 int len, lsr;
1409
1410 len = mxser_chars_in_buffer(tty);
1411
1412 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1413
1414 len += (lsr ? 0 : 1);
1415
1416 if (copy_to_user(argp, &len, sizeof(int)))
1417 return -EFAULT;
1418
1419 return 0;
1420 }
8ea2c2ec 1421 case MOXA_ASPP_MON: {
1da177e4 1422 int mcr, status;
8ea2c2ec
JJ		 1423
1424 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1da177e4
LT		 1425
1426 status = mxser_get_msr(info->base, 1, info->port, info);
1427 mxser_check_modem_status(info, status);
1428
1429 mcr = inb(info->base + UART_MCR);
1430 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1431 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1432 else
1433 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1434
1435 if (mcr & MOXA_MUST_MCR_TX_XON)
1436 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1437 else
1438 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1439
1440 if (info->tty->hw_stopped)
1441 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1442 else
1443 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1444
8ea2c2ec
JJ		 1445 if (copy_to_user(argp, &info->mon_data,
1446 sizeof(struct mxser_mon)))
1da177e4
LT		 1447 return -EFAULT;
1448
1449 return 0;
1da177e4
LT		 1450 }
1451
8ea2c2ec
JJ		 1452 case MOXA_ASPP_LSTATUS: {
1453 if (copy_to_user(argp, &info->err_shadow,
1454 sizeof(unsigned char)))
1da177e4
LT		 1455 return -EFAULT;
1456
1457 info->err_shadow = 0;
1458 return 0;
1da177e4 1459 }
8ea2c2ec 1460 case MOXA_SET_BAUD_METHOD: {
1da177e4 1461 int method;
8ea2c2ec
JJ		 1462
1463 if (get_user(method, (int __user *)argp))
1da177e4
LT		 1464 return -EFAULT;
1465 mxser_set_baud_method[info->port] = method;
1466 if (copy_to_user(argp, &method, sizeof(int)))
1467 return -EFAULT;
1468
1469 return 0;
1470 }
1471 default:
1472 return -ENOIOCTLCMD;
1473 }
1474 return 0;
1475}
1476
1477#ifndef CMSPAR
1478#define CMSPAR 010000000000
1479#endif
1480
1481static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1482{
1483 int i, result, status;
1484
1485 switch (cmd) {
1486 case MOXA_GET_CONF:
8ea2c2ec
JJ		 1487 if (copy_to_user(argp, mxsercfg,
1488 sizeof(struct mxser_hwconf) * 4))
1da177e4
LT		 1489 return -EFAULT;
1490 return 0;
1491 case MOXA_GET_MAJOR:
1492 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1493 return -EFAULT;
1494 return 0;
1495
1496 case MOXA_GET_CUMAJOR:
1497 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1498 return -EFAULT;
1499 return 0;
1500
1501 case MOXA_CHKPORTENABLE:
1502 result = 0;
1503 for (i = 0; i < MXSER_PORTS; i++) {
1504 if (mxvar_table[i].base)
1505 result |= (1 << i);
1506 }
8ea2c2ec 1507 return put_user(result, (unsigned long __user *)argp);
1da177e4
LT		 1508 case MOXA_GETDATACOUNT:
1509 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1510 return -EFAULT;
8ea2c2ec 1511 return 0;
1da177e4
LT		 1512 case MOXA_GETMSTATUS:
1513 for (i = 0; i < MXSER_PORTS; i++) {
1514 GMStatus[i].ri = 0;
1515 if (!mxvar_table[i].base) {
1516 GMStatus[i].dcd = 0;
1517 GMStatus[i].dsr = 0;
1518 GMStatus[i].cts = 0;
1519 continue;
1520 }
1521
1522 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1523 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1524 else
1525 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1526
1527 status = inb(mxvar_table[i].base + UART_MSR);
1528 if (status & 0x80 /*UART_MSR_DCD */ )
1529 GMStatus[i].dcd = 1;
1530 else
1531 GMStatus[i].dcd = 0;
1532
1533 if (status & 0x20 /*UART_MSR_DSR */ )
1534 GMStatus[i].dsr = 1;
1535 else
1536 GMStatus[i].dsr = 0;
1537
1538
1539 if (status & 0x10 /*UART_MSR_CTS */ )
1540 GMStatus[i].cts = 1;
1541 else
1542 GMStatus[i].cts = 0;
1543 }
8ea2c2ec
JJ		 1544 if (copy_to_user(argp, GMStatus,
1545 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1546 return -EFAULT;
1547 return 0;
8ea2c2ec 1548 case MOXA_ASPP_MON_EXT: {
1da177e4
LT		 1549 int status;
1550 int opmode, p;
1551 int shiftbit;
1552 unsigned cflag, iflag;
1553
1554 for (i = 0; i < MXSER_PORTS; i++) {
1da177e4
LT		 1555 if (!mxvar_table[i].base)
1556 continue;
1557
8ea2c2ec
JJ		 1558 status = mxser_get_msr(mxvar_table[i].base, 0,
1559 i, &(mxvar_table[i]));
1560 /*
1561 mxser_check_modem_status(&mxvar_table[i],
1562 status);
1563 */
1da177e4
LT		 1564 if (status & UART_MSR_TERI)
1565 mxvar_table[i].icount.rng++;
1566 if (status & UART_MSR_DDSR)
1567 mxvar_table[i].icount.dsr++;
1568 if (status & UART_MSR_DDCD)
1569 mxvar_table[i].icount.dcd++;
1570 if (status & UART_MSR_DCTS)
1571 mxvar_table[i].icount.cts++;
1572
1573 mxvar_table[i].mon_data.modem_status = status;
1574 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1575 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1576 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1577 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1578 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1579 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1580
1581 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1582 cflag = mxvar_table[i].normal_termios.c_cflag;
1583 iflag = mxvar_table[i].normal_termios.c_iflag;
1584 } else {
1585 cflag = mxvar_table[i].tty->termios->c_cflag;
1586 iflag = mxvar_table[i].tty->termios->c_iflag;
1587 }
1588
1589 mon_data_ext.databits[i] = cflag & CSIZE;
1590
1591 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1592
1593 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1594
1595 mon_data_ext.flowctrl[i] = 0x00;
1596
1597 if (cflag & CRTSCTS)
1598 mon_data_ext.flowctrl[i] |= 0x03;
1599
1600 if (iflag & (IXON | IXOFF))
1601 mon_data_ext.flowctrl[i] |= 0x0C;
1602
1603 if (mxvar_table[i].type == PORT_16550A)
1604 mon_data_ext.fifo[i] = 1;
1605 else
1606 mon_data_ext.fifo[i] = 0;
1607
1608 p = i % 4;
1609 shiftbit = p * 2;
1610 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1611 opmode &= OP_MODE_MASK;
1612
1613 mon_data_ext.iftype[i] = opmode;
1614
1615 }
1616 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1617 return -EFAULT;
1618
1619 return 0;
1620
1621 }
1622 default:
1623 return -ENOIOCTLCMD;
1624 }
1625 return 0;
1626}
1627
1da177e4
LT		 1628static void mxser_stoprx(struct tty_struct *tty)
1629{
56e139f6 1630 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1631 /* unsigned long flags; */
1da177e4
LT		 1632
1633 info->ldisc_stop_rx = 1;
1634 if (I_IXOFF(tty)) {
8ea2c2ec
JJ		 1635 /* MX_LOCK(&info->slock); */
1636 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1637 if (info->IsMoxaMustChipFlag) {
1638 info->IER &= ~MOXA_MUST_RECV_ISR;
1639 outb(info->IER, info->base + UART_IER);
1640 } else {
8ea2c2ec 1641 /* above add by Victor Yu. 09-02-2002 */
1da177e4 1642 info->x_char = STOP_CHAR(tty);
8ea2c2ec
JJ		 1643 /* mask by Victor Yu. 09-02-2002 */
1644 /* outb(info->IER, 0); */
1da177e4
LT		 1645 outb(0, info->base + UART_IER);
1646 info->IER |= UART_IER_THRI;
8ea2c2ec
JJ		 1647 /* force Tx interrupt */
1648 outb(info->IER, info->base + UART_IER);
1649 } /* add by Victor Yu. 09-02-2002 */
1650 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1651 }
1652
1653 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1654 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1655 info->MCR &= ~UART_MCR_RTS;
1656 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1657 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1658 }
1659}
1660
1661static void mxser_startrx(struct tty_struct *tty)
1662{
56e139f6 1663 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1664 /* unsigned long flags; */
1da177e4
LT		 1665
1666 info->ldisc_stop_rx = 0;
1667 if (I_IXOFF(tty)) {
1668 if (info->x_char)
1669 info->x_char = 0;
1670 else {
8ea2c2ec 1671 /* MX_LOCK(&info->slock); */
1da177e4 1672
8ea2c2ec 1673 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1674 if (info->IsMoxaMustChipFlag) {
1675 info->IER |= MOXA_MUST_RECV_ISR;
1676 outb(info->IER, info->base + UART_IER);
1677 } else {
8ea2c2ec 1678 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1679
1680 info->x_char = START_CHAR(tty);
8ea2c2ec
JJ		 1681 /* mask by Victor Yu. 09-02-2002 */
1682 /* outb(info->IER, 0); */
1683 /* add by Victor Yu. 09-02-2002 */
1684 outb(0, info->base + UART_IER);
1685 /* force Tx interrupt */
1686 info->IER |= UART_IER_THRI;
1da177e4 1687 outb(info->IER, info->base + UART_IER);
8ea2c2ec
JJ		 1688 } /* add by Victor Yu. 09-02-2002 */
1689 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1690 }
1691 }
1692
1693 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1694 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1695 info->MCR |= UART_MCR_RTS;
1696 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1697 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1698 }
1699}
1700
1701/*
1702 * This routine is called by the upper-layer tty layer to signal that
1703 * incoming characters should be throttled.
1704 */
1705static void mxser_throttle(struct tty_struct *tty)
1706{
8ea2c2ec
JJ		 1707 /* struct mxser_struct *info = tty->driver_data; */
1708 /* unsigned long flags; */
1709
1710 /* MX_LOCK(&info->slock); */
1da177e4 1711 mxser_stoprx(tty);
8ea2c2ec 1712 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1713}
1714
1715static void mxser_unthrottle(struct tty_struct *tty)
1716{
8ea2c2ec
JJ		 1717 /* struct mxser_struct *info = tty->driver_data; */
1718 /* unsigned long flags; */
1719
1720 /* MX_LOCK(&info->slock); */
1da177e4 1721 mxser_startrx(tty);
8ea2c2ec 1722 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1723}
1724
606d099c 1725static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1726{
56e139f6 1727 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1728 unsigned long flags;
1729
7e7d136e 1730 mxser_change_speed(info, old_termios);
1da177e4 1731
7e7d136e
AC		 1732 if ((old_termios->c_cflag & CRTSCTS) &&
1733 !(tty->termios->c_cflag & CRTSCTS)) {
1734 tty->hw_stopped = 0;
1735 mxser_start(tty);
1da177e4
LT		 1736 }
1737
1738/* Handle sw stopped */
8ea2c2ec
JJ		 1739 if ((old_termios->c_iflag & IXON) &&
1740 !(tty->termios->c_iflag & IXON)) {
1da177e4
LT		 1741 tty->stopped = 0;
1742
8ea2c2ec 1743 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1744 if (info->IsMoxaMustChipFlag) {
1745 spin_lock_irqsave(&info->slock, flags);
1746 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1747 spin_unlock_irqrestore(&info->slock, flags);
1748 }
8ea2c2ec 1749 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1750
1751 mxser_start(tty);
1752 }
1753}
1754
1755/*
1756 * mxser_stop() and mxser_start()
1757 *
1758 * This routines are called before setting or resetting tty->stopped.
1759 * They enable or disable transmitter interrupts, as necessary.
1760 */
1761static void mxser_stop(struct tty_struct *tty)
1762{
56e139f6 1763 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1764 unsigned long flags;
1765
1766 spin_lock_irqsave(&info->slock, flags);
1767 if (info->IER & UART_IER_THRI) {
1768 info->IER &= ~UART_IER_THRI;
1769 outb(info->IER, info->base + UART_IER);
1770 }
1771 spin_unlock_irqrestore(&info->slock, flags);
1772}
1773
1774static void mxser_start(struct tty_struct *tty)
1775{
56e139f6 1776 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1777 unsigned long flags;
1778
1779 spin_lock_irqsave(&info->slock, flags);
1780 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1781 info->IER |= UART_IER_THRI;
1782 outb(info->IER, info->base + UART_IER);
1783 }
1784 spin_unlock_irqrestore(&info->slock, flags);
1785}
1786
1787/*
1788 * mxser_wait_until_sent() --- wait until the transmitter is empty
1789 */
1790static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1791{
56e139f6 1792 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1793 unsigned long orig_jiffies, char_time;
1794 int lsr;
1795
1796 if (info->type == PORT_UNKNOWN)
1797 return;
1798
1799 if (info->xmit_fifo_size == 0)
1800 return; /* Just in case.... */
1801
1802 orig_jiffies = jiffies;
1803 /*
1804 * Set the check interval to be 1/5 of the estimated time to
1805 * send a single character, and make it at least 1. The check
1806 * interval should also be less than the timeout.
1807 *
1808 * Note: we have to use pretty tight timings here to satisfy
1809 * the NIST-PCTS.
1810 */
1811 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1812 char_time = char_time / 5;
1813 if (char_time == 0)
1814 char_time = 1;
1815 if (timeout && timeout < char_time)
1816 char_time = timeout;
1817 /*
1818 * If the transmitter hasn't cleared in twice the approximate
1819 * amount of time to send the entire FIFO, it probably won't
1820 * ever clear. This assumes the UART isn't doing flow
1821 * control, which is currently the case. Hence, if it ever
1822 * takes longer than info->timeout, this is probably due to a
1823 * UART bug of some kind. So, we clamp the timeout parameter at
1824 * 2*info->timeout.
1825 */
1826 if (!timeout || timeout > 2 * info->timeout)
1827 timeout = 2 * info->timeout;
1828#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1829 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1830 timeout, char_time);
1da177e4
LT		 1831 printk("jiff=%lu...", jiffies);
1832#endif
1833 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1834#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1835 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1836#endif
da4cd8df 1837 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1838 if (signal_pending(current))
1839 break;
1840 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1841 break;
1842 }
1843 set_current_state(TASK_RUNNING);
1844
1845#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1846 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1847#endif
1848}
1849
1850
1851/*
1852 * This routine is called by tty_hangup() when a hangup is signaled.
1853 */
1854void mxser_hangup(struct tty_struct *tty)
1855{
56e139f6 1856 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1857
1858 mxser_flush_buffer(tty);
1859 mxser_shutdown(info);
1860 info->event = 0;
1861 info->count = 0;
1862 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1863 info->tty = NULL;
1864 wake_up_interruptible(&info->open_wait);
1865}
1866
1867
8ea2c2ec 1868/* added by James 03-12-2004. */
1da177e4
LT		 1869/*
1870 * mxser_rs_break() --- routine which turns the break handling on or off
1871 */
1872static void mxser_rs_break(struct tty_struct *tty, int break_state)
1873{
56e139f6 1874 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1875 unsigned long flags;
1876
1877 spin_lock_irqsave(&info->slock, flags);
1878 if (break_state == -1)
8ea2c2ec
JJ		 1879 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1880 info->base + UART_LCR);
1da177e4 1881 else
8ea2c2ec
JJ		 1882 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1883 info->base + UART_LCR);
1da177e4
LT		 1884 spin_unlock_irqrestore(&info->slock, flags);
1885}
1886
8ea2c2ec 1887/* (above) added by James. */
1da177e4
LT		 1888
1889
1890/*
1891 * This is the serial driver's generic interrupt routine
1892 */
7d12e780 1893static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4
LT		 1894{
1895 int status, iir, i;
1896 struct mxser_struct *info;
1897 struct mxser_struct *port;
1898 int max, irqbits, bits, msr;
1899 int pass_counter = 0;
1900 int handled = IRQ_NONE;
1901
1902 port = NULL;
8ea2c2ec 1903 /* spin_lock(&gm_lock); */
1da177e4
LT		 1904
1905 for (i = 0; i < MXSER_BOARDS; i++) {
1906 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1907 port = dev_id;
1908 break;
1909 }
1910 }
1911
8ea2c2ec 1912 if (i == MXSER_BOARDS)
1da177e4 1913 goto irq_stop;
8ea2c2ec 1914 if (port == 0)
1da177e4 1915 goto irq_stop;
1da177e4
LT		 1916 max = mxser_numports[mxsercfg[i].board_type - 1];
1917 while (1) {
1918 irqbits = inb(port->vector) & port->vectormask;
8ea2c2ec 1919 if (irqbits == port->vectormask)
1da177e4 1920 break;
1da177e4
LT		 1921
1922 handled = IRQ_HANDLED;
1923 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
8ea2c2ec 1924 if (irqbits == port->vectormask)
1da177e4 1925 break;
1da177e4
LT		 1926 if (bits & irqbits)
1927 continue;
1928 info = port + i;
1929
8ea2c2ec 1930 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1931 iir = inb(info->base + UART_IIR);
1932 if (iir & UART_IIR_NO_INT)
1933 continue;
1934 iir &= MOXA_MUST_IIR_MASK;
1935 if (!info->tty) {
1936 status = inb(info->base + UART_LSR);
1937 outb(0x27, info->base + UART_FCR);
1938 inb(info->base + UART_MSR);
1939 continue;
1940 }
8ea2c2ec 1941 /* above add by Victor Yu. 09-13-2002 */
1da177e4 1942 /*
8ea2c2ec 1943 if (info->tty->flip.count < TTY_FLIPBUF_SIZE / 4) {
1da177e4
LT		 1944 info->IER |= MOXA_MUST_RECV_ISR;
1945 outb(info->IER, info->base + UART_IER);
1946 }
1947 */
1948
1949
1950 /* mask by Victor Yu. 09-13-2002
1951 if ( !info->tty ||
1952 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1953 continue;
1954 */
1955 /* mask by Victor Yu. 09-02-2002
1956 status = inb(info->base + UART_LSR) & info->read_status_mask;
1957 */
1958
8ea2c2ec 1959 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1960 status = inb(info->base + UART_LSR);
1961
8ea2c2ec 1962 if (status & UART_LSR_PE)
1da177e4 1963 info->err_shadow |= NPPI_NOTIFY_PARITY;
8ea2c2ec 1964 if (status & UART_LSR_FE)
1da177e4 1965 info->err_shadow |= NPPI_NOTIFY_FRAMING;
8ea2c2ec 1966 if (status & UART_LSR_OE)
1da177e4 1967 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1da177e4
LT		 1968 if (status & UART_LSR_BI)
1969 info->err_shadow |= NPPI_NOTIFY_BREAK;
1970
1971 if (info->IsMoxaMustChipFlag) {
1972 /*
1973 if ( (status & 0x02) && !(status & 0x01) ) {
1974 outb(info->base+UART_FCR, 0x23);
1975 continue;
1976 }
1977 */
8ea2c2ec
JJ		 1978 if (iir == MOXA_MUST_IIR_GDA ||
1979 iir == MOXA_MUST_IIR_RDA ||
1980 iir == MOXA_MUST_IIR_RTO ||
1981 iir == MOXA_MUST_IIR_LSR)
1da177e4
LT		 1982 mxser_receive_chars(info, &status);
1983
1984 } else {
8ea2c2ec 1985 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1986
1987 status &= info->read_status_mask;
1988 if (status & UART_LSR_DR)
1989 mxser_receive_chars(info, &status);
1990 }
1991 msr = inb(info->base + UART_MSR);
1992 if (msr & UART_MSR_ANY_DELTA) {
1993 mxser_check_modem_status(info, msr);
1994 }
8ea2c2ec 1995 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1996 if (info->IsMoxaMustChipFlag) {
1997 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
1998 mxser_transmit_chars(info);
1999 }
2000 } else {
8ea2c2ec 2001 /* above add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2002
2003 if (status & UART_LSR_THRE) {
2004/* 8-2-99 by William
2005 if ( info->x_char || (info->xmit_cnt > 0) )
2006*/
2007 mxser_transmit_chars(info);
2008 }
2009 }
2010 }
2011 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2012 break; /* Prevent infinite loops */
2013 }
2014 }
2015
2016 irq_stop:
8ea2c2ec 2017 /* spin_unlock(&gm_lock); */
1da177e4
LT		 2018 return handled;
2019}
2020
2021static void mxser_receive_chars(struct mxser_struct *info, int *status)
2022{
2023 struct tty_struct *tty = info->tty;
2024 unsigned char ch, gdl;
2025 int ignored = 0;
2026 int cnt = 0;
1da177e4
LT		 2027 int recv_room;
2028 int max = 256;
2029 unsigned long flags;
2030
2031 spin_lock_irqsave(&info->slock, flags);
2032
33f0f88f 2033 recv_room = tty->receive_room;
1da177e4 2034 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
8ea2c2ec 2035 /* mxser_throttle(tty); */
1da177e4 2036 mxser_stoprx(tty);
8ea2c2ec 2037 /* return; */
1da177e4
LT		 2038 }
2039
8ea2c2ec 2040 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2041 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2042
2043 if (*status & UART_LSR_SPECIAL) {
2044 goto intr_old;
2045 }
8ea2c2ec
JJ		 2046 /* following add by Victor Yu. 02-11-2004 */
2047 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2048 (*status & MOXA_MUST_LSR_RERR))
1da177e4 2049 goto intr_old;
8ea2c2ec 2050 /* above add by Victor Yu. 02-14-2004 */
1da177e4
LT		 2051 if (*status & MOXA_MUST_LSR_RERR)
2052 goto intr_old;
2053
2054 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2055
8ea2c2ec
JJ		 2056 /* add by Victor Yu. 02-11-2004 */
2057 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
1da177e4
LT		 2058 gdl &= MOXA_MUST_GDL_MASK;
2059 if (gdl >= recv_room) {
2060 if (!info->ldisc_stop_rx) {
8ea2c2ec 2061 /* mxser_throttle(tty); */
1da177e4
LT		 2062 mxser_stoprx(tty);
2063 }
8ea2c2ec 2064 /* return; */
1da177e4
LT		 2065 }
2066 while (gdl--) {
2067 ch = inb(info->base + UART_RX);
3399ba5b 2068 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT		 2069 cnt++;
2070 /*
8ea2c2ec 2071 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4 2072 mxser_stoprx(tty);
8ea2c2ec 2073 info->stop_rx = 1;
1da177e4
LT		 2074 break;
2075 } */
2076 }
2077 goto end_intr;
2078 }
8ea2c2ec
JJ		 2079 intr_old:
2080 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2081
2082 do {
2083 if (max-- < 0)
2084 break;
2085 /*
8ea2c2ec 2086 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4
LT		 2087 mxser_stoprx(tty);
2088 info->stop_rx=1;
2089 break;
2090 }
2091 */
2092
2093 ch = inb(info->base + UART_RX);
8ea2c2ec 2094 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2095 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2096 outb(0x23, info->base + UART_FCR);
2097 *status &= info->read_status_mask;
8ea2c2ec 2098 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2099 if (*status & info->ignore_status_mask) {
2100 if (++ignored > 100)
2101 break;
2102 } else {
3399ba5b 2103 char flag = 0;
1da177e4
LT		 2104 if (*status & UART_LSR_SPECIAL) {
2105 if (*status & UART_LSR_BI) {
3399ba5b 2106 flag = TTY_BREAK;
1da177e4
LT		 2107/* added by casper 1/11/2000 */
2108 info->icount.brk++;
1da177e4
LT		 2109/* */
2110 if (info->flags & ASYNC_SAK)
2111 do_SAK(tty);
2112 } else if (*status & UART_LSR_PE) {
3399ba5b 2113 flag = TTY_PARITY;
1da177e4
LT		 2114/* added by casper 1/11/2000 */
2115 info->icount.parity++;
2116/* */
2117 } else if (*status & UART_LSR_FE) {
3399ba5b 2118 flag = TTY_FRAME;
1da177e4
LT		 2119/* added by casper 1/11/2000 */
2120 info->icount.frame++;
2121/* */
2122 } else if (*status & UART_LSR_OE) {
3399ba5b 2123 flag = TTY_OVERRUN;
1da177e4
LT		 2124/* added by casper 1/11/2000 */
2125 info->icount.overrun++;
2126/* */
3399ba5b
DV		 2127 }
2128 }
2129 tty_insert_flip_char(tty, ch, flag);
1da177e4
LT		 2130 cnt++;
2131 if (cnt >= recv_room) {
2132 if (!info->ldisc_stop_rx) {
8ea2c2ec 2133 /* mxser_throttle(tty); */
1da177e4
LT		 2134 mxser_stoprx(tty);
2135 }
2136 break;
2137 }
2138
2139 }
2140
8ea2c2ec 2141 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2142 if (info->IsMoxaMustChipFlag)
2143 break;
8ea2c2ec 2144 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2145
2146 /* mask by Victor Yu. 09-02-2002
2147 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2148 */
8ea2c2ec 2149 /* following add by Victor Yu. 09-02-2002 */
1da177e4 2150 *status = inb(info->base + UART_LSR);
8ea2c2ec 2151 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2152 } while (*status & UART_LSR_DR);
2153
8ea2c2ec 2154end_intr: /* add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2155 mxvar_log.rxcnt[info->port] += cnt;
2156 info->mon_data.rxcnt += cnt;
2157 info->mon_data.up_rxcnt += cnt;
2158 spin_unlock_irqrestore(&info->slock, flags);
3399ba5b 2159
1da177e4
LT		 2160 tty_flip_buffer_push(tty);
2161}
2162
2163static void mxser_transmit_chars(struct mxser_struct *info)
2164{
2165 int count, cnt;
2166 unsigned long flags;
2167
2168 spin_lock_irqsave(&info->slock, flags);
2169
2170 if (info->x_char) {
2171 outb(info->x_char, info->base + UART_TX);
2172 info->x_char = 0;
2173 mxvar_log.txcnt[info->port]++;
2174 info->mon_data.txcnt++;
2175 info->mon_data.up_txcnt++;
2176
2177/* added by casper 1/11/2000 */
2178 info->icount.tx++;
2179/* */
2180 spin_unlock_irqrestore(&info->slock, flags);
2181 return;
2182 }
2183
2184 if (info->xmit_buf == 0) {
2185 spin_unlock_irqrestore(&info->slock, flags);
2186 return;
2187 }
2188
8ea2c2ec
JJ		 2189 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2190 (info->tty->hw_stopped &&
2191 (info->type != PORT_16550A) &&
2192 (!info->IsMoxaMustChipFlag))) {
1da177e4
LT		 2193 info->IER &= ~UART_IER_THRI;
2194 outb(info->IER, info->base + UART_IER);
2195 spin_unlock_irqrestore(&info->slock, flags);
2196 return;
2197 }
2198
2199 cnt = info->xmit_cnt;
2200 count = info->xmit_fifo_size;
2201 do {
8ea2c2ec
JJ		 2202 outb(info->xmit_buf[info->xmit_tail++],
2203 info->base + UART_TX);
1da177e4
LT		 2204 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2205 if (--info->xmit_cnt <= 0)
2206 break;
2207 } while (--count > 0);
2208 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2209
8ea2c2ec 2210/* added by James 03-12-2004. */
1da177e4
LT		 2211 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2212 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
8ea2c2ec 2213/* (above) added by James. */
1da177e4
LT		 2214
2215/* added by casper 1/11/2000 */
2216 info->icount.tx += (cnt - info->xmit_cnt);
2217/* */
2218
2219 if (info->xmit_cnt < WAKEUP_CHARS) {
2220 set_bit(MXSER_EVENT_TXLOW, &info->event);
2221 schedule_work(&info->tqueue);
2222 }
2223 if (info->xmit_cnt <= 0) {
2224 info->IER &= ~UART_IER_THRI;
2225 outb(info->IER, info->base + UART_IER);
2226 }
2227 spin_unlock_irqrestore(&info->slock, flags);
2228}
2229
2230static void mxser_check_modem_status(struct mxser_struct *info, int status)
2231{
2232 /* update input line counters */
2233 if (status & UART_MSR_TERI)
2234 info->icount.rng++;
2235 if (status & UART_MSR_DDSR)
2236 info->icount.dsr++;
2237 if (status & UART_MSR_DDCD)
2238 info->icount.dcd++;
2239 if (status & UART_MSR_DCTS)
2240 info->icount.cts++;
2241 info->mon_data.modem_status = status;
2242 wake_up_interruptible(&info->delta_msr_wait);
2243
1da177e4
LT		 2244 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2245 if (status & UART_MSR_DCD)
2246 wake_up_interruptible(&info->open_wait);
2247 schedule_work(&info->tqueue);
2248 }
2249
2250 if (info->flags & ASYNC_CTS_FLOW) {
2251 if (info->tty->hw_stopped) {
2252 if (status & UART_MSR_CTS) {
2253 info->tty->hw_stopped = 0;
2254
8ea2c2ec
JJ		 2255 if ((info->type != PORT_16550A) &&
2256 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2257 info->IER |= UART_IER_THRI;
2258 outb(info->IER, info->base + UART_IER);
2259 }
2260 set_bit(MXSER_EVENT_TXLOW, &info->event);
2261 schedule_work(&info->tqueue); }
2262 } else {
2263 if (!(status & UART_MSR_CTS)) {
2264 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2265 if ((info->type != PORT_16550A) &&
2266 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2267 info->IER &= ~UART_IER_THRI;
2268 outb(info->IER, info->base + UART_IER);
2269 }
2270 }
2271 }
2272 }
2273}
2274
2275static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2276{
2277 DECLARE_WAITQUEUE(wait, current);
2278 int retval;
2279 int do_clocal = 0;
2280 unsigned long flags;
2281
2282 /*
2283 * If non-blocking mode is set, or the port is not enabled,
2284 * then make the check up front and then exit.
2285 */
2286 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2287 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2288 return 0;
1da177e4
LT		 2289 }
2290
2291 if (tty->termios->c_cflag & CLOCAL)
2292 do_clocal = 1;
2293
2294 /*
2295 * Block waiting for the carrier detect and the line to become
2296 * free (i.e., not in use by the callout). While we are in
2297 * this loop, info->count is dropped by one, so that
2298 * mxser_close() knows when to free things. We restore it upon
2299 * exit, either normal or abnormal.
2300 */
2301 retval = 0;
2302 add_wait_queue(&info->open_wait, &wait);
2303
2304 spin_lock_irqsave(&info->slock, flags);
2305 if (!tty_hung_up_p(filp))
2306 info->count--;
2307 spin_unlock_irqrestore(&info->slock, flags);
2308 info->blocked_open++;
2309 while (1) {
2310 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2311 outb(inb(info->base + UART_MCR) |
2312 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
1da177e4
LT		 2313 spin_unlock_irqrestore(&info->slock, flags);
2314 set_current_state(TASK_INTERRUPTIBLE);
2315 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2316 if (info->flags & ASYNC_HUP_NOTIFY)
2317 retval = -EAGAIN;
2318 else
2319 retval = -ERESTARTSYS;
2320 break;
2321 }
8ea2c2ec
JJ		 2322 if (!(info->flags & ASYNC_CLOSING) &&
2323 (do_clocal ||
2324 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
1da177e4
LT		 2325 break;
2326 if (signal_pending(current)) {
2327 retval = -ERESTARTSYS;
2328 break;
2329 }
2330 schedule();
2331 }
2332 set_current_state(TASK_RUNNING);
2333 remove_wait_queue(&info->open_wait, &wait);
2334 if (!tty_hung_up_p(filp))
2335 info->count++;
2336 info->blocked_open--;
2337 if (retval)
8ea2c2ec 2338 return retval;
1da177e4 2339 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2340 return 0;
1da177e4
LT		 2341}
2342
2343static int mxser_startup(struct mxser_struct *info)
2344{
1da177e4
LT		 2345 unsigned long page;
2346 unsigned long flags;
2347
2348 page = __get_free_page(GFP_KERNEL);
2349 if (!page)
8ea2c2ec 2350 return -ENOMEM;
1da177e4
LT		 2351
2352 spin_lock_irqsave(&info->slock, flags);
2353
2354 if (info->flags & ASYNC_INITIALIZED) {
2355 free_page(page);
2356 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2357 return 0;
1da177e4
LT		 2358 }
2359
2360 if (!info->base || !info->type) {
2361 if (info->tty)
2362 set_bit(TTY_IO_ERROR, &info->tty->flags);
2363 free_page(page);
2364 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2365 return 0;
1da177e4
LT		 2366 }
2367 if (info->xmit_buf)
2368 free_page(page);
2369 else
2370 info->xmit_buf = (unsigned char *) page;
2371
2372 /*
2373 * Clear the FIFO buffers and disable them
2374 * (they will be reenabled in mxser_change_speed())
2375 */
2376 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2377 outb((UART_FCR_CLEAR_RCVR |
2378 UART_FCR_CLEAR_XMIT |
2379 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2380 else
8ea2c2ec
JJ		 2381 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2382 info->base + UART_FCR);
1da177e4
LT		 2383
2384 /*
2385 * At this point there's no way the LSR could still be 0xFF;
2386 * if it is, then bail out, because there's likely no UART
2387 * here.
2388 */
2389 if (inb(info->base + UART_LSR) == 0xff) {
2390 spin_unlock_irqrestore(&info->slock, flags);
2391 if (capable(CAP_SYS_ADMIN)) {
2392 if (info->tty)
2393 set_bit(TTY_IO_ERROR, &info->tty->flags);
8ea2c2ec 2394 return 0;
1da177e4 2395 } else
8ea2c2ec 2396 return -ENODEV;
1da177e4
LT		 2397 }
2398
2399 /*
2400 * Clear the interrupt registers.
2401 */
2402 (void) inb(info->base + UART_LSR);
2403 (void) inb(info->base + UART_RX);
2404 (void) inb(info->base + UART_IIR);
2405 (void) inb(info->base + UART_MSR);
2406
2407 /*
2408 * Now, initialize the UART
2409 */
2410 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2411 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2412 outb(info->MCR, info->base + UART_MCR);
2413
2414 /*
2415 * Finally, enable interrupts
2416 */
2417 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
8ea2c2ec 2418 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
1da177e4 2419
8ea2c2ec 2420 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2421 if (info->IsMoxaMustChipFlag)
2422 info->IER |= MOXA_MUST_IER_EGDAI;
8ea2c2ec 2423 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2424 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2425
2426 /*
2427 * And clear the interrupt registers again for luck.
2428 */
2429 (void) inb(info->base + UART_LSR);
2430 (void) inb(info->base + UART_RX);
2431 (void) inb(info->base + UART_IIR);
2432 (void) inb(info->base + UART_MSR);
2433
2434 if (info->tty)
2435 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2436 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2437
2438 /*
2439 * and set the speed of the serial port
2440 */
2441 spin_unlock_irqrestore(&info->slock, flags);
2442 mxser_change_speed(info, NULL);
2443
2444 info->flags |= ASYNC_INITIALIZED;
8ea2c2ec 2445 return 0;
1da177e4
LT		 2446}
2447
2448/*
2449 * This routine will shutdown a serial port; interrupts maybe disabled, and
2450 * DTR is dropped if the hangup on close termio flag is on.
2451 */
2452static void mxser_shutdown(struct mxser_struct *info)
2453{
2454 unsigned long flags;
2455
2456 if (!(info->flags & ASYNC_INITIALIZED))
2457 return;
2458
2459 spin_lock_irqsave(&info->slock, flags);
2460
2461 /*
2462 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2463 * here so the queue might never be waken up
2464 */
2465 wake_up_interruptible(&info->delta_msr_wait);
2466
2467 /*
2468 * Free the IRQ, if necessary
2469 */
2470 if (info->xmit_buf) {
2471 free_page((unsigned long) info->xmit_buf);
2472 info->xmit_buf = NULL;
2473 }
2474
2475 info->IER = 0;
2476 outb(0x00, info->base + UART_IER);
2477
2478 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2479 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2480 outb(info->MCR, info->base + UART_MCR);
2481
2482 /* clear Rx/Tx FIFO's */
8ea2c2ec 2483 /* following add by Victor Yu. 08-30-2002 */
1da177e4 2484 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2485 outb((UART_FCR_CLEAR_RCVR |
2486 UART_FCR_CLEAR_XMIT |
2487 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2488 else
8ea2c2ec
JJ		 2489 /* above add by Victor Yu. 08-30-2002 */
2490 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2491 info->base + UART_FCR);
1da177e4
LT		 2492
2493 /* read data port to reset things */
2494 (void) inb(info->base + UART_RX);
2495
2496 if (info->tty)
2497 set_bit(TTY_IO_ERROR, &info->tty->flags);
2498
2499 info->flags &= ~ASYNC_INITIALIZED;
2500
8ea2c2ec
JJ		 2501 /* following add by Victor Yu. 09-23-2002 */
2502 if (info->IsMoxaMustChipFlag)
1da177e4 2503 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
8ea2c2ec 2504 /* above add by Victor Yu. 09-23-2002 */
1da177e4
LT		 2505
2506 spin_unlock_irqrestore(&info->slock, flags);
2507}
2508
2509/*
2510 * This routine is called to set the UART divisor registers to match
2511 * the specified baud rate for a serial port.
2512 */
606d099c 2513static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
1da177e4
LT		 2514{
2515 unsigned cflag, cval, fcr;
2516 int ret = 0;
2517 unsigned char status;
2518 long baud;
2519 unsigned long flags;
2520
1da177e4
LT		 2521 if (!info->tty || !info->tty->termios)
2522 return ret;
2523 cflag = info->tty->termios->c_cflag;
2524 if (!(info->base))
2525 return ret;
2526
1da177e4
LT		 2527#ifndef B921600
2528#define B921600 (B460800 +1)
2529#endif
2530 if (mxser_set_baud_method[info->port] == 0) {
c7bce309 2531 baud = tty_get_baud_rate(info->tty);
1da177e4
LT		 2532 mxser_set_baud(info, baud);
2533 }
2534
2535 /* byte size and parity */
2536 switch (cflag & CSIZE) {
2537 case CS5:
2538 cval = 0x00;
2539 break;
2540 case CS6:
2541 cval = 0x01;
2542 break;
2543 case CS7:
2544 cval = 0x02;
2545 break;
2546 case CS8:
2547 cval = 0x03;
2548 break;
2549 default:
2550 cval = 0x00;
2551 break; /* too keep GCC shut... */
2552 }
2553 if (cflag & CSTOPB)
2554 cval |= 0x04;
2555 if (cflag & PARENB)
2556 cval |= UART_LCR_PARITY;
8ea2c2ec 2557 if (!(cflag & PARODD))
1da177e4 2558 cval |= UART_LCR_EPAR;
1da177e4
LT		 2559 if (cflag & CMSPAR)
2560 cval |= UART_LCR_SPAR;
2561
2562 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2563 if (info->IsMoxaMustChipFlag) {
2564 fcr = UART_FCR_ENABLE_FIFO;
2565 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2566 SET_MOXA_MUST_FIFO_VALUE(info);
2567 } else
2568 fcr = 0;
2569 } else {
2570 fcr = UART_FCR_ENABLE_FIFO;
8ea2c2ec 2571 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2572 if (info->IsMoxaMustChipFlag) {
2573 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2574 SET_MOXA_MUST_FIFO_VALUE(info);
2575 } else {
8ea2c2ec 2576 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2577 switch (info->rx_trigger) {
2578 case 1:
2579 fcr |= UART_FCR_TRIGGER_1;
2580 break;
2581 case 4:
2582 fcr |= UART_FCR_TRIGGER_4;
2583 break;
2584 case 8:
2585 fcr |= UART_FCR_TRIGGER_8;
2586 break;
2587 default:
2588 fcr |= UART_FCR_TRIGGER_14;
2589 break;
2590 }
2591 }
2592 }
2593
2594 /* CTS flow control flag and modem status interrupts */
2595 info->IER &= ~UART_IER_MSI;
2596 info->MCR &= ~UART_MCR_AFE;
2597 if (cflag & CRTSCTS) {
2598 info->flags |= ASYNC_CTS_FLOW;
2599 info->IER |= UART_IER_MSI;
2600 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2601 info->MCR |= UART_MCR_AFE;
8ea2c2ec
JJ		 2602 /* status = mxser_get_msr(info->base, 0, info->port); */
2603/*
2604 save_flags(flags);
1da177e4
LT		 2605 cli();
2606 status = inb(baseaddr + UART_MSR);
8ea2c2ec
JJ		 2607 restore_flags(flags);
2608*/
2609 /* mxser_check_modem_status(info, status); */
1da177e4 2610 } else {
8ea2c2ec
JJ		 2611 /* status = mxser_get_msr(info->base, 0, info->port); */
2612 /* MX_LOCK(&info->slock); */
1da177e4 2613 status = inb(info->base + UART_MSR);
8ea2c2ec 2614 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 2615 if (info->tty->hw_stopped) {
2616 if (status & UART_MSR_CTS) {
2617 info->tty->hw_stopped = 0;
8ea2c2ec
JJ		 2618 if ((info->type != PORT_16550A) &&
2619 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2620 info->IER |= UART_IER_THRI;
2621 outb(info->IER, info->base + UART_IER);
2622 }
2623 set_bit(MXSER_EVENT_TXLOW, &info->event);
2624 schedule_work(&info->tqueue); }
2625 } else {
2626 if (!(status & UART_MSR_CTS)) {
2627 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2628 if ((info->type != PORT_16550A) &&
2629 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2630 info->IER &= ~UART_IER_THRI;
2631 outb(info->IER, info->base + UART_IER);
2632 }
2633 }
2634 }
2635 }
2636 } else {
2637 info->flags &= ~ASYNC_CTS_FLOW;
2638 }
2639 outb(info->MCR, info->base + UART_MCR);
2640 if (cflag & CLOCAL) {
2641 info->flags &= ~ASYNC_CHECK_CD;
2642 } else {
2643 info->flags |= ASYNC_CHECK_CD;
2644 info->IER |= UART_IER_MSI;
2645 }
2646 outb(info->IER, info->base + UART_IER);
2647
2648 /*
2649 * Set up parity check flag
2650 */
2651 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2652 if (I_INPCK(info->tty))
2653 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2654 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2655 info->read_status_mask |= UART_LSR_BI;
2656
2657 info->ignore_status_mask = 0;
2658
2659 if (I_IGNBRK(info->tty)) {
2660 info->ignore_status_mask |= UART_LSR_BI;
2661 info->read_status_mask |= UART_LSR_BI;
2662 /*
2663 * If we're ignore parity and break indicators, ignore
2664 * overruns too. (For real raw support).
2665 */
2666 if (I_IGNPAR(info->tty)) {
8ea2c2ec
JJ		 2667 info->ignore_status_mask |=
2668 UART_LSR_OE |
2669 UART_LSR_PE |
2670 UART_LSR_FE;
2671 info->read_status_mask |=
2672 UART_LSR_OE |
2673 UART_LSR_PE |
2674 UART_LSR_FE;
1da177e4
LT		 2675 }
2676 }
8ea2c2ec 2677 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2678 if (info->IsMoxaMustChipFlag) {
2679 spin_lock_irqsave(&info->slock, flags);
2680 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2681 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2682 if (I_IXON(info->tty)) {
2683 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2684 } else {
2685 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2686 }
2687 if (I_IXOFF(info->tty)) {
2688 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2689 } else {
2690 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2691 }
2692 /*
2693 if ( I_IXANY(info->tty) ) {
2694 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2695 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2696 } else {
2697 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2698 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2699 }
2700 */
2701 spin_unlock_irqrestore(&info->slock, flags);
2702 }
8ea2c2ec 2703 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2704
2705
2706 outb(fcr, info->base + UART_FCR); /* set fcr */
2707 outb(cval, info->base + UART_LCR);
2708
2709 return ret;
2710}
2711
2712
2713static int mxser_set_baud(struct mxser_struct *info, long newspd)
2714{
2715 int quot = 0;
2716 unsigned char cval;
2717 int ret = 0;
2718 unsigned long flags;
2719
2720 if (!info->tty || !info->tty->termios)
2721 return ret;
2722
2723 if (!(info->base))
2724 return ret;
2725
2726 if (newspd > info->MaxCanSetBaudRate)
2727 return 0;
2728
2729 info->realbaud = newspd;
2730 if (newspd == 134) {
2731 quot = (2 * info->baud_base / 269);
2732 } else if (newspd) {
2733 quot = info->baud_base / newspd;
1da177e4
LT		 2734 if (quot == 0)
2735 quot = 1;
1da177e4
LT		 2736 } else {
2737 quot = 0;
2738 }
2739
2740 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2741 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2742
2743 if (quot) {
2744 spin_lock_irqsave(&info->slock, flags);
2745 info->MCR |= UART_MCR_DTR;
2746 outb(info->MCR, info->base + UART_MCR);
2747 spin_unlock_irqrestore(&info->slock, flags);
2748 } else {
2749 spin_lock_irqsave(&info->slock, flags);
2750 info->MCR &= ~UART_MCR_DTR;
2751 outb(info->MCR, info->base + UART_MCR);
2752 spin_unlock_irqrestore(&info->slock, flags);
2753 return ret;
2754 }
2755
2756 cval = inb(info->base + UART_LCR);
2757
2758 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2759
2760 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2761 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2762 outb(cval, info->base + UART_LCR); /* reset DLAB */
2763
2764
2765 return ret;
2766}
2767
1da177e4
LT		 2768/*
2769 * ------------------------------------------------------------
2770 * friends of mxser_ioctl()
2771 * ------------------------------------------------------------
2772 */
2773static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2774{
2775 struct serial_struct tmp;
2776
2777 if (!retinfo)
8ea2c2ec 2778 return -EFAULT;
1da177e4
LT		 2779 memset(&tmp, 0, sizeof(tmp));
2780 tmp.type = info->type;
2781 tmp.line = info->port;
2782 tmp.port = info->base;
2783 tmp.irq = info->irq;
2784 tmp.flags = info->flags;
2785 tmp.baud_base = info->baud_base;
2786 tmp.close_delay = info->close_delay;
2787 tmp.closing_wait = info->closing_wait;
2788 tmp.custom_divisor = info->custom_divisor;
2789 tmp.hub6 = 0;
2790 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2791 return -EFAULT;
8ea2c2ec 2792 return 0;
1da177e4
LT		 2793}
2794
2795static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2796{
2797 struct serial_struct new_serial;
2798 unsigned int flags;
2799 int retval = 0;
2800
2801 if (!new_info || !info->base)
8ea2c2ec 2802 return -EFAULT;
1da177e4
LT		 2803 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2804 return -EFAULT;
2805
8ea2c2ec
JJ		 2806 if ((new_serial.irq != info->irq) ||
2807 (new_serial.port != info->base) ||
2808 (new_serial.custom_divisor != info->custom_divisor) ||
2809 (new_serial.baud_base != info->baud_base))
2810 return -EPERM;
1da177e4
LT		 2811
2812 flags = info->flags & ASYNC_SPD_MASK;
2813
2814 if (!capable(CAP_SYS_ADMIN)) {
8ea2c2ec
JJ		 2815 if ((new_serial.baud_base != info->baud_base) ||
2816 (new_serial.close_delay != info->close_delay) ||
2817 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2818 return -EPERM;
2819 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2820 (new_serial.flags & ASYNC_USR_MASK));
1da177e4
LT		 2821 } else {
2822 /*
2823 * OK, past this point, all the error checking has been done.
2824 * At this point, we start making changes.....
2825 */
8ea2c2ec
JJ		 2826 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2827 (new_serial.flags & ASYNC_FLAGS));
1da177e4
LT		 2828 info->close_delay = new_serial.close_delay * HZ / 100;
2829 info->closing_wait = new_serial.closing_wait * HZ / 100;
8ea2c2ec
JJ		 2830 info->tty->low_latency =
2831 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2832 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1da177e4
LT		 2833 }
2834
2835 /* added by casper, 3/17/2000, for mouse */
2836 info->type = new_serial.type;
2837
2838 process_txrx_fifo(info);
2839
1da177e4
LT		 2840 if (info->flags & ASYNC_INITIALIZED) {
2841 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2842 mxser_change_speed(info, NULL);
2843 }
2844 } else {
2845 retval = mxser_startup(info);
2846 }
8ea2c2ec 2847 return retval;
1da177e4
LT		 2848}
2849
2850/*
2851 * mxser_get_lsr_info - get line status register info
2852 *
2853 * Purpose: Let user call ioctl() to get info when the UART physically
2854 * is emptied. On bus types like RS485, the transmitter must
2855 * release the bus after transmitting. This must be done when
2856 * the transmit shift register is empty, not be done when the
2857 * transmit holding register is empty. This functionality
2858 * allows an RS485 driver to be written in user space.
2859 */
2860static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2861{
2862 unsigned char status;
2863 unsigned int result;
2864 unsigned long flags;
2865
2866 spin_lock_irqsave(&info->slock, flags);
2867 status = inb(info->base + UART_LSR);
2868 spin_unlock_irqrestore(&info->slock, flags);
2869 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2870 return put_user(result, value);
2871}
2872
2873/*
2874 * This routine sends a break character out the serial port.
2875 */
2876static void mxser_send_break(struct mxser_struct *info, int duration)
2877{
2878 unsigned long flags;
2879
2880 if (!info->base)
2881 return;
2882 set_current_state(TASK_INTERRUPTIBLE);
2883 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2884 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2885 info->base + UART_LCR);
1da177e4
LT		 2886 spin_unlock_irqrestore(&info->slock, flags);
2887 schedule_timeout(duration);
2888 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2889 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2890 info->base + UART_LCR);
1da177e4
LT		 2891 spin_unlock_irqrestore(&info->slock, flags);
2892}
2893
2894static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2895{
56e139f6 2896 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2897 unsigned char control, status;
2898 unsigned long flags;
2899
2900
2901 if (tty->index == MXSER_PORTS)
8ea2c2ec 2902 return -ENOIOCTLCMD;
1da177e4 2903 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 2904 return -EIO;
1da177e4
LT		 2905
2906 control = info->MCR;
2907
2908 spin_lock_irqsave(&info->slock, flags);
2909 status = inb(info->base + UART_MSR);
2910 if (status & UART_MSR_ANY_DELTA)
2911 mxser_check_modem_status(info, status);
2912 spin_unlock_irqrestore(&info->slock, flags);
2913 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
8ea2c2ec
JJ		 2914 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
2915 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
2916 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
2917 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
2918 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1da177e4
LT		 2919}
2920
2921static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2922{
56e139f6 2923 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2924 unsigned long flags;
2925
2926
2927 if (tty->index == MXSER_PORTS)
2928 return -ENOIOCTLCMD;
2929 if (tty->flags & (1 << TTY_IO_ERROR))
2930 return -EIO;
2931
2932 spin_lock_irqsave(&info->slock, flags);
2933
2934 if (set & TIOCM_RTS)
2935 info->MCR |= UART_MCR_RTS;
2936 if (set & TIOCM_DTR)
2937 info->MCR |= UART_MCR_DTR;
2938
2939 if (clear & TIOCM_RTS)
2940 info->MCR &= ~UART_MCR_RTS;
2941 if (clear & TIOCM_DTR)
2942 info->MCR &= ~UART_MCR_DTR;
2943
2944 outb(info->MCR, info->base + UART_MCR);
2945 spin_unlock_irqrestore(&info->slock, flags);
2946 return 0;
2947}
2948
2949
2950static int mxser_read_register(int, unsigned short *);
2951static int mxser_program_mode(int);
2952static void mxser_normal_mode(int);
2953
2954static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2955{
2956 int id, i, bits;
2957 unsigned short regs[16], irq;
2958 unsigned char scratch, scratch2;
2959
2960 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2961
2962 id = mxser_read_register(cap, regs);
2963 if (id == C168_ASIC_ID) {
2964 hwconf->board_type = MXSER_BOARD_C168_ISA;
2965 hwconf->ports = 8;
2966 } else if (id == C104_ASIC_ID) {
2967 hwconf->board_type = MXSER_BOARD_C104_ISA;
2968 hwconf->ports = 4;
2969 } else if (id == C102_ASIC_ID) {
2970 hwconf->board_type = MXSER_BOARD_C102_ISA;
2971 hwconf->ports = 2;
2972 } else if (id == CI132_ASIC_ID) {
2973 hwconf->board_type = MXSER_BOARD_CI132;
2974 hwconf->ports = 2;
2975 } else if (id == CI134_ASIC_ID) {
2976 hwconf->board_type = MXSER_BOARD_CI134;
2977 hwconf->ports = 4;
2978 } else if (id == CI104J_ASIC_ID) {
2979 hwconf->board_type = MXSER_BOARD_CI104J;
2980 hwconf->ports = 4;
2981 } else
8ea2c2ec 2982 return 0;
1da177e4
LT		 2983
2984 irq = 0;
2985 if (hwconf->ports == 2) {
2986 irq = regs[9] & 0xF000;
2987 irq = irq | (irq >> 4);
2988 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 2989 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 2990 } else if (hwconf->ports == 4) {
2991 irq = regs[9] & 0xF000;
2992 irq = irq | (irq >> 4);
2993 irq = irq | (irq >> 8);
2994 if (irq != regs[9])
8ea2c2ec 2995 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 2996 } else if (hwconf->ports == 8) {
2997 irq = regs[9] & 0xF000;
2998 irq = irq | (irq >> 4);
2999 irq = irq | (irq >> 8);
3000 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 3001 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3002 }
3003
8ea2c2ec
JJ		 3004 if (!irq)
3005 return MXSER_ERR_IRQ;
3006 hwconf->irq = ((int)(irq & 0xF000) >> 12);
1da177e4
LT		 3007 for (i = 0; i < 8; i++)
3008 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 3009 if ((regs[12] & 0x80) == 0)
3010 return MXSER_ERR_VECTOR;
3011 hwconf->vector = (int)regs[11]; /* interrupt vector */
1da177e4
LT		 3012 if (id == 1)
3013 hwconf->vector_mask = 0x00FF;
3014 else
3015 hwconf->vector_mask = 0x000F;
3016 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3017 if (regs[12] & bits) {
3018 hwconf->baud_base[i] = 921600;
8ea2c2ec 3019 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3020 } else {
3021 hwconf->baud_base[i] = 115200;
8ea2c2ec 3022 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3023 }
3024 }
3025 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3026 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3027 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3028 outb(scratch2, cap + UART_LCR);
3029 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3030 scratch = inb(cap + UART_IIR);
3031
3032 if (scratch & 0xC0)
3033 hwconf->uart_type = PORT_16550A;
3034 else
3035 hwconf->uart_type = PORT_16450;
3036 if (id == 1)
3037 hwconf->ports = 8;
3038 else
3039 hwconf->ports = 4;
3040 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3041 request_region(hwconf->vector, 1, "mxser(vector)");
8ea2c2ec 3042 return hwconf->ports;
1da177e4
LT		 3043}
3044
3045#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3046#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3047#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3048#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3049#define EN_CCMD 0x000 /* Chip's command register */
3050#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3051#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3052#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3053#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3054#define EN0_DCFG 0x00E /* Data configuration reg WR */
3055#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3056#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3057#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3058static int mxser_read_register(int port, unsigned short *regs)
3059{
3060 int i, k, value, id;
3061 unsigned int j;
3062
3063 id = mxser_program_mode(port);
3064 if (id < 0)
8ea2c2ec 3065 return id;
1da177e4
LT		 3066 for (i = 0; i < 14; i++) {
3067 k = (i & 0x3F) | 0x180;
3068 for (j = 0x100; j > 0; j >>= 1) {
3069 outb(CHIP_CS, port);
3070 if (k & j) {
3071 outb(CHIP_CS | CHIP_DO, port);
3072 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3073 } else {
3074 outb(CHIP_CS, port);
3075 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3076 }
3077 }
8ea2c2ec 3078 (void)inb(port);
1da177e4
LT		 3079 value = 0;
3080 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3081 outb(CHIP_CS, port);
3082 outb(CHIP_CS | CHIP_SK, port);
3083 if (inb(port) & CHIP_DI)
3084 value |= j;
3085 }
3086 regs[i] = value;
3087 outb(0, port);
3088 }
3089 mxser_normal_mode(port);
8ea2c2ec 3090 return id;
1da177e4
LT		 3091}
3092
3093static int mxser_program_mode(int port)
3094{
3095 int id, i, j, n;
8ea2c2ec 3096 /* unsigned long flags; */
1da177e4
LT		 3097
3098 spin_lock(&gm_lock);
3099 outb(0, port);
3100 outb(0, port);
3101 outb(0, port);
8ea2c2ec
JJ		 3102 (void)inb(port);
3103 (void)inb(port);
1da177e4 3104 outb(0, port);
8ea2c2ec
JJ		 3105 (void)inb(port);
3106 /* restore_flags(flags); */
1da177e4
LT		 3107 spin_unlock(&gm_lock);
3108
3109 id = inb(port + 1) & 0x1F;
8ea2c2ec
JJ		 3110 if ((id != C168_ASIC_ID) &&
3111 (id != C104_ASIC_ID) &&
3112 (id != C102_ASIC_ID) &&
3113 (id != CI132_ASIC_ID) &&
3114 (id != CI134_ASIC_ID) &&
3115 (id != CI104J_ASIC_ID))
3116 return -1;
1da177e4
LT		 3117 for (i = 0, j = 0; i < 4; i++) {
3118 n = inb(port + 2);
3119 if (n == 'M') {
3120 j = 1;
3121 } else if ((j == 1) && (n == 1)) {
3122 j = 2;
3123 break;
3124 } else
3125 j = 0;
3126 }
3127 if (j != 2)
3128 id = -2;
8ea2c2ec 3129 return id;
1da177e4
LT		 3130}
3131
3132static void mxser_normal_mode(int port)
3133{
3134 int i, n;
3135
3136 outb(0xA5, port + 1);
3137 outb(0x80, port + 3);
3138 outb(12, port + 0); /* 9600 bps */
3139 outb(0, port + 1);
3140 outb(0x03, port + 3); /* 8 data bits */
3141 outb(0x13, port + 4); /* loop back mode */
3142 for (i = 0; i < 16; i++) {
3143 n = inb(port + 5);
3144 if ((n & 0x61) == 0x60)
3145 break;
3146 if ((n & 1) == 1)
8ea2c2ec 3147 (void)inb(port);
1da177e4
LT		 3148 }
3149 outb(0x00, port + 4);
3150}
3151
3152module_init(mxser_module_init);
3153module_exit(mxser_module_exit);
Linux kernel - Deliverables
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