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Merge branch 'for-linus' of git://gitorious.org/linux-omap-dss2/linux
[deliverable/linux.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
8eb04cf3
AC		 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
1da177e4 19 * - Fixed x86_64 cleanness
1da177e4
LT		 20 */
21
1da177e4 22#include <linux/module.h>
1da177e4
LT		 23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/timer.h>
27#include <linux/interrupt.h>
28#include <linux/tty.h>
29#include <linux/tty_flip.h>
30#include <linux/serial.h>
31#include <linux/serial_reg.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
1da177e4
LT		 36#include <linux/ioport.h>
37#include <linux/mm.h>
1da177e4
LT		 38#include <linux/delay.h>
39#include <linux/pci.h>
1977f032 40#include <linux/bitops.h>
5a0e3ad6 41#include <linux/slab.h>
1da177e4
LT		 42
43#include <asm/system.h>
44#include <asm/io.h>
45#include <asm/irq.h>
1da177e4
LT		 46#include <asm/uaccess.h>
47
48#include "mxser.h"
49
502f295f 50#define MXSER_VERSION "2.0.5" /* 1.14 */
1da177e4 51#define MXSERMAJOR 174
1da177e4 52
1da177e4 53#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 54#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 55#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56#define MXSER_ISR_PASS_LIMIT 100
1da177e4 57
1c45607a
JS		 58/*CheckIsMoxaMust return value*/
59#define MOXA_OTHER_UART 0x00
60#define MOXA_MUST_MU150_HWID 0x01
61#define MOXA_MUST_MU860_HWID 0x02
62
1da177e4
LT		 63#define WAKEUP_CHARS 256
64
65#define UART_MCR_AFE 0x20
66#define UART_LSR_SPECIAL 0x1E
67
e129deff 68#define PCI_DEVICE_ID_POS104UL 0x1044
1c45607a 69#define PCI_DEVICE_ID_CB108 0x1080
e129deff 70#define PCI_DEVICE_ID_CP102UF 0x1023
502f295f 71#define PCI_DEVICE_ID_CP112UL 0x1120
1c45607a 72#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 73#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 74#define PCI_DEVICE_ID_CB134I 0x1341
75#define PCI_DEVICE_ID_CP138U 0x1380
1da177e4 76
1da177e4
LT		 77
78#define C168_ASIC_ID 1
79#define C104_ASIC_ID 2
80#define C102_ASIC_ID 0xB
81#define CI132_ASIC_ID 4
82#define CI134_ASIC_ID 3
83#define CI104J_ASIC_ID 5
84
1c45607a
JS		 85#define MXSER_HIGHBAUD 1
86#define MXSER_HAS2 2
1da177e4 87
8ea2c2ec 88/* This is only for PCI */
1c45607a 89static const struct {
1da177e4
LT		 90 int type;
91 int tx_fifo;
92 int rx_fifo;
93 int xmit_fifo_size;
94 int rx_high_water;
95 int rx_trigger;
96 int rx_low_water;
97 long max_baud;
1c45607a 98} Gpci_uart_info[] = {
1da177e4
LT		 99 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
100 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
101 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
102};
1c45607a 103#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 104
1c45607a
JS		 105struct mxser_cardinfo {
106 char *name;
107 unsigned int nports;
108 unsigned int flags;
109};
1da177e4 110
1c45607a
JS		 111static const struct mxser_cardinfo mxser_cards[] = {
112/* 0*/ { "C168 series", 8, },
113 { "C104 series", 4, },
114 { "CI-104J series", 4, },
115 { "C168H/PCI series", 8, },
116 { "C104H/PCI series", 4, },
117/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
118 { "CI-132 series", 4, MXSER_HAS2 },
119 { "CI-134 series", 4, },
120 { "CP-132 series", 2, },
121 { "CP-114 series", 4, },
122/*10*/ { "CT-114 series", 4, },
123 { "CP-102 series", 2, MXSER_HIGHBAUD },
124 { "CP-104U series", 4, },
125 { "CP-168U series", 8, },
126 { "CP-132U series", 2, },
127/*15*/ { "CP-134U series", 4, },
128 { "CP-104JU series", 4, },
129 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
130 { "CP-118U series", 8, },
131 { "CP-102UL series", 2, },
132/*20*/ { "CP-102U series", 2, },
133 { "CP-118EL series", 8, },
134 { "CP-168EL series", 8, },
135 { "CP-104EL series", 4, },
136 { "CB-108 series", 8, },
137/*25*/ { "CB-114 series", 4, },
138 { "CB-134I series", 4, },
139 { "CP-138U series", 8, },
80ff8a80 140 { "POS-104UL series", 4, },
e129deff 141 { "CP-114UL series", 4, },
502f295f
JS		 142/*30*/ { "CP-102UF series", 2, },
143 { "CP-112UL series", 2, },
1c45607a 144};
1da177e4 145
1c45607a
JS		 146/* driver_data correspond to the lines in the structure above
147 see also ISA probe function before you change something */
1da177e4 148static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
e129deff 173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
502f295f 174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
1c45607a 175 { }
1da177e4 176};
1da177e4
LT		 177MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
178
1df00924 179static unsigned long ioaddr[MXSER_BOARDS];
1da177e4 180static int ttymajor = MXSERMAJOR;
1da177e4
LT		 181
182/* Variables for insmod */
183
184MODULE_AUTHOR("Casper Yang");
185MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
1df00924
JS		 186module_param_array(ioaddr, ulong, NULL, 0);
187MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
8d3b33f6 188module_param(ttymajor, int, 0);
1da177e4
LT		 189MODULE_LICENSE("GPL");
190
191struct mxser_log {
192 int tick;
193 unsigned long rxcnt[MXSER_PORTS];
194 unsigned long txcnt[MXSER_PORTS];
195};
196
1da177e4
LT		 197struct mxser_mon {
198 unsigned long rxcnt;
199 unsigned long txcnt;
200 unsigned long up_rxcnt;
201 unsigned long up_txcnt;
202 int modem_status;
203 unsigned char hold_reason;
204};
205
206struct mxser_mon_ext {
207 unsigned long rx_cnt[32];
208 unsigned long tx_cnt[32];
209 unsigned long up_rxcnt[32];
210 unsigned long up_txcnt[32];
211 int modem_status[32];
212
213 long baudrate[32];
214 int databits[32];
215 int stopbits[32];
216 int parity[32];
217 int flowctrl[32];
218 int fifo[32];
219 int iftype[32];
220};
8ea2c2ec 221
1c45607a
JS		 222struct mxser_board;
223
224struct mxser_port {
0ad9e7d1 225 struct tty_port port;
1c45607a 226 struct mxser_board *board;
1c45607a
JS		 227
228 unsigned long ioaddr;
229 unsigned long opmode_ioaddr;
230 int max_baud;
1da177e4 231
1da177e4
LT		 232 int rx_high_water;
233 int rx_trigger; /* Rx fifo trigger level */
234 int rx_low_water;
235 int baud_base; /* max. speed */
1da177e4 236 int type; /* UART type */
1c45607a 237
1da177e4 238 int x_char; /* xon/xoff character */
1da177e4
LT		 239 int IER; /* Interrupt Enable Register */
240 int MCR; /* Modem control register */
1c45607a
JS		 241
242 unsigned char stop_rx;
243 unsigned char ldisc_stop_rx;
244
245 int custom_divisor;
1c45607a 246 unsigned char err_shadow;
1c45607a 247
1c45607a
JS		 248 struct async_icount icount; /* kernel counters for 4 input interrupts */
249 int timeout;
250
251 int read_status_mask;
252 int ignore_status_mask;
253 int xmit_fifo_size;
1da177e4
LT		 254 int xmit_head;
255 int xmit_tail;
256 int xmit_cnt;
1c45607a 257
606d099c 258 struct ktermios normal_termios;
1c45607a 259
1da177e4 260 struct mxser_mon mon_data;
1c45607a 261
1da177e4 262 spinlock_t slock;
1c45607a
JS		 263};
264
265struct mxser_board {
266 unsigned int idx;
267 int irq;
268 const struct mxser_cardinfo *info;
269 unsigned long vector;
270 unsigned long vector_mask;
271
272 int chip_flag;
273 int uart_type;
274
275 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 276};
277
1da177e4
LT		 278struct mxser_mstatus {
279 tcflag_t cflag;
280 int cts;
281 int dsr;
282 int ri;
283 int dcd;
284};
285
1c45607a 286static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 287static struct tty_driver *mxvar_sdriver;
1da177e4 288static struct mxser_log mxvar_log;
1da177e4 289static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 290
148ff86b
CH		 291static void mxser_enable_must_enchance_mode(unsigned long baseio)
292{
293 u8 oldlcr;
294 u8 efr;
295
296 oldlcr = inb(baseio + UART_LCR);
297 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
298
299 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
300 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
301
302 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
303 outb(oldlcr, baseio + UART_LCR);
304}
305
306static void mxser_disable_must_enchance_mode(unsigned long baseio)
307{
308 u8 oldlcr;
309 u8 efr;
310
311 oldlcr = inb(baseio + UART_LCR);
312 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
313
314 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
315 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
316
317 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
318 outb(oldlcr, baseio + UART_LCR);
319}
320
321static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
322{
323 u8 oldlcr;
324 u8 efr;
325
326 oldlcr = inb(baseio + UART_LCR);
327 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
328
329 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
330 efr &= ~MOXA_MUST_EFR_BANK_MASK;
331 efr |= MOXA_MUST_EFR_BANK0;
332
333 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
334 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
335 outb(oldlcr, baseio + UART_LCR);
336}
337
338static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
339{
340 u8 oldlcr;
341 u8 efr;
342
343 oldlcr = inb(baseio + UART_LCR);
344 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
345
346 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
347 efr &= ~MOXA_MUST_EFR_BANK_MASK;
348 efr |= MOXA_MUST_EFR_BANK0;
349
350 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
351 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
352 outb(oldlcr, baseio + UART_LCR);
353}
354
355static void mxser_set_must_fifo_value(struct mxser_port *info)
356{
357 u8 oldlcr;
358 u8 efr;
359
360 oldlcr = inb(info->ioaddr + UART_LCR);
361 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
362
363 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
364 efr &= ~MOXA_MUST_EFR_BANK_MASK;
365 efr |= MOXA_MUST_EFR_BANK1;
366
367 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
368 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
369 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
370 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
371 outb(oldlcr, info->ioaddr + UART_LCR);
372}
373
374static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
375{
376 u8 oldlcr;
377 u8 efr;
378
379 oldlcr = inb(baseio + UART_LCR);
380 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
381
382 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
383 efr &= ~MOXA_MUST_EFR_BANK_MASK;
384 efr |= MOXA_MUST_EFR_BANK2;
385
386 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
387 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
388 outb(oldlcr, baseio + UART_LCR);
389}
390
391static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
392{
393 u8 oldlcr;
394 u8 efr;
395
396 oldlcr = inb(baseio + UART_LCR);
397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
398
399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
400 efr &= ~MOXA_MUST_EFR_BANK_MASK;
401 efr |= MOXA_MUST_EFR_BANK2;
402
403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
405 outb(oldlcr, baseio + UART_LCR);
406}
407
408static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
409{
410 u8 oldlcr;
411 u8 efr;
412
413 oldlcr = inb(baseio + UART_LCR);
414 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
415
416 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
417 efr &= ~MOXA_MUST_EFR_SF_MASK;
418
419 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
420 outb(oldlcr, baseio + UART_LCR);
421}
422
423static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
424{
425 u8 oldlcr;
426 u8 efr;
427
428 oldlcr = inb(baseio + UART_LCR);
429 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
430
431 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
432 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
433 efr |= MOXA_MUST_EFR_SF_TX1;
434
435 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
436 outb(oldlcr, baseio + UART_LCR);
437}
438
439static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
440{
441 u8 oldlcr;
442 u8 efr;
443
444 oldlcr = inb(baseio + UART_LCR);
445 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
446
447 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
448 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
449
450 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
451 outb(oldlcr, baseio + UART_LCR);
452}
453
454static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
455{
456 u8 oldlcr;
457 u8 efr;
458
459 oldlcr = inb(baseio + UART_LCR);
460 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
461
462 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
463 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
464 efr |= MOXA_MUST_EFR_SF_RX1;
465
466 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
467 outb(oldlcr, baseio + UART_LCR);
468}
469
470static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
471{
472 u8 oldlcr;
473 u8 efr;
474
475 oldlcr = inb(baseio + UART_LCR);
476 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
477
478 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
479 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
480
481 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
482 outb(oldlcr, baseio + UART_LCR);
483}
484
b8cc5549 485#ifdef CONFIG_PCI
1c45607a 486static int __devinit CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 487{
488 u8 oldmcr, hwid;
489 int i;
490
491 outb(0, io + UART_LCR);
148ff86b 492 mxser_disable_must_enchance_mode(io);
1da177e4
LT		 493 oldmcr = inb(io + UART_MCR);
494 outb(0, io + UART_MCR);
148ff86b 495 mxser_set_must_xon1_value(io, 0x11);
1da177e4
LT		 496 if ((hwid = inb(io + UART_MCR)) != 0) {
497 outb(oldmcr, io + UART_MCR);
8ea2c2ec 498 return MOXA_OTHER_UART;
1da177e4
LT		 499 }
500
148ff86b 501 mxser_get_must_hardware_id(io, &hwid);
1c45607a
JS		 502 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
503 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 504 return (int)hwid;
1da177e4
LT		 505 }
506 return MOXA_OTHER_UART;
507}
b8cc5549 508#endif
1da177e4 509
1c45607a 510static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 511{
512 int i;
513
514 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
515 info->rx_trigger = 1;
516 info->rx_high_water = 1;
517 info->rx_low_water = 1;
518 info->xmit_fifo_size = 1;
1c45607a
JS		 519 } else
520 for (i = 0; i < UART_INFO_NUM; i++)
521 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 522 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
523 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
524 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
525 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
526 break;
527 }
1da177e4
LT		 528}
529
1c45607a 530static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 531{
72800df9 532 static unsigned char mxser_msr[MXSER_PORTS + 1];
1c45607a 533 unsigned char status = 0;
1da177e4 534
1c45607a 535 status = inb(baseaddr + UART_MSR);
1da177e4 536
1c45607a
JS		 537 mxser_msr[port] &= 0x0F;
538 mxser_msr[port] |= status;
539 status = mxser_msr[port];
540 if (mode)
541 mxser_msr[port] = 0;
1da177e4 542
1c45607a
JS		 543 return status;
544}
1da177e4 545
31f35939
AC		 546static int mxser_carrier_raised(struct tty_port *port)
547{
548 struct mxser_port *mp = container_of(port, struct mxser_port, port);
549 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
550}
551
fcc8ac18 552static void mxser_dtr_rts(struct tty_port *port, int on)
5d951fb4
AC		 553{
554 struct mxser_port *mp = container_of(port, struct mxser_port, port);
555 unsigned long flags;
556
557 spin_lock_irqsave(&mp->slock, flags);
fcc8ac18
AC		 558 if (on)
559 outb(inb(mp->ioaddr + UART_MCR) |
560 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
561 else
562 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
563 mp->ioaddr + UART_MCR);
5d951fb4
AC		 564 spin_unlock_irqrestore(&mp->slock, flags);
565}
566
216ba023 567static int mxser_set_baud(struct tty_struct *tty, long newspd)
1da177e4 568{
216ba023 569 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 570 int quot = 0, baud;
571 unsigned char cval;
1da177e4 572
216ba023 573 if (!info->ioaddr)
1c45607a 574 return -1;
1da177e4 575
1c45607a
JS		 576 if (newspd > info->max_baud)
577 return -1;
1da177e4 578
1c45607a
JS		 579 if (newspd == 134) {
580 quot = 2 * info->baud_base / 269;
216ba023 581 tty_encode_baud_rate(tty, 134, 134);
1c45607a
JS		 582 } else if (newspd) {
583 quot = info->baud_base / newspd;
584 if (quot == 0)
585 quot = 1;
586 baud = info->baud_base/quot;
216ba023 587 tty_encode_baud_rate(tty, baud, baud);
1c45607a
JS		 588 } else {
589 quot = 0;
590 }
1da177e4 591
1c45607a
JS		 592 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
593 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 594
1c45607a
JS		 595 if (quot) {
596 info->MCR |= UART_MCR_DTR;
597 outb(info->MCR, info->ioaddr + UART_MCR);
598 } else {
599 info->MCR &= ~UART_MCR_DTR;
600 outb(info->MCR, info->ioaddr + UART_MCR);
601 return 0;
602 }
1da177e4 603
1c45607a 604 cval = inb(info->ioaddr + UART_LCR);
1da177e4 605
1c45607a 606 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 607
1c45607a
JS		 608 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
609 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
610 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 611
1c45607a 612#ifdef BOTHER
216ba023 613 if (C_BAUD(tty) == BOTHER) {
1c45607a
JS		 614 quot = info->baud_base % newspd;
615 quot *= 8;
616 if (quot % newspd > newspd / 2) {
617 quot /= newspd;
618 quot++;
619 } else
620 quot /= newspd;
621
148ff86b 622 mxser_set_must_enum_value(info->ioaddr, quot);
1c45607a
JS		 623 } else
624#endif
148ff86b 625 mxser_set_must_enum_value(info->ioaddr, 0);
1da177e4 626
8ea2c2ec 627 return 0;
1da177e4 628}
1da177e4 629
1c45607a
JS		 630/*
631 * This routine is called to set the UART divisor registers to match
632 * the specified baud rate for a serial port.
633 */
216ba023
AC		 634static int mxser_change_speed(struct tty_struct *tty,
635 struct ktermios *old_termios)
1da177e4 636{
216ba023 637 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 638 unsigned cflag, cval, fcr;
639 int ret = 0;
640 unsigned char status;
1da177e4 641
216ba023
AC		 642 cflag = tty->termios->c_cflag;
643 if (!info->ioaddr)
1c45607a 644 return ret;
1da177e4 645
216ba023
AC		 646 if (mxser_set_baud_method[tty->index] == 0)
647 mxser_set_baud(tty, tty_get_baud_rate(tty));
1da177e4 648
1c45607a
JS		 649 /* byte size and parity */
650 switch (cflag & CSIZE) {
651 case CS5:
652 cval = 0x00;
653 break;
654 case CS6:
655 cval = 0x01;
656 break;
657 case CS7:
658 cval = 0x02;
659 break;
660 case CS8:
661 cval = 0x03;
662 break;
663 default:
664 cval = 0x00;
665 break; /* too keep GCC shut... */
666 }
667 if (cflag & CSTOPB)
668 cval |= 0x04;
669 if (cflag & PARENB)
670 cval |= UART_LCR_PARITY;
671 if (!(cflag & PARODD))
672 cval |= UART_LCR_EPAR;
673 if (cflag & CMSPAR)
674 cval |= UART_LCR_SPAR;
1da177e4 675
1c45607a
JS		 676 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
677 if (info->board->chip_flag) {
678 fcr = UART_FCR_ENABLE_FIFO;
679 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 680 mxser_set_must_fifo_value(info);
1c45607a
JS		 681 } else
682 fcr = 0;
683 } else {
684 fcr = UART_FCR_ENABLE_FIFO;
685 if (info->board->chip_flag) {
686 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 687 mxser_set_must_fifo_value(info);
1c45607a
JS		 688 } else {
689 switch (info->rx_trigger) {
690 case 1:
691 fcr |= UART_FCR_TRIGGER_1;
692 break;
693 case 4:
694 fcr |= UART_FCR_TRIGGER_4;
695 break;
696 case 8:
697 fcr |= UART_FCR_TRIGGER_8;
698 break;
699 default:
700 fcr |= UART_FCR_TRIGGER_14;
701 break;
702 }
1da177e4 703 }
1da177e4
LT		 704 }
705
1c45607a
JS		 706 /* CTS flow control flag and modem status interrupts */
707 info->IER &= ~UART_IER_MSI;
708 info->MCR &= ~UART_MCR_AFE;
709 if (cflag & CRTSCTS) {
0ad9e7d1 710 info->port.flags |= ASYNC_CTS_FLOW;
1c45607a
JS		 711 info->IER |= UART_IER_MSI;
712 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
713 info->MCR |= UART_MCR_AFE;
714 } else {
715 status = inb(info->ioaddr + UART_MSR);
216ba023 716 if (tty->hw_stopped) {
1c45607a 717 if (status & UART_MSR_CTS) {
216ba023 718 tty->hw_stopped = 0;
1c45607a
JS		 719 if (info->type != PORT_16550A &&
720 !info->board->chip_flag) {
721 outb(info->IER & ~UART_IER_THRI,
722 info->ioaddr +
723 UART_IER);
724 info->IER |= UART_IER_THRI;
725 outb(info->IER, info->ioaddr +
726 UART_IER);
727 }
216ba023 728 tty_wakeup(tty);
1c45607a
JS		 729 }
730 } else {
731 if (!(status & UART_MSR_CTS)) {
216ba023 732 tty->hw_stopped = 1;
1c45607a
JS		 733 if ((info->type != PORT_16550A) &&
734 (!info->board->chip_flag)) {
735 info->IER &= ~UART_IER_THRI;
736 outb(info->IER, info->ioaddr +
737 UART_IER);
738 }
739 }
740 }
1da177e4 741 }
1c45607a 742 } else {
0ad9e7d1 743 info->port.flags &= ~ASYNC_CTS_FLOW;
1c45607a
JS		 744 }
745 outb(info->MCR, info->ioaddr + UART_MCR);
746 if (cflag & CLOCAL) {
0ad9e7d1 747 info->port.flags &= ~ASYNC_CHECK_CD;
1c45607a 748 } else {
0ad9e7d1 749 info->port.flags |= ASYNC_CHECK_CD;
1c45607a
JS		 750 info->IER |= UART_IER_MSI;
751 }
752 outb(info->IER, info->ioaddr + UART_IER);
753
754 /*
755 * Set up parity check flag
756 */
757 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
216ba023 758 if (I_INPCK(tty))
1c45607a 759 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
216ba023 760 if (I_BRKINT(tty) || I_PARMRK(tty))
1c45607a 761 info->read_status_mask |= UART_LSR_BI;
1da177e4 762
1c45607a 763 info->ignore_status_mask = 0;
1da177e4 764
216ba023 765 if (I_IGNBRK(tty)) {
1c45607a
JS		 766 info->ignore_status_mask |= UART_LSR_BI;
767 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 768 /*
1c45607a
JS		 769 * If we're ignore parity and break indicators, ignore
770 * overruns too. (For real raw support).
8ea2c2ec 771 */
216ba023 772 if (I_IGNPAR(tty)) {
1c45607a
JS		 773 info->ignore_status_mask |=
774 UART_LSR_OE |
775 UART_LSR_PE |
776 UART_LSR_FE;
777 info->read_status_mask |=
778 UART_LSR_OE |
779 UART_LSR_PE |
780 UART_LSR_FE;
781 }
1da177e4 782 }
1c45607a 783 if (info->board->chip_flag) {
216ba023
AC		 784 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
785 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
786 if (I_IXON(tty)) {
148ff86b
CH		 787 mxser_enable_must_rx_software_flow_control(
788 info->ioaddr);
1c45607a 789 } else {
148ff86b
CH		 790 mxser_disable_must_rx_software_flow_control(
791 info->ioaddr);
1da177e4 792 }
216ba023 793 if (I_IXOFF(tty)) {
148ff86b
CH		 794 mxser_enable_must_tx_software_flow_control(
795 info->ioaddr);
1c45607a 796 } else {
148ff86b
CH		 797 mxser_disable_must_tx_software_flow_control(
798 info->ioaddr);
1da177e4
LT		 799 }
800 }
1da177e4 801
1da177e4 802
1c45607a
JS		 803 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
804 outb(cval, info->ioaddr + UART_LCR);
1da177e4 805
1c45607a 806 return ret;
1da177e4
LT		 807}
808
216ba023
AC		 809static void mxser_check_modem_status(struct tty_struct *tty,
810 struct mxser_port *port, int status)
1da177e4 811{
1c45607a
JS		 812 /* update input line counters */
813 if (status & UART_MSR_TERI)
814 port->icount.rng++;
815 if (status & UART_MSR_DDSR)
816 port->icount.dsr++;
817 if (status & UART_MSR_DDCD)
818 port->icount.dcd++;
819 if (status & UART_MSR_DCTS)
820 port->icount.cts++;
821 port->mon_data.modem_status = status;
bdc04e31 822 wake_up_interruptible(&port->port.delta_msr_wait);
1da177e4 823
0ad9e7d1 824 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
1c45607a 825 if (status & UART_MSR_DCD)
0ad9e7d1 826 wake_up_interruptible(&port->port.open_wait);
1c45607a 827 }
1da177e4 828
0ad9e7d1 829 if (port->port.flags & ASYNC_CTS_FLOW) {
216ba023 830 if (tty->hw_stopped) {
1c45607a 831 if (status & UART_MSR_CTS) {
216ba023 832 tty->hw_stopped = 0;
1c45607a
JS		 833
834 if ((port->type != PORT_16550A) &&
835 (!port->board->chip_flag)) {
836 outb(port->IER & ~UART_IER_THRI,
837 port->ioaddr + UART_IER);
838 port->IER |= UART_IER_THRI;
839 outb(port->IER, port->ioaddr +
840 UART_IER);
841 }
216ba023 842 tty_wakeup(tty);
1c45607a
JS		 843 }
844 } else {
845 if (!(status & UART_MSR_CTS)) {
216ba023 846 tty->hw_stopped = 1;
1c45607a
JS		 847 if (port->type != PORT_16550A &&
848 !port->board->chip_flag) {
849 port->IER &= ~UART_IER_THRI;
850 outb(port->IER, port->ioaddr +
851 UART_IER);
852 }
853 }
854 }
1da177e4
LT		 855 }
856}
857
6769140d 858static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
1da177e4 859{
6769140d 860 struct mxser_port *info = container_of(port, struct mxser_port, port);
1c45607a
JS		 861 unsigned long page;
862 unsigned long flags;
1da177e4 863
1c45607a
JS		 864 page = __get_free_page(GFP_KERNEL);
865 if (!page)
866 return -ENOMEM;
1da177e4 867
1c45607a 868 spin_lock_irqsave(&info->slock, flags);
1da177e4 869
1c45607a 870 if (!info->ioaddr || !info->type) {
216ba023 871 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 872 free_page(page);
873 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 874 return 0;
1c45607a 875 }
6769140d 876 info->port.xmit_buf = (unsigned char *) page;
1da177e4 877
1da177e4 878 /*
1c45607a
JS		 879 * Clear the FIFO buffers and disable them
880 * (they will be reenabled in mxser_change_speed())
1da177e4 881 */
1c45607a
JS		 882 if (info->board->chip_flag)
883 outb((UART_FCR_CLEAR_RCVR |
884 UART_FCR_CLEAR_XMIT |
885 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
886 else
887 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
888 info->ioaddr + UART_FCR);
1da177e4 889
1c45607a
JS		 890 /*
891 * At this point there's no way the LSR could still be 0xFF;
892 * if it is, then bail out, because there's likely no UART
893 * here.
894 */
895 if (inb(info->ioaddr + UART_LSR) == 0xff) {
896 spin_unlock_irqrestore(&info->slock, flags);
897 if (capable(CAP_SYS_ADMIN)) {
f43a510d 898 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 899 return 0;
900 } else
901 return -ENODEV;
902 }
1da177e4 903
1c45607a
JS		 904 /*
905 * Clear the interrupt registers.
906 */
907 (void) inb(info->ioaddr + UART_LSR);
908 (void) inb(info->ioaddr + UART_RX);
909 (void) inb(info->ioaddr + UART_IIR);
910 (void) inb(info->ioaddr + UART_MSR);
911
912 /*
913 * Now, initialize the UART
914 */
915 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
916 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
917 outb(info->MCR, info->ioaddr + UART_MCR);
918
919 /*
920 * Finally, enable interrupts
921 */
922 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
923
924 if (info->board->chip_flag)
925 info->IER |= MOXA_MUST_IER_EGDAI;
926 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
927
928 /*
929 * And clear the interrupt registers again for luck.
930 */
931 (void) inb(info->ioaddr + UART_LSR);
932 (void) inb(info->ioaddr + UART_RX);
933 (void) inb(info->ioaddr + UART_IIR);
934 (void) inb(info->ioaddr + UART_MSR);
935
216ba023 936 clear_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 937 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
938
939 /*
940 * and set the speed of the serial port
941 */
216ba023 942 mxser_change_speed(tty, NULL);
1c45607a
JS		 943 spin_unlock_irqrestore(&info->slock, flags);
944
945 return 0;
946}
947
948/*
6769140d 949 * This routine will shutdown a serial port
1c45607a 950 */
6769140d 951static void mxser_shutdown_port(struct tty_port *port)
1c45607a 952{
6769140d 953 struct mxser_port *info = container_of(port, struct mxser_port, port);
1c45607a
JS		 954 unsigned long flags;
955
1c45607a
JS		 956 spin_lock_irqsave(&info->slock, flags);
957
958 /*
959 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
960 * here so the queue might never be waken up
961 */
bdc04e31 962 wake_up_interruptible(&info->port.delta_msr_wait);
1c45607a
JS		 963
964 /*
6769140d 965 * Free the xmit buffer, if necessary
1c45607a 966 */
0ad9e7d1
AC		 967 if (info->port.xmit_buf) {
968 free_page((unsigned long) info->port.xmit_buf);
969 info->port.xmit_buf = NULL;
1da177e4
LT		 970 }
971
1c45607a
JS		 972 info->IER = 0;
973 outb(0x00, info->ioaddr + UART_IER);
974
1c45607a
JS		 975 /* clear Rx/Tx FIFO's */
976 if (info->board->chip_flag)
977 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
978 MOXA_MUST_FCR_GDA_MODE_ENABLE,
979 info->ioaddr + UART_FCR);
980 else
981 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
982 info->ioaddr + UART_FCR);
983
984 /* read data port to reset things */
985 (void) inb(info->ioaddr + UART_RX);
986
1c45607a
JS		 987
988 if (info->board->chip_flag)
989 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
990
991 spin_unlock_irqrestore(&info->slock, flags);
992}
993
994/*
995 * This routine is called whenever a serial port is opened. It
996 * enables interrupts for a serial port, linking in its async structure into
997 * the IRQ chain. It also performs the serial-specific
998 * initialization for the tty structure.
999 */
1000static int mxser_open(struct tty_struct *tty, struct file *filp)
1001{
1002 struct mxser_port *info;
6769140d 1003 int line;
1c45607a
JS		 1004
1005 line = tty->index;
1006 if (line == MXSER_PORTS)
1007 return 0;
1008 if (line < 0 || line > MXSER_PORTS)
1009 return -ENODEV;
1010 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1011 if (!info->ioaddr)
1012 return -ENODEV;
1013
a2d1e351 1014 tty->driver_data = info;
6769140d 1015 return tty_port_open(&info->port, tty, filp);
1da177e4
LT		 1016}
1017
978e595f
AC		 1018static void mxser_flush_buffer(struct tty_struct *tty)
1019{
1020 struct mxser_port *info = tty->driver_data;
1021 char fcr;
1022 unsigned long flags;
1023
1024
1025 spin_lock_irqsave(&info->slock, flags);
1026 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1027
1028 fcr = inb(info->ioaddr + UART_FCR);
1029 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1030 info->ioaddr + UART_FCR);
1031 outb(fcr, info->ioaddr + UART_FCR);
1032
1033 spin_unlock_irqrestore(&info->slock, flags);
1034
1035 tty_wakeup(tty);
1036}
1037
1038
6769140d 1039static void mxser_close_port(struct tty_port *port)
1da177e4 1040{
1e2b0254 1041 struct mxser_port *info = container_of(port, struct mxser_port, port);
1da177e4 1042 unsigned long timeout;
1da177e4
LT		 1043 /*
1044 * At this point we stop accepting input. To do this, we
1045 * disable the receive line status interrupts, and tell the
1046 * interrupt driver to stop checking the data ready bit in the
1047 * line status register.
1048 */
1049 info->IER &= ~UART_IER_RLSI;
1c45607a 1050 if (info->board->chip_flag)
1da177e4 1051 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 1052
6769140d
AC		 1053 outb(info->IER, info->ioaddr + UART_IER);
1054 /*
1055 * Before we drop DTR, make sure the UART transmitter
1056 * has completely drained; this is especially
1057 * important if there is a transmit FIFO!
1058 */
1059 timeout = jiffies + HZ;
1060 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1061 schedule_timeout_interruptible(5);
1062 if (time_after(jiffies, timeout))
1063 break;
1da177e4 1064 }
1e2b0254
AC		 1065}
1066
1067/*
1068 * This routine is called when the serial port gets closed. First, we
1069 * wait for the last remaining data to be sent. Then, we unlink its
1070 * async structure from the interrupt chain if necessary, and we free
1071 * that IRQ if nothing is left in the chain.
1072 */
1073static void mxser_close(struct tty_struct *tty, struct file *filp)
1074{
1075 struct mxser_port *info = tty->driver_data;
1076 struct tty_port *port = &info->port;
1077
a2d1e351 1078 if (tty->index == MXSER_PORTS || info == NULL)
1e2b0254
AC		 1079 return;
1080 if (tty_port_close_start(port, tty, filp) == 0)
1081 return;
6769140d
AC		 1082 mutex_lock(&port->mutex);
1083 mxser_close_port(port);
1e2b0254 1084 mxser_flush_buffer(tty);
6769140d
AC		 1085 mxser_shutdown_port(port);
1086 clear_bit(ASYNCB_INITIALIZED, &port->flags);
1087 mutex_unlock(&port->mutex);
a6614999
AC		 1088 /* Right now the tty_port set is done outside of the close_end helper
1089 as we don't yet have everyone using refcounts */
1090 tty_port_close_end(port, tty);
1091 tty_port_tty_set(port, NULL);
1da177e4
LT		 1092}
1093
1094static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1095{
1096 int c, total = 0;
1c45607a 1097 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1098 unsigned long flags;
1099
0ad9e7d1 1100 if (!info->port.xmit_buf)
8ea2c2ec 1101 return 0;
1da177e4
LT		 1102
1103 while (1) {
8ea2c2ec
JJ		 1104 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1105 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1106 if (c <= 0)
1107 break;
1108
0ad9e7d1 1109 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1da177e4 1110 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1111 info->xmit_head = (info->xmit_head + c) &
1112 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1113 info->xmit_cnt += c;
1114 spin_unlock_irqrestore(&info->slock, flags);
1115
1116 buf += c;
1117 count -= c;
1118 total += c;
1da177e4
LT		 1119 }
1120
1c45607a 1121 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1122 if (!tty->hw_stopped ||
1123 (info->type == PORT_16550A) ||
1c45607a 1124 (info->board->chip_flag)) {
1da177e4 1125 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1126 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1127 UART_IER);
1da177e4 1128 info->IER |= UART_IER_THRI;
1c45607a 1129 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1130 spin_unlock_irqrestore(&info->slock, flags);
1131 }
1132 }
1133 return total;
1134}
1135
0be2eade 1136static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1137{
1c45607a 1138 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1139 unsigned long flags;
1140
0ad9e7d1 1141 if (!info->port.xmit_buf)
0be2eade 1142 return 0;
1da177e4
LT		 1143
1144 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
0be2eade 1145 return 0;
1da177e4
LT		 1146
1147 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1148 info->port.xmit_buf[info->xmit_head++] = ch;
1da177e4
LT		 1149 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1150 info->xmit_cnt++;
1151 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1152 if (!tty->stopped) {
8ea2c2ec
JJ		 1153 if (!tty->hw_stopped ||
1154 (info->type == PORT_16550A) ||
1c45607a 1155 info->board->chip_flag) {
1da177e4 1156 spin_lock_irqsave(&info->slock, flags);
1c45607a 1157 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1158 info->IER |= UART_IER_THRI;
1c45607a 1159 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1160 spin_unlock_irqrestore(&info->slock, flags);
1161 }
1162 }
0be2eade 1163 return 1;
1da177e4
LT		 1164}
1165
1166
1167static void mxser_flush_chars(struct tty_struct *tty)
1168{
1c45607a 1169 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1170 unsigned long flags;
1171
ace7dd96
JS		 1172 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1173 (tty->hw_stopped && info->type != PORT_16550A &&
1174 !info->board->chip_flag))
1da177e4
LT		 1175 return;
1176
1177 spin_lock_irqsave(&info->slock, flags);
1178
1c45607a 1179 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1180 info->IER |= UART_IER_THRI;
1c45607a 1181 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1182
1183 spin_unlock_irqrestore(&info->slock, flags);
1184}
1185
1186static int mxser_write_room(struct tty_struct *tty)
1187{
1c45607a 1188 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1189 int ret;
1190
1191 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
ace7dd96 1192 return ret < 0 ? 0 : ret;
1da177e4
LT		 1193}
1194
1195static int mxser_chars_in_buffer(struct tty_struct *tty)
1196{
1c45607a 1197 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1198 return info->xmit_cnt;
1199}
1200
1c45607a
JS		 1201/*
1202 * ------------------------------------------------------------
1203 * friends of mxser_ioctl()
1204 * ------------------------------------------------------------
1205 */
216ba023 1206static int mxser_get_serial_info(struct tty_struct *tty,
1c45607a
JS		 1207 struct serial_struct __user *retinfo)
1208{
216ba023 1209 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1210 struct serial_struct tmp = {
1211 .type = info->type,
216ba023 1212 .line = tty->index,
1c45607a
JS		 1213 .port = info->ioaddr,
1214 .irq = info->board->irq,
0ad9e7d1 1215 .flags = info->port.flags,
1c45607a 1216 .baud_base = info->baud_base,
44b7d1b3
AC		 1217 .close_delay = info->port.close_delay,
1218 .closing_wait = info->port.closing_wait,
1c45607a
JS		 1219 .custom_divisor = info->custom_divisor,
1220 .hub6 = 0
1221 };
1222 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1223 return -EFAULT;
1224 return 0;
1225}
1226
216ba023 1227static int mxser_set_serial_info(struct tty_struct *tty,
1c45607a 1228 struct serial_struct __user *new_info)
1da177e4 1229{
216ba023 1230 struct mxser_port *info = tty->driver_data;
07f86c03 1231 struct tty_port *port = &info->port;
1c45607a 1232 struct serial_struct new_serial;
80ff8a80 1233 speed_t baud;
1c45607a
JS		 1234 unsigned long sl_flags;
1235 unsigned int flags;
1236 int retval = 0;
1da177e4 1237
1c45607a 1238 if (!new_info || !info->ioaddr)
80ff8a80 1239 return -ENODEV;
1c45607a
JS		 1240 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1241 return -EFAULT;
1da177e4 1242
80ff8a80
JS		 1243 if (new_serial.irq != info->board->irq ||
1244 new_serial.port != info->ioaddr)
1245 return -EINVAL;
1da177e4 1246
07f86c03 1247 flags = port->flags & ASYNC_SPD_MASK;
1da177e4 1248
1c45607a
JS		 1249 if (!capable(CAP_SYS_ADMIN)) {
1250 if ((new_serial.baud_base != info->baud_base) ||
44b7d1b3 1251 (new_serial.close_delay != info->port.close_delay) ||
0ad9e7d1 1252 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1c45607a 1253 return -EPERM;
0ad9e7d1 1254 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1c45607a
JS		 1255 (new_serial.flags & ASYNC_USR_MASK));
1256 } else {
1da177e4 1257 /*
1c45607a
JS		 1258 * OK, past this point, all the error checking has been done.
1259 * At this point, we start making changes.....
1da177e4 1260 */
07f86c03 1261 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1c45607a 1262 (new_serial.flags & ASYNC_FLAGS));
07f86c03
AC		 1263 port->close_delay = new_serial.close_delay * HZ / 100;
1264 port->closing_wait = new_serial.closing_wait * HZ / 100;
1265 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
1266 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
80ff8a80
JS		 1267 (new_serial.baud_base != info->baud_base ||
1268 new_serial.custom_divisor !=
1269 info->custom_divisor)) {
07f86c03
AC		 1270 if (new_serial.custom_divisor == 0)
1271 return -EINVAL;
80ff8a80 1272 baud = new_serial.baud_base / new_serial.custom_divisor;
216ba023 1273 tty_encode_baud_rate(tty, baud, baud);
80ff8a80 1274 }
1c45607a 1275 }
fc83815c 1276
1c45607a 1277 info->type = new_serial.type;
1da177e4 1278
1c45607a
JS		 1279 process_txrx_fifo(info);
1280
07f86c03
AC		 1281 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
1282 if (flags != (port->flags & ASYNC_SPD_MASK)) {
1c45607a 1283 spin_lock_irqsave(&info->slock, sl_flags);
216ba023 1284 mxser_change_speed(tty, NULL);
1c45607a 1285 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1286 }
6769140d 1287 } else {
07f86c03 1288 retval = mxser_activate(port, tty);
6769140d 1289 if (retval == 0)
07f86c03 1290 set_bit(ASYNCB_INITIALIZED, &port->flags);
6769140d 1291 }
1c45607a
JS		 1292 return retval;
1293}
1da177e4 1294
1c45607a
JS		 1295/*
1296 * mxser_get_lsr_info - get line status register info
1297 *
1298 * Purpose: Let user call ioctl() to get info when the UART physically
1299 * is emptied. On bus types like RS485, the transmitter must
1300 * release the bus after transmitting. This must be done when
1301 * the transmit shift register is empty, not be done when the
1302 * transmit holding register is empty. This functionality
1303 * allows an RS485 driver to be written in user space.
1304 */
1305static int mxser_get_lsr_info(struct mxser_port *info,
1306 unsigned int __user *value)
1307{
1308 unsigned char status;
1309 unsigned int result;
1310 unsigned long flags;
1da177e4 1311
1c45607a
JS		 1312 spin_lock_irqsave(&info->slock, flags);
1313 status = inb(info->ioaddr + UART_LSR);
1314 spin_unlock_irqrestore(&info->slock, flags);
1315 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1316 return put_user(result, value);
1317}
1da177e4 1318
1c45607a
JS		 1319static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1320{
1321 struct mxser_port *info = tty->driver_data;
1322 unsigned char control, status;
1323 unsigned long flags;
1da177e4 1324
8ea2c2ec 1325
1c45607a
JS		 1326 if (tty->index == MXSER_PORTS)
1327 return -ENOIOCTLCMD;
1328 if (test_bit(TTY_IO_ERROR, &tty->flags))
1329 return -EIO;
1da177e4 1330
1c45607a 1331 control = info->MCR;
1da177e4 1332
1c45607a
JS		 1333 spin_lock_irqsave(&info->slock, flags);
1334 status = inb(info->ioaddr + UART_MSR);
1335 if (status & UART_MSR_ANY_DELTA)
216ba023 1336 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1337 spin_unlock_irqrestore(&info->slock, flags);
1338 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1339 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1340 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1341 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1342 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1343 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1344}
1da177e4 1345
1c45607a
JS		 1346static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1347 unsigned int set, unsigned int clear)
1348{
1349 struct mxser_port *info = tty->driver_data;
1350 unsigned long flags;
1da177e4 1351
1da177e4 1352
1c45607a
JS		 1353 if (tty->index == MXSER_PORTS)
1354 return -ENOIOCTLCMD;
1355 if (test_bit(TTY_IO_ERROR, &tty->flags))
1356 return -EIO;
1da177e4 1357
1c45607a 1358 spin_lock_irqsave(&info->slock, flags);
1da177e4 1359
1c45607a
JS		 1360 if (set & TIOCM_RTS)
1361 info->MCR |= UART_MCR_RTS;
1362 if (set & TIOCM_DTR)
1363 info->MCR |= UART_MCR_DTR;
1da177e4 1364
1c45607a
JS		 1365 if (clear & TIOCM_RTS)
1366 info->MCR &= ~UART_MCR_RTS;
1367 if (clear & TIOCM_DTR)
1368 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1369
1c45607a
JS		 1370 outb(info->MCR, info->ioaddr + UART_MCR);
1371 spin_unlock_irqrestore(&info->slock, flags);
1372 return 0;
1373}
1da177e4 1374
1c45607a
JS		 1375static int __init mxser_program_mode(int port)
1376{
1377 int id, i, j, n;
1378
1379 outb(0, port);
1380 outb(0, port);
1381 outb(0, port);
1382 (void)inb(port);
1383 (void)inb(port);
1384 outb(0, port);
1385 (void)inb(port);
1386
1387 id = inb(port + 1) & 0x1F;
1388 if ((id != C168_ASIC_ID) &&
1389 (id != C104_ASIC_ID) &&
1390 (id != C102_ASIC_ID) &&
1391 (id != CI132_ASIC_ID) &&
1392 (id != CI134_ASIC_ID) &&
1393 (id != CI104J_ASIC_ID))
1394 return -1;
1395 for (i = 0, j = 0; i < 4; i++) {
1396 n = inb(port + 2);
1397 if (n == 'M') {
1398 j = 1;
1399 } else if ((j == 1) && (n == 1)) {
1400 j = 2;
1401 break;
1402 } else
1403 j = 0;
1da177e4 1404 }
1c45607a
JS		 1405 if (j != 2)
1406 id = -2;
1407 return id;
1da177e4
LT		 1408}
1409
1c45607a
JS		 1410static void __init mxser_normal_mode(int port)
1411{
1412 int i, n;
1413
1414 outb(0xA5, port + 1);
1415 outb(0x80, port + 3);
1416 outb(12, port + 0); /* 9600 bps */
1417 outb(0, port + 1);
1418 outb(0x03, port + 3); /* 8 data bits */
1419 outb(0x13, port + 4); /* loop back mode */
1420 for (i = 0; i < 16; i++) {
1421 n = inb(port + 5);
1422 if ((n & 0x61) == 0x60)
1423 break;
1424 if ((n & 1) == 1)
1425 (void)inb(port);
1426 }
1427 outb(0x00, port + 4);
1428}
1429
1430#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1431#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1432#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1433#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1434#define EN_CCMD 0x000 /* Chip's command register */
1435#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1436#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1437#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1438#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1439#define EN0_DCFG 0x00E /* Data configuration reg WR */
1440#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1441#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1442#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1443static int __init mxser_read_register(int port, unsigned short *regs)
1444{
1445 int i, k, value, id;
1446 unsigned int j;
1447
1448 id = mxser_program_mode(port);
1449 if (id < 0)
1450 return id;
1451 for (i = 0; i < 14; i++) {
1452 k = (i & 0x3F) | 0x180;
1453 for (j = 0x100; j > 0; j >>= 1) {
1454 outb(CHIP_CS, port);
1455 if (k & j) {
1456 outb(CHIP_CS | CHIP_DO, port);
1457 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1458 } else {
1459 outb(CHIP_CS, port);
1460 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1461 }
1462 }
1463 (void)inb(port);
1464 value = 0;
1465 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1466 outb(CHIP_CS, port);
1467 outb(CHIP_CS | CHIP_SK, port);
1468 if (inb(port) & CHIP_DI)
1469 value |= j;
1470 }
1471 regs[i] = value;
1472 outb(0, port);
1473 }
1474 mxser_normal_mode(port);
1475 return id;
1476}
1da177e4
LT		 1477
1478static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1479{
07f86c03
AC		 1480 struct mxser_port *ip;
1481 struct tty_port *port;
216ba023 1482 struct tty_struct *tty;
1c45607a
JS		 1483 int result, status;
1484 unsigned int i, j;
9d6d162d 1485 int ret = 0;
1da177e4
LT		 1486
1487 switch (cmd) {
1da177e4 1488 case MOXA_GET_MAJOR:
8f3d137e
JS		 1489 if (printk_ratelimit())
1490 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1491 "%x (GET_MAJOR), fix your userspace\n",
1492 current->comm, cmd);
1c45607a 1493 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1494
1495 case MOXA_CHKPORTENABLE:
1496 result = 0;
1c45607a
JS		 1497 for (i = 0; i < MXSER_BOARDS; i++)
1498 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1499 if (mxser_boards[i].ports[j].ioaddr)
1500 result |= (1 << i);
8ea2c2ec 1501 return put_user(result, (unsigned long __user *)argp);
1da177e4 1502 case MOXA_GETDATACOUNT:
07f86c03
AC		 1503 /* The receive side is locked by port->slock but it isn't
1504 clear that an exact snapshot is worth copying here */
1da177e4 1505 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d 1506 ret = -EFAULT;
9d6d162d 1507 return ret;
72800df9
JS		 1508 case MOXA_GETMSTATUS: {
1509 struct mxser_mstatus ms, __user *msu = argp;
1c45607a
JS		 1510 for (i = 0; i < MXSER_BOARDS; i++)
1511 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
07f86c03
AC		 1512 ip = &mxser_boards[i].ports[j];
1513 port = &ip->port;
72800df9 1514 memset(&ms, 0, sizeof(ms));
1c45607a 1515
07f86c03
AC		 1516 mutex_lock(&port->mutex);
1517 if (!ip->ioaddr)
72800df9 1518 goto copy;
216ba023 1519
07f86c03 1520 tty = tty_port_tty_get(port);
1da177e4 1521
216ba023 1522 if (!tty || !tty->termios)
07f86c03 1523 ms.cflag = ip->normal_termios.c_cflag;
1c45607a 1524 else
216ba023
AC		 1525 ms.cflag = tty->termios->c_cflag;
1526 tty_kref_put(tty);
07f86c03
AC		 1527 spin_lock_irq(&ip->slock);
1528 status = inb(ip->ioaddr + UART_MSR);
1529 spin_unlock_irq(&ip->slock);
72800df9
JS		 1530 if (status & UART_MSR_DCD)
1531 ms.dcd = 1;
1532 if (status & UART_MSR_DSR)
1533 ms.dsr = 1;
1534 if (status & UART_MSR_CTS)
1535 ms.cts = 1;
1536 copy:
07f86c03
AC		 1537 mutex_unlock(&port->mutex);
1538 if (copy_to_user(msu, &ms, sizeof(ms)))
72800df9 1539 return -EFAULT;
72800df9 1540 msu++;
1c45607a 1541 }
1da177e4 1542 return 0;
72800df9 1543 }
8ea2c2ec 1544 case MOXA_ASPP_MON_EXT: {
72800df9
JS		 1545 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1546 unsigned int cflag, iflag, p;
1547 u8 opmode;
1548
1549 me = kzalloc(sizeof(*me), GFP_KERNEL);
1550 if (!me)
1551 return -ENOMEM;
1c45607a 1552
72800df9
JS		 1553 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1554 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1555 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1556 i = MXSER_BOARDS;
1557 break;
1558 }
07f86c03
AC		 1559 ip = &mxser_boards[i].ports[j];
1560 port = &ip->port;
1561
1562 mutex_lock(&port->mutex);
1563 if (!ip->ioaddr) {
1564 mutex_unlock(&port->mutex);
1da177e4 1565 continue;
07f86c03 1566 }
1da177e4 1567
07f86c03
AC		 1568 spin_lock_irq(&ip->slock);
1569 status = mxser_get_msr(ip->ioaddr, 0, p);
1c45607a 1570
1da177e4 1571 if (status & UART_MSR_TERI)
07f86c03 1572 ip->icount.rng++;
1da177e4 1573 if (status & UART_MSR_DDSR)
07f86c03 1574 ip->icount.dsr++;
1da177e4 1575 if (status & UART_MSR_DDCD)
07f86c03 1576 ip->icount.dcd++;
1da177e4 1577 if (status & UART_MSR_DCTS)
07f86c03 1578 ip->icount.cts++;
1c45607a 1579
07f86c03
AC		 1580 ip->mon_data.modem_status = status;
1581 me->rx_cnt[p] = ip->mon_data.rxcnt;
1582 me->tx_cnt[p] = ip->mon_data.txcnt;
1583 me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
1584 me->up_txcnt[p] = ip->mon_data.up_txcnt;
72800df9 1585 me->modem_status[p] =
07f86c03
AC		 1586 ip->mon_data.modem_status;
1587 spin_unlock_irq(&ip->slock);
1588
1589 tty = tty_port_tty_get(&ip->port);
1c45607a 1590
216ba023 1591 if (!tty || !tty->termios) {
07f86c03
AC		 1592 cflag = ip->normal_termios.c_cflag;
1593 iflag = ip->normal_termios.c_iflag;
1594 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
1da177e4 1595 } else {
216ba023
AC		 1596 cflag = tty->termios->c_cflag;
1597 iflag = tty->termios->c_iflag;
1598 me->baudrate[p] = tty_get_baud_rate(tty);
1da177e4 1599 }
216ba023 1600 tty_kref_put(tty);
1da177e4 1601
72800df9
JS		 1602 me->databits[p] = cflag & CSIZE;
1603 me->stopbits[p] = cflag & CSTOPB;
1604 me->parity[p] = cflag & (PARENB | PARODD |
1605 CMSPAR);
1da177e4
LT		 1606
1607 if (cflag & CRTSCTS)
72800df9 1608 me->flowctrl[p] |= 0x03;
1da177e4
LT		 1609
1610 if (iflag & (IXON | IXOFF))
72800df9 1611 me->flowctrl[p] |= 0x0C;
1da177e4 1612
07f86c03 1613 if (ip->type == PORT_16550A)
72800df9 1614 me->fifo[p] = 1;
1da177e4 1615
07f86c03 1616 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
1da177e4 1617 opmode &= OP_MODE_MASK;
72800df9 1618 me->iftype[p] = opmode;
07f86c03 1619 mutex_unlock(&port->mutex);
1da177e4 1620 }
9d6d162d 1621 }
72800df9
JS		 1622 if (copy_to_user(argp, me, sizeof(*me)))
1623 ret = -EFAULT;
1624 kfree(me);
1625 return ret;
9d6d162d
AC		 1626 }
1627 default:
1da177e4
LT		 1628 return -ENOIOCTLCMD;
1629 }
1630 return 0;
1631}
1632
1c45607a
JS		 1633static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1634 struct async_icount *cprev)
1da177e4 1635{
1c45607a
JS		 1636 struct async_icount cnow;
1637 unsigned long flags;
1638 int ret;
1da177e4 1639
1c45607a
JS		 1640 spin_lock_irqsave(&info->slock, flags);
1641 cnow = info->icount; /* atomic copy */
1642 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1643
1c45607a
JS		 1644 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1645 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1646 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1647 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1648
1c45607a
JS		 1649 *cprev = cnow;
1650
1651 return ret;
1652}
1653
1654static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1655 unsigned int cmd, unsigned long arg)
1da177e4 1656{
1c45607a 1657 struct mxser_port *info = tty->driver_data;
07f86c03 1658 struct tty_port *port = &info->port;
1c45607a 1659 struct async_icount cnow;
1c45607a
JS		 1660 unsigned long flags;
1661 void __user *argp = (void __user *)arg;
1662 int retval;
1da177e4 1663
1c45607a
JS		 1664 if (tty->index == MXSER_PORTS)
1665 return mxser_ioctl_special(cmd, argp);
1da177e4 1666
1c45607a
JS		 1667 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1668 int p;
1669 unsigned long opmode;
1670 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1671 int shiftbit;
1672 unsigned char val, mask;
1da177e4 1673
1c45607a
JS		 1674 p = tty->index % 4;
1675 if (cmd == MOXA_SET_OP_MODE) {
1676 if (get_user(opmode, (int __user *) argp))
1677 return -EFAULT;
1678 if (opmode != RS232_MODE &&
1679 opmode != RS485_2WIRE_MODE &&
1680 opmode != RS422_MODE &&
1681 opmode != RS485_4WIRE_MODE)
1682 return -EFAULT;
1683 mask = ModeMask[p];
1684 shiftbit = p * 2;
07f86c03 1685 spin_lock_irq(&info->slock);
1c45607a
JS		 1686 val = inb(info->opmode_ioaddr);
1687 val &= mask;
1688 val |= (opmode << shiftbit);
1689 outb(val, info->opmode_ioaddr);
07f86c03 1690 spin_unlock_irq(&info->slock);
1c45607a
JS		 1691 } else {
1692 shiftbit = p * 2;
07f86c03 1693 spin_lock_irq(&info->slock);
1c45607a 1694 opmode = inb(info->opmode_ioaddr) >> shiftbit;
07f86c03 1695 spin_unlock_irq(&info->slock);
1c45607a
JS		 1696 opmode &= OP_MODE_MASK;
1697 if (put_user(opmode, (int __user *)argp))
1698 return -EFAULT;
1699 }
1700 return 0;
1701 }
1702
0587102c 1703 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
1c45607a
JS		 1704 test_bit(TTY_IO_ERROR, &tty->flags))
1705 return -EIO;
1706
1707 switch (cmd) {
1c45607a 1708 case TIOCGSERIAL:
07f86c03 1709 mutex_lock(&port->mutex);
216ba023 1710 retval = mxser_get_serial_info(tty, argp);
07f86c03 1711 mutex_unlock(&port->mutex);
9d6d162d 1712 return retval;
1c45607a 1713 case TIOCSSERIAL:
07f86c03 1714 mutex_lock(&port->mutex);
216ba023 1715 retval = mxser_set_serial_info(tty, argp);
07f86c03 1716 mutex_unlock(&port->mutex);
9d6d162d 1717 return retval;
1c45607a 1718 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1719 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1720 /*
1721 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1722 * - mask passed in arg for lines of interest
1723 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1724 * Caller should use TIOCGICOUNT to see which one it was
1725 */
1726 case TIOCMIWAIT:
1727 spin_lock_irqsave(&info->slock, flags);
1728 cnow = info->icount; /* note the counters on entry */
1729 spin_unlock_irqrestore(&info->slock, flags);
1730
bdc04e31 1731 return wait_event_interruptible(info->port.delta_msr_wait,
1c45607a 1732 mxser_cflags_changed(info, arg, &cnow));
1c45607a
JS		 1733 case MOXA_HighSpeedOn:
1734 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1735 case MOXA_SDS_RSTICOUNTER:
07f86c03 1736 spin_lock_irq(&info->slock);
1c45607a
JS		 1737 info->mon_data.rxcnt = 0;
1738 info->mon_data.txcnt = 0;
07f86c03 1739 spin_unlock_irq(&info->slock);
1c45607a
JS		 1740 return 0;
1741
1742 case MOXA_ASPP_OQUEUE:{
1743 int len, lsr;
1744
1745 len = mxser_chars_in_buffer(tty);
c6eb69ac 1746 spin_lock_irq(&info->slock);
a75b7b68 1747 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
07f86c03 1748 spin_unlock_irq(&info->slock);
1c45607a
JS		 1749 len += (lsr ? 0 : 1);
1750
1751 return put_user(len, (int __user *)argp);
1752 }
1753 case MOXA_ASPP_MON: {
1754 int mcr, status;
1755
c6eb69ac 1756 spin_lock_irq(&info->slock);
1c45607a 1757 status = mxser_get_msr(info->ioaddr, 1, tty->index);
216ba023 1758 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1759
1760 mcr = inb(info->ioaddr + UART_MCR);
c6eb69ac 1761 spin_unlock_irq(&info->slock);
07f86c03 1762
1c45607a
JS		 1763 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1764 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1765 else
1766 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1767
1768 if (mcr & MOXA_MUST_MCR_TX_XON)
1769 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1770 else
1771 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1772
216ba023 1773 if (tty->hw_stopped)
1c45607a
JS		 1774 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1775 else
1776 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
07f86c03 1777
1c45607a
JS		 1778 if (copy_to_user(argp, &info->mon_data,
1779 sizeof(struct mxser_mon)))
1780 return -EFAULT;
1781
1782 return 0;
1783 }
1784 case MOXA_ASPP_LSTATUS: {
1785 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1786 return -EFAULT;
1787
1788 info->err_shadow = 0;
1789 return 0;
1790 }
1791 case MOXA_SET_BAUD_METHOD: {
1792 int method;
1793
1794 if (get_user(method, (int __user *)argp))
1795 return -EFAULT;
1796 mxser_set_baud_method[tty->index] = method;
1797 return put_user(method, (int __user *)argp);
1798 }
1799 default:
1800 return -ENOIOCTLCMD;
1801 }
1802 return 0;
1803}
1804
0587102c
AC		 1805 /*
1806 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1807 * Return: write counters to the user passed counter struct
1808 * NB: both 1->0 and 0->1 transitions are counted except for
1809 * RI where only 0->1 is counted.
1810 */
1811
1812static int mxser_get_icount(struct tty_struct *tty,
1813 struct serial_icounter_struct *icount)
1814
1815{
1816 struct mxser_port *info = tty->driver_data;
1817 struct async_icount cnow;
1818 unsigned long flags;
1819
1820 spin_lock_irqsave(&info->slock, flags);
1821 cnow = info->icount;
1822 spin_unlock_irqrestore(&info->slock, flags);
1823
1824 icount->frame = cnow.frame;
1825 icount->brk = cnow.brk;
1826 icount->overrun = cnow.overrun;
1827 icount->buf_overrun = cnow.buf_overrun;
1828 icount->parity = cnow.parity;
1829 icount->rx = cnow.rx;
1830 icount->tx = cnow.tx;
1831 icount->cts = cnow.cts;
1832 icount->dsr = cnow.dsr;
1833 icount->rng = cnow.rng;
1834 icount->dcd = cnow.dcd;
1835 return 0;
1836}
1837
1c45607a
JS		 1838static void mxser_stoprx(struct tty_struct *tty)
1839{
1840 struct mxser_port *info = tty->driver_data;
1841
1842 info->ldisc_stop_rx = 1;
1843 if (I_IXOFF(tty)) {
1844 if (info->board->chip_flag) {
1845 info->IER &= ~MOXA_MUST_RECV_ISR;
1846 outb(info->IER, info->ioaddr + UART_IER);
1847 } else {
1848 info->x_char = STOP_CHAR(tty);
1849 outb(0, info->ioaddr + UART_IER);
1850 info->IER |= UART_IER_THRI;
1851 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1852 }
1853 }
1854
216ba023 1855 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1856 info->MCR &= ~UART_MCR_RTS;
1857 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1858 }
1859}
1860
1861/*
1862 * This routine is called by the upper-layer tty layer to signal that
1863 * incoming characters should be throttled.
1864 */
1865static void mxser_throttle(struct tty_struct *tty)
1866{
1da177e4 1867 mxser_stoprx(tty);
1da177e4
LT		 1868}
1869
1870static void mxser_unthrottle(struct tty_struct *tty)
1871{
1c45607a 1872 struct mxser_port *info = tty->driver_data;
1da177e4 1873
1c45607a
JS		 1874 /* startrx */
1875 info->ldisc_stop_rx = 0;
1876 if (I_IXOFF(tty)) {
1877 if (info->x_char)
1878 info->x_char = 0;
1879 else {
1880 if (info->board->chip_flag) {
1881 info->IER |= MOXA_MUST_RECV_ISR;
1882 outb(info->IER, info->ioaddr + UART_IER);
1883 } else {
1884 info->x_char = START_CHAR(tty);
1885 outb(0, info->ioaddr + UART_IER);
1886 info->IER |= UART_IER_THRI;
1887 outb(info->IER, info->ioaddr + UART_IER);
1888 }
1da177e4 1889 }
1c45607a 1890 }
1da177e4 1891
216ba023 1892 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1893 info->MCR |= UART_MCR_RTS;
1894 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1895 }
1896}
1897
1898/*
1899 * mxser_stop() and mxser_start()
1900 *
1901 * This routines are called before setting or resetting tty->stopped.
1902 * They enable or disable transmitter interrupts, as necessary.
1903 */
1904static void mxser_stop(struct tty_struct *tty)
1905{
1c45607a 1906 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1907 unsigned long flags;
1908
1909 spin_lock_irqsave(&info->slock, flags);
1910 if (info->IER & UART_IER_THRI) {
1911 info->IER &= ~UART_IER_THRI;
1c45607a 1912 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1913 }
1914 spin_unlock_irqrestore(&info->slock, flags);
1915}
1916
1917static void mxser_start(struct tty_struct *tty)
1918{
1c45607a 1919 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1920 unsigned long flags;
1921
1922 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1923 if (info->xmit_cnt && info->port.xmit_buf) {
1c45607a 1924 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1925 info->IER |= UART_IER_THRI;
1c45607a 1926 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1927 }
1928 spin_unlock_irqrestore(&info->slock, flags);
1929}
1930
1c45607a
JS		 1931static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1932{
1933 struct mxser_port *info = tty->driver_data;
1934 unsigned long flags;
1935
1936 spin_lock_irqsave(&info->slock, flags);
216ba023 1937 mxser_change_speed(tty, old_termios);
1c45607a
JS		 1938 spin_unlock_irqrestore(&info->slock, flags);
1939
1940 if ((old_termios->c_cflag & CRTSCTS) &&
1941 !(tty->termios->c_cflag & CRTSCTS)) {
1942 tty->hw_stopped = 0;
1943 mxser_start(tty);
1944 }
1945
1946 /* Handle sw stopped */
1947 if ((old_termios->c_iflag & IXON) &&
1948 !(tty->termios->c_iflag & IXON)) {
1949 tty->stopped = 0;
1950
1951 if (info->board->chip_flag) {
1952 spin_lock_irqsave(&info->slock, flags);
148ff86b
CH		 1953 mxser_disable_must_rx_software_flow_control(
1954 info->ioaddr);
1c45607a
JS		 1955 spin_unlock_irqrestore(&info->slock, flags);
1956 }
1957
1958 mxser_start(tty);
1959 }
1960}
1961
1da177e4
LT		 1962/*
1963 * mxser_wait_until_sent() --- wait until the transmitter is empty
1964 */
1965static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1966{
1c45607a 1967 struct mxser_port *info = tty->driver_data;
1da177e4 1968 unsigned long orig_jiffies, char_time;
07f86c03 1969 unsigned long flags;
1da177e4
LT		 1970 int lsr;
1971
1972 if (info->type == PORT_UNKNOWN)
1973 return;
1974
1975 if (info->xmit_fifo_size == 0)
1976 return; /* Just in case.... */
1977
1978 orig_jiffies = jiffies;
1979 /*
1980 * Set the check interval to be 1/5 of the estimated time to
1981 * send a single character, and make it at least 1. The check
1982 * interval should also be less than the timeout.
1983 *
1984 * Note: we have to use pretty tight timings here to satisfy
1985 * the NIST-PCTS.
1986 */
1987 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1988 char_time = char_time / 5;
1989 if (char_time == 0)
1990 char_time = 1;
1991 if (timeout && timeout < char_time)
1992 char_time = timeout;
1993 /*
1994 * If the transmitter hasn't cleared in twice the approximate
1995 * amount of time to send the entire FIFO, it probably won't
1996 * ever clear. This assumes the UART isn't doing flow
1997 * control, which is currently the case. Hence, if it ever
1998 * takes longer than info->timeout, this is probably due to a
1999 * UART bug of some kind. So, we clamp the timeout parameter at
2000 * 2*info->timeout.
2001 */
2002 if (!timeout || timeout > 2 * info->timeout)
2003 timeout = 2 * info->timeout;
2004#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 2005 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2006 timeout, char_time);
1da177e4
LT		 2007 printk("jiff=%lu...", jiffies);
2008#endif
07f86c03 2009 spin_lock_irqsave(&info->slock, flags);
1c45607a 2010 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1da177e4
LT		 2011#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2012 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2013#endif
07f86c03 2014 spin_unlock_irqrestore(&info->slock, flags);
da4cd8df 2015 schedule_timeout_interruptible(char_time);
07f86c03 2016 spin_lock_irqsave(&info->slock, flags);
1da177e4 2017 if (signal_pending(current))
1c45607a
JS		 2018 break;
2019 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2020 break;
1da177e4 2021 }
07f86c03 2022 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 2023 set_current_state(TASK_RUNNING);
1da177e4 2024
1c45607a
JS		 2025#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2026 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2027#endif
2028}
1da177e4 2029
1c45607a
JS		 2030/*
2031 * This routine is called by tty_hangup() when a hangup is signaled.
2032 */
2033static void mxser_hangup(struct tty_struct *tty)
2034{
2035 struct mxser_port *info = tty->driver_data;
1da177e4 2036
1c45607a 2037 mxser_flush_buffer(tty);
3b6826b2 2038 tty_port_hangup(&info->port);
1da177e4
LT		 2039}
2040
1c45607a
JS		 2041/*
2042 * mxser_rs_break() --- routine which turns the break handling on or off
2043 */
9e98966c 2044static int mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2045{
1c45607a 2046 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2047 unsigned long flags;
2048
1c45607a
JS		 2049 spin_lock_irqsave(&info->slock, flags);
2050 if (break_state == -1)
2051 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2052 info->ioaddr + UART_LCR);
2053 else
2054 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2055 info->ioaddr + UART_LCR);
2056 spin_unlock_irqrestore(&info->slock, flags);
9e98966c 2057 return 0;
1c45607a 2058}
1da177e4 2059
216ba023
AC		 2060static void mxser_receive_chars(struct tty_struct *tty,
2061 struct mxser_port *port, int *status)
1c45607a 2062{
1c45607a
JS		 2063 unsigned char ch, gdl;
2064 int ignored = 0;
2065 int cnt = 0;
2066 int recv_room;
2067 int max = 256;
1da177e4 2068
1c45607a 2069 recv_room = tty->receive_room;
216ba023 2070 if (recv_room == 0 && !port->ldisc_stop_rx)
1c45607a 2071 mxser_stoprx(tty);
1c45607a 2072 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2073
1c45607a
JS		 2074 if (*status & UART_LSR_SPECIAL)
2075 goto intr_old;
2076 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2077 (*status & MOXA_MUST_LSR_RERR))
2078 goto intr_old;
2079 if (*status & MOXA_MUST_LSR_RERR)
2080 goto intr_old;
1da177e4 2081
1c45607a
JS		 2082 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2083
2084 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2085 gdl &= MOXA_MUST_GDL_MASK;
2086 if (gdl >= recv_room) {
2087 if (!port->ldisc_stop_rx)
2088 mxser_stoprx(tty);
2089 }
2090 while (gdl--) {
2091 ch = inb(port->ioaddr + UART_RX);
2092 tty_insert_flip_char(tty, ch, 0);
2093 cnt++;
2094 }
2095 goto end_intr;
1da177e4 2096 }
1c45607a
JS		 2097intr_old:
2098
2099 do {
2100 if (max-- < 0)
2101 break;
1da177e4 2102
1c45607a
JS		 2103 ch = inb(port->ioaddr + UART_RX);
2104 if (port->board->chip_flag && (*status & UART_LSR_OE))
2105 outb(0x23, port->ioaddr + UART_FCR);
2106 *status &= port->read_status_mask;
2107 if (*status & port->ignore_status_mask) {
2108 if (++ignored > 100)
2109 break;
2110 } else {
2111 char flag = 0;
2112 if (*status & UART_LSR_SPECIAL) {
2113 if (*status & UART_LSR_BI) {
2114 flag = TTY_BREAK;
2115 port->icount.brk++;
1da177e4 2116
0ad9e7d1 2117 if (port->port.flags & ASYNC_SAK)
1c45607a
JS		 2118 do_SAK(tty);
2119 } else if (*status & UART_LSR_PE) {
2120 flag = TTY_PARITY;
2121 port->icount.parity++;
2122 } else if (*status & UART_LSR_FE) {
2123 flag = TTY_FRAME;
2124 port->icount.frame++;
2125 } else if (*status & UART_LSR_OE) {
2126 flag = TTY_OVERRUN;
2127 port->icount.overrun++;
2128 } else
2129 flag = TTY_BREAK;
2130 }
2131 tty_insert_flip_char(tty, ch, flag);
2132 cnt++;
2133 if (cnt >= recv_room) {
2134 if (!port->ldisc_stop_rx)
2135 mxser_stoprx(tty);
2136 break;
2137 }
1da177e4 2138
1c45607a 2139 }
1da177e4 2140
1c45607a
JS		 2141 if (port->board->chip_flag)
2142 break;
1da177e4 2143
1c45607a
JS		 2144 *status = inb(port->ioaddr + UART_LSR);
2145 } while (*status & UART_LSR_DR);
1da177e4 2146
1c45607a 2147end_intr:
216ba023 2148 mxvar_log.rxcnt[tty->index] += cnt;
1c45607a
JS		 2149 port->mon_data.rxcnt += cnt;
2150 port->mon_data.up_rxcnt += cnt;
1da177e4 2151
1c45607a
JS		 2152 /*
2153 * We are called from an interrupt context with &port->slock
2154 * being held. Drop it temporarily in order to prevent
2155 * recursive locking.
2156 */
2157 spin_unlock(&port->slock);
2158 tty_flip_buffer_push(tty);
2159 spin_lock(&port->slock);
1da177e4
LT		 2160}
2161
216ba023 2162static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1da177e4 2163{
1c45607a 2164 int count, cnt;
1da177e4 2165
1c45607a
JS		 2166 if (port->x_char) {
2167 outb(port->x_char, port->ioaddr + UART_TX);
2168 port->x_char = 0;
216ba023 2169 mxvar_log.txcnt[tty->index]++;
1c45607a
JS		 2170 port->mon_data.txcnt++;
2171 port->mon_data.up_txcnt++;
2172 port->icount.tx++;
2173 return;
2174 }
1da177e4 2175
0ad9e7d1 2176 if (port->port.xmit_buf == NULL)
1c45607a 2177 return;
1da177e4 2178
216ba023
AC		 2179 if (port->xmit_cnt <= 0 || tty->stopped ||
2180 (tty->hw_stopped &&
1c45607a
JS		 2181 (port->type != PORT_16550A) &&
2182 (!port->board->chip_flag))) {
2183 port->IER &= ~UART_IER_THRI;
2184 outb(port->IER, port->ioaddr + UART_IER);
2185 return;
1da177e4
LT		 2186 }
2187
1c45607a
JS		 2188 cnt = port->xmit_cnt;
2189 count = port->xmit_fifo_size;
2190 do {
0ad9e7d1 2191 outb(port->port.xmit_buf[port->xmit_tail++],
1c45607a
JS		 2192 port->ioaddr + UART_TX);
2193 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2194 if (--port->xmit_cnt <= 0)
2195 break;
2196 } while (--count > 0);
216ba023 2197 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
1da177e4 2198
1c45607a
JS		 2199 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2200 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2201 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2202
464eb8f5 2203 if (port->xmit_cnt < WAKEUP_CHARS)
216ba023 2204 tty_wakeup(tty);
1c45607a
JS		 2205
2206 if (port->xmit_cnt <= 0) {
2207 port->IER &= ~UART_IER_THRI;
2208 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2209 }
1da177e4
LT		 2210}
2211
2212/*
1c45607a 2213 * This is the serial driver's generic interrupt routine
1da177e4 2214 */
1c45607a 2215static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2216{
1c45607a
JS		 2217 int status, iir, i;
2218 struct mxser_board *brd = NULL;
2219 struct mxser_port *port;
2220 int max, irqbits, bits, msr;
2221 unsigned int int_cnt, pass_counter = 0;
2222 int handled = IRQ_NONE;
216ba023 2223 struct tty_struct *tty;
1da177e4 2224
1c45607a
JS		 2225 for (i = 0; i < MXSER_BOARDS; i++)
2226 if (dev_id == &mxser_boards[i]) {
2227 brd = dev_id;
2228 break;
2229 }
1da177e4 2230
1c45607a
JS		 2231 if (i == MXSER_BOARDS)
2232 goto irq_stop;
2233 if (brd == NULL)
2234 goto irq_stop;
2235 max = brd->info->nports;
2236 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2237 irqbits = inb(brd->vector) & brd->vector_mask;
2238 if (irqbits == brd->vector_mask)
2239 break;
1da177e4 2240
1c45607a
JS		 2241 handled = IRQ_HANDLED;
2242 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2243 if (irqbits == brd->vector_mask)
2244 break;
2245 if (bits & irqbits)
2246 continue;
2247 port = &brd->ports[i];
2248
2249 int_cnt = 0;
2250 spin_lock(&port->slock);
2251 do {
2252 iir = inb(port->ioaddr + UART_IIR);
2253 if (iir & UART_IIR_NO_INT)
2254 break;
2255 iir &= MOXA_MUST_IIR_MASK;
216ba023
AC		 2256 tty = tty_port_tty_get(&port->port);
2257 if (!tty ||
0ad9e7d1
AC		 2258 (port->port.flags & ASYNC_CLOSING) ||
2259 !(port->port.flags &
1c45607a
JS		 2260 ASYNC_INITIALIZED)) {
2261 status = inb(port->ioaddr + UART_LSR);
2262 outb(0x27, port->ioaddr + UART_FCR);
2263 inb(port->ioaddr + UART_MSR);
216ba023 2264 tty_kref_put(tty);
1c45607a
JS		 2265 break;
2266 }
1da177e4 2267
1c45607a
JS		 2268 status = inb(port->ioaddr + UART_LSR);
2269
2270 if (status & UART_LSR_PE)
2271 port->err_shadow |= NPPI_NOTIFY_PARITY;
2272 if (status & UART_LSR_FE)
2273 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2274 if (status & UART_LSR_OE)
2275 port->err_shadow |=
2276 NPPI_NOTIFY_HW_OVERRUN;
2277 if (status & UART_LSR_BI)
2278 port->err_shadow |= NPPI_NOTIFY_BREAK;
2279
2280 if (port->board->chip_flag) {
2281 if (iir == MOXA_MUST_IIR_GDA ||
2282 iir == MOXA_MUST_IIR_RDA ||
2283 iir == MOXA_MUST_IIR_RTO ||
2284 iir == MOXA_MUST_IIR_LSR)
216ba023 2285 mxser_receive_chars(tty, port,
1c45607a
JS		 2286 &status);
2287
2288 } else {
2289 status &= port->read_status_mask;
2290 if (status & UART_LSR_DR)
216ba023 2291 mxser_receive_chars(tty, port,
1c45607a
JS		 2292 &status);
2293 }
2294 msr = inb(port->ioaddr + UART_MSR);
2295 if (msr & UART_MSR_ANY_DELTA)
216ba023 2296 mxser_check_modem_status(tty, port, msr);
1c45607a
JS		 2297
2298 if (port->board->chip_flag) {
2299 if (iir == 0x02 && (status &
2300 UART_LSR_THRE))
216ba023 2301 mxser_transmit_chars(tty, port);
1c45607a
JS		 2302 } else {
2303 if (status & UART_LSR_THRE)
216ba023 2304 mxser_transmit_chars(tty, port);
1c45607a 2305 }
216ba023 2306 tty_kref_put(tty);
1c45607a
JS		 2307 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2308 spin_unlock(&port->slock);
2309 }
2310 }
1da177e4 2311
1c45607a
JS		 2312irq_stop:
2313 return handled;
2314}
1da177e4 2315
1c45607a
JS		 2316static const struct tty_operations mxser_ops = {
2317 .open = mxser_open,
2318 .close = mxser_close,
2319 .write = mxser_write,
2320 .put_char = mxser_put_char,
2321 .flush_chars = mxser_flush_chars,
2322 .write_room = mxser_write_room,
2323 .chars_in_buffer = mxser_chars_in_buffer,
2324 .flush_buffer = mxser_flush_buffer,
2325 .ioctl = mxser_ioctl,
2326 .throttle = mxser_throttle,
2327 .unthrottle = mxser_unthrottle,
2328 .set_termios = mxser_set_termios,
2329 .stop = mxser_stop,
2330 .start = mxser_start,
2331 .hangup = mxser_hangup,
2332 .break_ctl = mxser_rs_break,
2333 .wait_until_sent = mxser_wait_until_sent,
2334 .tiocmget = mxser_tiocmget,
2335 .tiocmset = mxser_tiocmset,
0587102c 2336 .get_icount = mxser_get_icount,
1c45607a 2337};
1da177e4 2338
31f35939
AC		 2339struct tty_port_operations mxser_port_ops = {
2340 .carrier_raised = mxser_carrier_raised,
fcc8ac18 2341 .dtr_rts = mxser_dtr_rts,
6769140d
AC		 2342 .activate = mxser_activate,
2343 .shutdown = mxser_shutdown_port,
31f35939
AC		 2344};
2345
1c45607a
JS		 2346/*
2347 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2348 */
1da177e4 2349
df480518 2350static void mxser_release_ISA_res(struct mxser_board *brd)
1c45607a 2351{
df480518
JS		 2352 free_irq(brd->irq, brd);
2353 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2354 release_region(brd->vector, 1);
1da177e4
LT		 2355}
2356
1c45607a
JS		 2357static int __devinit mxser_initbrd(struct mxser_board *brd,
2358 struct pci_dev *pdev)
1da177e4 2359{
1c45607a
JS		 2360 struct mxser_port *info;
2361 unsigned int i;
2362 int retval;
1da177e4 2363
83766bc6
JS		 2364 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2365 brd->ports[0].max_baud);
1da177e4 2366
1c45607a
JS		 2367 for (i = 0; i < brd->info->nports; i++) {
2368 info = &brd->ports[i];
44b7d1b3 2369 tty_port_init(&info->port);
31f35939 2370 info->port.ops = &mxser_port_ops;
1c45607a
JS		 2371 info->board = brd;
2372 info->stop_rx = 0;
2373 info->ldisc_stop_rx = 0;
1da177e4 2374
1c45607a
JS		 2375 /* Enhance mode enabled here */
2376 if (brd->chip_flag != MOXA_OTHER_UART)
148ff86b 2377 mxser_enable_must_enchance_mode(info->ioaddr);
1da177e4 2378
0ad9e7d1 2379 info->port.flags = ASYNC_SHARE_IRQ;
1c45607a 2380 info->type = brd->uart_type;
1da177e4 2381
1c45607a 2382 process_txrx_fifo(info);
1da177e4 2383
1c45607a 2384 info->custom_divisor = info->baud_base * 16;
44b7d1b3
AC		 2385 info->port.close_delay = 5 * HZ / 10;
2386 info->port.closing_wait = 30 * HZ;
1c45607a 2387 info->normal_termios = mxvar_sdriver->init_termios;
1c45607a
JS		 2388 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2389 info->err_shadow = 0;
2390 spin_lock_init(&info->slock);
1da177e4 2391
1c45607a
JS		 2392 /* before set INT ISR, disable all int */
2393 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2394 info->ioaddr + UART_IER);
2395 }
1da177e4 2396
1c45607a
JS		 2397 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2398 brd);
df480518 2399 if (retval)
1c45607a
JS		 2400 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2401 "conflict with another device.\n",
2402 brd->info->name, brd->irq);
df480518 2403
1c45607a
JS		 2404 return retval;
2405}
1da177e4 2406
1c45607a 2407static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4
LT		 2408{
2409 int id, i, bits;
2410 unsigned short regs[16], irq;
2411 unsigned char scratch, scratch2;
2412
1c45607a 2413 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2414
2415 id = mxser_read_register(cap, regs);
1c45607a
JS		 2416 switch (id) {
2417 case C168_ASIC_ID:
2418 brd->info = &mxser_cards[0];
2419 break;
2420 case C104_ASIC_ID:
2421 brd->info = &mxser_cards[1];
2422 break;
2423 case CI104J_ASIC_ID:
2424 brd->info = &mxser_cards[2];
2425 break;
2426 case C102_ASIC_ID:
2427 brd->info = &mxser_cards[5];
2428 break;
2429 case CI132_ASIC_ID:
2430 brd->info = &mxser_cards[6];
2431 break;
2432 case CI134_ASIC_ID:
2433 brd->info = &mxser_cards[7];
2434 break;
2435 default:
8ea2c2ec 2436 return 0;
1c45607a 2437 }
1da177e4
LT		 2438
2439 irq = 0;
1c45607a
JS		 2440 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2441 Flag-hack checks if configuration should be read as 2-port here. */
2442 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2443 irq = regs[9] & 0xF000;
2444 irq = irq | (irq >> 4);
2445 if (irq != (regs[9] & 0xFF00))
83766bc6 2446 goto err_irqconflict;
1c45607a 2447 } else if (brd->info->nports == 4) {
1da177e4
LT		 2448 irq = regs[9] & 0xF000;
2449 irq = irq | (irq >> 4);
2450 irq = irq | (irq >> 8);
2451 if (irq != regs[9])
83766bc6 2452 goto err_irqconflict;
1c45607a 2453 } else if (brd->info->nports == 8) {
1da177e4
LT		 2454 irq = regs[9] & 0xF000;
2455 irq = irq | (irq >> 4);
2456 irq = irq | (irq >> 8);
2457 if ((irq != regs[9]) || (irq != regs[10]))
83766bc6 2458 goto err_irqconflict;
1da177e4
LT		 2459 }
2460
83766bc6
JS		 2461 if (!irq) {
2462 printk(KERN_ERR "mxser: interrupt number unset\n");
2463 return -EIO;
2464 }
1c45607a 2465 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2466 for (i = 0; i < 8; i++)
1c45607a 2467 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
83766bc6
JS		 2468 if ((regs[12] & 0x80) == 0) {
2469 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2470 return -EIO;
2471 }
1c45607a 2472 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2473 if (id == 1)
1c45607a 2474 brd->vector_mask = 0x00FF;
1da177e4 2475 else
1c45607a 2476 brd->vector_mask = 0x000F;
1da177e4
LT		 2477 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2478 if (regs[12] & bits) {
1c45607a
JS		 2479 brd->ports[i].baud_base = 921600;
2480 brd->ports[i].max_baud = 921600;
1da177e4 2481 } else {
1c45607a
JS		 2482 brd->ports[i].baud_base = 115200;
2483 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2484 }
2485 }
2486 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2487 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2488 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2489 outb(scratch2, cap + UART_LCR);
2490 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2491 scratch = inb(cap + UART_IIR);
2492
2493 if (scratch & 0xC0)
1c45607a 2494 brd->uart_type = PORT_16550A;
1da177e4 2495 else
1c45607a
JS		 2496 brd->uart_type = PORT_16450;
2497 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
83766bc6
JS		 2498 "mxser(IO)")) {
2499 printk(KERN_ERR "mxser: can't request ports I/O region: "
2500 "0x%.8lx-0x%.8lx\n",
2501 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2502 8 * brd->info->nports - 1);
2503 return -EIO;
2504 }
1c45607a
JS		 2505 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2506 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
83766bc6
JS		 2507 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2508 "0x%.8lx-0x%.8lx\n",
2509 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2510 8 * brd->info->nports - 1);
2511 return -EIO;
1c45607a
JS		 2512 }
2513 return brd->info->nports;
83766bc6
JS		 2514
2515err_irqconflict:
2516 printk(KERN_ERR "mxser: invalid interrupt number\n");
2517 return -EIO;
1da177e4
LT		 2518}
2519
1c45607a
JS		 2520static int __devinit mxser_probe(struct pci_dev *pdev,
2521 const struct pci_device_id *ent)
1da177e4 2522{
1c45607a
JS		 2523#ifdef CONFIG_PCI
2524 struct mxser_board *brd;
2525 unsigned int i, j;
2526 unsigned long ioaddress;
2527 int retval = -EINVAL;
1da177e4 2528
1c45607a
JS		 2529 for (i = 0; i < MXSER_BOARDS; i++)
2530 if (mxser_boards[i].info == NULL)
2531 break;
2532
2533 if (i >= MXSER_BOARDS) {
83766bc6
JS		 2534 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2535 "not configured\n", MXSER_BOARDS);
1c45607a
JS		 2536 goto err;
2537 }
2538
2539 brd = &mxser_boards[i];
2540 brd->idx = i * MXSER_PORTS_PER_BOARD;
83766bc6 2541 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
1c45607a
JS		 2542 mxser_cards[ent->driver_data].name,
2543 pdev->bus->number, PCI_SLOT(pdev->devfn));
2544
2545 retval = pci_enable_device(pdev);
2546 if (retval) {
83766bc6 2547 dev_err(&pdev->dev, "PCI enable failed\n");
1c45607a
JS		 2548 goto err;
2549 }
2550
2551 /* io address */
2552 ioaddress = pci_resource_start(pdev, 2);
2553 retval = pci_request_region(pdev, 2, "mxser(IO)");
2554 if (retval)
df480518 2555 goto err_dis;
1c45607a
JS		 2556
2557 brd->info = &mxser_cards[ent->driver_data];
2558 for (i = 0; i < brd->info->nports; i++)
2559 brd->ports[i].ioaddr = ioaddress + 8 * i;
2560
2561 /* vector */
2562 ioaddress = pci_resource_start(pdev, 3);
2563 retval = pci_request_region(pdev, 3, "mxser(vector)");
2564 if (retval)
df480518 2565 goto err_zero;
1c45607a
JS		 2566 brd->vector = ioaddress;
2567
2568 /* irq */
2569 brd->irq = pdev->irq;
2570
2571 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2572 brd->uart_type = PORT_16550A;
2573 brd->vector_mask = 0;
2574
2575 for (i = 0; i < brd->info->nports; i++) {
2576 for (j = 0; j < UART_INFO_NUM; j++) {
2577 if (Gpci_uart_info[j].type == brd->chip_flag) {
2578 brd->ports[i].max_baud =
2579 Gpci_uart_info[j].max_baud;
2580
2581 /* exception....CP-102 */
2582 if (brd->info->flags & MXSER_HIGHBAUD)
2583 brd->ports[i].max_baud = 921600;
2584 break;
1da177e4
LT		 2585 }
2586 }
1c45607a
JS		 2587 }
2588
2589 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2590 for (i = 0; i < brd->info->nports; i++) {
2591 if (i < 4)
2592 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2593 else
2594 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2595 }
1c45607a
JS		 2596 outb(0, ioaddress + 4); /* default set to RS232 mode */
2597 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2598 }
1c45607a
JS		 2599
2600 for (i = 0; i < brd->info->nports; i++) {
2601 brd->vector_mask |= (1 << i);
2602 brd->ports[i].baud_base = 921600;
2603 }
2604
2605 /* mxser_initbrd will hook ISR. */
2606 retval = mxser_initbrd(brd, pdev);
2607 if (retval)
df480518 2608 goto err_rel3;
1c45607a
JS		 2609
2610 for (i = 0; i < brd->info->nports; i++)
2611 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2612
2613 pci_set_drvdata(pdev, brd);
2614
2615 return 0;
df480518
JS		 2616err_rel3:
2617 pci_release_region(pdev, 3);
2618err_zero:
1c45607a 2619 brd->info = NULL;
df480518
JS		 2620 pci_release_region(pdev, 2);
2621err_dis:
2622 pci_disable_device(pdev);
1c45607a
JS		 2623err:
2624 return retval;
2625#else
2626 return -ENODEV;
2627#endif
1da177e4
LT		 2628}
2629
1c45607a 2630static void __devexit mxser_remove(struct pci_dev *pdev)
1da177e4 2631{
df480518 2632#ifdef CONFIG_PCI
1c45607a
JS		 2633 struct mxser_board *brd = pci_get_drvdata(pdev);
2634 unsigned int i;
1da177e4 2635
1c45607a
JS		 2636 for (i = 0; i < brd->info->nports; i++)
2637 tty_unregister_device(mxvar_sdriver, brd->idx + i);
1da177e4 2638
df480518
JS		 2639 free_irq(pdev->irq, brd);
2640 pci_release_region(pdev, 2);
2641 pci_release_region(pdev, 3);
2642 pci_disable_device(pdev);
1c45607a 2643 brd->info = NULL;
df480518 2644#endif
1da177e4
LT		 2645}
2646
1c45607a
JS		 2647static struct pci_driver mxser_driver = {
2648 .name = "mxser",
2649 .id_table = mxser_pcibrds,
2650 .probe = mxser_probe,
2651 .remove = __devexit_p(mxser_remove)
2652};
2653
2654static int __init mxser_module_init(void)
1da177e4 2655{
1c45607a 2656 struct mxser_board *brd;
1df00924
JS		 2657 unsigned int b, i, m;
2658 int retval;
1da177e4 2659
1c45607a
JS		 2660 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2661 if (!mxvar_sdriver)
2662 return -ENOMEM;
2663
2664 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2665 MXSER_VERSION);
2666
2667 /* Initialize the tty_driver structure */
2668 mxvar_sdriver->owner = THIS_MODULE;
2669 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2670 mxvar_sdriver->name = "ttyMI";
2671 mxvar_sdriver->major = ttymajor;
2672 mxvar_sdriver->minor_start = 0;
2673 mxvar_sdriver->num = MXSER_PORTS + 1;
2674 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2675 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2676 mxvar_sdriver->init_termios = tty_std_termios;
2677 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2678 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2679 tty_set_operations(mxvar_sdriver, &mxser_ops);
2680
2681 retval = tty_register_driver(mxvar_sdriver);
2682 if (retval) {
2683 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2684 "tty driver !\n");
2685 goto err_put;
1da177e4 2686 }
1c45607a 2687
1c45607a 2688 /* Start finding ISA boards here */
1df00924
JS		 2689 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2690 if (!ioaddr[b])
2691 continue;
2692
2693 brd = &mxser_boards[m];
96050dfb 2694 retval = mxser_get_ISA_conf(ioaddr[b], brd);
1df00924
JS		 2695 if (retval <= 0) {
2696 brd->info = NULL;
2697 continue;
2698 }
1c45607a 2699
1df00924
JS		 2700 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2701 brd->info->name, ioaddr[b]);
83766bc6 2702
1df00924
JS		 2703 /* mxser_initbrd will hook ISR. */
2704 if (mxser_initbrd(brd, NULL) < 0) {
2705 brd->info = NULL;
2706 continue;
2707 }
1c45607a 2708
1df00924
JS		 2709 brd->idx = m * MXSER_PORTS_PER_BOARD;
2710 for (i = 0; i < brd->info->nports; i++)
2711 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
1c45607a 2712
1df00924
JS		 2713 m++;
2714 }
1c45607a
JS		 2715
2716 retval = pci_register_driver(&mxser_driver);
2717 if (retval) {
83766bc6 2718 printk(KERN_ERR "mxser: can't register pci driver\n");
1c45607a
JS		 2719 if (!m) {
2720 retval = -ENODEV;
2721 goto err_unr;
2722 } /* else: we have some ISA cards under control */
2723 }
2724
1c45607a
JS		 2725 return 0;
2726err_unr:
2727 tty_unregister_driver(mxvar_sdriver);
2728err_put:
2729 put_tty_driver(mxvar_sdriver);
2730 return retval;
2731}
2732
2733static void __exit mxser_module_exit(void)
2734{
2735 unsigned int i, j;
2736
1c45607a
JS		 2737 pci_unregister_driver(&mxser_driver);
2738
2739 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2740 if (mxser_boards[i].info != NULL)
2741 for (j = 0; j < mxser_boards[i].info->nports; j++)
2742 tty_unregister_device(mxvar_sdriver,
2743 mxser_boards[i].idx + j);
2744 tty_unregister_driver(mxvar_sdriver);
2745 put_tty_driver(mxvar_sdriver);
2746
2747 for (i = 0; i < MXSER_BOARDS; i++)
2748 if (mxser_boards[i].info != NULL)
df480518 2749 mxser_release_ISA_res(&mxser_boards[i]);
1da177e4
LT		 2750}
2751
2752module_init(mxser_module_init);
2753module_exit(mxser_module_exit);
Linux kernel - Deliverables
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