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[deliverable/linux.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 12 * (at your option) any later version.
1da177e4
LT		 13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
1da177e4 39#include <linux/module.h>
1da177e4
LT		 40#include <linux/autoconf.h>
41#include <linux/errno.h>
42#include <linux/signal.h>
43#include <linux/sched.h>
44#include <linux/timer.h>
45#include <linux/interrupt.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48#include <linux/serial.h>
49#include <linux/serial_reg.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/gfp.h>
55#include <linux/ioport.h>
56#include <linux/mm.h>
57#include <linux/smp_lock.h>
58#include <linux/delay.h>
59#include <linux/pci.h>
60
61#include <asm/system.h>
62#include <asm/io.h>
63#include <asm/irq.h>
1da177e4
LT		 64#include <asm/bitops.h>
65#include <asm/uaccess.h>
66
67#include "mxser.h"
68
69#define MXSER_VERSION "1.8"
70#define MXSERMAJOR 174
71#define MXSERCUMAJOR 175
72
8ea2c2ec
JJ		 73#define MXSER_EVENT_TXLOW 1
74#define MXSER_EVENT_HANGUP 2
1da177e4
LT		 75
76#define MXSER_BOARDS 4 /* Max. boards */
77#define MXSER_PORTS 32 /* Max. ports */
78#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
79#define MXSER_ISR_PASS_LIMIT 256
80
81#define MXSER_ERR_IOADDR -1
82#define MXSER_ERR_IRQ -2
83#define MXSER_ERR_IRQ_CONFLIT -3
84#define MXSER_ERR_VECTOR -4
85
86#define SERIAL_TYPE_NORMAL 1
87#define SERIAL_TYPE_CALLOUT 2
88
89#define WAKEUP_CHARS 256
90
91#define UART_MCR_AFE 0x20
92#define UART_LSR_SPECIAL 0x1E
93
8ea2c2ec
JJ		 94#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
95 IXON|IXOFF))
1da177e4 96
0f2ed4c6 97#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
1da177e4
LT		 98
99#define C168_ASIC_ID 1
100#define C104_ASIC_ID 2
101#define C102_ASIC_ID 0xB
102#define CI132_ASIC_ID 4
103#define CI134_ASIC_ID 3
104#define CI104J_ASIC_ID 5
105
106enum {
107 MXSER_BOARD_C168_ISA = 1,
108 MXSER_BOARD_C104_ISA,
109 MXSER_BOARD_CI104J,
110 MXSER_BOARD_C168_PCI,
111 MXSER_BOARD_C104_PCI,
112 MXSER_BOARD_C102_ISA,
113 MXSER_BOARD_CI132,
114 MXSER_BOARD_CI134,
115 MXSER_BOARD_CP132,
116 MXSER_BOARD_CP114,
117 MXSER_BOARD_CT114,
118 MXSER_BOARD_CP102,
119 MXSER_BOARD_CP104U,
120 MXSER_BOARD_CP168U,
121 MXSER_BOARD_CP132U,
122 MXSER_BOARD_CP134U,
123 MXSER_BOARD_CP104JU,
124 MXSER_BOARD_RC7000,
125 MXSER_BOARD_CP118U,
126 MXSER_BOARD_CP102UL,
127 MXSER_BOARD_CP102U,
128};
129
130static char *mxser_brdname[] = {
131 "C168 series",
132 "C104 series",
133 "CI-104J series",
134 "C168H/PCI series",
135 "C104H/PCI series",
136 "C102 series",
137 "CI-132 series",
138 "CI-134 series",
139 "CP-132 series",
140 "CP-114 series",
141 "CT-114 series",
142 "CP-102 series",
143 "CP-104U series",
144 "CP-168U series",
145 "CP-132U series",
146 "CP-134U series",
147 "CP-104JU series",
148 "Moxa UC7000 Serial",
149 "CP-118U series",
150 "CP-102UL series",
151 "CP-102U series",
152};
153
154static int mxser_numports[] = {
8ea2c2ec
JJ		 155 8, /* C168-ISA */
156 4, /* C104-ISA */
157 4, /* CI104J */
158 8, /* C168-PCI */
159 4, /* C104-PCI */
160 2, /* C102-ISA */
161 2, /* CI132 */
162 4, /* CI134 */
163 2, /* CP132 */
164 4, /* CP114 */
165 4, /* CT114 */
166 2, /* CP102 */
167 4, /* CP104U */
168 8, /* CP168U */
169 2, /* CP132U */
170 4, /* CP134U */
171 4, /* CP104JU */
172 8, /* RC7000 */
173 8, /* CP118U */
174 2, /* CP102UL */
175 2, /* CP102U */
1da177e4
LT		 176};
177
178#define UART_TYPE_NUM 2
179
180static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
181 MOXA_MUST_MU150_HWID,
182 MOXA_MUST_MU860_HWID
183};
184
8ea2c2ec 185/* This is only for PCI */
1da177e4
LT		 186#define UART_INFO_NUM 3
187struct mxpciuart_info {
188 int type;
189 int tx_fifo;
190 int rx_fifo;
191 int xmit_fifo_size;
192 int rx_high_water;
193 int rx_trigger;
194 int rx_low_water;
195 long max_baud;
196};
197
198static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
199 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
200 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
201 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
202};
203
204
205#ifdef CONFIG_PCI
206
207static struct pci_device_id mxser_pcibrds[] = {
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
220 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
221 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
222 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
223 {0}
224};
225
226MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
227
228
229#endif
230
231typedef struct _moxa_pci_info {
232 unsigned short busNum;
233 unsigned short devNum;
8ea2c2ec 234 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
1da177e4
LT		 235} moxa_pci_info;
236
237static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
238static int ttymajor = MXSERMAJOR;
239static int calloutmajor = MXSERCUMAJOR;
240static int verbose = 0;
241
242/* Variables for insmod */
243
244MODULE_AUTHOR("Casper Yang");
245MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 246module_param_array(ioaddr, int, NULL, 0);
247module_param(ttymajor, int, 0);
248module_param(calloutmajor, int, 0);
249module_param(verbose, bool, 0);
1da177e4
LT		 250MODULE_LICENSE("GPL");
251
252struct mxser_log {
253 int tick;
254 unsigned long rxcnt[MXSER_PORTS];
255 unsigned long txcnt[MXSER_PORTS];
256};
257
258
259struct mxser_mon {
260 unsigned long rxcnt;
261 unsigned long txcnt;
262 unsigned long up_rxcnt;
263 unsigned long up_txcnt;
264 int modem_status;
265 unsigned char hold_reason;
266};
267
268struct mxser_mon_ext {
269 unsigned long rx_cnt[32];
270 unsigned long tx_cnt[32];
271 unsigned long up_rxcnt[32];
272 unsigned long up_txcnt[32];
273 int modem_status[32];
274
275 long baudrate[32];
276 int databits[32];
277 int stopbits[32];
278 int parity[32];
279 int flowctrl[32];
280 int fifo[32];
281 int iftype[32];
282};
8ea2c2ec 283
1da177e4
LT		 284struct mxser_hwconf {
285 int board_type;
286 int ports;
287 int irq;
288 int vector;
289 int vector_mask;
290 int uart_type;
291 int ioaddr[MXSER_PORTS_PER_BOARD];
292 int baud_base[MXSER_PORTS_PER_BOARD];
293 moxa_pci_info pciInfo;
8ea2c2ec
JJ		 294 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
295 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
296 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 297};
298
299struct mxser_struct {
300 int port;
301 int base; /* port base address */
302 int irq; /* port using irq no. */
303 int vector; /* port irq vector */
304 int vectormask; /* port vector mask */
305 int rx_high_water;
306 int rx_trigger; /* Rx fifo trigger level */
307 int rx_low_water;
308 int baud_base; /* max. speed */
309 int flags; /* defined in tty.h */
310 int type; /* UART type */
311 struct tty_struct *tty;
312 int read_status_mask;
313 int ignore_status_mask;
314 int xmit_fifo_size;
315 int custom_divisor;
316 int x_char; /* xon/xoff character */
317 int close_delay;
318 unsigned short closing_wait;
319 int IER; /* Interrupt Enable Register */
320 int MCR; /* Modem control register */
321 unsigned long event;
322 int count; /* # of fd on device */
323 int blocked_open; /* # of blocked opens */
324 long session; /* Session of opening process */
325 long pgrp; /* pgrp of opening process */
326 unsigned char *xmit_buf;
327 int xmit_head;
328 int xmit_tail;
329 int xmit_cnt;
330 struct work_struct tqueue;
331 struct termios normal_termios;
332 struct termios callout_termios;
333 wait_queue_head_t open_wait;
334 wait_queue_head_t close_wait;
335 wait_queue_head_t delta_msr_wait;
336 struct async_icount icount; /* kernel counters for the 4 input interrupts */
337 int timeout;
8ea2c2ec
JJ		 338 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
339 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
340 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 341 unsigned char stop_rx;
342 unsigned char ldisc_stop_rx;
343 long realbaud;
344 struct mxser_mon mon_data;
345 unsigned char err_shadow;
346 spinlock_t slock;
347};
348
1da177e4
LT		 349struct mxser_mstatus {
350 tcflag_t cflag;
351 int cts;
352 int dsr;
353 int ri;
354 int dcd;
355};
356
357static struct mxser_mstatus GMStatus[MXSER_PORTS];
358
359static int mxserBoardCAP[MXSER_BOARDS] = {
360 0, 0, 0, 0
8ea2c2ec 361 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 362};
363
364static struct tty_driver *mxvar_sdriver;
365static struct mxser_struct mxvar_table[MXSER_PORTS];
366static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
367static struct termios *mxvar_termios[MXSER_PORTS + 1];
368static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
369static struct mxser_log mxvar_log;
370static int mxvar_diagflag;
371static unsigned char mxser_msr[MXSER_PORTS + 1];
372static struct mxser_mon_ext mon_data_ext;
373static int mxser_set_baud_method[MXSER_PORTS + 1];
374static spinlock_t gm_lock;
375
376/*
377 * This is used to figure out the divisor speeds and the timeouts
378 */
379
380static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
381
382/*
383 * static functions:
384 */
385
386static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
387static int mxser_init(void);
388
8ea2c2ec 389/* static void mxser_poll(unsigned long); */
1da177e4
LT		 390static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
391static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
c4028958 392static void mxser_do_softint(struct work_struct *);
1da177e4
LT		 393static int mxser_open(struct tty_struct *, struct file *);
394static void mxser_close(struct tty_struct *, struct file *);
395static int mxser_write(struct tty_struct *, const unsigned char *, int);
396static int mxser_write_room(struct tty_struct *);
397static void mxser_flush_buffer(struct tty_struct *);
398static int mxser_chars_in_buffer(struct tty_struct *);
399static void mxser_flush_chars(struct tty_struct *);
400static void mxser_put_char(struct tty_struct *, unsigned char);
401static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
402static int mxser_ioctl_special(unsigned int, void __user *);
403static void mxser_throttle(struct tty_struct *);
404static void mxser_unthrottle(struct tty_struct *);
405static void mxser_set_termios(struct tty_struct *, struct termios *);
406static void mxser_stop(struct tty_struct *);
407static void mxser_start(struct tty_struct *);
408static void mxser_hangup(struct tty_struct *);
409static void mxser_rs_break(struct tty_struct *, int);
7d12e780 410static irqreturn_t mxser_interrupt(int, void *);
1da177e4
LT		 411static void mxser_receive_chars(struct mxser_struct *, int *);
412static void mxser_transmit_chars(struct mxser_struct *);
413static void mxser_check_modem_status(struct mxser_struct *, int);
414static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
415static int mxser_startup(struct mxser_struct *);
416static void mxser_shutdown(struct mxser_struct *);
417static int mxser_change_speed(struct mxser_struct *, struct termios *old_termios);
418static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
419static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
420static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
421static void mxser_send_break(struct mxser_struct *, int);
422static int mxser_tiocmget(struct tty_struct *, struct file *);
423static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
424static int mxser_set_baud(struct mxser_struct *info, long newspd);
425static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
426
427static void mxser_startrx(struct tty_struct *tty);
428static void mxser_stoprx(struct tty_struct *tty);
429
430
431static int CheckIsMoxaMust(int io)
432{
433 u8 oldmcr, hwid;
434 int i;
435
436 outb(0, io + UART_LCR);
437 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
438 oldmcr = inb(io + UART_MCR);
439 outb(0, io + UART_MCR);
440 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
441 if ((hwid = inb(io + UART_MCR)) != 0) {
442 outb(oldmcr, io + UART_MCR);
8ea2c2ec 443 return MOXA_OTHER_UART;
1da177e4
LT		 444 }
445
446 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
447 for (i = 0; i < UART_TYPE_NUM; i++) {
448 if (hwid == Gmoxa_uart_id[i])
8ea2c2ec 449 return (int)hwid;
1da177e4
LT		 450 }
451 return MOXA_OTHER_UART;
452}
453
8ea2c2ec 454/* above is modified by Victor Yu. 08-15-2002 */
1da177e4 455
b68e31d0 456static const struct tty_operations mxser_ops = {
1da177e4
LT		 457 .open = mxser_open,
458 .close = mxser_close,
459 .write = mxser_write,
460 .put_char = mxser_put_char,
461 .flush_chars = mxser_flush_chars,
462 .write_room = mxser_write_room,
463 .chars_in_buffer = mxser_chars_in_buffer,
464 .flush_buffer = mxser_flush_buffer,
465 .ioctl = mxser_ioctl,
466 .throttle = mxser_throttle,
467 .unthrottle = mxser_unthrottle,
468 .set_termios = mxser_set_termios,
469 .stop = mxser_stop,
470 .start = mxser_start,
471 .hangup = mxser_hangup,
57432345
KS		 472 .break_ctl = mxser_rs_break,
473 .wait_until_sent = mxser_wait_until_sent,
1da177e4
LT		 474 .tiocmget = mxser_tiocmget,
475 .tiocmset = mxser_tiocmset,
476};
477
478/*
479 * The MOXA Smartio/Industio serial driver boot-time initialization code!
480 */
481
482static int __init mxser_module_init(void)
483{
484 int ret;
485
486 if (verbose)
487 printk(KERN_DEBUG "Loading module mxser ...\n");
488 ret = mxser_init();
489 if (verbose)
490 printk(KERN_DEBUG "Done.\n");
491 return ret;
492}
493
494static void __exit mxser_module_exit(void)
495{
64698b69 496 int i, err;
1da177e4
LT		 497
498 if (verbose)
499 printk(KERN_DEBUG "Unloading module mxser ...\n");
500
64698b69
KS		 501 err = tty_unregister_driver(mxvar_sdriver);
502 if (!err)
503 put_tty_driver(mxvar_sdriver);
504 else
1da177e4
LT		 505 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
506
507 for (i = 0; i < MXSER_BOARDS; i++) {
508 struct pci_dev *pdev;
509
510 if (mxsercfg[i].board_type == -1)
511 continue;
512 else {
513 pdev = mxsercfg[i].pciInfo.pdev;
514 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 515 if (pdev != NULL) { /* PCI */
1da177e4
LT		 516 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
517 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
518 } else {
519 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
520 release_region(mxsercfg[i].vector, 1);
521 }
522 }
523 }
524 if (verbose)
525 printk(KERN_DEBUG "Done.\n");
1da177e4
LT		 526}
527
528static void process_txrx_fifo(struct mxser_struct *info)
529{
530 int i;
531
532 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
533 info->rx_trigger = 1;
534 info->rx_high_water = 1;
535 info->rx_low_water = 1;
536 info->xmit_fifo_size = 1;
537 } else {
538 for (i = 0; i < UART_INFO_NUM; i++) {
539 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
540 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
541 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
542 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
543 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
544 break;
545 }
546 }
547 }
548}
549
550static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
551{
552 struct mxser_struct *info;
553 int retval;
554 int i, n;
555
556 n = board * MXSER_PORTS_PER_BOARD;
557 info = &mxvar_table[n];
558 /*if (verbose) */ {
8ea2c2ec
JJ		 559 printk(KERN_DEBUG " ttyM%d - ttyM%d ",
560 n, n + hwconf->ports - 1);
561 printk(" max. baud rate = %d bps.\n",
562 hwconf->MaxCanSetBaudRate[0]);
1da177e4
LT		 563 }
564
565 for (i = 0; i < hwconf->ports; i++, n++, info++) {
566 info->port = n;
567 info->base = hwconf->ioaddr[i];
568 info->irq = hwconf->irq;
569 info->vector = hwconf->vector;
570 info->vectormask = hwconf->vector_mask;
8ea2c2ec 571 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 572 info->stop_rx = 0;
573 info->ldisc_stop_rx = 0;
574
575 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
8ea2c2ec 576 /* Enhance mode enabled here */
1da177e4
LT		 577 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
578 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
579 }
580
581 info->flags = ASYNC_SHARE_IRQ;
582 info->type = hwconf->uart_type;
583 info->baud_base = hwconf->baud_base[i];
584
585 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
586
587 process_txrx_fifo(info);
588
589
590 info->custom_divisor = hwconf->baud_base[i] * 16;
591 info->close_delay = 5 * HZ / 10;
592 info->closing_wait = 30 * HZ;
c4028958 593 INIT_WORK(&info->tqueue, mxser_do_softint);
1da177e4
LT		 594 info->normal_termios = mxvar_sdriver->init_termios;
595 init_waitqueue_head(&info->open_wait);
596 init_waitqueue_head(&info->close_wait);
597 init_waitqueue_head(&info->delta_msr_wait);
598 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
599 info->err_shadow = 0;
600 spin_lock_init(&info->slock);
601 }
602 /*
603 * Allocate the IRQ if necessary
604 */
605
606
607 /* before set INT ISR, disable all int */
608 for (i = 0; i < hwconf->ports; i++) {
8ea2c2ec
JJ		 609 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
610 hwconf->ioaddr[i] + UART_IER);
1da177e4
LT		 611 }
612
613 n = board * MXSER_PORTS_PER_BOARD;
614 info = &mxvar_table[n];
615
8ea2c2ec
JJ		 616 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
617 "mxser", info);
1da177e4 618 if (retval) {
8ea2c2ec
JJ		 619 printk(KERN_ERR "Board %d: %s",
620 board, mxser_brdname[hwconf->board_type - 1]);
621 printk(" Request irq failed, IRQ (%d) may conflict with"
622 " another device.\n", info->irq);
1da177e4
LT		 623 return retval;
624 }
625 return 0;
626}
627
1da177e4
LT		 628static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
629{
630 mxsercfg[board] = *hwconf;
631}
632
633#ifdef CONFIG_PCI
634static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
635{
636 int i, j;
8ea2c2ec 637 /* unsigned int val; */
1da177e4
LT		 638 unsigned int ioaddress;
639 struct pci_dev *pdev = hwconf->pciInfo.pdev;
640
8ea2c2ec 641 /* io address */
1da177e4
LT		 642 hwconf->board_type = board_type;
643 hwconf->ports = mxser_numports[board_type - 1];
644 ioaddress = pci_resource_start(pdev, 2);
8ea2c2ec
JJ		 645 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
646 "mxser(IO)");
1da177e4 647
8ea2c2ec 648 for (i = 0; i < hwconf->ports; i++)
1da177e4 649 hwconf->ioaddr[i] = ioaddress + 8 * i;
1da177e4 650
8ea2c2ec 651 /* vector */
1da177e4 652 ioaddress = pci_resource_start(pdev, 3);
8ea2c2ec
JJ		 653 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
654 "mxser(vector)");
1da177e4
LT		 655 hwconf->vector = ioaddress;
656
8ea2c2ec 657 /* irq */
1da177e4
LT		 658 hwconf->irq = hwconf->pciInfo.pdev->irq;
659
660 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
661 hwconf->uart_type = PORT_16550A;
662 hwconf->vector_mask = 0;
663
664
665 for (i = 0; i < hwconf->ports; i++) {
666 for (j = 0; j < UART_INFO_NUM; j++) {
667 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
668 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
669
8ea2c2ec 670 /* exception....CP-102 */
1da177e4
LT		 671 if (board_type == MXSER_BOARD_CP102)
672 hwconf->MaxCanSetBaudRate[i] = 921600;
673 break;
674 }
675 }
676 }
677
678 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
679 for (i = 0; i < hwconf->ports; i++) {
680 if (i < 4)
681 hwconf->opmode_ioaddr[i] = ioaddress + 4;
682 else
683 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
684 }
8ea2c2ec
JJ		 685 outb(0, ioaddress + 4); /* default set to RS232 mode */
686 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4
LT		 687 }
688
689 for (i = 0; i < hwconf->ports; i++) {
690 hwconf->vector_mask |= (1 << i);
691 hwconf->baud_base[i] = 921600;
692 }
8ea2c2ec 693 return 0;
1da177e4
LT		 694}
695#endif
696
697static int mxser_init(void)
698{
699 int i, m, retval, b, n;
1da177e4
LT		 700 struct pci_dev *pdev = NULL;
701 int index;
702 unsigned char busnum, devnum;
703 struct mxser_hwconf hwconf;
704
705 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
706 if (!mxvar_sdriver)
707 return -ENOMEM;
708 spin_lock_init(&gm_lock);
709
710 for (i = 0; i < MXSER_BOARDS; i++) {
711 mxsercfg[i].board_type = -1;
712 }
713
8ea2c2ec
JJ		 714 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
715 MXSER_VERSION);
1da177e4
LT		 716
717 /* Initialize the tty_driver structure */
718 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
719 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
720 mxvar_sdriver->name = "ttyM";
721 mxvar_sdriver->major = ttymajor;
722 mxvar_sdriver->minor_start = 0;
723 mxvar_sdriver->num = MXSER_PORTS + 1;
724 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
725 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
726 mxvar_sdriver->init_termios = tty_std_termios;
8ea2c2ec 727 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
1da177e4
LT		 728 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
729 tty_set_operations(mxvar_sdriver, &mxser_ops);
730 mxvar_sdriver->ttys = mxvar_tty;
731 mxvar_sdriver->termios = mxvar_termios;
732 mxvar_sdriver->termios_locked = mxvar_termios_locked;
733
1da177e4
LT		 734 mxvar_diagflag = 0;
735 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
736 memset(&mxvar_log, 0, sizeof(struct mxser_log));
737
738 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
739 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
740 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
741 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
742
743 m = 0;
744 /* Start finding ISA boards here */
745 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
746 int cap;
8ea2c2ec 747
1da177e4
LT		 748 if (!(cap = mxserBoardCAP[b]))
749 continue;
750
751 retval = mxser_get_ISA_conf(cap, &hwconf);
752
753 if (retval != 0)
8ea2c2ec
JJ		 754 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
755 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 756
757 if (retval <= 0) {
758 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 759 printk(KERN_ERR "Invalid interrupt number, "
760 "board not configured\n");
1da177e4 761 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 762 printk(KERN_ERR "Invalid interrupt number, "
763 "board not configured\n");
1da177e4 764 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 765 printk(KERN_ERR "Invalid interrupt vector, "
766 "board not configured\n");
1da177e4 767 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 768 printk(KERN_ERR "Invalid I/O address, "
769 "board not configured\n");
1da177e4
LT		 770
771 continue;
772 }
773
774 hwconf.pciInfo.busNum = 0;
775 hwconf.pciInfo.devNum = 0;
776 hwconf.pciInfo.pdev = NULL;
777
778 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 779 /*
780 * init mxsercfg first,
781 * or mxsercfg data is not correct on ISR.
782 */
783 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 784 if (mxser_initbrd(m, &hwconf) < 0)
785 continue;
786
1da177e4
LT		 787 m++;
788 }
789
790 /* Start finding ISA boards from module arg */
791 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
792 int cap;
8ea2c2ec 793
1da177e4
LT		 794 if (!(cap = ioaddr[b]))
795 continue;
796
797 retval = mxser_get_ISA_conf(cap, &hwconf);
798
799 if (retval != 0)
8ea2c2ec
JJ		 800 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
801 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 802
803 if (retval <= 0) {
804 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 805 printk(KERN_ERR "Invalid interrupt number, "
806 "board not configured\n");
1da177e4 807 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 808 printk(KERN_ERR "Invalid interrupt number, "
809 "board not configured\n");
1da177e4 810 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 811 printk(KERN_ERR "Invalid interrupt vector, "
812 "board not configured\n");
1da177e4 813 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 814 printk(KERN_ERR "Invalid I/O address, "
815 "board not configured\n");
1da177e4
LT		 816
817 continue;
818 }
819
820 hwconf.pciInfo.busNum = 0;
821 hwconf.pciInfo.devNum = 0;
822 hwconf.pciInfo.pdev = NULL;
823
824 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 825 /*
826 * init mxsercfg first,
827 * or mxsercfg data is not correct on ISR.
828 */
829 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 830 if (mxser_initbrd(m, &hwconf) < 0)
831 continue;
832
833 m++;
834 }
835
836 /* start finding PCI board here */
837#ifdef CONFIG_PCI
fe971071 838 n = ARRAY_SIZE(mxser_pcibrds) - 1;
1da177e4
LT		 839 index = 0;
840 b = 0;
841 while (b < n) {
8ea2c2ec
JJ		 842 pdev = pci_find_device(mxser_pcibrds[b].vendor,
843 mxser_pcibrds[b].device, pdev);
1da177e4
LT		 844 if (pdev == NULL) {
845 b++;
846 continue;
847 }
848 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
849 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
850 hwconf.pciInfo.pdev = pdev;
8ea2c2ec
JJ		 851 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
852 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
853 busnum, devnum >> 3);
1da177e4 854 index++;
8ea2c2ec
JJ		 855 if (m >= MXSER_BOARDS)
856 printk(KERN_ERR
857 "Too many Smartio/Industio family boards find "
858 "(maximum %d), board not configured\n",
859 MXSER_BOARDS);
860 else {
1da177e4 861 if (pci_enable_device(pdev)) {
8ea2c2ec
JJ		 862 printk(KERN_ERR "Moxa SmartI/O PCI enable "
863 "fail !\n");
1da177e4
LT		 864 continue;
865 }
8ea2c2ec
JJ		 866 retval = mxser_get_PCI_conf(busnum, devnum,
867 (int)mxser_pcibrds[b].driver_data,
868 &hwconf);
1da177e4
LT		 869 if (retval < 0) {
870 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 871 printk(KERN_ERR
872 "Invalid interrupt number, "
873 "board not configured\n");
1da177e4 874 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 875 printk(KERN_ERR
876 "Invalid interrupt number, "
877 "board not configured\n");
1da177e4 878 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 879 printk(KERN_ERR
880 "Invalid interrupt vector, "
881 "board not configured\n");
1da177e4 882 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 883 printk(KERN_ERR
884 "Invalid I/O address, "
885 "board not configured\n");
1da177e4
LT		 886 continue;
887 }
888 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 889 /* init mxsercfg first,
890 * or mxsercfg data is not correct on ISR.
891 */
892 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 893 if (mxser_initbrd(m, &hwconf) < 0)
894 continue;
895 m++;
896 }
897 }
898#endif
899
64698b69
KS		 900 retval = tty_register_driver(mxvar_sdriver);
901 if (retval) {
8ea2c2ec
JJ		 902 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
903 " driver !\n");
64698b69 904 put_tty_driver(mxvar_sdriver);
1da177e4 905
1da177e4
LT		 906 for (i = 0; i < MXSER_BOARDS; i++) {
907 if (mxsercfg[i].board_type == -1)
908 continue;
909 else {
910 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 911 /* todo: release io, vector */
1da177e4
LT		 912 }
913 }
64698b69 914 return retval;
1da177e4
LT		 915 }
916
64698b69 917 return 0;
1da177e4
LT		 918}
919
c4028958 920static void mxser_do_softint(struct work_struct *work)
1da177e4 921{
c4028958
DH		 922 struct mxser_struct *info =
923 container_of(work, struct mxser_struct, tqueue);
1da177e4
LT		 924 struct tty_struct *tty;
925
926 tty = info->tty;
927
928 if (tty) {
929 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
930 tty_wakeup(tty);
931 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
932 tty_hangup(tty);
933 }
934}
935
936static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
937{
938 unsigned char status = 0;
939
940 status = inb(baseaddr + UART_MSR);
941
942 mxser_msr[port] &= 0x0F;
943 mxser_msr[port] |= status;
944 status = mxser_msr[port];
945 if (mode)
946 mxser_msr[port] = 0;
947
948 return status;
949}
950
951/*
952 * This routine is called whenever a serial port is opened. It
953 * enables interrupts for a serial port, linking in its async structure into
954 * the IRQ chain. It also performs the serial-specific
955 * initialization for the tty structure.
956 */
957static int mxser_open(struct tty_struct *tty, struct file *filp)
958{
959 struct mxser_struct *info;
960 int retval, line;
961
6f08b72c
KS		 962 /* initialize driver_data in case something fails */
963 tty->driver_data = NULL;
964
1da177e4
LT		 965 line = tty->index;
966 if (line == MXSER_PORTS)
967 return 0;
968 if (line < 0 || line > MXSER_PORTS)
969 return -ENODEV;
970 info = mxvar_table + line;
971 if (!info->base)
8ea2c2ec 972 return -ENODEV;
1da177e4
LT		 973
974 tty->driver_data = info;
975 info->tty = tty;
976 /*
977 * Start up serial port
978 */
979 retval = mxser_startup(info);
980 if (retval)
8ea2c2ec 981 return retval;
1da177e4
LT		 982
983 retval = mxser_block_til_ready(tty, filp, info);
984 if (retval)
8ea2c2ec 985 return retval;
1da177e4
LT		 986
987 info->count++;
988
989 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
990 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
991 *tty->termios = info->normal_termios;
992 else
993 *tty->termios = info->callout_termios;
994 mxser_change_speed(info, NULL);
995 }
996
997 info->session = current->signal->session;
998 info->pgrp = process_group(current);
1da177e4 999
8ea2c2ec
JJ		 1000 /*
1001 status = mxser_get_msr(info->base, 0, info->port);
1002 mxser_check_modem_status(info, status);
1003 */
1da177e4 1004
8ea2c2ec 1005/* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1006 tty->low_latency = 1;
1007 return 0;
1008}
1009
1010/*
1011 * This routine is called when the serial port gets closed. First, we
1012 * wait for the last remaining data to be sent. Then, we unlink its
1013 * async structure from the interrupt chain if necessary, and we free
1014 * that IRQ if nothing is left in the chain.
1015 */
1016static void mxser_close(struct tty_struct *tty, struct file *filp)
1017{
56e139f6 1018 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1019
1020 unsigned long timeout;
1021 unsigned long flags;
1022 struct tty_ldisc *ld;
1023
1024 if (tty->index == MXSER_PORTS)
1025 return;
1026 if (!info)
6f08b72c 1027 return;
1da177e4
LT		 1028
1029 spin_lock_irqsave(&info->slock, flags);
1030
1031 if (tty_hung_up_p(filp)) {
1032 spin_unlock_irqrestore(&info->slock, flags);
1033 return;
1034 }
1035 if ((tty->count == 1) && (info->count != 1)) {
1036 /*
1037 * Uh, oh. tty->count is 1, which means that the tty
1038 * structure will be freed. Info->count should always
1039 * be one in these conditions. If it's greater than
1040 * one, we've got real problems, since it means the
1041 * serial port won't be shutdown.
1042 */
8ea2c2ec
JJ		 1043 printk(KERN_ERR "mxser_close: bad serial port count; "
1044 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 1045 info->count = 1;
1046 }
1047 if (--info->count < 0) {
8ea2c2ec
JJ		 1048 printk(KERN_ERR "mxser_close: bad serial port count for "
1049 "ttys%d: %d\n", info->port, info->count);
1da177e4
LT		 1050 info->count = 0;
1051 }
1052 if (info->count) {
1053 spin_unlock_irqrestore(&info->slock, flags);
1054 return;
1055 }
1056 info->flags |= ASYNC_CLOSING;
1057 spin_unlock_irqrestore(&info->slock, flags);
1058 /*
1059 * Save the termios structure, since this port may have
1060 * separate termios for callout and dialin.
1061 */
1062 if (info->flags & ASYNC_NORMAL_ACTIVE)
1063 info->normal_termios = *tty->termios;
1064 /*
1065 * Now we wait for the transmit buffer to clear; and we notify
1066 * the line discipline to only process XON/XOFF characters.
1067 */
1068 tty->closing = 1;
1069 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1070 tty_wait_until_sent(tty, info->closing_wait);
1071 /*
1072 * At this point we stop accepting input. To do this, we
1073 * disable the receive line status interrupts, and tell the
1074 * interrupt driver to stop checking the data ready bit in the
1075 * line status register.
1076 */
1077 info->IER &= ~UART_IER_RLSI;
1078 if (info->IsMoxaMustChipFlag)
1079 info->IER &= ~MOXA_MUST_RECV_ISR;
1080/* by William
1081 info->read_status_mask &= ~UART_LSR_DR;
1082*/
1083 if (info->flags & ASYNC_INITIALIZED) {
1084 outb(info->IER, info->base + UART_IER);
1085 /*
1086 * Before we drop DTR, make sure the UART transmitter
1087 * has completely drained; this is especially
1088 * important if there is a transmit FIFO!
1089 */
1090 timeout = jiffies + HZ;
1091 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1092 schedule_timeout_interruptible(5);
1da177e4
LT		 1093 if (time_after(jiffies, timeout))
1094 break;
1095 }
1096 }
1097 mxser_shutdown(info);
1098
1099 if (tty->driver->flush_buffer)
1100 tty->driver->flush_buffer(tty);
1101
1102 ld = tty_ldisc_ref(tty);
1103 if (ld) {
8ea2c2ec 1104 if (ld->flush_buffer)
1da177e4
LT		 1105 ld->flush_buffer(tty);
1106 tty_ldisc_deref(ld);
1107 }
1108
1109 tty->closing = 0;
1110 info->event = 0;
1111 info->tty = NULL;
1112 if (info->blocked_open) {
da4cd8df
NA		 1113 if (info->close_delay)
1114 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1115 wake_up_interruptible(&info->open_wait);
1116 }
1117
1118 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1119 wake_up_interruptible(&info->close_wait);
1120
1121}
1122
1123static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1124{
1125 int c, total = 0;
56e139f6 1126 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1127 unsigned long flags;
1128
8a7f7c93 1129 if (!info->xmit_buf)
8ea2c2ec 1130 return 0;
1da177e4
LT		 1131
1132 while (1) {
8ea2c2ec
JJ		 1133 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1134 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1135 if (c <= 0)
1136 break;
1137
1138 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1139 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1140 info->xmit_head = (info->xmit_head + c) &
1141 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1142 info->xmit_cnt += c;
1143 spin_unlock_irqrestore(&info->slock, flags);
1144
1145 buf += c;
1146 count -= c;
1147 total += c;
1da177e4
LT		 1148 }
1149
1150 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1151 if (!tty->hw_stopped ||
1152 (info->type == PORT_16550A) ||
1153 (info->IsMoxaMustChipFlag)) {
1da177e4
LT		 1154 spin_lock_irqsave(&info->slock, flags);
1155 info->IER |= UART_IER_THRI;
1156 outb(info->IER, info->base + UART_IER);
1157 spin_unlock_irqrestore(&info->slock, flags);
1158 }
1159 }
1160 return total;
1161}
1162
1163static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1164{
56e139f6 1165 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1166 unsigned long flags;
1167
8a7f7c93 1168 if (!info->xmit_buf)
1da177e4
LT		 1169 return;
1170
1171 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1172 return;
1173
1174 spin_lock_irqsave(&info->slock, flags);
1175 info->xmit_buf[info->xmit_head++] = ch;
1176 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1177 info->xmit_cnt++;
1178 spin_unlock_irqrestore(&info->slock, flags);
1179 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1180 if (!tty->hw_stopped ||
1181 (info->type == PORT_16550A) ||
1182 info->IsMoxaMustChipFlag) {
1da177e4
LT		 1183 spin_lock_irqsave(&info->slock, flags);
1184 info->IER |= UART_IER_THRI;
1185 outb(info->IER, info->base + UART_IER);
1186 spin_unlock_irqrestore(&info->slock, flags);
1187 }
1188 }
1189}
1190
1191
1192static void mxser_flush_chars(struct tty_struct *tty)
1193{
56e139f6 1194 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1195 unsigned long flags;
1196
8ea2c2ec
JJ		 1197 if (info->xmit_cnt <= 0 ||
1198 tty->stopped ||
1199 !info->xmit_buf ||
1200 (tty->hw_stopped &&
1201 (info->type != PORT_16550A) &&
1202 (!info->IsMoxaMustChipFlag)
1203 ))
1da177e4
LT		 1204 return;
1205
1206 spin_lock_irqsave(&info->slock, flags);
1207
1208 info->IER |= UART_IER_THRI;
1209 outb(info->IER, info->base + UART_IER);
1210
1211 spin_unlock_irqrestore(&info->slock, flags);
1212}
1213
1214static int mxser_write_room(struct tty_struct *tty)
1215{
56e139f6 1216 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1217 int ret;
1218
1219 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1220 if (ret < 0)
1221 ret = 0;
8ea2c2ec 1222 return ret;
1da177e4
LT		 1223}
1224
1225static int mxser_chars_in_buffer(struct tty_struct *tty)
1226{
56e139f6 1227 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1228 return info->xmit_cnt;
1229}
1230
1231static void mxser_flush_buffer(struct tty_struct *tty)
1232{
56e139f6 1233 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1234 char fcr;
1235 unsigned long flags;
1236
1237
1238 spin_lock_irqsave(&info->slock, flags);
1239 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1240
1241 /* below added by shinhay */
1242 fcr = inb(info->base + UART_FCR);
8ea2c2ec
JJ		 1243 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1244 info->base + UART_FCR);
1da177e4
LT		 1245 outb(fcr, info->base + UART_FCR);
1246
1247 spin_unlock_irqrestore(&info->slock, flags);
1248 /* above added by shinhay */
1249
1250 wake_up_interruptible(&tty->write_wait);
1251 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
1252 (tty->ldisc.write_wakeup) (tty);
1253}
1254
1255static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1256{
56e139f6 1257 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1258 int retval;
1259 struct async_icount cprev, cnow; /* kernel counter temps */
1260 struct serial_icounter_struct __user *p_cuser;
1261 unsigned long templ;
1262 unsigned long flags;
1263 void __user *argp = (void __user *)arg;
1264
1265 if (tty->index == MXSER_PORTS)
8ea2c2ec 1266 return mxser_ioctl_special(cmd, argp);
1da177e4 1267
8ea2c2ec 1268 /* following add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1269 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1270 int opmode, p;
1271 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1272 int shiftbit;
1273 unsigned char val, mask;
1274
1275 p = info->port % 4;
1276 if (cmd == MOXA_SET_OP_MODE) {
1277 if (get_user(opmode, (int __user *) argp))
1278 return -EFAULT;
8ea2c2ec
JJ		 1279 if (opmode != RS232_MODE &&
1280 opmode != RS485_2WIRE_MODE &&
1281 opmode != RS422_MODE &&
1282 opmode != RS485_4WIRE_MODE)
1da177e4
LT		 1283 return -EFAULT;
1284 mask = ModeMask[p];
1285 shiftbit = p * 2;
1286 val = inb(info->opmode_ioaddr);
1287 val &= mask;
1288 val |= (opmode << shiftbit);
1289 outb(val, info->opmode_ioaddr);
1290 } else {
1291 shiftbit = p * 2;
1292 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1293 opmode &= OP_MODE_MASK;
1294 if (copy_to_user(argp, &opmode, sizeof(int)))
1295 return -EFAULT;
1296 }
1297 return 0;
1298 }
8ea2c2ec 1299 /* above add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1300
1301 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1302 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 1303 return -EIO;
1da177e4
LT		 1304 }
1305 switch (cmd) {
1306 case TCSBRK: /* SVID version: non-zero arg --> no break */
1307 retval = tty_check_change(tty);
1308 if (retval)
8ea2c2ec 1309 return retval;
1da177e4
LT		 1310 tty_wait_until_sent(tty, 0);
1311 if (!arg)
1312 mxser_send_break(info, HZ / 4); /* 1/4 second */
8ea2c2ec 1313 return 0;
1da177e4
LT		 1314 case TCSBRKP: /* support for POSIX tcsendbreak() */
1315 retval = tty_check_change(tty);
1316 if (retval)
8ea2c2ec 1317 return retval;
1da177e4
LT		 1318 tty_wait_until_sent(tty, 0);
1319 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
8ea2c2ec 1320 return 0;
1da177e4 1321 case TIOCGSOFTCAR:
8ea2c2ec 1322 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1da177e4
LT		 1323 case TIOCSSOFTCAR:
1324 if (get_user(templ, (unsigned long __user *) argp))
1325 return -EFAULT;
1326 arg = templ;
1327 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
8ea2c2ec 1328 return 0;
1da177e4
LT		 1329 case TIOCGSERIAL:
1330 return mxser_get_serial_info(info, argp);
1331 case TIOCSSERIAL:
1332 return mxser_set_serial_info(info, argp);
1333 case TIOCSERGETLSR: /* Get line status register */
1334 return mxser_get_lsr_info(info, argp);
1335 /*
1336 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1337 * - mask passed in arg for lines of interest
1338 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1339 * Caller should use TIOCGICOUNT to see which one it was
1340 */
8ea2c2ec 1341 case TIOCMIWAIT: {
1da177e4
LT		 1342 DECLARE_WAITQUEUE(wait, current);
1343 int ret;
1344 spin_lock_irqsave(&info->slock, flags);
1345 cprev = info->icount; /* note the counters on entry */
1346 spin_unlock_irqrestore(&info->slock, flags);
1347
1348 add_wait_queue(&info->delta_msr_wait, &wait);
1349 while (1) {
1350 spin_lock_irqsave(&info->slock, flags);
1351 cnow = info->icount; /* atomic copy */
1352 spin_unlock_irqrestore(&info->slock, flags);
1353
1354 set_current_state(TASK_INTERRUPTIBLE);
8ea2c2ec
JJ		 1355 if (((arg & TIOCM_RNG) &&
1356 (cnow.rng != cprev.rng)) ||
1357 ((arg & TIOCM_DSR) &&
1358 (cnow.dsr != cprev.dsr)) ||
1359 ((arg & TIOCM_CD) &&
1360 (cnow.dcd != cprev.dcd)) ||
1361 ((arg & TIOCM_CTS) &&
1362 (cnow.cts != cprev.cts))) {
1da177e4
LT		 1363 ret = 0;
1364 break;
1365 }
1366 /* see if a signal did it */
1367 if (signal_pending(current)) {
1368 ret = -ERESTARTSYS;
1369 break;
1370 }
1371 cprev = cnow;
1372 }
1373 current->state = TASK_RUNNING;
1374 remove_wait_queue(&info->delta_msr_wait, &wait);
1375 break;
1376 }
1377 /* NOTREACHED */
1378 /*
1379 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1380 * Return: write counters to the user passed counter struct
1381 * NB: both 1->0 and 0->1 transitions are counted except for
1382 * RI where only 0->1 is counted.
1383 */
1384 case TIOCGICOUNT:
1385 spin_lock_irqsave(&info->slock, flags);
1386 cnow = info->icount;
1387 spin_unlock_irqrestore(&info->slock, flags);
1388 p_cuser = argp;
1389 /* modified by casper 1/11/2000 */
1390 if (put_user(cnow.frame, &p_cuser->frame))
1391 return -EFAULT;
1392 if (put_user(cnow.brk, &p_cuser->brk))
1393 return -EFAULT;
1394 if (put_user(cnow.overrun, &p_cuser->overrun))
1395 return -EFAULT;
1396 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1397 return -EFAULT;
1398 if (put_user(cnow.parity, &p_cuser->parity))
1399 return -EFAULT;
1400 if (put_user(cnow.rx, &p_cuser->rx))
1401 return -EFAULT;
1402 if (put_user(cnow.tx, &p_cuser->tx))
1403 return -EFAULT;
1404 put_user(cnow.cts, &p_cuser->cts);
1405 put_user(cnow.dsr, &p_cuser->dsr);
1406 put_user(cnow.rng, &p_cuser->rng);
1407 put_user(cnow.dcd, &p_cuser->dcd);
1da177e4
LT		 1408 return 0;
1409 case MOXA_HighSpeedOn:
8ea2c2ec
JJ		 1410 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1411 case MOXA_SDS_RSTICOUNTER: {
1da177e4
LT		 1412 info->mon_data.rxcnt = 0;
1413 info->mon_data.txcnt = 0;
1414 return 0;
1415 }
8ea2c2ec 1416/* (above) added by James. */
1da177e4
LT		 1417 case MOXA_ASPP_SETBAUD:{
1418 long baud;
8ea2c2ec 1419 if (get_user(baud, (long __user *)argp))
1da177e4
LT		 1420 return -EFAULT;
1421 mxser_set_baud(info, baud);
1422 return 0;
1423 }
1424 case MOXA_ASPP_GETBAUD:
1425 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1426 return -EFAULT;
1427
1428 return 0;
1429
1430 case MOXA_ASPP_OQUEUE:{
1431 int len, lsr;
1432
1433 len = mxser_chars_in_buffer(tty);
1434
1435 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1436
1437 len += (lsr ? 0 : 1);
1438
1439 if (copy_to_user(argp, &len, sizeof(int)))
1440 return -EFAULT;
1441
1442 return 0;
1443 }
8ea2c2ec 1444 case MOXA_ASPP_MON: {
1da177e4 1445 int mcr, status;
8ea2c2ec
JJ		 1446
1447 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1da177e4
LT		 1448
1449 status = mxser_get_msr(info->base, 1, info->port, info);
1450 mxser_check_modem_status(info, status);
1451
1452 mcr = inb(info->base + UART_MCR);
1453 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1454 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1455 else
1456 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1457
1458 if (mcr & MOXA_MUST_MCR_TX_XON)
1459 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1460 else
1461 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1462
1463 if (info->tty->hw_stopped)
1464 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1465 else
1466 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1467
8ea2c2ec
JJ		 1468 if (copy_to_user(argp, &info->mon_data,
1469 sizeof(struct mxser_mon)))
1da177e4
LT		 1470 return -EFAULT;
1471
1472 return 0;
1da177e4
LT		 1473 }
1474
8ea2c2ec
JJ		 1475 case MOXA_ASPP_LSTATUS: {
1476 if (copy_to_user(argp, &info->err_shadow,
1477 sizeof(unsigned char)))
1da177e4
LT		 1478 return -EFAULT;
1479
1480 info->err_shadow = 0;
1481 return 0;
1da177e4 1482 }
8ea2c2ec 1483 case MOXA_SET_BAUD_METHOD: {
1da177e4 1484 int method;
8ea2c2ec
JJ		 1485
1486 if (get_user(method, (int __user *)argp))
1da177e4
LT		 1487 return -EFAULT;
1488 mxser_set_baud_method[info->port] = method;
1489 if (copy_to_user(argp, &method, sizeof(int)))
1490 return -EFAULT;
1491
1492 return 0;
1493 }
1494 default:
1495 return -ENOIOCTLCMD;
1496 }
1497 return 0;
1498}
1499
1500#ifndef CMSPAR
1501#define CMSPAR 010000000000
1502#endif
1503
1504static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1505{
1506 int i, result, status;
1507
1508 switch (cmd) {
1509 case MOXA_GET_CONF:
8ea2c2ec
JJ		 1510 if (copy_to_user(argp, mxsercfg,
1511 sizeof(struct mxser_hwconf) * 4))
1da177e4
LT		 1512 return -EFAULT;
1513 return 0;
1514 case MOXA_GET_MAJOR:
1515 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1516 return -EFAULT;
1517 return 0;
1518
1519 case MOXA_GET_CUMAJOR:
1520 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1521 return -EFAULT;
1522 return 0;
1523
1524 case MOXA_CHKPORTENABLE:
1525 result = 0;
1526 for (i = 0; i < MXSER_PORTS; i++) {
1527 if (mxvar_table[i].base)
1528 result |= (1 << i);
1529 }
8ea2c2ec 1530 return put_user(result, (unsigned long __user *)argp);
1da177e4
LT		 1531 case MOXA_GETDATACOUNT:
1532 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1533 return -EFAULT;
8ea2c2ec 1534 return 0;
1da177e4
LT		 1535 case MOXA_GETMSTATUS:
1536 for (i = 0; i < MXSER_PORTS; i++) {
1537 GMStatus[i].ri = 0;
1538 if (!mxvar_table[i].base) {
1539 GMStatus[i].dcd = 0;
1540 GMStatus[i].dsr = 0;
1541 GMStatus[i].cts = 0;
1542 continue;
1543 }
1544
1545 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1546 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1547 else
1548 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1549
1550 status = inb(mxvar_table[i].base + UART_MSR);
1551 if (status & 0x80 /*UART_MSR_DCD */ )
1552 GMStatus[i].dcd = 1;
1553 else
1554 GMStatus[i].dcd = 0;
1555
1556 if (status & 0x20 /*UART_MSR_DSR */ )
1557 GMStatus[i].dsr = 1;
1558 else
1559 GMStatus[i].dsr = 0;
1560
1561
1562 if (status & 0x10 /*UART_MSR_CTS */ )
1563 GMStatus[i].cts = 1;
1564 else
1565 GMStatus[i].cts = 0;
1566 }
8ea2c2ec
JJ		 1567 if (copy_to_user(argp, GMStatus,
1568 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1569 return -EFAULT;
1570 return 0;
8ea2c2ec 1571 case MOXA_ASPP_MON_EXT: {
1da177e4
LT		 1572 int status;
1573 int opmode, p;
1574 int shiftbit;
1575 unsigned cflag, iflag;
1576
1577 for (i = 0; i < MXSER_PORTS; i++) {
1da177e4
LT		 1578 if (!mxvar_table[i].base)
1579 continue;
1580
8ea2c2ec
JJ		 1581 status = mxser_get_msr(mxvar_table[i].base, 0,
1582 i, &(mxvar_table[i]));
1583 /*
1584 mxser_check_modem_status(&mxvar_table[i],
1585 status);
1586 */
1da177e4
LT		 1587 if (status & UART_MSR_TERI)
1588 mxvar_table[i].icount.rng++;
1589 if (status & UART_MSR_DDSR)
1590 mxvar_table[i].icount.dsr++;
1591 if (status & UART_MSR_DDCD)
1592 mxvar_table[i].icount.dcd++;
1593 if (status & UART_MSR_DCTS)
1594 mxvar_table[i].icount.cts++;
1595
1596 mxvar_table[i].mon_data.modem_status = status;
1597 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1598 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1599 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1600 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1601 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1602 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1603
1604 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1605 cflag = mxvar_table[i].normal_termios.c_cflag;
1606 iflag = mxvar_table[i].normal_termios.c_iflag;
1607 } else {
1608 cflag = mxvar_table[i].tty->termios->c_cflag;
1609 iflag = mxvar_table[i].tty->termios->c_iflag;
1610 }
1611
1612 mon_data_ext.databits[i] = cflag & CSIZE;
1613
1614 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1615
1616 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1617
1618 mon_data_ext.flowctrl[i] = 0x00;
1619
1620 if (cflag & CRTSCTS)
1621 mon_data_ext.flowctrl[i] |= 0x03;
1622
1623 if (iflag & (IXON | IXOFF))
1624 mon_data_ext.flowctrl[i] |= 0x0C;
1625
1626 if (mxvar_table[i].type == PORT_16550A)
1627 mon_data_ext.fifo[i] = 1;
1628 else
1629 mon_data_ext.fifo[i] = 0;
1630
1631 p = i % 4;
1632 shiftbit = p * 2;
1633 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1634 opmode &= OP_MODE_MASK;
1635
1636 mon_data_ext.iftype[i] = opmode;
1637
1638 }
1639 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1640 return -EFAULT;
1641
1642 return 0;
1643
1644 }
1645 default:
1646 return -ENOIOCTLCMD;
1647 }
1648 return 0;
1649}
1650
1da177e4
LT		 1651static void mxser_stoprx(struct tty_struct *tty)
1652{
56e139f6 1653 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1654 /* unsigned long flags; */
1da177e4
LT		 1655
1656 info->ldisc_stop_rx = 1;
1657 if (I_IXOFF(tty)) {
8ea2c2ec
JJ		 1658 /* MX_LOCK(&info->slock); */
1659 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1660 if (info->IsMoxaMustChipFlag) {
1661 info->IER &= ~MOXA_MUST_RECV_ISR;
1662 outb(info->IER, info->base + UART_IER);
1663 } else {
8ea2c2ec 1664 /* above add by Victor Yu. 09-02-2002 */
1da177e4 1665 info->x_char = STOP_CHAR(tty);
8ea2c2ec
JJ		 1666 /* mask by Victor Yu. 09-02-2002 */
1667 /* outb(info->IER, 0); */
1da177e4
LT		 1668 outb(0, info->base + UART_IER);
1669 info->IER |= UART_IER_THRI;
8ea2c2ec
JJ		 1670 /* force Tx interrupt */
1671 outb(info->IER, info->base + UART_IER);
1672 } /* add by Victor Yu. 09-02-2002 */
1673 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1674 }
1675
1676 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1677 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1678 info->MCR &= ~UART_MCR_RTS;
1679 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1680 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1681 }
1682}
1683
1684static void mxser_startrx(struct tty_struct *tty)
1685{
56e139f6 1686 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1687 /* unsigned long flags; */
1da177e4
LT		 1688
1689 info->ldisc_stop_rx = 0;
1690 if (I_IXOFF(tty)) {
1691 if (info->x_char)
1692 info->x_char = 0;
1693 else {
8ea2c2ec 1694 /* MX_LOCK(&info->slock); */
1da177e4 1695
8ea2c2ec 1696 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1697 if (info->IsMoxaMustChipFlag) {
1698 info->IER |= MOXA_MUST_RECV_ISR;
1699 outb(info->IER, info->base + UART_IER);
1700 } else {
8ea2c2ec 1701 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1702
1703 info->x_char = START_CHAR(tty);
8ea2c2ec
JJ		 1704 /* mask by Victor Yu. 09-02-2002 */
1705 /* outb(info->IER, 0); */
1706 /* add by Victor Yu. 09-02-2002 */
1707 outb(0, info->base + UART_IER);
1708 /* force Tx interrupt */
1709 info->IER |= UART_IER_THRI;
1da177e4 1710 outb(info->IER, info->base + UART_IER);
8ea2c2ec
JJ		 1711 } /* add by Victor Yu. 09-02-2002 */
1712 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1713 }
1714 }
1715
1716 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1717 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1718 info->MCR |= UART_MCR_RTS;
1719 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1720 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1721 }
1722}
1723
1724/*
1725 * This routine is called by the upper-layer tty layer to signal that
1726 * incoming characters should be throttled.
1727 */
1728static void mxser_throttle(struct tty_struct *tty)
1729{
8ea2c2ec
JJ		 1730 /* struct mxser_struct *info = tty->driver_data; */
1731 /* unsigned long flags; */
1732
1733 /* MX_LOCK(&info->slock); */
1da177e4 1734 mxser_stoprx(tty);
8ea2c2ec 1735 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1736}
1737
1738static void mxser_unthrottle(struct tty_struct *tty)
1739{
8ea2c2ec
JJ		 1740 /* struct mxser_struct *info = tty->driver_data; */
1741 /* unsigned long flags; */
1742
1743 /* MX_LOCK(&info->slock); */
1da177e4 1744 mxser_startrx(tty);
8ea2c2ec 1745 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1746}
1747
1748static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
1749{
56e139f6 1750 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1751 unsigned long flags;
1752
8ea2c2ec
JJ		 1753 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
1754 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
1da177e4
LT		 1755
1756 mxser_change_speed(info, old_termios);
1757
8ea2c2ec
JJ		 1758 if ((old_termios->c_cflag & CRTSCTS) &&
1759 !(tty->termios->c_cflag & CRTSCTS)) {
1da177e4
LT		 1760 tty->hw_stopped = 0;
1761 mxser_start(tty);
1762 }
1763 }
1764
1765/* Handle sw stopped */
8ea2c2ec
JJ		 1766 if ((old_termios->c_iflag & IXON) &&
1767 !(tty->termios->c_iflag & IXON)) {
1da177e4
LT		 1768 tty->stopped = 0;
1769
8ea2c2ec 1770 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1771 if (info->IsMoxaMustChipFlag) {
1772 spin_lock_irqsave(&info->slock, flags);
1773 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1774 spin_unlock_irqrestore(&info->slock, flags);
1775 }
8ea2c2ec 1776 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1777
1778 mxser_start(tty);
1779 }
1780}
1781
1782/*
1783 * mxser_stop() and mxser_start()
1784 *
1785 * This routines are called before setting or resetting tty->stopped.
1786 * They enable or disable transmitter interrupts, as necessary.
1787 */
1788static void mxser_stop(struct tty_struct *tty)
1789{
56e139f6 1790 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1791 unsigned long flags;
1792
1793 spin_lock_irqsave(&info->slock, flags);
1794 if (info->IER & UART_IER_THRI) {
1795 info->IER &= ~UART_IER_THRI;
1796 outb(info->IER, info->base + UART_IER);
1797 }
1798 spin_unlock_irqrestore(&info->slock, flags);
1799}
1800
1801static void mxser_start(struct tty_struct *tty)
1802{
56e139f6 1803 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1804 unsigned long flags;
1805
1806 spin_lock_irqsave(&info->slock, flags);
1807 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1808 info->IER |= UART_IER_THRI;
1809 outb(info->IER, info->base + UART_IER);
1810 }
1811 spin_unlock_irqrestore(&info->slock, flags);
1812}
1813
1814/*
1815 * mxser_wait_until_sent() --- wait until the transmitter is empty
1816 */
1817static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1818{
56e139f6 1819 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1820 unsigned long orig_jiffies, char_time;
1821 int lsr;
1822
1823 if (info->type == PORT_UNKNOWN)
1824 return;
1825
1826 if (info->xmit_fifo_size == 0)
1827 return; /* Just in case.... */
1828
1829 orig_jiffies = jiffies;
1830 /*
1831 * Set the check interval to be 1/5 of the estimated time to
1832 * send a single character, and make it at least 1. The check
1833 * interval should also be less than the timeout.
1834 *
1835 * Note: we have to use pretty tight timings here to satisfy
1836 * the NIST-PCTS.
1837 */
1838 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1839 char_time = char_time / 5;
1840 if (char_time == 0)
1841 char_time = 1;
1842 if (timeout && timeout < char_time)
1843 char_time = timeout;
1844 /*
1845 * If the transmitter hasn't cleared in twice the approximate
1846 * amount of time to send the entire FIFO, it probably won't
1847 * ever clear. This assumes the UART isn't doing flow
1848 * control, which is currently the case. Hence, if it ever
1849 * takes longer than info->timeout, this is probably due to a
1850 * UART bug of some kind. So, we clamp the timeout parameter at
1851 * 2*info->timeout.
1852 */
1853 if (!timeout || timeout > 2 * info->timeout)
1854 timeout = 2 * info->timeout;
1855#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1856 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1857 timeout, char_time);
1da177e4
LT		 1858 printk("jiff=%lu...", jiffies);
1859#endif
1860 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1861#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1862 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1863#endif
da4cd8df 1864 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1865 if (signal_pending(current))
1866 break;
1867 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1868 break;
1869 }
1870 set_current_state(TASK_RUNNING);
1871
1872#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1873 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1874#endif
1875}
1876
1877
1878/*
1879 * This routine is called by tty_hangup() when a hangup is signaled.
1880 */
1881void mxser_hangup(struct tty_struct *tty)
1882{
56e139f6 1883 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1884
1885 mxser_flush_buffer(tty);
1886 mxser_shutdown(info);
1887 info->event = 0;
1888 info->count = 0;
1889 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1890 info->tty = NULL;
1891 wake_up_interruptible(&info->open_wait);
1892}
1893
1894
8ea2c2ec 1895/* added by James 03-12-2004. */
1da177e4
LT		 1896/*
1897 * mxser_rs_break() --- routine which turns the break handling on or off
1898 */
1899static void mxser_rs_break(struct tty_struct *tty, int break_state)
1900{
56e139f6 1901 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1902 unsigned long flags;
1903
1904 spin_lock_irqsave(&info->slock, flags);
1905 if (break_state == -1)
8ea2c2ec
JJ		 1906 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1907 info->base + UART_LCR);
1da177e4 1908 else
8ea2c2ec
JJ		 1909 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1910 info->base + UART_LCR);
1da177e4
LT		 1911 spin_unlock_irqrestore(&info->slock, flags);
1912}
1913
8ea2c2ec 1914/* (above) added by James. */
1da177e4
LT		 1915
1916
1917/*
1918 * This is the serial driver's generic interrupt routine
1919 */
7d12e780 1920static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4
LT		 1921{
1922 int status, iir, i;
1923 struct mxser_struct *info;
1924 struct mxser_struct *port;
1925 int max, irqbits, bits, msr;
1926 int pass_counter = 0;
1927 int handled = IRQ_NONE;
1928
1929 port = NULL;
8ea2c2ec 1930 /* spin_lock(&gm_lock); */
1da177e4
LT		 1931
1932 for (i = 0; i < MXSER_BOARDS; i++) {
1933 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1934 port = dev_id;
1935 break;
1936 }
1937 }
1938
8ea2c2ec 1939 if (i == MXSER_BOARDS)
1da177e4 1940 goto irq_stop;
8ea2c2ec 1941 if (port == 0)
1da177e4 1942 goto irq_stop;
1da177e4
LT		 1943 max = mxser_numports[mxsercfg[i].board_type - 1];
1944 while (1) {
1945 irqbits = inb(port->vector) & port->vectormask;
8ea2c2ec 1946 if (irqbits == port->vectormask)
1da177e4 1947 break;
1da177e4
LT		 1948
1949 handled = IRQ_HANDLED;
1950 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
8ea2c2ec 1951 if (irqbits == port->vectormask)
1da177e4 1952 break;
1da177e4
LT		 1953 if (bits & irqbits)
1954 continue;
1955 info = port + i;
1956
8ea2c2ec 1957 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1958 iir = inb(info->base + UART_IIR);
1959 if (iir & UART_IIR_NO_INT)
1960 continue;
1961 iir &= MOXA_MUST_IIR_MASK;
1962 if (!info->tty) {
1963 status = inb(info->base + UART_LSR);
1964 outb(0x27, info->base + UART_FCR);
1965 inb(info->base + UART_MSR);
1966 continue;
1967 }
8ea2c2ec 1968 /* above add by Victor Yu. 09-13-2002 */
1da177e4 1969 /*
8ea2c2ec 1970 if (info->tty->flip.count < TTY_FLIPBUF_SIZE / 4) {
1da177e4
LT		 1971 info->IER |= MOXA_MUST_RECV_ISR;
1972 outb(info->IER, info->base + UART_IER);
1973 }
1974 */
1975
1976
1977 /* mask by Victor Yu. 09-13-2002
1978 if ( !info->tty ||
1979 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1980 continue;
1981 */
1982 /* mask by Victor Yu. 09-02-2002
1983 status = inb(info->base + UART_LSR) & info->read_status_mask;
1984 */
1985
8ea2c2ec 1986 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1987 status = inb(info->base + UART_LSR);
1988
8ea2c2ec 1989 if (status & UART_LSR_PE)
1da177e4 1990 info->err_shadow |= NPPI_NOTIFY_PARITY;
8ea2c2ec 1991 if (status & UART_LSR_FE)
1da177e4 1992 info->err_shadow |= NPPI_NOTIFY_FRAMING;
8ea2c2ec 1993 if (status & UART_LSR_OE)
1da177e4 1994 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1da177e4
LT		 1995 if (status & UART_LSR_BI)
1996 info->err_shadow |= NPPI_NOTIFY_BREAK;
1997
1998 if (info->IsMoxaMustChipFlag) {
1999 /*
2000 if ( (status & 0x02) && !(status & 0x01) ) {
2001 outb(info->base+UART_FCR, 0x23);
2002 continue;
2003 }
2004 */
8ea2c2ec
JJ		 2005 if (iir == MOXA_MUST_IIR_GDA ||
2006 iir == MOXA_MUST_IIR_RDA ||
2007 iir == MOXA_MUST_IIR_RTO ||
2008 iir == MOXA_MUST_IIR_LSR)
1da177e4
LT		 2009 mxser_receive_chars(info, &status);
2010
2011 } else {
8ea2c2ec 2012 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2013
2014 status &= info->read_status_mask;
2015 if (status & UART_LSR_DR)
2016 mxser_receive_chars(info, &status);
2017 }
2018 msr = inb(info->base + UART_MSR);
2019 if (msr & UART_MSR_ANY_DELTA) {
2020 mxser_check_modem_status(info, msr);
2021 }
8ea2c2ec 2022 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2023 if (info->IsMoxaMustChipFlag) {
2024 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
2025 mxser_transmit_chars(info);
2026 }
2027 } else {
8ea2c2ec 2028 /* above add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2029
2030 if (status & UART_LSR_THRE) {
2031/* 8-2-99 by William
2032 if ( info->x_char || (info->xmit_cnt > 0) )
2033*/
2034 mxser_transmit_chars(info);
2035 }
2036 }
2037 }
2038 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2039 break; /* Prevent infinite loops */
2040 }
2041 }
2042
2043 irq_stop:
8ea2c2ec 2044 /* spin_unlock(&gm_lock); */
1da177e4
LT		 2045 return handled;
2046}
2047
2048static void mxser_receive_chars(struct mxser_struct *info, int *status)
2049{
2050 struct tty_struct *tty = info->tty;
2051 unsigned char ch, gdl;
2052 int ignored = 0;
2053 int cnt = 0;
1da177e4
LT		 2054 int recv_room;
2055 int max = 256;
2056 unsigned long flags;
2057
2058 spin_lock_irqsave(&info->slock, flags);
2059
33f0f88f 2060 recv_room = tty->receive_room;
1da177e4 2061 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
8ea2c2ec 2062 /* mxser_throttle(tty); */
1da177e4 2063 mxser_stoprx(tty);
8ea2c2ec 2064 /* return; */
1da177e4
LT		 2065 }
2066
8ea2c2ec 2067 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2068 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2069
2070 if (*status & UART_LSR_SPECIAL) {
2071 goto intr_old;
2072 }
8ea2c2ec
JJ		 2073 /* following add by Victor Yu. 02-11-2004 */
2074 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2075 (*status & MOXA_MUST_LSR_RERR))
1da177e4 2076 goto intr_old;
8ea2c2ec 2077 /* above add by Victor Yu. 02-14-2004 */
1da177e4
LT		 2078 if (*status & MOXA_MUST_LSR_RERR)
2079 goto intr_old;
2080
2081 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2082
8ea2c2ec
JJ		 2083 /* add by Victor Yu. 02-11-2004 */
2084 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
1da177e4
LT		 2085 gdl &= MOXA_MUST_GDL_MASK;
2086 if (gdl >= recv_room) {
2087 if (!info->ldisc_stop_rx) {
8ea2c2ec 2088 /* mxser_throttle(tty); */
1da177e4
LT		 2089 mxser_stoprx(tty);
2090 }
8ea2c2ec 2091 /* return; */
1da177e4
LT		 2092 }
2093 while (gdl--) {
2094 ch = inb(info->base + UART_RX);
3399ba5b 2095 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT		 2096 cnt++;
2097 /*
8ea2c2ec 2098 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4 2099 mxser_stoprx(tty);
8ea2c2ec 2100 info->stop_rx = 1;
1da177e4
LT		 2101 break;
2102 } */
2103 }
2104 goto end_intr;
2105 }
8ea2c2ec
JJ		 2106 intr_old:
2107 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2108
2109 do {
2110 if (max-- < 0)
2111 break;
2112 /*
8ea2c2ec 2113 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4
LT		 2114 mxser_stoprx(tty);
2115 info->stop_rx=1;
2116 break;
2117 }
2118 */
2119
2120 ch = inb(info->base + UART_RX);
8ea2c2ec 2121 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2122 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2123 outb(0x23, info->base + UART_FCR);
2124 *status &= info->read_status_mask;
8ea2c2ec 2125 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2126 if (*status & info->ignore_status_mask) {
2127 if (++ignored > 100)
2128 break;
2129 } else {
3399ba5b 2130 char flag = 0;
1da177e4
LT		 2131 if (*status & UART_LSR_SPECIAL) {
2132 if (*status & UART_LSR_BI) {
3399ba5b 2133 flag = TTY_BREAK;
1da177e4
LT		 2134/* added by casper 1/11/2000 */
2135 info->icount.brk++;
1da177e4
LT		 2136/* */
2137 if (info->flags & ASYNC_SAK)
2138 do_SAK(tty);
2139 } else if (*status & UART_LSR_PE) {
3399ba5b 2140 flag = TTY_PARITY;
1da177e4
LT		 2141/* added by casper 1/11/2000 */
2142 info->icount.parity++;
2143/* */
2144 } else if (*status & UART_LSR_FE) {
3399ba5b 2145 flag = TTY_FRAME;
1da177e4
LT		 2146/* added by casper 1/11/2000 */
2147 info->icount.frame++;
2148/* */
2149 } else if (*status & UART_LSR_OE) {
3399ba5b 2150 flag = TTY_OVERRUN;
1da177e4
LT		 2151/* added by casper 1/11/2000 */
2152 info->icount.overrun++;
2153/* */
3399ba5b
DV		 2154 }
2155 }
2156 tty_insert_flip_char(tty, ch, flag);
1da177e4
LT		 2157 cnt++;
2158 if (cnt >= recv_room) {
2159 if (!info->ldisc_stop_rx) {
8ea2c2ec 2160 /* mxser_throttle(tty); */
1da177e4
LT		 2161 mxser_stoprx(tty);
2162 }
2163 break;
2164 }
2165
2166 }
2167
8ea2c2ec 2168 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2169 if (info->IsMoxaMustChipFlag)
2170 break;
8ea2c2ec 2171 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2172
2173 /* mask by Victor Yu. 09-02-2002
2174 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2175 */
8ea2c2ec 2176 /* following add by Victor Yu. 09-02-2002 */
1da177e4 2177 *status = inb(info->base + UART_LSR);
8ea2c2ec 2178 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2179 } while (*status & UART_LSR_DR);
2180
8ea2c2ec 2181end_intr: /* add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2182 mxvar_log.rxcnt[info->port] += cnt;
2183 info->mon_data.rxcnt += cnt;
2184 info->mon_data.up_rxcnt += cnt;
2185 spin_unlock_irqrestore(&info->slock, flags);
3399ba5b 2186
1da177e4
LT		 2187 tty_flip_buffer_push(tty);
2188}
2189
2190static void mxser_transmit_chars(struct mxser_struct *info)
2191{
2192 int count, cnt;
2193 unsigned long flags;
2194
2195 spin_lock_irqsave(&info->slock, flags);
2196
2197 if (info->x_char) {
2198 outb(info->x_char, info->base + UART_TX);
2199 info->x_char = 0;
2200 mxvar_log.txcnt[info->port]++;
2201 info->mon_data.txcnt++;
2202 info->mon_data.up_txcnt++;
2203
2204/* added by casper 1/11/2000 */
2205 info->icount.tx++;
2206/* */
2207 spin_unlock_irqrestore(&info->slock, flags);
2208 return;
2209 }
2210
2211 if (info->xmit_buf == 0) {
2212 spin_unlock_irqrestore(&info->slock, flags);
2213 return;
2214 }
2215
8ea2c2ec
JJ		 2216 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2217 (info->tty->hw_stopped &&
2218 (info->type != PORT_16550A) &&
2219 (!info->IsMoxaMustChipFlag))) {
1da177e4
LT		 2220 info->IER &= ~UART_IER_THRI;
2221 outb(info->IER, info->base + UART_IER);
2222 spin_unlock_irqrestore(&info->slock, flags);
2223 return;
2224 }
2225
2226 cnt = info->xmit_cnt;
2227 count = info->xmit_fifo_size;
2228 do {
8ea2c2ec
JJ		 2229 outb(info->xmit_buf[info->xmit_tail++],
2230 info->base + UART_TX);
1da177e4
LT		 2231 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2232 if (--info->xmit_cnt <= 0)
2233 break;
2234 } while (--count > 0);
2235 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2236
8ea2c2ec 2237/* added by James 03-12-2004. */
1da177e4
LT		 2238 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2239 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
8ea2c2ec 2240/* (above) added by James. */
1da177e4
LT		 2241
2242/* added by casper 1/11/2000 */
2243 info->icount.tx += (cnt - info->xmit_cnt);
2244/* */
2245
2246 if (info->xmit_cnt < WAKEUP_CHARS) {
2247 set_bit(MXSER_EVENT_TXLOW, &info->event);
2248 schedule_work(&info->tqueue);
2249 }
2250 if (info->xmit_cnt <= 0) {
2251 info->IER &= ~UART_IER_THRI;
2252 outb(info->IER, info->base + UART_IER);
2253 }
2254 spin_unlock_irqrestore(&info->slock, flags);
2255}
2256
2257static void mxser_check_modem_status(struct mxser_struct *info, int status)
2258{
2259 /* update input line counters */
2260 if (status & UART_MSR_TERI)
2261 info->icount.rng++;
2262 if (status & UART_MSR_DDSR)
2263 info->icount.dsr++;
2264 if (status & UART_MSR_DDCD)
2265 info->icount.dcd++;
2266 if (status & UART_MSR_DCTS)
2267 info->icount.cts++;
2268 info->mon_data.modem_status = status;
2269 wake_up_interruptible(&info->delta_msr_wait);
2270
1da177e4
LT		 2271 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2272 if (status & UART_MSR_DCD)
2273 wake_up_interruptible(&info->open_wait);
2274 schedule_work(&info->tqueue);
2275 }
2276
2277 if (info->flags & ASYNC_CTS_FLOW) {
2278 if (info->tty->hw_stopped) {
2279 if (status & UART_MSR_CTS) {
2280 info->tty->hw_stopped = 0;
2281
8ea2c2ec
JJ		 2282 if ((info->type != PORT_16550A) &&
2283 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2284 info->IER |= UART_IER_THRI;
2285 outb(info->IER, info->base + UART_IER);
2286 }
2287 set_bit(MXSER_EVENT_TXLOW, &info->event);
2288 schedule_work(&info->tqueue); }
2289 } else {
2290 if (!(status & UART_MSR_CTS)) {
2291 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2292 if ((info->type != PORT_16550A) &&
2293 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2294 info->IER &= ~UART_IER_THRI;
2295 outb(info->IER, info->base + UART_IER);
2296 }
2297 }
2298 }
2299 }
2300}
2301
2302static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2303{
2304 DECLARE_WAITQUEUE(wait, current);
2305 int retval;
2306 int do_clocal = 0;
2307 unsigned long flags;
2308
2309 /*
2310 * If non-blocking mode is set, or the port is not enabled,
2311 * then make the check up front and then exit.
2312 */
2313 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2314 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2315 return 0;
1da177e4
LT		 2316 }
2317
2318 if (tty->termios->c_cflag & CLOCAL)
2319 do_clocal = 1;
2320
2321 /*
2322 * Block waiting for the carrier detect and the line to become
2323 * free (i.e., not in use by the callout). While we are in
2324 * this loop, info->count is dropped by one, so that
2325 * mxser_close() knows when to free things. We restore it upon
2326 * exit, either normal or abnormal.
2327 */
2328 retval = 0;
2329 add_wait_queue(&info->open_wait, &wait);
2330
2331 spin_lock_irqsave(&info->slock, flags);
2332 if (!tty_hung_up_p(filp))
2333 info->count--;
2334 spin_unlock_irqrestore(&info->slock, flags);
2335 info->blocked_open++;
2336 while (1) {
2337 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2338 outb(inb(info->base + UART_MCR) |
2339 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
1da177e4
LT		 2340 spin_unlock_irqrestore(&info->slock, flags);
2341 set_current_state(TASK_INTERRUPTIBLE);
2342 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2343 if (info->flags & ASYNC_HUP_NOTIFY)
2344 retval = -EAGAIN;
2345 else
2346 retval = -ERESTARTSYS;
2347 break;
2348 }
8ea2c2ec
JJ		 2349 if (!(info->flags & ASYNC_CLOSING) &&
2350 (do_clocal ||
2351 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
1da177e4
LT		 2352 break;
2353 if (signal_pending(current)) {
2354 retval = -ERESTARTSYS;
2355 break;
2356 }
2357 schedule();
2358 }
2359 set_current_state(TASK_RUNNING);
2360 remove_wait_queue(&info->open_wait, &wait);
2361 if (!tty_hung_up_p(filp))
2362 info->count++;
2363 info->blocked_open--;
2364 if (retval)
8ea2c2ec 2365 return retval;
1da177e4 2366 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2367 return 0;
1da177e4
LT		 2368}
2369
2370static int mxser_startup(struct mxser_struct *info)
2371{
1da177e4
LT		 2372 unsigned long page;
2373 unsigned long flags;
2374
2375 page = __get_free_page(GFP_KERNEL);
2376 if (!page)
8ea2c2ec 2377 return -ENOMEM;
1da177e4
LT		 2378
2379 spin_lock_irqsave(&info->slock, flags);
2380
2381 if (info->flags & ASYNC_INITIALIZED) {
2382 free_page(page);
2383 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2384 return 0;
1da177e4
LT		 2385 }
2386
2387 if (!info->base || !info->type) {
2388 if (info->tty)
2389 set_bit(TTY_IO_ERROR, &info->tty->flags);
2390 free_page(page);
2391 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2392 return 0;
1da177e4
LT		 2393 }
2394 if (info->xmit_buf)
2395 free_page(page);
2396 else
2397 info->xmit_buf = (unsigned char *) page;
2398
2399 /*
2400 * Clear the FIFO buffers and disable them
2401 * (they will be reenabled in mxser_change_speed())
2402 */
2403 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2404 outb((UART_FCR_CLEAR_RCVR |
2405 UART_FCR_CLEAR_XMIT |
2406 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2407 else
8ea2c2ec
JJ		 2408 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2409 info->base + UART_FCR);
1da177e4
LT		 2410
2411 /*
2412 * At this point there's no way the LSR could still be 0xFF;
2413 * if it is, then bail out, because there's likely no UART
2414 * here.
2415 */
2416 if (inb(info->base + UART_LSR) == 0xff) {
2417 spin_unlock_irqrestore(&info->slock, flags);
2418 if (capable(CAP_SYS_ADMIN)) {
2419 if (info->tty)
2420 set_bit(TTY_IO_ERROR, &info->tty->flags);
8ea2c2ec 2421 return 0;
1da177e4 2422 } else
8ea2c2ec 2423 return -ENODEV;
1da177e4
LT		 2424 }
2425
2426 /*
2427 * Clear the interrupt registers.
2428 */
2429 (void) inb(info->base + UART_LSR);
2430 (void) inb(info->base + UART_RX);
2431 (void) inb(info->base + UART_IIR);
2432 (void) inb(info->base + UART_MSR);
2433
2434 /*
2435 * Now, initialize the UART
2436 */
2437 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2438 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2439 outb(info->MCR, info->base + UART_MCR);
2440
2441 /*
2442 * Finally, enable interrupts
2443 */
2444 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
8ea2c2ec 2445 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
1da177e4 2446
8ea2c2ec 2447 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2448 if (info->IsMoxaMustChipFlag)
2449 info->IER |= MOXA_MUST_IER_EGDAI;
8ea2c2ec 2450 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2451 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2452
2453 /*
2454 * And clear the interrupt registers again for luck.
2455 */
2456 (void) inb(info->base + UART_LSR);
2457 (void) inb(info->base + UART_RX);
2458 (void) inb(info->base + UART_IIR);
2459 (void) inb(info->base + UART_MSR);
2460
2461 if (info->tty)
2462 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2463 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2464
2465 /*
2466 * and set the speed of the serial port
2467 */
2468 spin_unlock_irqrestore(&info->slock, flags);
2469 mxser_change_speed(info, NULL);
2470
2471 info->flags |= ASYNC_INITIALIZED;
8ea2c2ec 2472 return 0;
1da177e4
LT		 2473}
2474
2475/*
2476 * This routine will shutdown a serial port; interrupts maybe disabled, and
2477 * DTR is dropped if the hangup on close termio flag is on.
2478 */
2479static void mxser_shutdown(struct mxser_struct *info)
2480{
2481 unsigned long flags;
2482
2483 if (!(info->flags & ASYNC_INITIALIZED))
2484 return;
2485
2486 spin_lock_irqsave(&info->slock, flags);
2487
2488 /*
2489 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2490 * here so the queue might never be waken up
2491 */
2492 wake_up_interruptible(&info->delta_msr_wait);
2493
2494 /*
2495 * Free the IRQ, if necessary
2496 */
2497 if (info->xmit_buf) {
2498 free_page((unsigned long) info->xmit_buf);
2499 info->xmit_buf = NULL;
2500 }
2501
2502 info->IER = 0;
2503 outb(0x00, info->base + UART_IER);
2504
2505 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2506 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2507 outb(info->MCR, info->base + UART_MCR);
2508
2509 /* clear Rx/Tx FIFO's */
8ea2c2ec 2510 /* following add by Victor Yu. 08-30-2002 */
1da177e4 2511 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2512 outb((UART_FCR_CLEAR_RCVR |
2513 UART_FCR_CLEAR_XMIT |
2514 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2515 else
8ea2c2ec
JJ		 2516 /* above add by Victor Yu. 08-30-2002 */
2517 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2518 info->base + UART_FCR);
1da177e4
LT		 2519
2520 /* read data port to reset things */
2521 (void) inb(info->base + UART_RX);
2522
2523 if (info->tty)
2524 set_bit(TTY_IO_ERROR, &info->tty->flags);
2525
2526 info->flags &= ~ASYNC_INITIALIZED;
2527
8ea2c2ec
JJ		 2528 /* following add by Victor Yu. 09-23-2002 */
2529 if (info->IsMoxaMustChipFlag)
1da177e4 2530 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
8ea2c2ec 2531 /* above add by Victor Yu. 09-23-2002 */
1da177e4
LT		 2532
2533 spin_unlock_irqrestore(&info->slock, flags);
2534}
2535
2536/*
2537 * This routine is called to set the UART divisor registers to match
2538 * the specified baud rate for a serial port.
2539 */
2540static int mxser_change_speed(struct mxser_struct *info, struct termios *old_termios)
2541{
2542 unsigned cflag, cval, fcr;
2543 int ret = 0;
2544 unsigned char status;
2545 long baud;
2546 unsigned long flags;
2547
1da177e4
LT		 2548 if (!info->tty || !info->tty->termios)
2549 return ret;
2550 cflag = info->tty->termios->c_cflag;
2551 if (!(info->base))
2552 return ret;
2553
1da177e4
LT		 2554#ifndef B921600
2555#define B921600 (B460800 +1)
2556#endif
2557 if (mxser_set_baud_method[info->port] == 0) {
c7bce309 2558 baud = tty_get_baud_rate(info->tty);
1da177e4
LT		 2559 mxser_set_baud(info, baud);
2560 }
2561
2562 /* byte size and parity */
2563 switch (cflag & CSIZE) {
2564 case CS5:
2565 cval = 0x00;
2566 break;
2567 case CS6:
2568 cval = 0x01;
2569 break;
2570 case CS7:
2571 cval = 0x02;
2572 break;
2573 case CS8:
2574 cval = 0x03;
2575 break;
2576 default:
2577 cval = 0x00;
2578 break; /* too keep GCC shut... */
2579 }
2580 if (cflag & CSTOPB)
2581 cval |= 0x04;
2582 if (cflag & PARENB)
2583 cval |= UART_LCR_PARITY;
8ea2c2ec 2584 if (!(cflag & PARODD))
1da177e4 2585 cval |= UART_LCR_EPAR;
1da177e4
LT		 2586 if (cflag & CMSPAR)
2587 cval |= UART_LCR_SPAR;
2588
2589 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2590 if (info->IsMoxaMustChipFlag) {
2591 fcr = UART_FCR_ENABLE_FIFO;
2592 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2593 SET_MOXA_MUST_FIFO_VALUE(info);
2594 } else
2595 fcr = 0;
2596 } else {
2597 fcr = UART_FCR_ENABLE_FIFO;
8ea2c2ec 2598 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2599 if (info->IsMoxaMustChipFlag) {
2600 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2601 SET_MOXA_MUST_FIFO_VALUE(info);
2602 } else {
8ea2c2ec 2603 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2604 switch (info->rx_trigger) {
2605 case 1:
2606 fcr |= UART_FCR_TRIGGER_1;
2607 break;
2608 case 4:
2609 fcr |= UART_FCR_TRIGGER_4;
2610 break;
2611 case 8:
2612 fcr |= UART_FCR_TRIGGER_8;
2613 break;
2614 default:
2615 fcr |= UART_FCR_TRIGGER_14;
2616 break;
2617 }
2618 }
2619 }
2620
2621 /* CTS flow control flag and modem status interrupts */
2622 info->IER &= ~UART_IER_MSI;
2623 info->MCR &= ~UART_MCR_AFE;
2624 if (cflag & CRTSCTS) {
2625 info->flags |= ASYNC_CTS_FLOW;
2626 info->IER |= UART_IER_MSI;
2627 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2628 info->MCR |= UART_MCR_AFE;
8ea2c2ec
JJ		 2629 /* status = mxser_get_msr(info->base, 0, info->port); */
2630/*
2631 save_flags(flags);
1da177e4
LT		 2632 cli();
2633 status = inb(baseaddr + UART_MSR);
8ea2c2ec
JJ		 2634 restore_flags(flags);
2635*/
2636 /* mxser_check_modem_status(info, status); */
1da177e4 2637 } else {
8ea2c2ec
JJ		 2638 /* status = mxser_get_msr(info->base, 0, info->port); */
2639 /* MX_LOCK(&info->slock); */
1da177e4 2640 status = inb(info->base + UART_MSR);
8ea2c2ec 2641 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 2642 if (info->tty->hw_stopped) {
2643 if (status & UART_MSR_CTS) {
2644 info->tty->hw_stopped = 0;
8ea2c2ec
JJ		 2645 if ((info->type != PORT_16550A) &&
2646 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2647 info->IER |= UART_IER_THRI;
2648 outb(info->IER, info->base + UART_IER);
2649 }
2650 set_bit(MXSER_EVENT_TXLOW, &info->event);
2651 schedule_work(&info->tqueue); }
2652 } else {
2653 if (!(status & UART_MSR_CTS)) {
2654 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2655 if ((info->type != PORT_16550A) &&
2656 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2657 info->IER &= ~UART_IER_THRI;
2658 outb(info->IER, info->base + UART_IER);
2659 }
2660 }
2661 }
2662 }
2663 } else {
2664 info->flags &= ~ASYNC_CTS_FLOW;
2665 }
2666 outb(info->MCR, info->base + UART_MCR);
2667 if (cflag & CLOCAL) {
2668 info->flags &= ~ASYNC_CHECK_CD;
2669 } else {
2670 info->flags |= ASYNC_CHECK_CD;
2671 info->IER |= UART_IER_MSI;
2672 }
2673 outb(info->IER, info->base + UART_IER);
2674
2675 /*
2676 * Set up parity check flag
2677 */
2678 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2679 if (I_INPCK(info->tty))
2680 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2681 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2682 info->read_status_mask |= UART_LSR_BI;
2683
2684 info->ignore_status_mask = 0;
2685
2686 if (I_IGNBRK(info->tty)) {
2687 info->ignore_status_mask |= UART_LSR_BI;
2688 info->read_status_mask |= UART_LSR_BI;
2689 /*
2690 * If we're ignore parity and break indicators, ignore
2691 * overruns too. (For real raw support).
2692 */
2693 if (I_IGNPAR(info->tty)) {
8ea2c2ec
JJ		 2694 info->ignore_status_mask |=
2695 UART_LSR_OE |
2696 UART_LSR_PE |
2697 UART_LSR_FE;
2698 info->read_status_mask |=
2699 UART_LSR_OE |
2700 UART_LSR_PE |
2701 UART_LSR_FE;
1da177e4
LT		 2702 }
2703 }
8ea2c2ec 2704 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2705 if (info->IsMoxaMustChipFlag) {
2706 spin_lock_irqsave(&info->slock, flags);
2707 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2708 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2709 if (I_IXON(info->tty)) {
2710 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2711 } else {
2712 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2713 }
2714 if (I_IXOFF(info->tty)) {
2715 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2716 } else {
2717 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2718 }
2719 /*
2720 if ( I_IXANY(info->tty) ) {
2721 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2722 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2723 } else {
2724 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2725 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2726 }
2727 */
2728 spin_unlock_irqrestore(&info->slock, flags);
2729 }
8ea2c2ec 2730 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2731
2732
2733 outb(fcr, info->base + UART_FCR); /* set fcr */
2734 outb(cval, info->base + UART_LCR);
2735
2736 return ret;
2737}
2738
2739
2740static int mxser_set_baud(struct mxser_struct *info, long newspd)
2741{
2742 int quot = 0;
2743 unsigned char cval;
2744 int ret = 0;
2745 unsigned long flags;
2746
2747 if (!info->tty || !info->tty->termios)
2748 return ret;
2749
2750 if (!(info->base))
2751 return ret;
2752
2753 if (newspd > info->MaxCanSetBaudRate)
2754 return 0;
2755
2756 info->realbaud = newspd;
2757 if (newspd == 134) {
2758 quot = (2 * info->baud_base / 269);
2759 } else if (newspd) {
2760 quot = info->baud_base / newspd;
1da177e4
LT		 2761 if (quot == 0)
2762 quot = 1;
1da177e4
LT		 2763 } else {
2764 quot = 0;
2765 }
2766
2767 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2768 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2769
2770 if (quot) {
2771 spin_lock_irqsave(&info->slock, flags);
2772 info->MCR |= UART_MCR_DTR;
2773 outb(info->MCR, info->base + UART_MCR);
2774 spin_unlock_irqrestore(&info->slock, flags);
2775 } else {
2776 spin_lock_irqsave(&info->slock, flags);
2777 info->MCR &= ~UART_MCR_DTR;
2778 outb(info->MCR, info->base + UART_MCR);
2779 spin_unlock_irqrestore(&info->slock, flags);
2780 return ret;
2781 }
2782
2783 cval = inb(info->base + UART_LCR);
2784
2785 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2786
2787 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2788 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2789 outb(cval, info->base + UART_LCR); /* reset DLAB */
2790
2791
2792 return ret;
2793}
2794
1da177e4
LT		 2795/*
2796 * ------------------------------------------------------------
2797 * friends of mxser_ioctl()
2798 * ------------------------------------------------------------
2799 */
2800static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2801{
2802 struct serial_struct tmp;
2803
2804 if (!retinfo)
8ea2c2ec 2805 return -EFAULT;
1da177e4
LT		 2806 memset(&tmp, 0, sizeof(tmp));
2807 tmp.type = info->type;
2808 tmp.line = info->port;
2809 tmp.port = info->base;
2810 tmp.irq = info->irq;
2811 tmp.flags = info->flags;
2812 tmp.baud_base = info->baud_base;
2813 tmp.close_delay = info->close_delay;
2814 tmp.closing_wait = info->closing_wait;
2815 tmp.custom_divisor = info->custom_divisor;
2816 tmp.hub6 = 0;
2817 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2818 return -EFAULT;
8ea2c2ec 2819 return 0;
1da177e4
LT		 2820}
2821
2822static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2823{
2824 struct serial_struct new_serial;
2825 unsigned int flags;
2826 int retval = 0;
2827
2828 if (!new_info || !info->base)
8ea2c2ec 2829 return -EFAULT;
1da177e4
LT		 2830 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2831 return -EFAULT;
2832
8ea2c2ec
JJ		 2833 if ((new_serial.irq != info->irq) ||
2834 (new_serial.port != info->base) ||
2835 (new_serial.custom_divisor != info->custom_divisor) ||
2836 (new_serial.baud_base != info->baud_base))
2837 return -EPERM;
1da177e4
LT		 2838
2839 flags = info->flags & ASYNC_SPD_MASK;
2840
2841 if (!capable(CAP_SYS_ADMIN)) {
8ea2c2ec
JJ		 2842 if ((new_serial.baud_base != info->baud_base) ||
2843 (new_serial.close_delay != info->close_delay) ||
2844 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2845 return -EPERM;
2846 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2847 (new_serial.flags & ASYNC_USR_MASK));
1da177e4
LT		 2848 } else {
2849 /*
2850 * OK, past this point, all the error checking has been done.
2851 * At this point, we start making changes.....
2852 */
8ea2c2ec
JJ		 2853 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2854 (new_serial.flags & ASYNC_FLAGS));
1da177e4
LT		 2855 info->close_delay = new_serial.close_delay * HZ / 100;
2856 info->closing_wait = new_serial.closing_wait * HZ / 100;
8ea2c2ec
JJ		 2857 info->tty->low_latency =
2858 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2859 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1da177e4
LT		 2860 }
2861
2862 /* added by casper, 3/17/2000, for mouse */
2863 info->type = new_serial.type;
2864
2865 process_txrx_fifo(info);
2866
1da177e4
LT		 2867 if (info->flags & ASYNC_INITIALIZED) {
2868 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2869 mxser_change_speed(info, NULL);
2870 }
2871 } else {
2872 retval = mxser_startup(info);
2873 }
8ea2c2ec 2874 return retval;
1da177e4
LT		 2875}
2876
2877/*
2878 * mxser_get_lsr_info - get line status register info
2879 *
2880 * Purpose: Let user call ioctl() to get info when the UART physically
2881 * is emptied. On bus types like RS485, the transmitter must
2882 * release the bus after transmitting. This must be done when
2883 * the transmit shift register is empty, not be done when the
2884 * transmit holding register is empty. This functionality
2885 * allows an RS485 driver to be written in user space.
2886 */
2887static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2888{
2889 unsigned char status;
2890 unsigned int result;
2891 unsigned long flags;
2892
2893 spin_lock_irqsave(&info->slock, flags);
2894 status = inb(info->base + UART_LSR);
2895 spin_unlock_irqrestore(&info->slock, flags);
2896 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2897 return put_user(result, value);
2898}
2899
2900/*
2901 * This routine sends a break character out the serial port.
2902 */
2903static void mxser_send_break(struct mxser_struct *info, int duration)
2904{
2905 unsigned long flags;
2906
2907 if (!info->base)
2908 return;
2909 set_current_state(TASK_INTERRUPTIBLE);
2910 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2911 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2912 info->base + UART_LCR);
1da177e4
LT		 2913 spin_unlock_irqrestore(&info->slock, flags);
2914 schedule_timeout(duration);
2915 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2916 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2917 info->base + UART_LCR);
1da177e4
LT		 2918 spin_unlock_irqrestore(&info->slock, flags);
2919}
2920
2921static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2922{
56e139f6 2923 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2924 unsigned char control, status;
2925 unsigned long flags;
2926
2927
2928 if (tty->index == MXSER_PORTS)
8ea2c2ec 2929 return -ENOIOCTLCMD;
1da177e4 2930 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 2931 return -EIO;
1da177e4
LT		 2932
2933 control = info->MCR;
2934
2935 spin_lock_irqsave(&info->slock, flags);
2936 status = inb(info->base + UART_MSR);
2937 if (status & UART_MSR_ANY_DELTA)
2938 mxser_check_modem_status(info, status);
2939 spin_unlock_irqrestore(&info->slock, flags);
2940 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
8ea2c2ec
JJ		 2941 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
2942 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
2943 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
2944 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
2945 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1da177e4
LT		 2946}
2947
2948static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2949{
56e139f6 2950 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2951 unsigned long flags;
2952
2953
2954 if (tty->index == MXSER_PORTS)
2955 return -ENOIOCTLCMD;
2956 if (tty->flags & (1 << TTY_IO_ERROR))
2957 return -EIO;
2958
2959 spin_lock_irqsave(&info->slock, flags);
2960
2961 if (set & TIOCM_RTS)
2962 info->MCR |= UART_MCR_RTS;
2963 if (set & TIOCM_DTR)
2964 info->MCR |= UART_MCR_DTR;
2965
2966 if (clear & TIOCM_RTS)
2967 info->MCR &= ~UART_MCR_RTS;
2968 if (clear & TIOCM_DTR)
2969 info->MCR &= ~UART_MCR_DTR;
2970
2971 outb(info->MCR, info->base + UART_MCR);
2972 spin_unlock_irqrestore(&info->slock, flags);
2973 return 0;
2974}
2975
2976
2977static int mxser_read_register(int, unsigned short *);
2978static int mxser_program_mode(int);
2979static void mxser_normal_mode(int);
2980
2981static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2982{
2983 int id, i, bits;
2984 unsigned short regs[16], irq;
2985 unsigned char scratch, scratch2;
2986
2987 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2988
2989 id = mxser_read_register(cap, regs);
2990 if (id == C168_ASIC_ID) {
2991 hwconf->board_type = MXSER_BOARD_C168_ISA;
2992 hwconf->ports = 8;
2993 } else if (id == C104_ASIC_ID) {
2994 hwconf->board_type = MXSER_BOARD_C104_ISA;
2995 hwconf->ports = 4;
2996 } else if (id == C102_ASIC_ID) {
2997 hwconf->board_type = MXSER_BOARD_C102_ISA;
2998 hwconf->ports = 2;
2999 } else if (id == CI132_ASIC_ID) {
3000 hwconf->board_type = MXSER_BOARD_CI132;
3001 hwconf->ports = 2;
3002 } else if (id == CI134_ASIC_ID) {
3003 hwconf->board_type = MXSER_BOARD_CI134;
3004 hwconf->ports = 4;
3005 } else if (id == CI104J_ASIC_ID) {
3006 hwconf->board_type = MXSER_BOARD_CI104J;
3007 hwconf->ports = 4;
3008 } else
8ea2c2ec 3009 return 0;
1da177e4
LT		 3010
3011 irq = 0;
3012 if (hwconf->ports == 2) {
3013 irq = regs[9] & 0xF000;
3014 irq = irq | (irq >> 4);
3015 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 3016 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3017 } else if (hwconf->ports == 4) {
3018 irq = regs[9] & 0xF000;
3019 irq = irq | (irq >> 4);
3020 irq = irq | (irq >> 8);
3021 if (irq != regs[9])
8ea2c2ec 3022 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3023 } else if (hwconf->ports == 8) {
3024 irq = regs[9] & 0xF000;
3025 irq = irq | (irq >> 4);
3026 irq = irq | (irq >> 8);
3027 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 3028 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3029 }
3030
8ea2c2ec
JJ		 3031 if (!irq)
3032 return MXSER_ERR_IRQ;
3033 hwconf->irq = ((int)(irq & 0xF000) >> 12);
1da177e4
LT		 3034 for (i = 0; i < 8; i++)
3035 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 3036 if ((regs[12] & 0x80) == 0)
3037 return MXSER_ERR_VECTOR;
3038 hwconf->vector = (int)regs[11]; /* interrupt vector */
1da177e4
LT		 3039 if (id == 1)
3040 hwconf->vector_mask = 0x00FF;
3041 else
3042 hwconf->vector_mask = 0x000F;
3043 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3044 if (regs[12] & bits) {
3045 hwconf->baud_base[i] = 921600;
8ea2c2ec 3046 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3047 } else {
3048 hwconf->baud_base[i] = 115200;
8ea2c2ec 3049 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3050 }
3051 }
3052 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3053 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3054 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3055 outb(scratch2, cap + UART_LCR);
3056 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3057 scratch = inb(cap + UART_IIR);
3058
3059 if (scratch & 0xC0)
3060 hwconf->uart_type = PORT_16550A;
3061 else
3062 hwconf->uart_type = PORT_16450;
3063 if (id == 1)
3064 hwconf->ports = 8;
3065 else
3066 hwconf->ports = 4;
3067 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3068 request_region(hwconf->vector, 1, "mxser(vector)");
8ea2c2ec 3069 return hwconf->ports;
1da177e4
LT		 3070}
3071
3072#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3073#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3074#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3075#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3076#define EN_CCMD 0x000 /* Chip's command register */
3077#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3078#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3079#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3080#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3081#define EN0_DCFG 0x00E /* Data configuration reg WR */
3082#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3083#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3084#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3085static int mxser_read_register(int port, unsigned short *regs)
3086{
3087 int i, k, value, id;
3088 unsigned int j;
3089
3090 id = mxser_program_mode(port);
3091 if (id < 0)
8ea2c2ec 3092 return id;
1da177e4
LT		 3093 for (i = 0; i < 14; i++) {
3094 k = (i & 0x3F) | 0x180;
3095 for (j = 0x100; j > 0; j >>= 1) {
3096 outb(CHIP_CS, port);
3097 if (k & j) {
3098 outb(CHIP_CS | CHIP_DO, port);
3099 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3100 } else {
3101 outb(CHIP_CS, port);
3102 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3103 }
3104 }
8ea2c2ec 3105 (void)inb(port);
1da177e4
LT		 3106 value = 0;
3107 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3108 outb(CHIP_CS, port);
3109 outb(CHIP_CS | CHIP_SK, port);
3110 if (inb(port) & CHIP_DI)
3111 value |= j;
3112 }
3113 regs[i] = value;
3114 outb(0, port);
3115 }
3116 mxser_normal_mode(port);
8ea2c2ec 3117 return id;
1da177e4
LT		 3118}
3119
3120static int mxser_program_mode(int port)
3121{
3122 int id, i, j, n;
8ea2c2ec 3123 /* unsigned long flags; */
1da177e4
LT		 3124
3125 spin_lock(&gm_lock);
3126 outb(0, port);
3127 outb(0, port);
3128 outb(0, port);
8ea2c2ec
JJ		 3129 (void)inb(port);
3130 (void)inb(port);
1da177e4 3131 outb(0, port);
8ea2c2ec
JJ		 3132 (void)inb(port);
3133 /* restore_flags(flags); */
1da177e4
LT		 3134 spin_unlock(&gm_lock);
3135
3136 id = inb(port + 1) & 0x1F;
8ea2c2ec
JJ		 3137 if ((id != C168_ASIC_ID) &&
3138 (id != C104_ASIC_ID) &&
3139 (id != C102_ASIC_ID) &&
3140 (id != CI132_ASIC_ID) &&
3141 (id != CI134_ASIC_ID) &&
3142 (id != CI104J_ASIC_ID))
3143 return -1;
1da177e4
LT		 3144 for (i = 0, j = 0; i < 4; i++) {
3145 n = inb(port + 2);
3146 if (n == 'M') {
3147 j = 1;
3148 } else if ((j == 1) && (n == 1)) {
3149 j = 2;
3150 break;
3151 } else
3152 j = 0;
3153 }
3154 if (j != 2)
3155 id = -2;
8ea2c2ec 3156 return id;
1da177e4
LT		 3157}
3158
3159static void mxser_normal_mode(int port)
3160{
3161 int i, n;
3162
3163 outb(0xA5, port + 1);
3164 outb(0x80, port + 3);
3165 outb(12, port + 0); /* 9600 bps */
3166 outb(0, port + 1);
3167 outb(0x03, port + 3); /* 8 data bits */
3168 outb(0x13, port + 4); /* loop back mode */
3169 for (i = 0; i < 16; i++) {
3170 n = inb(port + 5);
3171 if ((n & 0x61) == 0x60)
3172 break;
3173 if ((n & 1) == 1)
8ea2c2ec 3174 (void)inb(port);
1da177e4
LT		 3175 }
3176 outb(0x00, port + 4);
3177}
3178
3179module_init(mxser_module_init);
3180module_exit(mxser_module_exit);
Linux kernel - Deliverables
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