[deliverable/linux.git] / drivers / char / pcmcia / cm4040_cs.c

/*
 * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
 *
 * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
 *
 * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
 * 	- add support for poll()
 * 	- driver cleanup
 * 	- add waitqueues
 * 	- adhere to linux kernel coding style and policies
 * 	- support 2.6.13 "new style" pcmcia interface
 * 	- add class interface for udev device creation
 *
 * The device basically is a USB CCID compliant device that has been
 * attached to an I/O-Mapped FIFO.
 *
 * All rights reserved, Dual BSD/GPL Licensed.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/delay.h>
#include <linux/poll.h>
#include <linux/smp_lock.h>
#include <linux/wait.h>
#include <asm/uaccess.h>
#include <asm/io.h>

#include <pcmcia/cistpl.h>
#include <pcmcia/cisreg.h>
#include <pcmcia/ciscode.h>
#include <pcmcia/ds.h>

#include "cm4040_cs.h"


#define reader_to_dev(x)	(&x->p_dev->dev)

/* n (debug level) is ignored */
/* additional debug output may be enabled by re-compiling with
 * CM4040_DEBUG set */
/* #define CM4040_DEBUG */
#define DEBUGP(n, rdr, x, args...) do { 		\
		dev_dbg(reader_to_dev(rdr), "%s:" x, 	\
			   __func__ , ## args);		\
	} while (0)

static char *version =
"OMNIKEY CardMan 4040 v1.1.0gm5 - All bugs added by Harald Welte";

#define	CCID_DRIVER_BULK_DEFAULT_TIMEOUT  	(150*HZ)
#define	CCID_DRIVER_ASYNC_POWERUP_TIMEOUT 	(35*HZ)
#define	CCID_DRIVER_MINIMUM_TIMEOUT 		(3*HZ)
#define READ_WRITE_BUFFER_SIZE 512
#define POLL_LOOP_COUNT				1000

/* how often to poll for fifo status change */
#define POLL_PERIOD 				msecs_to_jiffies(10)

static void reader_release(struct pcmcia_device *link);

static int major;
static struct class *cmx_class;

#define		BS_READABLE	0x01
#define		BS_WRITABLE	0x02

struct reader_dev {
	struct pcmcia_device	*p_dev;
	wait_queue_head_t	devq;
	wait_queue_head_t	poll_wait;
	wait_queue_head_t	read_wait;
	wait_queue_head_t	write_wait;
	unsigned long 	  	buffer_status;
	unsigned long     	timeout;
	unsigned char     	s_buf[READ_WRITE_BUFFER_SIZE];
	unsigned char     	r_buf[READ_WRITE_BUFFER_SIZE];
	struct timer_list 	poll_timer;
};

static struct pcmcia_device *dev_table[CM_MAX_DEV];

#ifndef CM4040_DEBUG
#define	xoutb	outb
#define	xinb	inb
#else
static inline void xoutb(unsigned char val, unsigned short port)
{
	pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
	outb(val, port);
}

static inline unsigned char xinb(unsigned short port)
{
	unsigned char val;

	val = inb(port);
	pr_debug("%.2x=inb(%.4x)\n", val, port);
	return val;
}
#endif

/* poll the device fifo status register.  not to be confused with
 * the poll syscall. */
static void cm4040_do_poll(unsigned long dummy)
{
	struct reader_dev *dev = (struct reader_dev *) dummy;
	unsigned int obs = xinb(dev->p_dev->resource[0]->start
				+ REG_OFFSET_BUFFER_STATUS);

	if ((obs & BSR_BULK_IN_FULL)) {
		set_bit(BS_READABLE, &dev->buffer_status);
		DEBUGP(4, dev, "waking up read_wait\n");
		wake_up_interruptible(&dev->read_wait);
	} else
		clear_bit(BS_READABLE, &dev->buffer_status);

	if (!(obs & BSR_BULK_OUT_FULL)) {
		set_bit(BS_WRITABLE, &dev->buffer_status);
		DEBUGP(4, dev, "waking up write_wait\n");
		wake_up_interruptible(&dev->write_wait);
	} else
		clear_bit(BS_WRITABLE, &dev->buffer_status);

	if (dev->buffer_status)
		wake_up_interruptible(&dev->poll_wait);

	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
}

static void cm4040_stop_poll(struct reader_dev *dev)
{
	del_timer_sync(&dev->poll_timer);
}

static int wait_for_bulk_out_ready(struct reader_dev *dev)
{
	int i, rc;
	int iobase = dev->p_dev->resource[0]->start;

	for (i = 0; i < POLL_LOOP_COUNT; i++) {
		if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
		    & BSR_BULK_OUT_FULL) == 0) {
			DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
			return 1;
		}
	}

	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
		dev->timeout);
	rc = wait_event_interruptible_timeout(dev->write_wait,
					      test_and_clear_bit(BS_WRITABLE,
						       &dev->buffer_status),
					      dev->timeout);

	if (rc > 0)
		DEBUGP(4, dev, "woke up: BulkOut empty\n");
	else if (rc == 0)
		DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
	else if (rc < 0)
		DEBUGP(4, dev, "woke up: signal arrived\n");

	return rc;
}

/* Write to Sync Control Register */
static int write_sync_reg(unsigned char val, struct reader_dev *dev)
{
	int iobase = dev->p_dev->resource[0]->start;
	int rc;

	rc = wait_for_bulk_out_ready(dev);
	if (rc <= 0)
		return rc;

	xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
	rc = wait_for_bulk_out_ready(dev);
	if (rc <= 0)
		return rc;

	return 1;
}

static int wait_for_bulk_in_ready(struct reader_dev *dev)
{
	int i, rc;
	int iobase = dev->p_dev->resource[0]->start;

	for (i = 0; i < POLL_LOOP_COUNT; i++) {
		if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
		    & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
			DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
			return 1;
		}
	}

	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
		dev->timeout);
	rc = wait_event_interruptible_timeout(dev->read_wait,
					      test_and_clear_bit(BS_READABLE,
						 	&dev->buffer_status),
					      dev->timeout);
	if (rc > 0)
		DEBUGP(4, dev, "woke up: BulkIn full\n");
	else if (rc == 0)
		DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
	else if (rc < 0)
		DEBUGP(4, dev, "woke up: signal arrived\n");

	return rc;
}

static ssize_t cm4040_read(struct file *filp, char __user *buf,
			size_t count, loff_t *ppos)
{
	struct reader_dev *dev = filp->private_data;
	int iobase = dev->p_dev->resource[0]->start;
	size_t bytes_to_read;
	unsigned long i;
	size_t min_bytes_to_read;
	int rc;
	unsigned char uc;

	DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);

	if (count == 0)
		return 0;

	if (count < 10)
		return -EFAULT;

	if (filp->f_flags & O_NONBLOCK) {
		DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
		DEBUGP(2, dev, "<- cm4040_read (failure)\n");
		return -EAGAIN;
	}

	if (!pcmcia_dev_present(dev->p_dev))
		return -ENODEV;

	for (i = 0; i < 5; i++) {
		rc = wait_for_bulk_in_ready(dev);
		if (rc <= 0) {
			DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
			DEBUGP(2, dev, "<- cm4040_read (failed)\n");
			if (rc == -ERESTARTSYS)
				return rc;
			return -EIO;
		}
	  	dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
#ifdef CM4040_DEBUG
		pr_debug("%lu:%2x ", i, dev->r_buf[i]);
	}
	pr_debug("\n");
#else
	}
#endif

	bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]);

	DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read);

	min_bytes_to_read = min(count, bytes_to_read + 5);
	min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);

	DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read);

	for (i = 0; i < (min_bytes_to_read-5); i++) {
		rc = wait_for_bulk_in_ready(dev);
		if (rc <= 0) {
			DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
			DEBUGP(2, dev, "<- cm4040_read (failed)\n");
			if (rc == -ERESTARTSYS)
				return rc;
			return -EIO;
		}
		dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
#ifdef CM4040_DEBUG
		pr_debug("%lu:%2x ", i, dev->r_buf[i]);
	}
	pr_debug("\n");
#else
	}
#endif

	*ppos = min_bytes_to_read;
	if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
		return -EFAULT;

	rc = wait_for_bulk_in_ready(dev);
	if (rc <= 0) {
		DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
		DEBUGP(2, dev, "<- cm4040_read (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		return -EIO;
	}

	rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
	if (rc <= 0) {
		DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
		DEBUGP(2, dev, "<- cm4040_read (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		else
			return -EIO;
	}

	uc = xinb(iobase + REG_OFFSET_BULK_IN);

	DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
	return min_bytes_to_read;
}

static ssize_t cm4040_write(struct file *filp, const char __user *buf,
			 size_t count, loff_t *ppos)
{
	struct reader_dev *dev = filp->private_data;
	int iobase = dev->p_dev->resource[0]->start;
	ssize_t rc;
	int i;
	unsigned int bytes_to_write;

	DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);

	if (count == 0) {
		DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
		return 0;
	}

	if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) {
		DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count);
		return -EIO;
	}

	if (filp->f_flags & O_NONBLOCK) {
		DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
		DEBUGP(4, dev, "<- cm4040_write (failure)\n");
		return -EAGAIN;
	}

	if (!pcmcia_dev_present(dev->p_dev))
		return -ENODEV;

	bytes_to_write = count;
	if (copy_from_user(dev->s_buf, buf, bytes_to_write))
		return -EFAULT;

	switch (dev->s_buf[0]) {
		case CMD_PC_TO_RDR_XFRBLOCK:
		case CMD_PC_TO_RDR_SECURE:
		case CMD_PC_TO_RDR_TEST_SECURE:
		case CMD_PC_TO_RDR_OK_SECURE:
			dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
			break;

		case CMD_PC_TO_RDR_ICCPOWERON:
			dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
			break;

		case CMD_PC_TO_RDR_GETSLOTSTATUS:
		case CMD_PC_TO_RDR_ICCPOWEROFF:
		case CMD_PC_TO_RDR_GETPARAMETERS:
		case CMD_PC_TO_RDR_RESETPARAMETERS:
		case CMD_PC_TO_RDR_SETPARAMETERS:
		case CMD_PC_TO_RDR_ESCAPE:
		case CMD_PC_TO_RDR_ICCCLOCK:
		default:
			dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
			break;
	}

	rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
	if (rc <= 0) {
		DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
		DEBUGP(2, dev, "<- cm4040_write (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		else
			return -EIO;
	}

	DEBUGP(4, dev, "start \n");

	for (i = 0; i < bytes_to_write; i++) {
		rc = wait_for_bulk_out_ready(dev);
		if (rc <= 0) {
			DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n",
			       rc);
			DEBUGP(2, dev, "<- cm4040_write (failed)\n");
			if (rc == -ERESTARTSYS)
				return rc;
			else
				return -EIO;
		}

		xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
	}
	DEBUGP(4, dev, "end\n");

	rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);

	if (rc <= 0) {
		DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
		DEBUGP(2, dev, "<- cm4040_write (failed)\n");
		if (rc == -ERESTARTSYS)
			return rc;
		else
			return -EIO;
	}

	DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
	return count;
}

static unsigned int cm4040_poll(struct file *filp, poll_table *wait)
{
	struct reader_dev *dev = filp->private_data;
	unsigned int mask = 0;

	poll_wait(filp, &dev->poll_wait, wait);

	if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
		mask |= POLLIN | POLLRDNORM;
	if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
		mask |= POLLOUT | POLLWRNORM;

	DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);

	return mask;
}

static int cm4040_open(struct inode *inode, struct file *filp)
{
	struct reader_dev *dev;
	struct pcmcia_device *link;
	int minor = iminor(inode);
	int ret;

	if (minor >= CM_MAX_DEV)
		return -ENODEV;

	lock_kernel();
	link = dev_table[minor];
	if (link == NULL || !pcmcia_dev_present(link)) {
		ret = -ENODEV;
		goto out;
	}

	if (link->open) {
		ret = -EBUSY;
		goto out;
	}

	dev = link->priv;
	filp->private_data = dev;

	if (filp->f_flags & O_NONBLOCK) {
		DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
		ret = -EAGAIN;
		goto out;
	}

	link->open = 1;

	dev->poll_timer.data = (unsigned long) dev;
	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);

	DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
	ret = nonseekable_open(inode, filp);
out:
	unlock_kernel();
	return ret;
}

static int cm4040_close(struct inode *inode, struct file *filp)
{
	struct reader_dev *dev = filp->private_data;
	struct pcmcia_device *link;
	int minor = iminor(inode);

	DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
	      iminor(inode));

	if (minor >= CM_MAX_DEV)
		return -ENODEV;

	link = dev_table[minor];
	if (link == NULL)
		return -ENODEV;

	cm4040_stop_poll(dev);

	link->open = 0;
	wake_up(&dev->devq);

	DEBUGP(2, dev, "<- cm4040_close\n");
	return 0;
}

static void cm4040_reader_release(struct pcmcia_device *link)
{
	struct reader_dev *dev = link->priv;

	DEBUGP(3, dev, "-> cm4040_reader_release\n");
	while (link->open) {
		DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release "
		       "until process has terminated\n");
 		wait_event(dev->devq, (link->open == 0));
	}
	DEBUGP(3, dev, "<- cm4040_reader_release\n");
	return;
}

static int cm4040_config_check(struct pcmcia_device *p_dev, void *priv_data)
{
	return pcmcia_request_io(p_dev);
}


static int reader_config(struct pcmcia_device *link, int devno)
{
	struct reader_dev *dev;
	int fail_rc;

	link->config_flags |= CONF_AUTO_SET_IO;

	if (pcmcia_loop_config(link, cm4040_config_check, NULL))
		goto cs_release;

	fail_rc = pcmcia_enable_device(link);
	if (fail_rc != 0) {
		dev_printk(KERN_INFO, &link->dev,
			   "pcmcia_enable_device failed 0x%x\n",
			   fail_rc);
		goto cs_release;
	}

	dev = link->priv;

	DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno,
	      link->resource[0]);
	DEBUGP(2, dev, "<- reader_config (succ)\n");

	return 0;

cs_release:
	reader_release(link);
	return -ENODEV;
}

static void reader_release(struct pcmcia_device *link)
{
	cm4040_reader_release(link);
	pcmcia_disable_device(link);
}

static int reader_probe(struct pcmcia_device *link)
{
	struct reader_dev *dev;
	int i, ret;

	for (i = 0; i < CM_MAX_DEV; i++) {
		if (dev_table[i] == NULL)
			break;
	}

	if (i == CM_MAX_DEV)
		return -ENODEV;

	dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
	if (dev == NULL)
		return -ENOMEM;

	dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
	dev->buffer_status = 0;

	link->priv = dev;
	dev->p_dev = link;

	dev_table[i] = link;

	init_waitqueue_head(&dev->devq);
	init_waitqueue_head(&dev->poll_wait);
	init_waitqueue_head(&dev->read_wait);
	init_waitqueue_head(&dev->write_wait);
	setup_timer(&dev->poll_timer, cm4040_do_poll, 0);

	ret = reader_config(link, i);
	if (ret) {
		dev_table[i] = NULL;
		kfree(dev);
		return ret;
	}

	device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);

	return 0;
}

static void reader_detach(struct pcmcia_device *link)
{
	struct reader_dev *dev = link->priv;
	int devno;

	/* find device */
	for (devno = 0; devno < CM_MAX_DEV; devno++) {
		if (dev_table[devno] == link)
			break;
	}
	if (devno == CM_MAX_DEV)
		return;

	reader_release(link);

	dev_table[devno] = NULL;
	kfree(dev);

	device_destroy(cmx_class, MKDEV(major, devno));

	return;
}

static const struct file_operations reader_fops = {
	.owner		= THIS_MODULE,
	.read		= cm4040_read,
	.write		= cm4040_write,
	.open		= cm4040_open,
	.release	= cm4040_close,
	.poll		= cm4040_poll,
};

static struct pcmcia_device_id cm4040_ids[] = {
	PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
	PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
				0xE32CDD8C, 0x8F23318B),
	PCMCIA_DEVICE_NULL,
};
MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);

static struct pcmcia_driver reader_driver = {
  	.owner		= THIS_MODULE,
	.name		= "cm4040_cs",
	.probe		= reader_probe,
	.remove		= reader_detach,
	.id_table	= cm4040_ids,
};

static int __init cm4040_init(void)
{
	int rc;

	printk(KERN_INFO "%s\n", version);
	cmx_class = class_create(THIS_MODULE, "cardman_4040");
	if (IS_ERR(cmx_class))
		return PTR_ERR(cmx_class);

	major = register_chrdev(0, DEVICE_NAME, &reader_fops);
	if (major < 0) {
		printk(KERN_WARNING MODULE_NAME
			": could not get major number\n");
		class_destroy(cmx_class);
		return major;
	}

	rc = pcmcia_register_driver(&reader_driver);
	if (rc < 0) {
		unregister_chrdev(major, DEVICE_NAME);
		class_destroy(cmx_class);
		return rc;
	}

	return 0;
}

static void __exit cm4040_exit(void)
{
	printk(KERN_INFO MODULE_NAME ": unloading\n");
	pcmcia_unregister_driver(&reader_driver);
	unregister_chrdev(major, DEVICE_NAME);
	class_destroy(cmx_class);
}

module_init(cm4040_init);
module_exit(cm4040_exit);
MODULE_LICENSE("Dual BSD/GPL");
Commit	Line	Data
77c44ab1 HW	1	/*
	2	* A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
	3	*
	4	* (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
	5	*
67bc6200	6	* (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
77c44ab1 HW	7	* - add support for poll()
	8	* - driver cleanup
	9	* - add waitqueues
	10	* - adhere to linux kernel coding style and policies
	11	* - support 2.6.13 "new style" pcmcia interface
67bc6200	12	* - add class interface for udev device creation
77c44ab1 HW	13	*
	14	* The device basically is a USB CCID compliant device that has been
	15	* attached to an I/O-Mapped FIFO.
	16	*
	17	* All rights reserved, Dual BSD/GPL Licensed.
	18	*/
	19
77c44ab1 HW	20	#include <linux/kernel.h>
	21	#include <linux/module.h>
	22	#include <linux/slab.h>
	23	#include <linux/init.h>
	24	#include <linux/fs.h>
	25	#include <linux/delay.h>
	26	#include <linux/poll.h>
8b5332f6	27	#include <linux/smp_lock.h>
77c44ab1 HW	28	#include <linux/wait.h>
	29	#include <asm/uaccess.h>
	30	#include <asm/io.h>
	31
77c44ab1 HW	32	#include <pcmcia/cistpl.h>
	33	#include <pcmcia/cisreg.h>
	34	#include <pcmcia/ciscode.h>
	35	#include <pcmcia/ds.h>
	36
	37	#include "cm4040_cs.h"
	38
	39
dd2e5a15	40	#define reader_to_dev(x) (&x->p_dev->dev)
cbf624f0 DB	41
	42	/* n (debug level) is ignored */
	43	/* additional debug output may be enabled by re-compiling with
	44	* CM4040_DEBUG set */
	45	/* #define CM4040_DEBUG */
	46	#define DEBUGP(n, rdr, x, args...) do { \
	47	dev_dbg(reader_to_dev(rdr), "%s:" x, \
	48	__func__ , ## args); \
77c44ab1	49	} while (0)
77c44ab1 HW	50
77c44ab1 HW	51	static char *version =
67bc6200	52	"OMNIKEY CardMan 4040 v1.1.0gm5 - All bugs added by Harald Welte";
77c44ab1 HW	53
	54	#define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ)
	55	#define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ)
	56	#define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ)
	57	#define READ_WRITE_BUFFER_SIZE 512
	58	#define POLL_LOOP_COUNT 1000
	59
	60	/* how often to poll for fifo status change */
	61	#define POLL_PERIOD msecs_to_jiffies(10)
	62
fba395ee	63	static void reader_release(struct pcmcia_device *link);
77c44ab1 HW	64
77c44ab1 HW	65	static int major;
67bc6200	66	static struct class *cmx_class;
77c44ab1 HW	67
	68	#define BS_READABLE 0x01
	69	#define BS_WRITABLE 0x02
	70
	71	struct reader_dev {
fd238232	72	struct pcmcia_device *p_dev;
77c44ab1 HW	73	wait_queue_head_t devq;
	74	wait_queue_head_t poll_wait;
	75	wait_queue_head_t read_wait;
	76	wait_queue_head_t write_wait;
	77	unsigned long buffer_status;
	78	unsigned long timeout;
	79	unsigned char s_buf[READ_WRITE_BUFFER_SIZE];
	80	unsigned char r_buf[READ_WRITE_BUFFER_SIZE];
	81	struct timer_list poll_timer;
	82	};
	83
fba395ee	84	static struct pcmcia_device *dev_table[CM_MAX_DEV];
77c44ab1	85
cbf624f0	86	#ifndef CM4040_DEBUG
77c44ab1 HW	87	#define xoutb outb
	88	#define xinb inb
	89	#else
	90	static inline void xoutb(unsigned char val, unsigned short port)
	91	{
cbf624f0	92	pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
77c44ab1 HW	93	outb(val, port);
	94	}
	95
	96	static inline unsigned char xinb(unsigned short port)
	97	{
	98	unsigned char val;
	99
	100	val = inb(port);
cbf624f0	101	pr_debug("%.2x=inb(%.4x)\n", val, port);
77c44ab1 HW	102	return val;
	103	}
	104	#endif
	105
	106	/* poll the device fifo status register. not to be confused with
	107	* the poll syscall. */
	108	static void cm4040_do_poll(unsigned long dummy)
	109	{
	110	struct reader_dev dev = (struct reader_dev ) dummy;
9a017a91	111	unsigned int obs = xinb(dev->p_dev->resource[0]->start
77c44ab1 HW	112	+ REG_OFFSET_BUFFER_STATUS);
	113
	114	if ((obs & BSR_BULK_IN_FULL)) {
	115	set_bit(BS_READABLE, &dev->buffer_status);
	116	DEBUGP(4, dev, "waking up read_wait\n");
	117	wake_up_interruptible(&dev->read_wait);
	118	} else
	119	clear_bit(BS_READABLE, &dev->buffer_status);
	120
	121	if (!(obs & BSR_BULK_OUT_FULL)) {
	122	set_bit(BS_WRITABLE, &dev->buffer_status);
	123	DEBUGP(4, dev, "waking up write_wait\n");
	124	wake_up_interruptible(&dev->write_wait);
	125	} else
	126	clear_bit(BS_WRITABLE, &dev->buffer_status);
	127
	128	if (dev->buffer_status)
	129	wake_up_interruptible(&dev->poll_wait);
	130
	131	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
	132	}
	133
	134	static void cm4040_stop_poll(struct reader_dev *dev)
	135	{
	136	del_timer_sync(&dev->poll_timer);
	137	}
	138
	139	static int wait_for_bulk_out_ready(struct reader_dev *dev)
	140	{
	141	int i, rc;
9a017a91	142	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	143
	144	for (i = 0; i < POLL_LOOP_COUNT; i++) {
	145	if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
	146	& BSR_BULK_OUT_FULL) == 0) {
	147	DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
	148	return 1;
	149	}
	150	}
	151
	152	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
	153	dev->timeout);
	154	rc = wait_event_interruptible_timeout(dev->write_wait,
	155	test_and_clear_bit(BS_WRITABLE,
	156	&dev->buffer_status),
	157	dev->timeout);
	158
	159	if (rc > 0)
	160	DEBUGP(4, dev, "woke up: BulkOut empty\n");
	161	else if (rc == 0)
	162	DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
	163	else if (rc < 0)
	164	DEBUGP(4, dev, "woke up: signal arrived\n");
	165
	166	return rc;
	167	}
	168
	169	/* Write to Sync Control Register */
	170	static int write_sync_reg(unsigned char val, struct reader_dev *dev)
	171	{
9a017a91	172	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	173	int rc;
	174
	175	rc = wait_for_bulk_out_ready(dev);
	176	if (rc <= 0)
	177	return rc;
	178
	179	xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
	180	rc = wait_for_bulk_out_ready(dev);
	181	if (rc <= 0)
	182	return rc;
	183
	184	return 1;
	185	}
	186
	187	static int wait_for_bulk_in_ready(struct reader_dev *dev)
	188	{
	189	int i, rc;
9a017a91	190	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	191
	192	for (i = 0; i < POLL_LOOP_COUNT; i++) {
	193	if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
	194	& BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
	195	DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
	196	return 1;
	197	}
	198	}
	199
	200	DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
	201	dev->timeout);
	202	rc = wait_event_interruptible_timeout(dev->read_wait,
	203	test_and_clear_bit(BS_READABLE,
	204	&dev->buffer_status),
	205	dev->timeout);
	206	if (rc > 0)
	207	DEBUGP(4, dev, "woke up: BulkIn full\n");
	208	else if (rc == 0)
	209	DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
	210	else if (rc < 0)
	211	DEBUGP(4, dev, "woke up: signal arrived\n");
	212
	213	return rc;
	214	}
	215
	216	static ssize_t cm4040_read(struct file filp, char __user buf,
	217	size_t count, loff_t *ppos)
	218	{
	219	struct reader_dev *dev = filp->private_data;
9a017a91	220	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	221	size_t bytes_to_read;
	222	unsigned long i;
	223	size_t min_bytes_to_read;
	224	int rc;
	225	unsigned char uc;
	226
	227	DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);
	228
	229	if (count == 0)
	230	return 0;
	231
	232	if (count < 10)
	233	return -EFAULT;
	234
	235	if (filp->f_flags & O_NONBLOCK) {
	236	DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
	237	DEBUGP(2, dev, "<- cm4040_read (failure)\n");
	238	return -EAGAIN;
	239	}
	240
e2d40963	241	if (!pcmcia_dev_present(dev->p_dev))
77c44ab1 HW	242	return -ENODEV;
	243
	244	for (i = 0; i < 5; i++) {
	245	rc = wait_for_bulk_in_ready(dev);
	246	if (rc <= 0) {
	247	DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
	248	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	249	if (rc == -ERESTARTSYS)
	250	return rc;
	251	return -EIO;
	252	}
	253	dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
cbf624f0 DB	254	#ifdef CM4040_DEBUG
cbf624f0 DB	255	pr_debug("%lu:%2x ", i, dev->r_buf[i]);
77c44ab1	256	}
cbf624f0	257	pr_debug("\n");
77c44ab1 HW	258	#else
	259	}
	260	#endif
	261
	262	bytes_to_read = 5 + le32_to_cpu((__le32 )&dev->r_buf[1]);
	263
e657ea17	264	DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read);
77c44ab1 HW	265
77c44ab1 HW	266	min_bytes_to_read = min(count, bytes_to_read + 5);
059819a4	267	min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);
77c44ab1	268
e657ea17	269	DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read);
77c44ab1 HW	270
	271	for (i = 0; i < (min_bytes_to_read-5); i++) {
	272	rc = wait_for_bulk_in_ready(dev);
	273	if (rc <= 0) {
	274	DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
	275	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	276	if (rc == -ERESTARTSYS)
	277	return rc;
	278	return -EIO;
	279	}
	280	dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
cbf624f0 DB	281	#ifdef CM4040_DEBUG
cbf624f0 DB	282	pr_debug("%lu:%2x ", i, dev->r_buf[i]);
77c44ab1	283	}
cbf624f0	284	pr_debug("\n");
77c44ab1 HW	285	#else
	286	}
	287	#endif
	288
	289	*ppos = min_bytes_to_read;
	290	if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
	291	return -EFAULT;
	292
	293	rc = wait_for_bulk_in_ready(dev);
	294	if (rc <= 0) {
	295	DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
	296	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	297	if (rc == -ERESTARTSYS)
	298	return rc;
	299	return -EIO;
	300	}
	301
	302	rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
	303	if (rc <= 0) {
	304	DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
	305	DEBUGP(2, dev, "<- cm4040_read (failed)\n");
	306	if (rc == -ERESTARTSYS)
	307	return rc;
	308	else
	309	return -EIO;
	310	}
	311
	312	uc = xinb(iobase + REG_OFFSET_BULK_IN);
	313
	314	DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
	315	return min_bytes_to_read;
	316	}
	317
	318	static ssize_t cm4040_write(struct file filp, const char __user buf,
	319	size_t count, loff_t *ppos)
	320	{
	321	struct reader_dev *dev = filp->private_data;
9a017a91	322	int iobase = dev->p_dev->resource[0]->start;
77c44ab1 HW	323	ssize_t rc;
	324	int i;
	325	unsigned int bytes_to_write;
	326
	327	DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);
	328
	329	if (count == 0) {
	330	DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
	331	return 0;
	332	}
	333
059819a4	334	if ((count < 5) \|\| (count > READ_WRITE_BUFFER_SIZE)) {
77c44ab1 HW	335	DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count);
	336	return -EIO;
	337	}
	338
	339	if (filp->f_flags & O_NONBLOCK) {
	340	DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
	341	DEBUGP(4, dev, "<- cm4040_write (failure)\n");
	342	return -EAGAIN;
	343	}
	344
e2d40963	345	if (!pcmcia_dev_present(dev->p_dev))
77c44ab1 HW	346	return -ENODEV;
	347
	348	bytes_to_write = count;
	349	if (copy_from_user(dev->s_buf, buf, bytes_to_write))
	350	return -EFAULT;
	351
	352	switch (dev->s_buf[0]) {
	353	case CMD_PC_TO_RDR_XFRBLOCK:
	354	case CMD_PC_TO_RDR_SECURE:
	355	case CMD_PC_TO_RDR_TEST_SECURE:
	356	case CMD_PC_TO_RDR_OK_SECURE:
	357	dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
	358	break;
	359
	360	case CMD_PC_TO_RDR_ICCPOWERON:
	361	dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
	362	break;
	363
	364	case CMD_PC_TO_RDR_GETSLOTSTATUS:
	365	case CMD_PC_TO_RDR_ICCPOWEROFF:
	366	case CMD_PC_TO_RDR_GETPARAMETERS:
	367	case CMD_PC_TO_RDR_RESETPARAMETERS:
	368	case CMD_PC_TO_RDR_SETPARAMETERS:
	369	case CMD_PC_TO_RDR_ESCAPE:
	370	case CMD_PC_TO_RDR_ICCCLOCK:
	371	default:
	372	dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
	373	break;
	374	}
	375
	376	rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
	377	if (rc <= 0) {
	378	DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
	379	DEBUGP(2, dev, "<- cm4040_write (failed)\n");
	380	if (rc == -ERESTARTSYS)
	381	return rc;
	382	else
	383	return -EIO;
	384	}
	385
	386	DEBUGP(4, dev, "start \n");
	387
	388	for (i = 0; i < bytes_to_write; i++) {
	389	rc = wait_for_bulk_out_ready(dev);
	390	if (rc <= 0) {
	391	DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n",
	392	rc);
	393	DEBUGP(2, dev, "<- cm4040_write (failed)\n");
	394	if (rc == -ERESTARTSYS)
	395	return rc;
	396	else
	397	return -EIO;
	398	}
	399
	400	xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
	401	}
	402	DEBUGP(4, dev, "end\n");
	403
	404	rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);
	405
	406	if (rc <= 0) {
	407	DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
	408	DEBUGP(2, dev, "<- cm4040_write (failed)\n");
	409	if (rc == -ERESTARTSYS)
410	return rc;
411	else
412	return -EIO;
413	}
414
415	DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
416	return count;
417	}
418
419	static unsigned int cm4040_poll(struct file filp, poll_table wait)
420	{
421	struct reader_dev *dev = filp->private_data;
422	unsigned int mask = 0;
423
424	poll_wait(filp, &dev->poll_wait, wait);
425
426	if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
427	mask \|= POLLIN \| POLLRDNORM;
428	if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
429	mask \|= POLLOUT \| POLLWRNORM;
430
431	DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);
432
433	return mask;
434	}
435
436	static int cm4040_open(struct inode inode, struct file filp)
437	{
438	struct reader_dev *dev;
fba395ee	439	struct pcmcia_device *link;
77c44ab1	440	int minor = iminor(inode);
8b5332f6	441	int ret;
77c44ab1 HW	442
	443	if (minor >= CM_MAX_DEV)
	444	return -ENODEV;
	445
8b5332f6	446	lock_kernel();
77c44ab1	447	link = dev_table[minor];
8b5332f6 JC	448	if (link == NULL \|\| !pcmcia_dev_present(link)) {
	449	ret = -ENODEV;
	450	goto out;
	451	}
77c44ab1	452
8b5332f6 JC	453	if (link->open) {
	454	ret = -EBUSY;
	455	goto out;
	456	}
77c44ab1 HW	457
	458	dev = link->priv;
	459	filp->private_data = dev;
	460
	461	if (filp->f_flags & O_NONBLOCK) {
	462	DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
8b5332f6 JC	463	ret = -EAGAIN;
8b5332f6 JC	464	goto out;
77c44ab1 HW	465	}
	466
	467	link->open = 1;
	468
	469	dev->poll_timer.data = (unsigned long) dev;
	470	mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
	471
	472	DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
8b5332f6 JC	473	ret = nonseekable_open(inode, filp);
	474	out:
	475	unlock_kernel();
	476	return ret;
77c44ab1 HW	477	}
	478
	479	static int cm4040_close(struct inode inode, struct file filp)
	480	{
	481	struct reader_dev *dev = filp->private_data;
fba395ee	482	struct pcmcia_device *link;
77c44ab1 HW	483	int minor = iminor(inode);
	484
	485	DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
	486	iminor(inode));
	487
	488	if (minor >= CM_MAX_DEV)
	489	return -ENODEV;
	490
	491	link = dev_table[minor];
	492	if (link == NULL)
	493	return -ENODEV;
	494
	495	cm4040_stop_poll(dev);
	496
	497	link->open = 0;
	498	wake_up(&dev->devq);
	499
	500	DEBUGP(2, dev, "<- cm4040_close\n");
	501	return 0;
	502	}
	503
fba395ee	504	static void cm4040_reader_release(struct pcmcia_device *link)
77c44ab1 HW	505	{
	506	struct reader_dev *dev = link->priv;
	507
	508	DEBUGP(3, dev, "-> cm4040_reader_release\n");
	509	while (link->open) {
	510	DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release "
	511	"until process has terminated\n");
	512	wait_event(dev->devq, (link->open == 0));
	513	}
	514	DEBUGP(3, dev, "<- cm4040_reader_release\n");
	515	return;
	516	}
	517
00990e7c	518	static int cm4040_config_check(struct pcmcia_device p_dev, void priv_data)
77c44ab1	519	{
00990e7c	520	return pcmcia_request_io(p_dev);
84e2d340 DB	521	}
	522
	523
	524	static int reader_config(struct pcmcia_device *link, int devno)
	525	{
	526	struct reader_dev *dev;
	527	int fail_rc;
77c44ab1	528
00990e7c DB	529	link->config_flags \|= CONF_AUTO_SET_IO;
00990e7c DB	530
84e2d340	531	if (pcmcia_loop_config(link, cm4040_config_check, NULL))
77c44ab1 HW	532	goto cs_release;
77c44ab1 HW	533
1ac71e5a	534	fail_rc = pcmcia_enable_device(link);
4c89e88b	535	if (fail_rc != 0) {
dd2e5a15	536	dev_printk(KERN_INFO, &link->dev,
1ac71e5a	537	"pcmcia_enable_device failed 0x%x\n",
77c44ab1 HW	538	fail_rc);
	539	goto cs_release;
	540	}
	541
	542	dev = link->priv;
77c44ab1	543
9a017a91 DB	544	DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno,
9a017a91 DB	545	link->resource[0]);
77c44ab1 HW	546	DEBUGP(2, dev, "<- reader_config (succ)\n");
77c44ab1 HW	547
15b99ac1	548	return 0;
77c44ab1	549
77c44ab1 HW	550	cs_release:
77c44ab1 HW	551	reader_release(link);
15b99ac1	552	return -ENODEV;
77c44ab1 HW	553	}
77c44ab1 HW	554
fba395ee	555	static void reader_release(struct pcmcia_device *link)
77c44ab1	556	{
925796e0	557	cm4040_reader_release(link);
fba395ee	558	pcmcia_disable_device(link);
77c44ab1 HW	559	}
77c44ab1 HW	560
15b99ac1	561	static int reader_probe(struct pcmcia_device *link)
77c44ab1 HW	562	{
77c44ab1 HW	563	struct reader_dev *dev;
15b99ac1	564	int i, ret;
77c44ab1 HW	565
	566	for (i = 0; i < CM_MAX_DEV; i++) {
	567	if (dev_table[i] == NULL)
	568	break;
	569	}
	570
	571	if (i == CM_MAX_DEV)
f8cfa618	572	return -ENODEV;
77c44ab1 HW	573
	574	dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
	575	if (dev == NULL)
f8cfa618	576	return -ENOMEM;
77c44ab1 HW	577
	578	dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
	579	dev->buffer_status = 0;
	580
77c44ab1	581	link->priv = dev;
fba395ee	582	dev->p_dev = link;
77c44ab1	583
77c44ab1 HW	584	dev_table[i] = link;
77c44ab1 HW	585
77c44ab1 HW	586	init_waitqueue_head(&dev->devq);
	587	init_waitqueue_head(&dev->poll_wait);
	588	init_waitqueue_head(&dev->read_wait);
	589	init_waitqueue_head(&dev->write_wait);
40565f19	590	setup_timer(&dev->poll_timer, cm4040_do_poll, 0);
77c44ab1	591
15b99ac1	592	ret = reader_config(link, i);
54493c10 AM	593	if (ret) {
	594	dev_table[i] = NULL;
	595	kfree(dev);
15b99ac1	596	return ret;
54493c10	597	}
f8cfa618	598
03457cd4	599	device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);
67bc6200	600
f8cfa618	601	return 0;
77c44ab1 HW	602	}
77c44ab1 HW	603
fba395ee	604	static void reader_detach(struct pcmcia_device *link)
77c44ab1 HW	605	{
77c44ab1 HW	606	struct reader_dev *dev = link->priv;
cc3b4866	607	int devno;
77c44ab1 HW	608
77c44ab1 HW	609	/* find device */
cc3b4866 DB	610	for (devno = 0; devno < CM_MAX_DEV; devno++) {
cc3b4866 DB	611	if (dev_table[devno] == link)
77c44ab1 HW	612	break;
77c44ab1 HW	613	}
cc3b4866	614	if (devno == CM_MAX_DEV)
77c44ab1 HW	615	return;
77c44ab1 HW	616
e2d40963	617	reader_release(link);
cc3b4866 DB	618
	619	dev_table[devno] = NULL;
	620	kfree(dev);
	621
07c015e7	622	device_destroy(cmx_class, MKDEV(major, devno));
67bc6200	623
77c44ab1 HW	624	return;
	625	}
	626
62322d25	627	static const struct file_operations reader_fops = {
77c44ab1 HW	628	.owner = THIS_MODULE,
	629	.read = cm4040_read,
	630	.write = cm4040_write,
	631	.open = cm4040_open,
	632	.release = cm4040_close,
	633	.poll = cm4040_poll,
	634	};
	635
	636	static struct pcmcia_device_id cm4040_ids[] = {
	637	PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
	638	PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
	639	0xE32CDD8C, 0x8F23318B),
	640	PCMCIA_DEVICE_NULL,
	641	};
	642	MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);
	643
	644	static struct pcmcia_driver reader_driver = {
	645	.owner = THIS_MODULE,
2e9b981a	646	.name = "cm4040_cs",
15b99ac1	647	.probe = reader_probe,
cc3b4866	648	.remove = reader_detach,
77c44ab1 HW	649	.id_table = cm4040_ids,
	650	};
	651
	652	static int __init cm4040_init(void)
	653	{
67bc6200 HW	654	int rc;
67bc6200 HW	655
77c44ab1	656	printk(KERN_INFO "%s\n", version);
67bc6200	657	cmx_class = class_create(THIS_MODULE, "cardman_4040");
5eb5fc97 AM	658	if (IS_ERR(cmx_class))
5eb5fc97 AM	659	return PTR_ERR(cmx_class);
67bc6200	660
77c44ab1 HW	661	major = register_chrdev(0, DEVICE_NAME, &reader_fops);
	662	if (major < 0) {
	663	printk(KERN_WARNING MODULE_NAME
	664	": could not get major number\n");
54493c10	665	class_destroy(cmx_class);
5eb5fc97	666	return major;
77c44ab1	667	}
7fc5b1e3 HW	668
	669	rc = pcmcia_register_driver(&reader_driver);
	670	if (rc < 0) {
	671	unregister_chrdev(major, DEVICE_NAME);
54493c10	672	class_destroy(cmx_class);
7fc5b1e3 HW	673	return rc;
	674	}
	675
77c44ab1 HW	676	return 0;
	677	}
	678
	679	static void __exit cm4040_exit(void)
	680	{
77c44ab1 HW	681	printk(KERN_INFO MODULE_NAME ": unloading\n");
77c44ab1 HW	682	pcmcia_unregister_driver(&reader_driver);
77c44ab1	683	unregister_chrdev(major, DEVICE_NAME);
67bc6200	684	class_destroy(cmx_class);
77c44ab1 HW	685	}
	686
	687	module_init(cm4040_init);
	688	module_exit(cm4040_exit);
	689	MODULE_LICENSE("Dual BSD/GPL");