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stacktrace: fix header file for !CONFIG_STACKTRACE
[deliverable/linux.git] / drivers / char / pcmcia / synclink_cs.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
a7482a2e 4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
1da177e4
LT		 5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30#if defined(__i386__)
31# define BREAKPOINT() asm(" int $3");
32#else
33# define BREAKPOINT() { }
34#endif
35
36#define MAX_DEVICE_COUNT 4
37
1da177e4
LT		 38#include <linux/module.h>
39#include <linux/errno.h>
40#include <linux/signal.h>
41#include <linux/sched.h>
42#include <linux/timer.h>
43#include <linux/time.h>
44#include <linux/interrupt.h>
1da177e4
LT		 45#include <linux/tty.h>
46#include <linux/tty_flip.h>
47#include <linux/serial.h>
48#include <linux/major.h>
49#include <linux/string.h>
50#include <linux/fcntl.h>
51#include <linux/ptrace.h>
52#include <linux/ioport.h>
53#include <linux/mm.h>
54#include <linux/slab.h>
55#include <linux/netdevice.h>
56#include <linux/vmalloc.h>
57#include <linux/init.h>
1da177e4
LT		 58#include <linux/delay.h>
59#include <linux/ioctl.h>
60
61#include <asm/system.h>
62#include <asm/io.h>
63#include <asm/irq.h>
64#include <asm/dma.h>
65#include <linux/bitops.h>
66#include <asm/types.h>
67#include <linux/termios.h>
68#include <linux/workqueue.h>
69#include <linux/hdlc.h>
70
1da177e4
LT		 71#include <pcmcia/cs_types.h>
72#include <pcmcia/cs.h>
73#include <pcmcia/cistpl.h>
74#include <pcmcia/cisreg.h>
75#include <pcmcia/ds.h>
76
af69c7f9
PF		 77#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
78#define SYNCLINK_GENERIC_HDLC 1
79#else
80#define SYNCLINK_GENERIC_HDLC 0
1da177e4
LT		 81#endif
82
83#define GET_USER(error,value,addr) error = get_user(value,addr)
84#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
85#define PUT_USER(error,value,addr) error = put_user(value,addr)
86#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
87
88#include <asm/uaccess.h>
89
90#include "linux/synclink.h"
91
92static MGSL_PARAMS default_params = {
93 MGSL_MODE_HDLC, /* unsigned long mode */
94 0, /* unsigned char loopback; */
95 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
96 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
97 0, /* unsigned long clock_speed; */
98 0xff, /* unsigned char addr_filter; */
99 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
100 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
101 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
102 9600, /* unsigned long data_rate; */
103 8, /* unsigned char data_bits; */
104 1, /* unsigned char stop_bits; */
105 ASYNC_PARITY_NONE /* unsigned char parity; */
106};
107
108typedef struct
109{
110 int count;
111 unsigned char status;
112 char data[1];
113} RXBUF;
114
115/* The queue of BH actions to be performed */
116
117#define BH_RECEIVE 1
118#define BH_TRANSMIT 2
119#define BH_STATUS 4
120
121#define IO_PIN_SHUTDOWN_LIMIT 100
122
123#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
124
125struct _input_signal_events {
126 int ri_up;
127 int ri_down;
128 int dsr_up;
129 int dsr_down;
130 int dcd_up;
131 int dcd_down;
132 int cts_up;
133 int cts_down;
134};
135
136
137/*
138 * Device instance data structure
139 */
140
141typedef struct _mgslpc_info {
142 void *if_ptr; /* General purpose pointer (used by SPPP) */
143 int magic;
144 int flags;
145 int count; /* count of opens */
146 int line;
147 unsigned short close_delay;
148 unsigned short closing_wait; /* time to wait before closing */
149
150 struct mgsl_icount icount;
151
152 struct tty_struct *tty;
153 int timeout;
154 int x_char; /* xon/xoff character */
155 int blocked_open; /* # of blocked opens */
156 unsigned char read_status_mask;
157 unsigned char ignore_status_mask;
158
159 unsigned char *tx_buf;
160 int tx_put;
161 int tx_get;
162 int tx_count;
163
164 /* circular list of fixed length rx buffers */
165
166 unsigned char *rx_buf; /* memory allocated for all rx buffers */
167 int rx_buf_total_size; /* size of memory allocated for rx buffers */
168 int rx_put; /* index of next empty rx buffer */
169 int rx_get; /* index of next full rx buffer */
170 int rx_buf_size; /* size in bytes of single rx buffer */
171 int rx_buf_count; /* total number of rx buffers */
172 int rx_frame_count; /* number of full rx buffers */
173
174 wait_queue_head_t open_wait;
175 wait_queue_head_t close_wait;
176
177 wait_queue_head_t status_event_wait_q;
178 wait_queue_head_t event_wait_q;
179 struct timer_list tx_timer; /* HDLC transmit timeout timer */
180 struct _mgslpc_info *next_device; /* device list link */
181
182 unsigned short imra_value;
183 unsigned short imrb_value;
184 unsigned char pim_value;
185
186 spinlock_t lock;
187 struct work_struct task; /* task structure for scheduling bh */
188
189 u32 max_frame_size;
190
191 u32 pending_bh;
192
193 int bh_running;
194 int bh_requested;
195
196 int dcd_chkcount; /* check counts to prevent */
197 int cts_chkcount; /* too many IRQs if a signal */
198 int dsr_chkcount; /* is floating */
199 int ri_chkcount;
200
201 int rx_enabled;
202 int rx_overflow;
203
204 int tx_enabled;
205 int tx_active;
206 int tx_aborting;
207 u32 idle_mode;
208
209 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
210
211 char device_name[25]; /* device instance name */
212
213 unsigned int io_base; /* base I/O address of adapter */
214 unsigned int irq_level;
215
216 MGSL_PARAMS params; /* communications parameters */
217
218 unsigned char serial_signals; /* current serial signal states */
219
220 char irq_occurred; /* for diagnostics use */
221 char testing_irq;
222 unsigned int init_error; /* startup error (DIAGS) */
223
224 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
225 BOOLEAN drop_rts_on_tx_done;
226
227 struct _input_signal_events input_signal_events;
228
229 /* PCMCIA support */
fd238232 230 struct pcmcia_device *p_dev;
1da177e4
LT		 231 dev_node_t node;
232 int stop;
233
234 /* SPPP/Cisco HDLC device parts */
235 int netcount;
236 int dosyncppp;
237 spinlock_t netlock;
238
af69c7f9 239#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 240 struct net_device *netdev;
241#endif
242
243} MGSLPC_INFO;
244
245#define MGSLPC_MAGIC 0x5402
246
247/*
248 * The size of the serial xmit buffer is 1 page, or 4096 bytes
249 */
250#define TXBUFSIZE 4096
251
252
253#define CHA 0x00 /* channel A offset */
254#define CHB 0x40 /* channel B offset */
255
256/*
257 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
258 */
259#undef PVR
260
261#define RXFIFO 0
262#define TXFIFO 0
263#define STAR 0x20
264#define CMDR 0x20
265#define RSTA 0x21
266#define PRE 0x21
267#define MODE 0x22
268#define TIMR 0x23
269#define XAD1 0x24
270#define XAD2 0x25
271#define RAH1 0x26
272#define RAH2 0x27
273#define DAFO 0x27
274#define RAL1 0x28
275#define RFC 0x28
276#define RHCR 0x29
277#define RAL2 0x29
278#define RBCL 0x2a
279#define XBCL 0x2a
280#define RBCH 0x2b
281#define XBCH 0x2b
282#define CCR0 0x2c
283#define CCR1 0x2d
284#define CCR2 0x2e
285#define CCR3 0x2f
286#define VSTR 0x34
287#define BGR 0x34
288#define RLCR 0x35
289#define AML 0x36
290#define AMH 0x37
291#define GIS 0x38
292#define IVA 0x38
293#define IPC 0x39
294#define ISR 0x3a
295#define IMR 0x3a
296#define PVR 0x3c
297#define PIS 0x3d
298#define PIM 0x3d
299#define PCR 0x3e
300#define CCR4 0x3f
301
302// IMR/ISR
303
304#define IRQ_BREAK_ON BIT15 // rx break detected
305#define IRQ_DATAOVERRUN BIT14 // receive data overflow
306#define IRQ_ALLSENT BIT13 // all sent
307#define IRQ_UNDERRUN BIT12 // transmit data underrun
308#define IRQ_TIMER BIT11 // timer interrupt
309#define IRQ_CTS BIT10 // CTS status change
310#define IRQ_TXREPEAT BIT9 // tx message repeat
311#define IRQ_TXFIFO BIT8 // transmit pool ready
312#define IRQ_RXEOM BIT7 // receive message end
313#define IRQ_EXITHUNT BIT6 // receive frame start
314#define IRQ_RXTIME BIT6 // rx char timeout
315#define IRQ_DCD BIT2 // carrier detect status change
316#define IRQ_OVERRUN BIT1 // receive frame overflow
317#define IRQ_RXFIFO BIT0 // receive pool full
318
319// STAR
320
321#define XFW BIT6 // transmit FIFO write enable
322#define CEC BIT2 // command executing
323#define CTS BIT1 // CTS state
324
325#define PVR_DTR BIT0
326#define PVR_DSR BIT1
327#define PVR_RI BIT2
328#define PVR_AUTOCTS BIT3
329#define PVR_RS232 0x20 /* 0010b */
330#define PVR_V35 0xe0 /* 1110b */
331#define PVR_RS422 0x40 /* 0100b */
332
333/* Register access functions */
334
335#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
336#define read_reg(info, reg) inb((info)->io_base + (reg))
337
338#define read_reg16(info, reg) inw((info)->io_base + (reg))
339#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
340
341#define set_reg_bits(info, reg, mask) \
342 write_reg(info, (reg), \
343 (unsigned char) (read_reg(info, (reg)) | (mask)))
344#define clear_reg_bits(info, reg, mask) \
345 write_reg(info, (reg), \
346 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
347/*
348 * interrupt enable/disable routines
349 */
350static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
351{
352 if (channel == CHA) {
353 info->imra_value |= mask;
354 write_reg16(info, CHA + IMR, info->imra_value);
355 } else {
356 info->imrb_value |= mask;
357 write_reg16(info, CHB + IMR, info->imrb_value);
358 }
359}
360static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
361{
362 if (channel == CHA) {
363 info->imra_value &= ~mask;
364 write_reg16(info, CHA + IMR, info->imra_value);
365 } else {
366 info->imrb_value &= ~mask;
367 write_reg16(info, CHB + IMR, info->imrb_value);
368 }
369}
370
371#define port_irq_disable(info, mask) \
372 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
373
374#define port_irq_enable(info, mask) \
375 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
376
377static void rx_start(MGSLPC_INFO *info);
378static void rx_stop(MGSLPC_INFO *info);
379
380static void tx_start(MGSLPC_INFO *info);
381static void tx_stop(MGSLPC_INFO *info);
382static void tx_set_idle(MGSLPC_INFO *info);
383
384static void get_signals(MGSLPC_INFO *info);
385static void set_signals(MGSLPC_INFO *info);
386
387static void reset_device(MGSLPC_INFO *info);
388
389static void hdlc_mode(MGSLPC_INFO *info);
390static void async_mode(MGSLPC_INFO *info);
391
392static void tx_timeout(unsigned long context);
393
394static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
395
af69c7f9 396#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 397#define dev_to_port(D) (dev_to_hdlc(D)->priv)
398static void hdlcdev_tx_done(MGSLPC_INFO *info);
399static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
400static int hdlcdev_init(MGSLPC_INFO *info);
401static void hdlcdev_exit(MGSLPC_INFO *info);
402#endif
403
404static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
405
406static BOOLEAN register_test(MGSLPC_INFO *info);
407static BOOLEAN irq_test(MGSLPC_INFO *info);
408static int adapter_test(MGSLPC_INFO *info);
409
410static int claim_resources(MGSLPC_INFO *info);
411static void release_resources(MGSLPC_INFO *info);
412static void mgslpc_add_device(MGSLPC_INFO *info);
413static void mgslpc_remove_device(MGSLPC_INFO *info);
414
415static int rx_get_frame(MGSLPC_INFO *info);
416static void rx_reset_buffers(MGSLPC_INFO *info);
417static int rx_alloc_buffers(MGSLPC_INFO *info);
418static void rx_free_buffers(MGSLPC_INFO *info);
419
7d12e780 420static irqreturn_t mgslpc_isr(int irq, void *dev_id);
1da177e4
LT		 421
422/*
423 * Bottom half interrupt handlers
424 */
c4028958 425static void bh_handler(struct work_struct *work);
1da177e4
LT		 426static void bh_transmit(MGSLPC_INFO *info);
427static void bh_status(MGSLPC_INFO *info);
428
429/*
430 * ioctl handlers
431 */
432static int tiocmget(struct tty_struct *tty, struct file *file);
433static int tiocmset(struct tty_struct *tty, struct file *file,
434 unsigned int set, unsigned int clear);
435static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
436static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
437static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
438static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
439static int set_txidle(MGSLPC_INFO *info, int idle_mode);
440static int set_txenable(MGSLPC_INFO *info, int enable);
441static int tx_abort(MGSLPC_INFO *info);
442static int set_rxenable(MGSLPC_INFO *info, int enable);
443static int wait_events(MGSLPC_INFO *info, int __user *mask);
444
445static MGSLPC_INFO *mgslpc_device_list = NULL;
446static int mgslpc_device_count = 0;
447
448/*
449 * Set this param to non-zero to load eax with the
450 * .text section address and breakpoint on module load.
451 * This is useful for use with gdb and add-symbol-file command.
452 */
453static int break_on_load=0;
454
455/*
456 * Driver major number, defaults to zero to get auto
457 * assigned major number. May be forced as module parameter.
458 */
459static int ttymajor=0;
460
461static int debug_level = 0;
462static int maxframe[MAX_DEVICE_COUNT] = {0,};
463static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
464
465module_param(break_on_load, bool, 0);
466module_param(ttymajor, int, 0);
467module_param(debug_level, int, 0);
468module_param_array(maxframe, int, NULL, 0);
469module_param_array(dosyncppp, int, NULL, 0);
470
471MODULE_LICENSE("GPL");
472
473static char *driver_name = "SyncLink PC Card driver";
a7482a2e 474static char *driver_version = "$Revision: 4.34 $";
1da177e4
LT		 475
476static struct tty_driver *serial_driver;
477
478/* number of characters left in xmit buffer before we ask for more */
479#define WAKEUP_CHARS 256
480
481static void mgslpc_change_params(MGSLPC_INFO *info);
482static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
483
484/* PCMCIA prototypes */
485
15b99ac1 486static int mgslpc_config(struct pcmcia_device *link);
1da177e4 487static void mgslpc_release(u_long arg);
cc3b4866 488static void mgslpc_detach(struct pcmcia_device *p_dev);
1da177e4 489
1da177e4
LT		 490/*
491 * 1st function defined in .text section. Calling this function in
492 * init_module() followed by a breakpoint allows a remote debugger
493 * (gdb) to get the .text address for the add-symbol-file command.
494 * This allows remote debugging of dynamically loadable modules.
495 */
496static void* mgslpc_get_text_ptr(void)
497{
498 return mgslpc_get_text_ptr;
499}
500
501/**
502 * line discipline callback wrappers
503 *
504 * The wrappers maintain line discipline references
505 * while calling into the line discipline.
506 *
507 * ldisc_flush_buffer - flush line discipline receive buffers
508 * ldisc_receive_buf - pass receive data to line discipline
509 */
510
511static void ldisc_flush_buffer(struct tty_struct *tty)
512{
513 struct tty_ldisc *ld = tty_ldisc_ref(tty);
514 if (ld) {
515 if (ld->flush_buffer)
516 ld->flush_buffer(tty);
517 tty_ldisc_deref(ld);
518 }
519}
520
521static void ldisc_receive_buf(struct tty_struct *tty,
522 const __u8 *data, char *flags, int count)
523{
524 struct tty_ldisc *ld;
525 if (!tty)
526 return;
527 ld = tty_ldisc_ref(tty);
528 if (ld) {
529 if (ld->receive_buf)
530 ld->receive_buf(tty, data, flags, count);
531 tty_ldisc_deref(ld);
532 }
533}
534
15b99ac1 535static int mgslpc_probe(struct pcmcia_device *link)
1da177e4
LT		 536{
537 MGSLPC_INFO *info;
15b99ac1 538 int ret;
fd238232 539
1da177e4
LT		 540 if (debug_level >= DEBUG_LEVEL_INFO)
541 printk("mgslpc_attach\n");
fd238232 542
5cbded58 543 info = kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
1da177e4
LT		 544 if (!info) {
545 printk("Error can't allocate device instance data\n");
f8cfa618 546 return -ENOMEM;
1da177e4
LT		 547 }
548
549 memset(info, 0, sizeof(MGSLPC_INFO));
550 info->magic = MGSLPC_MAGIC;
c4028958 551 INIT_WORK(&info->task, bh_handler);
1da177e4
LT		 552 info->max_frame_size = 4096;
553 info->close_delay = 5*HZ/10;
554 info->closing_wait = 30*HZ;
555 init_waitqueue_head(&info->open_wait);
556 init_waitqueue_head(&info->close_wait);
557 init_waitqueue_head(&info->status_event_wait_q);
558 init_waitqueue_head(&info->event_wait_q);
559 spin_lock_init(&info->lock);
560 spin_lock_init(&info->netlock);
561 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
562 info->idle_mode = HDLC_TXIDLE_FLAGS;
563 info->imra_value = 0xffff;
564 info->imrb_value = 0xffff;
565 info->pim_value = 0xff;
566
fba395ee 567 info->p_dev = link;
1da177e4 568 link->priv = info;
fd238232 569
fba395ee 570 /* Initialize the struct pcmcia_device structure */
1da177e4
LT		 571
572 /* Interrupt setup */
573 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
0c7ab676 574 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
1da177e4 575 link->irq.Handler = NULL;
fd238232 576
1da177e4 577 link->conf.Attributes = 0;
1da177e4
LT		 578 link->conf.IntType = INT_MEMORY_AND_IO;
579
15b99ac1
DB		 580 ret = mgslpc_config(link);
581 if (ret)
582 return ret;
1da177e4
LT		 583
584 mgslpc_add_device(info);
585
f8cfa618 586 return 0;
1da177e4
LT		 587}
588
589/* Card has been inserted.
590 */
591
592#define CS_CHECK(fn, ret) \
593do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
594
15b99ac1 595static int mgslpc_config(struct pcmcia_device *link)
1da177e4 596{
1da177e4
LT		 597 MGSLPC_INFO *info = link->priv;
598 tuple_t tuple;
599 cisparse_t parse;
600 int last_fn, last_ret;
601 u_char buf[64];
1da177e4
LT		 602 cistpl_cftable_entry_t dflt = { 0 };
603 cistpl_cftable_entry_t *cfg;
604
605 if (debug_level >= DEBUG_LEVEL_INFO)
606 printk("mgslpc_config(0x%p)\n", link);
607
1da177e4
LT		 608 tuple.Attributes = 0;
609 tuple.TupleData = buf;
610 tuple.TupleDataMax = sizeof(buf);
611 tuple.TupleOffset = 0;
1da177e4 612
1da177e4
LT		 613 /* get CIS configuration entry */
614
615 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
fba395ee 616 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
1da177e4
LT		 617
618 cfg = &(parse.cftable_entry);
fba395ee
DB		 619 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
620 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
1da177e4
LT		 621
622 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
623 if (cfg->index == 0)
624 goto cs_failed;
625
626 link->conf.ConfigIndex = cfg->index;
627 link->conf.Attributes |= CONF_ENABLE_IRQ;
628
629 /* IO window settings */
630 link->io.NumPorts1 = 0;
631 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
632 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
633 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
634 if (!(io->flags & CISTPL_IO_8BIT))
635 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
636 if (!(io->flags & CISTPL_IO_16BIT))
637 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
638 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
639 link->io.BasePort1 = io->win[0].base;
640 link->io.NumPorts1 = io->win[0].len;
fba395ee 641 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
1da177e4
LT		 642 }
643
644 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 645 link->conf.IntType = INT_MEMORY_AND_IO;
646 link->conf.ConfigIndex = 8;
647 link->conf.Present = PRESENT_OPTION;
648
649 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
650 link->irq.Handler = mgslpc_isr;
651 link->irq.Instance = info;
fba395ee 652 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
1da177e4 653
fba395ee 654 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
1da177e4
LT		 655
656 info->io_base = link->io.BasePort1;
657 info->irq_level = link->irq.AssignedIRQ;
658
659 /* add to linked list of devices */
660 sprintf(info->node.dev_name, "mgslpc0");
661 info->node.major = info->node.minor = 0;
fd238232 662 link->dev_node = &info->node;
1da177e4
LT		 663
664 printk(KERN_INFO "%s: index 0x%02x:",
665 info->node.dev_name, link->conf.ConfigIndex);
666 if (link->conf.Attributes & CONF_ENABLE_IRQ)
667 printk(", irq %d", link->irq.AssignedIRQ);
668 if (link->io.NumPorts1)
669 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
670 link->io.BasePort1+link->io.NumPorts1-1);
671 printk("\n");
15b99ac1 672 return 0;
1da177e4
LT		 673
674cs_failed:
fba395ee 675 cs_error(link, last_fn, last_ret);
1da177e4 676 mgslpc_release((u_long)link);
15b99ac1 677 return -ENODEV;
1da177e4
LT		 678}
679
680/* Card has been removed.
681 * Unregister device and release PCMCIA configuration.
682 * If device is open, postpone until it is closed.
683 */
684static void mgslpc_release(u_long arg)
685{
e2d40963 686 struct pcmcia_device *link = (struct pcmcia_device *)arg;
1da177e4 687
e2d40963
DB		 688 if (debug_level >= DEBUG_LEVEL_INFO)
689 printk("mgslpc_release(0x%p)\n", link);
1da177e4 690
e2d40963 691 pcmcia_disable_device(link);
1da177e4
LT		 692}
693
fba395ee 694static void mgslpc_detach(struct pcmcia_device *link)
1da177e4 695{
e2d40963
DB		 696 if (debug_level >= DEBUG_LEVEL_INFO)
697 printk("mgslpc_detach(0x%p)\n", link);
cc3b4866 698
e2d40963
DB		 699 ((MGSLPC_INFO *)link->priv)->stop = 1;
700 mgslpc_release((u_long)link);
1da177e4 701
e2d40963 702 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
1da177e4
LT		 703}
704
fba395ee 705static int mgslpc_suspend(struct pcmcia_device *link)
98e4c28b 706{
98e4c28b
DB		 707 MGSLPC_INFO *info = link->priv;
708
98e4c28b 709 info->stop = 1;
98e4c28b
DB		 710
711 return 0;
712}
713
fba395ee 714static int mgslpc_resume(struct pcmcia_device *link)
98e4c28b 715{
98e4c28b
DB		 716 MGSLPC_INFO *info = link->priv;
717
98e4c28b
DB		 718 info->stop = 0;
719
720 return 0;
721}
722
723
1da177e4
LT		 724static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
725 char *name, const char *routine)
726{
727#ifdef MGSLPC_PARANOIA_CHECK
728 static const char *badmagic =
729 "Warning: bad magic number for mgsl struct (%s) in %s\n";
730 static const char *badinfo =
731 "Warning: null mgslpc_info for (%s) in %s\n";
732
733 if (!info) {
734 printk(badinfo, name, routine);
735 return 1;
736 }
737 if (info->magic != MGSLPC_MAGIC) {
738 printk(badmagic, name, routine);
739 return 1;
740 }
741#else
742 if (!info)
743 return 1;
744#endif
745 return 0;
746}
747
748
749#define CMD_RXFIFO BIT7 // release current rx FIFO
750#define CMD_RXRESET BIT6 // receiver reset
751#define CMD_RXFIFO_READ BIT5
752#define CMD_START_TIMER BIT4
753#define CMD_TXFIFO BIT3 // release current tx FIFO
754#define CMD_TXEOM BIT1 // transmit end message
755#define CMD_TXRESET BIT0 // transmit reset
756
757static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
758{
759 int i = 0;
760 /* wait for command completion */
761 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
762 udelay(1);
763 if (i++ == 1000)
764 return FALSE;
765 }
766 return TRUE;
767}
768
769static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
770{
771 wait_command_complete(info, channel);
772 write_reg(info, (unsigned char) (channel + CMDR), cmd);
773}
774
775static void tx_pause(struct tty_struct *tty)
776{
777 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
778 unsigned long flags;
779
780 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
781 return;
782 if (debug_level >= DEBUG_LEVEL_INFO)
783 printk("tx_pause(%s)\n",info->device_name);
784
785 spin_lock_irqsave(&info->lock,flags);
786 if (info->tx_enabled)
787 tx_stop(info);
788 spin_unlock_irqrestore(&info->lock,flags);
789}
790
791static void tx_release(struct tty_struct *tty)
792{
793 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
794 unsigned long flags;
795
796 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
797 return;
798 if (debug_level >= DEBUG_LEVEL_INFO)
799 printk("tx_release(%s)\n",info->device_name);
800
801 spin_lock_irqsave(&info->lock,flags);
802 if (!info->tx_enabled)
803 tx_start(info);
804 spin_unlock_irqrestore(&info->lock,flags);
805}
806
807/* Return next bottom half action to perform.
808 * or 0 if nothing to do.
809 */
810static int bh_action(MGSLPC_INFO *info)
811{
812 unsigned long flags;
813 int rc = 0;
814
815 spin_lock_irqsave(&info->lock,flags);
816
817 if (info->pending_bh & BH_RECEIVE) {
818 info->pending_bh &= ~BH_RECEIVE;
819 rc = BH_RECEIVE;
820 } else if (info->pending_bh & BH_TRANSMIT) {
821 info->pending_bh &= ~BH_TRANSMIT;
822 rc = BH_TRANSMIT;
823 } else if (info->pending_bh & BH_STATUS) {
824 info->pending_bh &= ~BH_STATUS;
825 rc = BH_STATUS;
826 }
827
828 if (!rc) {
829 /* Mark BH routine as complete */
830 info->bh_running = 0;
831 info->bh_requested = 0;
832 }
833
834 spin_unlock_irqrestore(&info->lock,flags);
835
836 return rc;
837}
838
c4028958 839static void bh_handler(struct work_struct *work)
1da177e4 840{
c4028958 841 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
1da177e4
LT		 842 int action;
843
844 if (!info)
845 return;
846
847 if (debug_level >= DEBUG_LEVEL_BH)
848 printk( "%s(%d):bh_handler(%s) entry\n",
849 __FILE__,__LINE__,info->device_name);
850
851 info->bh_running = 1;
852
853 while((action = bh_action(info)) != 0) {
854
855 /* Process work item */
856 if ( debug_level >= DEBUG_LEVEL_BH )
857 printk( "%s(%d):bh_handler() work item action=%d\n",
858 __FILE__,__LINE__,action);
859
860 switch (action) {
861
862 case BH_RECEIVE:
863 while(rx_get_frame(info));
864 break;
865 case BH_TRANSMIT:
866 bh_transmit(info);
867 break;
868 case BH_STATUS:
869 bh_status(info);
870 break;
871 default:
872 /* unknown work item ID */
873 printk("Unknown work item ID=%08X!\n", action);
874 break;
875 }
876 }
877
878 if (debug_level >= DEBUG_LEVEL_BH)
879 printk( "%s(%d):bh_handler(%s) exit\n",
880 __FILE__,__LINE__,info->device_name);
881}
882
cdaad343 883static void bh_transmit(MGSLPC_INFO *info)
1da177e4
LT		 884{
885 struct tty_struct *tty = info->tty;
886 if (debug_level >= DEBUG_LEVEL_BH)
887 printk("bh_transmit() entry on %s\n", info->device_name);
888
b963a844 889 if (tty)
1da177e4 890 tty_wakeup(tty);
1da177e4
LT		 891}
892
cdaad343 893static void bh_status(MGSLPC_INFO *info)
1da177e4
LT		 894{
895 info->ri_chkcount = 0;
896 info->dsr_chkcount = 0;
897 info->dcd_chkcount = 0;
898 info->cts_chkcount = 0;
899}
900
901/* eom: non-zero = end of frame */
902static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
903{
904 unsigned char data[2];
905 unsigned char fifo_count, read_count, i;
906 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
907
908 if (debug_level >= DEBUG_LEVEL_ISR)
909 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
910
911 if (!info->rx_enabled)
912 return;
913
914 if (info->rx_frame_count >= info->rx_buf_count) {
915 /* no more free buffers */
916 issue_command(info, CHA, CMD_RXRESET);
917 info->pending_bh |= BH_RECEIVE;
918 info->rx_overflow = 1;
919 info->icount.buf_overrun++;
920 return;
921 }
922
923 if (eom) {
924 /* end of frame, get FIFO count from RBCL register */
925 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
926 fifo_count = 32;
927 } else
928 fifo_count = 32;
929
930 do {
931 if (fifo_count == 1) {
932 read_count = 1;
933 data[0] = read_reg(info, CHA + RXFIFO);
934 } else {
935 read_count = 2;
936 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
937 }
938 fifo_count -= read_count;
939 if (!fifo_count && eom)
940 buf->status = data[--read_count];
941
942 for (i = 0; i < read_count; i++) {
943 if (buf->count >= info->max_frame_size) {
944 /* frame too large, reset receiver and reset current buffer */
945 issue_command(info, CHA, CMD_RXRESET);
946 buf->count = 0;
947 return;
948 }
949 *(buf->data + buf->count) = data[i];
950 buf->count++;
951 }
952 } while (fifo_count);
953
954 if (eom) {
955 info->pending_bh |= BH_RECEIVE;
956 info->rx_frame_count++;
957 info->rx_put++;
958 if (info->rx_put >= info->rx_buf_count)
959 info->rx_put = 0;
960 }
961 issue_command(info, CHA, CMD_RXFIFO);
962}
963
964static void rx_ready_async(MGSLPC_INFO *info, int tcd)
965{
33f0f88f 966 unsigned char data, status, flag;
1da177e4 967 int fifo_count;
33f0f88f 968 int work = 0;
1da177e4
LT		 969 struct tty_struct *tty = info->tty;
970 struct mgsl_icount *icount = &info->icount;
971
972 if (tcd) {
973 /* early termination, get FIFO count from RBCL register */
974 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
975
976 /* Zero fifo count could mean 0 or 32 bytes available.
977 * If BIT5 of STAR is set then at least 1 byte is available.
978 */
979 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
980 fifo_count = 32;
981 } else
982 fifo_count = 32;
33f0f88f
AC		 983
984 tty_buffer_request_room(tty, fifo_count);
1da177e4
LT		 985 /* Flush received async data to receive data buffer. */
986 while (fifo_count) {
987 data = read_reg(info, CHA + RXFIFO);
988 status = read_reg(info, CHA + RXFIFO);
989 fifo_count -= 2;
990
1da177e4 991 icount->rx++;
33f0f88f 992 flag = TTY_NORMAL;
1da177e4
LT		 993
994 // if no frameing/crc error then save data
995 // BIT7:parity error
996 // BIT6:framing error
997
998 if (status & (BIT7 + BIT6)) {
999 if (status & BIT7)
1000 icount->parity++;
1001 else
1002 icount->frame++;
1003
1004 /* discard char if tty control flags say so */
1005 if (status & info->ignore_status_mask)
1006 continue;
1007
1008 status &= info->read_status_mask;
1009
1010 if (status & BIT7)
33f0f88f 1011 flag = TTY_PARITY;
1da177e4 1012 else if (status & BIT6)
33f0f88f 1013 flag = TTY_FRAME;
1da177e4 1014 }
33f0f88f 1015 work += tty_insert_flip_char(tty, data, flag);
1da177e4
LT		 1016 }
1017 issue_command(info, CHA, CMD_RXFIFO);
1018
1019 if (debug_level >= DEBUG_LEVEL_ISR) {
33f0f88f
AC		 1020 printk("%s(%d):rx_ready_async",
1021 __FILE__,__LINE__);
1da177e4
LT		 1022 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1023 __FILE__,__LINE__,icount->rx,icount->brk,
1024 icount->parity,icount->frame,icount->overrun);
1025 }
1026
33f0f88f 1027 if (work)
1da177e4
LT		 1028 tty_flip_buffer_push(tty);
1029}
1030
1031
1032static void tx_done(MGSLPC_INFO *info)
1033{
1034 if (!info->tx_active)
1035 return;
1036
1037 info->tx_active = 0;
1038 info->tx_aborting = 0;
1039
1040 if (info->params.mode == MGSL_MODE_ASYNC)
1041 return;
1042
1043 info->tx_count = info->tx_put = info->tx_get = 0;
1044 del_timer(&info->tx_timer);
1045
1046 if (info->drop_rts_on_tx_done) {
1047 get_signals(info);
1048 if (info->serial_signals & SerialSignal_RTS) {
1049 info->serial_signals &= ~SerialSignal_RTS;
1050 set_signals(info);
1051 }
1052 info->drop_rts_on_tx_done = 0;
1053 }
1054
af69c7f9 1055#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 1056 if (info->netcount)
1057 hdlcdev_tx_done(info);
1058 else
1059#endif
1060 {
1061 if (info->tty->stopped || info->tty->hw_stopped) {
1062 tx_stop(info);
1063 return;
1064 }
1065 info->pending_bh |= BH_TRANSMIT;
1066 }
1067}
1068
1069static void tx_ready(MGSLPC_INFO *info)
1070{
1071 unsigned char fifo_count = 32;
1072 int c;
1073
1074 if (debug_level >= DEBUG_LEVEL_ISR)
1075 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1076
1077 if (info->params.mode == MGSL_MODE_HDLC) {
1078 if (!info->tx_active)
1079 return;
1080 } else {
1081 if (info->tty->stopped || info->tty->hw_stopped) {
1082 tx_stop(info);
1083 return;
1084 }
1085 if (!info->tx_count)
1086 info->tx_active = 0;
1087 }
1088
1089 if (!info->tx_count)
1090 return;
1091
1092 while (info->tx_count && fifo_count) {
1093 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1094
1095 if (c == 1) {
1096 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1097 } else {
1098 write_reg16(info, CHA + TXFIFO,
1099 *((unsigned short*)(info->tx_buf + info->tx_get)));
1100 }
1101 info->tx_count -= c;
1102 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1103 fifo_count -= c;
1104 }
1105
1106 if (info->params.mode == MGSL_MODE_ASYNC) {
1107 if (info->tx_count < WAKEUP_CHARS)
1108 info->pending_bh |= BH_TRANSMIT;
1109 issue_command(info, CHA, CMD_TXFIFO);
1110 } else {
1111 if (info->tx_count)
1112 issue_command(info, CHA, CMD_TXFIFO);
1113 else
1114 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1115 }
1116}
1117
1118static void cts_change(MGSLPC_INFO *info)
1119{
1120 get_signals(info);
1121 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1122 irq_disable(info, CHB, IRQ_CTS);
1123 info->icount.cts++;
1124 if (info->serial_signals & SerialSignal_CTS)
1125 info->input_signal_events.cts_up++;
1126 else
1127 info->input_signal_events.cts_down++;
1128 wake_up_interruptible(&info->status_event_wait_q);
1129 wake_up_interruptible(&info->event_wait_q);
1130
1131 if (info->flags & ASYNC_CTS_FLOW) {
1132 if (info->tty->hw_stopped) {
1133 if (info->serial_signals & SerialSignal_CTS) {
1134 if (debug_level >= DEBUG_LEVEL_ISR)
1135 printk("CTS tx start...");
1136 if (info->tty)
1137 info->tty->hw_stopped = 0;
1138 tx_start(info);
1139 info->pending_bh |= BH_TRANSMIT;
1140 return;
1141 }
1142 } else {
1143 if (!(info->serial_signals & SerialSignal_CTS)) {
1144 if (debug_level >= DEBUG_LEVEL_ISR)
1145 printk("CTS tx stop...");
1146 if (info->tty)
1147 info->tty->hw_stopped = 1;
1148 tx_stop(info);
1149 }
1150 }
1151 }
1152 info->pending_bh |= BH_STATUS;
1153}
1154
1155static void dcd_change(MGSLPC_INFO *info)
1156{
1157 get_signals(info);
1158 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1159 irq_disable(info, CHB, IRQ_DCD);
1160 info->icount.dcd++;
1161 if (info->serial_signals & SerialSignal_DCD) {
1162 info->input_signal_events.dcd_up++;
1163 }
1164 else
1165 info->input_signal_events.dcd_down++;
af69c7f9 1166#if SYNCLINK_GENERIC_HDLC
fbeff3c1
KH		 1167 if (info->netcount) {
1168 if (info->serial_signals & SerialSignal_DCD)
1169 netif_carrier_on(info->netdev);
1170 else
1171 netif_carrier_off(info->netdev);
1172 }
1da177e4
LT		 1173#endif
1174 wake_up_interruptible(&info->status_event_wait_q);
1175 wake_up_interruptible(&info->event_wait_q);
1176
1177 if (info->flags & ASYNC_CHECK_CD) {
1178 if (debug_level >= DEBUG_LEVEL_ISR)
1179 printk("%s CD now %s...", info->device_name,
1180 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1181 if (info->serial_signals & SerialSignal_DCD)
1182 wake_up_interruptible(&info->open_wait);
1183 else {
1184 if (debug_level >= DEBUG_LEVEL_ISR)
1185 printk("doing serial hangup...");
1186 if (info->tty)
1187 tty_hangup(info->tty);
1188 }
1189 }
1190 info->pending_bh |= BH_STATUS;
1191}
1192
1193static void dsr_change(MGSLPC_INFO *info)
1194{
1195 get_signals(info);
1196 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1197 port_irq_disable(info, PVR_DSR);
1198 info->icount.dsr++;
1199 if (info->serial_signals & SerialSignal_DSR)
1200 info->input_signal_events.dsr_up++;
1201 else
1202 info->input_signal_events.dsr_down++;
1203 wake_up_interruptible(&info->status_event_wait_q);
1204 wake_up_interruptible(&info->event_wait_q);
1205 info->pending_bh |= BH_STATUS;
1206}
1207
1208static void ri_change(MGSLPC_INFO *info)
1209{
1210 get_signals(info);
1211 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1212 port_irq_disable(info, PVR_RI);
1213 info->icount.rng++;
1214 if (info->serial_signals & SerialSignal_RI)
1215 info->input_signal_events.ri_up++;
1216 else
1217 info->input_signal_events.ri_down++;
1218 wake_up_interruptible(&info->status_event_wait_q);
1219 wake_up_interruptible(&info->event_wait_q);
1220 info->pending_bh |= BH_STATUS;
1221}
1222
1223/* Interrupt service routine entry point.
1224 *
1225 * Arguments:
1226 *
1227 * irq interrupt number that caused interrupt
1228 * dev_id device ID supplied during interrupt registration
1da177e4 1229 */
7d12e780 1230static irqreturn_t mgslpc_isr(int irq, void *dev_id)
1da177e4
LT		 1231{
1232 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1233 unsigned short isr;
1234 unsigned char gis, pis;
1235 int count=0;
1236
1237 if (debug_level >= DEBUG_LEVEL_ISR)
1238 printk("mgslpc_isr(%d) entry.\n", irq);
1239 if (!info)
1240 return IRQ_NONE;
1241
e2d40963 1242 if (!(info->p_dev->_locked))
1da177e4
LT		 1243 return IRQ_HANDLED;
1244
1245 spin_lock(&info->lock);
1246
1247 while ((gis = read_reg(info, CHA + GIS))) {
1248 if (debug_level >= DEBUG_LEVEL_ISR)
1249 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1250
1251 if ((gis & 0x70) || count > 1000) {
1252 printk("synclink_cs:hardware failed or ejected\n");
1253 break;
1254 }
1255 count++;
1256
1257 if (gis & (BIT1 + BIT0)) {
1258 isr = read_reg16(info, CHB + ISR);
1259 if (isr & IRQ_DCD)
1260 dcd_change(info);
1261 if (isr & IRQ_CTS)
1262 cts_change(info);
1263 }
1264 if (gis & (BIT3 + BIT2))
1265 {
1266 isr = read_reg16(info, CHA + ISR);
1267 if (isr & IRQ_TIMER) {
1268 info->irq_occurred = 1;
1269 irq_disable(info, CHA, IRQ_TIMER);
1270 }
1271
1272 /* receive IRQs */
1273 if (isr & IRQ_EXITHUNT) {
1274 info->icount.exithunt++;
1275 wake_up_interruptible(&info->event_wait_q);
1276 }
1277 if (isr & IRQ_BREAK_ON) {
1278 info->icount.brk++;
1279 if (info->flags & ASYNC_SAK)
1280 do_SAK(info->tty);
1281 }
1282 if (isr & IRQ_RXTIME) {
1283 issue_command(info, CHA, CMD_RXFIFO_READ);
1284 }
1285 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1286 if (info->params.mode == MGSL_MODE_HDLC)
1287 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1288 else
1289 rx_ready_async(info, isr & IRQ_RXEOM);
1290 }
1291
1292 /* transmit IRQs */
1293 if (isr & IRQ_UNDERRUN) {
1294 if (info->tx_aborting)
1295 info->icount.txabort++;
1296 else
1297 info->icount.txunder++;
1298 tx_done(info);
1299 }
1300 else if (isr & IRQ_ALLSENT) {
1301 info->icount.txok++;
1302 tx_done(info);
1303 }
1304 else if (isr & IRQ_TXFIFO)
1305 tx_ready(info);
1306 }
1307 if (gis & BIT7) {
1308 pis = read_reg(info, CHA + PIS);
1309 if (pis & BIT1)
1310 dsr_change(info);
1311 if (pis & BIT2)
1312 ri_change(info);
1313 }
1314 }
1315
1316 /* Request bottom half processing if there's something
1317 * for it to do and the bh is not already running
1318 */
1319
1320 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1321 if ( debug_level >= DEBUG_LEVEL_ISR )
1322 printk("%s(%d):%s queueing bh task.\n",
1323 __FILE__,__LINE__,info->device_name);
1324 schedule_work(&info->task);
1325 info->bh_requested = 1;
1326 }
1327
1328 spin_unlock(&info->lock);
1329
1330 if (debug_level >= DEBUG_LEVEL_ISR)
1331 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1332 __FILE__,__LINE__,irq);
1333
1334 return IRQ_HANDLED;
1335}
1336
1337/* Initialize and start device.
1338 */
1339static int startup(MGSLPC_INFO * info)
1340{
1341 int retval = 0;
1342
1343 if (debug_level >= DEBUG_LEVEL_INFO)
1344 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1345
1346 if (info->flags & ASYNC_INITIALIZED)
1347 return 0;
1348
1349 if (!info->tx_buf) {
1350 /* allocate a page of memory for a transmit buffer */
1351 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1352 if (!info->tx_buf) {
1353 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1354 __FILE__,__LINE__,info->device_name);
1355 return -ENOMEM;
1356 }
1357 }
1358
1359 info->pending_bh = 0;
1360
a7482a2e
PF		 1361 memset(&info->icount, 0, sizeof(info->icount));
1362
40565f19 1363 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1da177e4
LT		 1364
1365 /* Allocate and claim adapter resources */
1366 retval = claim_resources(info);
1367
1368 /* perform existance check and diagnostics */
1369 if ( !retval )
1370 retval = adapter_test(info);
1371
1372 if ( retval ) {
1373 if (capable(CAP_SYS_ADMIN) && info->tty)
1374 set_bit(TTY_IO_ERROR, &info->tty->flags);
1375 release_resources(info);
1376 return retval;
1377 }
1378
1379 /* program hardware for current parameters */
1380 mgslpc_change_params(info);
1381
1382 if (info->tty)
1383 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1384
1385 info->flags |= ASYNC_INITIALIZED;
1386
1387 return 0;
1388}
1389
1390/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1391 */
1392static void shutdown(MGSLPC_INFO * info)
1393{
1394 unsigned long flags;
1395
1396 if (!(info->flags & ASYNC_INITIALIZED))
1397 return;
1398
1399 if (debug_level >= DEBUG_LEVEL_INFO)
1400 printk("%s(%d):mgslpc_shutdown(%s)\n",
1401 __FILE__,__LINE__, info->device_name );
1402
1403 /* clear status wait queue because status changes */
1404 /* can't happen after shutting down the hardware */
1405 wake_up_interruptible(&info->status_event_wait_q);
1406 wake_up_interruptible(&info->event_wait_q);
1407
40565f19 1408 del_timer_sync(&info->tx_timer);
1da177e4
LT		 1409
1410 if (info->tx_buf) {
1411 free_page((unsigned long) info->tx_buf);
1412 info->tx_buf = NULL;
1413 }
1414
1415 spin_lock_irqsave(&info->lock,flags);
1416
1417 rx_stop(info);
1418 tx_stop(info);
1419
1420 /* TODO:disable interrupts instead of reset to preserve signal states */
1421 reset_device(info);
1422
1423 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1424 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1425 set_signals(info);
1426 }
1427
1428 spin_unlock_irqrestore(&info->lock,flags);
1429
1430 release_resources(info);
1431
1432 if (info->tty)
1433 set_bit(TTY_IO_ERROR, &info->tty->flags);
1434
1435 info->flags &= ~ASYNC_INITIALIZED;
1436}
1437
1438static void mgslpc_program_hw(MGSLPC_INFO *info)
1439{
1440 unsigned long flags;
1441
1442 spin_lock_irqsave(&info->lock,flags);
1443
1444 rx_stop(info);
1445 tx_stop(info);
1446 info->tx_count = info->tx_put = info->tx_get = 0;
1447
1448 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1449 hdlc_mode(info);
1450 else
1451 async_mode(info);
1452
1453 set_signals(info);
1454
1455 info->dcd_chkcount = 0;
1456 info->cts_chkcount = 0;
1457 info->ri_chkcount = 0;
1458 info->dsr_chkcount = 0;
1459
1460 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1461 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1462 get_signals(info);
1463
1464 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1465 rx_start(info);
1466
1467 spin_unlock_irqrestore(&info->lock,flags);
1468}
1469
1470/* Reconfigure adapter based on new parameters
1471 */
1472static void mgslpc_change_params(MGSLPC_INFO *info)
1473{
1474 unsigned cflag;
1475 int bits_per_char;
1476
1477 if (!info->tty || !info->tty->termios)
1478 return;
1479
1480 if (debug_level >= DEBUG_LEVEL_INFO)
1481 printk("%s(%d):mgslpc_change_params(%s)\n",
1482 __FILE__,__LINE__, info->device_name );
1483
1484 cflag = info->tty->termios->c_cflag;
1485
1486 /* if B0 rate (hangup) specified then negate DTR and RTS */
1487 /* otherwise assert DTR and RTS */
1488 if (cflag & CBAUD)
1489 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1490 else
1491 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1492
1493 /* byte size and parity */
1494
1495 switch (cflag & CSIZE) {
1496 case CS5: info->params.data_bits = 5; break;
1497 case CS6: info->params.data_bits = 6; break;
1498 case CS7: info->params.data_bits = 7; break;
1499 case CS8: info->params.data_bits = 8; break;
1500 default: info->params.data_bits = 7; break;
1501 }
1502
1503 if (cflag & CSTOPB)
1504 info->params.stop_bits = 2;
1505 else
1506 info->params.stop_bits = 1;
1507
1508 info->params.parity = ASYNC_PARITY_NONE;
1509 if (cflag & PARENB) {
1510 if (cflag & PARODD)
1511 info->params.parity = ASYNC_PARITY_ODD;
1512 else
1513 info->params.parity = ASYNC_PARITY_EVEN;
1514#ifdef CMSPAR
1515 if (cflag & CMSPAR)
1516 info->params.parity = ASYNC_PARITY_SPACE;
1517#endif
1518 }
1519
1520 /* calculate number of jiffies to transmit a full
1521 * FIFO (32 bytes) at specified data rate
1522 */
1523 bits_per_char = info->params.data_bits +
1524 info->params.stop_bits + 1;
1525
1526 /* if port data rate is set to 460800 or less then
1527 * allow tty settings to override, otherwise keep the
1528 * current data rate.
1529 */
1530 if (info->params.data_rate <= 460800) {
1531 info->params.data_rate = tty_get_baud_rate(info->tty);
1532 }
1533
1534 if ( info->params.data_rate ) {
1535 info->timeout = (32*HZ*bits_per_char) /
1536 info->params.data_rate;
1537 }
1538 info->timeout += HZ/50; /* Add .02 seconds of slop */
1539
1540 if (cflag & CRTSCTS)
1541 info->flags |= ASYNC_CTS_FLOW;
1542 else
1543 info->flags &= ~ASYNC_CTS_FLOW;
1544
1545 if (cflag & CLOCAL)
1546 info->flags &= ~ASYNC_CHECK_CD;
1547 else
1548 info->flags |= ASYNC_CHECK_CD;
1549
1550 /* process tty input control flags */
1551
1552 info->read_status_mask = 0;
1553 if (I_INPCK(info->tty))
1554 info->read_status_mask |= BIT7 | BIT6;
1555 if (I_IGNPAR(info->tty))
1556 info->ignore_status_mask |= BIT7 | BIT6;
1557
1558 mgslpc_program_hw(info);
1559}
1560
1561/* Add a character to the transmit buffer
1562 */
1563static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1564{
1565 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1566 unsigned long flags;
1567
1568 if (debug_level >= DEBUG_LEVEL_INFO) {
1569 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1570 __FILE__,__LINE__,ch,info->device_name);
1571 }
1572
1573 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1574 return;
1575
326f28e9 1576 if (!info->tx_buf)
1da177e4
LT		 1577 return;
1578
1579 spin_lock_irqsave(&info->lock,flags);
1580
1581 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1582 if (info->tx_count < TXBUFSIZE - 1) {
1583 info->tx_buf[info->tx_put++] = ch;
1584 info->tx_put &= TXBUFSIZE-1;
1585 info->tx_count++;
1586 }
1587 }
1588
1589 spin_unlock_irqrestore(&info->lock,flags);
1590}
1591
1592/* Enable transmitter so remaining characters in the
1593 * transmit buffer are sent.
1594 */
1595static void mgslpc_flush_chars(struct tty_struct *tty)
1596{
1597 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1598 unsigned long flags;
1599
1600 if (debug_level >= DEBUG_LEVEL_INFO)
1601 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1602 __FILE__,__LINE__,info->device_name,info->tx_count);
1603
1604 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1605 return;
1606
1607 if (info->tx_count <= 0 || tty->stopped ||
1608 tty->hw_stopped || !info->tx_buf)
1609 return;
1610
1611 if (debug_level >= DEBUG_LEVEL_INFO)
1612 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1613 __FILE__,__LINE__,info->device_name);
1614
1615 spin_lock_irqsave(&info->lock,flags);
1616 if (!info->tx_active)
1617 tx_start(info);
1618 spin_unlock_irqrestore(&info->lock,flags);
1619}
1620
1621/* Send a block of data
1622 *
1623 * Arguments:
1624 *
1625 * tty pointer to tty information structure
1626 * buf pointer to buffer containing send data
1627 * count size of send data in bytes
1628 *
1629 * Returns: number of characters written
1630 */
1631static int mgslpc_write(struct tty_struct * tty,
1632 const unsigned char *buf, int count)
1633{
1634 int c, ret = 0;
1635 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1636 unsigned long flags;
1637
1638 if (debug_level >= DEBUG_LEVEL_INFO)
1639 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1640 __FILE__,__LINE__,info->device_name,count);
1641
1642 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
326f28e9 1643 !info->tx_buf)
1da177e4
LT		 1644 goto cleanup;
1645
1646 if (info->params.mode == MGSL_MODE_HDLC) {
1647 if (count > TXBUFSIZE) {
1648 ret = -EIO;
1649 goto cleanup;
1650 }
1651 if (info->tx_active)
1652 goto cleanup;
1653 else if (info->tx_count)
1654 goto start;
1655 }
1656
1657 for (;;) {
1658 c = min(count,
1659 min(TXBUFSIZE - info->tx_count - 1,
1660 TXBUFSIZE - info->tx_put));
1661 if (c <= 0)
1662 break;
1663
1664 memcpy(info->tx_buf + info->tx_put, buf, c);
1665
1666 spin_lock_irqsave(&info->lock,flags);
1667 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1668 info->tx_count += c;
1669 spin_unlock_irqrestore(&info->lock,flags);
1670
1671 buf += c;
1672 count -= c;
1673 ret += c;
1674 }
1675start:
1676 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1677 spin_lock_irqsave(&info->lock,flags);
1678 if (!info->tx_active)
1679 tx_start(info);
1680 spin_unlock_irqrestore(&info->lock,flags);
1681 }
1682cleanup:
1683 if (debug_level >= DEBUG_LEVEL_INFO)
1684 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1685 __FILE__,__LINE__,info->device_name,ret);
1686 return ret;
1687}
1688
1689/* Return the count of free bytes in transmit buffer
1690 */
1691static int mgslpc_write_room(struct tty_struct *tty)
1692{
1693 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1694 int ret;
1695
1696 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1697 return 0;
1698
1699 if (info->params.mode == MGSL_MODE_HDLC) {
1700 /* HDLC (frame oriented) mode */
1701 if (info->tx_active)
1702 return 0;
1703 else
1704 return HDLC_MAX_FRAME_SIZE;
1705 } else {
1706 ret = TXBUFSIZE - info->tx_count - 1;
1707 if (ret < 0)
1708 ret = 0;
1709 }
1710
1711 if (debug_level >= DEBUG_LEVEL_INFO)
1712 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1713 __FILE__,__LINE__, info->device_name, ret);
1714 return ret;
1715}
1716
1717/* Return the count of bytes in transmit buffer
1718 */
1719static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1720{
1721 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1722 int rc;
1723
1724 if (debug_level >= DEBUG_LEVEL_INFO)
1725 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1726 __FILE__,__LINE__, info->device_name );
1727
1728 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1729 return 0;
1730
1731 if (info->params.mode == MGSL_MODE_HDLC)
1732 rc = info->tx_active ? info->max_frame_size : 0;
1733 else
1734 rc = info->tx_count;
1735
1736 if (debug_level >= DEBUG_LEVEL_INFO)
1737 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1738 __FILE__,__LINE__, info->device_name, rc);
1739
1740 return rc;
1741}
1742
1743/* Discard all data in the send buffer
1744 */
1745static void mgslpc_flush_buffer(struct tty_struct *tty)
1746{
1747 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1748 unsigned long flags;
1749
1750 if (debug_level >= DEBUG_LEVEL_INFO)
1751 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1752 __FILE__,__LINE__, info->device_name );
1753
1754 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1755 return;
1756
1757 spin_lock_irqsave(&info->lock,flags);
1758 info->tx_count = info->tx_put = info->tx_get = 0;
1759 del_timer(&info->tx_timer);
1760 spin_unlock_irqrestore(&info->lock,flags);
1761
1762 wake_up_interruptible(&tty->write_wait);
1763 tty_wakeup(tty);
1764}
1765
1766/* Send a high-priority XON/XOFF character
1767 */
1768static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1769{
1770 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1771 unsigned long flags;
1772
1773 if (debug_level >= DEBUG_LEVEL_INFO)
1774 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1775 __FILE__,__LINE__, info->device_name, ch );
1776
1777 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1778 return;
1779
1780 info->x_char = ch;
1781 if (ch) {
1782 spin_lock_irqsave(&info->lock,flags);
1783 if (!info->tx_enabled)
1784 tx_start(info);
1785 spin_unlock_irqrestore(&info->lock,flags);
1786 }
1787}
1788
1789/* Signal remote device to throttle send data (our receive data)
1790 */
1791static void mgslpc_throttle(struct tty_struct * tty)
1792{
1793 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1794 unsigned long flags;
1795
1796 if (debug_level >= DEBUG_LEVEL_INFO)
1797 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1798 __FILE__,__LINE__, info->device_name );
1799
1800 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1801 return;
1802
1803 if (I_IXOFF(tty))
1804 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1805
1806 if (tty->termios->c_cflag & CRTSCTS) {
1807 spin_lock_irqsave(&info->lock,flags);
1808 info->serial_signals &= ~SerialSignal_RTS;
1809 set_signals(info);
1810 spin_unlock_irqrestore(&info->lock,flags);
1811 }
1812}
1813
1814/* Signal remote device to stop throttling send data (our receive data)
1815 */
1816static void mgslpc_unthrottle(struct tty_struct * tty)
1817{
1818 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1819 unsigned long flags;
1820
1821 if (debug_level >= DEBUG_LEVEL_INFO)
1822 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1823 __FILE__,__LINE__, info->device_name );
1824
1825 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1826 return;
1827
1828 if (I_IXOFF(tty)) {
1829 if (info->x_char)
1830 info->x_char = 0;
1831 else
1832 mgslpc_send_xchar(tty, START_CHAR(tty));
1833 }
1834
1835 if (tty->termios->c_cflag & CRTSCTS) {
1836 spin_lock_irqsave(&info->lock,flags);
1837 info->serial_signals |= SerialSignal_RTS;
1838 set_signals(info);
1839 spin_unlock_irqrestore(&info->lock,flags);
1840 }
1841}
1842
1843/* get the current serial statistics
1844 */
1845static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1846{
1847 int err;
1848 if (debug_level >= DEBUG_LEVEL_INFO)
1849 printk("get_params(%s)\n", info->device_name);
a7482a2e
PF		 1850 if (!user_icount) {
1851 memset(&info->icount, 0, sizeof(info->icount));
1852 } else {
1853 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1854 if (err)
1855 return -EFAULT;
1856 }
1da177e4
LT		 1857 return 0;
1858}
1859
1860/* get the current serial parameters
1861 */
1862static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1863{
1864 int err;
1865 if (debug_level >= DEBUG_LEVEL_INFO)
1866 printk("get_params(%s)\n", info->device_name);
1867 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1868 if (err)
1869 return -EFAULT;
1870 return 0;
1871}
1872
1873/* set the serial parameters
1874 *
1875 * Arguments:
1876 *
1877 * info pointer to device instance data
1878 * new_params user buffer containing new serial params
1879 *
1880 * Returns: 0 if success, otherwise error code
1881 */
1882static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1883{
1884 unsigned long flags;
1885 MGSL_PARAMS tmp_params;
1886 int err;
1887
1888 if (debug_level >= DEBUG_LEVEL_INFO)
1889 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1890 info->device_name );
1891 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1892 if (err) {
1893 if ( debug_level >= DEBUG_LEVEL_INFO )
1894 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1895 __FILE__,__LINE__,info->device_name);
1896 return -EFAULT;
1897 }
1898
1899 spin_lock_irqsave(&info->lock,flags);
1900 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1901 spin_unlock_irqrestore(&info->lock,flags);
1902
1903 mgslpc_change_params(info);
1904
1905 return 0;
1906}
1907
1908static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1909{
1910 int err;
1911 if (debug_level >= DEBUG_LEVEL_INFO)
1912 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1913 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1914 if (err)
1915 return -EFAULT;
1916 return 0;
1917}
1918
1919static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1920{
1921 unsigned long flags;
1922 if (debug_level >= DEBUG_LEVEL_INFO)
1923 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1924 spin_lock_irqsave(&info->lock,flags);
1925 info->idle_mode = idle_mode;
1926 tx_set_idle(info);
1927 spin_unlock_irqrestore(&info->lock,flags);
1928 return 0;
1929}
1930
1931static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1932{
1933 int err;
1934 if (debug_level >= DEBUG_LEVEL_INFO)
1935 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1936 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1937 if (err)
1938 return -EFAULT;
1939 return 0;
1940}
1941
1942static int set_interface(MGSLPC_INFO * info, int if_mode)
1943{
1944 unsigned long flags;
1945 unsigned char val;
1946 if (debug_level >= DEBUG_LEVEL_INFO)
1947 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1948 spin_lock_irqsave(&info->lock,flags);
1949 info->if_mode = if_mode;
1950
1951 val = read_reg(info, PVR) & 0x0f;
1952 switch (info->if_mode)
1953 {
1954 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1955 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1956 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1957 }
1958 write_reg(info, PVR, val);
1959
1960 spin_unlock_irqrestore(&info->lock,flags);
1961 return 0;
1962}
1963
1964static int set_txenable(MGSLPC_INFO * info, int enable)
1965{
1966 unsigned long flags;
1967
1968 if (debug_level >= DEBUG_LEVEL_INFO)
1969 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1970
1971 spin_lock_irqsave(&info->lock,flags);
1972 if (enable) {
1973 if (!info->tx_enabled)
1974 tx_start(info);
1975 } else {
1976 if (info->tx_enabled)
1977 tx_stop(info);
1978 }
1979 spin_unlock_irqrestore(&info->lock,flags);
1980 return 0;
1981}
1982
1983static int tx_abort(MGSLPC_INFO * info)
1984{
1985 unsigned long flags;
1986
1987 if (debug_level >= DEBUG_LEVEL_INFO)
1988 printk("tx_abort(%s)\n", info->device_name);
1989
1990 spin_lock_irqsave(&info->lock,flags);
1991 if (info->tx_active && info->tx_count &&
1992 info->params.mode == MGSL_MODE_HDLC) {
1993 /* clear data count so FIFO is not filled on next IRQ.
1994 * This results in underrun and abort transmission.
1995 */
1996 info->tx_count = info->tx_put = info->tx_get = 0;
1997 info->tx_aborting = TRUE;
1998 }
1999 spin_unlock_irqrestore(&info->lock,flags);
2000 return 0;
2001}
2002
2003static int set_rxenable(MGSLPC_INFO * info, int enable)
2004{
2005 unsigned long flags;
2006
2007 if (debug_level >= DEBUG_LEVEL_INFO)
2008 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2009
2010 spin_lock_irqsave(&info->lock,flags);
2011 if (enable) {
2012 if (!info->rx_enabled)
2013 rx_start(info);
2014 } else {
2015 if (info->rx_enabled)
2016 rx_stop(info);
2017 }
2018 spin_unlock_irqrestore(&info->lock,flags);
2019 return 0;
2020}
2021
2022/* wait for specified event to occur
2023 *
2024 * Arguments: info pointer to device instance data
2025 * mask pointer to bitmask of events to wait for
2026 * Return Value: 0 if successful and bit mask updated with
2027 * of events triggerred,
2028 * otherwise error code
2029 */
2030static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2031{
2032 unsigned long flags;
2033 int s;
2034 int rc=0;
2035 struct mgsl_icount cprev, cnow;
2036 int events;
2037 int mask;
2038 struct _input_signal_events oldsigs, newsigs;
2039 DECLARE_WAITQUEUE(wait, current);
2040
2041 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2042 if (rc)
2043 return -EFAULT;
2044
2045 if (debug_level >= DEBUG_LEVEL_INFO)
2046 printk("wait_events(%s,%d)\n", info->device_name, mask);
2047
2048 spin_lock_irqsave(&info->lock,flags);
2049
2050 /* return immediately if state matches requested events */
2051 get_signals(info);
2052 s = info->serial_signals;
2053 events = mask &
2054 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2055 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2056 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2057 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2058 if (events) {
2059 spin_unlock_irqrestore(&info->lock,flags);
2060 goto exit;
2061 }
2062
2063 /* save current irq counts */
2064 cprev = info->icount;
2065 oldsigs = info->input_signal_events;
2066
2067 if ((info->params.mode == MGSL_MODE_HDLC) &&
2068 (mask & MgslEvent_ExitHuntMode))
2069 irq_enable(info, CHA, IRQ_EXITHUNT);
2070
2071 set_current_state(TASK_INTERRUPTIBLE);
2072 add_wait_queue(&info->event_wait_q, &wait);
2073
2074 spin_unlock_irqrestore(&info->lock,flags);
2075
2076
2077 for(;;) {
2078 schedule();
2079 if (signal_pending(current)) {
2080 rc = -ERESTARTSYS;
2081 break;
2082 }
2083
2084 /* get current irq counts */
2085 spin_lock_irqsave(&info->lock,flags);
2086 cnow = info->icount;
2087 newsigs = info->input_signal_events;
2088 set_current_state(TASK_INTERRUPTIBLE);
2089 spin_unlock_irqrestore(&info->lock,flags);
2090
2091 /* if no change, wait aborted for some reason */
2092 if (newsigs.dsr_up == oldsigs.dsr_up &&
2093 newsigs.dsr_down == oldsigs.dsr_down &&
2094 newsigs.dcd_up == oldsigs.dcd_up &&
2095 newsigs.dcd_down == oldsigs.dcd_down &&
2096 newsigs.cts_up == oldsigs.cts_up &&
2097 newsigs.cts_down == oldsigs.cts_down &&
2098 newsigs.ri_up == oldsigs.ri_up &&
2099 newsigs.ri_down == oldsigs.ri_down &&
2100 cnow.exithunt == cprev.exithunt &&
2101 cnow.rxidle == cprev.rxidle) {
2102 rc = -EIO;
2103 break;
2104 }
2105
2106 events = mask &
2107 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2108 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2109 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2110 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2111 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2112 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2113 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2114 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2115 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2116 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2117 if (events)
2118 break;
2119
2120 cprev = cnow;
2121 oldsigs = newsigs;
2122 }
2123
2124 remove_wait_queue(&info->event_wait_q, &wait);
2125 set_current_state(TASK_RUNNING);
2126
2127 if (mask & MgslEvent_ExitHuntMode) {
2128 spin_lock_irqsave(&info->lock,flags);
2129 if (!waitqueue_active(&info->event_wait_q))
2130 irq_disable(info, CHA, IRQ_EXITHUNT);
2131 spin_unlock_irqrestore(&info->lock,flags);
2132 }
2133exit:
2134 if (rc == 0)
2135 PUT_USER(rc, events, mask_ptr);
2136 return rc;
2137}
2138
2139static int modem_input_wait(MGSLPC_INFO *info,int arg)
2140{
2141 unsigned long flags;
2142 int rc;
2143 struct mgsl_icount cprev, cnow;
2144 DECLARE_WAITQUEUE(wait, current);
2145
2146 /* save current irq counts */
2147 spin_lock_irqsave(&info->lock,flags);
2148 cprev = info->icount;
2149 add_wait_queue(&info->status_event_wait_q, &wait);
2150 set_current_state(TASK_INTERRUPTIBLE);
2151 spin_unlock_irqrestore(&info->lock,flags);
2152
2153 for(;;) {
2154 schedule();
2155 if (signal_pending(current)) {
2156 rc = -ERESTARTSYS;
2157 break;
2158 }
2159
2160 /* get new irq counts */
2161 spin_lock_irqsave(&info->lock,flags);
2162 cnow = info->icount;
2163 set_current_state(TASK_INTERRUPTIBLE);
2164 spin_unlock_irqrestore(&info->lock,flags);
2165
2166 /* if no change, wait aborted for some reason */
2167 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2168 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2169 rc = -EIO;
2170 break;
2171 }
2172
2173 /* check for change in caller specified modem input */
2174 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2175 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2176 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2177 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2178 rc = 0;
2179 break;
2180 }
2181
2182 cprev = cnow;
2183 }
2184 remove_wait_queue(&info->status_event_wait_q, &wait);
2185 set_current_state(TASK_RUNNING);
2186 return rc;
2187}
2188
2189/* return the state of the serial control and status signals
2190 */
2191static int tiocmget(struct tty_struct *tty, struct file *file)
2192{
2193 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2194 unsigned int result;
2195 unsigned long flags;
2196
2197 spin_lock_irqsave(&info->lock,flags);
2198 get_signals(info);
2199 spin_unlock_irqrestore(&info->lock,flags);
2200
2201 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2202 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2203 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2204 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2205 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2206 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2207
2208 if (debug_level >= DEBUG_LEVEL_INFO)
2209 printk("%s(%d):%s tiocmget() value=%08X\n",
2210 __FILE__,__LINE__, info->device_name, result );
2211 return result;
2212}
2213
2214/* set modem control signals (DTR/RTS)
2215 */
2216static int tiocmset(struct tty_struct *tty, struct file *file,
2217 unsigned int set, unsigned int clear)
2218{
2219 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2220 unsigned long flags;
2221
2222 if (debug_level >= DEBUG_LEVEL_INFO)
2223 printk("%s(%d):%s tiocmset(%x,%x)\n",
2224 __FILE__,__LINE__,info->device_name, set, clear);
2225
2226 if (set & TIOCM_RTS)
2227 info->serial_signals |= SerialSignal_RTS;
2228 if (set & TIOCM_DTR)
2229 info->serial_signals |= SerialSignal_DTR;
2230 if (clear & TIOCM_RTS)
2231 info->serial_signals &= ~SerialSignal_RTS;
2232 if (clear & TIOCM_DTR)
2233 info->serial_signals &= ~SerialSignal_DTR;
2234
2235 spin_lock_irqsave(&info->lock,flags);
2236 set_signals(info);
2237 spin_unlock_irqrestore(&info->lock,flags);
2238
2239 return 0;
2240}
2241
2242/* Set or clear transmit break condition
2243 *
2244 * Arguments: tty pointer to tty instance data
2245 * break_state -1=set break condition, 0=clear
2246 */
2247static void mgslpc_break(struct tty_struct *tty, int break_state)
2248{
2249 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2250 unsigned long flags;
2251
2252 if (debug_level >= DEBUG_LEVEL_INFO)
2253 printk("%s(%d):mgslpc_break(%s,%d)\n",
2254 __FILE__,__LINE__, info->device_name, break_state);
2255
2256 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2257 return;
2258
2259 spin_lock_irqsave(&info->lock,flags);
2260 if (break_state == -1)
2261 set_reg_bits(info, CHA+DAFO, BIT6);
2262 else
2263 clear_reg_bits(info, CHA+DAFO, BIT6);
2264 spin_unlock_irqrestore(&info->lock,flags);
2265}
2266
2267/* Service an IOCTL request
2268 *
2269 * Arguments:
2270 *
2271 * tty pointer to tty instance data
2272 * file pointer to associated file object for device
2273 * cmd IOCTL command code
2274 * arg command argument/context
2275 *
2276 * Return Value: 0 if success, otherwise error code
2277 */
2278static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2279 unsigned int cmd, unsigned long arg)
2280{
2281 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2282
2283 if (debug_level >= DEBUG_LEVEL_INFO)
2284 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2285 info->device_name, cmd );
2286
2287 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2288 return -ENODEV;
2289
2290 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2291 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2292 if (tty->flags & (1 << TTY_IO_ERROR))
2293 return -EIO;
2294 }
2295
2296 return ioctl_common(info, cmd, arg);
2297}
2298
cdaad343 2299static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
1da177e4
LT		 2300{
2301 int error;
2302 struct mgsl_icount cnow; /* kernel counter temps */
2303 struct serial_icounter_struct __user *p_cuser; /* user space */
2304 void __user *argp = (void __user *)arg;
2305 unsigned long flags;
2306
2307 switch (cmd) {
2308 case MGSL_IOCGPARAMS:
2309 return get_params(info, argp);
2310 case MGSL_IOCSPARAMS:
2311 return set_params(info, argp);
2312 case MGSL_IOCGTXIDLE:
2313 return get_txidle(info, argp);
2314 case MGSL_IOCSTXIDLE:
2315 return set_txidle(info, (int)arg);
2316 case MGSL_IOCGIF:
2317 return get_interface(info, argp);
2318 case MGSL_IOCSIF:
2319 return set_interface(info,(int)arg);
2320 case MGSL_IOCTXENABLE:
2321 return set_txenable(info,(int)arg);
2322 case MGSL_IOCRXENABLE:
2323 return set_rxenable(info,(int)arg);
2324 case MGSL_IOCTXABORT:
2325 return tx_abort(info);
2326 case MGSL_IOCGSTATS:
2327 return get_stats(info, argp);
2328 case MGSL_IOCWAITEVENT:
2329 return wait_events(info, argp);
2330 case TIOCMIWAIT:
2331 return modem_input_wait(info,(int)arg);
2332 case TIOCGICOUNT:
2333 spin_lock_irqsave(&info->lock,flags);
2334 cnow = info->icount;
2335 spin_unlock_irqrestore(&info->lock,flags);
2336 p_cuser = argp;
2337 PUT_USER(error,cnow.cts, &p_cuser->cts);
2338 if (error) return error;
2339 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2340 if (error) return error;
2341 PUT_USER(error,cnow.rng, &p_cuser->rng);
2342 if (error) return error;
2343 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2344 if (error) return error;
2345 PUT_USER(error,cnow.rx, &p_cuser->rx);
2346 if (error) return error;
2347 PUT_USER(error,cnow.tx, &p_cuser->tx);
2348 if (error) return error;
2349 PUT_USER(error,cnow.frame, &p_cuser->frame);
2350 if (error) return error;
2351 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2352 if (error) return error;
2353 PUT_USER(error,cnow.parity, &p_cuser->parity);
2354 if (error) return error;
2355 PUT_USER(error,cnow.brk, &p_cuser->brk);
2356 if (error) return error;
2357 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2358 if (error) return error;
2359 return 0;
2360 default:
2361 return -ENOIOCTLCMD;
2362 }
2363 return 0;
2364}
2365
2366/* Set new termios settings
2367 *
2368 * Arguments:
2369 *
2370 * tty pointer to tty structure
2371 * termios pointer to buffer to hold returned old termios
2372 */
606d099c 2373static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4
LT		 2374{
2375 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2376 unsigned long flags;
2377
2378 if (debug_level >= DEBUG_LEVEL_INFO)
2379 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2380 tty->driver->name );
2381
2382 /* just return if nothing has changed */
2383 if ((tty->termios->c_cflag == old_termios->c_cflag)
2384 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2385 == RELEVANT_IFLAG(old_termios->c_iflag)))
2386 return;
2387
2388 mgslpc_change_params(info);
2389
2390 /* Handle transition to B0 status */
2391 if (old_termios->c_cflag & CBAUD &&
2392 !(tty->termios->c_cflag & CBAUD)) {
2393 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2394 spin_lock_irqsave(&info->lock,flags);
2395 set_signals(info);
2396 spin_unlock_irqrestore(&info->lock,flags);
2397 }
2398
2399 /* Handle transition away from B0 status */
2400 if (!(old_termios->c_cflag & CBAUD) &&
2401 tty->termios->c_cflag & CBAUD) {
2402 info->serial_signals |= SerialSignal_DTR;
2403 if (!(tty->termios->c_cflag & CRTSCTS) ||
2404 !test_bit(TTY_THROTTLED, &tty->flags)) {
2405 info->serial_signals |= SerialSignal_RTS;
2406 }
2407 spin_lock_irqsave(&info->lock,flags);
2408 set_signals(info);
2409 spin_unlock_irqrestore(&info->lock,flags);
2410 }
2411
2412 /* Handle turning off CRTSCTS */
2413 if (old_termios->c_cflag & CRTSCTS &&
2414 !(tty->termios->c_cflag & CRTSCTS)) {
2415 tty->hw_stopped = 0;
2416 tx_release(tty);
2417 }
2418}
2419
2420static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2421{
2422 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2423
2424 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2425 return;
2426
2427 if (debug_level >= DEBUG_LEVEL_INFO)
2428 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2429 __FILE__,__LINE__, info->device_name, info->count);
2430
2431 if (!info->count)
2432 return;
2433
2434 if (tty_hung_up_p(filp))
2435 goto cleanup;
2436
2437 if ((tty->count == 1) && (info->count != 1)) {
2438 /*
2439 * tty->count is 1 and the tty structure will be freed.
2440 * info->count should be one in this case.
2441 * if it's not, correct it so that the port is shutdown.
2442 */
2443 printk("mgslpc_close: bad refcount; tty->count is 1, "
2444 "info->count is %d\n", info->count);
2445 info->count = 1;
2446 }
2447
2448 info->count--;
2449
2450 /* if at least one open remaining, leave hardware active */
2451 if (info->count)
2452 goto cleanup;
2453
2454 info->flags |= ASYNC_CLOSING;
2455
2456 /* set tty->closing to notify line discipline to
2457 * only process XON/XOFF characters. Only the N_TTY
2458 * discipline appears to use this (ppp does not).
2459 */
2460 tty->closing = 1;
2461
2462 /* wait for transmit data to clear all layers */
2463
2464 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2465 if (debug_level >= DEBUG_LEVEL_INFO)
2466 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2467 __FILE__,__LINE__, info->device_name );
2468 tty_wait_until_sent(tty, info->closing_wait);
2469 }
2470
2471 if (info->flags & ASYNC_INITIALIZED)
2472 mgslpc_wait_until_sent(tty, info->timeout);
2473
2474 if (tty->driver->flush_buffer)
2475 tty->driver->flush_buffer(tty);
2476
2477 ldisc_flush_buffer(tty);
2478
2479 shutdown(info);
2480
2481 tty->closing = 0;
2482 info->tty = NULL;
2483
2484 if (info->blocked_open) {
2485 if (info->close_delay) {
2486 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2487 }
2488 wake_up_interruptible(&info->open_wait);
2489 }
2490
2491 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2492
2493 wake_up_interruptible(&info->close_wait);
2494
2495cleanup:
2496 if (debug_level >= DEBUG_LEVEL_INFO)
2497 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2498 tty->driver->name, info->count);
2499}
2500
2501/* Wait until the transmitter is empty.
2502 */
2503static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2504{
2505 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2506 unsigned long orig_jiffies, char_time;
2507
2508 if (!info )
2509 return;
2510
2511 if (debug_level >= DEBUG_LEVEL_INFO)
2512 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2513 __FILE__,__LINE__, info->device_name );
2514
2515 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2516 return;
2517
2518 if (!(info->flags & ASYNC_INITIALIZED))
2519 goto exit;
2520
2521 orig_jiffies = jiffies;
2522
2523 /* Set check interval to 1/5 of estimated time to
2524 * send a character, and make it at least 1. The check
2525 * interval should also be less than the timeout.
2526 * Note: use tight timings here to satisfy the NIST-PCTS.
2527 */
2528
2529 if ( info->params.data_rate ) {
2530 char_time = info->timeout/(32 * 5);
2531 if (!char_time)
2532 char_time++;
2533 } else
2534 char_time = 1;
2535
2536 if (timeout)
2537 char_time = min_t(unsigned long, char_time, timeout);
2538
2539 if (info->params.mode == MGSL_MODE_HDLC) {
2540 while (info->tx_active) {
2541 msleep_interruptible(jiffies_to_msecs(char_time));
2542 if (signal_pending(current))
2543 break;
2544 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2545 break;
2546 }
2547 } else {
2548 while ((info->tx_count || info->tx_active) &&
2549 info->tx_enabled) {
2550 msleep_interruptible(jiffies_to_msecs(char_time));
2551 if (signal_pending(current))
2552 break;
2553 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2554 break;
2555 }
2556 }
2557
2558exit:
2559 if (debug_level >= DEBUG_LEVEL_INFO)
2560 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2561 __FILE__,__LINE__, info->device_name );
2562}
2563
2564/* Called by tty_hangup() when a hangup is signaled.
2565 * This is the same as closing all open files for the port.
2566 */
2567static void mgslpc_hangup(struct tty_struct *tty)
2568{
2569 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2570
2571 if (debug_level >= DEBUG_LEVEL_INFO)
2572 printk("%s(%d):mgslpc_hangup(%s)\n",
2573 __FILE__,__LINE__, info->device_name );
2574
2575 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2576 return;
2577
2578 mgslpc_flush_buffer(tty);
2579 shutdown(info);
2580
2581 info->count = 0;
2582 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2583 info->tty = NULL;
2584
2585 wake_up_interruptible(&info->open_wait);
2586}
2587
2588/* Block the current process until the specified port
2589 * is ready to be opened.
2590 */
2591static int block_til_ready(struct tty_struct *tty, struct file *filp,
2592 MGSLPC_INFO *info)
2593{
2594 DECLARE_WAITQUEUE(wait, current);
2595 int retval;
2596 int do_clocal = 0, extra_count = 0;
2597 unsigned long flags;
2598
2599 if (debug_level >= DEBUG_LEVEL_INFO)
2600 printk("%s(%d):block_til_ready on %s\n",
2601 __FILE__,__LINE__, tty->driver->name );
2602
2603 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2604 /* nonblock mode is set or port is not enabled */
2605 /* just verify that callout device is not active */
2606 info->flags |= ASYNC_NORMAL_ACTIVE;
2607 return 0;
2608 }
2609
2610 if (tty->termios->c_cflag & CLOCAL)
2611 do_clocal = 1;
2612
2613 /* Wait for carrier detect and the line to become
2614 * free (i.e., not in use by the callout). While we are in
2615 * this loop, info->count is dropped by one, so that
2616 * mgslpc_close() knows when to free things. We restore it upon
2617 * exit, either normal or abnormal.
2618 */
2619
2620 retval = 0;
2621 add_wait_queue(&info->open_wait, &wait);
2622
2623 if (debug_level >= DEBUG_LEVEL_INFO)
2624 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2625 __FILE__,__LINE__, tty->driver->name, info->count );
2626
2627 spin_lock_irqsave(&info->lock, flags);
2628 if (!tty_hung_up_p(filp)) {
2629 extra_count = 1;
2630 info->count--;
2631 }
2632 spin_unlock_irqrestore(&info->lock, flags);
2633 info->blocked_open++;
2634
2635 while (1) {
2636 if ((tty->termios->c_cflag & CBAUD)) {
2637 spin_lock_irqsave(&info->lock,flags);
2638 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2639 set_signals(info);
2640 spin_unlock_irqrestore(&info->lock,flags);
2641 }
2642
2643 set_current_state(TASK_INTERRUPTIBLE);
2644
2645 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2646 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2647 -EAGAIN : -ERESTARTSYS;
2648 break;
2649 }
2650
2651 spin_lock_irqsave(&info->lock,flags);
2652 get_signals(info);
2653 spin_unlock_irqrestore(&info->lock,flags);
2654
2655 if (!(info->flags & ASYNC_CLOSING) &&
2656 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2657 break;
2658 }
2659
2660 if (signal_pending(current)) {
2661 retval = -ERESTARTSYS;
2662 break;
2663 }
2664
2665 if (debug_level >= DEBUG_LEVEL_INFO)
2666 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2667 __FILE__,__LINE__, tty->driver->name, info->count );
2668
2669 schedule();
2670 }
2671
2672 set_current_state(TASK_RUNNING);
2673 remove_wait_queue(&info->open_wait, &wait);
2674
2675 if (extra_count)
2676 info->count++;
2677 info->blocked_open--;
2678
2679 if (debug_level >= DEBUG_LEVEL_INFO)
2680 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2681 __FILE__,__LINE__, tty->driver->name, info->count );
2682
2683 if (!retval)
2684 info->flags |= ASYNC_NORMAL_ACTIVE;
2685
2686 return retval;
2687}
2688
2689static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2690{
2691 MGSLPC_INFO *info;
2692 int retval, line;
2693 unsigned long flags;
2694
2695 /* verify range of specified line number */
2696 line = tty->index;
2697 if ((line < 0) || (line >= mgslpc_device_count)) {
2698 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2699 __FILE__,__LINE__,line);
2700 return -ENODEV;
2701 }
2702
2703 /* find the info structure for the specified line */
2704 info = mgslpc_device_list;
2705 while(info && info->line != line)
2706 info = info->next_device;
2707 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2708 return -ENODEV;
2709
2710 tty->driver_data = info;
2711 info->tty = tty;
2712
2713 if (debug_level >= DEBUG_LEVEL_INFO)
2714 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2715 __FILE__,__LINE__,tty->driver->name, info->count);
2716
2717 /* If port is closing, signal caller to try again */
2718 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2719 if (info->flags & ASYNC_CLOSING)
2720 interruptible_sleep_on(&info->close_wait);
2721 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2722 -EAGAIN : -ERESTARTSYS);
2723 goto cleanup;
2724 }
2725
2726 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2727
2728 spin_lock_irqsave(&info->netlock, flags);
2729 if (info->netcount) {
2730 retval = -EBUSY;
2731 spin_unlock_irqrestore(&info->netlock, flags);
2732 goto cleanup;
2733 }
2734 info->count++;
2735 spin_unlock_irqrestore(&info->netlock, flags);
2736
2737 if (info->count == 1) {
2738 /* 1st open on this device, init hardware */
2739 retval = startup(info);
2740 if (retval < 0)
2741 goto cleanup;
2742 }
2743
2744 retval = block_til_ready(tty, filp, info);
2745 if (retval) {
2746 if (debug_level >= DEBUG_LEVEL_INFO)
2747 printk("%s(%d):block_til_ready(%s) returned %d\n",
2748 __FILE__,__LINE__, info->device_name, retval);
2749 goto cleanup;
2750 }
2751
2752 if (debug_level >= DEBUG_LEVEL_INFO)
2753 printk("%s(%d):mgslpc_open(%s) success\n",
2754 __FILE__,__LINE__, info->device_name);
2755 retval = 0;
2756
2757cleanup:
2758 if (retval) {
2759 if (tty->count == 1)
2760 info->tty = NULL; /* tty layer will release tty struct */
2761 if(info->count)
2762 info->count--;
2763 }
2764
2765 return retval;
2766}
2767
2768/*
2769 * /proc fs routines....
2770 */
2771
2772static inline int line_info(char *buf, MGSLPC_INFO *info)
2773{
2774 char stat_buf[30];
2775 int ret;
2776 unsigned long flags;
2777
2778 ret = sprintf(buf, "%s:io:%04X irq:%d",
2779 info->device_name, info->io_base, info->irq_level);
2780
2781 /* output current serial signal states */
2782 spin_lock_irqsave(&info->lock,flags);
2783 get_signals(info);
2784 spin_unlock_irqrestore(&info->lock,flags);
2785
2786 stat_buf[0] = 0;
2787 stat_buf[1] = 0;
2788 if (info->serial_signals & SerialSignal_RTS)
2789 strcat(stat_buf, "|RTS");
2790 if (info->serial_signals & SerialSignal_CTS)
2791 strcat(stat_buf, "|CTS");
2792 if (info->serial_signals & SerialSignal_DTR)
2793 strcat(stat_buf, "|DTR");
2794 if (info->serial_signals & SerialSignal_DSR)
2795 strcat(stat_buf, "|DSR");
2796 if (info->serial_signals & SerialSignal_DCD)
2797 strcat(stat_buf, "|CD");
2798 if (info->serial_signals & SerialSignal_RI)
2799 strcat(stat_buf, "|RI");
2800
2801 if (info->params.mode == MGSL_MODE_HDLC) {
2802 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2803 info->icount.txok, info->icount.rxok);
2804 if (info->icount.txunder)
2805 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2806 if (info->icount.txabort)
2807 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2808 if (info->icount.rxshort)
2809 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2810 if (info->icount.rxlong)
2811 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2812 if (info->icount.rxover)
2813 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2814 if (info->icount.rxcrc)
2815 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2816 } else {
2817 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2818 info->icount.tx, info->icount.rx);
2819 if (info->icount.frame)
2820 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2821 if (info->icount.parity)
2822 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2823 if (info->icount.brk)
2824 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2825 if (info->icount.overrun)
2826 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2827 }
2828
2829 /* Append serial signal status to end */
2830 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2831
2832 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2833 info->tx_active,info->bh_requested,info->bh_running,
2834 info->pending_bh);
2835
2836 return ret;
2837}
2838
2839/* Called to print information about devices
2840 */
2841static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2842 int *eof, void *data)
2843{
2844 int len = 0, l;
2845 off_t begin = 0;
2846 MGSLPC_INFO *info;
2847
2848 len += sprintf(page, "synclink driver:%s\n", driver_version);
2849
2850 info = mgslpc_device_list;
2851 while( info ) {
2852 l = line_info(page + len, info);
2853 len += l;
2854 if (len+begin > off+count)
2855 goto done;
2856 if (len+begin < off) {
2857 begin += len;
2858 len = 0;
2859 }
2860 info = info->next_device;
2861 }
2862
2863 *eof = 1;
2864done:
2865 if (off >= len+begin)
2866 return 0;
2867 *start = page + (off-begin);
2868 return ((count < begin+len-off) ? count : begin+len-off);
2869}
2870
cdaad343 2871static int rx_alloc_buffers(MGSLPC_INFO *info)
1da177e4
LT		 2872{
2873 /* each buffer has header and data */
2874 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2875
2876 /* calculate total allocation size for 8 buffers */
2877 info->rx_buf_total_size = info->rx_buf_size * 8;
2878
2879 /* limit total allocated memory */
2880 if (info->rx_buf_total_size > 0x10000)
2881 info->rx_buf_total_size = 0x10000;
2882
2883 /* calculate number of buffers */
2884 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2885
2886 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2887 if (info->rx_buf == NULL)
2888 return -ENOMEM;
2889
2890 rx_reset_buffers(info);
2891 return 0;
2892}
2893
cdaad343 2894static void rx_free_buffers(MGSLPC_INFO *info)
1da177e4 2895{
735d5661 2896 kfree(info->rx_buf);
1da177e4
LT		 2897 info->rx_buf = NULL;
2898}
2899
cdaad343 2900static int claim_resources(MGSLPC_INFO *info)
1da177e4
LT		 2901{
2902 if (rx_alloc_buffers(info) < 0 ) {
2903 printk( "Cant allocate rx buffer %s\n", info->device_name);
2904 release_resources(info);
2905 return -ENODEV;
2906 }
2907 return 0;
2908}
2909
cdaad343 2910static void release_resources(MGSLPC_INFO *info)
1da177e4
LT		 2911{
2912 if (debug_level >= DEBUG_LEVEL_INFO)
2913 printk("release_resources(%s)\n", info->device_name);
2914 rx_free_buffers(info);
2915}
2916
2917/* Add the specified device instance data structure to the
2918 * global linked list of devices and increment the device count.
2919 *
2920 * Arguments: info pointer to device instance data
2921 */
cdaad343 2922static void mgslpc_add_device(MGSLPC_INFO *info)
1da177e4
LT		 2923{
2924 info->next_device = NULL;
2925 info->line = mgslpc_device_count;
2926 sprintf(info->device_name,"ttySLP%d",info->line);
2927
2928 if (info->line < MAX_DEVICE_COUNT) {
2929 if (maxframe[info->line])
2930 info->max_frame_size = maxframe[info->line];
2931 info->dosyncppp = dosyncppp[info->line];
2932 }
2933
2934 mgslpc_device_count++;
2935
2936 if (!mgslpc_device_list)
2937 mgslpc_device_list = info;
2938 else {
2939 MGSLPC_INFO *current_dev = mgslpc_device_list;
2940 while( current_dev->next_device )
2941 current_dev = current_dev->next_device;
2942 current_dev->next_device = info;
2943 }
2944
2945 if (info->max_frame_size < 4096)
2946 info->max_frame_size = 4096;
2947 else if (info->max_frame_size > 65535)
2948 info->max_frame_size = 65535;
2949
2950 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2951 info->device_name, info->io_base, info->irq_level);
2952
af69c7f9 2953#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 2954 hdlcdev_init(info);
2955#endif
2956}
2957
cdaad343 2958static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
1da177e4
LT		 2959{
2960 MGSLPC_INFO *info = mgslpc_device_list;
2961 MGSLPC_INFO *last = NULL;
2962
2963 while(info) {
2964 if (info == remove_info) {
2965 if (last)
2966 last->next_device = info->next_device;
2967 else
2968 mgslpc_device_list = info->next_device;
af69c7f9 2969#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 2970 hdlcdev_exit(info);
2971#endif
2972 release_resources(info);
2973 kfree(info);
2974 mgslpc_device_count--;
2975 return;
2976 }
2977 last = info;
2978 info = info->next_device;
2979 }
2980}
2981
4af48c8c
DB		 2982static struct pcmcia_device_id mgslpc_ids[] = {
2983 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2984 PCMCIA_DEVICE_NULL
2985};
2986MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2987
1da177e4
LT		 2988static struct pcmcia_driver mgslpc_driver = {
2989 .owner = THIS_MODULE,
2990 .drv = {
2991 .name = "synclink_cs",
2992 },
15b99ac1 2993 .probe = mgslpc_probe,
cc3b4866 2994 .remove = mgslpc_detach,
4af48c8c 2995 .id_table = mgslpc_ids,
98e4c28b
DB		 2996 .suspend = mgslpc_suspend,
2997 .resume = mgslpc_resume,
1da177e4
LT		 2998};
2999
b68e31d0 3000static const struct tty_operations mgslpc_ops = {
1da177e4
LT		 3001 .open = mgslpc_open,
3002 .close = mgslpc_close,
3003 .write = mgslpc_write,
3004 .put_char = mgslpc_put_char,
3005 .flush_chars = mgslpc_flush_chars,
3006 .write_room = mgslpc_write_room,
3007 .chars_in_buffer = mgslpc_chars_in_buffer,
3008 .flush_buffer = mgslpc_flush_buffer,
3009 .ioctl = mgslpc_ioctl,
3010 .throttle = mgslpc_throttle,
3011 .unthrottle = mgslpc_unthrottle,
3012 .send_xchar = mgslpc_send_xchar,
3013 .break_ctl = mgslpc_break,
3014 .wait_until_sent = mgslpc_wait_until_sent,
3015 .read_proc = mgslpc_read_proc,
3016 .set_termios = mgslpc_set_termios,
3017 .stop = tx_pause,
3018 .start = tx_release,
3019 .hangup = mgslpc_hangup,
3020 .tiocmget = tiocmget,
3021 .tiocmset = tiocmset,
3022};
3023
3024static void synclink_cs_cleanup(void)
3025{
3026 int rc;
3027
3028 printk("Unloading %s: version %s\n", driver_name, driver_version);
3029
3030 while(mgslpc_device_list)
3031 mgslpc_remove_device(mgslpc_device_list);
3032
3033 if (serial_driver) {
3034 if ((rc = tty_unregister_driver(serial_driver)))
3035 printk("%s(%d) failed to unregister tty driver err=%d\n",
3036 __FILE__,__LINE__,rc);
3037 put_tty_driver(serial_driver);
3038 }
3039
3040 pcmcia_unregister_driver(&mgslpc_driver);
1da177e4
LT		 3041}
3042
3043static int __init synclink_cs_init(void)
3044{
3045 int rc;
3046
3047 if (break_on_load) {
3048 mgslpc_get_text_ptr();
3049 BREAKPOINT();
3050 }
3051
3052 printk("%s %s\n", driver_name, driver_version);
3053
3054 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3055 return rc;
3056
3057 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3058 if (!serial_driver) {
3059 rc = -ENOMEM;
3060 goto error;
3061 }
3062
3063 /* Initialize the tty_driver structure */
3064
3065 serial_driver->owner = THIS_MODULE;
3066 serial_driver->driver_name = "synclink_cs";
3067 serial_driver->name = "ttySLP";
3068 serial_driver->major = ttymajor;
3069 serial_driver->minor_start = 64;
3070 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3071 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3072 serial_driver->init_termios = tty_std_termios;
3073 serial_driver->init_termios.c_cflag =
3074 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3075 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3076 tty_set_operations(serial_driver, &mgslpc_ops);
3077
3078 if ((rc = tty_register_driver(serial_driver)) < 0) {
3079 printk("%s(%d):Couldn't register serial driver\n",
3080 __FILE__,__LINE__);
3081 put_tty_driver(serial_driver);
3082 serial_driver = NULL;
3083 goto error;
3084 }
3085
3086 printk("%s %s, tty major#%d\n",
3087 driver_name, driver_version,
3088 serial_driver->major);
3089
3090 return 0;
3091
3092error:
3093 synclink_cs_cleanup();
3094 return rc;
3095}
3096
3097static void __exit synclink_cs_exit(void)
3098{
3099 synclink_cs_cleanup();
3100}
3101
3102module_init(synclink_cs_init);
3103module_exit(synclink_cs_exit);
3104
3105static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3106{
3107 unsigned int M, N;
3108 unsigned char val;
3109
3110 /* note:standard BRG mode is broken in V3.2 chip
3111 * so enhanced mode is always used
3112 */
3113
3114 if (rate) {
3115 N = 3686400 / rate;
3116 if (!N)
3117 N = 1;
3118 N >>= 1;
3119 for (M = 1; N > 64 && M < 16; M++)
3120 N >>= 1;
3121 N--;
3122
3123 /* BGR[5..0] = N
3124 * BGR[9..6] = M
3125 * BGR[7..0] contained in BGR register
3126 * BGR[9..8] contained in CCR2[7..6]
3127 * divisor = (N+1)*2^M
3128 *
3129 * Note: M *must* not be zero (causes asymetric duty cycle)
3130 */
3131 write_reg(info, (unsigned char) (channel + BGR),
3132 (unsigned char) ((M << 6) + N));
3133 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3134 val |= ((M << 4) & 0xc0);
3135 write_reg(info, (unsigned char) (channel + CCR2), val);
3136 }
3137}
3138
3139/* Enabled the AUX clock output at the specified frequency.
3140 */
3141static void enable_auxclk(MGSLPC_INFO *info)
3142{
3143 unsigned char val;
3144
3145 /* MODE
3146 *
3147 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3148 * 05 ADM Address Mode, 0 = no addr recognition
3149 * 04 TMD Timer Mode, 0 = external
3150 * 03 RAC Receiver Active, 0 = inactive
3151 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3152 * 01 TRS Timer Resolution, 1=512
3153 * 00 TLP Test Loop, 0 = no loop
3154 *
3155 * 1000 0010
3156 */
3157 val = 0x82;
3158
3159 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3160 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3161 val |= BIT2;
3162 write_reg(info, CHB + MODE, val);
3163
3164 /* CCR0
3165 *
3166 * 07 PU Power Up, 1=active, 0=power down
3167 * 06 MCE Master Clock Enable, 1=enabled
3168 * 05 Reserved, 0
3169 * 04..02 SC[2..0] Encoding
3170 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3171 *
3172 * 11000000
3173 */
3174 write_reg(info, CHB + CCR0, 0xc0);
3175
3176 /* CCR1
3177 *
3178 * 07 SFLG Shared Flag, 0 = disable shared flags
3179 * 06 GALP Go Active On Loop, 0 = not used
3180 * 05 GLP Go On Loop, 0 = not used
3181 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3182 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3183 * 02..00 CM[2..0] Clock Mode
3184 *
3185 * 0001 0111
3186 */
3187 write_reg(info, CHB + CCR1, 0x17);
3188
3189 /* CCR2 (Channel B)
3190 *
3191 * 07..06 BGR[9..8] Baud rate bits 9..8
3192 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3193 * 04 SSEL Clock source select, 1=submode b
3194 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3195 * 02 RWX Read/Write Exchange 0=disabled
3196 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3197 * 00 DIV, data inversion 0=disabled, 1=enabled
3198 *
3199 * 0011 1000
3200 */
3201 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3202 write_reg(info, CHB + CCR2, 0x38);
3203 else
3204 write_reg(info, CHB + CCR2, 0x30);
3205
3206 /* CCR4
3207 *
3208 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3209 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3210 * 05 TST1 Test Pin, 0=normal operation
3211 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3212 * 03..02 Reserved, must be 0
3213 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3214 *
3215 * 0101 0000
3216 */
3217 write_reg(info, CHB + CCR4, 0x50);
3218
3219 /* if auxclk not enabled, set internal BRG so
3220 * CTS transitions can be detected (requires TxC)
3221 */
3222 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3223 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3224 else
3225 mgslpc_set_rate(info, CHB, 921600);
3226}
3227
3228static void loopback_enable(MGSLPC_INFO *info)
3229{
3230 unsigned char val;
3231
3232 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3233 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3234 write_reg(info, CHA + CCR1, val);
3235
3236 /* CCR2:04 SSEL Clock source select, 1=submode b */
3237 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3238 write_reg(info, CHA + CCR2, val);
3239
3240 /* set LinkSpeed if available, otherwise default to 2Mbps */
3241 if (info->params.clock_speed)
3242 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3243 else
3244 mgslpc_set_rate(info, CHA, 1843200);
3245
3246 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3247 val = read_reg(info, CHA + MODE) | BIT0;
3248 write_reg(info, CHA + MODE, val);
3249}
3250
cdaad343 3251static void hdlc_mode(MGSLPC_INFO *info)
1da177e4
LT		 3252{
3253 unsigned char val;
3254 unsigned char clkmode, clksubmode;
3255
3256 /* disable all interrupts */
3257 irq_disable(info, CHA, 0xffff);
3258 irq_disable(info, CHB, 0xffff);
3259 port_irq_disable(info, 0xff);
3260
3261 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3262 clkmode = clksubmode = 0;
3263 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3264 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3265 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3266 clkmode = 7;
3267 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3268 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3269 /* clock mode 7b, rcv = BRG, xmt = BRG */
3270 clkmode = 7;
3271 clksubmode = 1;
3272 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3273 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3274 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3275 clkmode = 6;
3276 clksubmode = 1;
3277 } else {
3278 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3279 clkmode = 6;
3280 }
3281 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3282 /* clock mode 0b, rcv = RxC, xmt = BRG */
3283 clksubmode = 1;
3284 }
3285
3286 /* MODE
3287 *
3288 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3289 * 05 ADM Address Mode, 0 = no addr recognition
3290 * 04 TMD Timer Mode, 0 = external
3291 * 03 RAC Receiver Active, 0 = inactive
3292 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3293 * 01 TRS Timer Resolution, 1=512
3294 * 00 TLP Test Loop, 0 = no loop
3295 *
3296 * 1000 0010
3297 */
3298 val = 0x82;
3299 if (info->params.loopback)
3300 val |= BIT0;
3301
3302 /* preserve RTS state */
3303 if (info->serial_signals & SerialSignal_RTS)
3304 val |= BIT2;
3305 write_reg(info, CHA + MODE, val);
3306
3307 /* CCR0
3308 *
3309 * 07 PU Power Up, 1=active, 0=power down
3310 * 06 MCE Master Clock Enable, 1=enabled
3311 * 05 Reserved, 0
3312 * 04..02 SC[2..0] Encoding
3313 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3314 *
3315 * 11000000
3316 */
3317 val = 0xc0;
3318 switch (info->params.encoding)
3319 {
3320 case HDLC_ENCODING_NRZI:
3321 val |= BIT3;
3322 break;
3323 case HDLC_ENCODING_BIPHASE_SPACE:
3324 val |= BIT4;
3325 break; // FM0
3326 case HDLC_ENCODING_BIPHASE_MARK:
3327 val |= BIT4 + BIT2;
3328 break; // FM1
3329 case HDLC_ENCODING_BIPHASE_LEVEL:
3330 val |= BIT4 + BIT3;
3331 break; // Manchester
3332 }
3333 write_reg(info, CHA + CCR0, val);
3334
3335 /* CCR1
3336 *
3337 * 07 SFLG Shared Flag, 0 = disable shared flags
3338 * 06 GALP Go Active On Loop, 0 = not used
3339 * 05 GLP Go On Loop, 0 = not used
3340 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3341 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3342 * 02..00 CM[2..0] Clock Mode
3343 *
3344 * 0001 0000
3345 */
3346 val = 0x10 + clkmode;
3347 write_reg(info, CHA + CCR1, val);
3348
3349 /* CCR2
3350 *
3351 * 07..06 BGR[9..8] Baud rate bits 9..8
3352 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3353 * 04 SSEL Clock source select, 1=submode b
3354 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3355 * 02 RWX Read/Write Exchange 0=disabled
3356 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3357 * 00 DIV, data inversion 0=disabled, 1=enabled
3358 *
3359 * 0000 0000
3360 */
3361 val = 0x00;
3362 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3363 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3364 val |= BIT5;
3365 if (clksubmode)
3366 val |= BIT4;
3367 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3368 val |= BIT1;
3369 if (info->params.encoding == HDLC_ENCODING_NRZB)
3370 val |= BIT0;
3371 write_reg(info, CHA + CCR2, val);
3372
3373 /* CCR3
3374 *
3375 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3376 * 05 EPT Enable preamble transmission, 1=enabled
3377 * 04 RADD Receive address pushed to FIFO, 0=disabled
3378 * 03 CRL CRC Reset Level, 0=FFFF
3379 * 02 RCRC Rx CRC 0=On 1=Off
3380 * 01 TCRC Tx CRC 0=On 1=Off
3381 * 00 PSD DPLL Phase Shift Disable
3382 *
3383 * 0000 0000
3384 */
3385 val = 0x00;
3386 if (info->params.crc_type == HDLC_CRC_NONE)
3387 val |= BIT2 + BIT1;
3388 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3389 val |= BIT5;
3390 switch (info->params.preamble_length)
3391 {
3392 case HDLC_PREAMBLE_LENGTH_16BITS:
3393 val |= BIT6;
3394 break;
3395 case HDLC_PREAMBLE_LENGTH_32BITS:
3396 val |= BIT6;
3397 break;
3398 case HDLC_PREAMBLE_LENGTH_64BITS:
3399 val |= BIT7 + BIT6;
3400 break;
3401 }
3402 write_reg(info, CHA + CCR3, val);
3403
3404 /* PRE - Preamble pattern */
3405 val = 0;
3406 switch (info->params.preamble)
3407 {
3408 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3409 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3410 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3411 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3412 }
3413 write_reg(info, CHA + PRE, val);
3414
3415 /* CCR4
3416 *
3417 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3418 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3419 * 05 TST1 Test Pin, 0=normal operation
3420 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3421 * 03..02 Reserved, must be 0
3422 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3423 *
3424 * 0101 0000
3425 */
3426 val = 0x50;
3427 write_reg(info, CHA + CCR4, val);
3428 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3429 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3430 else
3431 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3432
3433 /* RLCR Receive length check register
3434 *
3435 * 7 1=enable receive length check
3436 * 6..0 Max frame length = (RL + 1) * 32
3437 */
3438 write_reg(info, CHA + RLCR, 0);
3439
3440 /* XBCH Transmit Byte Count High
3441 *
3442 * 07 DMA mode, 0 = interrupt driven
3443 * 06 NRM, 0=ABM (ignored)
3444 * 05 CAS Carrier Auto Start
3445 * 04 XC Transmit Continuously (ignored)
3446 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3447 *
3448 * 0000 0000
3449 */
3450 val = 0x00;
3451 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3452 val |= BIT5;
3453 write_reg(info, CHA + XBCH, val);
3454 enable_auxclk(info);
3455 if (info->params.loopback || info->testing_irq)
3456 loopback_enable(info);
3457 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3458 {
3459 irq_enable(info, CHB, IRQ_CTS);
3460 /* PVR[3] 1=AUTO CTS active */
3461 set_reg_bits(info, CHA + PVR, BIT3);
3462 } else
3463 clear_reg_bits(info, CHA + PVR, BIT3);
3464
3465 irq_enable(info, CHA,
3466 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3467 IRQ_UNDERRUN + IRQ_TXFIFO);
3468 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3469 wait_command_complete(info, CHA);
3470 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3471
3472 /* Master clock mode enabled above to allow reset commands
3473 * to complete even if no data clocks are present.
3474 *
3475 * Disable master clock mode for normal communications because
3476 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3477 * IRQ when in master clock mode.
3478 *
3479 * Leave master clock mode enabled for IRQ test because the
3480 * timer IRQ used by the test can only happen in master clock mode.
3481 */
3482 if (!info->testing_irq)
3483 clear_reg_bits(info, CHA + CCR0, BIT6);
3484
3485 tx_set_idle(info);
3486
3487 tx_stop(info);
3488 rx_stop(info);
3489}
3490
cdaad343 3491static void rx_stop(MGSLPC_INFO *info)
1da177e4
LT		 3492{
3493 if (debug_level >= DEBUG_LEVEL_ISR)
3494 printk("%s(%d):rx_stop(%s)\n",
3495 __FILE__,__LINE__, info->device_name );
3496
3497 /* MODE:03 RAC Receiver Active, 0=inactive */
3498 clear_reg_bits(info, CHA + MODE, BIT3);
3499
3500 info->rx_enabled = 0;
3501 info->rx_overflow = 0;
3502}
3503
cdaad343 3504static void rx_start(MGSLPC_INFO *info)
1da177e4
LT		 3505{
3506 if (debug_level >= DEBUG_LEVEL_ISR)
3507 printk("%s(%d):rx_start(%s)\n",
3508 __FILE__,__LINE__, info->device_name );
3509
3510 rx_reset_buffers(info);
3511 info->rx_enabled = 0;
3512 info->rx_overflow = 0;
3513
3514 /* MODE:03 RAC Receiver Active, 1=active */
3515 set_reg_bits(info, CHA + MODE, BIT3);
3516
3517 info->rx_enabled = 1;
3518}
3519
cdaad343 3520static void tx_start(MGSLPC_INFO *info)
1da177e4
LT		 3521{
3522 if (debug_level >= DEBUG_LEVEL_ISR)
3523 printk("%s(%d):tx_start(%s)\n",
3524 __FILE__,__LINE__, info->device_name );
3525
3526 if (info->tx_count) {
3527 /* If auto RTS enabled and RTS is inactive, then assert */
3528 /* RTS and set a flag indicating that the driver should */
3529 /* negate RTS when the transmission completes. */
3530 info->drop_rts_on_tx_done = 0;
3531
3532 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3533 get_signals(info);
3534 if (!(info->serial_signals & SerialSignal_RTS)) {
3535 info->serial_signals |= SerialSignal_RTS;
3536 set_signals(info);
3537 info->drop_rts_on_tx_done = 1;
3538 }
3539 }
3540
3541 if (info->params.mode == MGSL_MODE_ASYNC) {
3542 if (!info->tx_active) {
3543 info->tx_active = 1;
3544 tx_ready(info);
3545 }
3546 } else {
3547 info->tx_active = 1;
3548 tx_ready(info);
40565f19
JS		 3549 mod_timer(&info->tx_timer, jiffies +
3550 msecs_to_jiffies(5000));
1da177e4
LT		 3551 }
3552 }
3553
3554 if (!info->tx_enabled)
3555 info->tx_enabled = 1;
3556}
3557
cdaad343 3558static void tx_stop(MGSLPC_INFO *info)
1da177e4
LT		 3559{
3560 if (debug_level >= DEBUG_LEVEL_ISR)
3561 printk("%s(%d):tx_stop(%s)\n",
3562 __FILE__,__LINE__, info->device_name );
3563
3564 del_timer(&info->tx_timer);
3565
3566 info->tx_enabled = 0;
3567 info->tx_active = 0;
3568}
3569
3570/* Reset the adapter to a known state and prepare it for further use.
3571 */
cdaad343 3572static void reset_device(MGSLPC_INFO *info)
1da177e4
LT		 3573{
3574 /* power up both channels (set BIT7) */
3575 write_reg(info, CHA + CCR0, 0x80);
3576 write_reg(info, CHB + CCR0, 0x80);
3577 write_reg(info, CHA + MODE, 0);
3578 write_reg(info, CHB + MODE, 0);
3579
3580 /* disable all interrupts */
3581 irq_disable(info, CHA, 0xffff);
3582 irq_disable(info, CHB, 0xffff);
3583 port_irq_disable(info, 0xff);
3584
3585 /* PCR Port Configuration Register
3586 *
3587 * 07..04 DEC[3..0] Serial I/F select outputs
3588 * 03 output, 1=AUTO CTS control enabled
3589 * 02 RI Ring Indicator input 0=active
3590 * 01 DSR input 0=active
3591 * 00 DTR output 0=active
3592 *
3593 * 0000 0110
3594 */
3595 write_reg(info, PCR, 0x06);
3596
3597 /* PVR Port Value Register
3598 *
3599 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3600 * 03 AUTO CTS output 1=enabled
3601 * 02 RI Ring Indicator input
3602 * 01 DSR input
3603 * 00 DTR output (1=inactive)
3604 *
3605 * 0000 0001
3606 */
3607// write_reg(info, PVR, PVR_DTR);
3608
3609 /* IPC Interrupt Port Configuration
3610 *
3611 * 07 VIS 1=Masked interrupts visible
3612 * 06..05 Reserved, 0
3613 * 04..03 SLA Slave address, 00 ignored
3614 * 02 CASM Cascading Mode, 1=daisy chain
3615 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3616 *
3617 * 0000 0101
3618 */
3619 write_reg(info, IPC, 0x05);
3620}
3621
cdaad343 3622static void async_mode(MGSLPC_INFO *info)
1da177e4
LT		 3623{
3624 unsigned char val;
3625
3626 /* disable all interrupts */
3627 irq_disable(info, CHA, 0xffff);
3628 irq_disable(info, CHB, 0xffff);
3629 port_irq_disable(info, 0xff);
3630
3631 /* MODE
3632 *
3633 * 07 Reserved, 0
3634 * 06 FRTS RTS State, 0=active
3635 * 05 FCTS Flow Control on CTS
3636 * 04 FLON Flow Control Enable
3637 * 03 RAC Receiver Active, 0 = inactive
3638 * 02 RTS 0=Auto RTS, 1=manual RTS
3639 * 01 TRS Timer Resolution, 1=512
3640 * 00 TLP Test Loop, 0 = no loop
3641 *
3642 * 0000 0110
3643 */
3644 val = 0x06;
3645 if (info->params.loopback)
3646 val |= BIT0;
3647
3648 /* preserve RTS state */
3649 if (!(info->serial_signals & SerialSignal_RTS))
3650 val |= BIT6;
3651 write_reg(info, CHA + MODE, val);
3652
3653 /* CCR0
3654 *
3655 * 07 PU Power Up, 1=active, 0=power down
3656 * 06 MCE Master Clock Enable, 1=enabled
3657 * 05 Reserved, 0
3658 * 04..02 SC[2..0] Encoding, 000=NRZ
3659 * 01..00 SM[1..0] Serial Mode, 11=Async
3660 *
3661 * 1000 0011
3662 */
3663 write_reg(info, CHA + CCR0, 0x83);
3664
3665 /* CCR1
3666 *
3667 * 07..05 Reserved, 0
3668 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3669 * 03 BCR Bit Clock Rate, 1=16x
3670 * 02..00 CM[2..0] Clock Mode, 111=BRG
3671 *
3672 * 0001 1111
3673 */
3674 write_reg(info, CHA + CCR1, 0x1f);
3675
3676 /* CCR2 (channel A)
3677 *
3678 * 07..06 BGR[9..8] Baud rate bits 9..8
3679 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3680 * 04 SSEL Clock source select, 1=submode b
3681 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3682 * 02 RWX Read/Write Exchange 0=disabled
3683 * 01 Reserved, 0
3684 * 00 DIV, data inversion 0=disabled, 1=enabled
3685 *
3686 * 0001 0000
3687 */
3688 write_reg(info, CHA + CCR2, 0x10);
3689
3690 /* CCR3
3691 *
3692 * 07..01 Reserved, 0
3693 * 00 PSD DPLL Phase Shift Disable
3694 *
3695 * 0000 0000
3696 */
3697 write_reg(info, CHA + CCR3, 0);
3698
3699 /* CCR4
3700 *
3701 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3702 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3703 * 05 TST1 Test Pin, 0=normal operation
3704 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3705 * 03..00 Reserved, must be 0
3706 *
3707 * 0101 0000
3708 */
3709 write_reg(info, CHA + CCR4, 0x50);
3710 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3711
3712 /* DAFO Data Format
3713 *
3714 * 07 Reserved, 0
3715 * 06 XBRK transmit break, 0=normal operation
3716 * 05 Stop bits (0=1, 1=2)
3717 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3718 * 02 PAREN Parity Enable
3719 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3720 *
3721 */
3722 val = 0x00;
3723 if (info->params.data_bits != 8)
3724 val |= BIT0; /* 7 bits */
3725 if (info->params.stop_bits != 1)
3726 val |= BIT5;
3727 if (info->params.parity != ASYNC_PARITY_NONE)
3728 {
3729 val |= BIT2; /* Parity enable */
3730 if (info->params.parity == ASYNC_PARITY_ODD)
3731 val |= BIT3;
3732 else
3733 val |= BIT4;
3734 }
3735 write_reg(info, CHA + DAFO, val);
3736
3737 /* RFC Rx FIFO Control
3738 *
3739 * 07 Reserved, 0
3740 * 06 DPS, 1=parity bit not stored in data byte
3741 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3742 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3743 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3744 * 01 Reserved, 0
3745 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3746 *
3747 * 0101 1100
3748 */
3749 write_reg(info, CHA + RFC, 0x5c);
3750
3751 /* RLCR Receive length check register
3752 *
3753 * Max frame length = (RL + 1) * 32
3754 */
3755 write_reg(info, CHA + RLCR, 0);
3756
3757 /* XBCH Transmit Byte Count High
3758 *
3759 * 07 DMA mode, 0 = interrupt driven
3760 * 06 NRM, 0=ABM (ignored)
3761 * 05 CAS Carrier Auto Start
3762 * 04 XC Transmit Continuously (ignored)
3763 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3764 *
3765 * 0000 0000
3766 */
3767 val = 0x00;
3768 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3769 val |= BIT5;
3770 write_reg(info, CHA + XBCH, val);
3771 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3772 irq_enable(info, CHA, IRQ_CTS);
3773
3774 /* MODE:03 RAC Receiver Active, 1=active */
3775 set_reg_bits(info, CHA + MODE, BIT3);
3776 enable_auxclk(info);
3777 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3778 irq_enable(info, CHB, IRQ_CTS);
3779 /* PVR[3] 1=AUTO CTS active */
3780 set_reg_bits(info, CHA + PVR, BIT3);
3781 } else
3782 clear_reg_bits(info, CHA + PVR, BIT3);
3783 irq_enable(info, CHA,
3784 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3785 IRQ_ALLSENT + IRQ_TXFIFO);
3786 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3787 wait_command_complete(info, CHA);
3788 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3789}
3790
3791/* Set the HDLC idle mode for the transmitter.
3792 */
cdaad343 3793static void tx_set_idle(MGSLPC_INFO *info)
1da177e4
LT		 3794{
3795 /* Note: ESCC2 only supports flags and one idle modes */
3796 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3797 set_reg_bits(info, CHA + CCR1, BIT3);
3798 else
3799 clear_reg_bits(info, CHA + CCR1, BIT3);
3800}
3801
3802/* get state of the V24 status (input) signals.
3803 */
cdaad343 3804static void get_signals(MGSLPC_INFO *info)
1da177e4
LT		 3805{
3806 unsigned char status = 0;
3807
3808 /* preserve DTR and RTS */
3809 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3810
3811 if (read_reg(info, CHB + VSTR) & BIT7)
3812 info->serial_signals |= SerialSignal_DCD;
3813 if (read_reg(info, CHB + STAR) & BIT1)
3814 info->serial_signals |= SerialSignal_CTS;
3815
3816 status = read_reg(info, CHA + PVR);
3817 if (!(status & PVR_RI))
3818 info->serial_signals |= SerialSignal_RI;
3819 if (!(status & PVR_DSR))
3820 info->serial_signals |= SerialSignal_DSR;
3821}
3822
3823/* Set the state of DTR and RTS based on contents of
3824 * serial_signals member of device extension.
3825 */
cdaad343 3826static void set_signals(MGSLPC_INFO *info)
1da177e4
LT		 3827{
3828 unsigned char val;
3829
3830 val = read_reg(info, CHA + MODE);
3831 if (info->params.mode == MGSL_MODE_ASYNC) {
3832 if (info->serial_signals & SerialSignal_RTS)
3833 val &= ~BIT6;
3834 else
3835 val |= BIT6;
3836 } else {
3837 if (info->serial_signals & SerialSignal_RTS)
3838 val |= BIT2;
3839 else
3840 val &= ~BIT2;
3841 }
3842 write_reg(info, CHA + MODE, val);
3843
3844 if (info->serial_signals & SerialSignal_DTR)
3845 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3846 else
3847 set_reg_bits(info, CHA + PVR, PVR_DTR);
3848}
3849
cdaad343 3850static void rx_reset_buffers(MGSLPC_INFO *info)
1da177e4
LT		 3851{
3852 RXBUF *buf;
3853 int i;
3854
3855 info->rx_put = 0;
3856 info->rx_get = 0;
3857 info->rx_frame_count = 0;
3858 for (i=0 ; i < info->rx_buf_count ; i++) {
3859 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3860 buf->status = buf->count = 0;
3861 }
3862}
3863
3864/* Attempt to return a received HDLC frame
3865 * Only frames received without errors are returned.
3866 *
3867 * Returns 1 if frame returned, otherwise 0
3868 */
cdaad343 3869static int rx_get_frame(MGSLPC_INFO *info)
1da177e4
LT		 3870{
3871 unsigned short status;
3872 RXBUF *buf;
3873 unsigned int framesize = 0;
3874 unsigned long flags;
3875 struct tty_struct *tty = info->tty;
3876 int return_frame = 0;
3877
3878 if (info->rx_frame_count == 0)
3879 return 0;
3880
3881 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3882
3883 status = buf->status;
3884
3885 /* 07 VFR 1=valid frame
3886 * 06 RDO 1=data overrun
3887 * 05 CRC 1=OK, 0=error
3888 * 04 RAB 1=frame aborted
3889 */
3890 if ((status & 0xf0) != 0xA0) {
3891 if (!(status & BIT7) || (status & BIT4))
3892 info->icount.rxabort++;
3893 else if (status & BIT6)
3894 info->icount.rxover++;
3895 else if (!(status & BIT5)) {
3896 info->icount.rxcrc++;
3897 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3898 return_frame = 1;
3899 }
3900 framesize = 0;
af69c7f9 3901#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 3902 {
3903 struct net_device_stats *stats = hdlc_stats(info->netdev);
3904 stats->rx_errors++;
3905 stats->rx_frame_errors++;
3906 }
3907#endif
3908 } else
3909 return_frame = 1;
3910
3911 if (return_frame)
3912 framesize = buf->count;
3913
3914 if (debug_level >= DEBUG_LEVEL_BH)
3915 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3916 __FILE__,__LINE__,info->device_name,status,framesize);
3917
3918 if (debug_level >= DEBUG_LEVEL_DATA)
3919 trace_block(info, buf->data, framesize, 0);
3920
3921 if (framesize) {
3922 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3923 framesize+1 > info->max_frame_size) ||
3924 framesize > info->max_frame_size)
3925 info->icount.rxlong++;
3926 else {
3927 if (status & BIT5)
3928 info->icount.rxok++;
3929
3930 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3931 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3932 ++framesize;
3933 }
3934
af69c7f9 3935#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 3936 if (info->netcount)
3937 hdlcdev_rx(info, buf->data, framesize);
3938 else
3939#endif
3940 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3941 }
3942 }
3943
3944 spin_lock_irqsave(&info->lock,flags);
3945 buf->status = buf->count = 0;
3946 info->rx_frame_count--;
3947 info->rx_get++;
3948 if (info->rx_get >= info->rx_buf_count)
3949 info->rx_get = 0;
3950 spin_unlock_irqrestore(&info->lock,flags);
3951
3952 return 1;
3953}
3954
cdaad343 3955static BOOLEAN register_test(MGSLPC_INFO *info)
1da177e4
LT		 3956{
3957 static unsigned char patterns[] =
3958 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
fe971071 3959 static unsigned int count = ARRAY_SIZE(patterns);
1da177e4
LT		 3960 unsigned int i;
3961 BOOLEAN rc = TRUE;
3962 unsigned long flags;
3963
3964 spin_lock_irqsave(&info->lock,flags);
3965 reset_device(info);
3966
3967 for (i = 0; i < count; i++) {
3968 write_reg(info, XAD1, patterns[i]);
3969 write_reg(info, XAD2, patterns[(i + 1) % count]);
fe971071 3970 if ((read_reg(info, XAD1) != patterns[i]) ||
1da177e4
LT		 3971 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3972 rc = FALSE;
3973 break;
3974 }
3975 }
3976
3977 spin_unlock_irqrestore(&info->lock,flags);
3978 return rc;
3979}
3980
cdaad343 3981static BOOLEAN irq_test(MGSLPC_INFO *info)
1da177e4
LT		 3982{
3983 unsigned long end_time;
3984 unsigned long flags;
3985
3986 spin_lock_irqsave(&info->lock,flags);
3987 reset_device(info);
3988
3989 info->testing_irq = TRUE;
3990 hdlc_mode(info);
3991
3992 info->irq_occurred = FALSE;
3993
3994 /* init hdlc mode */
3995
3996 irq_enable(info, CHA, IRQ_TIMER);
3997 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3998 issue_command(info, CHA, CMD_START_TIMER);
3999
4000 spin_unlock_irqrestore(&info->lock,flags);
4001
4002 end_time=100;
4003 while(end_time-- && !info->irq_occurred) {
4004 msleep_interruptible(10);
4005 }
4006
4007 info->testing_irq = FALSE;
4008
4009 spin_lock_irqsave(&info->lock,flags);
4010 reset_device(info);
4011 spin_unlock_irqrestore(&info->lock,flags);
4012
4013 return info->irq_occurred ? TRUE : FALSE;
4014}
4015
cdaad343 4016static int adapter_test(MGSLPC_INFO *info)
1da177e4
LT		 4017{
4018 if (!register_test(info)) {
4019 info->init_error = DiagStatus_AddressFailure;
4020 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4021 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4022 return -ENODEV;
4023 }
4024
4025 if (!irq_test(info)) {
4026 info->init_error = DiagStatus_IrqFailure;
4027 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4028 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4029 return -ENODEV;
4030 }
4031
4032 if (debug_level >= DEBUG_LEVEL_INFO)
4033 printk("%s(%d):device %s passed diagnostics\n",
4034 __FILE__,__LINE__,info->device_name);
4035 return 0;
4036}
4037
cdaad343 4038static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
1da177e4
LT		 4039{
4040 int i;
4041 int linecount;
4042 if (xmit)
4043 printk("%s tx data:\n",info->device_name);
4044 else
4045 printk("%s rx data:\n",info->device_name);
4046
4047 while(count) {
4048 if (count > 16)
4049 linecount = 16;
4050 else
4051 linecount = count;
4052
4053 for(i=0;i<linecount;i++)
4054 printk("%02X ",(unsigned char)data[i]);
4055 for(;i<17;i++)
4056 printk(" ");
4057 for(i=0;i<linecount;i++) {
4058 if (data[i]>=040 && data[i]<=0176)
4059 printk("%c",data[i]);
4060 else
4061 printk(".");
4062 }
4063 printk("\n");
4064
4065 data += linecount;
4066 count -= linecount;
4067 }
4068}
4069
4070/* HDLC frame time out
4071 * update stats and do tx completion processing
4072 */
cdaad343 4073static void tx_timeout(unsigned long context)
1da177e4
LT		 4074{
4075 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4076 unsigned long flags;
4077
4078 if ( debug_level >= DEBUG_LEVEL_INFO )
4079 printk( "%s(%d):tx_timeout(%s)\n",
4080 __FILE__,__LINE__,info->device_name);
4081 if(info->tx_active &&
4082 info->params.mode == MGSL_MODE_HDLC) {
4083 info->icount.txtimeout++;
4084 }
4085 spin_lock_irqsave(&info->lock,flags);
4086 info->tx_active = 0;
4087 info->tx_count = info->tx_put = info->tx_get = 0;
4088
4089 spin_unlock_irqrestore(&info->lock,flags);
4090
af69c7f9 4091#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 4092 if (info->netcount)
4093 hdlcdev_tx_done(info);
4094 else
4095#endif
4096 bh_transmit(info);
4097}
4098
af69c7f9 4099#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 4100
4101/**
4102 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4103 * set encoding and frame check sequence (FCS) options
4104 *
4105 * dev pointer to network device structure
4106 * encoding serial encoding setting
4107 * parity FCS setting
4108 *
4109 * returns 0 if success, otherwise error code
4110 */
4111static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4112 unsigned short parity)
4113{
4114 MGSLPC_INFO *info = dev_to_port(dev);
4115 unsigned char new_encoding;
4116 unsigned short new_crctype;
4117
4118 /* return error if TTY interface open */
4119 if (info->count)
4120 return -EBUSY;
4121
4122 switch (encoding)
4123 {
4124 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4125 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4126 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4127 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4128 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4129 default: return -EINVAL;
4130 }
4131
4132 switch (parity)
4133 {
4134 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4135 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4136 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4137 default: return -EINVAL;
4138 }
4139
4140 info->params.encoding = new_encoding;
53b3531b 4141 info->params.crc_type = new_crctype;
1da177e4
LT		 4142
4143 /* if network interface up, reprogram hardware */
4144 if (info->netcount)
4145 mgslpc_program_hw(info);
4146
4147 return 0;
4148}
4149
4150/**
4151 * called by generic HDLC layer to send frame
4152 *
4153 * skb socket buffer containing HDLC frame
4154 * dev pointer to network device structure
4155 *
4156 * returns 0 if success, otherwise error code
4157 */
4158static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4159{
4160 MGSLPC_INFO *info = dev_to_port(dev);
4161 struct net_device_stats *stats = hdlc_stats(dev);
4162 unsigned long flags;
4163
4164 if (debug_level >= DEBUG_LEVEL_INFO)
4165 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4166
4167 /* stop sending until this frame completes */
4168 netif_stop_queue(dev);
4169
4170 /* copy data to device buffers */
d626f62b 4171 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
1da177e4
LT		 4172 info->tx_get = 0;
4173 info->tx_put = info->tx_count = skb->len;
4174
4175 /* update network statistics */
4176 stats->tx_packets++;
4177 stats->tx_bytes += skb->len;
4178
4179 /* done with socket buffer, so free it */
4180 dev_kfree_skb(skb);
4181
4182 /* save start time for transmit timeout detection */
4183 dev->trans_start = jiffies;
4184
4185 /* start hardware transmitter if necessary */
4186 spin_lock_irqsave(&info->lock,flags);
4187 if (!info->tx_active)
4188 tx_start(info);
4189 spin_unlock_irqrestore(&info->lock,flags);
4190
4191 return 0;
4192}
4193
4194/**
4195 * called by network layer when interface enabled
4196 * claim resources and initialize hardware
4197 *
4198 * dev pointer to network device structure
4199 *
4200 * returns 0 if success, otherwise error code
4201 */
4202static int hdlcdev_open(struct net_device *dev)
4203{
4204 MGSLPC_INFO *info = dev_to_port(dev);
4205 int rc;
4206 unsigned long flags;
4207
4208 if (debug_level >= DEBUG_LEVEL_INFO)
4209 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4210
4211 /* generic HDLC layer open processing */
4212 if ((rc = hdlc_open(dev)))
4213 return rc;
4214
4215 /* arbitrate between network and tty opens */
4216 spin_lock_irqsave(&info->netlock, flags);
4217 if (info->count != 0 || info->netcount != 0) {
4218 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4219 spin_unlock_irqrestore(&info->netlock, flags);
4220 return -EBUSY;
4221 }
4222 info->netcount=1;
4223 spin_unlock_irqrestore(&info->netlock, flags);
4224
4225 /* claim resources and init adapter */
4226 if ((rc = startup(info)) != 0) {
4227 spin_lock_irqsave(&info->netlock, flags);
4228 info->netcount=0;
4229 spin_unlock_irqrestore(&info->netlock, flags);
4230 return rc;
4231 }
4232
4233 /* assert DTR and RTS, apply hardware settings */
4234 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4235 mgslpc_program_hw(info);
4236
4237 /* enable network layer transmit */
4238 dev->trans_start = jiffies;
4239 netif_start_queue(dev);
4240
4241 /* inform generic HDLC layer of current DCD status */
4242 spin_lock_irqsave(&info->lock, flags);
4243 get_signals(info);
4244 spin_unlock_irqrestore(&info->lock, flags);
fbeff3c1
KH		 4245 if (info->serial_signals & SerialSignal_DCD)
4246 netif_carrier_on(dev);
4247 else
4248 netif_carrier_off(dev);
1da177e4
LT		 4249 return 0;
4250}
4251
4252/**
4253 * called by network layer when interface is disabled
4254 * shutdown hardware and release resources
4255 *
4256 * dev pointer to network device structure
4257 *
4258 * returns 0 if success, otherwise error code
4259 */
4260static int hdlcdev_close(struct net_device *dev)
4261{
4262 MGSLPC_INFO *info = dev_to_port(dev);
4263 unsigned long flags;
4264
4265 if (debug_level >= DEBUG_LEVEL_INFO)
4266 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4267
4268 netif_stop_queue(dev);
4269
4270 /* shutdown adapter and release resources */
4271 shutdown(info);
4272
4273 hdlc_close(dev);
4274
4275 spin_lock_irqsave(&info->netlock, flags);
4276 info->netcount=0;
4277 spin_unlock_irqrestore(&info->netlock, flags);
4278
4279 return 0;
4280}
4281
4282/**
4283 * called by network layer to process IOCTL call to network device
4284 *
4285 * dev pointer to network device structure
4286 * ifr pointer to network interface request structure
4287 * cmd IOCTL command code
4288 *
4289 * returns 0 if success, otherwise error code
4290 */
4291static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4292{
4293 const size_t size = sizeof(sync_serial_settings);
4294 sync_serial_settings new_line;
4295 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4296 MGSLPC_INFO *info = dev_to_port(dev);
4297 unsigned int flags;
4298
4299 if (debug_level >= DEBUG_LEVEL_INFO)
4300 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4301
4302 /* return error if TTY interface open */
4303 if (info->count)
4304 return -EBUSY;
4305
4306 if (cmd != SIOCWANDEV)
4307 return hdlc_ioctl(dev, ifr, cmd);
4308
4309 switch(ifr->ifr_settings.type) {
4310 case IF_GET_IFACE: /* return current sync_serial_settings */
4311
4312 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4313 if (ifr->ifr_settings.size < size) {
4314 ifr->ifr_settings.size = size; /* data size wanted */
4315 return -ENOBUFS;
4316 }
4317
4318 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4319 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4320 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4321 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4322
4323 switch (flags){
4324 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4325 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4326 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4327 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4328 default: new_line.clock_type = CLOCK_DEFAULT;
4329 }
4330
4331 new_line.clock_rate = info->params.clock_speed;
4332 new_line.loopback = info->params.loopback ? 1:0;
4333
4334 if (copy_to_user(line, &new_line, size))
4335 return -EFAULT;
4336 return 0;
4337
4338 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4339
4340 if(!capable(CAP_NET_ADMIN))
4341 return -EPERM;
4342 if (copy_from_user(&new_line, line, size))
4343 return -EFAULT;
4344
4345 switch (new_line.clock_type)
4346 {
4347 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4348 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4349 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4350 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4351 case CLOCK_DEFAULT: flags = info->params.flags &
4352 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4353 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4354 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4355 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4356 default: return -EINVAL;
4357 }
4358
4359 if (new_line.loopback != 0 && new_line.loopback != 1)
4360 return -EINVAL;
4361
4362 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4363 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4364 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4365 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4366 info->params.flags |= flags;
4367
4368 info->params.loopback = new_line.loopback;
4369
4370 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4371 info->params.clock_speed = new_line.clock_rate;
4372 else
4373 info->params.clock_speed = 0;
4374
4375 /* if network interface up, reprogram hardware */
4376 if (info->netcount)
4377 mgslpc_program_hw(info);
4378 return 0;
4379
4380 default:
4381 return hdlc_ioctl(dev, ifr, cmd);
4382 }
4383}
4384
4385/**
4386 * called by network layer when transmit timeout is detected
4387 *
4388 * dev pointer to network device structure
4389 */
4390static void hdlcdev_tx_timeout(struct net_device *dev)
4391{
4392 MGSLPC_INFO *info = dev_to_port(dev);
4393 struct net_device_stats *stats = hdlc_stats(dev);
4394 unsigned long flags;
4395
4396 if (debug_level >= DEBUG_LEVEL_INFO)
4397 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4398
4399 stats->tx_errors++;
4400 stats->tx_aborted_errors++;
4401
4402 spin_lock_irqsave(&info->lock,flags);
4403 tx_stop(info);
4404 spin_unlock_irqrestore(&info->lock,flags);
4405
4406 netif_wake_queue(dev);
4407}
4408
4409/**
4410 * called by device driver when transmit completes
4411 * reenable network layer transmit if stopped
4412 *
4413 * info pointer to device instance information
4414 */
4415static void hdlcdev_tx_done(MGSLPC_INFO *info)
4416{
4417 if (netif_queue_stopped(info->netdev))
4418 netif_wake_queue(info->netdev);
4419}
4420
4421/**
4422 * called by device driver when frame received
4423 * pass frame to network layer
4424 *
4425 * info pointer to device instance information
4426 * buf pointer to buffer contianing frame data
4427 * size count of data bytes in buf
4428 */
4429static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4430{
4431 struct sk_buff *skb = dev_alloc_skb(size);
4432 struct net_device *dev = info->netdev;
4433 struct net_device_stats *stats = hdlc_stats(dev);
4434
4435 if (debug_level >= DEBUG_LEVEL_INFO)
4436 printk("hdlcdev_rx(%s)\n",dev->name);
4437
4438 if (skb == NULL) {
4439 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4440 stats->rx_dropped++;
4441 return;
4442 }
4443
4444 memcpy(skb_put(skb, size),buf,size);
4445
4446 skb->protocol = hdlc_type_trans(skb, info->netdev);
4447
4448 stats->rx_packets++;
4449 stats->rx_bytes += size;
4450
4451 netif_rx(skb);
4452
4453 info->netdev->last_rx = jiffies;
4454}
4455
4456/**
4457 * called by device driver when adding device instance
4458 * do generic HDLC initialization
4459 *
4460 * info pointer to device instance information
4461 *
4462 * returns 0 if success, otherwise error code
4463 */
4464static int hdlcdev_init(MGSLPC_INFO *info)
4465{
4466 int rc;
4467 struct net_device *dev;
4468 hdlc_device *hdlc;
4469
4470 /* allocate and initialize network and HDLC layer objects */
4471
4472 if (!(dev = alloc_hdlcdev(info))) {
4473 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4474 return -ENOMEM;
4475 }
4476
4477 /* for network layer reporting purposes only */
4478 dev->base_addr = info->io_base;
4479 dev->irq = info->irq_level;
4480
4481 /* network layer callbacks and settings */
4482 dev->do_ioctl = hdlcdev_ioctl;
4483 dev->open = hdlcdev_open;
4484 dev->stop = hdlcdev_close;
4485 dev->tx_timeout = hdlcdev_tx_timeout;
4486 dev->watchdog_timeo = 10*HZ;
4487 dev->tx_queue_len = 50;
4488
4489 /* generic HDLC layer callbacks and settings */
4490 hdlc = dev_to_hdlc(dev);
4491 hdlc->attach = hdlcdev_attach;
4492 hdlc->xmit = hdlcdev_xmit;
4493
4494 /* register objects with HDLC layer */
4495 if ((rc = register_hdlc_device(dev))) {
4496 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4497 free_netdev(dev);
4498 return rc;
4499 }
4500
4501 info->netdev = dev;
4502 return 0;
4503}
4504
4505/**
4506 * called by device driver when removing device instance
4507 * do generic HDLC cleanup
4508 *
4509 * info pointer to device instance information
4510 */
4511static void hdlcdev_exit(MGSLPC_INFO *info)
4512{
4513 unregister_hdlc_device(info->netdev);
4514 free_netdev(info->netdev);
4515 info->netdev = NULL;
4516}
4517
4518#endif /* CONFIG_HDLC */
4519
Linux kernel - Deliverables
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