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get rid of NR_OPEN and introduce a sysctl_nr_open
[deliverable/linux.git] / drivers / char / pcmcia / synclink_cs.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
a7482a2e 4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
1da177e4
LT		 5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30#if defined(__i386__)
31# define BREAKPOINT() asm(" int $3");
32#else
33# define BREAKPOINT() { }
34#endif
35
36#define MAX_DEVICE_COUNT 4
37
1da177e4
LT		 38#include <linux/module.h>
39#include <linux/errno.h>
40#include <linux/signal.h>
41#include <linux/sched.h>
42#include <linux/timer.h>
43#include <linux/time.h>
44#include <linux/interrupt.h>
1da177e4
LT		 45#include <linux/tty.h>
46#include <linux/tty_flip.h>
47#include <linux/serial.h>
48#include <linux/major.h>
49#include <linux/string.h>
50#include <linux/fcntl.h>
51#include <linux/ptrace.h>
52#include <linux/ioport.h>
53#include <linux/mm.h>
54#include <linux/slab.h>
55#include <linux/netdevice.h>
56#include <linux/vmalloc.h>
57#include <linux/init.h>
1da177e4
LT		 58#include <linux/delay.h>
59#include <linux/ioctl.h>
60
61#include <asm/system.h>
62#include <asm/io.h>
63#include <asm/irq.h>
64#include <asm/dma.h>
65#include <linux/bitops.h>
66#include <asm/types.h>
67#include <linux/termios.h>
68#include <linux/workqueue.h>
69#include <linux/hdlc.h>
70
1da177e4
LT		 71#include <pcmcia/cs_types.h>
72#include <pcmcia/cs.h>
73#include <pcmcia/cistpl.h>
74#include <pcmcia/cisreg.h>
75#include <pcmcia/ds.h>
76
af69c7f9
PF		 77#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
78#define SYNCLINK_GENERIC_HDLC 1
79#else
80#define SYNCLINK_GENERIC_HDLC 0
1da177e4
LT		 81#endif
82
83#define GET_USER(error,value,addr) error = get_user(value,addr)
84#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
85#define PUT_USER(error,value,addr) error = put_user(value,addr)
86#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
87
88#include <asm/uaccess.h>
89
90#include "linux/synclink.h"
91
92static MGSL_PARAMS default_params = {
93 MGSL_MODE_HDLC, /* unsigned long mode */
94 0, /* unsigned char loopback; */
95 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
96 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
97 0, /* unsigned long clock_speed; */
98 0xff, /* unsigned char addr_filter; */
99 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
100 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
101 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
102 9600, /* unsigned long data_rate; */
103 8, /* unsigned char data_bits; */
104 1, /* unsigned char stop_bits; */
105 ASYNC_PARITY_NONE /* unsigned char parity; */
106};
107
108typedef struct
109{
110 int count;
111 unsigned char status;
112 char data[1];
113} RXBUF;
114
115/* The queue of BH actions to be performed */
116
117#define BH_RECEIVE 1
118#define BH_TRANSMIT 2
119#define BH_STATUS 4
120
121#define IO_PIN_SHUTDOWN_LIMIT 100
122
123#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
124
125struct _input_signal_events {
d12341f9 126 int ri_up;
1da177e4
LT		 127 int ri_down;
128 int dsr_up;
129 int dsr_down;
130 int dcd_up;
131 int dcd_down;
132 int cts_up;
133 int cts_down;
134};
135
136
137/*
138 * Device instance data structure
139 */
d12341f9 140
1da177e4
LT		 141typedef struct _mgslpc_info {
142 void *if_ptr; /* General purpose pointer (used by SPPP) */
143 int magic;
144 int flags;
145 int count; /* count of opens */
146 int line;
147 unsigned short close_delay;
148 unsigned short closing_wait; /* time to wait before closing */
d12341f9 149
1da177e4 150 struct mgsl_icount icount;
d12341f9 151
1da177e4
LT		 152 struct tty_struct *tty;
153 int timeout;
154 int x_char; /* xon/xoff character */
155 int blocked_open; /* # of blocked opens */
156 unsigned char read_status_mask;
d12341f9 157 unsigned char ignore_status_mask;
1da177e4
LT		 158
159 unsigned char *tx_buf;
160 int tx_put;
161 int tx_get;
162 int tx_count;
163
164 /* circular list of fixed length rx buffers */
165
166 unsigned char *rx_buf; /* memory allocated for all rx buffers */
167 int rx_buf_total_size; /* size of memory allocated for rx buffers */
168 int rx_put; /* index of next empty rx buffer */
169 int rx_get; /* index of next full rx buffer */
170 int rx_buf_size; /* size in bytes of single rx buffer */
171 int rx_buf_count; /* total number of rx buffers */
172 int rx_frame_count; /* number of full rx buffers */
d12341f9 173
1da177e4
LT		 174 wait_queue_head_t open_wait;
175 wait_queue_head_t close_wait;
d12341f9 176
1da177e4
LT		 177 wait_queue_head_t status_event_wait_q;
178 wait_queue_head_t event_wait_q;
179 struct timer_list tx_timer; /* HDLC transmit timeout timer */
180 struct _mgslpc_info *next_device; /* device list link */
181
182 unsigned short imra_value;
183 unsigned short imrb_value;
184 unsigned char pim_value;
185
186 spinlock_t lock;
187 struct work_struct task; /* task structure for scheduling bh */
188
189 u32 max_frame_size;
190
191 u32 pending_bh;
192
193 int bh_running;
194 int bh_requested;
d12341f9 195
1da177e4
LT		 196 int dcd_chkcount; /* check counts to prevent */
197 int cts_chkcount; /* too many IRQs if a signal */
198 int dsr_chkcount; /* is floating */
199 int ri_chkcount;
200
201 int rx_enabled;
202 int rx_overflow;
203
204 int tx_enabled;
205 int tx_active;
206 int tx_aborting;
207 u32 idle_mode;
208
209 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
210
211 char device_name[25]; /* device instance name */
212
213 unsigned int io_base; /* base I/O address of adapter */
214 unsigned int irq_level;
d12341f9 215
1da177e4
LT		 216 MGSL_PARAMS params; /* communications parameters */
217
218 unsigned char serial_signals; /* current serial signal states */
219
220 char irq_occurred; /* for diagnostics use */
221 char testing_irq;
222 unsigned int init_error; /* startup error (DIAGS) */
223
224 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
225 BOOLEAN drop_rts_on_tx_done;
226
227 struct _input_signal_events input_signal_events;
228
229 /* PCMCIA support */
fd238232 230 struct pcmcia_device *p_dev;
1da177e4
LT		 231 dev_node_t node;
232 int stop;
233
234 /* SPPP/Cisco HDLC device parts */
235 int netcount;
236 int dosyncppp;
237 spinlock_t netlock;
238
af69c7f9 239#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 240 struct net_device *netdev;
241#endif
242
243} MGSLPC_INFO;
244
245#define MGSLPC_MAGIC 0x5402
246
247/*
248 * The size of the serial xmit buffer is 1 page, or 4096 bytes
249 */
250#define TXBUFSIZE 4096
251
d12341f9 252
1da177e4
LT		 253#define CHA 0x00 /* channel A offset */
254#define CHB 0x40 /* channel B offset */
255
256/*
257 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
258 */
259#undef PVR
260
261#define RXFIFO 0
262#define TXFIFO 0
263#define STAR 0x20
264#define CMDR 0x20
265#define RSTA 0x21
266#define PRE 0x21
267#define MODE 0x22
268#define TIMR 0x23
269#define XAD1 0x24
270#define XAD2 0x25
271#define RAH1 0x26
272#define RAH2 0x27
273#define DAFO 0x27
274#define RAL1 0x28
275#define RFC 0x28
276#define RHCR 0x29
277#define RAL2 0x29
278#define RBCL 0x2a
279#define XBCL 0x2a
280#define RBCH 0x2b
281#define XBCH 0x2b
282#define CCR0 0x2c
283#define CCR1 0x2d
284#define CCR2 0x2e
285#define CCR3 0x2f
286#define VSTR 0x34
287#define BGR 0x34
288#define RLCR 0x35
289#define AML 0x36
290#define AMH 0x37
291#define GIS 0x38
292#define IVA 0x38
293#define IPC 0x39
294#define ISR 0x3a
295#define IMR 0x3a
296#define PVR 0x3c
297#define PIS 0x3d
298#define PIM 0x3d
299#define PCR 0x3e
300#define CCR4 0x3f
d12341f9 301
1da177e4 302// IMR/ISR
d12341f9 303
1da177e4
LT		 304#define IRQ_BREAK_ON BIT15 // rx break detected
305#define IRQ_DATAOVERRUN BIT14 // receive data overflow
306#define IRQ_ALLSENT BIT13 // all sent
307#define IRQ_UNDERRUN BIT12 // transmit data underrun
308#define IRQ_TIMER BIT11 // timer interrupt
309#define IRQ_CTS BIT10 // CTS status change
310#define IRQ_TXREPEAT BIT9 // tx message repeat
311#define IRQ_TXFIFO BIT8 // transmit pool ready
312#define IRQ_RXEOM BIT7 // receive message end
313#define IRQ_EXITHUNT BIT6 // receive frame start
314#define IRQ_RXTIME BIT6 // rx char timeout
315#define IRQ_DCD BIT2 // carrier detect status change
316#define IRQ_OVERRUN BIT1 // receive frame overflow
317#define IRQ_RXFIFO BIT0 // receive pool full
d12341f9 318
1da177e4 319// STAR
d12341f9 320
1da177e4
LT		 321#define XFW BIT6 // transmit FIFO write enable
322#define CEC BIT2 // command executing
323#define CTS BIT1 // CTS state
d12341f9 324
1da177e4
LT		 325#define PVR_DTR BIT0
326#define PVR_DSR BIT1
327#define PVR_RI BIT2
328#define PVR_AUTOCTS BIT3
329#define PVR_RS232 0x20 /* 0010b */
330#define PVR_V35 0xe0 /* 1110b */
331#define PVR_RS422 0x40 /* 0100b */
d12341f9
JG		 332
333/* Register access functions */
334
1da177e4
LT		 335#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
336#define read_reg(info, reg) inb((info)->io_base + (reg))
337
d12341f9 338#define read_reg16(info, reg) inw((info)->io_base + (reg))
1da177e4 339#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
d12341f9 340
1da177e4
LT		 341#define set_reg_bits(info, reg, mask) \
342 write_reg(info, (reg), \
d12341f9 343 (unsigned char) (read_reg(info, (reg)) | (mask)))
1da177e4
LT		 344#define clear_reg_bits(info, reg, mask) \
345 write_reg(info, (reg), \
d12341f9 346 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
1da177e4
LT		 347/*
348 * interrupt enable/disable routines
d12341f9
JG		 349 */
350static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
1da177e4
LT		 351{
352 if (channel == CHA) {
353 info->imra_value |= mask;
354 write_reg16(info, CHA + IMR, info->imra_value);
355 } else {
356 info->imrb_value |= mask;
357 write_reg16(info, CHB + IMR, info->imrb_value);
358 }
359}
d12341f9 360static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
1da177e4
LT		 361{
362 if (channel == CHA) {
363 info->imra_value &= ~mask;
364 write_reg16(info, CHA + IMR, info->imra_value);
365 } else {
366 info->imrb_value &= ~mask;
367 write_reg16(info, CHB + IMR, info->imrb_value);
368 }
369}
370
371#define port_irq_disable(info, mask) \
372 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
373
374#define port_irq_enable(info, mask) \
375 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
376
377static void rx_start(MGSLPC_INFO *info);
378static void rx_stop(MGSLPC_INFO *info);
379
380static void tx_start(MGSLPC_INFO *info);
381static void tx_stop(MGSLPC_INFO *info);
382static void tx_set_idle(MGSLPC_INFO *info);
383
384static void get_signals(MGSLPC_INFO *info);
385static void set_signals(MGSLPC_INFO *info);
386
387static void reset_device(MGSLPC_INFO *info);
388
389static void hdlc_mode(MGSLPC_INFO *info);
390static void async_mode(MGSLPC_INFO *info);
391
392static void tx_timeout(unsigned long context);
393
394static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
395
af69c7f9 396#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 397#define dev_to_port(D) (dev_to_hdlc(D)->priv)
398static void hdlcdev_tx_done(MGSLPC_INFO *info);
399static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
400static int hdlcdev_init(MGSLPC_INFO *info);
401static void hdlcdev_exit(MGSLPC_INFO *info);
402#endif
403
404static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
405
406static BOOLEAN register_test(MGSLPC_INFO *info);
407static BOOLEAN irq_test(MGSLPC_INFO *info);
408static int adapter_test(MGSLPC_INFO *info);
409
410static int claim_resources(MGSLPC_INFO *info);
411static void release_resources(MGSLPC_INFO *info);
412static void mgslpc_add_device(MGSLPC_INFO *info);
413static void mgslpc_remove_device(MGSLPC_INFO *info);
414
415static int rx_get_frame(MGSLPC_INFO *info);
416static void rx_reset_buffers(MGSLPC_INFO *info);
417static int rx_alloc_buffers(MGSLPC_INFO *info);
418static void rx_free_buffers(MGSLPC_INFO *info);
419
7d12e780 420static irqreturn_t mgslpc_isr(int irq, void *dev_id);
1da177e4
LT		 421
422/*
423 * Bottom half interrupt handlers
424 */
c4028958 425static void bh_handler(struct work_struct *work);
1da177e4
LT		 426static void bh_transmit(MGSLPC_INFO *info);
427static void bh_status(MGSLPC_INFO *info);
428
429/*
430 * ioctl handlers
431 */
432static int tiocmget(struct tty_struct *tty, struct file *file);
433static int tiocmset(struct tty_struct *tty, struct file *file,
434 unsigned int set, unsigned int clear);
435static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
436static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
437static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
438static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
439static int set_txidle(MGSLPC_INFO *info, int idle_mode);
440static int set_txenable(MGSLPC_INFO *info, int enable);
441static int tx_abort(MGSLPC_INFO *info);
442static int set_rxenable(MGSLPC_INFO *info, int enable);
443static int wait_events(MGSLPC_INFO *info, int __user *mask);
444
445static MGSLPC_INFO *mgslpc_device_list = NULL;
446static int mgslpc_device_count = 0;
447
448/*
449 * Set this param to non-zero to load eax with the
450 * .text section address and breakpoint on module load.
451 * This is useful for use with gdb and add-symbol-file command.
452 */
453static int break_on_load=0;
454
455/*
456 * Driver major number, defaults to zero to get auto
457 * assigned major number. May be forced as module parameter.
458 */
459static int ttymajor=0;
460
461static int debug_level = 0;
462static int maxframe[MAX_DEVICE_COUNT] = {0,};
463static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
464
465module_param(break_on_load, bool, 0);
466module_param(ttymajor, int, 0);
467module_param(debug_level, int, 0);
468module_param_array(maxframe, int, NULL, 0);
469module_param_array(dosyncppp, int, NULL, 0);
470
471MODULE_LICENSE("GPL");
472
473static char *driver_name = "SyncLink PC Card driver";
a7482a2e 474static char *driver_version = "$Revision: 4.34 $";
1da177e4
LT		 475
476static struct tty_driver *serial_driver;
477
478/* number of characters left in xmit buffer before we ask for more */
479#define WAKEUP_CHARS 256
480
481static void mgslpc_change_params(MGSLPC_INFO *info);
482static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
483
484/* PCMCIA prototypes */
485
15b99ac1 486static int mgslpc_config(struct pcmcia_device *link);
1da177e4 487static void mgslpc_release(u_long arg);
cc3b4866 488static void mgslpc_detach(struct pcmcia_device *p_dev);
1da177e4 489
1da177e4
LT		 490/*
491 * 1st function defined in .text section. Calling this function in
492 * init_module() followed by a breakpoint allows a remote debugger
493 * (gdb) to get the .text address for the add-symbol-file command.
494 * This allows remote debugging of dynamically loadable modules.
495 */
496static void* mgslpc_get_text_ptr(void)
497{
498 return mgslpc_get_text_ptr;
499}
500
501/**
502 * line discipline callback wrappers
503 *
504 * The wrappers maintain line discipline references
505 * while calling into the line discipline.
506 *
507 * ldisc_flush_buffer - flush line discipline receive buffers
508 * ldisc_receive_buf - pass receive data to line discipline
509 */
510
511static void ldisc_flush_buffer(struct tty_struct *tty)
512{
513 struct tty_ldisc *ld = tty_ldisc_ref(tty);
514 if (ld) {
515 if (ld->flush_buffer)
516 ld->flush_buffer(tty);
517 tty_ldisc_deref(ld);
518 }
519}
520
521static void ldisc_receive_buf(struct tty_struct *tty,
522 const __u8 *data, char *flags, int count)
523{
524 struct tty_ldisc *ld;
525 if (!tty)
526 return;
527 ld = tty_ldisc_ref(tty);
528 if (ld) {
529 if (ld->receive_buf)
530 ld->receive_buf(tty, data, flags, count);
531 tty_ldisc_deref(ld);
532 }
533}
534
15b99ac1 535static int mgslpc_probe(struct pcmcia_device *link)
1da177e4
LT		 536{
537 MGSLPC_INFO *info;
15b99ac1 538 int ret;
fd238232 539
1da177e4
LT		 540 if (debug_level >= DEBUG_LEVEL_INFO)
541 printk("mgslpc_attach\n");
fd238232 542
dd00cc48 543 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
1da177e4
LT		 544 if (!info) {
545 printk("Error can't allocate device instance data\n");
f8cfa618 546 return -ENOMEM;
1da177e4
LT		 547 }
548
1da177e4 549 info->magic = MGSLPC_MAGIC;
c4028958 550 INIT_WORK(&info->task, bh_handler);
1da177e4
LT		 551 info->max_frame_size = 4096;
552 info->close_delay = 5*HZ/10;
553 info->closing_wait = 30*HZ;
554 init_waitqueue_head(&info->open_wait);
555 init_waitqueue_head(&info->close_wait);
556 init_waitqueue_head(&info->status_event_wait_q);
557 init_waitqueue_head(&info->event_wait_q);
558 spin_lock_init(&info->lock);
559 spin_lock_init(&info->netlock);
560 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
d12341f9 561 info->idle_mode = HDLC_TXIDLE_FLAGS;
1da177e4
LT		 562 info->imra_value = 0xffff;
563 info->imrb_value = 0xffff;
564 info->pim_value = 0xff;
565
fba395ee 566 info->p_dev = link;
1da177e4 567 link->priv = info;
fd238232 568
fba395ee 569 /* Initialize the struct pcmcia_device structure */
1da177e4
LT		 570
571 /* Interrupt setup */
572 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
0c7ab676 573 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
1da177e4 574 link->irq.Handler = NULL;
fd238232 575
1da177e4 576 link->conf.Attributes = 0;
1da177e4
LT		 577 link->conf.IntType = INT_MEMORY_AND_IO;
578
15b99ac1
DB		 579 ret = mgslpc_config(link);
580 if (ret)
581 return ret;
1da177e4
LT		 582
583 mgslpc_add_device(info);
584
f8cfa618 585 return 0;
1da177e4
LT		 586}
587
588/* Card has been inserted.
589 */
590
591#define CS_CHECK(fn, ret) \
592do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
593
15b99ac1 594static int mgslpc_config(struct pcmcia_device *link)
1da177e4 595{
1da177e4
LT		 596 MGSLPC_INFO *info = link->priv;
597 tuple_t tuple;
598 cisparse_t parse;
599 int last_fn, last_ret;
600 u_char buf[64];
1da177e4
LT		 601 cistpl_cftable_entry_t dflt = { 0 };
602 cistpl_cftable_entry_t *cfg;
d12341f9 603
1da177e4
LT		 604 if (debug_level >= DEBUG_LEVEL_INFO)
605 printk("mgslpc_config(0x%p)\n", link);
606
1da177e4
LT		 607 tuple.Attributes = 0;
608 tuple.TupleData = buf;
609 tuple.TupleDataMax = sizeof(buf);
610 tuple.TupleOffset = 0;
1da177e4 611
1da177e4
LT		 612 /* get CIS configuration entry */
613
614 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
fba395ee 615 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
1da177e4
LT		 616
617 cfg = &(parse.cftable_entry);
fba395ee
DB		 618 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
619 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
1da177e4
LT		 620
621 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
622 if (cfg->index == 0)
623 goto cs_failed;
624
625 link->conf.ConfigIndex = cfg->index;
626 link->conf.Attributes |= CONF_ENABLE_IRQ;
d12341f9 627
1da177e4
LT		 628 /* IO window settings */
629 link->io.NumPorts1 = 0;
630 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
631 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
632 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
633 if (!(io->flags & CISTPL_IO_8BIT))
634 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
635 if (!(io->flags & CISTPL_IO_16BIT))
636 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
637 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
638 link->io.BasePort1 = io->win[0].base;
639 link->io.NumPorts1 = io->win[0].len;
fba395ee 640 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
1da177e4
LT		 641 }
642
643 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 644 link->conf.IntType = INT_MEMORY_AND_IO;
645 link->conf.ConfigIndex = 8;
646 link->conf.Present = PRESENT_OPTION;
d12341f9 647
1da177e4
LT		 648 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
649 link->irq.Handler = mgslpc_isr;
650 link->irq.Instance = info;
fba395ee 651 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
1da177e4 652
fba395ee 653 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
1da177e4
LT		 654
655 info->io_base = link->io.BasePort1;
656 info->irq_level = link->irq.AssignedIRQ;
657
658 /* add to linked list of devices */
659 sprintf(info->node.dev_name, "mgslpc0");
660 info->node.major = info->node.minor = 0;
fd238232 661 link->dev_node = &info->node;
1da177e4
LT		 662
663 printk(KERN_INFO "%s: index 0x%02x:",
664 info->node.dev_name, link->conf.ConfigIndex);
665 if (link->conf.Attributes & CONF_ENABLE_IRQ)
666 printk(", irq %d", link->irq.AssignedIRQ);
667 if (link->io.NumPorts1)
668 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
669 link->io.BasePort1+link->io.NumPorts1-1);
670 printk("\n");
15b99ac1 671 return 0;
1da177e4
LT		 672
673cs_failed:
fba395ee 674 cs_error(link, last_fn, last_ret);
1da177e4 675 mgslpc_release((u_long)link);
15b99ac1 676 return -ENODEV;
1da177e4
LT		 677}
678
679/* Card has been removed.
680 * Unregister device and release PCMCIA configuration.
681 * If device is open, postpone until it is closed.
682 */
683static void mgslpc_release(u_long arg)
684{
e2d40963 685 struct pcmcia_device *link = (struct pcmcia_device *)arg;
1da177e4 686
e2d40963
DB		 687 if (debug_level >= DEBUG_LEVEL_INFO)
688 printk("mgslpc_release(0x%p)\n", link);
1da177e4 689
e2d40963 690 pcmcia_disable_device(link);
1da177e4
LT		 691}
692
fba395ee 693static void mgslpc_detach(struct pcmcia_device *link)
1da177e4 694{
e2d40963
DB		 695 if (debug_level >= DEBUG_LEVEL_INFO)
696 printk("mgslpc_detach(0x%p)\n", link);
cc3b4866 697
e2d40963
DB		 698 ((MGSLPC_INFO *)link->priv)->stop = 1;
699 mgslpc_release((u_long)link);
1da177e4 700
e2d40963 701 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
1da177e4
LT		 702}
703
fba395ee 704static int mgslpc_suspend(struct pcmcia_device *link)
98e4c28b 705{
98e4c28b
DB		 706 MGSLPC_INFO *info = link->priv;
707
98e4c28b 708 info->stop = 1;
98e4c28b
DB		 709
710 return 0;
711}
712
fba395ee 713static int mgslpc_resume(struct pcmcia_device *link)
98e4c28b 714{
98e4c28b
DB		 715 MGSLPC_INFO *info = link->priv;
716
98e4c28b
DB		 717 info->stop = 0;
718
719 return 0;
720}
721
722
1da177e4
LT		 723static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
724 char *name, const char *routine)
725{
726#ifdef MGSLPC_PARANOIA_CHECK
727 static const char *badmagic =
728 "Warning: bad magic number for mgsl struct (%s) in %s\n";
729 static const char *badinfo =
730 "Warning: null mgslpc_info for (%s) in %s\n";
731
732 if (!info) {
733 printk(badinfo, name, routine);
734 return 1;
735 }
736 if (info->magic != MGSLPC_MAGIC) {
737 printk(badmagic, name, routine);
738 return 1;
739 }
740#else
741 if (!info)
742 return 1;
743#endif
744 return 0;
745}
746
747
748#define CMD_RXFIFO BIT7 // release current rx FIFO
749#define CMD_RXRESET BIT6 // receiver reset
750#define CMD_RXFIFO_READ BIT5
751#define CMD_START_TIMER BIT4
752#define CMD_TXFIFO BIT3 // release current tx FIFO
753#define CMD_TXEOM BIT1 // transmit end message
754#define CMD_TXRESET BIT0 // transmit reset
755
d12341f9 756static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
1da177e4
LT		 757{
758 int i = 0;
d12341f9 759 /* wait for command completion */
1da177e4
LT		 760 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
761 udelay(1);
762 if (i++ == 1000)
763 return FALSE;
764 }
765 return TRUE;
766}
767
d12341f9 768static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
1da177e4
LT		 769{
770 wait_command_complete(info, channel);
771 write_reg(info, (unsigned char) (channel + CMDR), cmd);
772}
773
774static void tx_pause(struct tty_struct *tty)
775{
776 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
777 unsigned long flags;
d12341f9 778
1da177e4
LT		 779 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
780 return;
781 if (debug_level >= DEBUG_LEVEL_INFO)
d12341f9
JG		 782 printk("tx_pause(%s)\n",info->device_name);
783
1da177e4
LT		 784 spin_lock_irqsave(&info->lock,flags);
785 if (info->tx_enabled)
786 tx_stop(info);
787 spin_unlock_irqrestore(&info->lock,flags);
788}
789
790static void tx_release(struct tty_struct *tty)
791{
792 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
793 unsigned long flags;
d12341f9 794
1da177e4
LT		 795 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
796 return;
797 if (debug_level >= DEBUG_LEVEL_INFO)
d12341f9
JG		 798 printk("tx_release(%s)\n",info->device_name);
799
1da177e4
LT		 800 spin_lock_irqsave(&info->lock,flags);
801 if (!info->tx_enabled)
802 tx_start(info);
803 spin_unlock_irqrestore(&info->lock,flags);
804}
805
806/* Return next bottom half action to perform.
807 * or 0 if nothing to do.
808 */
809static int bh_action(MGSLPC_INFO *info)
810{
811 unsigned long flags;
812 int rc = 0;
d12341f9 813
1da177e4
LT		 814 spin_lock_irqsave(&info->lock,flags);
815
816 if (info->pending_bh & BH_RECEIVE) {
817 info->pending_bh &= ~BH_RECEIVE;
818 rc = BH_RECEIVE;
819 } else if (info->pending_bh & BH_TRANSMIT) {
820 info->pending_bh &= ~BH_TRANSMIT;
821 rc = BH_TRANSMIT;
822 } else if (info->pending_bh & BH_STATUS) {
823 info->pending_bh &= ~BH_STATUS;
824 rc = BH_STATUS;
825 }
826
827 if (!rc) {
828 /* Mark BH routine as complete */
829 info->bh_running = 0;
830 info->bh_requested = 0;
831 }
d12341f9 832
1da177e4 833 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 834
1da177e4
LT		 835 return rc;
836}
837
c4028958 838static void bh_handler(struct work_struct *work)
1da177e4 839{
c4028958 840 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
1da177e4
LT		 841 int action;
842
843 if (!info)
844 return;
d12341f9 845
1da177e4
LT		 846 if (debug_level >= DEBUG_LEVEL_BH)
847 printk( "%s(%d):bh_handler(%s) entry\n",
848 __FILE__,__LINE__,info->device_name);
d12341f9 849
1da177e4
LT		 850 info->bh_running = 1;
851
852 while((action = bh_action(info)) != 0) {
d12341f9 853
1da177e4
LT		 854 /* Process work item */
855 if ( debug_level >= DEBUG_LEVEL_BH )
856 printk( "%s(%d):bh_handler() work item action=%d\n",
857 __FILE__,__LINE__,action);
858
859 switch (action) {
d12341f9 860
1da177e4
LT		 861 case BH_RECEIVE:
862 while(rx_get_frame(info));
863 break;
864 case BH_TRANSMIT:
865 bh_transmit(info);
866 break;
867 case BH_STATUS:
868 bh_status(info);
869 break;
870 default:
871 /* unknown work item ID */
872 printk("Unknown work item ID=%08X!\n", action);
873 break;
874 }
875 }
876
877 if (debug_level >= DEBUG_LEVEL_BH)
878 printk( "%s(%d):bh_handler(%s) exit\n",
879 __FILE__,__LINE__,info->device_name);
880}
881
cdaad343 882static void bh_transmit(MGSLPC_INFO *info)
1da177e4
LT		 883{
884 struct tty_struct *tty = info->tty;
885 if (debug_level >= DEBUG_LEVEL_BH)
886 printk("bh_transmit() entry on %s\n", info->device_name);
887
b963a844 888 if (tty)
1da177e4 889 tty_wakeup(tty);
1da177e4
LT		 890}
891
cdaad343 892static void bh_status(MGSLPC_INFO *info)
1da177e4
LT		 893{
894 info->ri_chkcount = 0;
895 info->dsr_chkcount = 0;
896 info->dcd_chkcount = 0;
897 info->cts_chkcount = 0;
898}
899
d12341f9 900/* eom: non-zero = end of frame */
1da177e4
LT		 901static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
902{
903 unsigned char data[2];
904 unsigned char fifo_count, read_count, i;
905 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
906
907 if (debug_level >= DEBUG_LEVEL_ISR)
908 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
d12341f9 909
1da177e4
LT		 910 if (!info->rx_enabled)
911 return;
912
913 if (info->rx_frame_count >= info->rx_buf_count) {
914 /* no more free buffers */
915 issue_command(info, CHA, CMD_RXRESET);
916 info->pending_bh |= BH_RECEIVE;
917 info->rx_overflow = 1;
918 info->icount.buf_overrun++;
919 return;
920 }
921
922 if (eom) {
d12341f9 923 /* end of frame, get FIFO count from RBCL register */
1da177e4
LT		 924 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
925 fifo_count = 32;
926 } else
927 fifo_count = 32;
d12341f9 928
1da177e4
LT		 929 do {
930 if (fifo_count == 1) {
931 read_count = 1;
932 data[0] = read_reg(info, CHA + RXFIFO);
933 } else {
934 read_count = 2;
935 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
936 }
937 fifo_count -= read_count;
938 if (!fifo_count && eom)
939 buf->status = data[--read_count];
940
941 for (i = 0; i < read_count; i++) {
942 if (buf->count >= info->max_frame_size) {
943 /* frame too large, reset receiver and reset current buffer */
944 issue_command(info, CHA, CMD_RXRESET);
945 buf->count = 0;
946 return;
947 }
948 *(buf->data + buf->count) = data[i];
949 buf->count++;
950 }
951 } while (fifo_count);
952
953 if (eom) {
954 info->pending_bh |= BH_RECEIVE;
955 info->rx_frame_count++;
956 info->rx_put++;
957 if (info->rx_put >= info->rx_buf_count)
958 info->rx_put = 0;
959 }
960 issue_command(info, CHA, CMD_RXFIFO);
961}
962
963static void rx_ready_async(MGSLPC_INFO *info, int tcd)
964{
33f0f88f 965 unsigned char data, status, flag;
1da177e4 966 int fifo_count;
33f0f88f 967 int work = 0;
1da177e4
LT		 968 struct tty_struct *tty = info->tty;
969 struct mgsl_icount *icount = &info->icount;
970
971 if (tcd) {
d12341f9 972 /* early termination, get FIFO count from RBCL register */
1da177e4
LT		 973 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
974
975 /* Zero fifo count could mean 0 or 32 bytes available.
976 * If BIT5 of STAR is set then at least 1 byte is available.
977 */
978 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
979 fifo_count = 32;
980 } else
981 fifo_count = 32;
33f0f88f
AC		 982
983 tty_buffer_request_room(tty, fifo_count);
d12341f9 984 /* Flush received async data to receive data buffer. */
1da177e4
LT		 985 while (fifo_count) {
986 data = read_reg(info, CHA + RXFIFO);
987 status = read_reg(info, CHA + RXFIFO);
988 fifo_count -= 2;
989
1da177e4 990 icount->rx++;
33f0f88f 991 flag = TTY_NORMAL;
1da177e4
LT		 992
993 // if no frameing/crc error then save data
994 // BIT7:parity error
995 // BIT6:framing error
996
997 if (status & (BIT7 + BIT6)) {
d12341f9 998 if (status & BIT7)
1da177e4
LT		 999 icount->parity++;
1000 else
1001 icount->frame++;
1002
1003 /* discard char if tty control flags say so */
1004 if (status & info->ignore_status_mask)
1005 continue;
d12341f9 1006
1da177e4
LT		 1007 status &= info->read_status_mask;
1008
1009 if (status & BIT7)
33f0f88f 1010 flag = TTY_PARITY;
1da177e4 1011 else if (status & BIT6)
33f0f88f 1012 flag = TTY_FRAME;
1da177e4 1013 }
33f0f88f 1014 work += tty_insert_flip_char(tty, data, flag);
1da177e4
LT		 1015 }
1016 issue_command(info, CHA, CMD_RXFIFO);
1017
1018 if (debug_level >= DEBUG_LEVEL_ISR) {
33f0f88f
AC		 1019 printk("%s(%d):rx_ready_async",
1020 __FILE__,__LINE__);
1da177e4
LT		 1021 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1022 __FILE__,__LINE__,icount->rx,icount->brk,
1023 icount->parity,icount->frame,icount->overrun);
1024 }
d12341f9 1025
33f0f88f 1026 if (work)
1da177e4
LT		 1027 tty_flip_buffer_push(tty);
1028}
1029
1030
1031static void tx_done(MGSLPC_INFO *info)
1032{
1033 if (!info->tx_active)
1034 return;
d12341f9 1035
1da177e4
LT		 1036 info->tx_active = 0;
1037 info->tx_aborting = 0;
1038
1039 if (info->params.mode == MGSL_MODE_ASYNC)
1040 return;
1041
1042 info->tx_count = info->tx_put = info->tx_get = 0;
d12341f9
JG		 1043 del_timer(&info->tx_timer);
1044
1da177e4
LT		 1045 if (info->drop_rts_on_tx_done) {
1046 get_signals(info);
1047 if (info->serial_signals & SerialSignal_RTS) {
1048 info->serial_signals &= ~SerialSignal_RTS;
1049 set_signals(info);
1050 }
1051 info->drop_rts_on_tx_done = 0;
1052 }
1053
af69c7f9 1054#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 1055 if (info->netcount)
1056 hdlcdev_tx_done(info);
d12341f9 1057 else
1da177e4
LT		 1058#endif
1059 {
1060 if (info->tty->stopped || info->tty->hw_stopped) {
1061 tx_stop(info);
1062 return;
1063 }
1064 info->pending_bh |= BH_TRANSMIT;
1065 }
1066}
1067
1068static void tx_ready(MGSLPC_INFO *info)
1069{
1070 unsigned char fifo_count = 32;
1071 int c;
1072
1073 if (debug_level >= DEBUG_LEVEL_ISR)
1074 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1075
1076 if (info->params.mode == MGSL_MODE_HDLC) {
1077 if (!info->tx_active)
1078 return;
1079 } else {
1080 if (info->tty->stopped || info->tty->hw_stopped) {
1081 tx_stop(info);
1082 return;
1083 }
1084 if (!info->tx_count)
1085 info->tx_active = 0;
1086 }
1087
1088 if (!info->tx_count)
1089 return;
1090
1091 while (info->tx_count && fifo_count) {
1092 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
d12341f9 1093
1da177e4
LT		 1094 if (c == 1) {
1095 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1096 } else {
1097 write_reg16(info, CHA + TXFIFO,
1098 *((unsigned short*)(info->tx_buf + info->tx_get)));
1099 }
1100 info->tx_count -= c;
1101 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1102 fifo_count -= c;
1103 }
1104
1105 if (info->params.mode == MGSL_MODE_ASYNC) {
1106 if (info->tx_count < WAKEUP_CHARS)
1107 info->pending_bh |= BH_TRANSMIT;
1108 issue_command(info, CHA, CMD_TXFIFO);
1109 } else {
1110 if (info->tx_count)
1111 issue_command(info, CHA, CMD_TXFIFO);
1112 else
1113 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1114 }
1115}
1116
1117static void cts_change(MGSLPC_INFO *info)
1118{
1119 get_signals(info);
1120 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1121 irq_disable(info, CHB, IRQ_CTS);
1122 info->icount.cts++;
1123 if (info->serial_signals & SerialSignal_CTS)
1124 info->input_signal_events.cts_up++;
1125 else
1126 info->input_signal_events.cts_down++;
1127 wake_up_interruptible(&info->status_event_wait_q);
1128 wake_up_interruptible(&info->event_wait_q);
1129
1130 if (info->flags & ASYNC_CTS_FLOW) {
1131 if (info->tty->hw_stopped) {
1132 if (info->serial_signals & SerialSignal_CTS) {
1133 if (debug_level >= DEBUG_LEVEL_ISR)
1134 printk("CTS tx start...");
1135 if (info->tty)
1136 info->tty->hw_stopped = 0;
1137 tx_start(info);
1138 info->pending_bh |= BH_TRANSMIT;
1139 return;
1140 }
1141 } else {
1142 if (!(info->serial_signals & SerialSignal_CTS)) {
1143 if (debug_level >= DEBUG_LEVEL_ISR)
1144 printk("CTS tx stop...");
1145 if (info->tty)
1146 info->tty->hw_stopped = 1;
1147 tx_stop(info);
1148 }
1149 }
1150 }
1151 info->pending_bh |= BH_STATUS;
1152}
1153
1154static void dcd_change(MGSLPC_INFO *info)
1155{
1156 get_signals(info);
1157 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1158 irq_disable(info, CHB, IRQ_DCD);
1159 info->icount.dcd++;
1160 if (info->serial_signals & SerialSignal_DCD) {
1161 info->input_signal_events.dcd_up++;
1162 }
1163 else
1164 info->input_signal_events.dcd_down++;
af69c7f9 1165#if SYNCLINK_GENERIC_HDLC
fbeff3c1
KH		 1166 if (info->netcount) {
1167 if (info->serial_signals & SerialSignal_DCD)
1168 netif_carrier_on(info->netdev);
1169 else
1170 netif_carrier_off(info->netdev);
1171 }
1da177e4
LT		 1172#endif
1173 wake_up_interruptible(&info->status_event_wait_q);
1174 wake_up_interruptible(&info->event_wait_q);
1175
1176 if (info->flags & ASYNC_CHECK_CD) {
1177 if (debug_level >= DEBUG_LEVEL_ISR)
1178 printk("%s CD now %s...", info->device_name,
1179 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1180 if (info->serial_signals & SerialSignal_DCD)
1181 wake_up_interruptible(&info->open_wait);
1182 else {
1183 if (debug_level >= DEBUG_LEVEL_ISR)
1184 printk("doing serial hangup...");
1185 if (info->tty)
1186 tty_hangup(info->tty);
1187 }
1188 }
1189 info->pending_bh |= BH_STATUS;
1190}
1191
1192static void dsr_change(MGSLPC_INFO *info)
1193{
1194 get_signals(info);
1195 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1196 port_irq_disable(info, PVR_DSR);
1197 info->icount.dsr++;
1198 if (info->serial_signals & SerialSignal_DSR)
1199 info->input_signal_events.dsr_up++;
1200 else
1201 info->input_signal_events.dsr_down++;
1202 wake_up_interruptible(&info->status_event_wait_q);
1203 wake_up_interruptible(&info->event_wait_q);
1204 info->pending_bh |= BH_STATUS;
1205}
1206
1207static void ri_change(MGSLPC_INFO *info)
1208{
1209 get_signals(info);
1210 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1211 port_irq_disable(info, PVR_RI);
1212 info->icount.rng++;
1213 if (info->serial_signals & SerialSignal_RI)
1214 info->input_signal_events.ri_up++;
1215 else
1216 info->input_signal_events.ri_down++;
1217 wake_up_interruptible(&info->status_event_wait_q);
1218 wake_up_interruptible(&info->event_wait_q);
1219 info->pending_bh |= BH_STATUS;
1220}
1221
1222/* Interrupt service routine entry point.
d12341f9 1223 *
1da177e4 1224 * Arguments:
d12341f9 1225 *
1da177e4
LT		 1226 * irq interrupt number that caused interrupt
1227 * dev_id device ID supplied during interrupt registration
1da177e4 1228 */
7d12e780 1229static irqreturn_t mgslpc_isr(int irq, void *dev_id)
1da177e4
LT		 1230{
1231 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1232 unsigned short isr;
1233 unsigned char gis, pis;
1234 int count=0;
1235
d12341f9 1236 if (debug_level >= DEBUG_LEVEL_ISR)
1da177e4
LT		 1237 printk("mgslpc_isr(%d) entry.\n", irq);
1238 if (!info)
1239 return IRQ_NONE;
d12341f9 1240
e2d40963 1241 if (!(info->p_dev->_locked))
1da177e4
LT		 1242 return IRQ_HANDLED;
1243
1244 spin_lock(&info->lock);
1245
1246 while ((gis = read_reg(info, CHA + GIS))) {
d12341f9 1247 if (debug_level >= DEBUG_LEVEL_ISR)
1da177e4
LT		 1248 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1249
1250 if ((gis & 0x70) || count > 1000) {
1251 printk("synclink_cs:hardware failed or ejected\n");
1252 break;
1253 }
1254 count++;
1255
1256 if (gis & (BIT1 + BIT0)) {
1257 isr = read_reg16(info, CHB + ISR);
1258 if (isr & IRQ_DCD)
1259 dcd_change(info);
1260 if (isr & IRQ_CTS)
1261 cts_change(info);
1262 }
1263 if (gis & (BIT3 + BIT2))
1264 {
1265 isr = read_reg16(info, CHA + ISR);
1266 if (isr & IRQ_TIMER) {
1267 info->irq_occurred = 1;
1268 irq_disable(info, CHA, IRQ_TIMER);
1269 }
1270
d12341f9 1271 /* receive IRQs */
1da177e4
LT		 1272 if (isr & IRQ_EXITHUNT) {
1273 info->icount.exithunt++;
1274 wake_up_interruptible(&info->event_wait_q);
1275 }
1276 if (isr & IRQ_BREAK_ON) {
1277 info->icount.brk++;
1278 if (info->flags & ASYNC_SAK)
1279 do_SAK(info->tty);
1280 }
1281 if (isr & IRQ_RXTIME) {
1282 issue_command(info, CHA, CMD_RXFIFO_READ);
1283 }
1284 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1285 if (info->params.mode == MGSL_MODE_HDLC)
d12341f9 1286 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1da177e4
LT		 1287 else
1288 rx_ready_async(info, isr & IRQ_RXEOM);
1289 }
1290
d12341f9 1291 /* transmit IRQs */
1da177e4
LT		 1292 if (isr & IRQ_UNDERRUN) {
1293 if (info->tx_aborting)
1294 info->icount.txabort++;
1295 else
1296 info->icount.txunder++;
1297 tx_done(info);
1298 }
1299 else if (isr & IRQ_ALLSENT) {
1300 info->icount.txok++;
1301 tx_done(info);
1302 }
1303 else if (isr & IRQ_TXFIFO)
1304 tx_ready(info);
1305 }
1306 if (gis & BIT7) {
1307 pis = read_reg(info, CHA + PIS);
1308 if (pis & BIT1)
1309 dsr_change(info);
1310 if (pis & BIT2)
1311 ri_change(info);
1312 }
1313 }
d12341f9
JG		 1314
1315 /* Request bottom half processing if there's something
1da177e4
LT		 1316 * for it to do and the bh is not already running
1317 */
1318
1319 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
d12341f9 1320 if ( debug_level >= DEBUG_LEVEL_ISR )
1da177e4
LT		 1321 printk("%s(%d):%s queueing bh task.\n",
1322 __FILE__,__LINE__,info->device_name);
1323 schedule_work(&info->task);
1324 info->bh_requested = 1;
1325 }
1326
1327 spin_unlock(&info->lock);
d12341f9
JG		 1328
1329 if (debug_level >= DEBUG_LEVEL_ISR)
1da177e4
LT		 1330 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1331 __FILE__,__LINE__,irq);
1332
1333 return IRQ_HANDLED;
1334}
1335
1336/* Initialize and start device.
1337 */
1338static int startup(MGSLPC_INFO * info)
1339{
1340 int retval = 0;
d12341f9 1341
1da177e4
LT		 1342 if (debug_level >= DEBUG_LEVEL_INFO)
1343 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
d12341f9 1344
1da177e4
LT		 1345 if (info->flags & ASYNC_INITIALIZED)
1346 return 0;
d12341f9 1347
1da177e4
LT		 1348 if (!info->tx_buf) {
1349 /* allocate a page of memory for a transmit buffer */
1350 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1351 if (!info->tx_buf) {
1352 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1353 __FILE__,__LINE__,info->device_name);
1354 return -ENOMEM;
1355 }
1356 }
1357
1358 info->pending_bh = 0;
d12341f9 1359
a7482a2e
PF		 1360 memset(&info->icount, 0, sizeof(info->icount));
1361
40565f19 1362 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1da177e4
LT		 1363
1364 /* Allocate and claim adapter resources */
1365 retval = claim_resources(info);
d12341f9 1366
1da177e4
LT		 1367 /* perform existance check and diagnostics */
1368 if ( !retval )
1369 retval = adapter_test(info);
d12341f9 1370
1da177e4
LT		 1371 if ( retval ) {
1372 if (capable(CAP_SYS_ADMIN) && info->tty)
1373 set_bit(TTY_IO_ERROR, &info->tty->flags);
1374 release_resources(info);
1375 return retval;
1376 }
1377
1378 /* program hardware for current parameters */
1379 mgslpc_change_params(info);
d12341f9 1380
1da177e4
LT		 1381 if (info->tty)
1382 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1383
1384 info->flags |= ASYNC_INITIALIZED;
d12341f9 1385
1da177e4
LT		 1386 return 0;
1387}
1388
1389/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1390 */
1391static void shutdown(MGSLPC_INFO * info)
1392{
1393 unsigned long flags;
d12341f9 1394
1da177e4
LT		 1395 if (!(info->flags & ASYNC_INITIALIZED))
1396 return;
1397
1398 if (debug_level >= DEBUG_LEVEL_INFO)
1399 printk("%s(%d):mgslpc_shutdown(%s)\n",
1400 __FILE__,__LINE__, info->device_name );
1401
1402 /* clear status wait queue because status changes */
1403 /* can't happen after shutting down the hardware */
1404 wake_up_interruptible(&info->status_event_wait_q);
1405 wake_up_interruptible(&info->event_wait_q);
1406
40565f19 1407 del_timer_sync(&info->tx_timer);
1da177e4
LT		 1408
1409 if (info->tx_buf) {
1410 free_page((unsigned long) info->tx_buf);
1411 info->tx_buf = NULL;
1412 }
1413
1414 spin_lock_irqsave(&info->lock,flags);
1415
1416 rx_stop(info);
1417 tx_stop(info);
1418
1419 /* TODO:disable interrupts instead of reset to preserve signal states */
1420 reset_device(info);
d12341f9 1421
1da177e4
LT		 1422 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1423 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1424 set_signals(info);
1425 }
d12341f9 1426
1da177e4
LT		 1427 spin_unlock_irqrestore(&info->lock,flags);
1428
d12341f9
JG		 1429 release_resources(info);
1430
1da177e4
LT		 1431 if (info->tty)
1432 set_bit(TTY_IO_ERROR, &info->tty->flags);
1433
1434 info->flags &= ~ASYNC_INITIALIZED;
1435}
1436
1437static void mgslpc_program_hw(MGSLPC_INFO *info)
1438{
1439 unsigned long flags;
1440
1441 spin_lock_irqsave(&info->lock,flags);
d12341f9 1442
1da177e4
LT		 1443 rx_stop(info);
1444 tx_stop(info);
1445 info->tx_count = info->tx_put = info->tx_get = 0;
d12341f9 1446
1da177e4
LT		 1447 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1448 hdlc_mode(info);
1449 else
1450 async_mode(info);
d12341f9 1451
1da177e4 1452 set_signals(info);
d12341f9 1453
1da177e4
LT		 1454 info->dcd_chkcount = 0;
1455 info->cts_chkcount = 0;
1456 info->ri_chkcount = 0;
1457 info->dsr_chkcount = 0;
1458
1459 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1460 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1461 get_signals(info);
d12341f9 1462
1da177e4
LT		 1463 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1464 rx_start(info);
d12341f9 1465
1da177e4
LT		 1466 spin_unlock_irqrestore(&info->lock,flags);
1467}
1468
1469/* Reconfigure adapter based on new parameters
1470 */
1471static void mgslpc_change_params(MGSLPC_INFO *info)
1472{
1473 unsigned cflag;
1474 int bits_per_char;
1475
1476 if (!info->tty || !info->tty->termios)
1477 return;
d12341f9 1478
1da177e4
LT		 1479 if (debug_level >= DEBUG_LEVEL_INFO)
1480 printk("%s(%d):mgslpc_change_params(%s)\n",
1481 __FILE__,__LINE__, info->device_name );
d12341f9 1482
1da177e4
LT		 1483 cflag = info->tty->termios->c_cflag;
1484
1485 /* if B0 rate (hangup) specified then negate DTR and RTS */
1486 /* otherwise assert DTR and RTS */
1487 if (cflag & CBAUD)
1488 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1489 else
1490 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
d12341f9 1491
1da177e4 1492 /* byte size and parity */
d12341f9 1493
1da177e4
LT		 1494 switch (cflag & CSIZE) {
1495 case CS5: info->params.data_bits = 5; break;
1496 case CS6: info->params.data_bits = 6; break;
1497 case CS7: info->params.data_bits = 7; break;
1498 case CS8: info->params.data_bits = 8; break;
1499 default: info->params.data_bits = 7; break;
1500 }
d12341f9 1501
1da177e4
LT		 1502 if (cflag & CSTOPB)
1503 info->params.stop_bits = 2;
1504 else
1505 info->params.stop_bits = 1;
1506
1507 info->params.parity = ASYNC_PARITY_NONE;
1508 if (cflag & PARENB) {
1509 if (cflag & PARODD)
1510 info->params.parity = ASYNC_PARITY_ODD;
1511 else
1512 info->params.parity = ASYNC_PARITY_EVEN;
1513#ifdef CMSPAR
1514 if (cflag & CMSPAR)
1515 info->params.parity = ASYNC_PARITY_SPACE;
1516#endif
1517 }
1518
1519 /* calculate number of jiffies to transmit a full
1520 * FIFO (32 bytes) at specified data rate
1521 */
d12341f9 1522 bits_per_char = info->params.data_bits +
1da177e4
LT		 1523 info->params.stop_bits + 1;
1524
1525 /* if port data rate is set to 460800 or less then
1526 * allow tty settings to override, otherwise keep the
1527 * current data rate.
1528 */
1529 if (info->params.data_rate <= 460800) {
1530 info->params.data_rate = tty_get_baud_rate(info->tty);
1531 }
d12341f9 1532
1da177e4 1533 if ( info->params.data_rate ) {
d12341f9 1534 info->timeout = (32*HZ*bits_per_char) /
1da177e4
LT		 1535 info->params.data_rate;
1536 }
1537 info->timeout += HZ/50; /* Add .02 seconds of slop */
1538
1539 if (cflag & CRTSCTS)
1540 info->flags |= ASYNC_CTS_FLOW;
1541 else
1542 info->flags &= ~ASYNC_CTS_FLOW;
d12341f9 1543
1da177e4
LT		 1544 if (cflag & CLOCAL)
1545 info->flags &= ~ASYNC_CHECK_CD;
1546 else
1547 info->flags |= ASYNC_CHECK_CD;
1548
1549 /* process tty input control flags */
d12341f9 1550
1da177e4
LT		 1551 info->read_status_mask = 0;
1552 if (I_INPCK(info->tty))
1553 info->read_status_mask |= BIT7 | BIT6;
1554 if (I_IGNPAR(info->tty))
1555 info->ignore_status_mask |= BIT7 | BIT6;
1556
1557 mgslpc_program_hw(info);
1558}
1559
1560/* Add a character to the transmit buffer
1561 */
1562static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1563{
1564 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1565 unsigned long flags;
1566
1567 if (debug_level >= DEBUG_LEVEL_INFO) {
1568 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1569 __FILE__,__LINE__,ch,info->device_name);
1570 }
1571
1572 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1573 return;
1574
326f28e9 1575 if (!info->tx_buf)
1da177e4
LT		 1576 return;
1577
1578 spin_lock_irqsave(&info->lock,flags);
d12341f9 1579
1da177e4
LT		 1580 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1581 if (info->tx_count < TXBUFSIZE - 1) {
1582 info->tx_buf[info->tx_put++] = ch;
1583 info->tx_put &= TXBUFSIZE-1;
1584 info->tx_count++;
1585 }
1586 }
d12341f9 1587
1da177e4
LT		 1588 spin_unlock_irqrestore(&info->lock,flags);
1589}
1590
1591/* Enable transmitter so remaining characters in the
1592 * transmit buffer are sent.
1593 */
1594static void mgslpc_flush_chars(struct tty_struct *tty)
1595{
1596 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1597 unsigned long flags;
d12341f9 1598
1da177e4
LT		 1599 if (debug_level >= DEBUG_LEVEL_INFO)
1600 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1601 __FILE__,__LINE__,info->device_name,info->tx_count);
d12341f9 1602
1da177e4
LT		 1603 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1604 return;
1605
1606 if (info->tx_count <= 0 || tty->stopped ||
1607 tty->hw_stopped || !info->tx_buf)
1608 return;
1609
1610 if (debug_level >= DEBUG_LEVEL_INFO)
1611 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1612 __FILE__,__LINE__,info->device_name);
1613
1614 spin_lock_irqsave(&info->lock,flags);
1615 if (!info->tx_active)
1616 tx_start(info);
1617 spin_unlock_irqrestore(&info->lock,flags);
1618}
1619
1620/* Send a block of data
d12341f9 1621 *
1da177e4 1622 * Arguments:
d12341f9 1623 *
1da177e4
LT		 1624 * tty pointer to tty information structure
1625 * buf pointer to buffer containing send data
1626 * count size of send data in bytes
d12341f9 1627 *
1da177e4
LT		 1628 * Returns: number of characters written
1629 */
1630static int mgslpc_write(struct tty_struct * tty,
1631 const unsigned char *buf, int count)
1632{
1633 int c, ret = 0;
1634 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1635 unsigned long flags;
d12341f9 1636
1da177e4
LT		 1637 if (debug_level >= DEBUG_LEVEL_INFO)
1638 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1639 __FILE__,__LINE__,info->device_name,count);
d12341f9 1640
1da177e4 1641 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
326f28e9 1642 !info->tx_buf)
1da177e4
LT		 1643 goto cleanup;
1644
1645 if (info->params.mode == MGSL_MODE_HDLC) {
1646 if (count > TXBUFSIZE) {
1647 ret = -EIO;
1648 goto cleanup;
1649 }
1650 if (info->tx_active)
1651 goto cleanup;
1652 else if (info->tx_count)
1653 goto start;
1654 }
1655
1656 for (;;) {
1657 c = min(count,
1658 min(TXBUFSIZE - info->tx_count - 1,
1659 TXBUFSIZE - info->tx_put));
1660 if (c <= 0)
1661 break;
d12341f9 1662
1da177e4
LT		 1663 memcpy(info->tx_buf + info->tx_put, buf, c);
1664
1665 spin_lock_irqsave(&info->lock,flags);
1666 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1667 info->tx_count += c;
1668 spin_unlock_irqrestore(&info->lock,flags);
1669
1670 buf += c;
1671 count -= c;
1672 ret += c;
1673 }
1674start:
1675 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1676 spin_lock_irqsave(&info->lock,flags);
1677 if (!info->tx_active)
1678 tx_start(info);
1679 spin_unlock_irqrestore(&info->lock,flags);
1680 }
d12341f9 1681cleanup:
1da177e4
LT		 1682 if (debug_level >= DEBUG_LEVEL_INFO)
1683 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1684 __FILE__,__LINE__,info->device_name,ret);
1685 return ret;
1686}
1687
1688/* Return the count of free bytes in transmit buffer
1689 */
1690static int mgslpc_write_room(struct tty_struct *tty)
1691{
1692 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1693 int ret;
d12341f9 1694
1da177e4
LT		 1695 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1696 return 0;
1697
1698 if (info->params.mode == MGSL_MODE_HDLC) {
1699 /* HDLC (frame oriented) mode */
1700 if (info->tx_active)
1701 return 0;
1702 else
1703 return HDLC_MAX_FRAME_SIZE;
1704 } else {
1705 ret = TXBUFSIZE - info->tx_count - 1;
1706 if (ret < 0)
1707 ret = 0;
1708 }
d12341f9 1709
1da177e4
LT		 1710 if (debug_level >= DEBUG_LEVEL_INFO)
1711 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1712 __FILE__,__LINE__, info->device_name, ret);
1713 return ret;
1714}
1715
1716/* Return the count of bytes in transmit buffer
1717 */
1718static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1719{
1720 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1721 int rc;
d12341f9 1722
1da177e4
LT		 1723 if (debug_level >= DEBUG_LEVEL_INFO)
1724 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1725 __FILE__,__LINE__, info->device_name );
d12341f9 1726
1da177e4
LT		 1727 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1728 return 0;
d12341f9 1729
1da177e4
LT		 1730 if (info->params.mode == MGSL_MODE_HDLC)
1731 rc = info->tx_active ? info->max_frame_size : 0;
1732 else
1733 rc = info->tx_count;
1734
1735 if (debug_level >= DEBUG_LEVEL_INFO)
1736 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1737 __FILE__,__LINE__, info->device_name, rc);
d12341f9 1738
1da177e4
LT		 1739 return rc;
1740}
1741
1742/* Discard all data in the send buffer
1743 */
1744static void mgslpc_flush_buffer(struct tty_struct *tty)
1745{
1746 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1747 unsigned long flags;
d12341f9 1748
1da177e4
LT		 1749 if (debug_level >= DEBUG_LEVEL_INFO)
1750 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1751 __FILE__,__LINE__, info->device_name );
d12341f9 1752
1da177e4
LT		 1753 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1754 return;
d12341f9
JG		 1755
1756 spin_lock_irqsave(&info->lock,flags);
1da177e4 1757 info->tx_count = info->tx_put = info->tx_get = 0;
d12341f9 1758 del_timer(&info->tx_timer);
1da177e4
LT		 1759 spin_unlock_irqrestore(&info->lock,flags);
1760
1761 wake_up_interruptible(&tty->write_wait);
1762 tty_wakeup(tty);
1763}
1764
1765/* Send a high-priority XON/XOFF character
1766 */
1767static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1768{
1769 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1770 unsigned long flags;
1771
1772 if (debug_level >= DEBUG_LEVEL_INFO)
1773 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1774 __FILE__,__LINE__, info->device_name, ch );
d12341f9 1775
1da177e4
LT		 1776 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1777 return;
1778
1779 info->x_char = ch;
1780 if (ch) {
1781 spin_lock_irqsave(&info->lock,flags);
1782 if (!info->tx_enabled)
1783 tx_start(info);
1784 spin_unlock_irqrestore(&info->lock,flags);
1785 }
1786}
1787
1788/* Signal remote device to throttle send data (our receive data)
1789 */
1790static void mgslpc_throttle(struct tty_struct * tty)
1791{
1792 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1793 unsigned long flags;
d12341f9 1794
1da177e4
LT		 1795 if (debug_level >= DEBUG_LEVEL_INFO)
1796 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1797 __FILE__,__LINE__, info->device_name );
1798
1799 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1800 return;
d12341f9 1801
1da177e4
LT		 1802 if (I_IXOFF(tty))
1803 mgslpc_send_xchar(tty, STOP_CHAR(tty));
d12341f9 1804
1da177e4
LT		 1805 if (tty->termios->c_cflag & CRTSCTS) {
1806 spin_lock_irqsave(&info->lock,flags);
1807 info->serial_signals &= ~SerialSignal_RTS;
1808 set_signals(info);
1809 spin_unlock_irqrestore(&info->lock,flags);
1810 }
1811}
1812
1813/* Signal remote device to stop throttling send data (our receive data)
1814 */
1815static void mgslpc_unthrottle(struct tty_struct * tty)
1816{
1817 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1818 unsigned long flags;
d12341f9 1819
1da177e4
LT		 1820 if (debug_level >= DEBUG_LEVEL_INFO)
1821 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1822 __FILE__,__LINE__, info->device_name );
1823
1824 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1825 return;
d12341f9 1826
1da177e4
LT		 1827 if (I_IXOFF(tty)) {
1828 if (info->x_char)
1829 info->x_char = 0;
1830 else
1831 mgslpc_send_xchar(tty, START_CHAR(tty));
1832 }
d12341f9 1833
1da177e4
LT		 1834 if (tty->termios->c_cflag & CRTSCTS) {
1835 spin_lock_irqsave(&info->lock,flags);
1836 info->serial_signals |= SerialSignal_RTS;
1837 set_signals(info);
1838 spin_unlock_irqrestore(&info->lock,flags);
1839 }
1840}
1841
1842/* get the current serial statistics
1843 */
1844static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1845{
1846 int err;
1847 if (debug_level >= DEBUG_LEVEL_INFO)
1848 printk("get_params(%s)\n", info->device_name);
a7482a2e
PF		 1849 if (!user_icount) {
1850 memset(&info->icount, 0, sizeof(info->icount));
1851 } else {
1852 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1853 if (err)
1854 return -EFAULT;
1855 }
1da177e4
LT		 1856 return 0;
1857}
1858
1859/* get the current serial parameters
1860 */
1861static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1862{
1863 int err;
1864 if (debug_level >= DEBUG_LEVEL_INFO)
1865 printk("get_params(%s)\n", info->device_name);
1866 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1867 if (err)
1868 return -EFAULT;
1869 return 0;
1870}
1871
1872/* set the serial parameters
d12341f9 1873 *
1da177e4 1874 * Arguments:
d12341f9 1875 *
1da177e4
LT		 1876 * info pointer to device instance data
1877 * new_params user buffer containing new serial params
1878 *
1879 * Returns: 0 if success, otherwise error code
1880 */
1881static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1882{
1883 unsigned long flags;
1884 MGSL_PARAMS tmp_params;
1885 int err;
d12341f9 1886
1da177e4
LT		 1887 if (debug_level >= DEBUG_LEVEL_INFO)
1888 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1889 info->device_name );
1890 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1891 if (err) {
1892 if ( debug_level >= DEBUG_LEVEL_INFO )
1893 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1894 __FILE__,__LINE__,info->device_name);
1895 return -EFAULT;
1896 }
d12341f9 1897
1da177e4
LT		 1898 spin_lock_irqsave(&info->lock,flags);
1899 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1900 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 1901
1da177e4 1902 mgslpc_change_params(info);
d12341f9 1903
1da177e4
LT		 1904 return 0;
1905}
1906
1907static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1908{
1909 int err;
1910 if (debug_level >= DEBUG_LEVEL_INFO)
1911 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1912 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1913 if (err)
1914 return -EFAULT;
1915 return 0;
1916}
1917
1918static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1919{
1920 unsigned long flags;
1921 if (debug_level >= DEBUG_LEVEL_INFO)
1922 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1923 spin_lock_irqsave(&info->lock,flags);
1924 info->idle_mode = idle_mode;
1925 tx_set_idle(info);
1926 spin_unlock_irqrestore(&info->lock,flags);
1927 return 0;
1928}
1929
1930static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1931{
1932 int err;
1933 if (debug_level >= DEBUG_LEVEL_INFO)
1934 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1935 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1936 if (err)
1937 return -EFAULT;
1938 return 0;
1939}
1940
1941static int set_interface(MGSLPC_INFO * info, int if_mode)
1942{
1943 unsigned long flags;
1944 unsigned char val;
1945 if (debug_level >= DEBUG_LEVEL_INFO)
1946 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1947 spin_lock_irqsave(&info->lock,flags);
1948 info->if_mode = if_mode;
1949
1950 val = read_reg(info, PVR) & 0x0f;
1951 switch (info->if_mode)
1952 {
1953 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1954 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1955 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1956 }
1957 write_reg(info, PVR, val);
1958
1959 spin_unlock_irqrestore(&info->lock,flags);
1960 return 0;
1961}
1962
1963static int set_txenable(MGSLPC_INFO * info, int enable)
1964{
1965 unsigned long flags;
d12341f9 1966
1da177e4
LT		 1967 if (debug_level >= DEBUG_LEVEL_INFO)
1968 printk("set_txenable(%s,%d)\n", info->device_name, enable);
d12341f9 1969
1da177e4
LT		 1970 spin_lock_irqsave(&info->lock,flags);
1971 if (enable) {
1972 if (!info->tx_enabled)
1973 tx_start(info);
1974 } else {
1975 if (info->tx_enabled)
1976 tx_stop(info);
1977 }
1978 spin_unlock_irqrestore(&info->lock,flags);
1979 return 0;
1980}
1981
1982static int tx_abort(MGSLPC_INFO * info)
1983{
1984 unsigned long flags;
d12341f9 1985
1da177e4
LT		 1986 if (debug_level >= DEBUG_LEVEL_INFO)
1987 printk("tx_abort(%s)\n", info->device_name);
d12341f9 1988
1da177e4
LT		 1989 spin_lock_irqsave(&info->lock,flags);
1990 if (info->tx_active && info->tx_count &&
1991 info->params.mode == MGSL_MODE_HDLC) {
1992 /* clear data count so FIFO is not filled on next IRQ.
1993 * This results in underrun and abort transmission.
1994 */
1995 info->tx_count = info->tx_put = info->tx_get = 0;
1996 info->tx_aborting = TRUE;
1997 }
1998 spin_unlock_irqrestore(&info->lock,flags);
1999 return 0;
2000}
2001
2002static int set_rxenable(MGSLPC_INFO * info, int enable)
2003{
2004 unsigned long flags;
d12341f9 2005
1da177e4
LT		 2006 if (debug_level >= DEBUG_LEVEL_INFO)
2007 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
d12341f9 2008
1da177e4
LT		 2009 spin_lock_irqsave(&info->lock,flags);
2010 if (enable) {
2011 if (!info->rx_enabled)
2012 rx_start(info);
2013 } else {
2014 if (info->rx_enabled)
2015 rx_stop(info);
2016 }
2017 spin_unlock_irqrestore(&info->lock,flags);
2018 return 0;
2019}
2020
2021/* wait for specified event to occur
d12341f9 2022 *
1da177e4
LT		 2023 * Arguments: info pointer to device instance data
2024 * mask pointer to bitmask of events to wait for
2025 * Return Value: 0 if successful and bit mask updated with
2026 * of events triggerred,
2027 * otherwise error code
2028 */
2029static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2030{
2031 unsigned long flags;
2032 int s;
2033 int rc=0;
2034 struct mgsl_icount cprev, cnow;
2035 int events;
2036 int mask;
2037 struct _input_signal_events oldsigs, newsigs;
2038 DECLARE_WAITQUEUE(wait, current);
2039
2040 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2041 if (rc)
2042 return -EFAULT;
d12341f9 2043
1da177e4
LT		 2044 if (debug_level >= DEBUG_LEVEL_INFO)
2045 printk("wait_events(%s,%d)\n", info->device_name, mask);
2046
2047 spin_lock_irqsave(&info->lock,flags);
2048
2049 /* return immediately if state matches requested events */
2050 get_signals(info);
2051 s = info->serial_signals;
2052 events = mask &
2053 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2054 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2055 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2056 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2057 if (events) {
2058 spin_unlock_irqrestore(&info->lock,flags);
2059 goto exit;
2060 }
2061
2062 /* save current irq counts */
2063 cprev = info->icount;
2064 oldsigs = info->input_signal_events;
d12341f9 2065
1da177e4
LT		 2066 if ((info->params.mode == MGSL_MODE_HDLC) &&
2067 (mask & MgslEvent_ExitHuntMode))
2068 irq_enable(info, CHA, IRQ_EXITHUNT);
d12341f9 2069
1da177e4
LT		 2070 set_current_state(TASK_INTERRUPTIBLE);
2071 add_wait_queue(&info->event_wait_q, &wait);
d12341f9 2072
1da177e4 2073 spin_unlock_irqrestore(&info->lock,flags);
d12341f9
JG		 2074
2075
1da177e4
LT		 2076 for(;;) {
2077 schedule();
2078 if (signal_pending(current)) {
2079 rc = -ERESTARTSYS;
2080 break;
2081 }
d12341f9 2082
1da177e4
LT		 2083 /* get current irq counts */
2084 spin_lock_irqsave(&info->lock,flags);
2085 cnow = info->icount;
2086 newsigs = info->input_signal_events;
2087 set_current_state(TASK_INTERRUPTIBLE);
2088 spin_unlock_irqrestore(&info->lock,flags);
2089
2090 /* if no change, wait aborted for some reason */
2091 if (newsigs.dsr_up == oldsigs.dsr_up &&
2092 newsigs.dsr_down == oldsigs.dsr_down &&
2093 newsigs.dcd_up == oldsigs.dcd_up &&
2094 newsigs.dcd_down == oldsigs.dcd_down &&
2095 newsigs.cts_up == oldsigs.cts_up &&
2096 newsigs.cts_down == oldsigs.cts_down &&
2097 newsigs.ri_up == oldsigs.ri_up &&
2098 newsigs.ri_down == oldsigs.ri_down &&
2099 cnow.exithunt == cprev.exithunt &&
2100 cnow.rxidle == cprev.rxidle) {
2101 rc = -EIO;
2102 break;
2103 }
2104
2105 events = mask &
2106 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2107 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2108 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2109 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2110 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2111 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2112 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2113 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2114 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2115 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2116 if (events)
2117 break;
d12341f9 2118
1da177e4
LT		 2119 cprev = cnow;
2120 oldsigs = newsigs;
2121 }
d12341f9 2122
1da177e4
LT		 2123 remove_wait_queue(&info->event_wait_q, &wait);
2124 set_current_state(TASK_RUNNING);
2125
2126 if (mask & MgslEvent_ExitHuntMode) {
2127 spin_lock_irqsave(&info->lock,flags);
2128 if (!waitqueue_active(&info->event_wait_q))
2129 irq_disable(info, CHA, IRQ_EXITHUNT);
2130 spin_unlock_irqrestore(&info->lock,flags);
2131 }
2132exit:
2133 if (rc == 0)
2134 PUT_USER(rc, events, mask_ptr);
2135 return rc;
2136}
2137
2138static int modem_input_wait(MGSLPC_INFO *info,int arg)
2139{
2140 unsigned long flags;
2141 int rc;
2142 struct mgsl_icount cprev, cnow;
2143 DECLARE_WAITQUEUE(wait, current);
2144
2145 /* save current irq counts */
2146 spin_lock_irqsave(&info->lock,flags);
2147 cprev = info->icount;
2148 add_wait_queue(&info->status_event_wait_q, &wait);
2149 set_current_state(TASK_INTERRUPTIBLE);
2150 spin_unlock_irqrestore(&info->lock,flags);
2151
2152 for(;;) {
2153 schedule();
2154 if (signal_pending(current)) {
2155 rc = -ERESTARTSYS;
2156 break;
2157 }
2158
2159 /* get new irq counts */
2160 spin_lock_irqsave(&info->lock,flags);
2161 cnow = info->icount;
2162 set_current_state(TASK_INTERRUPTIBLE);
2163 spin_unlock_irqrestore(&info->lock,flags);
2164
2165 /* if no change, wait aborted for some reason */
2166 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2167 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2168 rc = -EIO;
2169 break;
2170 }
2171
2172 /* check for change in caller specified modem input */
2173 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2174 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2175 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2176 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2177 rc = 0;
2178 break;
2179 }
2180
2181 cprev = cnow;
2182 }
2183 remove_wait_queue(&info->status_event_wait_q, &wait);
2184 set_current_state(TASK_RUNNING);
2185 return rc;
2186}
2187
2188/* return the state of the serial control and status signals
2189 */
2190static int tiocmget(struct tty_struct *tty, struct file *file)
2191{
2192 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2193 unsigned int result;
2194 unsigned long flags;
2195
2196 spin_lock_irqsave(&info->lock,flags);
2197 get_signals(info);
2198 spin_unlock_irqrestore(&info->lock,flags);
2199
2200 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2201 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2202 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2203 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2204 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2205 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2206
2207 if (debug_level >= DEBUG_LEVEL_INFO)
2208 printk("%s(%d):%s tiocmget() value=%08X\n",
2209 __FILE__,__LINE__, info->device_name, result );
2210 return result;
2211}
2212
2213/* set modem control signals (DTR/RTS)
2214 */
2215static int tiocmset(struct tty_struct *tty, struct file *file,
2216 unsigned int set, unsigned int clear)
2217{
2218 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2219 unsigned long flags;
2220
2221 if (debug_level >= DEBUG_LEVEL_INFO)
2222 printk("%s(%d):%s tiocmset(%x,%x)\n",
2223 __FILE__,__LINE__,info->device_name, set, clear);
2224
2225 if (set & TIOCM_RTS)
2226 info->serial_signals |= SerialSignal_RTS;
2227 if (set & TIOCM_DTR)
2228 info->serial_signals |= SerialSignal_DTR;
2229 if (clear & TIOCM_RTS)
2230 info->serial_signals &= ~SerialSignal_RTS;
2231 if (clear & TIOCM_DTR)
2232 info->serial_signals &= ~SerialSignal_DTR;
2233
2234 spin_lock_irqsave(&info->lock,flags);
2235 set_signals(info);
2236 spin_unlock_irqrestore(&info->lock,flags);
2237
2238 return 0;
2239}
2240
2241/* Set or clear transmit break condition
2242 *
2243 * Arguments: tty pointer to tty instance data
2244 * break_state -1=set break condition, 0=clear
2245 */
2246static void mgslpc_break(struct tty_struct *tty, int break_state)
2247{
2248 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2249 unsigned long flags;
d12341f9 2250
1da177e4
LT		 2251 if (debug_level >= DEBUG_LEVEL_INFO)
2252 printk("%s(%d):mgslpc_break(%s,%d)\n",
2253 __FILE__,__LINE__, info->device_name, break_state);
d12341f9 2254
1da177e4
LT		 2255 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2256 return;
2257
2258 spin_lock_irqsave(&info->lock,flags);
2259 if (break_state == -1)
2260 set_reg_bits(info, CHA+DAFO, BIT6);
d12341f9 2261 else
1da177e4
LT		 2262 clear_reg_bits(info, CHA+DAFO, BIT6);
2263 spin_unlock_irqrestore(&info->lock,flags);
2264}
2265
2266/* Service an IOCTL request
d12341f9 2267 *
1da177e4 2268 * Arguments:
d12341f9 2269 *
1da177e4
LT		 2270 * tty pointer to tty instance data
2271 * file pointer to associated file object for device
2272 * cmd IOCTL command code
2273 * arg command argument/context
d12341f9 2274 *
1da177e4
LT		 2275 * Return Value: 0 if success, otherwise error code
2276 */
2277static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2278 unsigned int cmd, unsigned long arg)
2279{
2280 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
d12341f9 2281
1da177e4
LT		 2282 if (debug_level >= DEBUG_LEVEL_INFO)
2283 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2284 info->device_name, cmd );
d12341f9 2285
1da177e4
LT		 2286 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2287 return -ENODEV;
2288
2289 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2290 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2291 if (tty->flags & (1 << TTY_IO_ERROR))
2292 return -EIO;
2293 }
2294
2295 return ioctl_common(info, cmd, arg);
2296}
2297
cdaad343 2298static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
1da177e4
LT		 2299{
2300 int error;
2301 struct mgsl_icount cnow; /* kernel counter temps */
2302 struct serial_icounter_struct __user *p_cuser; /* user space */
2303 void __user *argp = (void __user *)arg;
2304 unsigned long flags;
d12341f9 2305
1da177e4
LT		 2306 switch (cmd) {
2307 case MGSL_IOCGPARAMS:
2308 return get_params(info, argp);
2309 case MGSL_IOCSPARAMS:
2310 return set_params(info, argp);
2311 case MGSL_IOCGTXIDLE:
2312 return get_txidle(info, argp);
2313 case MGSL_IOCSTXIDLE:
2314 return set_txidle(info, (int)arg);
2315 case MGSL_IOCGIF:
2316 return get_interface(info, argp);
2317 case MGSL_IOCSIF:
2318 return set_interface(info,(int)arg);
2319 case MGSL_IOCTXENABLE:
2320 return set_txenable(info,(int)arg);
2321 case MGSL_IOCRXENABLE:
2322 return set_rxenable(info,(int)arg);
2323 case MGSL_IOCTXABORT:
2324 return tx_abort(info);
2325 case MGSL_IOCGSTATS:
2326 return get_stats(info, argp);
2327 case MGSL_IOCWAITEVENT:
2328 return wait_events(info, argp);
2329 case TIOCMIWAIT:
2330 return modem_input_wait(info,(int)arg);
2331 case TIOCGICOUNT:
2332 spin_lock_irqsave(&info->lock,flags);
2333 cnow = info->icount;
2334 spin_unlock_irqrestore(&info->lock,flags);
2335 p_cuser = argp;
2336 PUT_USER(error,cnow.cts, &p_cuser->cts);
2337 if (error) return error;
2338 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2339 if (error) return error;
2340 PUT_USER(error,cnow.rng, &p_cuser->rng);
2341 if (error) return error;
2342 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2343 if (error) return error;
2344 PUT_USER(error,cnow.rx, &p_cuser->rx);
2345 if (error) return error;
2346 PUT_USER(error,cnow.tx, &p_cuser->tx);
2347 if (error) return error;
2348 PUT_USER(error,cnow.frame, &p_cuser->frame);
2349 if (error) return error;
2350 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2351 if (error) return error;
2352 PUT_USER(error,cnow.parity, &p_cuser->parity);
2353 if (error) return error;
2354 PUT_USER(error,cnow.brk, &p_cuser->brk);
2355 if (error) return error;
2356 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2357 if (error) return error;
2358 return 0;
2359 default:
2360 return -ENOIOCTLCMD;
2361 }
2362 return 0;
2363}
2364
2365/* Set new termios settings
d12341f9 2366 *
1da177e4 2367 * Arguments:
d12341f9 2368 *
1da177e4
LT		 2369 * tty pointer to tty structure
2370 * termios pointer to buffer to hold returned old termios
2371 */
606d099c 2372static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4
LT		 2373{
2374 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2375 unsigned long flags;
d12341f9 2376
1da177e4
LT		 2377 if (debug_level >= DEBUG_LEVEL_INFO)
2378 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2379 tty->driver->name );
d12341f9 2380
1da177e4
LT		 2381 /* just return if nothing has changed */
2382 if ((tty->termios->c_cflag == old_termios->c_cflag)
d12341f9 2383 && (RELEVANT_IFLAG(tty->termios->c_iflag)
1da177e4
LT		 2384 == RELEVANT_IFLAG(old_termios->c_iflag)))
2385 return;
2386
2387 mgslpc_change_params(info);
2388
2389 /* Handle transition to B0 status */
2390 if (old_termios->c_cflag & CBAUD &&
2391 !(tty->termios->c_cflag & CBAUD)) {
2392 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2393 spin_lock_irqsave(&info->lock,flags);
2394 set_signals(info);
2395 spin_unlock_irqrestore(&info->lock,flags);
2396 }
d12341f9 2397
1da177e4
LT		 2398 /* Handle transition away from B0 status */
2399 if (!(old_termios->c_cflag & CBAUD) &&
2400 tty->termios->c_cflag & CBAUD) {
2401 info->serial_signals |= SerialSignal_DTR;
d12341f9 2402 if (!(tty->termios->c_cflag & CRTSCTS) ||
1da177e4
LT		 2403 !test_bit(TTY_THROTTLED, &tty->flags)) {
2404 info->serial_signals |= SerialSignal_RTS;
2405 }
2406 spin_lock_irqsave(&info->lock,flags);
2407 set_signals(info);
2408 spin_unlock_irqrestore(&info->lock,flags);
2409 }
d12341f9 2410
1da177e4
LT		 2411 /* Handle turning off CRTSCTS */
2412 if (old_termios->c_cflag & CRTSCTS &&
2413 !(tty->termios->c_cflag & CRTSCTS)) {
2414 tty->hw_stopped = 0;
2415 tx_release(tty);
2416 }
2417}
2418
2419static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2420{
2421 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2422
2423 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2424 return;
d12341f9 2425
1da177e4
LT		 2426 if (debug_level >= DEBUG_LEVEL_INFO)
2427 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2428 __FILE__,__LINE__, info->device_name, info->count);
d12341f9 2429
1da177e4
LT		 2430 if (!info->count)
2431 return;
2432
2433 if (tty_hung_up_p(filp))
2434 goto cleanup;
d12341f9 2435
1da177e4
LT		 2436 if ((tty->count == 1) && (info->count != 1)) {
2437 /*
2438 * tty->count is 1 and the tty structure will be freed.
2439 * info->count should be one in this case.
2440 * if it's not, correct it so that the port is shutdown.
2441 */
2442 printk("mgslpc_close: bad refcount; tty->count is 1, "
2443 "info->count is %d\n", info->count);
2444 info->count = 1;
2445 }
d12341f9 2446
1da177e4 2447 info->count--;
d12341f9 2448
1da177e4
LT		 2449 /* if at least one open remaining, leave hardware active */
2450 if (info->count)
2451 goto cleanup;
d12341f9 2452
1da177e4 2453 info->flags |= ASYNC_CLOSING;
d12341f9
JG		 2454
2455 /* set tty->closing to notify line discipline to
1da177e4
LT		 2456 * only process XON/XOFF characters. Only the N_TTY
2457 * discipline appears to use this (ppp does not).
2458 */
2459 tty->closing = 1;
d12341f9 2460
1da177e4 2461 /* wait for transmit data to clear all layers */
d12341f9 2462
1da177e4
LT		 2463 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2464 if (debug_level >= DEBUG_LEVEL_INFO)
2465 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2466 __FILE__,__LINE__, info->device_name );
2467 tty_wait_until_sent(tty, info->closing_wait);
2468 }
d12341f9 2469
1da177e4
LT		 2470 if (info->flags & ASYNC_INITIALIZED)
2471 mgslpc_wait_until_sent(tty, info->timeout);
2472
2473 if (tty->driver->flush_buffer)
2474 tty->driver->flush_buffer(tty);
2475
2476 ldisc_flush_buffer(tty);
d12341f9 2477
1da177e4 2478 shutdown(info);
d12341f9 2479
1da177e4
LT		 2480 tty->closing = 0;
2481 info->tty = NULL;
d12341f9 2482
1da177e4
LT		 2483 if (info->blocked_open) {
2484 if (info->close_delay) {
2485 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2486 }
2487 wake_up_interruptible(&info->open_wait);
2488 }
d12341f9 2489
1da177e4 2490 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
d12341f9 2491
1da177e4 2492 wake_up_interruptible(&info->close_wait);
d12341f9
JG		 2493
2494cleanup:
1da177e4
LT		 2495 if (debug_level >= DEBUG_LEVEL_INFO)
2496 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2497 tty->driver->name, info->count);
2498}
2499
2500/* Wait until the transmitter is empty.
2501 */
2502static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2503{
2504 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2505 unsigned long orig_jiffies, char_time;
2506
2507 if (!info )
2508 return;
2509
2510 if (debug_level >= DEBUG_LEVEL_INFO)
2511 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2512 __FILE__,__LINE__, info->device_name );
d12341f9 2513
1da177e4
LT		 2514 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2515 return;
2516
2517 if (!(info->flags & ASYNC_INITIALIZED))
2518 goto exit;
d12341f9 2519
1da177e4 2520 orig_jiffies = jiffies;
d12341f9 2521
1da177e4
LT		 2522 /* Set check interval to 1/5 of estimated time to
2523 * send a character, and make it at least 1. The check
2524 * interval should also be less than the timeout.
2525 * Note: use tight timings here to satisfy the NIST-PCTS.
d12341f9
JG		 2526 */
2527
1da177e4
LT		 2528 if ( info->params.data_rate ) {
2529 char_time = info->timeout/(32 * 5);
2530 if (!char_time)
2531 char_time++;
2532 } else
2533 char_time = 1;
d12341f9 2534
1da177e4
LT		 2535 if (timeout)
2536 char_time = min_t(unsigned long, char_time, timeout);
d12341f9 2537
1da177e4
LT		 2538 if (info->params.mode == MGSL_MODE_HDLC) {
2539 while (info->tx_active) {
2540 msleep_interruptible(jiffies_to_msecs(char_time));
2541 if (signal_pending(current))
2542 break;
2543 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2544 break;
2545 }
2546 } else {
2547 while ((info->tx_count || info->tx_active) &&
2548 info->tx_enabled) {
2549 msleep_interruptible(jiffies_to_msecs(char_time));
2550 if (signal_pending(current))
2551 break;
2552 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2553 break;
2554 }
2555 }
d12341f9 2556
1da177e4
LT		 2557exit:
2558 if (debug_level >= DEBUG_LEVEL_INFO)
2559 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2560 __FILE__,__LINE__, info->device_name );
2561}
2562
2563/* Called by tty_hangup() when a hangup is signaled.
2564 * This is the same as closing all open files for the port.
2565 */
2566static void mgslpc_hangup(struct tty_struct *tty)
2567{
2568 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
d12341f9 2569
1da177e4
LT		 2570 if (debug_level >= DEBUG_LEVEL_INFO)
2571 printk("%s(%d):mgslpc_hangup(%s)\n",
2572 __FILE__,__LINE__, info->device_name );
d12341f9 2573
1da177e4
LT		 2574 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2575 return;
2576
2577 mgslpc_flush_buffer(tty);
2578 shutdown(info);
d12341f9
JG		 2579
2580 info->count = 0;
1da177e4
LT		 2581 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2582 info->tty = NULL;
2583
2584 wake_up_interruptible(&info->open_wait);
2585}
2586
2587/* Block the current process until the specified port
2588 * is ready to be opened.
2589 */
2590static int block_til_ready(struct tty_struct *tty, struct file *filp,
2591 MGSLPC_INFO *info)
2592{
2593 DECLARE_WAITQUEUE(wait, current);
2594 int retval;
2595 int do_clocal = 0, extra_count = 0;
2596 unsigned long flags;
d12341f9 2597
1da177e4
LT		 2598 if (debug_level >= DEBUG_LEVEL_INFO)
2599 printk("%s(%d):block_til_ready on %s\n",
2600 __FILE__,__LINE__, tty->driver->name );
2601
2602 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2603 /* nonblock mode is set or port is not enabled */
2604 /* just verify that callout device is not active */
2605 info->flags |= ASYNC_NORMAL_ACTIVE;
2606 return 0;
2607 }
2608
2609 if (tty->termios->c_cflag & CLOCAL)
2610 do_clocal = 1;
2611
2612 /* Wait for carrier detect and the line to become
2613 * free (i.e., not in use by the callout). While we are in
2614 * this loop, info->count is dropped by one, so that
2615 * mgslpc_close() knows when to free things. We restore it upon
2616 * exit, either normal or abnormal.
2617 */
d12341f9 2618
1da177e4
LT		 2619 retval = 0;
2620 add_wait_queue(&info->open_wait, &wait);
d12341f9 2621
1da177e4
LT		 2622 if (debug_level >= DEBUG_LEVEL_INFO)
2623 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2624 __FILE__,__LINE__, tty->driver->name, info->count );
2625
2626 spin_lock_irqsave(&info->lock, flags);
2627 if (!tty_hung_up_p(filp)) {
2628 extra_count = 1;
2629 info->count--;
2630 }
2631 spin_unlock_irqrestore(&info->lock, flags);
2632 info->blocked_open++;
d12341f9 2633
1da177e4
LT		 2634 while (1) {
2635 if ((tty->termios->c_cflag & CBAUD)) {
2636 spin_lock_irqsave(&info->lock,flags);
2637 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2638 set_signals(info);
2639 spin_unlock_irqrestore(&info->lock,flags);
2640 }
d12341f9 2641
1da177e4 2642 set_current_state(TASK_INTERRUPTIBLE);
d12341f9 2643
1da177e4
LT		 2644 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2645 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2646 -EAGAIN : -ERESTARTSYS;
2647 break;
2648 }
d12341f9 2649
1da177e4
LT		 2650 spin_lock_irqsave(&info->lock,flags);
2651 get_signals(info);
2652 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 2653
1da177e4
LT		 2654 if (!(info->flags & ASYNC_CLOSING) &&
2655 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2656 break;
2657 }
d12341f9 2658
1da177e4
LT		 2659 if (signal_pending(current)) {
2660 retval = -ERESTARTSYS;
2661 break;
2662 }
d12341f9 2663
1da177e4
LT		 2664 if (debug_level >= DEBUG_LEVEL_INFO)
2665 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2666 __FILE__,__LINE__, tty->driver->name, info->count );
d12341f9 2667
1da177e4
LT		 2668 schedule();
2669 }
d12341f9 2670
1da177e4
LT		 2671 set_current_state(TASK_RUNNING);
2672 remove_wait_queue(&info->open_wait, &wait);
d12341f9 2673
1da177e4
LT		 2674 if (extra_count)
2675 info->count++;
2676 info->blocked_open--;
d12341f9 2677
1da177e4
LT		 2678 if (debug_level >= DEBUG_LEVEL_INFO)
2679 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2680 __FILE__,__LINE__, tty->driver->name, info->count );
d12341f9 2681
1da177e4
LT		 2682 if (!retval)
2683 info->flags |= ASYNC_NORMAL_ACTIVE;
d12341f9 2684
1da177e4
LT		 2685 return retval;
2686}
2687
2688static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2689{
2690 MGSLPC_INFO *info;
2691 int retval, line;
2692 unsigned long flags;
2693
d12341f9 2694 /* verify range of specified line number */
1da177e4
LT		 2695 line = tty->index;
2696 if ((line < 0) || (line >= mgslpc_device_count)) {
2697 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2698 __FILE__,__LINE__,line);
2699 return -ENODEV;
2700 }
2701
2702 /* find the info structure for the specified line */
2703 info = mgslpc_device_list;
2704 while(info && info->line != line)
2705 info = info->next_device;
2706 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2707 return -ENODEV;
d12341f9 2708
1da177e4
LT		 2709 tty->driver_data = info;
2710 info->tty = tty;
d12341f9 2711
1da177e4
LT		 2712 if (debug_level >= DEBUG_LEVEL_INFO)
2713 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2714 __FILE__,__LINE__,tty->driver->name, info->count);
2715
2716 /* If port is closing, signal caller to try again */
2717 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2718 if (info->flags & ASYNC_CLOSING)
2719 interruptible_sleep_on(&info->close_wait);
2720 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2721 -EAGAIN : -ERESTARTSYS);
2722 goto cleanup;
2723 }
d12341f9 2724
1da177e4
LT		 2725 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2726
2727 spin_lock_irqsave(&info->netlock, flags);
2728 if (info->netcount) {
2729 retval = -EBUSY;
2730 spin_unlock_irqrestore(&info->netlock, flags);
2731 goto cleanup;
2732 }
2733 info->count++;
2734 spin_unlock_irqrestore(&info->netlock, flags);
2735
2736 if (info->count == 1) {
2737 /* 1st open on this device, init hardware */
2738 retval = startup(info);
2739 if (retval < 0)
2740 goto cleanup;
2741 }
2742
2743 retval = block_til_ready(tty, filp, info);
2744 if (retval) {
2745 if (debug_level >= DEBUG_LEVEL_INFO)
2746 printk("%s(%d):block_til_ready(%s) returned %d\n",
2747 __FILE__,__LINE__, info->device_name, retval);
2748 goto cleanup;
2749 }
2750
2751 if (debug_level >= DEBUG_LEVEL_INFO)
2752 printk("%s(%d):mgslpc_open(%s) success\n",
2753 __FILE__,__LINE__, info->device_name);
2754 retval = 0;
d12341f9
JG		 2755
2756cleanup:
1da177e4
LT		 2757 if (retval) {
2758 if (tty->count == 1)
2759 info->tty = NULL; /* tty layer will release tty struct */
2760 if(info->count)
2761 info->count--;
2762 }
d12341f9 2763
1da177e4
LT		 2764 return retval;
2765}
2766
2767/*
2768 * /proc fs routines....
2769 */
2770
2771static inline int line_info(char *buf, MGSLPC_INFO *info)
2772{
2773 char stat_buf[30];
2774 int ret;
2775 unsigned long flags;
2776
2777 ret = sprintf(buf, "%s:io:%04X irq:%d",
2778 info->device_name, info->io_base, info->irq_level);
2779
2780 /* output current serial signal states */
2781 spin_lock_irqsave(&info->lock,flags);
2782 get_signals(info);
2783 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 2784
1da177e4
LT		 2785 stat_buf[0] = 0;
2786 stat_buf[1] = 0;
2787 if (info->serial_signals & SerialSignal_RTS)
2788 strcat(stat_buf, "|RTS");
2789 if (info->serial_signals & SerialSignal_CTS)
2790 strcat(stat_buf, "|CTS");
2791 if (info->serial_signals & SerialSignal_DTR)
2792 strcat(stat_buf, "|DTR");
2793 if (info->serial_signals & SerialSignal_DSR)
2794 strcat(stat_buf, "|DSR");
2795 if (info->serial_signals & SerialSignal_DCD)
2796 strcat(stat_buf, "|CD");
2797 if (info->serial_signals & SerialSignal_RI)
2798 strcat(stat_buf, "|RI");
2799
2800 if (info->params.mode == MGSL_MODE_HDLC) {
2801 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2802 info->icount.txok, info->icount.rxok);
2803 if (info->icount.txunder)
2804 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2805 if (info->icount.txabort)
2806 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2807 if (info->icount.rxshort)
d12341f9 2808 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
1da177e4
LT		 2809 if (info->icount.rxlong)
2810 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2811 if (info->icount.rxover)
2812 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2813 if (info->icount.rxcrc)
2814 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2815 } else {
2816 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2817 info->icount.tx, info->icount.rx);
2818 if (info->icount.frame)
2819 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2820 if (info->icount.parity)
2821 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2822 if (info->icount.brk)
d12341f9 2823 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
1da177e4
LT		 2824 if (info->icount.overrun)
2825 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2826 }
d12341f9 2827
1da177e4
LT		 2828 /* Append serial signal status to end */
2829 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
d12341f9 2830
1da177e4
LT		 2831 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2832 info->tx_active,info->bh_requested,info->bh_running,
2833 info->pending_bh);
d12341f9 2834
1da177e4
LT		 2835 return ret;
2836}
2837
2838/* Called to print information about devices
2839 */
2840static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2841 int *eof, void *data)
2842{
2843 int len = 0, l;
2844 off_t begin = 0;
2845 MGSLPC_INFO *info;
d12341f9 2846
1da177e4 2847 len += sprintf(page, "synclink driver:%s\n", driver_version);
d12341f9 2848
1da177e4
LT		 2849 info = mgslpc_device_list;
2850 while( info ) {
2851 l = line_info(page + len, info);
2852 len += l;
2853 if (len+begin > off+count)
2854 goto done;
2855 if (len+begin < off) {
2856 begin += len;
2857 len = 0;
2858 }
2859 info = info->next_device;
2860 }
2861
2862 *eof = 1;
2863done:
2864 if (off >= len+begin)
2865 return 0;
2866 *start = page + (off-begin);
2867 return ((count < begin+len-off) ? count : begin+len-off);
2868}
2869
cdaad343 2870static int rx_alloc_buffers(MGSLPC_INFO *info)
1da177e4
LT		 2871{
2872 /* each buffer has header and data */
2873 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2874
2875 /* calculate total allocation size for 8 buffers */
2876 info->rx_buf_total_size = info->rx_buf_size * 8;
2877
2878 /* limit total allocated memory */
2879 if (info->rx_buf_total_size > 0x10000)
2880 info->rx_buf_total_size = 0x10000;
2881
2882 /* calculate number of buffers */
2883 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2884
2885 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2886 if (info->rx_buf == NULL)
2887 return -ENOMEM;
2888
2889 rx_reset_buffers(info);
2890 return 0;
2891}
2892
cdaad343 2893static void rx_free_buffers(MGSLPC_INFO *info)
1da177e4 2894{
735d5661 2895 kfree(info->rx_buf);
1da177e4
LT		 2896 info->rx_buf = NULL;
2897}
2898
cdaad343 2899static int claim_resources(MGSLPC_INFO *info)
1da177e4
LT		 2900{
2901 if (rx_alloc_buffers(info) < 0 ) {
2902 printk( "Cant allocate rx buffer %s\n", info->device_name);
2903 release_resources(info);
2904 return -ENODEV;
d12341f9 2905 }
1da177e4
LT		 2906 return 0;
2907}
2908
cdaad343 2909static void release_resources(MGSLPC_INFO *info)
1da177e4
LT		 2910{
2911 if (debug_level >= DEBUG_LEVEL_INFO)
2912 printk("release_resources(%s)\n", info->device_name);
2913 rx_free_buffers(info);
2914}
2915
2916/* Add the specified device instance data structure to the
2917 * global linked list of devices and increment the device count.
d12341f9 2918 *
1da177e4
LT		 2919 * Arguments: info pointer to device instance data
2920 */
cdaad343 2921static void mgslpc_add_device(MGSLPC_INFO *info)
1da177e4
LT		 2922{
2923 info->next_device = NULL;
2924 info->line = mgslpc_device_count;
2925 sprintf(info->device_name,"ttySLP%d",info->line);
d12341f9 2926
1da177e4
LT		 2927 if (info->line < MAX_DEVICE_COUNT) {
2928 if (maxframe[info->line])
2929 info->max_frame_size = maxframe[info->line];
2930 info->dosyncppp = dosyncppp[info->line];
2931 }
2932
2933 mgslpc_device_count++;
d12341f9 2934
1da177e4
LT		 2935 if (!mgslpc_device_list)
2936 mgslpc_device_list = info;
d12341f9 2937 else {
1da177e4
LT		 2938 MGSLPC_INFO *current_dev = mgslpc_device_list;
2939 while( current_dev->next_device )
2940 current_dev = current_dev->next_device;
2941 current_dev->next_device = info;
2942 }
d12341f9 2943
1da177e4
LT		 2944 if (info->max_frame_size < 4096)
2945 info->max_frame_size = 4096;
2946 else if (info->max_frame_size > 65535)
2947 info->max_frame_size = 65535;
d12341f9 2948
1da177e4
LT		 2949 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2950 info->device_name, info->io_base, info->irq_level);
2951
af69c7f9 2952#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 2953 hdlcdev_init(info);
2954#endif
2955}
2956
cdaad343 2957static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
1da177e4
LT		 2958{
2959 MGSLPC_INFO *info = mgslpc_device_list;
2960 MGSLPC_INFO *last = NULL;
2961
2962 while(info) {
2963 if (info == remove_info) {
2964 if (last)
2965 last->next_device = info->next_device;
2966 else
2967 mgslpc_device_list = info->next_device;
af69c7f9 2968#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 2969 hdlcdev_exit(info);
2970#endif
2971 release_resources(info);
2972 kfree(info);
2973 mgslpc_device_count--;
2974 return;
2975 }
2976 last = info;
2977 info = info->next_device;
2978 }
2979}
2980
4af48c8c
DB		 2981static struct pcmcia_device_id mgslpc_ids[] = {
2982 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2983 PCMCIA_DEVICE_NULL
2984};
2985MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2986
1da177e4
LT		 2987static struct pcmcia_driver mgslpc_driver = {
2988 .owner = THIS_MODULE,
2989 .drv = {
2990 .name = "synclink_cs",
2991 },
15b99ac1 2992 .probe = mgslpc_probe,
cc3b4866 2993 .remove = mgslpc_detach,
4af48c8c 2994 .id_table = mgslpc_ids,
98e4c28b
DB		 2995 .suspend = mgslpc_suspend,
2996 .resume = mgslpc_resume,
1da177e4
LT		 2997};
2998
b68e31d0 2999static const struct tty_operations mgslpc_ops = {
1da177e4
LT		 3000 .open = mgslpc_open,
3001 .close = mgslpc_close,
3002 .write = mgslpc_write,
3003 .put_char = mgslpc_put_char,
3004 .flush_chars = mgslpc_flush_chars,
3005 .write_room = mgslpc_write_room,
3006 .chars_in_buffer = mgslpc_chars_in_buffer,
3007 .flush_buffer = mgslpc_flush_buffer,
3008 .ioctl = mgslpc_ioctl,
3009 .throttle = mgslpc_throttle,
3010 .unthrottle = mgslpc_unthrottle,
3011 .send_xchar = mgslpc_send_xchar,
3012 .break_ctl = mgslpc_break,
3013 .wait_until_sent = mgslpc_wait_until_sent,
3014 .read_proc = mgslpc_read_proc,
3015 .set_termios = mgslpc_set_termios,
3016 .stop = tx_pause,
3017 .start = tx_release,
3018 .hangup = mgslpc_hangup,
3019 .tiocmget = tiocmget,
3020 .tiocmset = tiocmset,
3021};
3022
3023static void synclink_cs_cleanup(void)
3024{
3025 int rc;
3026
3027 printk("Unloading %s: version %s\n", driver_name, driver_version);
3028
3029 while(mgslpc_device_list)
3030 mgslpc_remove_device(mgslpc_device_list);
3031
3032 if (serial_driver) {
3033 if ((rc = tty_unregister_driver(serial_driver)))
3034 printk("%s(%d) failed to unregister tty driver err=%d\n",
3035 __FILE__,__LINE__,rc);
3036 put_tty_driver(serial_driver);
3037 }
3038
3039 pcmcia_unregister_driver(&mgslpc_driver);
1da177e4
LT		 3040}
3041
3042static int __init synclink_cs_init(void)
3043{
3044 int rc;
3045
3046 if (break_on_load) {
3047 mgslpc_get_text_ptr();
3048 BREAKPOINT();
3049 }
3050
3051 printk("%s %s\n", driver_name, driver_version);
3052
3053 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3054 return rc;
3055
3056 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3057 if (!serial_driver) {
3058 rc = -ENOMEM;
3059 goto error;
3060 }
3061
3062 /* Initialize the tty_driver structure */
d12341f9 3063
1da177e4
LT		 3064 serial_driver->owner = THIS_MODULE;
3065 serial_driver->driver_name = "synclink_cs";
3066 serial_driver->name = "ttySLP";
3067 serial_driver->major = ttymajor;
3068 serial_driver->minor_start = 64;
3069 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3070 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3071 serial_driver->init_termios = tty_std_termios;
3072 serial_driver->init_termios.c_cflag =
3073 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3074 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3075 tty_set_operations(serial_driver, &mgslpc_ops);
3076
3077 if ((rc = tty_register_driver(serial_driver)) < 0) {
3078 printk("%s(%d):Couldn't register serial driver\n",
3079 __FILE__,__LINE__);
3080 put_tty_driver(serial_driver);
3081 serial_driver = NULL;
3082 goto error;
3083 }
d12341f9 3084
1da177e4
LT		 3085 printk("%s %s, tty major#%d\n",
3086 driver_name, driver_version,
3087 serial_driver->major);
d12341f9 3088
1da177e4
LT		 3089 return 0;
3090
3091error:
3092 synclink_cs_cleanup();
3093 return rc;
3094}
3095
d12341f9 3096static void __exit synclink_cs_exit(void)
1da177e4
LT		 3097{
3098 synclink_cs_cleanup();
3099}
3100
3101module_init(synclink_cs_init);
3102module_exit(synclink_cs_exit);
3103
3104static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3105{
3106 unsigned int M, N;
3107 unsigned char val;
3108
d12341f9
JG		 3109 /* note:standard BRG mode is broken in V3.2 chip
3110 * so enhanced mode is always used
1da177e4
LT		 3111 */
3112
3113 if (rate) {
3114 N = 3686400 / rate;
3115 if (!N)
3116 N = 1;
3117 N >>= 1;
3118 for (M = 1; N > 64 && M < 16; M++)
3119 N >>= 1;
3120 N--;
3121
3122 /* BGR[5..0] = N
3123 * BGR[9..6] = M
3124 * BGR[7..0] contained in BGR register
3125 * BGR[9..8] contained in CCR2[7..6]
3126 * divisor = (N+1)*2^M
3127 *
3128 * Note: M *must* not be zero (causes asymetric duty cycle)
d12341f9 3129 */
1da177e4
LT		 3130 write_reg(info, (unsigned char) (channel + BGR),
3131 (unsigned char) ((M << 6) + N));
3132 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3133 val |= ((M << 4) & 0xc0);
3134 write_reg(info, (unsigned char) (channel + CCR2), val);
3135 }
3136}
3137
3138/* Enabled the AUX clock output at the specified frequency.
3139 */
3140static void enable_auxclk(MGSLPC_INFO *info)
3141{
3142 unsigned char val;
d12341f9 3143
1da177e4
LT		 3144 /* MODE
3145 *
3146 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3147 * 05 ADM Address Mode, 0 = no addr recognition
3148 * 04 TMD Timer Mode, 0 = external
3149 * 03 RAC Receiver Active, 0 = inactive
3150 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3151 * 01 TRS Timer Resolution, 1=512
3152 * 00 TLP Test Loop, 0 = no loop
3153 *
3154 * 1000 0010
d12341f9 3155 */
1da177e4 3156 val = 0x82;
d12341f9
JG		 3157
3158 /* channel B RTS is used to enable AUXCLK driver on SP505 */
1da177e4
LT		 3159 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3160 val |= BIT2;
3161 write_reg(info, CHB + MODE, val);
d12341f9 3162
1da177e4
LT		 3163 /* CCR0
3164 *
3165 * 07 PU Power Up, 1=active, 0=power down
3166 * 06 MCE Master Clock Enable, 1=enabled
3167 * 05 Reserved, 0
3168 * 04..02 SC[2..0] Encoding
3169 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3170 *
3171 * 11000000
d12341f9 3172 */
1da177e4 3173 write_reg(info, CHB + CCR0, 0xc0);
d12341f9 3174
1da177e4
LT		 3175 /* CCR1
3176 *
3177 * 07 SFLG Shared Flag, 0 = disable shared flags
3178 * 06 GALP Go Active On Loop, 0 = not used
3179 * 05 GLP Go On Loop, 0 = not used
3180 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3181 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3182 * 02..00 CM[2..0] Clock Mode
3183 *
3184 * 0001 0111
d12341f9 3185 */
1da177e4 3186 write_reg(info, CHB + CCR1, 0x17);
d12341f9 3187
1da177e4
LT		 3188 /* CCR2 (Channel B)
3189 *
3190 * 07..06 BGR[9..8] Baud rate bits 9..8
3191 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3192 * 04 SSEL Clock source select, 1=submode b
3193 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3194 * 02 RWX Read/Write Exchange 0=disabled
3195 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3196 * 00 DIV, data inversion 0=disabled, 1=enabled
3197 *
3198 * 0011 1000
d12341f9 3199 */
1da177e4
LT		 3200 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3201 write_reg(info, CHB + CCR2, 0x38);
3202 else
3203 write_reg(info, CHB + CCR2, 0x30);
d12341f9 3204
1da177e4
LT		 3205 /* CCR4
3206 *
3207 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3208 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3209 * 05 TST1 Test Pin, 0=normal operation
3210 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3211 * 03..02 Reserved, must be 0
3212 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3213 *
3214 * 0101 0000
d12341f9 3215 */
1da177e4 3216 write_reg(info, CHB + CCR4, 0x50);
d12341f9 3217
1da177e4
LT		 3218 /* if auxclk not enabled, set internal BRG so
3219 * CTS transitions can be detected (requires TxC)
d12341f9 3220 */
1da177e4
LT		 3221 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3222 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3223 else
3224 mgslpc_set_rate(info, CHB, 921600);
3225}
3226
d12341f9 3227static void loopback_enable(MGSLPC_INFO *info)
1da177e4
LT		 3228{
3229 unsigned char val;
d12341f9
JG		 3230
3231 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
1da177e4
LT		 3232 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3233 write_reg(info, CHA + CCR1, val);
d12341f9
JG		 3234
3235 /* CCR2:04 SSEL Clock source select, 1=submode b */
1da177e4
LT		 3236 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3237 write_reg(info, CHA + CCR2, val);
d12341f9
JG		 3238
3239 /* set LinkSpeed if available, otherwise default to 2Mbps */
1da177e4
LT		 3240 if (info->params.clock_speed)
3241 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3242 else
3243 mgslpc_set_rate(info, CHA, 1843200);
d12341f9
JG		 3244
3245 /* MODE:00 TLP Test Loop, 1=loopback enabled */
1da177e4
LT		 3246 val = read_reg(info, CHA + MODE) | BIT0;
3247 write_reg(info, CHA + MODE, val);
3248}
3249
cdaad343 3250static void hdlc_mode(MGSLPC_INFO *info)
1da177e4
LT		 3251{
3252 unsigned char val;
3253 unsigned char clkmode, clksubmode;
3254
d12341f9 3255 /* disable all interrupts */
1da177e4
LT		 3256 irq_disable(info, CHA, 0xffff);
3257 irq_disable(info, CHB, 0xffff);
3258 port_irq_disable(info, 0xff);
d12341f9
JG		 3259
3260 /* assume clock mode 0a, rcv=RxC xmt=TxC */
1da177e4
LT		 3261 clkmode = clksubmode = 0;
3262 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3263 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
d12341f9 3264 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
1da177e4
LT		 3265 clkmode = 7;
3266 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3267 && info->params.flags & HDLC_FLAG_TXC_BRG) {
d12341f9 3268 /* clock mode 7b, rcv = BRG, xmt = BRG */
1da177e4
LT		 3269 clkmode = 7;
3270 clksubmode = 1;
3271 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3272 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
d12341f9 3273 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
1da177e4
LT		 3274 clkmode = 6;
3275 clksubmode = 1;
3276 } else {
d12341f9 3277 /* clock mode 6a, rcv = DPLL, xmt = TxC */
1da177e4
LT		 3278 clkmode = 6;
3279 }
3280 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
d12341f9 3281 /* clock mode 0b, rcv = RxC, xmt = BRG */
1da177e4
LT		 3282 clksubmode = 1;
3283 }
d12341f9 3284
1da177e4
LT		 3285 /* MODE
3286 *
3287 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3288 * 05 ADM Address Mode, 0 = no addr recognition
3289 * 04 TMD Timer Mode, 0 = external
3290 * 03 RAC Receiver Active, 0 = inactive
3291 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3292 * 01 TRS Timer Resolution, 1=512
3293 * 00 TLP Test Loop, 0 = no loop
3294 *
3295 * 1000 0010
d12341f9 3296 */
1da177e4
LT		 3297 val = 0x82;
3298 if (info->params.loopback)
3299 val |= BIT0;
d12341f9
JG		 3300
3301 /* preserve RTS state */
1da177e4
LT		 3302 if (info->serial_signals & SerialSignal_RTS)
3303 val |= BIT2;
3304 write_reg(info, CHA + MODE, val);
d12341f9 3305
1da177e4
LT		 3306 /* CCR0
3307 *
3308 * 07 PU Power Up, 1=active, 0=power down
3309 * 06 MCE Master Clock Enable, 1=enabled
3310 * 05 Reserved, 0
3311 * 04..02 SC[2..0] Encoding
3312 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3313 *
3314 * 11000000
d12341f9 3315 */
1da177e4
LT		 3316 val = 0xc0;
3317 switch (info->params.encoding)
3318 {
3319 case HDLC_ENCODING_NRZI:
3320 val |= BIT3;
3321 break;
3322 case HDLC_ENCODING_BIPHASE_SPACE:
3323 val |= BIT4;
3324 break; // FM0
3325 case HDLC_ENCODING_BIPHASE_MARK:
3326 val |= BIT4 + BIT2;
3327 break; // FM1
3328 case HDLC_ENCODING_BIPHASE_LEVEL:
3329 val |= BIT4 + BIT3;
3330 break; // Manchester
3331 }
3332 write_reg(info, CHA + CCR0, val);
d12341f9 3333
1da177e4
LT		 3334 /* CCR1
3335 *
3336 * 07 SFLG Shared Flag, 0 = disable shared flags
3337 * 06 GALP Go Active On Loop, 0 = not used
3338 * 05 GLP Go On Loop, 0 = not used
3339 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3340 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3341 * 02..00 CM[2..0] Clock Mode
3342 *
3343 * 0001 0000
d12341f9 3344 */
1da177e4
LT		 3345 val = 0x10 + clkmode;
3346 write_reg(info, CHA + CCR1, val);
d12341f9 3347
1da177e4
LT		 3348 /* CCR2
3349 *
3350 * 07..06 BGR[9..8] Baud rate bits 9..8
3351 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3352 * 04 SSEL Clock source select, 1=submode b
3353 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3354 * 02 RWX Read/Write Exchange 0=disabled
3355 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3356 * 00 DIV, data inversion 0=disabled, 1=enabled
3357 *
3358 * 0000 0000
d12341f9 3359 */
1da177e4
LT		 3360 val = 0x00;
3361 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3362 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3363 val |= BIT5;
3364 if (clksubmode)
3365 val |= BIT4;
3366 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3367 val |= BIT1;
3368 if (info->params.encoding == HDLC_ENCODING_NRZB)
3369 val |= BIT0;
3370 write_reg(info, CHA + CCR2, val);
d12341f9 3371
1da177e4
LT		 3372 /* CCR3
3373 *
3374 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3375 * 05 EPT Enable preamble transmission, 1=enabled
3376 * 04 RADD Receive address pushed to FIFO, 0=disabled
3377 * 03 CRL CRC Reset Level, 0=FFFF
3378 * 02 RCRC Rx CRC 0=On 1=Off
3379 * 01 TCRC Tx CRC 0=On 1=Off
3380 * 00 PSD DPLL Phase Shift Disable
3381 *
3382 * 0000 0000
d12341f9 3383 */
1da177e4
LT		 3384 val = 0x00;
3385 if (info->params.crc_type == HDLC_CRC_NONE)
3386 val |= BIT2 + BIT1;
3387 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3388 val |= BIT5;
3389 switch (info->params.preamble_length)
3390 {
3391 case HDLC_PREAMBLE_LENGTH_16BITS:
3392 val |= BIT6;
3393 break;
3394 case HDLC_PREAMBLE_LENGTH_32BITS:
3395 val |= BIT6;
3396 break;
3397 case HDLC_PREAMBLE_LENGTH_64BITS:
3398 val |= BIT7 + BIT6;
3399 break;
3400 }
3401 write_reg(info, CHA + CCR3, val);
d12341f9
JG		 3402
3403 /* PRE - Preamble pattern */
1da177e4
LT		 3404 val = 0;
3405 switch (info->params.preamble)
3406 {
3407 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3408 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3409 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3410 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3411 }
3412 write_reg(info, CHA + PRE, val);
d12341f9 3413
1da177e4
LT		 3414 /* CCR4
3415 *
3416 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3417 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3418 * 05 TST1 Test Pin, 0=normal operation
3419 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3420 * 03..02 Reserved, must be 0
3421 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3422 *
3423 * 0101 0000
d12341f9 3424 */
1da177e4
LT		 3425 val = 0x50;
3426 write_reg(info, CHA + CCR4, val);
3427 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3428 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3429 else
3430 mgslpc_set_rate(info, CHA, info->params.clock_speed);
d12341f9 3431
1da177e4
LT		 3432 /* RLCR Receive length check register
3433 *
3434 * 7 1=enable receive length check
3435 * 6..0 Max frame length = (RL + 1) * 32
d12341f9 3436 */
1da177e4 3437 write_reg(info, CHA + RLCR, 0);
d12341f9 3438
1da177e4
LT		 3439 /* XBCH Transmit Byte Count High
3440 *
3441 * 07 DMA mode, 0 = interrupt driven
3442 * 06 NRM, 0=ABM (ignored)
3443 * 05 CAS Carrier Auto Start
3444 * 04 XC Transmit Continuously (ignored)
3445 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3446 *
3447 * 0000 0000
d12341f9 3448 */
1da177e4
LT		 3449 val = 0x00;
3450 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3451 val |= BIT5;
3452 write_reg(info, CHA + XBCH, val);
3453 enable_auxclk(info);
3454 if (info->params.loopback || info->testing_irq)
3455 loopback_enable(info);
3456 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3457 {
3458 irq_enable(info, CHB, IRQ_CTS);
d12341f9 3459 /* PVR[3] 1=AUTO CTS active */
1da177e4
LT		 3460 set_reg_bits(info, CHA + PVR, BIT3);
3461 } else
3462 clear_reg_bits(info, CHA + PVR, BIT3);
3463
3464 irq_enable(info, CHA,
3465 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3466 IRQ_UNDERRUN + IRQ_TXFIFO);
3467 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3468 wait_command_complete(info, CHA);
3469 read_reg16(info, CHA + ISR); /* clear pending IRQs */
d12341f9 3470
1da177e4
LT		 3471 /* Master clock mode enabled above to allow reset commands
3472 * to complete even if no data clocks are present.
3473 *
3474 * Disable master clock mode for normal communications because
3475 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3476 * IRQ when in master clock mode.
3477 *
3478 * Leave master clock mode enabled for IRQ test because the
3479 * timer IRQ used by the test can only happen in master clock mode.
d12341f9 3480 */
1da177e4
LT		 3481 if (!info->testing_irq)
3482 clear_reg_bits(info, CHA + CCR0, BIT6);
3483
3484 tx_set_idle(info);
3485
3486 tx_stop(info);
3487 rx_stop(info);
3488}
3489
cdaad343 3490static void rx_stop(MGSLPC_INFO *info)
1da177e4
LT		 3491{
3492 if (debug_level >= DEBUG_LEVEL_ISR)
3493 printk("%s(%d):rx_stop(%s)\n",
3494 __FILE__,__LINE__, info->device_name );
d12341f9
JG		 3495
3496 /* MODE:03 RAC Receiver Active, 0=inactive */
1da177e4
LT		 3497 clear_reg_bits(info, CHA + MODE, BIT3);
3498
3499 info->rx_enabled = 0;
3500 info->rx_overflow = 0;
3501}
3502
cdaad343 3503static void rx_start(MGSLPC_INFO *info)
1da177e4
LT		 3504{
3505 if (debug_level >= DEBUG_LEVEL_ISR)
3506 printk("%s(%d):rx_start(%s)\n",
3507 __FILE__,__LINE__, info->device_name );
3508
3509 rx_reset_buffers(info);
3510 info->rx_enabled = 0;
3511 info->rx_overflow = 0;
3512
d12341f9 3513 /* MODE:03 RAC Receiver Active, 1=active */
1da177e4
LT		 3514 set_reg_bits(info, CHA + MODE, BIT3);
3515
3516 info->rx_enabled = 1;
3517}
3518
cdaad343 3519static void tx_start(MGSLPC_INFO *info)
1da177e4
LT		 3520{
3521 if (debug_level >= DEBUG_LEVEL_ISR)
3522 printk("%s(%d):tx_start(%s)\n",
3523 __FILE__,__LINE__, info->device_name );
d12341f9 3524
1da177e4
LT		 3525 if (info->tx_count) {
3526 /* If auto RTS enabled and RTS is inactive, then assert */
3527 /* RTS and set a flag indicating that the driver should */
3528 /* negate RTS when the transmission completes. */
3529 info->drop_rts_on_tx_done = 0;
3530
3531 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3532 get_signals(info);
3533 if (!(info->serial_signals & SerialSignal_RTS)) {
3534 info->serial_signals |= SerialSignal_RTS;
3535 set_signals(info);
3536 info->drop_rts_on_tx_done = 1;
3537 }
3538 }
3539
3540 if (info->params.mode == MGSL_MODE_ASYNC) {
3541 if (!info->tx_active) {
3542 info->tx_active = 1;
3543 tx_ready(info);
3544 }
3545 } else {
3546 info->tx_active = 1;
3547 tx_ready(info);
40565f19
JS		 3548 mod_timer(&info->tx_timer, jiffies +
3549 msecs_to_jiffies(5000));
1da177e4
LT		 3550 }
3551 }
3552
3553 if (!info->tx_enabled)
3554 info->tx_enabled = 1;
3555}
3556
cdaad343 3557static void tx_stop(MGSLPC_INFO *info)
1da177e4
LT		 3558{
3559 if (debug_level >= DEBUG_LEVEL_ISR)
3560 printk("%s(%d):tx_stop(%s)\n",
3561 __FILE__,__LINE__, info->device_name );
d12341f9
JG		 3562
3563 del_timer(&info->tx_timer);
1da177e4
LT		 3564
3565 info->tx_enabled = 0;
3566 info->tx_active = 0;
3567}
3568
3569/* Reset the adapter to a known state and prepare it for further use.
3570 */
cdaad343 3571static void reset_device(MGSLPC_INFO *info)
1da177e4 3572{
d12341f9 3573 /* power up both channels (set BIT7) */
1da177e4
LT		 3574 write_reg(info, CHA + CCR0, 0x80);
3575 write_reg(info, CHB + CCR0, 0x80);
3576 write_reg(info, CHA + MODE, 0);
3577 write_reg(info, CHB + MODE, 0);
d12341f9
JG		 3578
3579 /* disable all interrupts */
1da177e4
LT		 3580 irq_disable(info, CHA, 0xffff);
3581 irq_disable(info, CHB, 0xffff);
3582 port_irq_disable(info, 0xff);
d12341f9 3583
1da177e4
LT		 3584 /* PCR Port Configuration Register
3585 *
3586 * 07..04 DEC[3..0] Serial I/F select outputs
3587 * 03 output, 1=AUTO CTS control enabled
3588 * 02 RI Ring Indicator input 0=active
3589 * 01 DSR input 0=active
3590 * 00 DTR output 0=active
3591 *
3592 * 0000 0110
d12341f9 3593 */
1da177e4 3594 write_reg(info, PCR, 0x06);
d12341f9 3595
1da177e4
LT		 3596 /* PVR Port Value Register
3597 *
3598 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3599 * 03 AUTO CTS output 1=enabled
3600 * 02 RI Ring Indicator input
3601 * 01 DSR input
3602 * 00 DTR output (1=inactive)
3603 *
3604 * 0000 0001
3605 */
3606// write_reg(info, PVR, PVR_DTR);
d12341f9 3607
1da177e4
LT		 3608 /* IPC Interrupt Port Configuration
3609 *
3610 * 07 VIS 1=Masked interrupts visible
3611 * 06..05 Reserved, 0
3612 * 04..03 SLA Slave address, 00 ignored
3613 * 02 CASM Cascading Mode, 1=daisy chain
3614 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3615 *
3616 * 0000 0101
d12341f9 3617 */
1da177e4
LT		 3618 write_reg(info, IPC, 0x05);
3619}
3620
cdaad343 3621static void async_mode(MGSLPC_INFO *info)
1da177e4
LT		 3622{
3623 unsigned char val;
3624
d12341f9 3625 /* disable all interrupts */
1da177e4
LT		 3626 irq_disable(info, CHA, 0xffff);
3627 irq_disable(info, CHB, 0xffff);
3628 port_irq_disable(info, 0xff);
d12341f9 3629
1da177e4
LT		 3630 /* MODE
3631 *
3632 * 07 Reserved, 0
3633 * 06 FRTS RTS State, 0=active
3634 * 05 FCTS Flow Control on CTS
3635 * 04 FLON Flow Control Enable
3636 * 03 RAC Receiver Active, 0 = inactive
3637 * 02 RTS 0=Auto RTS, 1=manual RTS
3638 * 01 TRS Timer Resolution, 1=512
3639 * 00 TLP Test Loop, 0 = no loop
3640 *
3641 * 0000 0110
d12341f9 3642 */
1da177e4
LT		 3643 val = 0x06;
3644 if (info->params.loopback)
3645 val |= BIT0;
d12341f9
JG		 3646
3647 /* preserve RTS state */
1da177e4
LT		 3648 if (!(info->serial_signals & SerialSignal_RTS))
3649 val |= BIT6;
3650 write_reg(info, CHA + MODE, val);
d12341f9 3651
1da177e4
LT		 3652 /* CCR0
3653 *
3654 * 07 PU Power Up, 1=active, 0=power down
3655 * 06 MCE Master Clock Enable, 1=enabled
3656 * 05 Reserved, 0
3657 * 04..02 SC[2..0] Encoding, 000=NRZ
3658 * 01..00 SM[1..0] Serial Mode, 11=Async
3659 *
3660 * 1000 0011
d12341f9 3661 */
1da177e4 3662 write_reg(info, CHA + CCR0, 0x83);
d12341f9 3663
1da177e4
LT		 3664 /* CCR1
3665 *
3666 * 07..05 Reserved, 0
3667 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3668 * 03 BCR Bit Clock Rate, 1=16x
3669 * 02..00 CM[2..0] Clock Mode, 111=BRG
3670 *
3671 * 0001 1111
d12341f9 3672 */
1da177e4 3673 write_reg(info, CHA + CCR1, 0x1f);
d12341f9 3674
1da177e4
LT		 3675 /* CCR2 (channel A)
3676 *
3677 * 07..06 BGR[9..8] Baud rate bits 9..8
3678 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3679 * 04 SSEL Clock source select, 1=submode b
3680 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3681 * 02 RWX Read/Write Exchange 0=disabled
3682 * 01 Reserved, 0
3683 * 00 DIV, data inversion 0=disabled, 1=enabled
3684 *
3685 * 0001 0000
d12341f9 3686 */
1da177e4 3687 write_reg(info, CHA + CCR2, 0x10);
d12341f9 3688
1da177e4
LT		 3689 /* CCR3
3690 *
3691 * 07..01 Reserved, 0
3692 * 00 PSD DPLL Phase Shift Disable
3693 *
3694 * 0000 0000
d12341f9 3695 */
1da177e4 3696 write_reg(info, CHA + CCR3, 0);
d12341f9 3697
1da177e4
LT		 3698 /* CCR4
3699 *
3700 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3701 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3702 * 05 TST1 Test Pin, 0=normal operation
3703 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3704 * 03..00 Reserved, must be 0
3705 *
3706 * 0101 0000
d12341f9 3707 */
1da177e4
LT		 3708 write_reg(info, CHA + CCR4, 0x50);
3709 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
d12341f9 3710
1da177e4
LT		 3711 /* DAFO Data Format
3712 *
3713 * 07 Reserved, 0
3714 * 06 XBRK transmit break, 0=normal operation
3715 * 05 Stop bits (0=1, 1=2)
3716 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3717 * 02 PAREN Parity Enable
3718 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3719 *
d12341f9 3720 */
1da177e4
LT		 3721 val = 0x00;
3722 if (info->params.data_bits != 8)
3723 val |= BIT0; /* 7 bits */
3724 if (info->params.stop_bits != 1)
3725 val |= BIT5;
3726 if (info->params.parity != ASYNC_PARITY_NONE)
3727 {
3728 val |= BIT2; /* Parity enable */
3729 if (info->params.parity == ASYNC_PARITY_ODD)
3730 val |= BIT3;
3731 else
3732 val |= BIT4;
3733 }
3734 write_reg(info, CHA + DAFO, val);
d12341f9 3735
1da177e4
LT		 3736 /* RFC Rx FIFO Control
3737 *
3738 * 07 Reserved, 0
3739 * 06 DPS, 1=parity bit not stored in data byte
3740 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3741 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3742 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3743 * 01 Reserved, 0
3744 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3745 *
3746 * 0101 1100
d12341f9 3747 */
1da177e4 3748 write_reg(info, CHA + RFC, 0x5c);
d12341f9 3749
1da177e4
LT		 3750 /* RLCR Receive length check register
3751 *
3752 * Max frame length = (RL + 1) * 32
d12341f9 3753 */
1da177e4 3754 write_reg(info, CHA + RLCR, 0);
d12341f9 3755
1da177e4
LT		 3756 /* XBCH Transmit Byte Count High
3757 *
3758 * 07 DMA mode, 0 = interrupt driven
3759 * 06 NRM, 0=ABM (ignored)
3760 * 05 CAS Carrier Auto Start
3761 * 04 XC Transmit Continuously (ignored)
3762 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3763 *
3764 * 0000 0000
d12341f9 3765 */
1da177e4
LT		 3766 val = 0x00;
3767 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3768 val |= BIT5;
3769 write_reg(info, CHA + XBCH, val);
3770 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3771 irq_enable(info, CHA, IRQ_CTS);
d12341f9
JG		 3772
3773 /* MODE:03 RAC Receiver Active, 1=active */
1da177e4
LT		 3774 set_reg_bits(info, CHA + MODE, BIT3);
3775 enable_auxclk(info);
3776 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3777 irq_enable(info, CHB, IRQ_CTS);
d12341f9 3778 /* PVR[3] 1=AUTO CTS active */
1da177e4
LT		 3779 set_reg_bits(info, CHA + PVR, BIT3);
3780 } else
3781 clear_reg_bits(info, CHA + PVR, BIT3);
3782 irq_enable(info, CHA,
3783 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3784 IRQ_ALLSENT + IRQ_TXFIFO);
3785 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3786 wait_command_complete(info, CHA);
3787 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3788}
3789
3790/* Set the HDLC idle mode for the transmitter.
3791 */
cdaad343 3792static void tx_set_idle(MGSLPC_INFO *info)
1da177e4 3793{
d12341f9 3794 /* Note: ESCC2 only supports flags and one idle modes */
1da177e4
LT		 3795 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3796 set_reg_bits(info, CHA + CCR1, BIT3);
3797 else
3798 clear_reg_bits(info, CHA + CCR1, BIT3);
3799}
3800
3801/* get state of the V24 status (input) signals.
3802 */
cdaad343 3803static void get_signals(MGSLPC_INFO *info)
1da177e4
LT		 3804{
3805 unsigned char status = 0;
d12341f9
JG		 3806
3807 /* preserve DTR and RTS */
1da177e4
LT		 3808 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3809
3810 if (read_reg(info, CHB + VSTR) & BIT7)
3811 info->serial_signals |= SerialSignal_DCD;
3812 if (read_reg(info, CHB + STAR) & BIT1)
3813 info->serial_signals |= SerialSignal_CTS;
3814
3815 status = read_reg(info, CHA + PVR);
3816 if (!(status & PVR_RI))
3817 info->serial_signals |= SerialSignal_RI;
3818 if (!(status & PVR_DSR))
3819 info->serial_signals |= SerialSignal_DSR;
3820}
3821
3822/* Set the state of DTR and RTS based on contents of
3823 * serial_signals member of device extension.
3824 */
cdaad343 3825static void set_signals(MGSLPC_INFO *info)
1da177e4
LT		 3826{
3827 unsigned char val;
3828
3829 val = read_reg(info, CHA + MODE);
3830 if (info->params.mode == MGSL_MODE_ASYNC) {
3831 if (info->serial_signals & SerialSignal_RTS)
3832 val &= ~BIT6;
3833 else
3834 val |= BIT6;
3835 } else {
3836 if (info->serial_signals & SerialSignal_RTS)
3837 val |= BIT2;
3838 else
3839 val &= ~BIT2;
3840 }
3841 write_reg(info, CHA + MODE, val);
3842
3843 if (info->serial_signals & SerialSignal_DTR)
3844 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3845 else
3846 set_reg_bits(info, CHA + PVR, PVR_DTR);
3847}
3848
cdaad343 3849static void rx_reset_buffers(MGSLPC_INFO *info)
1da177e4
LT		 3850{
3851 RXBUF *buf;
3852 int i;
3853
3854 info->rx_put = 0;
3855 info->rx_get = 0;
3856 info->rx_frame_count = 0;
3857 for (i=0 ; i < info->rx_buf_count ; i++) {
3858 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3859 buf->status = buf->count = 0;
3860 }
3861}
3862
3863/* Attempt to return a received HDLC frame
3864 * Only frames received without errors are returned.
3865 *
3866 * Returns 1 if frame returned, otherwise 0
3867 */
cdaad343 3868static int rx_get_frame(MGSLPC_INFO *info)
1da177e4
LT		 3869{
3870 unsigned short status;
3871 RXBUF *buf;
3872 unsigned int framesize = 0;
3873 unsigned long flags;
3874 struct tty_struct *tty = info->tty;
3875 int return_frame = 0;
d12341f9 3876
1da177e4
LT		 3877 if (info->rx_frame_count == 0)
3878 return 0;
3879
3880 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3881
3882 status = buf->status;
3883
3884 /* 07 VFR 1=valid frame
3885 * 06 RDO 1=data overrun
3886 * 05 CRC 1=OK, 0=error
3887 * 04 RAB 1=frame aborted
3888 */
3889 if ((status & 0xf0) != 0xA0) {
3890 if (!(status & BIT7) || (status & BIT4))
3891 info->icount.rxabort++;
3892 else if (status & BIT6)
3893 info->icount.rxover++;
3894 else if (!(status & BIT5)) {
3895 info->icount.rxcrc++;
3896 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3897 return_frame = 1;
3898 }
3899 framesize = 0;
af69c7f9 3900#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 3901 {
3902 struct net_device_stats *stats = hdlc_stats(info->netdev);
3903 stats->rx_errors++;
3904 stats->rx_frame_errors++;
3905 }
3906#endif
3907 } else
3908 return_frame = 1;
3909
3910 if (return_frame)
3911 framesize = buf->count;
3912
3913 if (debug_level >= DEBUG_LEVEL_BH)
3914 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3915 __FILE__,__LINE__,info->device_name,status,framesize);
d12341f9 3916
1da177e4 3917 if (debug_level >= DEBUG_LEVEL_DATA)
d12341f9
JG		 3918 trace_block(info, buf->data, framesize, 0);
3919
1da177e4
LT		 3920 if (framesize) {
3921 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3922 framesize+1 > info->max_frame_size) ||
3923 framesize > info->max_frame_size)
3924 info->icount.rxlong++;
3925 else {
3926 if (status & BIT5)
3927 info->icount.rxok++;
3928
3929 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3930 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3931 ++framesize;
3932 }
3933
af69c7f9 3934#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 3935 if (info->netcount)
3936 hdlcdev_rx(info, buf->data, framesize);
3937 else
3938#endif
3939 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3940 }
3941 }
3942
3943 spin_lock_irqsave(&info->lock,flags);
3944 buf->status = buf->count = 0;
3945 info->rx_frame_count--;
3946 info->rx_get++;
3947 if (info->rx_get >= info->rx_buf_count)
3948 info->rx_get = 0;
3949 spin_unlock_irqrestore(&info->lock,flags);
3950
3951 return 1;
3952}
3953
cdaad343 3954static BOOLEAN register_test(MGSLPC_INFO *info)
1da177e4 3955{
d12341f9 3956 static unsigned char patterns[] =
1da177e4 3957 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
fe971071 3958 static unsigned int count = ARRAY_SIZE(patterns);
1da177e4
LT		 3959 unsigned int i;
3960 BOOLEAN rc = TRUE;
3961 unsigned long flags;
3962
3963 spin_lock_irqsave(&info->lock,flags);
3964 reset_device(info);
3965
3966 for (i = 0; i < count; i++) {
3967 write_reg(info, XAD1, patterns[i]);
3968 write_reg(info, XAD2, patterns[(i + 1) % count]);
fe971071 3969 if ((read_reg(info, XAD1) != patterns[i]) ||
1da177e4
LT		 3970 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3971 rc = FALSE;
3972 break;
3973 }
3974 }
3975
3976 spin_unlock_irqrestore(&info->lock,flags);
3977 return rc;
3978}
3979
cdaad343 3980static BOOLEAN irq_test(MGSLPC_INFO *info)
1da177e4
LT		 3981{
3982 unsigned long end_time;
3983 unsigned long flags;
3984
3985 spin_lock_irqsave(&info->lock,flags);
3986 reset_device(info);
3987
3988 info->testing_irq = TRUE;
3989 hdlc_mode(info);
3990
3991 info->irq_occurred = FALSE;
3992
3993 /* init hdlc mode */
3994
3995 irq_enable(info, CHA, IRQ_TIMER);
3996 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3997 issue_command(info, CHA, CMD_START_TIMER);
3998
3999 spin_unlock_irqrestore(&info->lock,flags);
4000
4001 end_time=100;
4002 while(end_time-- && !info->irq_occurred) {
4003 msleep_interruptible(10);
4004 }
d12341f9 4005
1da177e4
LT		 4006 info->testing_irq = FALSE;
4007
4008 spin_lock_irqsave(&info->lock,flags);
4009 reset_device(info);
4010 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 4011
1da177e4
LT		 4012 return info->irq_occurred ? TRUE : FALSE;
4013}
4014
cdaad343 4015static int adapter_test(MGSLPC_INFO *info)
1da177e4
LT		 4016{
4017 if (!register_test(info)) {
4018 info->init_error = DiagStatus_AddressFailure;
4019 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4020 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4021 return -ENODEV;
4022 }
4023
4024 if (!irq_test(info)) {
4025 info->init_error = DiagStatus_IrqFailure;
4026 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4027 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4028 return -ENODEV;
4029 }
4030
4031 if (debug_level >= DEBUG_LEVEL_INFO)
4032 printk("%s(%d):device %s passed diagnostics\n",
4033 __FILE__,__LINE__,info->device_name);
4034 return 0;
4035}
4036
cdaad343 4037static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
1da177e4
LT		 4038{
4039 int i;
4040 int linecount;
4041 if (xmit)
4042 printk("%s tx data:\n",info->device_name);
4043 else
4044 printk("%s rx data:\n",info->device_name);
d12341f9 4045
1da177e4
LT		 4046 while(count) {
4047 if (count > 16)
4048 linecount = 16;
4049 else
4050 linecount = count;
d12341f9 4051
1da177e4
LT		 4052 for(i=0;i<linecount;i++)
4053 printk("%02X ",(unsigned char)data[i]);
4054 for(;i<17;i++)
4055 printk(" ");
4056 for(i=0;i<linecount;i++) {
4057 if (data[i]>=040 && data[i]<=0176)
4058 printk("%c",data[i]);
4059 else
4060 printk(".");
4061 }
4062 printk("\n");
d12341f9 4063
1da177e4
LT		 4064 data += linecount;
4065 count -= linecount;
4066 }
4067}
4068
4069/* HDLC frame time out
4070 * update stats and do tx completion processing
4071 */
cdaad343 4072static void tx_timeout(unsigned long context)
1da177e4
LT		 4073{
4074 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4075 unsigned long flags;
d12341f9 4076
1da177e4
LT		 4077 if ( debug_level >= DEBUG_LEVEL_INFO )
4078 printk( "%s(%d):tx_timeout(%s)\n",
4079 __FILE__,__LINE__,info->device_name);
4080 if(info->tx_active &&
4081 info->params.mode == MGSL_MODE_HDLC) {
4082 info->icount.txtimeout++;
4083 }
4084 spin_lock_irqsave(&info->lock,flags);
4085 info->tx_active = 0;
4086 info->tx_count = info->tx_put = info->tx_get = 0;
4087
4088 spin_unlock_irqrestore(&info->lock,flags);
d12341f9 4089
af69c7f9 4090#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 4091 if (info->netcount)
4092 hdlcdev_tx_done(info);
4093 else
4094#endif
4095 bh_transmit(info);
4096}
4097
af69c7f9 4098#if SYNCLINK_GENERIC_HDLC
1da177e4
LT		 4099
4100/**
4101 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4102 * set encoding and frame check sequence (FCS) options
4103 *
4104 * dev pointer to network device structure
4105 * encoding serial encoding setting
4106 * parity FCS setting
4107 *
4108 * returns 0 if success, otherwise error code
4109 */
4110static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4111 unsigned short parity)
4112{
4113 MGSLPC_INFO *info = dev_to_port(dev);
4114 unsigned char new_encoding;
4115 unsigned short new_crctype;
4116
4117 /* return error if TTY interface open */
4118 if (info->count)
4119 return -EBUSY;
4120
4121 switch (encoding)
4122 {
4123 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4124 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4125 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4126 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4127 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4128 default: return -EINVAL;
4129 }
4130
4131 switch (parity)
4132 {
4133 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4134 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4135 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4136 default: return -EINVAL;
4137 }
4138
4139 info->params.encoding = new_encoding;
53b3531b 4140 info->params.crc_type = new_crctype;
1da177e4
LT		 4141
4142 /* if network interface up, reprogram hardware */
4143 if (info->netcount)
4144 mgslpc_program_hw(info);
4145
4146 return 0;
4147}
4148
4149/**
4150 * called by generic HDLC layer to send frame
4151 *
4152 * skb socket buffer containing HDLC frame
4153 * dev pointer to network device structure
4154 *
4155 * returns 0 if success, otherwise error code
4156 */
4157static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4158{
4159 MGSLPC_INFO *info = dev_to_port(dev);
4160 struct net_device_stats *stats = hdlc_stats(dev);
4161 unsigned long flags;
4162
4163 if (debug_level >= DEBUG_LEVEL_INFO)
4164 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4165
4166 /* stop sending until this frame completes */
4167 netif_stop_queue(dev);
4168
4169 /* copy data to device buffers */
d626f62b 4170 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
1da177e4
LT		 4171 info->tx_get = 0;
4172 info->tx_put = info->tx_count = skb->len;
4173
4174 /* update network statistics */
4175 stats->tx_packets++;
4176 stats->tx_bytes += skb->len;
4177
4178 /* done with socket buffer, so free it */
4179 dev_kfree_skb(skb);
4180
4181 /* save start time for transmit timeout detection */
4182 dev->trans_start = jiffies;
4183
4184 /* start hardware transmitter if necessary */
4185 spin_lock_irqsave(&info->lock,flags);
4186 if (!info->tx_active)
4187 tx_start(info);
4188 spin_unlock_irqrestore(&info->lock,flags);
4189
4190 return 0;
4191}
4192
4193/**
4194 * called by network layer when interface enabled
4195 * claim resources and initialize hardware
4196 *
4197 * dev pointer to network device structure
4198 *
4199 * returns 0 if success, otherwise error code
4200 */
4201static int hdlcdev_open(struct net_device *dev)
4202{
4203 MGSLPC_INFO *info = dev_to_port(dev);
4204 int rc;
4205 unsigned long flags;
4206
4207 if (debug_level >= DEBUG_LEVEL_INFO)
4208 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4209
4210 /* generic HDLC layer open processing */
4211 if ((rc = hdlc_open(dev)))
4212 return rc;
4213
4214 /* arbitrate between network and tty opens */
4215 spin_lock_irqsave(&info->netlock, flags);
4216 if (info->count != 0 || info->netcount != 0) {
4217 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4218 spin_unlock_irqrestore(&info->netlock, flags);
4219 return -EBUSY;
4220 }
4221 info->netcount=1;
4222 spin_unlock_irqrestore(&info->netlock, flags);
4223
4224 /* claim resources and init adapter */
4225 if ((rc = startup(info)) != 0) {
4226 spin_lock_irqsave(&info->netlock, flags);
4227 info->netcount=0;
4228 spin_unlock_irqrestore(&info->netlock, flags);
4229 return rc;
4230 }
4231
4232 /* assert DTR and RTS, apply hardware settings */
4233 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4234 mgslpc_program_hw(info);
4235
4236 /* enable network layer transmit */
4237 dev->trans_start = jiffies;
4238 netif_start_queue(dev);
4239
4240 /* inform generic HDLC layer of current DCD status */
4241 spin_lock_irqsave(&info->lock, flags);
4242 get_signals(info);
4243 spin_unlock_irqrestore(&info->lock, flags);
fbeff3c1
KH		 4244 if (info->serial_signals & SerialSignal_DCD)
4245 netif_carrier_on(dev);
4246 else
4247 netif_carrier_off(dev);
1da177e4
LT		 4248 return 0;
4249}
4250
4251/**
4252 * called by network layer when interface is disabled
4253 * shutdown hardware and release resources
4254 *
4255 * dev pointer to network device structure
4256 *
4257 * returns 0 if success, otherwise error code
4258 */
4259static int hdlcdev_close(struct net_device *dev)
4260{
4261 MGSLPC_INFO *info = dev_to_port(dev);
4262 unsigned long flags;
4263
4264 if (debug_level >= DEBUG_LEVEL_INFO)
4265 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4266
4267 netif_stop_queue(dev);
4268
4269 /* shutdown adapter and release resources */
4270 shutdown(info);
4271
4272 hdlc_close(dev);
4273
4274 spin_lock_irqsave(&info->netlock, flags);
4275 info->netcount=0;
4276 spin_unlock_irqrestore(&info->netlock, flags);
4277
4278 return 0;
4279}
4280
4281/**
4282 * called by network layer to process IOCTL call to network device
4283 *
4284 * dev pointer to network device structure
4285 * ifr pointer to network interface request structure
4286 * cmd IOCTL command code
4287 *
4288 * returns 0 if success, otherwise error code
4289 */
4290static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4291{
4292 const size_t size = sizeof(sync_serial_settings);
4293 sync_serial_settings new_line;
4294 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4295 MGSLPC_INFO *info = dev_to_port(dev);
4296 unsigned int flags;
4297
4298 if (debug_level >= DEBUG_LEVEL_INFO)
4299 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4300
4301 /* return error if TTY interface open */
4302 if (info->count)
4303 return -EBUSY;
4304
4305 if (cmd != SIOCWANDEV)
4306 return hdlc_ioctl(dev, ifr, cmd);
4307
4308 switch(ifr->ifr_settings.type) {
4309 case IF_GET_IFACE: /* return current sync_serial_settings */
4310
4311 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4312 if (ifr->ifr_settings.size < size) {
4313 ifr->ifr_settings.size = size; /* data size wanted */
4314 return -ENOBUFS;
4315 }
4316
4317 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4318 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4319 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4320 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4321
4322 switch (flags){
4323 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4324 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4325 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4326 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4327 default: new_line.clock_type = CLOCK_DEFAULT;
4328 }
4329
4330 new_line.clock_rate = info->params.clock_speed;
4331 new_line.loopback = info->params.loopback ? 1:0;
4332
4333 if (copy_to_user(line, &new_line, size))
4334 return -EFAULT;
4335 return 0;
4336
4337 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4338
4339 if(!capable(CAP_NET_ADMIN))
4340 return -EPERM;
4341 if (copy_from_user(&new_line, line, size))
4342 return -EFAULT;
4343
4344 switch (new_line.clock_type)
4345 {
4346 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4347 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4348 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4349 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4350 case CLOCK_DEFAULT: flags = info->params.flags &
4351 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4352 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4353 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4354 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4355 default: return -EINVAL;
4356 }
4357
4358 if (new_line.loopback != 0 && new_line.loopback != 1)
4359 return -EINVAL;
4360
4361 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4362 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4363 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4364 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4365 info->params.flags |= flags;
4366
4367 info->params.loopback = new_line.loopback;
4368
4369 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4370 info->params.clock_speed = new_line.clock_rate;
4371 else
4372 info->params.clock_speed = 0;
4373
4374 /* if network interface up, reprogram hardware */
4375 if (info->netcount)
4376 mgslpc_program_hw(info);
4377 return 0;
4378
4379 default:
4380 return hdlc_ioctl(dev, ifr, cmd);
4381 }
4382}
4383
4384/**
4385 * called by network layer when transmit timeout is detected
4386 *
4387 * dev pointer to network device structure
4388 */
4389static void hdlcdev_tx_timeout(struct net_device *dev)
4390{
4391 MGSLPC_INFO *info = dev_to_port(dev);
4392 struct net_device_stats *stats = hdlc_stats(dev);
4393 unsigned long flags;
4394
4395 if (debug_level >= DEBUG_LEVEL_INFO)
4396 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4397
4398 stats->tx_errors++;
4399 stats->tx_aborted_errors++;
4400
4401 spin_lock_irqsave(&info->lock,flags);
4402 tx_stop(info);
4403 spin_unlock_irqrestore(&info->lock,flags);
4404
4405 netif_wake_queue(dev);
4406}
4407
4408/**
4409 * called by device driver when transmit completes
4410 * reenable network layer transmit if stopped
4411 *
4412 * info pointer to device instance information
4413 */
4414static void hdlcdev_tx_done(MGSLPC_INFO *info)
4415{
4416 if (netif_queue_stopped(info->netdev))
4417 netif_wake_queue(info->netdev);
4418}
4419
4420/**
4421 * called by device driver when frame received
4422 * pass frame to network layer
4423 *
4424 * info pointer to device instance information
4425 * buf pointer to buffer contianing frame data
4426 * size count of data bytes in buf
4427 */
4428static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4429{
4430 struct sk_buff *skb = dev_alloc_skb(size);
4431 struct net_device *dev = info->netdev;
4432 struct net_device_stats *stats = hdlc_stats(dev);
4433
4434 if (debug_level >= DEBUG_LEVEL_INFO)
4435 printk("hdlcdev_rx(%s)\n",dev->name);
4436
4437 if (skb == NULL) {
4438 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4439 stats->rx_dropped++;
4440 return;
4441 }
4442
4443 memcpy(skb_put(skb, size),buf,size);
4444
4445 skb->protocol = hdlc_type_trans(skb, info->netdev);
4446
4447 stats->rx_packets++;
4448 stats->rx_bytes += size;
4449
4450 netif_rx(skb);
4451
4452 info->netdev->last_rx = jiffies;
4453}
4454
4455/**
4456 * called by device driver when adding device instance
4457 * do generic HDLC initialization
4458 *
4459 * info pointer to device instance information
4460 *
4461 * returns 0 if success, otherwise error code
4462 */
4463static int hdlcdev_init(MGSLPC_INFO *info)
4464{
4465 int rc;
4466 struct net_device *dev;
4467 hdlc_device *hdlc;
4468
4469 /* allocate and initialize network and HDLC layer objects */
4470
4471 if (!(dev = alloc_hdlcdev(info))) {
4472 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4473 return -ENOMEM;
4474 }
4475
4476 /* for network layer reporting purposes only */
4477 dev->base_addr = info->io_base;
4478 dev->irq = info->irq_level;
4479
4480 /* network layer callbacks and settings */
4481 dev->do_ioctl = hdlcdev_ioctl;
4482 dev->open = hdlcdev_open;
4483 dev->stop = hdlcdev_close;
4484 dev->tx_timeout = hdlcdev_tx_timeout;
4485 dev->watchdog_timeo = 10*HZ;
4486 dev->tx_queue_len = 50;
4487
4488 /* generic HDLC layer callbacks and settings */
4489 hdlc = dev_to_hdlc(dev);
4490 hdlc->attach = hdlcdev_attach;
4491 hdlc->xmit = hdlcdev_xmit;
4492
4493 /* register objects with HDLC layer */
4494 if ((rc = register_hdlc_device(dev))) {
4495 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4496 free_netdev(dev);
4497 return rc;
4498 }
4499
4500 info->netdev = dev;
4501 return 0;
4502}
4503
4504/**
4505 * called by device driver when removing device instance
4506 * do generic HDLC cleanup
4507 *
4508 * info pointer to device instance information
4509 */
4510static void hdlcdev_exit(MGSLPC_INFO *info)
4511{
4512 unregister_hdlc_device(info->netdev);
4513 free_netdev(info->netdev);
4514 info->netdev = NULL;
4515}
4516
4517#endif /* CONFIG_HDLC */
4518
Linux kernel - Deliverables
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