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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
[deliverable/linux.git] / drivers / char / serial167.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/char/serial167.c
3 *
4 * Driver for MVME166/7 board serial ports, which are via a CD2401.
5 * Based very much on cyclades.c.
6 *
7 * MVME166/7 work by Richard Hirst [richard@sleepie.demon.co.uk]
8 *
9 * ==============================================================
10 *
11 * static char rcsid[] =
12 * "$Revision: 1.36.1.4 $$Date: 1995/03/29 06:14:14 $";
13 *
14 * linux/kernel/cyclades.c
15 *
16 * Maintained by Marcio Saito (cyclades@netcom.com) and
17 * Randolph Bentson (bentson@grieg.seaslug.org)
18 *
19 * Much of the design and some of the code came from serial.c
20 * which was copyright (C) 1991, 1992 Linus Torvalds. It was
21 * extensively rewritten by Theodore Ts'o, 8/16/92 -- 9/14/92,
22 * and then fixed as suggested by Michael K. Johnson 12/12/92.
23 *
24 * This version does not support shared irq's.
25 *
26 * $Log: cyclades.c,v $
27 * Revision 1.36.1.4 1995/03/29 06:14:14 bentson
28 * disambiguate between Cyclom-16Y and Cyclom-32Ye;
29 *
30 * Changes:
31 *
32 * 200 lines of changes record removed - RGH 11-10-95, starting work on
33 * converting this to drive serial ports on mvme166 (cd2401).
34 *
35 * Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 2000/08/25
36 * - get rid of verify_area
37 * - use get_user to access memory from userspace in set_threshold,
38 * set_default_threshold and set_timeout
39 * - don't use the panic function in serial167_init
40 * - do resource release on failure on serial167_init
41 * - include missing restore_flags in mvme167_serial_console_setup
42 *
43 * Kars de Jong <jongk@linux-m68k.org> - 2004/09/06
44 * - replace bottom half handler with task queue handler
45 */
46
1da177e4
LT		 47#include <linux/errno.h>
48#include <linux/signal.h>
49#include <linux/sched.h>
50#include <linux/timer.h>
51#include <linux/tty.h>
52#include <linux/interrupt.h>
53#include <linux/serial.h>
54#include <linux/serialP.h>
55#include <linux/string.h>
56#include <linux/fcntl.h>
57#include <linux/ptrace.h>
58#include <linux/serial167.h>
59#include <linux/delay.h>
60#include <linux/major.h>
61#include <linux/mm.h>
62#include <linux/console.h>
63#include <linux/module.h>
64#include <linux/bitops.h>
81e859ac 65#include <linux/tty_flip.h>
1da177e4
LT		 66
67#include <asm/system.h>
68#include <asm/io.h>
69#include <asm/mvme16xhw.h>
70#include <asm/bootinfo.h>
71#include <asm/setup.h>
72
73#include <linux/types.h>
74#include <linux/kernel.h>
75
76#include <asm/uaccess.h>
77#include <linux/init.h>
78
79#define SERIAL_PARANOIA_CHECK
80#undef SERIAL_DEBUG_OPEN
81#undef SERIAL_DEBUG_THROTTLE
82#undef SERIAL_DEBUG_OTHER
83#undef SERIAL_DEBUG_IO
84#undef SERIAL_DEBUG_COUNT
85#undef SERIAL_DEBUG_DTR
86#undef CYCLOM_16Y_HACK
87#define CYCLOM_ENABLE_MONITORING
88
89#define WAKEUP_CHARS 256
90
91#define STD_COM_FLAGS (0)
92
1da177e4
LT		 93static struct tty_driver *cy_serial_driver;
94extern int serial_console;
95static struct cyclades_port *serial_console_info = NULL;
96static unsigned int serial_console_cflag = 0;
97u_char initial_console_speed;
98
99/* Base address of cd2401 chip on mvme166/7 */
100
101#define BASE_ADDR (0xfff45000)
102#define pcc2chip ((volatile u_char *)0xfff42000)
103#define PccSCCMICR 0x1d
104#define PccSCCTICR 0x1e
105#define PccSCCRICR 0x1f
106#define PccTPIACKR 0x25
107#define PccRPIACKR 0x27
108#define PccIMLR 0x3f
109
110/* This is the per-port data structure */
111struct cyclades_port cy_port[] = {
44bafdf3
JS		 112 /* CARD# */
113 {-1}, /* ttyS0 */
114 {-1}, /* ttyS1 */
115 {-1}, /* ttyS2 */
116 {-1}, /* ttyS3 */
1da177e4 117};
44bafdf3 118
fe971071 119#define NR_PORTS ARRAY_SIZE(cy_port)
1da177e4 120
1da177e4
LT		 121/*
122 * This is used to look up the divisor speeds and the timeouts
123 * We're normally limited to 15 distinct baud rates. The extra
124 * are accessed via settings in info->flags.
125 * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
126 * 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
127 * HI VHI
128 */
129static int baud_table[] = {
44bafdf3
JS		 130 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200,
131 1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000,
132 0
133};
1da177e4
LT		 134
135#if 0
44bafdf3
JS		 136static char baud_co[] = { /* 25 MHz clock option table */
137 /* value => 00 01 02 03 04 */
138 /* divide by 8 32 128 512 2048 */
139 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02,
140 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
141};
1da177e4 142
44bafdf3
JS		 143static char baud_bpr[] = { /* 25 MHz baud rate period table */
144 0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3,
145 0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15
146};
1da177e4
LT		 147#endif
148
149/* I think 166 brd clocks 2401 at 20MHz.... */
150
151/* These values are written directly to tcor, and >> 5 for writing to rcor */
44bafdf3
JS		 152static u_char baud_co[] = { /* 20 MHz clock option table */
153 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x60, 0x40,
154 0x40, 0x40, 0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
155};
1da177e4
LT		 156
157/* These values written directly to tbpr/rbpr */
44bafdf3
JS		 158static u_char baud_bpr[] = { /* 20 MHz baud rate period table */
159 0x00, 0xc0, 0x80, 0x58, 0x6c, 0x40, 0xc0, 0x81, 0x40, 0x81,
160 0x57, 0x40, 0x81, 0x40, 0x81, 0x40, 0x2b, 0x20, 0x15, 0x10
161};
1da177e4 162
44bafdf3
JS		 163static u_char baud_cor4[] = { /* receive threshold */
164 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
165 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07
166};
1da177e4
LT		 167
168static void shutdown(struct cyclades_port *);
44bafdf3 169static int startup(struct cyclades_port *);
1da177e4
LT		 170static void cy_throttle(struct tty_struct *);
171static void cy_unthrottle(struct tty_struct *);
172static void config_setup(struct cyclades_port *);
173extern void console_print(const char *);
174#ifdef CYCLOM_SHOW_STATUS
175static void show_status(int);
176#endif
177
178#ifdef CONFIG_REMOTE_DEBUG
179static void debug_setup(void);
44bafdf3 180void queueDebugChar(int c);
1da177e4
LT		 181int getDebugChar(void);
182
183#define DEBUG_PORT 1
184#define DEBUG_LEN 256
185
186typedef struct {
44bafdf3
JS		 187 int in;
188 int out;
189 unsigned char buf[DEBUG_LEN];
1da177e4
LT		 190} debugq;
191
192debugq debugiq;
193#endif
194
195/*
196 * I have my own version of udelay(), as it is needed when initialising
197 * the chip, before the delay loop has been calibrated. Should probably
198 * reference one of the vmechip2 or pccchip2 counter for an accurate
199 * delay, but this wild guess will do for now.
200 */
201
44bafdf3 202void my_udelay(long us)
1da177e4
LT		 203{
204 u_char x;
205 volatile u_char *p = &x;
206 int i;
207
208 while (us--)
209 for (i = 100; i; i--)
210 x |= *p;
211}
212
44bafdf3
JS		 213static inline int serial_paranoia_check(struct cyclades_port *info, char *name,
214 const char *routine)
1da177e4
LT		 215{
216#ifdef SERIAL_PARANOIA_CHECK
44bafdf3
JS		 217 if (!info) {
218 printk("Warning: null cyclades_port for (%s) in %s\n", name,
219 routine);
220 return 1;
221 }
222
223 if ((long)info < (long)(&cy_port[0])
224 || (long)(&cy_port[NR_PORTS]) < (long)info) {
225 printk("Warning: cyclades_port out of range for (%s) in %s\n",
226 name, routine);
227 return 1;
228 }
229
230 if (info->magic != CYCLADES_MAGIC) {
231 printk("Warning: bad magic number for serial struct (%s) in "
232 "%s\n", name, routine);
233 return 1;
234 }
1da177e4
LT		 235#endif
236 return 0;
44bafdf3 237} /* serial_paranoia_check */
1da177e4
LT		 238
239#if 0
240/* The following diagnostic routines allow the driver to spew
241 information on the screen, even (especially!) during interrupts.
242 */
44bafdf3
JS		 243void SP(char *data)
244{
245 unsigned long flags;
246 local_irq_save(flags);
247 console_print(data);
248 local_irq_restore(flags);
1da177e4 249}
44bafdf3 250
1da177e4 251char scrn[2];
44bafdf3
JS		 252void CP(char data)
253{
254 unsigned long flags;
255 local_irq_save(flags);
256 scrn[0] = data;
257 console_print(scrn);
258 local_irq_restore(flags);
259} /* CP */
1da177e4 260
44bafdf3
JS		 261void CP1(int data)
262{
263 (data < 10) ? CP(data + '0') : CP(data + 'A' - 10);
264} /* CP1 */
265void CP2(int data)
266{
267 CP1((data >> 4) & 0x0f);
268 CP1(data & 0x0f);
269} /* CP2 */
270void CP4(int data)
271{
272 CP2((data >> 8) & 0xff);
273 CP2(data & 0xff);
274} /* CP4 */
275void CP8(long data)
276{
277 CP4((data >> 16) & 0xffff);
278 CP4(data & 0xffff);
279} /* CP8 */
1da177e4
LT		 280#endif
281
282/* This routine waits up to 1000 micro-seconds for the previous
283 command to the Cirrus chip to complete and then issues the
284 new command. An error is returned if the previous command
285 didn't finish within the time limit.
286 */
44bafdf3 287u_short write_cy_cmd(volatile u_char * base_addr, u_char cmd)
1da177e4 288{
44bafdf3
JS		 289 unsigned long flags;
290 volatile int i;
1da177e4 291
44bafdf3 292 local_irq_save(flags);
1da177e4 293 /* Check to see that the previous command has completed */
44bafdf3
JS		 294 for (i = 0; i < 100; i++) {
295 if (base_addr[CyCCR] == 0) {
296 break;
297 }
298 my_udelay(10L);
1da177e4
LT		 299 }
300 /* if the CCR never cleared, the previous command
44bafdf3
JS		 301 didn't finish within the "reasonable time" */
302 if (i == 10) {
303 local_irq_restore(flags);
304 return (-1);
1da177e4
LT		 305 }
306
307 /* Issue the new command */
308 base_addr[CyCCR] = cmd;
44bafdf3
JS		 309 local_irq_restore(flags);
310 return (0);
311} /* write_cy_cmd */
1da177e4
LT		 312
313/* cy_start and cy_stop provide software output flow control as a
314 function of XON/XOFF, software CTS, and other such stuff. */
315
44bafdf3 316static void cy_stop(struct tty_struct *tty)
1da177e4 317{
44bafdf3
JS		 318 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
319 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
320 int channel;
321 unsigned long flags;
1da177e4
LT		 322
323#ifdef SERIAL_DEBUG_OTHER
44bafdf3 324 printk("cy_stop %s\n", tty->name); /* */
1da177e4
LT		 325#endif
326
44bafdf3
JS		 327 if (serial_paranoia_check(info, tty->name, "cy_stop"))
328 return;
1da177e4 329
44bafdf3 330 channel = info->line;
1da177e4 331
44bafdf3
JS		 332 local_irq_save(flags);
333 base_addr[CyCAR] = (u_char) (channel); /* index channel */
334 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
335 local_irq_restore(flags);
336} /* cy_stop */
1da177e4 337
44bafdf3 338static void cy_start(struct tty_struct *tty)
1da177e4 339{
44bafdf3
JS		 340 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
341 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
342 int channel;
343 unsigned long flags;
1da177e4
LT		 344
345#ifdef SERIAL_DEBUG_OTHER
44bafdf3 346 printk("cy_start %s\n", tty->name); /* */
1da177e4
LT		 347#endif
348
44bafdf3
JS		 349 if (serial_paranoia_check(info, tty->name, "cy_start"))
350 return;
1da177e4 351
44bafdf3 352 channel = info->line;
1da177e4 353
44bafdf3
JS		 354 local_irq_save(flags);
355 base_addr[CyCAR] = (u_char) (channel);
356 base_addr[CyIER] |= CyTxMpty;
357 local_irq_restore(flags);
358} /* cy_start */
1da177e4 359
1da177e4
LT		 360/* The real interrupt service routines are called
361 whenever the card wants its hand held--chars
362 received, out buffer empty, modem change, etc.
363 */
44bafdf3 364static irqreturn_t cd2401_rxerr_interrupt(int irq, void *dev_id)
1da177e4 365{
44bafdf3
JS		 366 struct tty_struct *tty;
367 struct cyclades_port *info;
368 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
369 unsigned char err, rfoc;
370 int channel;
371 char data;
372
373 /* determine the channel and change to that context */
374 channel = (u_short) (base_addr[CyLICR] >> 2);
375 info = &cy_port[channel];
376 info->last_active = jiffies;
377
378 if ((err = base_addr[CyRISR]) & CyTIMEOUT) {
379 /* This is a receive timeout interrupt, ignore it */
380 base_addr[CyREOIR] = CyNOTRANS;
381 return IRQ_HANDLED;
382 }
1da177e4 383
44bafdf3
JS		 384 /* Read a byte of data if there is any - assume the error
385 * is associated with this character */
1da177e4 386
44bafdf3
JS		 387 if ((rfoc = base_addr[CyRFOC]) != 0)
388 data = base_addr[CyRDR];
389 else
390 data = 0;
391
392 /* if there is nowhere to put the data, discard it */
393 if (info->tty == 0) {
394 base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS;
395 return IRQ_HANDLED;
396 } else { /* there is an open port for this data */
397 tty = info->tty;
398 if (err & info->ignore_status_mask) {
399 base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS;
400 return IRQ_HANDLED;
401 }
402 if (tty_buffer_request_room(tty, 1) != 0) {
403 if (err & info->read_status_mask) {
404 if (err & CyBREAK) {
405 tty_insert_flip_char(tty, data,
406 TTY_BREAK);
407 if (info->flags & ASYNC_SAK) {
408 do_SAK(tty);
409 }
410 } else if (err & CyFRAME) {
411 tty_insert_flip_char(tty, data,
412 TTY_FRAME);
413 } else if (err & CyPARITY) {
414 tty_insert_flip_char(tty, data,
415 TTY_PARITY);
416 } else if (err & CyOVERRUN) {
417 tty_insert_flip_char(tty, 0,
418 TTY_OVERRUN);
419 /*
420 If the flip buffer itself is
421 overflowing, we still loose
422 the next incoming character.
423 */
424 if (tty_buffer_request_room(tty, 1) !=
425 0) {
426 tty_insert_flip_char(tty, data,
427 TTY_FRAME);
428 }
429 /* These two conditions may imply */
430 /* a normal read should be done. */
431 /* else if(data & CyTIMEOUT) */
432 /* else if(data & CySPECHAR) */
433 } else {
434 tty_insert_flip_char(tty, 0,
435 TTY_NORMAL);
436 }
437 } else {
438 tty_insert_flip_char(tty, data, TTY_NORMAL);
439 }
440 } else {
441 /* there was a software buffer overrun
442 and nothing could be done about it!!! */
443 }
444 }
445 tty_schedule_flip(tty);
446 /* end of service */
1da177e4
LT		 447 base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS;
448 return IRQ_HANDLED;
44bafdf3
JS		 449} /* cy_rxerr_interrupt */
450
451static irqreturn_t cd2401_modem_interrupt(int irq, void *dev_id)
1da177e4 452{
44bafdf3
JS		 453 struct cyclades_port *info;
454 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
455 int channel;
456 int mdm_change;
457 int mdm_status;
458
459 /* determine the channel and change to that context */
460 channel = (u_short) (base_addr[CyLICR] >> 2);
461 info = &cy_port[channel];
462 info->last_active = jiffies;
463
464 mdm_change = base_addr[CyMISR];
465 mdm_status = base_addr[CyMSVR1];
466
467 if (info->tty == 0) { /* nowhere to put the data, ignore it */
468 ;
469 } else {
470 if ((mdm_change & CyDCD)
471 && (info->flags & ASYNC_CHECK_CD)) {
472 if (mdm_status & CyDCD) {
1da177e4 473/* CP('!'); */
3099bbc5 474 wake_up_interruptible(&info->open_wait);
44bafdf3 475 } else {
1da177e4 476/* CP('@'); */
3099bbc5
JS		 477 tty_hangup(info->tty);
478 wake_up_interruptible(&info->open_wait);
479 info->flags &= ~ASYNC_NORMAL_ACTIVE;
44bafdf3 480 }
1da177e4 481 }
44bafdf3
JS		 482 if ((mdm_change & CyCTS)
483 && (info->flags & ASYNC_CTS_FLOW)) {
484 if (info->tty->stopped) {
485 if (mdm_status & CyCTS) {
486 /* !!! cy_start isn't used because... */
487 info->tty->stopped = 0;
488 base_addr[CyIER] |= CyTxMpty;
3099bbc5 489 tty_wakeup(info->tty);
44bafdf3
JS		 490 }
491 } else {
492 if (!(mdm_status & CyCTS)) {
493 /* !!! cy_stop isn't used because... */
494 info->tty->stopped = 1;
495 base_addr[CyIER] &=
496 ~(CyTxMpty | CyTxRdy);
497 }
498 }
499 }
500 if (mdm_status & CyDSR) {
1da177e4 501 }
1da177e4 502 }
44bafdf3
JS		 503 base_addr[CyMEOIR] = 0;
504 return IRQ_HANDLED;
505} /* cy_modem_interrupt */
1da177e4 506
44bafdf3 507static irqreturn_t cd2401_tx_interrupt(int irq, void *dev_id)
1da177e4 508{
44bafdf3
JS		 509 struct cyclades_port *info;
510 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
511 int channel;
512 int char_count, saved_cnt;
513 int outch;
1da177e4 514
44bafdf3
JS		 515 /* determine the channel and change to that context */
516 channel = (u_short) (base_addr[CyLICR] >> 2);
1da177e4
LT		 517
518#ifdef CONFIG_REMOTE_DEBUG
44bafdf3
JS		 519 if (channel == DEBUG_PORT) {
520 panic("TxInt on debug port!!!");
521 }
1da177e4
LT		 522#endif
523
44bafdf3 524 info = &cy_port[channel];
1da177e4 525
44bafdf3
JS		 526 /* validate the port number (as configured and open) */
527 if ((channel < 0) || (NR_PORTS <= channel)) {
528 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
529 base_addr[CyTEOIR] = CyNOTRANS;
530 return IRQ_HANDLED;
531 }
532 info->last_active = jiffies;
533 if (info->tty == 0) {
534 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
44bafdf3
JS		 535 base_addr[CyTEOIR] = CyNOTRANS;
536 return IRQ_HANDLED;
537 }
538
539 /* load the on-chip space available for outbound data */
540 saved_cnt = char_count = base_addr[CyTFTC];
541
542 if (info->x_char) { /* send special char */
543 outch = info->x_char;
1da177e4 544 base_addr[CyTDR] = outch;
1da177e4 545 char_count--;
44bafdf3 546 info->x_char = 0;
1da177e4 547 }
1da177e4 548
44bafdf3
JS		 549 if (info->x_break) {
550 /* The Cirrus chip requires the "Embedded Transmit
551 Commands" of start break, delay, and end break
552 sequences to be sent. The duration of the
553 break is given in TICs, which runs at HZ
554 (typically 100) and the PPR runs at 200 Hz,
555 so the delay is duration * 200/HZ, and thus a
556 break can run from 1/100 sec to about 5/4 sec.
557 Need to check these values - RGH 141095.
558 */
559 base_addr[CyTDR] = 0; /* start break */
560 base_addr[CyTDR] = 0x81;
561 base_addr[CyTDR] = 0; /* delay a bit */
562 base_addr[CyTDR] = 0x82;
563 base_addr[CyTDR] = info->x_break * 200 / HZ;
564 base_addr[CyTDR] = 0; /* terminate break */
565 base_addr[CyTDR] = 0x83;
566 char_count -= 7;
567 info->x_break = 0;
568 }
569
570 while (char_count > 0) {
571 if (!info->xmit_cnt) {
572 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
573 break;
574 }
575 if (info->xmit_buf == 0) {
576 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
577 break;
578 }
579 if (info->tty->stopped || info->tty->hw_stopped) {
580 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
581 break;
582 }
583 /* Because the Embedded Transmit Commands have been
584 enabled, we must check to see if the escape
585 character, NULL, is being sent. If it is, we
586 must ensure that there is room for it to be
587 doubled in the output stream. Therefore we
588 no longer advance the pointer when the character
589 is fetched, but rather wait until after the check
590 for a NULL output character. (This is necessary
591 because there may not be room for the two chars
592 needed to send a NULL.
593 */
594 outch = info->xmit_buf[info->xmit_tail];
595 if (outch) {
596 info->xmit_cnt--;
597 info->xmit_tail = (info->xmit_tail + 1)
598 & (PAGE_SIZE - 1);
599 base_addr[CyTDR] = outch;
600 char_count--;
601 } else {
602 if (char_count > 1) {
603 info->xmit_cnt--;
604 info->xmit_tail = (info->xmit_tail + 1)
605 & (PAGE_SIZE - 1);
606 base_addr[CyTDR] = outch;
607 base_addr[CyTDR] = 0;
608 char_count--;
609 char_count--;
610 } else {
611 break;
612 }
613 }
614 }
615
3099bbc5
JS		 616 if (info->xmit_cnt < WAKEUP_CHARS)
617 tty_wakeup(info->tty);
618
44bafdf3
JS		 619 base_addr[CyTEOIR] = (char_count != saved_cnt) ? 0 : CyNOTRANS;
620 return IRQ_HANDLED;
621} /* cy_tx_interrupt */
1da177e4 622
44bafdf3 623static irqreturn_t cd2401_rx_interrupt(int irq, void *dev_id)
1da177e4 624{
44bafdf3
JS		 625 struct tty_struct *tty;
626 struct cyclades_port *info;
627 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
628 int channel;
629 char data;
630 int char_count;
631 int save_cnt;
632 int len;
633
634 /* determine the channel and change to that context */
635 channel = (u_short) (base_addr[CyLICR] >> 2);
636 info = &cy_port[channel];
637 info->last_active = jiffies;
638 save_cnt = char_count = base_addr[CyRFOC];
1da177e4
LT		 639
640#ifdef CONFIG_REMOTE_DEBUG
44bafdf3
JS		 641 if (channel == DEBUG_PORT) {
642 while (char_count--) {
643 data = base_addr[CyRDR];
644 queueDebugChar(data);
645 }
646 } else
1da177e4 647#endif
44bafdf3
JS		 648 /* if there is nowhere to put the data, discard it */
649 if (info->tty == 0) {
650 while (char_count--) {
651 data = base_addr[CyRDR];
652 }
653 } else { /* there is an open port for this data */
654 tty = info->tty;
655 /* load # characters available from the chip */
1da177e4
LT		 656
657#ifdef CYCLOM_ENABLE_MONITORING
44bafdf3
JS		 658 ++info->mon.int_count;
659 info->mon.char_count += char_count;
660 if (char_count > info->mon.char_max)
661 info->mon.char_max = char_count;
662 info->mon.char_last = char_count;
663#endif
664 len = tty_buffer_request_room(tty, char_count);
665 while (len--) {
666 data = base_addr[CyRDR];
667 tty_insert_flip_char(tty, data, TTY_NORMAL);
1da177e4 668#ifdef CYCLOM_16Y_HACK
44bafdf3 669 udelay(10L);
1da177e4 670#endif
44bafdf3
JS		 671 }
672 tty_schedule_flip(tty);
673 }
674 /* end of service */
675 base_addr[CyREOIR] = save_cnt ? 0 : CyNOTRANS;
676 return IRQ_HANDLED;
677} /* cy_rx_interrupt */
1da177e4 678
1da177e4
LT		 679/* This is called whenever a port becomes active;
680 interrupts are enabled and DTR & RTS are turned on.
681 */
44bafdf3 682static int startup(struct cyclades_port *info)
1da177e4 683{
44bafdf3
JS		 684 unsigned long flags;
685 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
686 int channel;
1da177e4 687
44bafdf3
JS		 688 if (info->flags & ASYNC_INITIALIZED) {
689 return 0;
690 }
1da177e4 691
44bafdf3
JS		 692 if (!info->type) {
693 if (info->tty) {
694 set_bit(TTY_IO_ERROR, &info->tty->flags);
695 }
696 return 0;
1da177e4 697 }
44bafdf3
JS		 698 if (!info->xmit_buf) {
699 info->xmit_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
700 if (!info->xmit_buf) {
701 return -ENOMEM;
702 }
1da177e4 703 }
1da177e4 704
44bafdf3 705 config_setup(info);
1da177e4 706
44bafdf3 707 channel = info->line;
1da177e4
LT		 708
709#ifdef SERIAL_DEBUG_OPEN
44bafdf3 710 printk("startup channel %d\n", channel);
1da177e4
LT		 711#endif
712
44bafdf3
JS		 713 local_irq_save(flags);
714 base_addr[CyCAR] = (u_char) channel;
715 write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR);
1da177e4 716
44bafdf3 717 base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */
1da177e4
LT		 718 base_addr[CyMSVR1] = CyRTS;
719/* CP('S');CP('1'); */
720 base_addr[CyMSVR2] = CyDTR;
721
722#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 723 printk("cyc: %d: raising DTR\n", __LINE__);
724 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
725 base_addr[CyMSVR2]);
1da177e4
LT		 726#endif
727
728 base_addr[CyIER] |= CyRxData;
729 info->flags |= ASYNC_INITIALIZED;
730
44bafdf3
JS		 731 if (info->tty) {
732 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1da177e4
LT		 733 }
734 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
735
44bafdf3 736 local_irq_restore(flags);
1da177e4
LT		 737
738#ifdef SERIAL_DEBUG_OPEN
44bafdf3 739 printk(" done\n");
1da177e4 740#endif
44bafdf3
JS		 741 return 0;
742} /* startup */
1da177e4 743
44bafdf3 744void start_xmit(struct cyclades_port *info)
1da177e4 745{
44bafdf3
JS		 746 unsigned long flags;
747 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
748 int channel;
1da177e4 749
44bafdf3
JS		 750 channel = info->line;
751 local_irq_save(flags);
1da177e4
LT		 752 base_addr[CyCAR] = channel;
753 base_addr[CyIER] |= CyTxMpty;
44bafdf3
JS		 754 local_irq_restore(flags);
755} /* start_xmit */
1da177e4
LT		 756
757/*
758 * This routine shuts down a serial port; interrupts are disabled,
759 * and DTR is dropped if the hangup on close termio flag is on.
760 */
44bafdf3 761static void shutdown(struct cyclades_port *info)
1da177e4 762{
44bafdf3
JS		 763 unsigned long flags;
764 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
765 int channel;
1da177e4 766
44bafdf3 767 if (!(info->flags & ASYNC_INITIALIZED)) {
1da177e4 768/* CP('$'); */
44bafdf3
JS		 769 return;
770 }
1da177e4 771
44bafdf3 772 channel = info->line;
1da177e4
LT		 773
774#ifdef SERIAL_DEBUG_OPEN
44bafdf3 775 printk("shutdown channel %d\n", channel);
1da177e4
LT		 776#endif
777
44bafdf3
JS		 778 /* !!! REALLY MUST WAIT FOR LAST CHARACTER TO BE
779 SENT BEFORE DROPPING THE LINE !!! (Perhaps
780 set some flag that is read when XMTY happens.)
781 Other choices are to delay some fixed interval
782 or schedule some later processing.
783 */
784 local_irq_save(flags);
785 if (info->xmit_buf) {
786 free_page((unsigned long)info->xmit_buf);
787 info->xmit_buf = NULL;
1da177e4
LT		 788 }
789
44bafdf3 790 base_addr[CyCAR] = (u_char) channel;
1da177e4 791 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
44bafdf3 792 base_addr[CyMSVR1] = 0;
1da177e4 793/* CP('C');CP('1'); */
44bafdf3 794 base_addr[CyMSVR2] = 0;
1da177e4 795#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 796 printk("cyc: %d: dropping DTR\n", __LINE__);
797 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
798 base_addr[CyMSVR2]);
1da177e4 799#endif
44bafdf3
JS		 800 }
801 write_cy_cmd(base_addr, CyDIS_RCVR);
802 /* it may be appropriate to clear _XMIT at
803 some later date (after testing)!!! */
1da177e4 804
44bafdf3
JS		 805 if (info->tty) {
806 set_bit(TTY_IO_ERROR, &info->tty->flags);
1da177e4
LT		 807 }
808 info->flags &= ~ASYNC_INITIALIZED;
44bafdf3 809 local_irq_restore(flags);
1da177e4
LT		 810
811#ifdef SERIAL_DEBUG_OPEN
44bafdf3 812 printk(" done\n");
1da177e4 813#endif
44bafdf3 814} /* shutdown */
1da177e4
LT		 815
816/*
817 * This routine finds or computes the various line characteristics.
818 */
44bafdf3 819static void config_setup(struct cyclades_port *info)
1da177e4 820{
44bafdf3
JS		 821 unsigned long flags;
822 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
823 int channel;
824 unsigned cflag;
825 int i;
826 unsigned char ti, need_init_chan = 0;
827
828 if (!info->tty || !info->tty->termios) {
829 return;
830 }
831 if (info->line == -1) {
832 return;
833 }
834 cflag = info->tty->termios->c_cflag;
835
836 /* baud rate */
837 i = cflag & CBAUD;
1da177e4
LT		 838#ifdef CBAUDEX
839/* Starting with kernel 1.1.65, there is direct support for
840 higher baud rates. The following code supports those
841 changes. The conditional aspect allows this driver to be
842 used for earlier as well as later kernel versions. (The
843 mapping is slightly different from serial.c because there
844 is still the possibility of supporting 75 kbit/sec with
845 the Cyclades board.)
846 */
44bafdf3
JS		 847 if (i & CBAUDEX) {
848 if (i == B57600)
849 i = 16;
850 else if (i == B115200)
851 i = 18;
1da177e4 852#ifdef B78600
44bafdf3
JS		 853 else if (i == B78600)
854 i = 17;
1da177e4 855#endif
44bafdf3
JS		 856 else
857 info->tty->termios->c_cflag &= ~CBAUDEX;
858 }
859#endif
860 if (i == 15) {
861 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
862 i += 1;
863 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
864 i += 3;
865 }
866 /* Don't ever change the speed of the console port. It will
867 * run at the speed specified in bootinfo, or at 19.2K */
868 /* Actually, it should run at whatever speed 166Bug was using */
869 /* Note info->timeout isn't used at present */
870 if (info != serial_console_info) {
871 info->tbpr = baud_bpr[i]; /* Tx BPR */
872 info->tco = baud_co[i]; /* Tx CO */
873 info->rbpr = baud_bpr[i]; /* Rx BPR */
874 info->rco = baud_co[i] >> 5; /* Rx CO */
875 if (baud_table[i] == 134) {
876 info->timeout =
877 (info->xmit_fifo_size * HZ * 30 / 269) + 2;
878 /* get it right for 134.5 baud */
879 } else if (baud_table[i]) {
880 info->timeout =
881 (info->xmit_fifo_size * HZ * 15 / baud_table[i]) +
882 2;
883 /* this needs to be propagated into the card info */
884 } else {
885 info->timeout = 0;
886 }
887 }
888 /* By tradition (is it a standard?) a baud rate of zero
889 implies the line should be/has been closed. A bit
890 later in this routine such a test is performed. */
891
892 /* byte size and parity */
893 info->cor7 = 0;
894 info->cor6 = 0;
895 info->cor5 = 0;
896 info->cor4 = (info->default_threshold ? info->default_threshold : baud_cor4[i]); /* receive threshold */
897 /* Following two lines added 101295, RGH. */
898 /* It is obviously wrong to access CyCORx, and not info->corx here,
899 * try and remember to fix it later! */
900 channel = info->line;
901 base_addr[CyCAR] = (u_char) channel;
902 if (C_CLOCAL(info->tty)) {
903 if (base_addr[CyIER] & CyMdmCh)
904 base_addr[CyIER] &= ~CyMdmCh; /* without modem intr */
905 /* ignore 1->0 modem transitions */
906 if (base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD))
907 base_addr[CyCOR4] &= ~(CyDSR | CyCTS | CyDCD);
908 /* ignore 0->1 modem transitions */
909 if (base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD))
910 base_addr[CyCOR5] &= ~(CyDSR | CyCTS | CyDCD);
1da177e4 911 } else {
44bafdf3
JS		 912 if ((base_addr[CyIER] & CyMdmCh) != CyMdmCh)
913 base_addr[CyIER] |= CyMdmCh; /* with modem intr */
914 /* act on 1->0 modem transitions */
915 if ((base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD)) !=
916 (CyDSR | CyCTS | CyDCD))
917 base_addr[CyCOR4] |= CyDSR | CyCTS | CyDCD;
918 /* act on 0->1 modem transitions */
919 if ((base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD)) !=
920 (CyDSR | CyCTS | CyDCD))
921 base_addr[CyCOR5] |= CyDSR | CyCTS | CyDCD;
922 }
923 info->cor3 = (cflag & CSTOPB) ? Cy_2_STOP : Cy_1_STOP;
924 info->cor2 = CyETC;
925 switch (cflag & CSIZE) {
926 case CS5:
927 info->cor1 = Cy_5_BITS;
928 break;
929 case CS6:
930 info->cor1 = Cy_6_BITS;
931 break;
932 case CS7:
933 info->cor1 = Cy_7_BITS;
934 break;
935 case CS8:
936 info->cor1 = Cy_8_BITS;
937 break;
938 }
939 if (cflag & PARENB) {
940 if (cflag & PARODD) {
941 info->cor1 |= CyPARITY_O;
942 } else {
943 info->cor1 |= CyPARITY_E;
944 }
945 } else {
946 info->cor1 |= CyPARITY_NONE;
947 }
948
949 /* CTS flow control flag */
1da177e4 950#if 0
44bafdf3
JS		 951 /* Don't complcate matters for now! RGH 141095 */
952 if (cflag & CRTSCTS) {
953 info->flags |= ASYNC_CTS_FLOW;
954 info->cor2 |= CyCtsAE;
955 } else {
956 info->flags &= ~ASYNC_CTS_FLOW;
957 info->cor2 &= ~CyCtsAE;
958 }
959#endif
960 if (cflag & CLOCAL)
961 info->flags &= ~ASYNC_CHECK_CD;
962 else
963 info->flags |= ASYNC_CHECK_CD;
1da177e4
LT		 964
965 /***********************************************
966 The hardware option, CyRtsAO, presents RTS when
967 the chip has characters to send. Since most modems
968 use RTS as reverse (inbound) flow control, this
969 option is not used. If inbound flow control is
970 necessary, DTR can be programmed to provide the
971 appropriate signals for use with a non-standard
972 cable. Contact Marcio Saito for details.
973 ***********************************************/
974
44bafdf3 975 channel = info->line;
1da177e4 976
44bafdf3
JS		 977 local_irq_save(flags);
978 base_addr[CyCAR] = (u_char) channel;
1da177e4
LT		 979
980 /* CyCMR set once only in mvme167_init_serial() */
981 if (base_addr[CyLICR] != channel << 2)
44bafdf3 982 base_addr[CyLICR] = channel << 2;
1da177e4 983 if (base_addr[CyLIVR] != 0x5c)
44bafdf3 984 base_addr[CyLIVR] = 0x5c;
1da177e4 985
44bafdf3 986 /* tx and rx baud rate */
1da177e4
LT		 987
988 if (base_addr[CyCOR1] != info->cor1)
44bafdf3 989 need_init_chan = 1;
1da177e4 990 if (base_addr[CyTCOR] != info->tco)
44bafdf3 991 base_addr[CyTCOR] = info->tco;
1da177e4 992 if (base_addr[CyTBPR] != info->tbpr)
44bafdf3 993 base_addr[CyTBPR] = info->tbpr;
1da177e4 994 if (base_addr[CyRCOR] != info->rco)
44bafdf3 995 base_addr[CyRCOR] = info->rco;
1da177e4 996 if (base_addr[CyRBPR] != info->rbpr)
44bafdf3 997 base_addr[CyRBPR] = info->rbpr;
1da177e4
LT		 998
999 /* set line characteristics according configuration */
1000
1001 if (base_addr[CySCHR1] != START_CHAR(info->tty))
44bafdf3 1002 base_addr[CySCHR1] = START_CHAR(info->tty);
1da177e4 1003 if (base_addr[CySCHR2] != STOP_CHAR(info->tty))
44bafdf3 1004 base_addr[CySCHR2] = STOP_CHAR(info->tty);
1da177e4 1005 if (base_addr[CySCRL] != START_CHAR(info->tty))
44bafdf3 1006 base_addr[CySCRL] = START_CHAR(info->tty);
1da177e4 1007 if (base_addr[CySCRH] != START_CHAR(info->tty))
44bafdf3 1008 base_addr[CySCRH] = START_CHAR(info->tty);
1da177e4 1009 if (base_addr[CyCOR1] != info->cor1)
44bafdf3 1010 base_addr[CyCOR1] = info->cor1;
1da177e4 1011 if (base_addr[CyCOR2] != info->cor2)
44bafdf3 1012 base_addr[CyCOR2] = info->cor2;
1da177e4 1013 if (base_addr[CyCOR3] != info->cor3)
44bafdf3 1014 base_addr[CyCOR3] = info->cor3;
1da177e4 1015 if (base_addr[CyCOR4] != info->cor4)
44bafdf3 1016 base_addr[CyCOR4] = info->cor4;
1da177e4 1017 if (base_addr[CyCOR5] != info->cor5)
44bafdf3 1018 base_addr[CyCOR5] = info->cor5;
1da177e4 1019 if (base_addr[CyCOR6] != info->cor6)
44bafdf3 1020 base_addr[CyCOR6] = info->cor6;
1da177e4 1021 if (base_addr[CyCOR7] != info->cor7)
44bafdf3 1022 base_addr[CyCOR7] = info->cor7;
1da177e4
LT		 1023
1024 if (need_init_chan)
44bafdf3 1025 write_cy_cmd(base_addr, CyINIT_CHAN);
1da177e4 1026
44bafdf3 1027 base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */
1da177e4
LT		 1028
1029 /* 2ms default rx timeout */
1030 ti = info->default_timeout ? info->default_timeout : 0x02;
1031 if (base_addr[CyRTPRL] != ti)
44bafdf3 1032 base_addr[CyRTPRL] = ti;
1da177e4 1033 if (base_addr[CyRTPRH] != 0)
44bafdf3 1034 base_addr[CyRTPRH] = 0;
1da177e4
LT		 1035
1036 /* Set up RTS here also ????? RGH 141095 */
44bafdf3
JS		 1037 if (i == 0) { /* baud rate is zero, turn off line */
1038 if ((base_addr[CyMSVR2] & CyDTR) == CyDTR)
1039 base_addr[CyMSVR2] = 0;
1da177e4 1040#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1041 printk("cyc: %d: dropping DTR\n", __LINE__);
1042 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1043 base_addr[CyMSVR2]);
1da177e4 1044#endif
44bafdf3
JS		 1045 } else {
1046 if ((base_addr[CyMSVR2] & CyDTR) != CyDTR)
1047 base_addr[CyMSVR2] = CyDTR;
1da177e4 1048#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1049 printk("cyc: %d: raising DTR\n", __LINE__);
1050 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1051 base_addr[CyMSVR2]);
1da177e4
LT		 1052#endif
1053 }
1054
44bafdf3
JS		 1055 if (info->tty) {
1056 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1da177e4
LT		 1057 }
1058
44bafdf3 1059 local_irq_restore(flags);
1da177e4 1060
44bafdf3 1061} /* config_setup */
1da177e4 1062
44bafdf3 1063static void cy_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1064{
44bafdf3
JS		 1065 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1066 unsigned long flags;
1da177e4
LT		 1067
1068#ifdef SERIAL_DEBUG_IO
44bafdf3 1069 printk("cy_put_char %s(0x%02x)\n", tty->name, ch);
1da177e4
LT		 1070#endif
1071
44bafdf3
JS		 1072 if (serial_paranoia_check(info, tty->name, "cy_put_char"))
1073 return;
1da177e4 1074
44bafdf3
JS		 1075 if (!info->xmit_buf)
1076 return;
1da177e4 1077
44bafdf3 1078 local_irq_save(flags);
1da177e4 1079 if (info->xmit_cnt >= PAGE_SIZE - 1) {
44bafdf3
JS		 1080 local_irq_restore(flags);
1081 return;
1da177e4
LT		 1082 }
1083
1084 info->xmit_buf[info->xmit_head++] = ch;
1085 info->xmit_head &= PAGE_SIZE - 1;
1086 info->xmit_cnt++;
44bafdf3
JS		 1087 local_irq_restore(flags);
1088} /* cy_put_char */
1da177e4 1089
44bafdf3 1090static void cy_flush_chars(struct tty_struct *tty)
1da177e4 1091{
44bafdf3
JS		 1092 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1093 unsigned long flags;
1094 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1095 int channel;
1096
1da177e4 1097#ifdef SERIAL_DEBUG_IO
44bafdf3 1098 printk("cy_flush_chars %s\n", tty->name); /* */
1da177e4
LT		 1099#endif
1100
44bafdf3
JS		 1101 if (serial_paranoia_check(info, tty->name, "cy_flush_chars"))
1102 return;
1da177e4 1103
44bafdf3
JS		 1104 if (info->xmit_cnt <= 0 || tty->stopped
1105 || tty->hw_stopped || !info->xmit_buf)
1106 return;
1da177e4 1107
44bafdf3 1108 channel = info->line;
1da177e4 1109
44bafdf3 1110 local_irq_save(flags);
1da177e4
LT		 1111 base_addr[CyCAR] = channel;
1112 base_addr[CyIER] |= CyTxMpty;
44bafdf3
JS		 1113 local_irq_restore(flags);
1114} /* cy_flush_chars */
1da177e4
LT		 1115
1116/* This routine gets called when tty_write has put something into
1117 the write_queue. If the port is not already transmitting stuff,
1118 start it off by enabling interrupts. The interrupt service
1119 routine will then ensure that the characters are sent. If the
1120 port is already active, there is no need to kick it.
1121 */
44bafdf3 1122static int cy_write(struct tty_struct *tty, const unsigned char *buf, int count)
1da177e4 1123{
44bafdf3
JS		 1124 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1125 unsigned long flags;
1126 int c, total = 0;
1da177e4
LT		 1127
1128#ifdef SERIAL_DEBUG_IO
44bafdf3 1129 printk("cy_write %s\n", tty->name); /* */
1da177e4
LT		 1130#endif
1131
44bafdf3
JS		 1132 if (serial_paranoia_check(info, tty->name, "cy_write")) {
1133 return 0;
1134 }
1da177e4 1135
44bafdf3
JS		 1136 if (!info->xmit_buf) {
1137 return 0;
1138 }
1da177e4 1139
44bafdf3
JS		 1140 while (1) {
1141 local_irq_save(flags);
1142 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1143 SERIAL_XMIT_SIZE - info->xmit_head));
1144 if (c <= 0) {
1145 local_irq_restore(flags);
1146 break;
1147 }
1148
1149 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1150 info->xmit_head =
1151 (info->xmit_head + c) & (SERIAL_XMIT_SIZE - 1);
1152 info->xmit_cnt += c;
1153 local_irq_restore(flags);
1154
1155 buf += c;
1156 count -= c;
1157 total += c;
1158 }
1159
1160 if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) {
1161 start_xmit(info);
1162 }
1163 return total;
1164} /* cy_write */
1165
1166static int cy_write_room(struct tty_struct *tty)
1da177e4 1167{
44bafdf3
JS		 1168 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1169 int ret;
1170
1da177e4 1171#ifdef SERIAL_DEBUG_IO
44bafdf3 1172 printk("cy_write_room %s\n", tty->name); /* */
1da177e4
LT		 1173#endif
1174
44bafdf3
JS		 1175 if (serial_paranoia_check(info, tty->name, "cy_write_room"))
1176 return 0;
1177 ret = PAGE_SIZE - info->xmit_cnt - 1;
1178 if (ret < 0)
1179 ret = 0;
1180 return ret;
1181} /* cy_write_room */
1da177e4 1182
44bafdf3 1183static int cy_chars_in_buffer(struct tty_struct *tty)
1da177e4 1184{
44bafdf3
JS		 1185 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1186
1da177e4 1187#ifdef SERIAL_DEBUG_IO
44bafdf3 1188 printk("cy_chars_in_buffer %s %d\n", tty->name, info->xmit_cnt); /* */
1da177e4
LT		 1189#endif
1190
44bafdf3
JS		 1191 if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer"))
1192 return 0;
1da177e4 1193
44bafdf3
JS		 1194 return info->xmit_cnt;
1195} /* cy_chars_in_buffer */
1da177e4 1196
44bafdf3 1197static void cy_flush_buffer(struct tty_struct *tty)
1da177e4 1198{
44bafdf3
JS		 1199 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1200 unsigned long flags;
1201
1da177e4 1202#ifdef SERIAL_DEBUG_IO
44bafdf3 1203 printk("cy_flush_buffer %s\n", tty->name); /* */
1da177e4
LT		 1204#endif
1205
44bafdf3
JS		 1206 if (serial_paranoia_check(info, tty->name, "cy_flush_buffer"))
1207 return;
1208 local_irq_save(flags);
1da177e4 1209 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
44bafdf3
JS		 1210 local_irq_restore(flags);
1211 tty_wakeup(tty);
1212} /* cy_flush_buffer */
1da177e4
LT		 1213
1214/* This routine is called by the upper-layer tty layer to signal
1215 that incoming characters should be throttled or that the
1216 throttle should be released.
1217 */
44bafdf3 1218static void cy_throttle(struct tty_struct *tty)
1da177e4 1219{
44bafdf3
JS		 1220 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1221 unsigned long flags;
1222 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1223 int channel;
1da177e4
LT		 1224
1225#ifdef SERIAL_DEBUG_THROTTLE
44bafdf3
JS		 1226 char buf[64];
1227
1228 printk("throttle %s: %d....\n", tty_name(tty, buf),
1229 tty->ldisc.chars_in_buffer(tty));
1230 printk("cy_throttle %s\n", tty->name);
1da177e4
LT		 1231#endif
1232
44bafdf3
JS		 1233 if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) {
1234 return;
1235 }
1da177e4 1236
44bafdf3
JS		 1237 if (I_IXOFF(tty)) {
1238 info->x_char = STOP_CHAR(tty);
1239 /* Should use the "Send Special Character" feature!!! */
1240 }
1da177e4 1241
44bafdf3 1242 channel = info->line;
1da177e4 1243
44bafdf3
JS		 1244 local_irq_save(flags);
1245 base_addr[CyCAR] = (u_char) channel;
1da177e4 1246 base_addr[CyMSVR1] = 0;
44bafdf3
JS		 1247 local_irq_restore(flags);
1248} /* cy_throttle */
1da177e4 1249
44bafdf3 1250static void cy_unthrottle(struct tty_struct *tty)
1da177e4 1251{
44bafdf3
JS		 1252 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1253 unsigned long flags;
1254 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1255 int channel;
1da177e4
LT		 1256
1257#ifdef SERIAL_DEBUG_THROTTLE
44bafdf3
JS		 1258 char buf[64];
1259
1260 printk("throttle %s: %d....\n", tty_name(tty, buf),
1261 tty->ldisc.chars_in_buffer(tty));
1262 printk("cy_unthrottle %s\n", tty->name);
1da177e4
LT		 1263#endif
1264
44bafdf3
JS		 1265 if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) {
1266 return;
1267 }
1da177e4 1268
44bafdf3
JS		 1269 if (I_IXOFF(tty)) {
1270 info->x_char = START_CHAR(tty);
1271 /* Should use the "Send Special Character" feature!!! */
1272 }
1da177e4 1273
44bafdf3 1274 channel = info->line;
1da177e4 1275
44bafdf3
JS		 1276 local_irq_save(flags);
1277 base_addr[CyCAR] = (u_char) channel;
1da177e4 1278 base_addr[CyMSVR1] = CyRTS;
44bafdf3
JS		 1279 local_irq_restore(flags);
1280} /* cy_unthrottle */
1da177e4
LT		 1281
1282static int
44bafdf3
JS		 1283get_serial_info(struct cyclades_port *info,
1284 struct serial_struct __user * retinfo)
1da177e4 1285{
44bafdf3 1286 struct serial_struct tmp;
1da177e4
LT		 1287
1288/* CP('g'); */
44bafdf3
JS		 1289 if (!retinfo)
1290 return -EFAULT;
1291 memset(&tmp, 0, sizeof(tmp));
1292 tmp.type = info->type;
1293 tmp.line = info->line;
1294 tmp.port = info->line;
1295 tmp.irq = 0;
1296 tmp.flags = info->flags;
1297 tmp.baud_base = 0; /*!!! */
1298 tmp.close_delay = info->close_delay;
1299 tmp.custom_divisor = 0; /*!!! */
1300 tmp.hub6 = 0; /*!!! */
1301 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
1302} /* get_serial_info */
1da177e4
LT		 1303
1304static int
44bafdf3
JS		 1305set_serial_info(struct cyclades_port *info,
1306 struct serial_struct __user * new_info)
1da177e4 1307{
44bafdf3
JS		 1308 struct serial_struct new_serial;
1309 struct cyclades_port old_info;
1da177e4
LT		 1310
1311/* CP('s'); */
44bafdf3
JS		 1312 if (!new_info)
1313 return -EFAULT;
1314 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1315 return -EFAULT;
1316 old_info = *info;
1317
1318 if (!capable(CAP_SYS_ADMIN)) {
1319 if ((new_serial.close_delay != info->close_delay) ||
1320 ((new_serial.flags & ASYNC_FLAGS & ~ASYNC_USR_MASK) !=
1321 (info->flags & ASYNC_FLAGS & ~ASYNC_USR_MASK)))
1322 return -EPERM;
1323 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1324 (new_serial.flags & ASYNC_USR_MASK));
1325 goto check_and_exit;
1326 }
1da177e4 1327
44bafdf3
JS		 1328 /*
1329 * OK, past this point, all the error checking has been done.
1330 * At this point, we start making changes.....
1331 */
1da177e4 1332
44bafdf3
JS		 1333 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1334 (new_serial.flags & ASYNC_FLAGS));
1335 info->close_delay = new_serial.close_delay;
1da177e4 1336
44bafdf3
JS		 1337check_and_exit:
1338 if (info->flags & ASYNC_INITIALIZED) {
1339 config_setup(info);
1340 return 0;
1341 }
1342 return startup(info);
1343} /* set_serial_info */
1da177e4 1344
44bafdf3
JS		 1345static int cy_tiocmget(struct tty_struct *tty, struct file *file)
1346{
1347 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1348 int channel;
1349 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1350 unsigned long flags;
1351 unsigned char status;
1da177e4 1352
44bafdf3 1353 channel = info->line;
1da177e4 1354
44bafdf3
JS		 1355 local_irq_save(flags);
1356 base_addr[CyCAR] = (u_char) channel;
1357 status = base_addr[CyMSVR1] | base_addr[CyMSVR2];
1358 local_irq_restore(flags);
1da177e4 1359
44bafdf3
JS		 1360 return ((status & CyRTS) ? TIOCM_RTS : 0)
1361 | ((status & CyDTR) ? TIOCM_DTR : 0)
1362 | ((status & CyDCD) ? TIOCM_CAR : 0)
1363 | ((status & CyDSR) ? TIOCM_DSR : 0)
1364 | ((status & CyCTS) ? TIOCM_CTS : 0);
1365} /* cy_tiocmget */
1da177e4
LT		 1366
1367static int
1368cy_tiocmset(struct tty_struct *tty, struct file *file,
1369 unsigned int set, unsigned int clear)
1370{
44bafdf3
JS		 1371 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1372 int channel;
1373 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1374 unsigned long flags;
1375
1376 channel = info->line;
1377
1378 if (set & TIOCM_RTS) {
1379 local_irq_save(flags);
1380 base_addr[CyCAR] = (u_char) channel;
1da177e4 1381 base_addr[CyMSVR1] = CyRTS;
44bafdf3 1382 local_irq_restore(flags);
1da177e4 1383 }
44bafdf3
JS		 1384 if (set & TIOCM_DTR) {
1385 local_irq_save(flags);
1386 base_addr[CyCAR] = (u_char) channel;
1da177e4 1387/* CP('S');CP('2'); */
44bafdf3 1388 base_addr[CyMSVR2] = CyDTR;
1da177e4 1389#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1390 printk("cyc: %d: raising DTR\n", __LINE__);
1391 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1392 base_addr[CyMSVR2]);
1da177e4 1393#endif
44bafdf3 1394 local_irq_restore(flags);
1da177e4
LT		 1395 }
1396
44bafdf3
JS		 1397 if (clear & TIOCM_RTS) {
1398 local_irq_save(flags);
1399 base_addr[CyCAR] = (u_char) channel;
1da177e4 1400 base_addr[CyMSVR1] = 0;
44bafdf3 1401 local_irq_restore(flags);
1da177e4 1402 }
44bafdf3
JS		 1403 if (clear & TIOCM_DTR) {
1404 local_irq_save(flags);
1405 base_addr[CyCAR] = (u_char) channel;
1da177e4 1406/* CP('C');CP('2'); */
44bafdf3 1407 base_addr[CyMSVR2] = 0;
1da177e4 1408#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1409 printk("cyc: %d: dropping DTR\n", __LINE__);
1410 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1411 base_addr[CyMSVR2]);
1da177e4 1412#endif
44bafdf3 1413 local_irq_restore(flags);
1da177e4
LT		 1414 }
1415
44bafdf3
JS		 1416 return 0;
1417} /* set_modem_info */
1418
1419static void send_break(struct cyclades_port *info, int duration)
1420{ /* Let the transmit ISR take care of this (since it
1421 requires stuffing characters into the output stream).
1422 */
1423 info->x_break = duration;
1424 if (!info->xmit_cnt) {
1425 start_xmit(info);
1426 }
1427} /* send_break */
1da177e4
LT		 1428
1429static int
44bafdf3 1430get_mon_info(struct cyclades_port *info, struct cyclades_monitor __user * mon)
1da177e4
LT		 1431{
1432
44bafdf3
JS		 1433 if (copy_to_user(mon, &info->mon, sizeof(struct cyclades_monitor)))
1434 return -EFAULT;
1435 info->mon.int_count = 0;
1436 info->mon.char_count = 0;
1437 info->mon.char_max = 0;
1438 info->mon.char_last = 0;
1439 return 0;
1da177e4
LT		 1440}
1441
44bafdf3 1442static int set_threshold(struct cyclades_port *info, unsigned long __user * arg)
1da177e4 1443{
44bafdf3
JS		 1444 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1445 unsigned long value;
1446 int channel;
1447
1448 if (get_user(value, arg))
1449 return -EFAULT;
1450
1451 channel = info->line;
1452 info->cor4 &= ~CyREC_FIFO;
1453 info->cor4 |= value & CyREC_FIFO;
1454 base_addr[CyCOR4] = info->cor4;
1455 return 0;
1da177e4
LT		 1456}
1457
1458static int
44bafdf3 1459get_threshold(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1460{
44bafdf3
JS		 1461 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1462 int channel;
1463 unsigned long tmp;
1464
1465 channel = info->line;
1466
1467 tmp = base_addr[CyCOR4] & CyREC_FIFO;
1468 return put_user(tmp, value);
1da177e4
LT		 1469}
1470
1471static int
44bafdf3 1472set_default_threshold(struct cyclades_port *info, unsigned long __user * arg)
1da177e4 1473{
44bafdf3 1474 unsigned long value;
1da177e4 1475
44bafdf3
JS		 1476 if (get_user(value, arg))
1477 return -EFAULT;
1da177e4 1478
44bafdf3
JS		 1479 info->default_threshold = value & 0x0f;
1480 return 0;
1da177e4
LT		 1481}
1482
1483static int
44bafdf3 1484get_default_threshold(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1485{
44bafdf3 1486 return put_user(info->default_threshold, value);
1da177e4
LT		 1487}
1488
44bafdf3 1489static int set_timeout(struct cyclades_port *info, unsigned long __user * arg)
1da177e4 1490{
44bafdf3
JS		 1491 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1492 int channel;
1493 unsigned long value;
1494
1495 if (get_user(value, arg))
1496 return -EFAULT;
1497
1498 channel = info->line;
1499
1500 base_addr[CyRTPRL] = value & 0xff;
1501 base_addr[CyRTPRH] = (value >> 8) & 0xff;
1502 return 0;
1da177e4
LT		 1503}
1504
44bafdf3 1505static int get_timeout(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1506{
44bafdf3
JS		 1507 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1508 int channel;
1509 unsigned long tmp;
1510
1511 channel = info->line;
1512
1513 tmp = base_addr[CyRTPRL];
1514 return put_user(tmp, value);
1da177e4
LT		 1515}
1516
44bafdf3 1517static int set_default_timeout(struct cyclades_port *info, unsigned long value)
1da177e4 1518{
44bafdf3
JS		 1519 info->default_timeout = value & 0xff;
1520 return 0;
1da177e4
LT		 1521}
1522
1523static int
44bafdf3 1524get_default_timeout(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1525{
44bafdf3 1526 return put_user(info->default_timeout, value);
1da177e4
LT		 1527}
1528
1529static int
44bafdf3
JS		 1530cy_ioctl(struct tty_struct *tty, struct file *file,
1531 unsigned int cmd, unsigned long arg)
1da177e4 1532{
44bafdf3
JS		 1533 unsigned long val;
1534 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1535 int ret_val = 0;
1536 void __user *argp = (void __user *)arg;
1da177e4
LT		 1537
1538#ifdef SERIAL_DEBUG_OTHER
44bafdf3
JS		 1539 printk("cy_ioctl %s, cmd = %x arg = %lx\n", tty->name, cmd, arg); /* */
1540#endif
1541
1542 switch (cmd) {
1543 case CYGETMON:
1544 ret_val = get_mon_info(info, argp);
1545 break;
1546 case CYGETTHRESH:
1547 ret_val = get_threshold(info, argp);
1548 break;
1549 case CYSETTHRESH:
1550 ret_val = set_threshold(info, argp);
1551 break;
1552 case CYGETDEFTHRESH:
1553 ret_val = get_default_threshold(info, argp);
1554 break;
1555 case CYSETDEFTHRESH:
1556 ret_val = set_default_threshold(info, argp);
1557 break;
1558 case CYGETTIMEOUT:
1559 ret_val = get_timeout(info, argp);
1560 break;
1561 case CYSETTIMEOUT:
1562 ret_val = set_timeout(info, argp);
1563 break;
1564 case CYGETDEFTIMEOUT:
1565 ret_val = get_default_timeout(info, argp);
1566 break;
1567 case CYSETDEFTIMEOUT:
1568 ret_val = set_default_timeout(info, (unsigned long)arg);
1569 break;
1570 case TCSBRK: /* SVID version: non-zero arg --> no break */
1571 ret_val = tty_check_change(tty);
1572 if (ret_val)
1573 break;
1574 tty_wait_until_sent(tty, 0);
1575 if (!arg)
1576 send_break(info, HZ / 4); /* 1/4 second */
1577 break;
1578 case TCSBRKP: /* support for POSIX tcsendbreak() */
1579 ret_val = tty_check_change(tty);
1580 if (ret_val)
1581 break;
1582 tty_wait_until_sent(tty, 0);
1583 send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1da177e4 1584 break;
1da177e4
LT		 1585
1586/* The following commands are incompletely implemented!!! */
44bafdf3
JS		 1587 case TIOCGSOFTCAR:
1588 ret_val =
1589 put_user(C_CLOCAL(tty) ? 1 : 0,
1590 (unsigned long __user *)argp);
1591 break;
1592 case TIOCSSOFTCAR:
1593 ret_val = get_user(val, (unsigned long __user *)argp);
1594 if (ret_val)
1595 break;
1596 tty->termios->c_cflag =
1597 ((tty->termios->c_cflag & ~CLOCAL) | (val ? CLOCAL : 0));
1598 break;
1599 case TIOCGSERIAL:
1600 ret_val = get_serial_info(info, argp);
1601 break;
1602 case TIOCSSERIAL:
1603 ret_val = set_serial_info(info, argp);
1604 break;
1605 default:
1606 ret_val = -ENOIOCTLCMD;
1607 }
1da177e4
LT		 1608
1609#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1610 printk("cy_ioctl done\n");
1da177e4
LT		 1611#endif
1612
44bafdf3
JS		 1613 return ret_val;
1614} /* cy_ioctl */
1da177e4 1615
44bafdf3 1616static void cy_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1617{
44bafdf3 1618 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1da177e4
LT		 1619
1620#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1621 printk("cy_set_termios %s\n", tty->name);
1da177e4
LT		 1622#endif
1623
44bafdf3
JS		 1624 if (tty->termios->c_cflag == old_termios->c_cflag)
1625 return;
1626 config_setup(info);
1da177e4 1627
44bafdf3
JS		 1628 if ((old_termios->c_cflag & CRTSCTS) &&
1629 !(tty->termios->c_cflag & CRTSCTS)) {
1630 tty->stopped = 0;
1631 cy_start(tty);
1632 }
1da177e4 1633#ifdef tytso_patch_94Nov25_1726
44bafdf3
JS		 1634 if (!(old_termios->c_cflag & CLOCAL) &&
1635 (tty->termios->c_cflag & CLOCAL))
1636 wake_up_interruptible(&info->open_wait);
1da177e4 1637#endif
44bafdf3 1638} /* cy_set_termios */
1da177e4 1639
44bafdf3 1640static void cy_close(struct tty_struct *tty, struct file *filp)
1da177e4 1641{
44bafdf3 1642 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1da177e4
LT		 1643
1644/* CP('C'); */
1645#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1646 printk("cy_close %s\n", tty->name);
1da177e4
LT		 1647#endif
1648
44bafdf3
JS		 1649 if (!info || serial_paranoia_check(info, tty->name, "cy_close")) {
1650 return;
1651 }
1da177e4 1652#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1653 printk("cy_close %s, count = %d\n", tty->name, info->count);
1654#endif
1655
1656 if ((tty->count == 1) && (info->count != 1)) {
1657 /*
1658 * Uh, oh. tty->count is 1, which means that the tty
1659 * structure will be freed. Info->count should always
1660 * be one in these conditions. If it's greater than
1661 * one, we've got real problems, since it means the
1662 * serial port won't be shutdown.
1663 */
1664 printk("cy_close: bad serial port count; tty->count is 1, "
1665 "info->count is %d\n", info->count);
1666 info->count = 1;
1667 }
1da177e4 1668#ifdef SERIAL_DEBUG_COUNT
44bafdf3
JS		 1669 printk("cyc: %d: decrementing count to %d\n", __LINE__,
1670 info->count - 1);
1da177e4 1671#endif
44bafdf3
JS		 1672 if (--info->count < 0) {
1673 printk("cy_close: bad serial port count for ttys%d: %d\n",
1674 info->line, info->count);
1da177e4 1675#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1676 printk("cyc: %d: setting count to 0\n", __LINE__);
1da177e4 1677#endif
44bafdf3 1678 info->count = 0;
1da177e4 1679 }
44bafdf3
JS		 1680 if (info->count)
1681 return;
1682 info->flags |= ASYNC_CLOSING;
1683 if (info->flags & ASYNC_INITIALIZED)
1684 tty_wait_until_sent(tty, 3000); /* 30 seconds timeout */
1685 shutdown(info);
1686 if (tty->driver->flush_buffer)
1687 tty->driver->flush_buffer(tty);
1688 tty_ldisc_flush(tty);
44bafdf3
JS		 1689 info->tty = NULL;
1690 if (info->blocked_open) {
1691 if (info->close_delay) {
1692 msleep_interruptible(jiffies_to_msecs
1693 (info->close_delay));
1694 }
1695 wake_up_interruptible(&info->open_wait);
1696 }
1697 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1698 wake_up_interruptible(&info->close_wait);
1da177e4
LT		 1699
1700#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1701 printk("cy_close done\n");
1da177e4 1702#endif
44bafdf3 1703} /* cy_close */
1da177e4
LT		 1704
1705/*
1706 * cy_hangup() --- called by tty_hangup() when a hangup is signaled.
1707 */
44bafdf3 1708void cy_hangup(struct tty_struct *tty)
1da177e4 1709{
44bafdf3
JS		 1710 struct cyclades_port *info = (struct cyclades_port *)tty->driver_data;
1711
1da177e4 1712#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1713 printk("cy_hangup %s\n", tty->name); /* */
1da177e4
LT		 1714#endif
1715
44bafdf3
JS		 1716 if (serial_paranoia_check(info, tty->name, "cy_hangup"))
1717 return;
1718
1719 shutdown(info);
1da177e4 1720#if 0
44bafdf3
JS		 1721 info->event = 0;
1722 info->count = 0;
1da177e4 1723#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1724 printk("cyc: %d: setting count to 0\n", __LINE__);
1da177e4 1725#endif
44bafdf3 1726 info->tty = 0;
1da177e4 1727#endif
44bafdf3
JS		 1728 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1729 wake_up_interruptible(&info->open_wait);
1730} /* cy_hangup */
1da177e4
LT		 1731
1732/*
1733 * ------------------------------------------------------------
1734 * cy_open() and friends
1735 * ------------------------------------------------------------
1736 */
1737
1738static int
44bafdf3
JS		 1739block_til_ready(struct tty_struct *tty, struct file *filp,
1740 struct cyclades_port *info)
1da177e4 1741{
44bafdf3
JS		 1742 DECLARE_WAITQUEUE(wait, current);
1743 unsigned long flags;
1744 int channel;
1745 int retval;
1746 volatile u_char *base_addr = (u_char *) BASE_ADDR;
1747
1748 /*
1749 * If the device is in the middle of being closed, then block
1750 * until it's done, and then try again.
1751 */
1752 if (info->flags & ASYNC_CLOSING) {
1753 interruptible_sleep_on(&info->close_wait);
1754 if (info->flags & ASYNC_HUP_NOTIFY) {
1755 return -EAGAIN;
1756 } else {
1757 return -ERESTARTSYS;
1758 }
1759 }
1760
1761 /*
1762 * If non-blocking mode is set, then make the check up front
1763 * and then exit.
1764 */
1765 if (filp->f_flags & O_NONBLOCK) {
1766 info->flags |= ASYNC_NORMAL_ACTIVE;
1767 return 0;
1768 }
1769
1770 /*
1771 * Block waiting for the carrier detect and the line to become
1772 * free (i.e., not in use by the callout). While we are in
1773 * this loop, info->count is dropped by one, so that
1774 * cy_close() knows when to free things. We restore it upon
1775 * exit, either normal or abnormal.
1776 */
1777 retval = 0;
1778 add_wait_queue(&info->open_wait, &wait);
1da177e4 1779#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1780 printk("block_til_ready before block: %s, count = %d\n",
1781 tty->name, info->count);
1782 /**/
1da177e4 1783#endif
44bafdf3 1784 info->count--;
1da177e4 1785#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1786 printk("cyc: %d: decrementing count to %d\n", __LINE__, info->count);
1da177e4 1787#endif
44bafdf3 1788 info->blocked_open++;
1da177e4 1789
44bafdf3 1790 channel = info->line;
1da177e4 1791
44bafdf3
JS		 1792 while (1) {
1793 local_irq_save(flags);
1794 base_addr[CyCAR] = (u_char) channel;
1795 base_addr[CyMSVR1] = CyRTS;
1da177e4 1796/* CP('S');CP('4'); */
44bafdf3 1797 base_addr[CyMSVR2] = CyDTR;
1da177e4 1798#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1799 printk("cyc: %d: raising DTR\n", __LINE__);
1800 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1801 base_addr[CyMSVR2]);
1802#endif
1803 local_irq_restore(flags);
1804 set_current_state(TASK_INTERRUPTIBLE);
1805 if (tty_hung_up_p(filp)
1806 || !(info->flags & ASYNC_INITIALIZED)) {
1807 if (info->flags & ASYNC_HUP_NOTIFY) {
1808 retval = -EAGAIN;
1809 } else {
1810 retval = -ERESTARTSYS;
1811 }
1812 break;
1813 }
1814 local_irq_save(flags);
1815 base_addr[CyCAR] = (u_char) channel;
1da177e4 1816/* CP('L');CP1(1 && C_CLOCAL(tty)); CP1(1 && (base_addr[CyMSVR1] & CyDCD) ); */
44bafdf3
JS		 1817 if (!(info->flags & ASYNC_CLOSING)
1818 && (C_CLOCAL(tty)
1819 || (base_addr[CyMSVR1] & CyDCD))) {
1820 local_irq_restore(flags);
1821 break;
1822 }
1823 local_irq_restore(flags);
1824 if (signal_pending(current)) {
1825 retval = -ERESTARTSYS;
1826 break;
1827 }
1da177e4 1828#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1829 printk("block_til_ready blocking: %s, count = %d\n",
1830 tty->name, info->count);
1831 /**/
1832#endif
1833 schedule();
1834 }
cc0a8fbb 1835 __set_current_state(TASK_RUNNING);
44bafdf3
JS		 1836 remove_wait_queue(&info->open_wait, &wait);
1837 if (!tty_hung_up_p(filp)) {
1838 info->count++;
1da177e4 1839#ifdef SERIAL_DEBUG_COUNT
44bafdf3
JS		 1840 printk("cyc: %d: incrementing count to %d\n", __LINE__,
1841 info->count);
1da177e4 1842#endif
44bafdf3
JS		 1843 }
1844 info->blocked_open--;
1da177e4 1845#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1846 printk("block_til_ready after blocking: %s, count = %d\n",
1847 tty->name, info->count);
1848 /**/
1da177e4 1849#endif
44bafdf3
JS		 1850 if (retval)
1851 return retval;
1852 info->flags |= ASYNC_NORMAL_ACTIVE;
1853 return 0;
1854} /* block_til_ready */
1da177e4
LT		 1855
1856/*
1857 * This routine is called whenever a serial port is opened. It
1858 * performs the serial-specific initialization for the tty structure.
1859 */
44bafdf3 1860int cy_open(struct tty_struct *tty, struct file *filp)
1da177e4 1861{
44bafdf3
JS		 1862 struct cyclades_port *info;
1863 int retval, line;
1da177e4
LT		 1864
1865/* CP('O'); */
44bafdf3
JS		 1866 line = tty->index;
1867 if ((line < 0) || (NR_PORTS <= line)) {
1868 return -ENODEV;
1869 }
1870 info = &cy_port[line];
1871 if (info->line < 0) {
1872 return -ENODEV;
1873 }
1da177e4 1874#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1875 printk("cy_open %s\n", tty->name); /* */
1da177e4 1876#endif
44bafdf3
JS		 1877 if (serial_paranoia_check(info, tty->name, "cy_open")) {
1878 return -ENODEV;
1879 }
1da177e4 1880#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1881 printk("cy_open %s, count = %d\n", tty->name, info->count);
1882 /**/
1da177e4 1883#endif
44bafdf3 1884 info->count++;
1da177e4 1885#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1886 printk("cyc: %d: incrementing count to %d\n", __LINE__, info->count);
1da177e4 1887#endif
44bafdf3
JS		 1888 tty->driver_data = info;
1889 info->tty = tty;
1da177e4 1890
44bafdf3
JS		 1891 /*
1892 * Start up serial port
1893 */
1894 retval = startup(info);
1895 if (retval) {
1896 return retval;
1897 }
1da177e4 1898
44bafdf3
JS		 1899 retval = block_til_ready(tty, filp, info);
1900 if (retval) {
1da177e4 1901#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1902 printk("cy_open returning after block_til_ready with %d\n",
1903 retval);
1da177e4 1904#endif
44bafdf3
JS		 1905 return retval;
1906 }
1da177e4 1907#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1908 printk("cy_open done\n");
1909 /**/
1da177e4 1910#endif
44bafdf3
JS		 1911 return 0;
1912} /* cy_open */
1da177e4
LT		 1913
1914/*
1915 * ---------------------------------------------------------------------
1916 * serial167_init() and friends
1917 *
1918 * serial167_init() is called at boot-time to initialize the serial driver.
1919 * ---------------------------------------------------------------------
1920 */
1921
1922/*
1923 * This routine prints out the appropriate serial driver version
1924 * number, and identifies which options were configured into this
1925 * driver.
1926 */
44bafdf3 1927static void show_version(void)
1da177e4 1928{
44bafdf3
JS		 1929 printk("MVME166/167 cd2401 driver\n");
1930} /* show_version */
1da177e4
LT		 1931
1932/* initialize chips on card -- return number of valid
1933 chips (which is number of ports/4) */
1934
1935/*
1936 * This initialises the hardware to a reasonable state. It should
1937 * probe the chip first so as to copy 166-Bug setup as a default for
1938 * port 0. It initialises CMR to CyASYNC; that is never done again, so
1939 * as to limit the number of CyINIT_CHAN commands in normal running.
1940 *
1941 * ... I wonder what I should do if this fails ...
1942 */
1943
44bafdf3 1944void mvme167_serial_console_setup(int cflag)
1da177e4 1945{
44bafdf3 1946 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 1947 int ch;
1948 u_char spd;
1949 u_char rcor, rbpr, badspeed = 0;
1950 unsigned long flags;
1951
1952 local_irq_save(flags);
1953
1954 /*
1955 * First probe channel zero of the chip, to see what speed has
1956 * been selected.
1957 */
1958
1959 base_addr[CyCAR] = 0;
1960
1961 rcor = base_addr[CyRCOR] << 5;
1962 rbpr = base_addr[CyRBPR];
1963
1964 for (spd = 0; spd < sizeof(baud_bpr); spd++)
1965 if (rbpr == baud_bpr[spd] && rcor == baud_co[spd])
1966 break;
1967 if (spd >= sizeof(baud_bpr)) {
1968 spd = 14; /* 19200 */
1969 badspeed = 1; /* Failed to identify speed */
1970 }
1971 initial_console_speed = spd;
1972
1973 /* OK, we have chosen a speed, now reset and reinitialise */
1974
44bafdf3
JS		 1975 my_udelay(20000L); /* Allow time for any active o/p to complete */
1976 if (base_addr[CyCCR] != 0x00) {
1977 local_irq_restore(flags);
1978 /* printk(" chip is never idle (CCR != 0)\n"); */
1979 return;
1980 }
1da177e4 1981
44bafdf3
JS		 1982 base_addr[CyCCR] = CyCHIP_RESET; /* Reset the chip */
1983 my_udelay(1000L);
1da177e4 1984
44bafdf3
JS		 1985 if (base_addr[CyGFRCR] == 0x00) {
1986 local_irq_restore(flags);
1987 /* printk(" chip is not responding (GFRCR stayed 0)\n"); */
1988 return;
1989 }
1da177e4
LT		 1990
1991 /*
1992 * System clock is 20Mhz, divided by 2048, so divide by 10 for a 1.0ms
1993 * tick
1994 */
1995
1996 base_addr[CyTPR] = 10;
1997
44bafdf3
JS		 1998 base_addr[CyPILR1] = 0x01; /* Interrupt level for modem change */
1999 base_addr[CyPILR2] = 0x02; /* Interrupt level for tx ints */
2000 base_addr[CyPILR3] = 0x03; /* Interrupt level for rx ints */
1da177e4
LT		 2001
2002 /*
2003 * Attempt to set up all channels to something reasonable, and
2004 * bang out a INIT_CHAN command. We should then be able to limit
2005 * the ammount of fiddling we have to do in normal running.
2006 */
2007
44bafdf3
JS		 2008 for (ch = 3; ch >= 0; ch--) {
2009 base_addr[CyCAR] = (u_char) ch;
1da177e4
LT		 2010 base_addr[CyIER] = 0;
2011 base_addr[CyCMR] = CyASYNC;
44bafdf3 2012 base_addr[CyLICR] = (u_char) ch << 2;
1da177e4
LT		 2013 base_addr[CyLIVR] = 0x5c;
2014 base_addr[CyTCOR] = baud_co[spd];
2015 base_addr[CyTBPR] = baud_bpr[spd];
2016 base_addr[CyRCOR] = baud_co[spd] >> 5;
2017 base_addr[CyRBPR] = baud_bpr[spd];
2018 base_addr[CySCHR1] = 'Q' & 0x1f;
2019 base_addr[CySCHR2] = 'X' & 0x1f;
2020 base_addr[CySCRL] = 0;
2021 base_addr[CySCRH] = 0;
2022 base_addr[CyCOR1] = Cy_8_BITS | CyPARITY_NONE;
2023 base_addr[CyCOR2] = 0;
2024 base_addr[CyCOR3] = Cy_1_STOP;
2025 base_addr[CyCOR4] = baud_cor4[spd];
2026 base_addr[CyCOR5] = 0;
2027 base_addr[CyCOR6] = 0;
2028 base_addr[CyCOR7] = 0;
2029 base_addr[CyRTPRL] = 2;
2030 base_addr[CyRTPRH] = 0;
44bafdf3
JS		 2031 base_addr[CyMSVR1] = 0;
2032 base_addr[CyMSVR2] = 0;
2033 write_cy_cmd(base_addr, CyINIT_CHAN | CyDIS_RCVR | CyDIS_XMTR);
1da177e4
LT		 2034 }
2035
2036 /*
2037 * Now do specials for channel zero....
2038 */
2039
44bafdf3
JS		 2040 base_addr[CyMSVR1] = CyRTS;
2041 base_addr[CyMSVR2] = CyDTR;
1da177e4 2042 base_addr[CyIER] = CyRxData;
44bafdf3 2043 write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR);
1da177e4
LT		 2044
2045 local_irq_restore(flags);
2046
2047 my_udelay(20000L); /* Let it all settle down */
2048
44bafdf3 2049 printk("CD2401 initialised, chip is rev 0x%02x\n", base_addr[CyGFRCR]);
1da177e4 2050 if (badspeed)
44bafdf3
JS		 2051 printk
2052 (" WARNING: Failed to identify line speed, rcor=%02x,rbpr=%02x\n",
2053 rcor >> 5, rbpr);
2054} /* serial_console_init */
1da177e4 2055
b68e31d0 2056static const struct tty_operations cy_ops = {
1da177e4
LT		 2057 .open = cy_open,
2058 .close = cy_close,
2059 .write = cy_write,
2060 .put_char = cy_put_char,
2061 .flush_chars = cy_flush_chars,
2062 .write_room = cy_write_room,
2063 .chars_in_buffer = cy_chars_in_buffer,
2064 .flush_buffer = cy_flush_buffer,
2065 .ioctl = cy_ioctl,
2066 .throttle = cy_throttle,
2067 .unthrottle = cy_unthrottle,
2068 .set_termios = cy_set_termios,
2069 .stop = cy_stop,
2070 .start = cy_start,
2071 .hangup = cy_hangup,
2072 .tiocmget = cy_tiocmget,
2073 .tiocmset = cy_tiocmset,
2074};
44bafdf3 2075
1da177e4
LT		 2076/* The serial driver boot-time initialization code!
2077 Hardware I/O ports are mapped to character special devices on a
2078 first found, first allocated manner. That is, this code searches
2079 for Cyclom cards in the system. As each is found, it is probed
2080 to discover how many chips (and thus how many ports) are present.
2081 These ports are mapped to the tty ports 64 and upward in monotonic
2082 fashion. If an 8-port card is replaced with a 16-port card, the
2083 port mapping on a following card will shift.
2084
2085 This approach is different from what is used in the other serial
2086 device driver because the Cyclom is more properly a multiplexer,
2087 not just an aggregation of serial ports on one card.
2088
2089 If there are more cards with more ports than have been statically
2090 allocated above, a warning is printed and the extra ports are ignored.
2091 */
44bafdf3 2092static int __init serial167_init(void)
1da177e4 2093{
44bafdf3
JS		 2094 struct cyclades_port *info;
2095 int ret = 0;
2096 int good_ports = 0;
2097 int port_num = 0;
2098 int index;
2099 int DefSpeed;
1da177e4 2100#ifdef notyet
44bafdf3 2101 struct sigaction sa;
1da177e4
LT		 2102#endif
2103
44bafdf3
JS		 2104 if (!(mvme16x_config & MVME16x_CONFIG_GOT_CD2401))
2105 return 0;
1da177e4 2106
44bafdf3
JS		 2107 cy_serial_driver = alloc_tty_driver(NR_PORTS);
2108 if (!cy_serial_driver)
2109 return -ENOMEM;
1da177e4
LT		 2110
2111#if 0
44bafdf3 2112 scrn[1] = '\0';
1da177e4
LT		 2113#endif
2114
44bafdf3 2115 show_version();
1da177e4 2116
44bafdf3
JS		 2117 /* Has "console=0,9600n8" been used in bootinfo to change speed? */
2118 if (serial_console_cflag)
2119 DefSpeed = serial_console_cflag & 0017;
2120 else {
2121 DefSpeed = initial_console_speed;
2122 serial_console_info = &cy_port[0];
2123 serial_console_cflag = DefSpeed | CS8;
1da177e4 2124#if 0
44bafdf3
JS		 2125 serial_console = 64; /*callout_driver.minor_start */
2126#endif
2127 }
1da177e4 2128
44bafdf3 2129 /* Initialize the tty_driver structure */
1da177e4 2130
44bafdf3
JS		 2131 cy_serial_driver->owner = THIS_MODULE;
2132 cy_serial_driver->name = "ttyS";
2133 cy_serial_driver->major = TTY_MAJOR;
2134 cy_serial_driver->minor_start = 64;
2135 cy_serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2136 cy_serial_driver->subtype = SERIAL_TYPE_NORMAL;
2137 cy_serial_driver->init_termios = tty_std_termios;
2138 cy_serial_driver->init_termios.c_cflag =
2139 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2140 cy_serial_driver->flags = TTY_DRIVER_REAL_RAW;
2141 tty_set_operations(cy_serial_driver, &cy_ops);
2142
2143 ret = tty_register_driver(cy_serial_driver);
2144 if (ret) {
2145 printk(KERN_ERR "Couldn't register MVME166/7 serial driver\n");
2146 put_tty_driver(cy_serial_driver);
2147 return ret;
2148 }
1da177e4 2149
44bafdf3
JS		 2150 port_num = 0;
2151 info = cy_port;
2152 for (index = 0; index < 1; index++) {
1da177e4 2153
44bafdf3
JS		 2154 good_ports = 4;
2155
2156 if (port_num < NR_PORTS) {
2157 while (good_ports-- && port_num < NR_PORTS) {
1da177e4 2158 /*** initialize port ***/
44bafdf3
JS		 2159 info->magic = CYCLADES_MAGIC;
2160 info->type = PORT_CIRRUS;
2161 info->card = index;
2162 info->line = port_num;
2163 info->flags = STD_COM_FLAGS;
2164 info->tty = NULL;
2165 info->xmit_fifo_size = 12;
2166 info->cor1 = CyPARITY_NONE | Cy_8_BITS;
2167 info->cor2 = CyETC;
2168 info->cor3 = Cy_1_STOP;
2169 info->cor4 = 0x08; /* _very_ small receive threshold */
2170 info->cor5 = 0;
2171 info->cor6 = 0;
2172 info->cor7 = 0;
2173 info->tbpr = baud_bpr[DefSpeed]; /* Tx BPR */
2174 info->tco = baud_co[DefSpeed]; /* Tx CO */
2175 info->rbpr = baud_bpr[DefSpeed]; /* Rx BPR */
2176 info->rco = baud_co[DefSpeed] >> 5; /* Rx CO */
2177 info->close_delay = 0;
2178 info->x_char = 0;
44bafdf3 2179 info->count = 0;
1da177e4 2180#ifdef SERIAL_DEBUG_COUNT
44bafdf3
JS		 2181 printk("cyc: %d: setting count to 0\n",
2182 __LINE__);
2183#endif
2184 info->blocked_open = 0;
2185 info->default_threshold = 0;
2186 info->default_timeout = 0;
44bafdf3
JS		 2187 init_waitqueue_head(&info->open_wait);
2188 init_waitqueue_head(&info->close_wait);
2189 /* info->session */
2190 /* info->pgrp */
1da177e4 2191/*** !!!!!!!! this may expose new bugs !!!!!!!!! *********/
44bafdf3
JS		 2192 info->read_status_mask =
2193 CyTIMEOUT | CySPECHAR | CyBREAK | CyPARITY |
2194 CyFRAME | CyOVERRUN;
2195 /* info->timeout */
2196
2197 printk("ttyS%d ", info->line);
2198 port_num++;
2199 info++;
2200 if (!(port_num & 7)) {
2201 printk("\n ");
2202 }
2203 }
1da177e4 2204 }
44bafdf3
JS		 2205 printk("\n");
2206 }
2207 while (port_num < NR_PORTS) {
2208 info->line = -1;
2209 port_num++;
2210 info++;
2211 }
1da177e4 2212#ifdef CONFIG_REMOTE_DEBUG
44bafdf3
JS		 2213 debug_setup();
2214#endif
2215 ret = request_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt, 0,
2216 "cd2401_errors", cd2401_rxerr_interrupt);
2217 if (ret) {
2218 printk(KERN_ERR "Could't get cd2401_errors IRQ");
2219 goto cleanup_serial_driver;
2220 }
2221
2222 ret = request_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt, 0,
2223 "cd2401_modem", cd2401_modem_interrupt);
2224 if (ret) {
2225 printk(KERN_ERR "Could't get cd2401_modem IRQ");
2226 goto cleanup_irq_cd2401_errors;
2227 }
2228
2229 ret = request_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt, 0,
2230 "cd2401_txints", cd2401_tx_interrupt);
2231 if (ret) {
2232 printk(KERN_ERR "Could't get cd2401_txints IRQ");
2233 goto cleanup_irq_cd2401_modem;
2234 }
2235
2236 ret = request_irq(MVME167_IRQ_SER_RX, cd2401_rx_interrupt, 0,
2237 "cd2401_rxints", cd2401_rx_interrupt);
2238 if (ret) {
2239 printk(KERN_ERR "Could't get cd2401_rxints IRQ");
2240 goto cleanup_irq_cd2401_txints;
2241 }
2242
2243 /* Now we have registered the interrupt handlers, allow the interrupts */
2244
2245 pcc2chip[PccSCCMICR] = 0x15; /* Serial ints are level 5 */
2246 pcc2chip[PccSCCTICR] = 0x15;
2247 pcc2chip[PccSCCRICR] = 0x15;
2248
2249 pcc2chip[PccIMLR] = 3; /* Allow PCC2 ints above 3!? */
2250
2251 return 0;
1da177e4 2252cleanup_irq_cd2401_txints:
44bafdf3 2253 free_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt);
1da177e4 2254cleanup_irq_cd2401_modem:
44bafdf3 2255 free_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt);
1da177e4 2256cleanup_irq_cd2401_errors:
44bafdf3 2257 free_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt);
1da177e4 2258cleanup_serial_driver:
44bafdf3
JS		 2259 if (tty_unregister_driver(cy_serial_driver))
2260 printk(KERN_ERR
2261 "Couldn't unregister MVME166/7 serial driver\n");
2262 put_tty_driver(cy_serial_driver);
2263 return ret;
2264} /* serial167_init */
1da177e4
LT		 2265
2266module_init(serial167_init);
2267
1da177e4 2268#ifdef CYCLOM_SHOW_STATUS
44bafdf3 2269static void show_status(int line_num)
1da177e4 2270{
44bafdf3
JS		 2271 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
2272 int channel;
2273 struct cyclades_port *info;
2274 unsigned long flags;
2275
2276 info = &cy_port[line_num];
2277 channel = info->line;
2278 printk(" channel %d\n", channel);
2279 /**/ printk(" cy_port\n");
2280 printk(" card line flags = %d %d %x\n",
2281 info->card, info->line, info->flags);
2282 printk
2283 (" *tty read_status_mask timeout xmit_fifo_size = %lx %x %x %x\n",
2284 (long)info->tty, info->read_status_mask, info->timeout,
2285 info->xmit_fifo_size);
2286 printk(" cor1,cor2,cor3,cor4,cor5,cor6,cor7 = %x %x %x %x %x %x %x\n",
2287 info->cor1, info->cor2, info->cor3, info->cor4, info->cor5,
2288 info->cor6, info->cor7);
2289 printk(" tbpr,tco,rbpr,rco = %d %d %d %d\n", info->tbpr, info->tco,
2290 info->rbpr, info->rco);
2291 printk(" close_delay event count = %d %d %d\n", info->close_delay,
2292 info->event, info->count);
2293 printk(" x_char blocked_open = %x %x\n", info->x_char,
2294 info->blocked_open);
2295 printk(" open_wait = %lx %lx %lx\n", (long)info->open_wait);
2296
2297 local_irq_save(flags);
1da177e4
LT		 2298
2299/* Global Registers */
2300
2301 printk(" CyGFRCR %x\n", base_addr[CyGFRCR]);
2302 printk(" CyCAR %x\n", base_addr[CyCAR]);
2303 printk(" CyRISR %x\n", base_addr[CyRISR]);
2304 printk(" CyTISR %x\n", base_addr[CyTISR]);
2305 printk(" CyMISR %x\n", base_addr[CyMISR]);
2306 printk(" CyRIR %x\n", base_addr[CyRIR]);
2307 printk(" CyTIR %x\n", base_addr[CyTIR]);
2308 printk(" CyMIR %x\n", base_addr[CyMIR]);
2309 printk(" CyTPR %x\n", base_addr[CyTPR]);
2310
44bafdf3 2311 base_addr[CyCAR] = (u_char) channel;
1da177e4
LT		 2312
2313/* Virtual Registers */
2314
2315#if 0
2316 printk(" CyRIVR %x\n", base_addr[CyRIVR]);
2317 printk(" CyTIVR %x\n", base_addr[CyTIVR]);
2318 printk(" CyMIVR %x\n", base_addr[CyMIVR]);
2319 printk(" CyMISR %x\n", base_addr[CyMISR]);
2320#endif
2321
2322/* Channel Registers */
2323
2324 printk(" CyCCR %x\n", base_addr[CyCCR]);
2325 printk(" CyIER %x\n", base_addr[CyIER]);
2326 printk(" CyCOR1 %x\n", base_addr[CyCOR1]);
2327 printk(" CyCOR2 %x\n", base_addr[CyCOR2]);
2328 printk(" CyCOR3 %x\n", base_addr[CyCOR3]);
2329 printk(" CyCOR4 %x\n", base_addr[CyCOR4]);
2330 printk(" CyCOR5 %x\n", base_addr[CyCOR5]);
2331#if 0
2332 printk(" CyCCSR %x\n", base_addr[CyCCSR]);
2333 printk(" CyRDCR %x\n", base_addr[CyRDCR]);
2334#endif
2335 printk(" CySCHR1 %x\n", base_addr[CySCHR1]);
2336 printk(" CySCHR2 %x\n", base_addr[CySCHR2]);
2337#if 0
2338 printk(" CySCHR3 %x\n", base_addr[CySCHR3]);
2339 printk(" CySCHR4 %x\n", base_addr[CySCHR4]);
2340 printk(" CySCRL %x\n", base_addr[CySCRL]);
2341 printk(" CySCRH %x\n", base_addr[CySCRH]);
2342 printk(" CyLNC %x\n", base_addr[CyLNC]);
2343 printk(" CyMCOR1 %x\n", base_addr[CyMCOR1]);
2344 printk(" CyMCOR2 %x\n", base_addr[CyMCOR2]);
2345#endif
2346 printk(" CyRTPRL %x\n", base_addr[CyRTPRL]);
2347 printk(" CyRTPRH %x\n", base_addr[CyRTPRH]);
2348 printk(" CyMSVR1 %x\n", base_addr[CyMSVR1]);
2349 printk(" CyMSVR2 %x\n", base_addr[CyMSVR2]);
2350 printk(" CyRBPR %x\n", base_addr[CyRBPR]);
2351 printk(" CyRCOR %x\n", base_addr[CyRCOR]);
2352 printk(" CyTBPR %x\n", base_addr[CyTBPR]);
2353 printk(" CyTCOR %x\n", base_addr[CyTCOR]);
2354
44bafdf3
JS		 2355 local_irq_restore(flags);
2356} /* show_status */
1da177e4
LT		 2357#endif
2358
1da177e4
LT		 2359#if 0
2360/* Dummy routine in mvme16x/config.c for now */
2361
2362/* Serial console setup. Called from linux/init/main.c */
2363
2364void console_setup(char *str, int *ints)
2365{
2366 char *s;
2367 int baud, bits, parity;
2368 int cflag = 0;
2369
2370 /* Sanity check. */
44bafdf3
JS		 2371 if (ints[0] > 3 || ints[1] > 3)
2372 return;
1da177e4
LT		 2373
2374 /* Get baud, bits and parity */
2375 baud = 2400;
2376 bits = 8;
2377 parity = 'n';
44bafdf3
JS		 2378 if (ints[2])
2379 baud = ints[2];
1da177e4
LT		 2380 if ((s = strchr(str, ','))) {
2381 do {
2382 s++;
44bafdf3
JS		 2383 } while (*s >= '0' && *s <= '9');
2384 if (*s)
2385 parity = *s++;
2386 if (*s)
2387 bits = *s - '0';
1da177e4
LT		 2388 }
2389
2390 /* Now construct a cflag setting. */
44bafdf3
JS		 2391 switch (baud) {
2392 case 1200:
2393 cflag |= B1200;
2394 break;
2395 case 9600:
2396 cflag |= B9600;
2397 break;
2398 case 19200:
2399 cflag |= B19200;
2400 break;
2401 case 38400:
2402 cflag |= B38400;
2403 break;
2404 case 2400:
2405 default:
2406 cflag |= B2400;
2407 break;
1da177e4 2408 }
44bafdf3
JS		 2409 switch (bits) {
2410 case 7:
2411 cflag |= CS7;
2412 break;
2413 default:
2414 case 8:
2415 cflag |= CS8;
2416 break;
1da177e4 2417 }
44bafdf3
JS		 2418 switch (parity) {
2419 case 'o':
2420 case 'O':
2421 cflag |= PARODD;
2422 break;
2423 case 'e':
2424 case 'E':
2425 cflag |= PARENB;
2426 break;
1da177e4
LT		 2427 }
2428
2429 serial_console_info = &cy_port[ints[1]];
2430 serial_console_cflag = cflag;
44bafdf3 2431 serial_console = ints[1] + 64; /*callout_driver.minor_start */
1da177e4
LT		 2432}
2433#endif
2434
2435/*
2436 * The following is probably out of date for 2.1.x serial console stuff.
2437 *
2438 * The console is registered early on from arch/m68k/kernel/setup.c, and
2439 * it therefore relies on the chip being setup correctly by 166-Bug. This
2440 * seems reasonable, as the serial port has been used to invoke the system
2441 * boot. It also means that this function must not rely on any data
2442 * initialisation performed by serial167_init() etc.
2443 *
2444 * Of course, once the console has been registered, we had better ensure
2445 * that serial167_init() doesn't leave the chip non-functional.
2446 *
2447 * The console must be locked when we get here.
2448 */
2449
44bafdf3
JS		 2450void serial167_console_write(struct console *co, const char *str,
2451 unsigned count)
1da177e4 2452{
44bafdf3 2453 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 2454 unsigned long flags;
2455 volatile u_char sink;
2456 u_char ier;
2457 int port;
2458 u_char do_lf = 0;
2459 int i = 0;
2460
2461 local_irq_save(flags);
2462
2463 /* Ensure transmitter is enabled! */
2464
2465 port = 0;
44bafdf3 2466 base_addr[CyCAR] = (u_char) port;
1da177e4
LT		 2467 while (base_addr[CyCCR])
2468 ;
2469 base_addr[CyCCR] = CyENB_XMTR;
2470
2471 ier = base_addr[CyIER];
2472 base_addr[CyIER] = CyTxMpty;
2473
2474 while (1) {
44bafdf3 2475 if (pcc2chip[PccSCCTICR] & 0x20) {
1da177e4
LT		 2476 /* We have a Tx int. Acknowledge it */
2477 sink = pcc2chip[PccTPIACKR];
2478 if ((base_addr[CyLICR] >> 2) == port) {
2479 if (i == count) {
2480 /* Last char of string is now output */
2481 base_addr[CyTEOIR] = CyNOTRANS;
2482 break;
2483 }
2484 if (do_lf) {
2485 base_addr[CyTDR] = '\n';
2486 str++;
2487 i++;
2488 do_lf = 0;
44bafdf3 2489 } else if (*str == '\n') {
1da177e4
LT		 2490 base_addr[CyTDR] = '\r';
2491 do_lf = 1;
44bafdf3 2492 } else {
1da177e4
LT		 2493 base_addr[CyTDR] = *str++;
2494 i++;
2495 }
2496 base_addr[CyTEOIR] = 0;
44bafdf3 2497 } else
1da177e4
LT		 2498 base_addr[CyTEOIR] = CyNOTRANS;
2499 }
2500 }
2501
2502 base_addr[CyIER] = ier;
2503
2504 local_irq_restore(flags);
2505}
2506
44bafdf3
JS		 2507static struct tty_driver *serial167_console_device(struct console *c,
2508 int *index)
1da177e4
LT		 2509{
2510 *index = c->index;
2511 return cy_serial_driver;
2512}
2513
1da177e4 2514static struct console sercons = {
44bafdf3
JS		 2515 .name = "ttyS",
2516 .write = serial167_console_write,
2517 .device = serial167_console_device,
44bafdf3
JS		 2518 .flags = CON_PRINTBUFFER,
2519 .index = -1,
1da177e4
LT		 2520};
2521
1da177e4
LT		 2522static int __init serial167_console_init(void)
2523{
2524 if (vme_brdtype == VME_TYPE_MVME166 ||
44bafdf3
JS		 2525 vme_brdtype == VME_TYPE_MVME167 ||
2526 vme_brdtype == VME_TYPE_MVME177) {
1da177e4
LT		 2527 mvme167_serial_console_setup(0);
2528 register_console(&sercons);
2529 }
2530 return 0;
2531}
44bafdf3 2532
1da177e4
LT		 2533console_initcall(serial167_console_init);
2534
2535#ifdef CONFIG_REMOTE_DEBUG
44bafdf3 2536void putDebugChar(int c)
1da177e4 2537{
44bafdf3 2538 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 2539 unsigned long flags;
2540 volatile u_char sink;
2541 u_char ier;
2542 int port;
2543
2544 local_irq_save(flags);
2545
2546 /* Ensure transmitter is enabled! */
2547
2548 port = DEBUG_PORT;
44bafdf3 2549 base_addr[CyCAR] = (u_char) port;
1da177e4
LT		 2550 while (base_addr[CyCCR])
2551 ;
2552 base_addr[CyCCR] = CyENB_XMTR;
2553
2554 ier = base_addr[CyIER];
2555 base_addr[CyIER] = CyTxMpty;
2556
2557 while (1) {
44bafdf3 2558 if (pcc2chip[PccSCCTICR] & 0x20) {
1da177e4
LT		 2559 /* We have a Tx int. Acknowledge it */
2560 sink = pcc2chip[PccTPIACKR];
2561 if ((base_addr[CyLICR] >> 2) == port) {
2562 base_addr[CyTDR] = c;
2563 base_addr[CyTEOIR] = 0;
2564 break;
44bafdf3 2565 } else
1da177e4
LT		 2566 base_addr[CyTEOIR] = CyNOTRANS;
2567 }
2568 }
2569
2570 base_addr[CyIER] = ier;
2571
2572 local_irq_restore(flags);
2573}
2574
2575int getDebugChar()
2576{
44bafdf3 2577 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 2578 unsigned long flags;
2579 volatile u_char sink;
2580 u_char ier;
2581 int port;
2582 int i, c;
2583
2584 i = debugiq.out;
2585 if (i != debugiq.in) {
2586 c = debugiq.buf[i];
2587 if (++i == DEBUG_LEN)
2588 i = 0;
2589 debugiq.out = i;
2590 return c;
2591 }
2592 /* OK, nothing in queue, wait in poll loop */
2593
2594 local_irq_save(flags);
2595
2596 /* Ensure receiver is enabled! */
2597
2598 port = DEBUG_PORT;
44bafdf3 2599 base_addr[CyCAR] = (u_char) port;
1da177e4
LT		 2600#if 0
2601 while (base_addr[CyCCR])
2602 ;
2603 base_addr[CyCCR] = CyENB_RCVR;
2604#endif
2605 ier = base_addr[CyIER];
2606 base_addr[CyIER] = CyRxData;
2607
2608 while (1) {
44bafdf3 2609 if (pcc2chip[PccSCCRICR] & 0x20) {
1da177e4
LT		 2610 /* We have a Rx int. Acknowledge it */
2611 sink = pcc2chip[PccRPIACKR];
2612 if ((base_addr[CyLICR] >> 2) == port) {
2613 int cnt = base_addr[CyRFOC];
44bafdf3 2614 while (cnt-- > 0) {
1da177e4
LT		 2615 c = base_addr[CyRDR];
2616 if (c == 0)
44bafdf3
JS		 2617 printk
2618 ("!! debug char is null (cnt=%d) !!",
2619 cnt);
1da177e4 2620 else
44bafdf3 2621 queueDebugChar(c);
1da177e4
LT		 2622 }
2623 base_addr[CyREOIR] = 0;
2624 i = debugiq.out;
2625 if (i == debugiq.in)
44bafdf3 2626 panic("Debug input queue empty!");
1da177e4
LT		 2627 c = debugiq.buf[i];
2628 if (++i == DEBUG_LEN)
2629 i = 0;
2630 debugiq.out = i;
2631 break;
44bafdf3 2632 } else
1da177e4
LT		 2633 base_addr[CyREOIR] = CyNOTRANS;
2634 }
2635 }
2636
2637 base_addr[CyIER] = ier;
2638
2639 local_irq_restore(flags);
2640
2641 return (c);
2642}
2643
44bafdf3 2644void queueDebugChar(int c)
1da177e4
LT		 2645{
2646 int i;
2647
2648 i = debugiq.in;
2649 debugiq.buf[i] = c;
2650 if (++i == DEBUG_LEN)
2651 i = 0;
2652 if (i != debugiq.out)
2653 debugiq.in = i;
2654}
2655
44bafdf3 2656static void debug_setup()
1da177e4 2657{
44bafdf3
JS		 2658 unsigned long flags;
2659 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
2660 int i, cflag;
1da177e4 2661
44bafdf3 2662 cflag = B19200;
1da177e4 2663
44bafdf3 2664 local_irq_save(flags);
1da177e4 2665
44bafdf3
JS		 2666 for (i = 0; i < 4; i++) {
2667 base_addr[CyCAR] = i;
2668 base_addr[CyLICR] = i << 2;
2669 }
1da177e4 2670
44bafdf3 2671 debugiq.in = debugiq.out = 0;
1da177e4 2672
44bafdf3 2673 base_addr[CyCAR] = DEBUG_PORT;
1da177e4 2674
44bafdf3
JS		 2675 /* baud rate */
2676 i = cflag & CBAUD;
1da177e4 2677
44bafdf3 2678 base_addr[CyIER] = 0;
1da177e4 2679
44bafdf3
JS		 2680 base_addr[CyCMR] = CyASYNC;
2681 base_addr[CyLICR] = DEBUG_PORT << 2;
2682 base_addr[CyLIVR] = 0x5c;
1da177e4 2683
44bafdf3 2684 /* tx and rx baud rate */
1da177e4 2685
44bafdf3
JS		 2686 base_addr[CyTCOR] = baud_co[i];
2687 base_addr[CyTBPR] = baud_bpr[i];
2688 base_addr[CyRCOR] = baud_co[i] >> 5;
2689 base_addr[CyRBPR] = baud_bpr[i];
1da177e4 2690
44bafdf3 2691 /* set line characteristics according configuration */
1da177e4 2692
44bafdf3
JS		 2693 base_addr[CySCHR1] = 0;
2694 base_addr[CySCHR2] = 0;
2695 base_addr[CySCRL] = 0;
2696 base_addr[CySCRH] = 0;
2697 base_addr[CyCOR1] = Cy_8_BITS | CyPARITY_NONE;
2698 base_addr[CyCOR2] = 0;
2699 base_addr[CyCOR3] = Cy_1_STOP;
2700 base_addr[CyCOR4] = baud_cor4[i];
2701 base_addr[CyCOR5] = 0;
2702 base_addr[CyCOR6] = 0;
2703 base_addr[CyCOR7] = 0;
1da177e4 2704
44bafdf3
JS		 2705 write_cy_cmd(base_addr, CyINIT_CHAN);
2706 write_cy_cmd(base_addr, CyENB_RCVR);
1da177e4 2707
44bafdf3 2708 base_addr[CyCAR] = DEBUG_PORT; /* !!! Is this needed? */
1da177e4 2709
44bafdf3
JS		 2710 base_addr[CyRTPRL] = 2;
2711 base_addr[CyRTPRH] = 0;
1da177e4 2712
44bafdf3
JS		 2713 base_addr[CyMSVR1] = CyRTS;
2714 base_addr[CyMSVR2] = CyDTR;
1da177e4 2715
44bafdf3 2716 base_addr[CyIER] = CyRxData;
1da177e4 2717
44bafdf3 2718 local_irq_restore(flags);
1da177e4 2719
44bafdf3 2720} /* debug_setup */
1da177e4
LT		 2721
2722#endif
2723
2724MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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