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1da177e4 LT |
1 | /*****************************************************************************/ |
2 | ||
3 | /* | |
4 | * stallion.c -- stallion multiport serial driver. | |
5 | * | |
6 | * Copyright (C) 1996-1999 Stallion Technologies | |
7 | * Copyright (C) 1994-1996 Greg Ungerer. | |
8 | * | |
9 | * This code is loosely based on the Linux serial driver, written by | |
10 | * Linus Torvalds, Theodore T'so and others. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | */ | |
26 | ||
27 | /*****************************************************************************/ | |
28 | ||
1da177e4 | 29 | #include <linux/module.h> |
d43c36dc | 30 | #include <linux/sched.h> |
1da177e4 LT |
31 | #include <linux/slab.h> |
32 | #include <linux/interrupt.h> | |
33 | #include <linux/tty.h> | |
34 | #include <linux/tty_flip.h> | |
35 | #include <linux/serial.h> | |
8561c44c | 36 | #include <linux/seq_file.h> |
1da177e4 LT |
37 | #include <linux/cd1400.h> |
38 | #include <linux/sc26198.h> | |
39 | #include <linux/comstats.h> | |
40 | #include <linux/stallion.h> | |
41 | #include <linux/ioport.h> | |
42 | #include <linux/init.h> | |
43 | #include <linux/smp_lock.h> | |
1da177e4 LT |
44 | #include <linux/device.h> |
45 | #include <linux/delay.h> | |
843b568c | 46 | #include <linux/ctype.h> |
1da177e4 LT |
47 | |
48 | #include <asm/io.h> | |
49 | #include <asm/uaccess.h> | |
50 | ||
1da177e4 | 51 | #include <linux/pci.h> |
1da177e4 LT |
52 | |
53 | /*****************************************************************************/ | |
54 | ||
55 | /* | |
56 | * Define different board types. Use the standard Stallion "assigned" | |
57 | * board numbers. Boards supported in this driver are abbreviated as | |
58 | * EIO = EasyIO and ECH = EasyConnection 8/32. | |
59 | */ | |
60 | #define BRD_EASYIO 20 | |
61 | #define BRD_ECH 21 | |
62 | #define BRD_ECHMC 22 | |
63 | #define BRD_ECHPCI 26 | |
64 | #define BRD_ECH64PCI 27 | |
65 | #define BRD_EASYIOPCI 28 | |
66 | ||
843b568c | 67 | struct stlconf { |
6b2c9457 | 68 | unsigned int brdtype; |
1da177e4 LT |
69 | int ioaddr1; |
70 | int ioaddr2; | |
71 | unsigned long memaddr; | |
72 | int irq; | |
73 | int irqtype; | |
1da177e4 LT |
74 | }; |
75 | ||
843b568c | 76 | static unsigned int stl_nrbrds; |
1da177e4 LT |
77 | |
78 | /*****************************************************************************/ | |
79 | ||
80 | /* | |
81 | * Define some important driver characteristics. Device major numbers | |
82 | * allocated as per Linux Device Registry. | |
83 | */ | |
84 | #ifndef STL_SIOMEMMAJOR | |
85 | #define STL_SIOMEMMAJOR 28 | |
86 | #endif | |
87 | #ifndef STL_SERIALMAJOR | |
88 | #define STL_SERIALMAJOR 24 | |
89 | #endif | |
90 | #ifndef STL_CALLOUTMAJOR | |
91 | #define STL_CALLOUTMAJOR 25 | |
92 | #endif | |
93 | ||
94 | /* | |
95 | * Set the TX buffer size. Bigger is better, but we don't want | |
96 | * to chew too much memory with buffers! | |
97 | */ | |
98 | #define STL_TXBUFLOW 512 | |
99 | #define STL_TXBUFSIZE 4096 | |
100 | ||
101 | /*****************************************************************************/ | |
102 | ||
103 | /* | |
104 | * Define our local driver identity first. Set up stuff to deal with | |
105 | * all the local structures required by a serial tty driver. | |
106 | */ | |
107 | static char *stl_drvtitle = "Stallion Multiport Serial Driver"; | |
108 | static char *stl_drvname = "stallion"; | |
109 | static char *stl_drvversion = "5.6.0"; | |
110 | ||
111 | static struct tty_driver *stl_serial; | |
112 | ||
1da177e4 LT |
113 | /* |
114 | * Define a local default termios struct. All ports will be created | |
115 | * with this termios initially. Basically all it defines is a raw port | |
116 | * at 9600, 8 data bits, 1 stop bit. | |
117 | */ | |
606d099c | 118 | static struct ktermios stl_deftermios = { |
1da177e4 LT |
119 | .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL), |
120 | .c_cc = INIT_C_CC, | |
606d099c AC |
121 | .c_ispeed = 9600, |
122 | .c_ospeed = 9600, | |
1da177e4 LT |
123 | }; |
124 | ||
1da177e4 LT |
125 | /* |
126 | * Define global place to put buffer overflow characters. | |
127 | */ | |
128 | static char stl_unwanted[SC26198_RXFIFOSIZE]; | |
129 | ||
130 | /*****************************************************************************/ | |
131 | ||
79cfe7ab | 132 | static DEFINE_MUTEX(stl_brdslock); |
ca7ed0f2 | 133 | static struct stlbrd *stl_brds[STL_MAXBRDS]; |
1da177e4 | 134 | |
31f35939 AC |
135 | static const struct tty_port_operations stl_port_ops; |
136 | ||
1da177e4 LT |
137 | /* |
138 | * Per board state flags. Used with the state field of the board struct. | |
139 | * Not really much here! | |
140 | */ | |
141 | #define BRD_FOUND 0x1 | |
fc06b5cf JS |
142 | #define STL_PROBED 0x2 |
143 | ||
1da177e4 LT |
144 | |
145 | /* | |
146 | * Define the port structure istate flags. These set of flags are | |
147 | * modified at interrupt time - so setting and reseting them needs | |
148 | * to be atomic. Use the bit clear/setting routines for this. | |
149 | */ | |
150 | #define ASYI_TXBUSY 1 | |
151 | #define ASYI_TXLOW 2 | |
ccfea3c9 | 152 | #define ASYI_TXFLOWED 3 |
1da177e4 LT |
153 | |
154 | /* | |
155 | * Define an array of board names as printable strings. Handy for | |
156 | * referencing boards when printing trace and stuff. | |
157 | */ | |
158 | static char *stl_brdnames[] = { | |
615e4a71 JS |
159 | NULL, |
160 | NULL, | |
161 | NULL, | |
162 | NULL, | |
163 | NULL, | |
164 | NULL, | |
165 | NULL, | |
166 | NULL, | |
167 | NULL, | |
168 | NULL, | |
169 | NULL, | |
170 | NULL, | |
171 | NULL, | |
172 | NULL, | |
173 | NULL, | |
174 | NULL, | |
175 | NULL, | |
176 | NULL, | |
177 | NULL, | |
178 | NULL, | |
1da177e4 LT |
179 | "EasyIO", |
180 | "EC8/32-AT", | |
181 | "EC8/32-MC", | |
615e4a71 JS |
182 | NULL, |
183 | NULL, | |
184 | NULL, | |
1da177e4 LT |
185 | "EC8/32-PCI", |
186 | "EC8/64-PCI", | |
187 | "EasyIO-PCI", | |
188 | }; | |
189 | ||
190 | /*****************************************************************************/ | |
191 | ||
192 | /* | |
193 | * Define some string labels for arguments passed from the module | |
194 | * load line. These allow for easy board definitions, and easy | |
195 | * modification of the io, memory and irq resoucres. | |
196 | */ | |
6b2c9457 | 197 | static unsigned int stl_nargs; |
1da177e4 LT |
198 | static char *board0[4]; |
199 | static char *board1[4]; | |
200 | static char *board2[4]; | |
201 | static char *board3[4]; | |
202 | ||
203 | static char **stl_brdsp[] = { | |
204 | (char **) &board0, | |
205 | (char **) &board1, | |
206 | (char **) &board2, | |
207 | (char **) &board3 | |
208 | }; | |
209 | ||
210 | /* | |
211 | * Define a set of common board names, and types. This is used to | |
212 | * parse any module arguments. | |
213 | */ | |
214 | ||
ca7ed0f2 | 215 | static struct { |
1da177e4 LT |
216 | char *name; |
217 | int type; | |
ca7ed0f2 | 218 | } stl_brdstr[] = { |
1da177e4 LT |
219 | { "easyio", BRD_EASYIO }, |
220 | { "eio", BRD_EASYIO }, | |
221 | { "20", BRD_EASYIO }, | |
222 | { "ec8/32", BRD_ECH }, | |
223 | { "ec8/32-at", BRD_ECH }, | |
224 | { "ec8/32-isa", BRD_ECH }, | |
225 | { "ech", BRD_ECH }, | |
226 | { "echat", BRD_ECH }, | |
227 | { "21", BRD_ECH }, | |
228 | { "ec8/32-mc", BRD_ECHMC }, | |
229 | { "ec8/32-mca", BRD_ECHMC }, | |
230 | { "echmc", BRD_ECHMC }, | |
231 | { "echmca", BRD_ECHMC }, | |
232 | { "22", BRD_ECHMC }, | |
233 | { "ec8/32-pc", BRD_ECHPCI }, | |
234 | { "ec8/32-pci", BRD_ECHPCI }, | |
235 | { "26", BRD_ECHPCI }, | |
236 | { "ec8/64-pc", BRD_ECH64PCI }, | |
237 | { "ec8/64-pci", BRD_ECH64PCI }, | |
238 | { "ech-pci", BRD_ECH64PCI }, | |
239 | { "echpci", BRD_ECH64PCI }, | |
240 | { "echpc", BRD_ECH64PCI }, | |
241 | { "27", BRD_ECH64PCI }, | |
242 | { "easyio-pc", BRD_EASYIOPCI }, | |
243 | { "easyio-pci", BRD_EASYIOPCI }, | |
244 | { "eio-pci", BRD_EASYIOPCI }, | |
245 | { "eiopci", BRD_EASYIOPCI }, | |
246 | { "28", BRD_EASYIOPCI }, | |
247 | }; | |
248 | ||
249 | /* | |
250 | * Define the module agruments. | |
251 | */ | |
1da177e4 LT |
252 | |
253 | module_param_array(board0, charp, &stl_nargs, 0); | |
254 | MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
255 | module_param_array(board1, charp, &stl_nargs, 0); | |
256 | MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
257 | module_param_array(board2, charp, &stl_nargs, 0); | |
258 | MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
259 | module_param_array(board3, charp, &stl_nargs, 0); | |
260 | MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
261 | ||
262 | /*****************************************************************************/ | |
263 | ||
264 | /* | |
265 | * Hardware ID bits for the EasyIO and ECH boards. These defines apply | |
266 | * to the directly accessible io ports of these boards (not the uarts - | |
267 | * they are in cd1400.h and sc26198.h). | |
268 | */ | |
269 | #define EIO_8PORTRS 0x04 | |
270 | #define EIO_4PORTRS 0x05 | |
271 | #define EIO_8PORTDI 0x00 | |
272 | #define EIO_8PORTM 0x06 | |
273 | #define EIO_MK3 0x03 | |
274 | #define EIO_IDBITMASK 0x07 | |
275 | ||
276 | #define EIO_BRDMASK 0xf0 | |
277 | #define ID_BRD4 0x10 | |
278 | #define ID_BRD8 0x20 | |
279 | #define ID_BRD16 0x30 | |
280 | ||
281 | #define EIO_INTRPEND 0x08 | |
282 | #define EIO_INTEDGE 0x00 | |
283 | #define EIO_INTLEVEL 0x08 | |
284 | #define EIO_0WS 0x10 | |
285 | ||
286 | #define ECH_ID 0xa0 | |
287 | #define ECH_IDBITMASK 0xe0 | |
288 | #define ECH_BRDENABLE 0x08 | |
289 | #define ECH_BRDDISABLE 0x00 | |
290 | #define ECH_INTENABLE 0x01 | |
291 | #define ECH_INTDISABLE 0x00 | |
292 | #define ECH_INTLEVEL 0x02 | |
293 | #define ECH_INTEDGE 0x00 | |
294 | #define ECH_INTRPEND 0x01 | |
295 | #define ECH_BRDRESET 0x01 | |
296 | ||
297 | #define ECHMC_INTENABLE 0x01 | |
298 | #define ECHMC_BRDRESET 0x02 | |
299 | ||
300 | #define ECH_PNLSTATUS 2 | |
301 | #define ECH_PNL16PORT 0x20 | |
302 | #define ECH_PNLIDMASK 0x07 | |
303 | #define ECH_PNLXPID 0x40 | |
304 | #define ECH_PNLINTRPEND 0x80 | |
305 | ||
306 | #define ECH_ADDR2MASK 0x1e0 | |
307 | ||
308 | /* | |
309 | * Define the vector mapping bits for the programmable interrupt board | |
310 | * hardware. These bits encode the interrupt for the board to use - it | |
311 | * is software selectable (except the EIO-8M). | |
312 | */ | |
313 | static unsigned char stl_vecmap[] = { | |
314 | 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07, | |
315 | 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03 | |
316 | }; | |
317 | ||
b65b5b59 AC |
318 | /* |
319 | * Lock ordering is that you may not take stallion_lock holding | |
320 | * brd_lock. | |
321 | */ | |
322 | ||
323 | static spinlock_t brd_lock; /* Guard the board mapping */ | |
324 | static spinlock_t stallion_lock; /* Guard the tty driver */ | |
325 | ||
1da177e4 LT |
326 | /* |
327 | * Set up enable and disable macros for the ECH boards. They require | |
328 | * the secondary io address space to be activated and deactivated. | |
329 | * This way all ECH boards can share their secondary io region. | |
330 | * If this is an ECH-PCI board then also need to set the page pointer | |
331 | * to point to the correct page. | |
332 | */ | |
333 | #define BRDENABLE(brdnr,pagenr) \ | |
334 | if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \ | |
335 | outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \ | |
336 | stl_brds[(brdnr)]->ioctrl); \ | |
337 | else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \ | |
338 | outb((pagenr), stl_brds[(brdnr)]->ioctrl); | |
339 | ||
340 | #define BRDDISABLE(brdnr) \ | |
341 | if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \ | |
342 | outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \ | |
343 | stl_brds[(brdnr)]->ioctrl); | |
344 | ||
345 | #define STL_CD1400MAXBAUD 230400 | |
346 | #define STL_SC26198MAXBAUD 460800 | |
347 | ||
348 | #define STL_BAUDBASE 115200 | |
349 | #define STL_CLOSEDELAY (5 * HZ / 10) | |
350 | ||
351 | /*****************************************************************************/ | |
352 | ||
1da177e4 LT |
353 | /* |
354 | * Define the Stallion PCI vendor and device IDs. | |
355 | */ | |
356 | #ifndef PCI_VENDOR_ID_STALLION | |
357 | #define PCI_VENDOR_ID_STALLION 0x124d | |
358 | #endif | |
359 | #ifndef PCI_DEVICE_ID_ECHPCI832 | |
360 | #define PCI_DEVICE_ID_ECHPCI832 0x0000 | |
361 | #endif | |
362 | #ifndef PCI_DEVICE_ID_ECHPCI864 | |
363 | #define PCI_DEVICE_ID_ECHPCI864 0x0002 | |
364 | #endif | |
365 | #ifndef PCI_DEVICE_ID_EIOPCI | |
366 | #define PCI_DEVICE_ID_EIOPCI 0x0003 | |
367 | #endif | |
368 | ||
369 | /* | |
370 | * Define structure to hold all Stallion PCI boards. | |
371 | */ | |
1da177e4 | 372 | |
b1b84fe0 JS |
373 | static struct pci_device_id stl_pcibrds[] = { |
374 | { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864), | |
375 | .driver_data = BRD_ECH64PCI }, | |
376 | { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI), | |
377 | .driver_data = BRD_EASYIOPCI }, | |
378 | { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832), | |
379 | .driver_data = BRD_ECHPCI }, | |
380 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410), | |
381 | .driver_data = BRD_ECHPCI }, | |
382 | { } | |
383 | }; | |
384 | MODULE_DEVICE_TABLE(pci, stl_pcibrds); | |
1da177e4 LT |
385 | |
386 | /*****************************************************************************/ | |
387 | ||
388 | /* | |
389 | * Define macros to extract a brd/port number from a minor number. | |
390 | */ | |
391 | #define MINOR2BRD(min) (((min) & 0xc0) >> 6) | |
392 | #define MINOR2PORT(min) ((min) & 0x3f) | |
393 | ||
394 | /* | |
395 | * Define a baud rate table that converts termios baud rate selector | |
396 | * into the actual baud rate value. All baud rate calculations are | |
397 | * based on the actual baud rate required. | |
398 | */ | |
399 | static unsigned int stl_baudrates[] = { | |
400 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, | |
401 | 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 | |
402 | }; | |
403 | ||
1da177e4 LT |
404 | /*****************************************************************************/ |
405 | ||
406 | /* | |
407 | * Declare all those functions in this driver! | |
408 | */ | |
409 | ||
894cb917 | 410 | static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg); |
ca7ed0f2 | 411 | static int stl_brdinit(struct stlbrd *brdp); |
d18a750f | 412 | static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp); |
ca7ed0f2 | 413 | static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp); |
1da177e4 | 414 | |
1da177e4 LT |
415 | /* |
416 | * CD1400 uart specific handling functions. | |
417 | */ | |
ca7ed0f2 JS |
418 | static void stl_cd1400setreg(struct stlport *portp, int regnr, int value); |
419 | static int stl_cd1400getreg(struct stlport *portp, int regnr); | |
420 | static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value); | |
421 | static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp); | |
422 | static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); | |
606d099c | 423 | static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp); |
ca7ed0f2 JS |
424 | static int stl_cd1400getsignals(struct stlport *portp); |
425 | static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts); | |
426 | static void stl_cd1400ccrwait(struct stlport *portp); | |
427 | static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx); | |
428 | static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx); | |
429 | static void stl_cd1400disableintrs(struct stlport *portp); | |
430 | static void stl_cd1400sendbreak(struct stlport *portp, int len); | |
431 | static void stl_cd1400flowctrl(struct stlport *portp, int state); | |
432 | static void stl_cd1400sendflow(struct stlport *portp, int state); | |
433 | static void stl_cd1400flush(struct stlport *portp); | |
434 | static int stl_cd1400datastate(struct stlport *portp); | |
435 | static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase); | |
436 | static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase); | |
437 | static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr); | |
438 | static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr); | |
439 | static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr); | |
440 | ||
441 | static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr); | |
1da177e4 LT |
442 | |
443 | /* | |
444 | * SC26198 uart specific handling functions. | |
445 | */ | |
ca7ed0f2 JS |
446 | static void stl_sc26198setreg(struct stlport *portp, int regnr, int value); |
447 | static int stl_sc26198getreg(struct stlport *portp, int regnr); | |
448 | static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value); | |
449 | static int stl_sc26198getglobreg(struct stlport *portp, int regnr); | |
450 | static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp); | |
451 | static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); | |
606d099c | 452 | static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp); |
ca7ed0f2 JS |
453 | static int stl_sc26198getsignals(struct stlport *portp); |
454 | static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts); | |
455 | static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx); | |
456 | static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx); | |
457 | static void stl_sc26198disableintrs(struct stlport *portp); | |
458 | static void stl_sc26198sendbreak(struct stlport *portp, int len); | |
459 | static void stl_sc26198flowctrl(struct stlport *portp, int state); | |
460 | static void stl_sc26198sendflow(struct stlport *portp, int state); | |
461 | static void stl_sc26198flush(struct stlport *portp); | |
462 | static int stl_sc26198datastate(struct stlport *portp); | |
463 | static void stl_sc26198wait(struct stlport *portp); | |
464 | static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty); | |
465 | static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase); | |
466 | static void stl_sc26198txisr(struct stlport *port); | |
467 | static void stl_sc26198rxisr(struct stlport *port, unsigned int iack); | |
468 | static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch); | |
469 | static void stl_sc26198rxbadchars(struct stlport *portp); | |
470 | static void stl_sc26198otherisr(struct stlport *port, unsigned int iack); | |
1da177e4 LT |
471 | |
472 | /*****************************************************************************/ | |
473 | ||
474 | /* | |
475 | * Generic UART support structure. | |
476 | */ | |
477 | typedef struct uart { | |
ca7ed0f2 JS |
478 | int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp); |
479 | void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); | |
606d099c | 480 | void (*setport)(struct stlport *portp, struct ktermios *tiosp); |
ca7ed0f2 JS |
481 | int (*getsignals)(struct stlport *portp); |
482 | void (*setsignals)(struct stlport *portp, int dtr, int rts); | |
483 | void (*enablerxtx)(struct stlport *portp, int rx, int tx); | |
484 | void (*startrxtx)(struct stlport *portp, int rx, int tx); | |
485 | void (*disableintrs)(struct stlport *portp); | |
486 | void (*sendbreak)(struct stlport *portp, int len); | |
487 | void (*flowctrl)(struct stlport *portp, int state); | |
488 | void (*sendflow)(struct stlport *portp, int state); | |
489 | void (*flush)(struct stlport *portp); | |
490 | int (*datastate)(struct stlport *portp); | |
491 | void (*intr)(struct stlpanel *panelp, unsigned int iobase); | |
1da177e4 LT |
492 | } uart_t; |
493 | ||
494 | /* | |
495 | * Define some macros to make calling these functions nice and clean. | |
496 | */ | |
497 | #define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit) | |
498 | #define stl_portinit (* ((uart_t *) portp->uartp)->portinit) | |
499 | #define stl_setport (* ((uart_t *) portp->uartp)->setport) | |
500 | #define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals) | |
501 | #define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals) | |
502 | #define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx) | |
503 | #define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx) | |
504 | #define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs) | |
505 | #define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak) | |
506 | #define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl) | |
507 | #define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow) | |
508 | #define stl_flush (* ((uart_t *) portp->uartp)->flush) | |
509 | #define stl_datastate (* ((uart_t *) portp->uartp)->datastate) | |
510 | ||
511 | /*****************************************************************************/ | |
512 | ||
513 | /* | |
514 | * CD1400 UART specific data initialization. | |
515 | */ | |
516 | static uart_t stl_cd1400uart = { | |
517 | stl_cd1400panelinit, | |
518 | stl_cd1400portinit, | |
519 | stl_cd1400setport, | |
520 | stl_cd1400getsignals, | |
521 | stl_cd1400setsignals, | |
522 | stl_cd1400enablerxtx, | |
523 | stl_cd1400startrxtx, | |
524 | stl_cd1400disableintrs, | |
525 | stl_cd1400sendbreak, | |
526 | stl_cd1400flowctrl, | |
527 | stl_cd1400sendflow, | |
528 | stl_cd1400flush, | |
529 | stl_cd1400datastate, | |
530 | stl_cd1400eiointr | |
531 | }; | |
532 | ||
533 | /* | |
534 | * Define the offsets within the register bank of a cd1400 based panel. | |
535 | * These io address offsets are common to the EasyIO board as well. | |
536 | */ | |
537 | #define EREG_ADDR 0 | |
538 | #define EREG_DATA 4 | |
539 | #define EREG_RXACK 5 | |
540 | #define EREG_TXACK 6 | |
541 | #define EREG_MDACK 7 | |
542 | ||
543 | #define EREG_BANKSIZE 8 | |
544 | ||
545 | #define CD1400_CLK 25000000 | |
546 | #define CD1400_CLK8M 20000000 | |
547 | ||
548 | /* | |
549 | * Define the cd1400 baud rate clocks. These are used when calculating | |
550 | * what clock and divisor to use for the required baud rate. Also | |
551 | * define the maximum baud rate allowed, and the default base baud. | |
552 | */ | |
553 | static int stl_cd1400clkdivs[] = { | |
554 | CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4 | |
555 | }; | |
556 | ||
557 | /*****************************************************************************/ | |
558 | ||
559 | /* | |
560 | * SC26198 UART specific data initization. | |
561 | */ | |
562 | static uart_t stl_sc26198uart = { | |
563 | stl_sc26198panelinit, | |
564 | stl_sc26198portinit, | |
565 | stl_sc26198setport, | |
566 | stl_sc26198getsignals, | |
567 | stl_sc26198setsignals, | |
568 | stl_sc26198enablerxtx, | |
569 | stl_sc26198startrxtx, | |
570 | stl_sc26198disableintrs, | |
571 | stl_sc26198sendbreak, | |
572 | stl_sc26198flowctrl, | |
573 | stl_sc26198sendflow, | |
574 | stl_sc26198flush, | |
575 | stl_sc26198datastate, | |
576 | stl_sc26198intr | |
577 | }; | |
578 | ||
579 | /* | |
580 | * Define the offsets within the register bank of a sc26198 based panel. | |
581 | */ | |
582 | #define XP_DATA 0 | |
583 | #define XP_ADDR 1 | |
584 | #define XP_MODID 2 | |
585 | #define XP_STATUS 2 | |
586 | #define XP_IACK 3 | |
587 | ||
588 | #define XP_BANKSIZE 4 | |
589 | ||
590 | /* | |
591 | * Define the sc26198 baud rate table. Offsets within the table | |
592 | * represent the actual baud rate selector of sc26198 registers. | |
593 | */ | |
594 | static unsigned int sc26198_baudtable[] = { | |
595 | 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600, | |
596 | 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200, | |
597 | 230400, 460800, 921600 | |
598 | }; | |
599 | ||
fe971071 | 600 | #define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable) |
1da177e4 LT |
601 | |
602 | /*****************************************************************************/ | |
603 | ||
604 | /* | |
605 | * Define the driver info for a user level control device. Used mainly | |
606 | * to get at port stats - only not using the port device itself. | |
607 | */ | |
62322d25 | 608 | static const struct file_operations stl_fsiomem = { |
1da177e4 | 609 | .owner = THIS_MODULE, |
894cb917 | 610 | .unlocked_ioctl = stl_memioctl, |
1da177e4 LT |
611 | }; |
612 | ||
ca8eca68 | 613 | static struct class *stallion_class; |
1da177e4 | 614 | |
ccfea3c9 JS |
615 | static void stl_cd_change(struct stlport *portp) |
616 | { | |
617 | unsigned int oldsigs = portp->sigs; | |
d18a750f | 618 | struct tty_struct *tty = tty_port_tty_get(&portp->port); |
ccfea3c9 | 619 | |
d18a750f | 620 | if (!tty) |
ccfea3c9 JS |
621 | return; |
622 | ||
623 | portp->sigs = stl_getsignals(portp); | |
624 | ||
625 | if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0)) | |
f8ae4764 | 626 | wake_up_interruptible(&portp->port.open_wait); |
ccfea3c9 JS |
627 | |
628 | if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0)) | |
f8ae4764 | 629 | if (portp->port.flags & ASYNC_CHECK_CD) |
d18a750f AC |
630 | tty_hangup(tty); |
631 | tty_kref_put(tty); | |
ccfea3c9 JS |
632 | } |
633 | ||
1da177e4 LT |
634 | /* |
635 | * Check for any arguments passed in on the module load command line. | |
636 | */ | |
637 | ||
1da177e4 LT |
638 | /*****************************************************************************/ |
639 | ||
1da177e4 LT |
640 | /* |
641 | * Parse the supplied argument string, into the board conf struct. | |
642 | */ | |
643 | ||
40e82652 | 644 | static int __init stl_parsebrd(struct stlconf *confp, char **argp) |
1da177e4 LT |
645 | { |
646 | char *sp; | |
6b2c9457 | 647 | unsigned int i; |
1da177e4 | 648 | |
a0564e14 | 649 | pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp); |
1da177e4 | 650 | |
615e4a71 | 651 | if ((argp[0] == NULL) || (*argp[0] == 0)) |
014c2544 | 652 | return 0; |
1da177e4 | 653 | |
c62429d9 | 654 | for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++) |
843b568c | 655 | *sp = tolower(*sp); |
1da177e4 | 656 | |
c62429d9 | 657 | for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++) |
1da177e4 LT |
658 | if (strcmp(stl_brdstr[i].name, argp[0]) == 0) |
659 | break; | |
c62429d9 | 660 | |
fe971071 | 661 | if (i == ARRAY_SIZE(stl_brdstr)) { |
1da177e4 | 662 | printk("STALLION: unknown board name, %s?\n", argp[0]); |
fe971071 | 663 | return 0; |
1da177e4 LT |
664 | } |
665 | ||
666 | confp->brdtype = stl_brdstr[i].type; | |
667 | ||
668 | i = 1; | |
615e4a71 | 669 | if ((argp[i] != NULL) && (*argp[i] != 0)) |
843b568c | 670 | confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0); |
1da177e4 LT |
671 | i++; |
672 | if (confp->brdtype == BRD_ECH) { | |
615e4a71 | 673 | if ((argp[i] != NULL) && (*argp[i] != 0)) |
843b568c | 674 | confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0); |
1da177e4 LT |
675 | i++; |
676 | } | |
615e4a71 | 677 | if ((argp[i] != NULL) && (*argp[i] != 0)) |
843b568c | 678 | confp->irq = simple_strtoul(argp[i], NULL, 0); |
014c2544 | 679 | return 1; |
1da177e4 LT |
680 | } |
681 | ||
682 | /*****************************************************************************/ | |
683 | ||
1da177e4 LT |
684 | /* |
685 | * Allocate a new board structure. Fill out the basic info in it. | |
686 | */ | |
687 | ||
ca7ed0f2 | 688 | static struct stlbrd *stl_allocbrd(void) |
1da177e4 | 689 | { |
ca7ed0f2 | 690 | struct stlbrd *brdp; |
1da177e4 | 691 | |
ca7ed0f2 | 692 | brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL); |
b0b4ed72 | 693 | if (!brdp) { |
b65b5b59 | 694 | printk("STALLION: failed to allocate memory (size=%Zd)\n", |
ca7ed0f2 | 695 | sizeof(struct stlbrd)); |
b0b4ed72 | 696 | return NULL; |
1da177e4 LT |
697 | } |
698 | ||
1da177e4 | 699 | brdp->magic = STL_BOARDMAGIC; |
014c2544 | 700 | return brdp; |
1da177e4 LT |
701 | } |
702 | ||
703 | /*****************************************************************************/ | |
704 | ||
047e9658 AC |
705 | static int stl_activate(struct tty_port *port, struct tty_struct *tty) |
706 | { | |
707 | struct stlport *portp = container_of(port, struct stlport, port); | |
708 | if (!portp->tx.buf) { | |
709 | portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL); | |
710 | if (!portp->tx.buf) | |
711 | return -ENOMEM; | |
712 | portp->tx.head = portp->tx.buf; | |
713 | portp->tx.tail = portp->tx.buf; | |
714 | } | |
715 | stl_setport(portp, tty->termios); | |
716 | portp->sigs = stl_getsignals(portp); | |
717 | stl_setsignals(portp, 1, 1); | |
718 | stl_enablerxtx(portp, 1, 1); | |
719 | stl_startrxtx(portp, 1, 0); | |
720 | return 0; | |
721 | } | |
722 | ||
1da177e4 LT |
723 | static int stl_open(struct tty_struct *tty, struct file *filp) |
724 | { | |
ca7ed0f2 JS |
725 | struct stlport *portp; |
726 | struct stlbrd *brdp; | |
4350f3ff | 727 | struct tty_port *port; |
6b2c9457 | 728 | unsigned int minordev, brdnr, panelnr; |
4350f3ff | 729 | int portnr; |
1da177e4 | 730 | |
a0564e14 | 731 | pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name); |
1da177e4 LT |
732 | |
733 | minordev = tty->index; | |
734 | brdnr = MINOR2BRD(minordev); | |
735 | if (brdnr >= stl_nrbrds) | |
014c2544 | 736 | return -ENODEV; |
1da177e4 | 737 | brdp = stl_brds[brdnr]; |
615e4a71 | 738 | if (brdp == NULL) |
014c2544 | 739 | return -ENODEV; |
4350f3ff | 740 | |
1da177e4 | 741 | minordev = MINOR2PORT(minordev); |
c62429d9 | 742 | for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) { |
615e4a71 | 743 | if (brdp->panels[panelnr] == NULL) |
1da177e4 LT |
744 | break; |
745 | if (minordev < brdp->panels[panelnr]->nrports) { | |
746 | portnr = minordev; | |
747 | break; | |
748 | } | |
749 | minordev -= brdp->panels[panelnr]->nrports; | |
750 | } | |
751 | if (portnr < 0) | |
014c2544 | 752 | return -ENODEV; |
1da177e4 LT |
753 | |
754 | portp = brdp->panels[panelnr]->ports[portnr]; | |
615e4a71 | 755 | if (portp == NULL) |
014c2544 | 756 | return -ENODEV; |
4350f3ff | 757 | port = &portp->port; |
047e9658 | 758 | return tty_port_open(&portp->port, tty, filp); |
1da177e4 | 759 | |
1da177e4 LT |
760 | } |
761 | ||
762 | /*****************************************************************************/ | |
763 | ||
31f35939 AC |
764 | static int stl_carrier_raised(struct tty_port *port) |
765 | { | |
766 | struct stlport *portp = container_of(port, struct stlport, port); | |
767 | return (portp->sigs & TIOCM_CD) ? 1 : 0; | |
768 | } | |
769 | ||
fcc8ac18 | 770 | static void stl_dtr_rts(struct tty_port *port, int on) |
1da177e4 | 771 | { |
4350f3ff AC |
772 | struct stlport *portp = container_of(port, struct stlport, port); |
773 | /* Takes brd_lock internally */ | |
fcc8ac18 | 774 | stl_setsignals(portp, on, on); |
1da177e4 LT |
775 | } |
776 | ||
777 | /*****************************************************************************/ | |
778 | ||
96b066b8 JS |
779 | static void stl_flushbuffer(struct tty_struct *tty) |
780 | { | |
781 | struct stlport *portp; | |
782 | ||
783 | pr_debug("stl_flushbuffer(tty=%p)\n", tty); | |
784 | ||
96b066b8 JS |
785 | portp = tty->driver_data; |
786 | if (portp == NULL) | |
787 | return; | |
788 | ||
789 | stl_flush(portp); | |
790 | tty_wakeup(tty); | |
791 | } | |
792 | ||
793 | /*****************************************************************************/ | |
794 | ||
795 | static void stl_waituntilsent(struct tty_struct *tty, int timeout) | |
796 | { | |
797 | struct stlport *portp; | |
798 | unsigned long tend; | |
799 | ||
800 | pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout); | |
801 | ||
96b066b8 JS |
802 | portp = tty->driver_data; |
803 | if (portp == NULL) | |
804 | return; | |
805 | ||
806 | if (timeout == 0) | |
807 | timeout = HZ; | |
808 | tend = jiffies + timeout; | |
809 | ||
978e595f | 810 | lock_kernel(); |
96b066b8 JS |
811 | while (stl_datastate(portp)) { |
812 | if (signal_pending(current)) | |
813 | break; | |
814 | msleep_interruptible(20); | |
815 | if (time_after_eq(jiffies, tend)) | |
816 | break; | |
817 | } | |
978e595f | 818 | unlock_kernel(); |
96b066b8 JS |
819 | } |
820 | ||
821 | /*****************************************************************************/ | |
822 | ||
047e9658 | 823 | static void stl_shutdown(struct tty_port *port) |
1da177e4 | 824 | { |
047e9658 | 825 | struct stlport *portp = container_of(port, struct stlport, port); |
1da177e4 | 826 | stl_disableintrs(portp); |
1da177e4 | 827 | stl_enablerxtx(portp, 0, 0); |
047e9658 | 828 | stl_flush(portp); |
1da177e4 | 829 | portp->istate = 0; |
615e4a71 | 830 | if (portp->tx.buf != NULL) { |
1da177e4 | 831 | kfree(portp->tx.buf); |
615e4a71 JS |
832 | portp->tx.buf = NULL; |
833 | portp->tx.head = NULL; | |
834 | portp->tx.tail = NULL; | |
1da177e4 | 835 | } |
047e9658 AC |
836 | } |
837 | ||
838 | static void stl_close(struct tty_struct *tty, struct file *filp) | |
839 | { | |
840 | struct stlport*portp; | |
841 | pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp); | |
1da177e4 | 842 | |
047e9658 AC |
843 | portp = tty->driver_data; |
844 | BUG_ON(portp == NULL); | |
845 | tty_port_close(&portp->port, tty, filp); | |
1da177e4 LT |
846 | } |
847 | ||
848 | /*****************************************************************************/ | |
849 | ||
850 | /* | |
851 | * Write routine. Take data and stuff it in to the TX ring queue. | |
852 | * If transmit interrupts are not running then start them. | |
853 | */ | |
854 | ||
855 | static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
856 | { | |
ca7ed0f2 | 857 | struct stlport *portp; |
1da177e4 LT |
858 | unsigned int len, stlen; |
859 | unsigned char *chbuf; | |
860 | char *head, *tail; | |
861 | ||
a0564e14 | 862 | pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count); |
1da177e4 | 863 | |
1da177e4 | 864 | portp = tty->driver_data; |
615e4a71 | 865 | if (portp == NULL) |
014c2544 | 866 | return 0; |
615e4a71 | 867 | if (portp->tx.buf == NULL) |
014c2544 | 868 | return 0; |
1da177e4 LT |
869 | |
870 | /* | |
871 | * If copying direct from user space we must cater for page faults, | |
872 | * causing us to "sleep" here for a while. To handle this copy in all | |
873 | * the data we need now, into a local buffer. Then when we got it all | |
874 | * copy it into the TX buffer. | |
875 | */ | |
876 | chbuf = (unsigned char *) buf; | |
877 | ||
878 | head = portp->tx.head; | |
879 | tail = portp->tx.tail; | |
880 | if (head >= tail) { | |
881 | len = STL_TXBUFSIZE - (head - tail) - 1; | |
882 | stlen = STL_TXBUFSIZE - (head - portp->tx.buf); | |
883 | } else { | |
884 | len = tail - head - 1; | |
885 | stlen = len; | |
886 | } | |
887 | ||
843b568c | 888 | len = min(len, (unsigned int)count); |
1da177e4 LT |
889 | count = 0; |
890 | while (len > 0) { | |
843b568c | 891 | stlen = min(len, stlen); |
1da177e4 LT |
892 | memcpy(head, chbuf, stlen); |
893 | len -= stlen; | |
894 | chbuf += stlen; | |
895 | count += stlen; | |
896 | head += stlen; | |
897 | if (head >= (portp->tx.buf + STL_TXBUFSIZE)) { | |
898 | head = portp->tx.buf; | |
899 | stlen = tail - head; | |
900 | } | |
901 | } | |
902 | portp->tx.head = head; | |
903 | ||
904 | clear_bit(ASYI_TXLOW, &portp->istate); | |
905 | stl_startrxtx(portp, -1, 1); | |
906 | ||
014c2544 | 907 | return count; |
1da177e4 LT |
908 | } |
909 | ||
910 | /*****************************************************************************/ | |
911 | ||
4a561222 | 912 | static int stl_putchar(struct tty_struct *tty, unsigned char ch) |
1da177e4 | 913 | { |
ca7ed0f2 | 914 | struct stlport *portp; |
1da177e4 LT |
915 | unsigned int len; |
916 | char *head, *tail; | |
917 | ||
a0564e14 | 918 | pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch); |
1da177e4 | 919 | |
1da177e4 | 920 | portp = tty->driver_data; |
615e4a71 | 921 | if (portp == NULL) |
4a561222 | 922 | return -EINVAL; |
615e4a71 | 923 | if (portp->tx.buf == NULL) |
4a561222 | 924 | return -EINVAL; |
1da177e4 LT |
925 | |
926 | head = portp->tx.head; | |
927 | tail = portp->tx.tail; | |
928 | ||
929 | len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head); | |
930 | len--; | |
931 | ||
932 | if (len > 0) { | |
933 | *head++ = ch; | |
934 | if (head >= (portp->tx.buf + STL_TXBUFSIZE)) | |
935 | head = portp->tx.buf; | |
936 | } | |
937 | portp->tx.head = head; | |
4a561222 | 938 | return 0; |
1da177e4 LT |
939 | } |
940 | ||
941 | /*****************************************************************************/ | |
942 | ||
943 | /* | |
944 | * If there are any characters in the buffer then make sure that TX | |
945 | * interrupts are on and get'em out. Normally used after the putchar | |
946 | * routine has been called. | |
947 | */ | |
948 | ||
949 | static void stl_flushchars(struct tty_struct *tty) | |
950 | { | |
ca7ed0f2 | 951 | struct stlport *portp; |
1da177e4 | 952 | |
a0564e14 | 953 | pr_debug("stl_flushchars(tty=%p)\n", tty); |
1da177e4 | 954 | |
1da177e4 | 955 | portp = tty->driver_data; |
615e4a71 | 956 | if (portp == NULL) |
1da177e4 | 957 | return; |
615e4a71 | 958 | if (portp->tx.buf == NULL) |
1da177e4 LT |
959 | return; |
960 | ||
1da177e4 LT |
961 | stl_startrxtx(portp, -1, 1); |
962 | } | |
963 | ||
964 | /*****************************************************************************/ | |
965 | ||
966 | static int stl_writeroom(struct tty_struct *tty) | |
967 | { | |
ca7ed0f2 | 968 | struct stlport *portp; |
1da177e4 LT |
969 | char *head, *tail; |
970 | ||
a0564e14 | 971 | pr_debug("stl_writeroom(tty=%p)\n", tty); |
1da177e4 | 972 | |
1da177e4 | 973 | portp = tty->driver_data; |
615e4a71 | 974 | if (portp == NULL) |
014c2544 | 975 | return 0; |
615e4a71 | 976 | if (portp->tx.buf == NULL) |
014c2544 | 977 | return 0; |
1da177e4 LT |
978 | |
979 | head = portp->tx.head; | |
980 | tail = portp->tx.tail; | |
c62429d9 | 981 | return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1); |
1da177e4 LT |
982 | } |
983 | ||
984 | /*****************************************************************************/ | |
985 | ||
986 | /* | |
987 | * Return number of chars in the TX buffer. Normally we would just | |
988 | * calculate the number of chars in the buffer and return that, but if | |
989 | * the buffer is empty and TX interrupts are still on then we return | |
990 | * that the buffer still has 1 char in it. This way whoever called us | |
991 | * will not think that ALL chars have drained - since the UART still | |
992 | * must have some chars in it (we are busy after all). | |
993 | */ | |
994 | ||
995 | static int stl_charsinbuffer(struct tty_struct *tty) | |
996 | { | |
ca7ed0f2 | 997 | struct stlport *portp; |
1da177e4 LT |
998 | unsigned int size; |
999 | char *head, *tail; | |
1000 | ||
a0564e14 | 1001 | pr_debug("stl_charsinbuffer(tty=%p)\n", tty); |
1da177e4 | 1002 | |
1da177e4 | 1003 | portp = tty->driver_data; |
615e4a71 | 1004 | if (portp == NULL) |
014c2544 | 1005 | return 0; |
615e4a71 | 1006 | if (portp->tx.buf == NULL) |
014c2544 | 1007 | return 0; |
1da177e4 LT |
1008 | |
1009 | head = portp->tx.head; | |
1010 | tail = portp->tx.tail; | |
1011 | size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); | |
1012 | if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate)) | |
1013 | size = 1; | |
014c2544 | 1014 | return size; |
1da177e4 LT |
1015 | } |
1016 | ||
1017 | /*****************************************************************************/ | |
1018 | ||
1019 | /* | |
1020 | * Generate the serial struct info. | |
1021 | */ | |
1022 | ||
ca7ed0f2 | 1023 | static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp) |
1da177e4 LT |
1024 | { |
1025 | struct serial_struct sio; | |
ca7ed0f2 | 1026 | struct stlbrd *brdp; |
1da177e4 | 1027 | |
a0564e14 | 1028 | pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp); |
1da177e4 LT |
1029 | |
1030 | memset(&sio, 0, sizeof(struct serial_struct)); | |
1031 | sio.line = portp->portnr; | |
1032 | sio.port = portp->ioaddr; | |
f8ae4764 | 1033 | sio.flags = portp->port.flags; |
1da177e4 LT |
1034 | sio.baud_base = portp->baud_base; |
1035 | sio.close_delay = portp->close_delay; | |
1036 | sio.closing_wait = portp->closing_wait; | |
1037 | sio.custom_divisor = portp->custom_divisor; | |
1038 | sio.hub6 = 0; | |
1039 | if (portp->uartp == &stl_cd1400uart) { | |
1040 | sio.type = PORT_CIRRUS; | |
1041 | sio.xmit_fifo_size = CD1400_TXFIFOSIZE; | |
1042 | } else { | |
1043 | sio.type = PORT_UNKNOWN; | |
1044 | sio.xmit_fifo_size = SC26198_TXFIFOSIZE; | |
1045 | } | |
1046 | ||
1047 | brdp = stl_brds[portp->brdnr]; | |
615e4a71 | 1048 | if (brdp != NULL) |
1da177e4 LT |
1049 | sio.irq = brdp->irq; |
1050 | ||
1051 | return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0; | |
1052 | } | |
1053 | ||
1054 | /*****************************************************************************/ | |
1055 | ||
1056 | /* | |
1057 | * Set port according to the serial struct info. | |
1058 | * At this point we do not do any auto-configure stuff, so we will | |
1059 | * just quietly ignore any requests to change irq, etc. | |
1060 | */ | |
1061 | ||
d18a750f | 1062 | static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp) |
1da177e4 | 1063 | { |
d18a750f | 1064 | struct stlport * portp = tty->driver_data; |
1da177e4 LT |
1065 | struct serial_struct sio; |
1066 | ||
a0564e14 | 1067 | pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp); |
1da177e4 LT |
1068 | |
1069 | if (copy_from_user(&sio, sp, sizeof(struct serial_struct))) | |
1070 | return -EFAULT; | |
1071 | if (!capable(CAP_SYS_ADMIN)) { | |
1072 | if ((sio.baud_base != portp->baud_base) || | |
1073 | (sio.close_delay != portp->close_delay) || | |
1074 | ((sio.flags & ~ASYNC_USR_MASK) != | |
f8ae4764 | 1075 | (portp->port.flags & ~ASYNC_USR_MASK))) |
014c2544 | 1076 | return -EPERM; |
1da177e4 LT |
1077 | } |
1078 | ||
f8ae4764 | 1079 | portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) | |
1da177e4 LT |
1080 | (sio.flags & ASYNC_USR_MASK); |
1081 | portp->baud_base = sio.baud_base; | |
1082 | portp->close_delay = sio.close_delay; | |
1083 | portp->closing_wait = sio.closing_wait; | |
1084 | portp->custom_divisor = sio.custom_divisor; | |
d18a750f | 1085 | stl_setport(portp, tty->termios); |
014c2544 | 1086 | return 0; |
1da177e4 LT |
1087 | } |
1088 | ||
1089 | /*****************************************************************************/ | |
1090 | ||
1091 | static int stl_tiocmget(struct tty_struct *tty, struct file *file) | |
1092 | { | |
ca7ed0f2 | 1093 | struct stlport *portp; |
1da177e4 | 1094 | |
1da177e4 | 1095 | portp = tty->driver_data; |
615e4a71 | 1096 | if (portp == NULL) |
014c2544 | 1097 | return -ENODEV; |
1da177e4 | 1098 | if (tty->flags & (1 << TTY_IO_ERROR)) |
014c2544 | 1099 | return -EIO; |
1da177e4 LT |
1100 | |
1101 | return stl_getsignals(portp); | |
1102 | } | |
1103 | ||
1104 | static int stl_tiocmset(struct tty_struct *tty, struct file *file, | |
1105 | unsigned int set, unsigned int clear) | |
1106 | { | |
ca7ed0f2 | 1107 | struct stlport *portp; |
1da177e4 LT |
1108 | int rts = -1, dtr = -1; |
1109 | ||
1da177e4 | 1110 | portp = tty->driver_data; |
615e4a71 | 1111 | if (portp == NULL) |
014c2544 | 1112 | return -ENODEV; |
1da177e4 | 1113 | if (tty->flags & (1 << TTY_IO_ERROR)) |
014c2544 | 1114 | return -EIO; |
1da177e4 LT |
1115 | |
1116 | if (set & TIOCM_RTS) | |
1117 | rts = 1; | |
1118 | if (set & TIOCM_DTR) | |
1119 | dtr = 1; | |
1120 | if (clear & TIOCM_RTS) | |
1121 | rts = 0; | |
1122 | if (clear & TIOCM_DTR) | |
1123 | dtr = 0; | |
1124 | ||
1125 | stl_setsignals(portp, dtr, rts); | |
1126 | return 0; | |
1127 | } | |
1128 | ||
1129 | static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg) | |
1130 | { | |
ca7ed0f2 | 1131 | struct stlport *portp; |
1da177e4 LT |
1132 | int rc; |
1133 | void __user *argp = (void __user *)arg; | |
1134 | ||
a0564e14 JS |
1135 | pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd, |
1136 | arg); | |
1da177e4 | 1137 | |
1da177e4 | 1138 | portp = tty->driver_data; |
615e4a71 | 1139 | if (portp == NULL) |
014c2544 | 1140 | return -ENODEV; |
1da177e4 LT |
1141 | |
1142 | if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && | |
c62429d9 | 1143 | (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS)) |
1da177e4 | 1144 | if (tty->flags & (1 << TTY_IO_ERROR)) |
014c2544 | 1145 | return -EIO; |
1da177e4 LT |
1146 | |
1147 | rc = 0; | |
1148 | ||
f433c65b AC |
1149 | lock_kernel(); |
1150 | ||
1da177e4 | 1151 | switch (cmd) { |
1da177e4 LT |
1152 | case TIOCGSERIAL: |
1153 | rc = stl_getserial(portp, argp); | |
1154 | break; | |
1155 | case TIOCSSERIAL: | |
d18a750f | 1156 | rc = stl_setserial(tty, argp); |
1da177e4 LT |
1157 | break; |
1158 | case COM_GETPORTSTATS: | |
d18a750f | 1159 | rc = stl_getportstats(tty, portp, argp); |
1da177e4 LT |
1160 | break; |
1161 | case COM_CLRPORTSTATS: | |
1162 | rc = stl_clrportstats(portp, argp); | |
1163 | break; | |
1164 | case TIOCSERCONFIG: | |
1165 | case TIOCSERGWILD: | |
1166 | case TIOCSERSWILD: | |
1167 | case TIOCSERGETLSR: | |
1168 | case TIOCSERGSTRUCT: | |
1169 | case TIOCSERGETMULTI: | |
1170 | case TIOCSERSETMULTI: | |
1171 | default: | |
1172 | rc = -ENOIOCTLCMD; | |
1173 | break; | |
1174 | } | |
f433c65b | 1175 | unlock_kernel(); |
014c2544 | 1176 | return rc; |
1da177e4 LT |
1177 | } |
1178 | ||
1179 | /*****************************************************************************/ | |
1180 | ||
96b066b8 JS |
1181 | /* |
1182 | * Start the transmitter again. Just turn TX interrupts back on. | |
1183 | */ | |
1184 | ||
1185 | static void stl_start(struct tty_struct *tty) | |
1186 | { | |
1187 | struct stlport *portp; | |
1188 | ||
1189 | pr_debug("stl_start(tty=%p)\n", tty); | |
1190 | ||
96b066b8 JS |
1191 | portp = tty->driver_data; |
1192 | if (portp == NULL) | |
1193 | return; | |
1194 | stl_startrxtx(portp, -1, 1); | |
1195 | } | |
1196 | ||
1197 | /*****************************************************************************/ | |
1198 | ||
606d099c | 1199 | static void stl_settermios(struct tty_struct *tty, struct ktermios *old) |
1da177e4 | 1200 | { |
ca7ed0f2 | 1201 | struct stlport *portp; |
606d099c | 1202 | struct ktermios *tiosp; |
1da177e4 | 1203 | |
a0564e14 | 1204 | pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old); |
1da177e4 | 1205 | |
1da177e4 | 1206 | portp = tty->driver_data; |
615e4a71 | 1207 | if (portp == NULL) |
1da177e4 LT |
1208 | return; |
1209 | ||
1210 | tiosp = tty->termios; | |
1211 | if ((tiosp->c_cflag == old->c_cflag) && | |
1212 | (tiosp->c_iflag == old->c_iflag)) | |
1213 | return; | |
1214 | ||
1215 | stl_setport(portp, tiosp); | |
1216 | stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0), | |
1217 | -1); | |
1218 | if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) { | |
1219 | tty->hw_stopped = 0; | |
1220 | stl_start(tty); | |
1221 | } | |
1222 | if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL)) | |
f8ae4764 | 1223 | wake_up_interruptible(&portp->port.open_wait); |
1da177e4 LT |
1224 | } |
1225 | ||
1226 | /*****************************************************************************/ | |
1227 | ||
1228 | /* | |
1229 | * Attempt to flow control who ever is sending us data. Based on termios | |
1230 | * settings use software or/and hardware flow control. | |
1231 | */ | |
1232 | ||
1233 | static void stl_throttle(struct tty_struct *tty) | |
1234 | { | |
ca7ed0f2 | 1235 | struct stlport *portp; |
1da177e4 | 1236 | |
a0564e14 | 1237 | pr_debug("stl_throttle(tty=%p)\n", tty); |
1da177e4 | 1238 | |
1da177e4 | 1239 | portp = tty->driver_data; |
615e4a71 | 1240 | if (portp == NULL) |
1da177e4 LT |
1241 | return; |
1242 | stl_flowctrl(portp, 0); | |
1243 | } | |
1244 | ||
1245 | /*****************************************************************************/ | |
1246 | ||
1247 | /* | |
1248 | * Unflow control the device sending us data... | |
1249 | */ | |
1250 | ||
1251 | static void stl_unthrottle(struct tty_struct *tty) | |
1252 | { | |
ca7ed0f2 | 1253 | struct stlport *portp; |
1da177e4 | 1254 | |
a0564e14 | 1255 | pr_debug("stl_unthrottle(tty=%p)\n", tty); |
1da177e4 | 1256 | |
1da177e4 | 1257 | portp = tty->driver_data; |
615e4a71 | 1258 | if (portp == NULL) |
1da177e4 LT |
1259 | return; |
1260 | stl_flowctrl(portp, 1); | |
1261 | } | |
1262 | ||
1263 | /*****************************************************************************/ | |
1264 | ||
1265 | /* | |
1266 | * Stop the transmitter. Basically to do this we will just turn TX | |
1267 | * interrupts off. | |
1268 | */ | |
1269 | ||
1270 | static void stl_stop(struct tty_struct *tty) | |
1271 | { | |
ca7ed0f2 | 1272 | struct stlport *portp; |
1da177e4 | 1273 | |
a0564e14 | 1274 | pr_debug("stl_stop(tty=%p)\n", tty); |
1da177e4 | 1275 | |
1da177e4 | 1276 | portp = tty->driver_data; |
615e4a71 | 1277 | if (portp == NULL) |
1da177e4 LT |
1278 | return; |
1279 | stl_startrxtx(portp, -1, 0); | |
1280 | } | |
1281 | ||
1282 | /*****************************************************************************/ | |
1283 | ||
1da177e4 LT |
1284 | /* |
1285 | * Hangup this port. This is pretty much like closing the port, only | |
1286 | * a little more brutal. No waiting for data to drain. Shutdown the | |
1287 | * port and maybe drop signals. | |
1288 | */ | |
1289 | ||
1290 | static void stl_hangup(struct tty_struct *tty) | |
1291 | { | |
047e9658 | 1292 | struct stlport *portp = tty->driver_data; |
a0564e14 | 1293 | pr_debug("stl_hangup(tty=%p)\n", tty); |
1da177e4 | 1294 | |
615e4a71 | 1295 | if (portp == NULL) |
1da177e4 | 1296 | return; |
047e9658 | 1297 | tty_port_hangup(&portp->port); |
1da177e4 LT |
1298 | } |
1299 | ||
1300 | /*****************************************************************************/ | |
1301 | ||
4a561222 | 1302 | static int stl_breakctl(struct tty_struct *tty, int state) |
1da177e4 | 1303 | { |
ca7ed0f2 | 1304 | struct stlport *portp; |
1da177e4 | 1305 | |
a0564e14 | 1306 | pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state); |
1da177e4 | 1307 | |
1da177e4 | 1308 | portp = tty->driver_data; |
615e4a71 | 1309 | if (portp == NULL) |
4a561222 | 1310 | return -EINVAL; |
1da177e4 LT |
1311 | |
1312 | stl_sendbreak(portp, ((state == -1) ? 1 : 2)); | |
4a561222 | 1313 | return 0; |
1da177e4 LT |
1314 | } |
1315 | ||
1316 | /*****************************************************************************/ | |
1317 | ||
1da177e4 LT |
1318 | static void stl_sendxchar(struct tty_struct *tty, char ch) |
1319 | { | |
ca7ed0f2 | 1320 | struct stlport *portp; |
1da177e4 | 1321 | |
a0564e14 | 1322 | pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch); |
1da177e4 | 1323 | |
1da177e4 | 1324 | portp = tty->driver_data; |
615e4a71 | 1325 | if (portp == NULL) |
1da177e4 LT |
1326 | return; |
1327 | ||
1328 | if (ch == STOP_CHAR(tty)) | |
1329 | stl_sendflow(portp, 0); | |
1330 | else if (ch == START_CHAR(tty)) | |
1331 | stl_sendflow(portp, 1); | |
1332 | else | |
1333 | stl_putchar(tty, ch); | |
1334 | } | |
1335 | ||
8561c44c | 1336 | static void stl_portinfo(struct seq_file *m, struct stlport *portp, int portnr) |
1da177e4 | 1337 | { |
8561c44c AD |
1338 | int sigs; |
1339 | char sep; | |
1da177e4 | 1340 | |
8561c44c | 1341 | seq_printf(m, "%d: uart:%s tx:%d rx:%d", |
1da177e4 LT |
1342 | portnr, (portp->hwid == 1) ? "SC26198" : "CD1400", |
1343 | (int) portp->stats.txtotal, (int) portp->stats.rxtotal); | |
1344 | ||
1345 | if (portp->stats.rxframing) | |
8561c44c | 1346 | seq_printf(m, " fe:%d", (int) portp->stats.rxframing); |
1da177e4 | 1347 | if (portp->stats.rxparity) |
8561c44c | 1348 | seq_printf(m, " pe:%d", (int) portp->stats.rxparity); |
1da177e4 | 1349 | if (portp->stats.rxbreaks) |
8561c44c | 1350 | seq_printf(m, " brk:%d", (int) portp->stats.rxbreaks); |
1da177e4 | 1351 | if (portp->stats.rxoverrun) |
8561c44c | 1352 | seq_printf(m, " oe:%d", (int) portp->stats.rxoverrun); |
1da177e4 LT |
1353 | |
1354 | sigs = stl_getsignals(portp); | |
8561c44c AD |
1355 | sep = ' '; |
1356 | if (sigs & TIOCM_RTS) { | |
1357 | seq_printf(m, "%c%s", sep, "RTS"); | |
1358 | sep = '|'; | |
1359 | } | |
1360 | if (sigs & TIOCM_CTS) { | |
1361 | seq_printf(m, "%c%s", sep, "CTS"); | |
1362 | sep = '|'; | |
1363 | } | |
1364 | if (sigs & TIOCM_DTR) { | |
1365 | seq_printf(m, "%c%s", sep, "DTR"); | |
1366 | sep = '|'; | |
1367 | } | |
1368 | if (sigs & TIOCM_CD) { | |
1369 | seq_printf(m, "%c%s", sep, "DCD"); | |
1370 | sep = '|'; | |
1371 | } | |
1372 | if (sigs & TIOCM_DSR) { | |
1373 | seq_printf(m, "%c%s", sep, "DSR"); | |
1374 | sep = '|'; | |
1375 | } | |
1376 | seq_putc(m, '\n'); | |
1da177e4 LT |
1377 | } |
1378 | ||
1379 | /*****************************************************************************/ | |
1380 | ||
1381 | /* | |
1382 | * Port info, read from the /proc file system. | |
1383 | */ | |
1384 | ||
8561c44c | 1385 | static int stl_proc_show(struct seq_file *m, void *v) |
1da177e4 | 1386 | { |
ca7ed0f2 JS |
1387 | struct stlbrd *brdp; |
1388 | struct stlpanel *panelp; | |
1389 | struct stlport *portp; | |
6b2c9457 | 1390 | unsigned int brdnr, panelnr, portnr; |
8561c44c | 1391 | int totalport; |
1da177e4 | 1392 | |
1da177e4 | 1393 | totalport = 0; |
8561c44c AD |
1394 | |
1395 | seq_printf(m, "%s: version %s\n", stl_drvtitle, stl_drvversion); | |
1da177e4 LT |
1396 | |
1397 | /* | |
1398 | * We scan through for each board, panel and port. The offset is | |
1399 | * calculated on the fly, and irrelevant ports are skipped. | |
1400 | */ | |
c62429d9 | 1401 | for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) { |
1da177e4 | 1402 | brdp = stl_brds[brdnr]; |
615e4a71 | 1403 | if (brdp == NULL) |
1da177e4 LT |
1404 | continue; |
1405 | if (brdp->state == 0) | |
1406 | continue; | |
1407 | ||
1da177e4 | 1408 | totalport = brdnr * STL_MAXPORTS; |
c62429d9 | 1409 | for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) { |
1da177e4 | 1410 | panelp = brdp->panels[panelnr]; |
615e4a71 | 1411 | if (panelp == NULL) |
1da177e4 LT |
1412 | continue; |
1413 | ||
c62429d9 | 1414 | for (portnr = 0; portnr < panelp->nrports; portnr++, |
1da177e4 LT |
1415 | totalport++) { |
1416 | portp = panelp->ports[portnr]; | |
615e4a71 | 1417 | if (portp == NULL) |
1da177e4 | 1418 | continue; |
8561c44c | 1419 | stl_portinfo(m, portp, totalport); |
1da177e4 LT |
1420 | } |
1421 | } | |
1422 | } | |
8561c44c AD |
1423 | return 0; |
1424 | } | |
1da177e4 | 1425 | |
8561c44c AD |
1426 | static int stl_proc_open(struct inode *inode, struct file *file) |
1427 | { | |
1428 | return single_open(file, stl_proc_show, NULL); | |
1da177e4 LT |
1429 | } |
1430 | ||
8561c44c AD |
1431 | static const struct file_operations stl_proc_fops = { |
1432 | .owner = THIS_MODULE, | |
1433 | .open = stl_proc_open, | |
1434 | .read = seq_read, | |
1435 | .llseek = seq_lseek, | |
1436 | .release = single_release, | |
1437 | }; | |
1438 | ||
1da177e4 LT |
1439 | /*****************************************************************************/ |
1440 | ||
1441 | /* | |
1442 | * All board interrupts are vectored through here first. This code then | |
1443 | * calls off to the approrpriate board interrupt handlers. | |
1444 | */ | |
1445 | ||
7d12e780 | 1446 | static irqreturn_t stl_intr(int irq, void *dev_id) |
1da177e4 | 1447 | { |
ca7ed0f2 | 1448 | struct stlbrd *brdp = dev_id; |
1da177e4 | 1449 | |
a6f97b29 | 1450 | pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq); |
1da177e4 LT |
1451 | |
1452 | return IRQ_RETVAL((* brdp->isr)(brdp)); | |
1453 | } | |
1454 | ||
1455 | /*****************************************************************************/ | |
1456 | ||
1457 | /* | |
1458 | * Interrupt service routine for EasyIO board types. | |
1459 | */ | |
1460 | ||
ca7ed0f2 | 1461 | static int stl_eiointr(struct stlbrd *brdp) |
1da177e4 | 1462 | { |
ca7ed0f2 | 1463 | struct stlpanel *panelp; |
1da177e4 LT |
1464 | unsigned int iobase; |
1465 | int handled = 0; | |
1466 | ||
b65b5b59 | 1467 | spin_lock(&brd_lock); |
1da177e4 LT |
1468 | panelp = brdp->panels[0]; |
1469 | iobase = panelp->iobase; | |
1470 | while (inb(brdp->iostatus) & EIO_INTRPEND) { | |
1471 | handled = 1; | |
1472 | (* panelp->isr)(panelp, iobase); | |
1473 | } | |
b65b5b59 | 1474 | spin_unlock(&brd_lock); |
1da177e4 LT |
1475 | return handled; |
1476 | } | |
1477 | ||
1478 | /*****************************************************************************/ | |
1479 | ||
1480 | /* | |
1481 | * Interrupt service routine for ECH-AT board types. | |
1482 | */ | |
1483 | ||
ca7ed0f2 | 1484 | static int stl_echatintr(struct stlbrd *brdp) |
1da177e4 | 1485 | { |
ca7ed0f2 | 1486 | struct stlpanel *panelp; |
6b2c9457 | 1487 | unsigned int ioaddr, bnknr; |
1da177e4 LT |
1488 | int handled = 0; |
1489 | ||
1490 | outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl); | |
1491 | ||
1492 | while (inb(brdp->iostatus) & ECH_INTRPEND) { | |
1493 | handled = 1; | |
c62429d9 | 1494 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1495 | ioaddr = brdp->bnkstataddr[bnknr]; |
1496 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1497 | panelp = brdp->bnk2panel[bnknr]; | |
1498 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1499 | } | |
1500 | } | |
1501 | } | |
1502 | ||
1503 | outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl); | |
1504 | ||
1505 | return handled; | |
1506 | } | |
1507 | ||
1508 | /*****************************************************************************/ | |
1509 | ||
1510 | /* | |
1511 | * Interrupt service routine for ECH-MCA board types. | |
1512 | */ | |
1513 | ||
ca7ed0f2 | 1514 | static int stl_echmcaintr(struct stlbrd *brdp) |
1da177e4 | 1515 | { |
ca7ed0f2 | 1516 | struct stlpanel *panelp; |
6b2c9457 | 1517 | unsigned int ioaddr, bnknr; |
1da177e4 LT |
1518 | int handled = 0; |
1519 | ||
1520 | while (inb(brdp->iostatus) & ECH_INTRPEND) { | |
1521 | handled = 1; | |
c62429d9 | 1522 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1523 | ioaddr = brdp->bnkstataddr[bnknr]; |
1524 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1525 | panelp = brdp->bnk2panel[bnknr]; | |
1526 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1527 | } | |
1528 | } | |
1529 | } | |
1530 | return handled; | |
1531 | } | |
1532 | ||
1533 | /*****************************************************************************/ | |
1534 | ||
1535 | /* | |
1536 | * Interrupt service routine for ECH-PCI board types. | |
1537 | */ | |
1538 | ||
ca7ed0f2 | 1539 | static int stl_echpciintr(struct stlbrd *brdp) |
1da177e4 | 1540 | { |
ca7ed0f2 | 1541 | struct stlpanel *panelp; |
6b2c9457 | 1542 | unsigned int ioaddr, bnknr, recheck; |
1da177e4 LT |
1543 | int handled = 0; |
1544 | ||
1545 | while (1) { | |
1546 | recheck = 0; | |
c62429d9 | 1547 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1548 | outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl); |
1549 | ioaddr = brdp->bnkstataddr[bnknr]; | |
1550 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1551 | panelp = brdp->bnk2panel[bnknr]; | |
1552 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1553 | recheck++; | |
1554 | handled = 1; | |
1555 | } | |
1556 | } | |
1557 | if (! recheck) | |
1558 | break; | |
1559 | } | |
1560 | return handled; | |
1561 | } | |
1562 | ||
1563 | /*****************************************************************************/ | |
1564 | ||
1565 | /* | |
1566 | * Interrupt service routine for ECH-8/64-PCI board types. | |
1567 | */ | |
1568 | ||
ca7ed0f2 | 1569 | static int stl_echpci64intr(struct stlbrd *brdp) |
1da177e4 | 1570 | { |
ca7ed0f2 | 1571 | struct stlpanel *panelp; |
6b2c9457 | 1572 | unsigned int ioaddr, bnknr; |
1da177e4 LT |
1573 | int handled = 0; |
1574 | ||
1575 | while (inb(brdp->ioctrl) & 0x1) { | |
1576 | handled = 1; | |
c62429d9 | 1577 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1578 | ioaddr = brdp->bnkstataddr[bnknr]; |
1579 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1580 | panelp = brdp->bnk2panel[bnknr]; | |
1581 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1582 | } | |
1583 | } | |
1584 | } | |
1585 | ||
1586 | return handled; | |
1587 | } | |
1588 | ||
1589 | /*****************************************************************************/ | |
1590 | ||
1da177e4 LT |
1591 | /* |
1592 | * Initialize all the ports on a panel. | |
1593 | */ | |
1594 | ||
705c1862 | 1595 | static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp) |
1da177e4 | 1596 | { |
6b2c9457 JS |
1597 | struct stlport *portp; |
1598 | unsigned int i; | |
1599 | int chipmask; | |
1da177e4 | 1600 | |
a0564e14 | 1601 | pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp); |
1da177e4 LT |
1602 | |
1603 | chipmask = stl_panelinit(brdp, panelp); | |
1604 | ||
1605 | /* | |
1606 | * All UART's are initialized (if found!). Now go through and setup | |
1607 | * each ports data structures. | |
1608 | */ | |
c62429d9 | 1609 | for (i = 0; i < panelp->nrports; i++) { |
ca7ed0f2 | 1610 | portp = kzalloc(sizeof(struct stlport), GFP_KERNEL); |
b0b4ed72 | 1611 | if (!portp) { |
1da177e4 | 1612 | printk("STALLION: failed to allocate memory " |
ca7ed0f2 | 1613 | "(size=%Zd)\n", sizeof(struct stlport)); |
1da177e4 LT |
1614 | break; |
1615 | } | |
d18a750f | 1616 | tty_port_init(&portp->port); |
31f35939 | 1617 | portp->port.ops = &stl_port_ops; |
1da177e4 LT |
1618 | portp->magic = STL_PORTMAGIC; |
1619 | portp->portnr = i; | |
1620 | portp->brdnr = panelp->brdnr; | |
1621 | portp->panelnr = panelp->panelnr; | |
1622 | portp->uartp = panelp->uartp; | |
1623 | portp->clk = brdp->clk; | |
1624 | portp->baud_base = STL_BAUDBASE; | |
1625 | portp->close_delay = STL_CLOSEDELAY; | |
1626 | portp->closing_wait = 30 * HZ; | |
f8ae4764 AC |
1627 | init_waitqueue_head(&portp->port.open_wait); |
1628 | init_waitqueue_head(&portp->port.close_wait); | |
1da177e4 LT |
1629 | portp->stats.brd = portp->brdnr; |
1630 | portp->stats.panel = portp->panelnr; | |
1631 | portp->stats.port = portp->portnr; | |
1632 | panelp->ports[i] = portp; | |
1633 | stl_portinit(brdp, panelp, portp); | |
1634 | } | |
1635 | ||
c62429d9 | 1636 | return 0; |
1da177e4 LT |
1637 | } |
1638 | ||
3b85b341 JS |
1639 | static void stl_cleanup_panels(struct stlbrd *brdp) |
1640 | { | |
1641 | struct stlpanel *panelp; | |
1642 | struct stlport *portp; | |
1643 | unsigned int j, k; | |
d18a750f | 1644 | struct tty_struct *tty; |
3b85b341 JS |
1645 | |
1646 | for (j = 0; j < STL_MAXPANELS; j++) { | |
1647 | panelp = brdp->panels[j]; | |
1648 | if (panelp == NULL) | |
1649 | continue; | |
1650 | for (k = 0; k < STL_PORTSPERPANEL; k++) { | |
1651 | portp = panelp->ports[k]; | |
1652 | if (portp == NULL) | |
1653 | continue; | |
d18a750f AC |
1654 | tty = tty_port_tty_get(&portp->port); |
1655 | if (tty != NULL) { | |
1656 | stl_hangup(tty); | |
1657 | tty_kref_put(tty); | |
1658 | } | |
3b85b341 JS |
1659 | kfree(portp->tx.buf); |
1660 | kfree(portp); | |
1661 | } | |
1662 | kfree(panelp); | |
1663 | } | |
1664 | } | |
1665 | ||
1da177e4 LT |
1666 | /*****************************************************************************/ |
1667 | ||
1668 | /* | |
1669 | * Try to find and initialize an EasyIO board. | |
1670 | */ | |
1671 | ||
705c1862 | 1672 | static int __devinit stl_initeio(struct stlbrd *brdp) |
1da177e4 | 1673 | { |
ca7ed0f2 | 1674 | struct stlpanel *panelp; |
1da177e4 LT |
1675 | unsigned int status; |
1676 | char *name; | |
3b85b341 | 1677 | int retval; |
1da177e4 | 1678 | |
a0564e14 | 1679 | pr_debug("stl_initeio(brdp=%p)\n", brdp); |
1da177e4 LT |
1680 | |
1681 | brdp->ioctrl = brdp->ioaddr1 + 1; | |
1682 | brdp->iostatus = brdp->ioaddr1 + 2; | |
1683 | ||
1684 | status = inb(brdp->iostatus); | |
1685 | if ((status & EIO_IDBITMASK) == EIO_MK3) | |
1686 | brdp->ioctrl++; | |
1687 | ||
1688 | /* | |
1689 | * Handle board specific stuff now. The real difference is PCI | |
1690 | * or not PCI. | |
1691 | */ | |
1692 | if (brdp->brdtype == BRD_EASYIOPCI) { | |
1693 | brdp->iosize1 = 0x80; | |
1694 | brdp->iosize2 = 0x80; | |
1695 | name = "serial(EIO-PCI)"; | |
1696 | outb(0x41, (brdp->ioaddr2 + 0x4c)); | |
1697 | } else { | |
1698 | brdp->iosize1 = 8; | |
1699 | name = "serial(EIO)"; | |
1700 | if ((brdp->irq < 0) || (brdp->irq > 15) || | |
1701 | (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { | |
1702 | printk("STALLION: invalid irq=%d for brd=%d\n", | |
1703 | brdp->irq, brdp->brdnr); | |
3b85b341 JS |
1704 | retval = -EINVAL; |
1705 | goto err; | |
1da177e4 LT |
1706 | } |
1707 | outb((stl_vecmap[brdp->irq] | EIO_0WS | | |
1708 | ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)), | |
1709 | brdp->ioctrl); | |
1710 | } | |
1711 | ||
3b85b341 | 1712 | retval = -EBUSY; |
1da177e4 LT |
1713 | if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) { |
1714 | printk(KERN_WARNING "STALLION: Warning, board %d I/O address " | |
1715 | "%x conflicts with another device\n", brdp->brdnr, | |
1716 | brdp->ioaddr1); | |
3b85b341 | 1717 | goto err; |
1da177e4 LT |
1718 | } |
1719 | ||
1720 | if (brdp->iosize2 > 0) | |
1721 | if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) { | |
1722 | printk(KERN_WARNING "STALLION: Warning, board %d I/O " | |
1723 | "address %x conflicts with another device\n", | |
1724 | brdp->brdnr, brdp->ioaddr2); | |
1725 | printk(KERN_WARNING "STALLION: Warning, also " | |
1726 | "releasing board %d I/O address %x \n", | |
1727 | brdp->brdnr, brdp->ioaddr1); | |
3b85b341 | 1728 | goto err_rel1; |
1da177e4 LT |
1729 | } |
1730 | ||
1731 | /* | |
1732 | * Everything looks OK, so let's go ahead and probe for the hardware. | |
1733 | */ | |
1734 | brdp->clk = CD1400_CLK; | |
1735 | brdp->isr = stl_eiointr; | |
1736 | ||
3b85b341 | 1737 | retval = -ENODEV; |
1da177e4 LT |
1738 | switch (status & EIO_IDBITMASK) { |
1739 | case EIO_8PORTM: | |
1740 | brdp->clk = CD1400_CLK8M; | |
1741 | /* fall thru */ | |
1742 | case EIO_8PORTRS: | |
1743 | case EIO_8PORTDI: | |
1744 | brdp->nrports = 8; | |
1745 | break; | |
1746 | case EIO_4PORTRS: | |
1747 | brdp->nrports = 4; | |
1748 | break; | |
1749 | case EIO_MK3: | |
1750 | switch (status & EIO_BRDMASK) { | |
1751 | case ID_BRD4: | |
1752 | brdp->nrports = 4; | |
1753 | break; | |
1754 | case ID_BRD8: | |
1755 | brdp->nrports = 8; | |
1756 | break; | |
1757 | case ID_BRD16: | |
1758 | brdp->nrports = 16; | |
1759 | break; | |
1760 | default: | |
3b85b341 | 1761 | goto err_rel2; |
1da177e4 LT |
1762 | } |
1763 | break; | |
1764 | default: | |
3b85b341 | 1765 | goto err_rel2; |
1da177e4 LT |
1766 | } |
1767 | ||
1768 | /* | |
1769 | * We have verified that the board is actually present, so now we | |
1770 | * can complete the setup. | |
1771 | */ | |
1772 | ||
ca7ed0f2 | 1773 | panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL); |
b0b4ed72 | 1774 | if (!panelp) { |
1da177e4 | 1775 | printk(KERN_WARNING "STALLION: failed to allocate memory " |
ca7ed0f2 | 1776 | "(size=%Zd)\n", sizeof(struct stlpanel)); |
3b85b341 JS |
1777 | retval = -ENOMEM; |
1778 | goto err_rel2; | |
1da177e4 | 1779 | } |
1da177e4 LT |
1780 | |
1781 | panelp->magic = STL_PANELMAGIC; | |
1782 | panelp->brdnr = brdp->brdnr; | |
1783 | panelp->panelnr = 0; | |
1784 | panelp->nrports = brdp->nrports; | |
1785 | panelp->iobase = brdp->ioaddr1; | |
1786 | panelp->hwid = status; | |
1787 | if ((status & EIO_IDBITMASK) == EIO_MK3) { | |
615e4a71 | 1788 | panelp->uartp = &stl_sc26198uart; |
1da177e4 LT |
1789 | panelp->isr = stl_sc26198intr; |
1790 | } else { | |
615e4a71 | 1791 | panelp->uartp = &stl_cd1400uart; |
1da177e4 LT |
1792 | panelp->isr = stl_cd1400eiointr; |
1793 | } | |
1794 | ||
1795 | brdp->panels[0] = panelp; | |
1796 | brdp->nrpanels = 1; | |
1797 | brdp->state |= BRD_FOUND; | |
1798 | brdp->hwid = status; | |
0f2ed4c6 | 1799 | if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) { |
1da177e4 LT |
1800 | printk("STALLION: failed to register interrupt " |
1801 | "routine for %s irq=%d\n", name, brdp->irq); | |
3b85b341 JS |
1802 | retval = -ENODEV; |
1803 | goto err_fr; | |
1da177e4 | 1804 | } |
3b85b341 JS |
1805 | |
1806 | return 0; | |
1807 | err_fr: | |
1808 | stl_cleanup_panels(brdp); | |
1809 | err_rel2: | |
1810 | if (brdp->iosize2 > 0) | |
1811 | release_region(brdp->ioaddr2, brdp->iosize2); | |
1812 | err_rel1: | |
1813 | release_region(brdp->ioaddr1, brdp->iosize1); | |
1814 | err: | |
1815 | return retval; | |
1da177e4 LT |
1816 | } |
1817 | ||
1818 | /*****************************************************************************/ | |
1819 | ||
1820 | /* | |
1821 | * Try to find an ECH board and initialize it. This code is capable of | |
1822 | * dealing with all types of ECH board. | |
1823 | */ | |
1824 | ||
705c1862 | 1825 | static int __devinit stl_initech(struct stlbrd *brdp) |
1da177e4 | 1826 | { |
ca7ed0f2 | 1827 | struct stlpanel *panelp; |
6b2c9457 JS |
1828 | unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i; |
1829 | int retval; | |
1da177e4 LT |
1830 | char *name; |
1831 | ||
a0564e14 | 1832 | pr_debug("stl_initech(brdp=%p)\n", brdp); |
1da177e4 LT |
1833 | |
1834 | status = 0; | |
1835 | conflict = 0; | |
1836 | ||
1837 | /* | |
1838 | * Set up the initial board register contents for boards. This varies a | |
1839 | * bit between the different board types. So we need to handle each | |
1840 | * separately. Also do a check that the supplied IRQ is good. | |
1841 | */ | |
1842 | switch (brdp->brdtype) { | |
1843 | ||
1844 | case BRD_ECH: | |
1845 | brdp->isr = stl_echatintr; | |
1846 | brdp->ioctrl = brdp->ioaddr1 + 1; | |
1847 | brdp->iostatus = brdp->ioaddr1 + 1; | |
1848 | status = inb(brdp->iostatus); | |
3b85b341 JS |
1849 | if ((status & ECH_IDBITMASK) != ECH_ID) { |
1850 | retval = -ENODEV; | |
1851 | goto err; | |
1852 | } | |
1da177e4 LT |
1853 | if ((brdp->irq < 0) || (brdp->irq > 15) || |
1854 | (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { | |
1855 | printk("STALLION: invalid irq=%d for brd=%d\n", | |
1856 | brdp->irq, brdp->brdnr); | |
3b85b341 JS |
1857 | retval = -EINVAL; |
1858 | goto err; | |
1da177e4 LT |
1859 | } |
1860 | status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1); | |
1861 | status |= (stl_vecmap[brdp->irq] << 1); | |
1862 | outb((status | ECH_BRDRESET), brdp->ioaddr1); | |
1863 | brdp->ioctrlval = ECH_INTENABLE | | |
1864 | ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE); | |
c62429d9 | 1865 | for (i = 0; i < 10; i++) |
1da177e4 LT |
1866 | outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl); |
1867 | brdp->iosize1 = 2; | |
1868 | brdp->iosize2 = 32; | |
1869 | name = "serial(EC8/32)"; | |
1870 | outb(status, brdp->ioaddr1); | |
1871 | break; | |
1872 | ||
1873 | case BRD_ECHMC: | |
1874 | brdp->isr = stl_echmcaintr; | |
1875 | brdp->ioctrl = brdp->ioaddr1 + 0x20; | |
1876 | brdp->iostatus = brdp->ioctrl; | |
1877 | status = inb(brdp->iostatus); | |
3b85b341 JS |
1878 | if ((status & ECH_IDBITMASK) != ECH_ID) { |
1879 | retval = -ENODEV; | |
1880 | goto err; | |
1881 | } | |
1da177e4 LT |
1882 | if ((brdp->irq < 0) || (brdp->irq > 15) || |
1883 | (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { | |
1884 | printk("STALLION: invalid irq=%d for brd=%d\n", | |
1885 | brdp->irq, brdp->brdnr); | |
3b85b341 JS |
1886 | retval = -EINVAL; |
1887 | goto err; | |
1da177e4 LT |
1888 | } |
1889 | outb(ECHMC_BRDRESET, brdp->ioctrl); | |
1890 | outb(ECHMC_INTENABLE, brdp->ioctrl); | |
1891 | brdp->iosize1 = 64; | |
1892 | name = "serial(EC8/32-MC)"; | |
1893 | break; | |
1894 | ||
1895 | case BRD_ECHPCI: | |
1896 | brdp->isr = stl_echpciintr; | |
1897 | brdp->ioctrl = brdp->ioaddr1 + 2; | |
1898 | brdp->iosize1 = 4; | |
1899 | brdp->iosize2 = 8; | |
1900 | name = "serial(EC8/32-PCI)"; | |
1901 | break; | |
1902 | ||
1903 | case BRD_ECH64PCI: | |
1904 | brdp->isr = stl_echpci64intr; | |
1905 | brdp->ioctrl = brdp->ioaddr2 + 0x40; | |
1906 | outb(0x43, (brdp->ioaddr1 + 0x4c)); | |
1907 | brdp->iosize1 = 0x80; | |
1908 | brdp->iosize2 = 0x80; | |
1909 | name = "serial(EC8/64-PCI)"; | |
1910 | break; | |
1911 | ||
1912 | default: | |
1913 | printk("STALLION: unknown board type=%d\n", brdp->brdtype); | |
3b85b341 JS |
1914 | retval = -EINVAL; |
1915 | goto err; | |
1da177e4 LT |
1916 | } |
1917 | ||
1918 | /* | |
1919 | * Check boards for possible IO address conflicts and return fail status | |
1920 | * if an IO conflict found. | |
1921 | */ | |
3b85b341 | 1922 | retval = -EBUSY; |
1da177e4 LT |
1923 | if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) { |
1924 | printk(KERN_WARNING "STALLION: Warning, board %d I/O address " | |
1925 | "%x conflicts with another device\n", brdp->brdnr, | |
1926 | brdp->ioaddr1); | |
3b85b341 | 1927 | goto err; |
1da177e4 LT |
1928 | } |
1929 | ||
1930 | if (brdp->iosize2 > 0) | |
1931 | if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) { | |
1932 | printk(KERN_WARNING "STALLION: Warning, board %d I/O " | |
1933 | "address %x conflicts with another device\n", | |
1934 | brdp->brdnr, brdp->ioaddr2); | |
1935 | printk(KERN_WARNING "STALLION: Warning, also " | |
1936 | "releasing board %d I/O address %x \n", | |
1937 | brdp->brdnr, brdp->ioaddr1); | |
3b85b341 | 1938 | goto err_rel1; |
1da177e4 LT |
1939 | } |
1940 | ||
1941 | /* | |
1942 | * Scan through the secondary io address space looking for panels. | |
1943 | * As we find'em allocate and initialize panel structures for each. | |
1944 | */ | |
1945 | brdp->clk = CD1400_CLK; | |
1946 | brdp->hwid = status; | |
1947 | ||
1948 | ioaddr = brdp->ioaddr2; | |
1949 | banknr = 0; | |
1950 | panelnr = 0; | |
1951 | nxtid = 0; | |
1952 | ||
c62429d9 | 1953 | for (i = 0; i < STL_MAXPANELS; i++) { |
1da177e4 LT |
1954 | if (brdp->brdtype == BRD_ECHPCI) { |
1955 | outb(nxtid, brdp->ioctrl); | |
1956 | ioaddr = brdp->ioaddr2; | |
1957 | } | |
1958 | status = inb(ioaddr + ECH_PNLSTATUS); | |
1959 | if ((status & ECH_PNLIDMASK) != nxtid) | |
64834b22 | 1960 | break; |
ca7ed0f2 | 1961 | panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL); |
b0b4ed72 | 1962 | if (!panelp) { |
1da177e4 | 1963 | printk("STALLION: failed to allocate memory " |
ca7ed0f2 | 1964 | "(size=%Zd)\n", sizeof(struct stlpanel)); |
49277b1c | 1965 | retval = -ENOMEM; |
3b85b341 | 1966 | goto err_fr; |
1da177e4 | 1967 | } |
1da177e4 LT |
1968 | panelp->magic = STL_PANELMAGIC; |
1969 | panelp->brdnr = brdp->brdnr; | |
1970 | panelp->panelnr = panelnr; | |
1971 | panelp->iobase = ioaddr; | |
1972 | panelp->pagenr = nxtid; | |
1973 | panelp->hwid = status; | |
1974 | brdp->bnk2panel[banknr] = panelp; | |
1975 | brdp->bnkpageaddr[banknr] = nxtid; | |
1976 | brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS; | |
1977 | ||
1978 | if (status & ECH_PNLXPID) { | |
615e4a71 | 1979 | panelp->uartp = &stl_sc26198uart; |
1da177e4 LT |
1980 | panelp->isr = stl_sc26198intr; |
1981 | if (status & ECH_PNL16PORT) { | |
1982 | panelp->nrports = 16; | |
1983 | brdp->bnk2panel[banknr] = panelp; | |
1984 | brdp->bnkpageaddr[banknr] = nxtid; | |
1985 | brdp->bnkstataddr[banknr++] = ioaddr + 4 + | |
1986 | ECH_PNLSTATUS; | |
c62429d9 | 1987 | } else |
1da177e4 | 1988 | panelp->nrports = 8; |
1da177e4 | 1989 | } else { |
615e4a71 | 1990 | panelp->uartp = &stl_cd1400uart; |
1da177e4 LT |
1991 | panelp->isr = stl_cd1400echintr; |
1992 | if (status & ECH_PNL16PORT) { | |
1993 | panelp->nrports = 16; | |
1994 | panelp->ackmask = 0x80; | |
1995 | if (brdp->brdtype != BRD_ECHPCI) | |
1996 | ioaddr += EREG_BANKSIZE; | |
1997 | brdp->bnk2panel[banknr] = panelp; | |
1998 | brdp->bnkpageaddr[banknr] = ++nxtid; | |
1999 | brdp->bnkstataddr[banknr++] = ioaddr + | |
2000 | ECH_PNLSTATUS; | |
2001 | } else { | |
2002 | panelp->nrports = 8; | |
2003 | panelp->ackmask = 0xc0; | |
2004 | } | |
2005 | } | |
2006 | ||
2007 | nxtid++; | |
2008 | ioaddr += EREG_BANKSIZE; | |
2009 | brdp->nrports += panelp->nrports; | |
2010 | brdp->panels[panelnr++] = panelp; | |
2011 | if ((brdp->brdtype != BRD_ECHPCI) && | |
49277b1c JS |
2012 | (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) { |
2013 | retval = -EINVAL; | |
3b85b341 | 2014 | goto err_fr; |
49277b1c | 2015 | } |
1da177e4 LT |
2016 | } |
2017 | ||
2018 | brdp->nrpanels = panelnr; | |
2019 | brdp->nrbnks = banknr; | |
2020 | if (brdp->brdtype == BRD_ECH) | |
2021 | outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl); | |
2022 | ||
2023 | brdp->state |= BRD_FOUND; | |
0f2ed4c6 | 2024 | if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) { |
1da177e4 LT |
2025 | printk("STALLION: failed to register interrupt " |
2026 | "routine for %s irq=%d\n", name, brdp->irq); | |
3b85b341 JS |
2027 | retval = -ENODEV; |
2028 | goto err_fr; | |
1da177e4 LT |
2029 | } |
2030 | ||
3b85b341 JS |
2031 | return 0; |
2032 | err_fr: | |
2033 | stl_cleanup_panels(brdp); | |
2034 | if (brdp->iosize2 > 0) | |
2035 | release_region(brdp->ioaddr2, brdp->iosize2); | |
2036 | err_rel1: | |
2037 | release_region(brdp->ioaddr1, brdp->iosize1); | |
2038 | err: | |
2039 | return retval; | |
1da177e4 LT |
2040 | } |
2041 | ||
2042 | /*****************************************************************************/ | |
2043 | ||
2044 | /* | |
2045 | * Initialize and configure the specified board. | |
2046 | * Scan through all the boards in the configuration and see what we | |
2047 | * can find. Handle EIO and the ECH boards a little differently here | |
2048 | * since the initial search and setup is very different. | |
2049 | */ | |
2050 | ||
705c1862 | 2051 | static int __devinit stl_brdinit(struct stlbrd *brdp) |
1da177e4 | 2052 | { |
3b85b341 | 2053 | int i, retval; |
1da177e4 | 2054 | |
a0564e14 | 2055 | pr_debug("stl_brdinit(brdp=%p)\n", brdp); |
1da177e4 LT |
2056 | |
2057 | switch (brdp->brdtype) { | |
2058 | case BRD_EASYIO: | |
2059 | case BRD_EASYIOPCI: | |
3b85b341 JS |
2060 | retval = stl_initeio(brdp); |
2061 | if (retval) | |
2062 | goto err; | |
1da177e4 LT |
2063 | break; |
2064 | case BRD_ECH: | |
2065 | case BRD_ECHMC: | |
2066 | case BRD_ECHPCI: | |
2067 | case BRD_ECH64PCI: | |
3b85b341 JS |
2068 | retval = stl_initech(brdp); |
2069 | if (retval) | |
2070 | goto err; | |
1da177e4 LT |
2071 | break; |
2072 | default: | |
2073 | printk("STALLION: board=%d is unknown board type=%d\n", | |
2074 | brdp->brdnr, brdp->brdtype); | |
3b85b341 JS |
2075 | retval = -ENODEV; |
2076 | goto err; | |
1da177e4 LT |
2077 | } |
2078 | ||
1da177e4 LT |
2079 | if ((brdp->state & BRD_FOUND) == 0) { |
2080 | printk("STALLION: %s board not found, board=%d io=%x irq=%d\n", | |
2081 | stl_brdnames[brdp->brdtype], brdp->brdnr, | |
2082 | brdp->ioaddr1, brdp->irq); | |
3b85b341 | 2083 | goto err_free; |
1da177e4 LT |
2084 | } |
2085 | ||
c62429d9 | 2086 | for (i = 0; i < STL_MAXPANELS; i++) |
615e4a71 | 2087 | if (brdp->panels[i] != NULL) |
1da177e4 LT |
2088 | stl_initports(brdp, brdp->panels[i]); |
2089 | ||
2090 | printk("STALLION: %s found, board=%d io=%x irq=%d " | |
2091 | "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype], | |
2092 | brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels, | |
2093 | brdp->nrports); | |
3b85b341 JS |
2094 | |
2095 | return 0; | |
2096 | err_free: | |
2097 | free_irq(brdp->irq, brdp); | |
2098 | ||
2099 | stl_cleanup_panels(brdp); | |
2100 | ||
2101 | release_region(brdp->ioaddr1, brdp->iosize1); | |
2102 | if (brdp->iosize2 > 0) | |
2103 | release_region(brdp->ioaddr2, brdp->iosize2); | |
3b85b341 JS |
2104 | err: |
2105 | return retval; | |
1da177e4 LT |
2106 | } |
2107 | ||
2108 | /*****************************************************************************/ | |
2109 | ||
2110 | /* | |
2111 | * Find the next available board number that is free. | |
2112 | */ | |
2113 | ||
705c1862 | 2114 | static int __devinit stl_getbrdnr(void) |
1da177e4 | 2115 | { |
6b2c9457 | 2116 | unsigned int i; |
1da177e4 | 2117 | |
c62429d9 | 2118 | for (i = 0; i < STL_MAXBRDS; i++) |
615e4a71 | 2119 | if (stl_brds[i] == NULL) { |
1da177e4 LT |
2120 | if (i >= stl_nrbrds) |
2121 | stl_nrbrds = i + 1; | |
c62429d9 | 2122 | return i; |
1da177e4 | 2123 | } |
c62429d9 JS |
2124 | |
2125 | return -1; | |
1da177e4 LT |
2126 | } |
2127 | ||
b1b84fe0 | 2128 | /*****************************************************************************/ |
1da177e4 LT |
2129 | /* |
2130 | * We have a Stallion board. Allocate a board structure and | |
2131 | * initialize it. Read its IO and IRQ resources from PCI | |
2132 | * configuration space. | |
2133 | */ | |
2134 | ||
b1b84fe0 JS |
2135 | static int __devinit stl_pciprobe(struct pci_dev *pdev, |
2136 | const struct pci_device_id *ent) | |
1da177e4 | 2137 | { |
b1b84fe0 | 2138 | struct stlbrd *brdp; |
aeaccfe4 | 2139 | unsigned int i, brdtype = ent->driver_data; |
6b2c9457 | 2140 | int brdnr, retval = -ENODEV; |
1da177e4 | 2141 | |
b1b84fe0 | 2142 | if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) |
3b85b341 | 2143 | goto err; |
b1b84fe0 | 2144 | |
3b85b341 JS |
2145 | retval = pci_enable_device(pdev); |
2146 | if (retval) | |
2147 | goto err; | |
2148 | brdp = stl_allocbrd(); | |
2149 | if (brdp == NULL) { | |
2150 | retval = -ENOMEM; | |
2151 | goto err; | |
2152 | } | |
79cfe7ab | 2153 | mutex_lock(&stl_brdslock); |
6b2c9457 JS |
2154 | brdnr = stl_getbrdnr(); |
2155 | if (brdnr < 0) { | |
fefaf9a7 | 2156 | dev_err(&pdev->dev, "too many boards found, " |
1da177e4 | 2157 | "maximum supported %d\n", STL_MAXBRDS); |
79cfe7ab | 2158 | mutex_unlock(&stl_brdslock); |
49277b1c | 2159 | retval = -ENODEV; |
3b85b341 | 2160 | goto err_fr; |
1da177e4 | 2161 | } |
6b2c9457 | 2162 | brdp->brdnr = (unsigned int)brdnr; |
79cfe7ab JS |
2163 | stl_brds[brdp->brdnr] = brdp; |
2164 | mutex_unlock(&stl_brdslock); | |
2165 | ||
1da177e4 | 2166 | brdp->brdtype = brdtype; |
fc06b5cf | 2167 | brdp->state |= STL_PROBED; |
1da177e4 | 2168 | |
1da177e4 LT |
2169 | /* |
2170 | * We have all resources from the board, so let's setup the actual | |
2171 | * board structure now. | |
2172 | */ | |
2173 | switch (brdtype) { | |
2174 | case BRD_ECHPCI: | |
b1b84fe0 JS |
2175 | brdp->ioaddr2 = pci_resource_start(pdev, 0); |
2176 | brdp->ioaddr1 = pci_resource_start(pdev, 1); | |
1da177e4 LT |
2177 | break; |
2178 | case BRD_ECH64PCI: | |
b1b84fe0 JS |
2179 | brdp->ioaddr2 = pci_resource_start(pdev, 2); |
2180 | brdp->ioaddr1 = pci_resource_start(pdev, 1); | |
1da177e4 LT |
2181 | break; |
2182 | case BRD_EASYIOPCI: | |
b1b84fe0 JS |
2183 | brdp->ioaddr1 = pci_resource_start(pdev, 2); |
2184 | brdp->ioaddr2 = pci_resource_start(pdev, 1); | |
1da177e4 LT |
2185 | break; |
2186 | default: | |
fefaf9a7 | 2187 | dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype); |
1da177e4 LT |
2188 | break; |
2189 | } | |
2190 | ||
b1b84fe0 | 2191 | brdp->irq = pdev->irq; |
3b85b341 JS |
2192 | retval = stl_brdinit(brdp); |
2193 | if (retval) | |
79cfe7ab | 2194 | goto err_null; |
1da177e4 | 2195 | |
b1b84fe0 JS |
2196 | pci_set_drvdata(pdev, brdp); |
2197 | ||
aeaccfe4 JS |
2198 | for (i = 0; i < brdp->nrports; i++) |
2199 | tty_register_device(stl_serial, | |
2200 | brdp->brdnr * STL_MAXPORTS + i, &pdev->dev); | |
2201 | ||
3b85b341 | 2202 | return 0; |
79cfe7ab JS |
2203 | err_null: |
2204 | stl_brds[brdp->brdnr] = NULL; | |
3b85b341 JS |
2205 | err_fr: |
2206 | kfree(brdp); | |
2207 | err: | |
2208 | return retval; | |
1da177e4 LT |
2209 | } |
2210 | ||
b1b84fe0 | 2211 | static void __devexit stl_pciremove(struct pci_dev *pdev) |
1da177e4 | 2212 | { |
b1b84fe0 | 2213 | struct stlbrd *brdp = pci_get_drvdata(pdev); |
aeaccfe4 | 2214 | unsigned int i; |
1da177e4 | 2215 | |
b1b84fe0 | 2216 | free_irq(brdp->irq, brdp); |
1da177e4 | 2217 | |
b1b84fe0 | 2218 | stl_cleanup_panels(brdp); |
1da177e4 | 2219 | |
b1b84fe0 JS |
2220 | release_region(brdp->ioaddr1, brdp->iosize1); |
2221 | if (brdp->iosize2 > 0) | |
2222 | release_region(brdp->ioaddr2, brdp->iosize2); | |
1da177e4 | 2223 | |
aeaccfe4 JS |
2224 | for (i = 0; i < brdp->nrports; i++) |
2225 | tty_unregister_device(stl_serial, | |
2226 | brdp->brdnr * STL_MAXPORTS + i); | |
2227 | ||
b1b84fe0 JS |
2228 | stl_brds[brdp->brdnr] = NULL; |
2229 | kfree(brdp); | |
1da177e4 LT |
2230 | } |
2231 | ||
b1b84fe0 JS |
2232 | static struct pci_driver stl_pcidriver = { |
2233 | .name = "stallion", | |
2234 | .id_table = stl_pcibrds, | |
2235 | .probe = stl_pciprobe, | |
2236 | .remove = __devexit_p(stl_pciremove) | |
2237 | }; | |
1da177e4 LT |
2238 | |
2239 | /*****************************************************************************/ | |
2240 | ||
1da177e4 LT |
2241 | /* |
2242 | * Return the board stats structure to user app. | |
2243 | */ | |
2244 | ||
2245 | static int stl_getbrdstats(combrd_t __user *bp) | |
2246 | { | |
6b2c9457 | 2247 | combrd_t stl_brdstats; |
ca7ed0f2 JS |
2248 | struct stlbrd *brdp; |
2249 | struct stlpanel *panelp; | |
6b2c9457 | 2250 | unsigned int i; |
1da177e4 LT |
2251 | |
2252 | if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t))) | |
2253 | return -EFAULT; | |
2254 | if (stl_brdstats.brd >= STL_MAXBRDS) | |
c62429d9 | 2255 | return -ENODEV; |
1da177e4 | 2256 | brdp = stl_brds[stl_brdstats.brd]; |
615e4a71 | 2257 | if (brdp == NULL) |
c62429d9 | 2258 | return -ENODEV; |
1da177e4 LT |
2259 | |
2260 | memset(&stl_brdstats, 0, sizeof(combrd_t)); | |
2261 | stl_brdstats.brd = brdp->brdnr; | |
2262 | stl_brdstats.type = brdp->brdtype; | |
2263 | stl_brdstats.hwid = brdp->hwid; | |
2264 | stl_brdstats.state = brdp->state; | |
2265 | stl_brdstats.ioaddr = brdp->ioaddr1; | |
2266 | stl_brdstats.ioaddr2 = brdp->ioaddr2; | |
2267 | stl_brdstats.irq = brdp->irq; | |
2268 | stl_brdstats.nrpanels = brdp->nrpanels; | |
2269 | stl_brdstats.nrports = brdp->nrports; | |
c62429d9 | 2270 | for (i = 0; i < brdp->nrpanels; i++) { |
1da177e4 LT |
2271 | panelp = brdp->panels[i]; |
2272 | stl_brdstats.panels[i].panel = i; | |
2273 | stl_brdstats.panels[i].hwid = panelp->hwid; | |
2274 | stl_brdstats.panels[i].nrports = panelp->nrports; | |
2275 | } | |
2276 | ||
2277 | return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0; | |
2278 | } | |
2279 | ||
2280 | /*****************************************************************************/ | |
2281 | ||
2282 | /* | |
2283 | * Resolve the referenced port number into a port struct pointer. | |
2284 | */ | |
2285 | ||
ca7ed0f2 | 2286 | static struct stlport *stl_getport(int brdnr, int panelnr, int portnr) |
1da177e4 | 2287 | { |
ca7ed0f2 JS |
2288 | struct stlbrd *brdp; |
2289 | struct stlpanel *panelp; | |
1da177e4 | 2290 | |
c62429d9 JS |
2291 | if (brdnr < 0 || brdnr >= STL_MAXBRDS) |
2292 | return NULL; | |
1da177e4 | 2293 | brdp = stl_brds[brdnr]; |
615e4a71 | 2294 | if (brdp == NULL) |
c62429d9 | 2295 | return NULL; |
6b2c9457 | 2296 | if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels) |
c62429d9 | 2297 | return NULL; |
1da177e4 | 2298 | panelp = brdp->panels[panelnr]; |
615e4a71 | 2299 | if (panelp == NULL) |
c62429d9 | 2300 | return NULL; |
6b2c9457 | 2301 | if (portnr < 0 || (unsigned int)portnr >= panelp->nrports) |
c62429d9 JS |
2302 | return NULL; |
2303 | return panelp->ports[portnr]; | |
1da177e4 LT |
2304 | } |
2305 | ||
2306 | /*****************************************************************************/ | |
2307 | ||
2308 | /* | |
2309 | * Return the port stats structure to user app. A NULL port struct | |
2310 | * pointer passed in means that we need to find out from the app | |
2311 | * what port to get stats for (used through board control device). | |
2312 | */ | |
2313 | ||
d18a750f | 2314 | static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp) |
1da177e4 | 2315 | { |
6b2c9457 | 2316 | comstats_t stl_comstats; |
1da177e4 LT |
2317 | unsigned char *head, *tail; |
2318 | unsigned long flags; | |
2319 | ||
2320 | if (!portp) { | |
2321 | if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t))) | |
2322 | return -EFAULT; | |
2323 | portp = stl_getport(stl_comstats.brd, stl_comstats.panel, | |
2324 | stl_comstats.port); | |
615e4a71 | 2325 | if (portp == NULL) |
c62429d9 | 2326 | return -ENODEV; |
1da177e4 LT |
2327 | } |
2328 | ||
2329 | portp->stats.state = portp->istate; | |
f8ae4764 | 2330 | portp->stats.flags = portp->port.flags; |
1da177e4 LT |
2331 | portp->stats.hwid = portp->hwid; |
2332 | ||
2333 | portp->stats.ttystate = 0; | |
2334 | portp->stats.cflags = 0; | |
2335 | portp->stats.iflags = 0; | |
2336 | portp->stats.oflags = 0; | |
2337 | portp->stats.lflags = 0; | |
2338 | portp->stats.rxbuffered = 0; | |
2339 | ||
b65b5b59 | 2340 | spin_lock_irqsave(&stallion_lock, flags); |
d18a750f AC |
2341 | if (tty != NULL && portp->port.tty == tty) { |
2342 | portp->stats.ttystate = tty->flags; | |
2343 | /* No longer available as a statistic */ | |
2344 | portp->stats.rxbuffered = 1; /*tty->flip.count; */ | |
2345 | if (tty->termios != NULL) { | |
2346 | portp->stats.cflags = tty->termios->c_cflag; | |
2347 | portp->stats.iflags = tty->termios->c_iflag; | |
2348 | portp->stats.oflags = tty->termios->c_oflag; | |
2349 | portp->stats.lflags = tty->termios->c_lflag; | |
1da177e4 | 2350 | } |
d18a750f | 2351 | } |
b65b5b59 | 2352 | spin_unlock_irqrestore(&stallion_lock, flags); |
1da177e4 LT |
2353 | |
2354 | head = portp->tx.head; | |
2355 | tail = portp->tx.tail; | |
c62429d9 JS |
2356 | portp->stats.txbuffered = (head >= tail) ? (head - tail) : |
2357 | (STL_TXBUFSIZE - (tail - head)); | |
1da177e4 LT |
2358 | |
2359 | portp->stats.signals = (unsigned long) stl_getsignals(portp); | |
2360 | ||
2361 | return copy_to_user(cp, &portp->stats, | |
2362 | sizeof(comstats_t)) ? -EFAULT : 0; | |
2363 | } | |
2364 | ||
2365 | /*****************************************************************************/ | |
2366 | ||
2367 | /* | |
2368 | * Clear the port stats structure. We also return it zeroed out... | |
2369 | */ | |
2370 | ||
ca7ed0f2 | 2371 | static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp) |
1da177e4 | 2372 | { |
6b2c9457 JS |
2373 | comstats_t stl_comstats; |
2374 | ||
1da177e4 LT |
2375 | if (!portp) { |
2376 | if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t))) | |
2377 | return -EFAULT; | |
2378 | portp = stl_getport(stl_comstats.brd, stl_comstats.panel, | |
2379 | stl_comstats.port); | |
615e4a71 | 2380 | if (portp == NULL) |
c62429d9 | 2381 | return -ENODEV; |
1da177e4 LT |
2382 | } |
2383 | ||
2384 | memset(&portp->stats, 0, sizeof(comstats_t)); | |
2385 | portp->stats.brd = portp->brdnr; | |
2386 | portp->stats.panel = portp->panelnr; | |
2387 | portp->stats.port = portp->portnr; | |
2388 | return copy_to_user(cp, &portp->stats, | |
2389 | sizeof(comstats_t)) ? -EFAULT : 0; | |
2390 | } | |
2391 | ||
2392 | /*****************************************************************************/ | |
2393 | ||
2394 | /* | |
2395 | * Return the entire driver ports structure to a user app. | |
2396 | */ | |
2397 | ||
ca7ed0f2 | 2398 | static int stl_getportstruct(struct stlport __user *arg) |
1da177e4 | 2399 | { |
6b2c9457 | 2400 | struct stlport stl_dummyport; |
ca7ed0f2 | 2401 | struct stlport *portp; |
1da177e4 | 2402 | |
ca7ed0f2 | 2403 | if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport))) |
1da177e4 LT |
2404 | return -EFAULT; |
2405 | portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr, | |
2406 | stl_dummyport.portnr); | |
2407 | if (!portp) | |
2408 | return -ENODEV; | |
ca7ed0f2 | 2409 | return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0; |
1da177e4 LT |
2410 | } |
2411 | ||
2412 | /*****************************************************************************/ | |
2413 | ||
2414 | /* | |
2415 | * Return the entire driver board structure to a user app. | |
2416 | */ | |
2417 | ||
ca7ed0f2 | 2418 | static int stl_getbrdstruct(struct stlbrd __user *arg) |
1da177e4 | 2419 | { |
6b2c9457 | 2420 | struct stlbrd stl_dummybrd; |
ca7ed0f2 | 2421 | struct stlbrd *brdp; |
1da177e4 | 2422 | |
ca7ed0f2 | 2423 | if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd))) |
1da177e4 | 2424 | return -EFAULT; |
6b2c9457 | 2425 | if (stl_dummybrd.brdnr >= STL_MAXBRDS) |
1da177e4 LT |
2426 | return -ENODEV; |
2427 | brdp = stl_brds[stl_dummybrd.brdnr]; | |
2428 | if (!brdp) | |
c62429d9 | 2429 | return -ENODEV; |
ca7ed0f2 | 2430 | return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0; |
1da177e4 LT |
2431 | } |
2432 | ||
2433 | /*****************************************************************************/ | |
2434 | ||
2435 | /* | |
2436 | * The "staliomem" device is also required to do some special operations | |
2437 | * on the board and/or ports. In this driver it is mostly used for stats | |
2438 | * collection. | |
2439 | */ | |
2440 | ||
894cb917 | 2441 | static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg) |
1da177e4 LT |
2442 | { |
2443 | int brdnr, rc; | |
2444 | void __user *argp = (void __user *)arg; | |
2445 | ||
894cb917 | 2446 | pr_debug("stl_memioctl(fp=%p,cmd=%x,arg=%lx)\n", fp, cmd,arg); |
1da177e4 | 2447 | |
894cb917 | 2448 | brdnr = iminor(fp->f_dentry->d_inode); |
1da177e4 | 2449 | if (brdnr >= STL_MAXBRDS) |
c62429d9 | 2450 | return -ENODEV; |
1da177e4 LT |
2451 | rc = 0; |
2452 | ||
894cb917 | 2453 | lock_kernel(); |
1da177e4 LT |
2454 | switch (cmd) { |
2455 | case COM_GETPORTSTATS: | |
d18a750f | 2456 | rc = stl_getportstats(NULL, NULL, argp); |
1da177e4 LT |
2457 | break; |
2458 | case COM_CLRPORTSTATS: | |
2459 | rc = stl_clrportstats(NULL, argp); | |
2460 | break; | |
2461 | case COM_GETBRDSTATS: | |
2462 | rc = stl_getbrdstats(argp); | |
2463 | break; | |
2464 | case COM_READPORT: | |
2465 | rc = stl_getportstruct(argp); | |
2466 | break; | |
2467 | case COM_READBOARD: | |
2468 | rc = stl_getbrdstruct(argp); | |
2469 | break; | |
2470 | default: | |
2471 | rc = -ENOIOCTLCMD; | |
2472 | break; | |
2473 | } | |
894cb917 | 2474 | unlock_kernel(); |
c62429d9 | 2475 | return rc; |
1da177e4 LT |
2476 | } |
2477 | ||
b68e31d0 | 2478 | static const struct tty_operations stl_ops = { |
1da177e4 LT |
2479 | .open = stl_open, |
2480 | .close = stl_close, | |
2481 | .write = stl_write, | |
2482 | .put_char = stl_putchar, | |
2483 | .flush_chars = stl_flushchars, | |
2484 | .write_room = stl_writeroom, | |
2485 | .chars_in_buffer = stl_charsinbuffer, | |
2486 | .ioctl = stl_ioctl, | |
2487 | .set_termios = stl_settermios, | |
2488 | .throttle = stl_throttle, | |
2489 | .unthrottle = stl_unthrottle, | |
2490 | .stop = stl_stop, | |
2491 | .start = stl_start, | |
2492 | .hangup = stl_hangup, | |
2493 | .flush_buffer = stl_flushbuffer, | |
2494 | .break_ctl = stl_breakctl, | |
2495 | .wait_until_sent = stl_waituntilsent, | |
2496 | .send_xchar = stl_sendxchar, | |
1da177e4 LT |
2497 | .tiocmget = stl_tiocmget, |
2498 | .tiocmset = stl_tiocmset, | |
8561c44c | 2499 | .proc_fops = &stl_proc_fops, |
1da177e4 LT |
2500 | }; |
2501 | ||
31f35939 AC |
2502 | static const struct tty_port_operations stl_port_ops = { |
2503 | .carrier_raised = stl_carrier_raised, | |
fcc8ac18 | 2504 | .dtr_rts = stl_dtr_rts, |
047e9658 AC |
2505 | .activate = stl_activate, |
2506 | .shutdown = stl_shutdown, | |
31f35939 AC |
2507 | }; |
2508 | ||
1da177e4 LT |
2509 | /*****************************************************************************/ |
2510 | /* CD1400 HARDWARE FUNCTIONS */ | |
2511 | /*****************************************************************************/ | |
2512 | ||
2513 | /* | |
2514 | * These functions get/set/update the registers of the cd1400 UARTs. | |
2515 | * Access to the cd1400 registers is via an address/data io port pair. | |
2516 | * (Maybe should make this inline...) | |
2517 | */ | |
2518 | ||
ca7ed0f2 | 2519 | static int stl_cd1400getreg(struct stlport *portp, int regnr) |
1da177e4 LT |
2520 | { |
2521 | outb((regnr + portp->uartaddr), portp->ioaddr); | |
014c2544 | 2522 | return inb(portp->ioaddr + EREG_DATA); |
1da177e4 LT |
2523 | } |
2524 | ||
ca7ed0f2 | 2525 | static void stl_cd1400setreg(struct stlport *portp, int regnr, int value) |
1da177e4 | 2526 | { |
c62429d9 | 2527 | outb(regnr + portp->uartaddr, portp->ioaddr); |
1da177e4 LT |
2528 | outb(value, portp->ioaddr + EREG_DATA); |
2529 | } | |
2530 | ||
ca7ed0f2 | 2531 | static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value) |
1da177e4 | 2532 | { |
c62429d9 | 2533 | outb(regnr + portp->uartaddr, portp->ioaddr); |
1da177e4 LT |
2534 | if (inb(portp->ioaddr + EREG_DATA) != value) { |
2535 | outb(value, portp->ioaddr + EREG_DATA); | |
014c2544 | 2536 | return 1; |
1da177e4 | 2537 | } |
014c2544 | 2538 | return 0; |
1da177e4 LT |
2539 | } |
2540 | ||
2541 | /*****************************************************************************/ | |
2542 | ||
2543 | /* | |
2544 | * Inbitialize the UARTs in a panel. We don't care what sort of board | |
2545 | * these ports are on - since the port io registers are almost | |
2546 | * identical when dealing with ports. | |
2547 | */ | |
2548 | ||
ca7ed0f2 | 2549 | static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp) |
1da177e4 LT |
2550 | { |
2551 | unsigned int gfrcr; | |
2552 | int chipmask, i, j; | |
2553 | int nrchips, uartaddr, ioaddr; | |
b65b5b59 | 2554 | unsigned long flags; |
1da177e4 | 2555 | |
a0564e14 | 2556 | pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp); |
1da177e4 | 2557 | |
b65b5b59 | 2558 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2559 | BRDENABLE(panelp->brdnr, panelp->pagenr); |
2560 | ||
2561 | /* | |
2562 | * Check that each chip is present and started up OK. | |
2563 | */ | |
2564 | chipmask = 0; | |
2565 | nrchips = panelp->nrports / CD1400_PORTS; | |
c62429d9 | 2566 | for (i = 0; i < nrchips; i++) { |
1da177e4 LT |
2567 | if (brdp->brdtype == BRD_ECHPCI) { |
2568 | outb((panelp->pagenr + (i >> 1)), brdp->ioctrl); | |
2569 | ioaddr = panelp->iobase; | |
c62429d9 | 2570 | } else |
1da177e4 | 2571 | ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1)); |
1da177e4 LT |
2572 | uartaddr = (i & 0x01) ? 0x080 : 0; |
2573 | outb((GFRCR + uartaddr), ioaddr); | |
2574 | outb(0, (ioaddr + EREG_DATA)); | |
2575 | outb((CCR + uartaddr), ioaddr); | |
2576 | outb(CCR_RESETFULL, (ioaddr + EREG_DATA)); | |
2577 | outb(CCR_RESETFULL, (ioaddr + EREG_DATA)); | |
2578 | outb((GFRCR + uartaddr), ioaddr); | |
c62429d9 | 2579 | for (j = 0; j < CCR_MAXWAIT; j++) |
1da177e4 LT |
2580 | if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0) |
2581 | break; | |
c62429d9 | 2582 | |
1da177e4 LT |
2583 | if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) { |
2584 | printk("STALLION: cd1400 not responding, " | |
2585 | "brd=%d panel=%d chip=%d\n", | |
2586 | panelp->brdnr, panelp->panelnr, i); | |
2587 | continue; | |
2588 | } | |
2589 | chipmask |= (0x1 << i); | |
2590 | outb((PPR + uartaddr), ioaddr); | |
2591 | outb(PPR_SCALAR, (ioaddr + EREG_DATA)); | |
2592 | } | |
2593 | ||
2594 | BRDDISABLE(panelp->brdnr); | |
b65b5b59 | 2595 | spin_unlock_irqrestore(&brd_lock, flags); |
014c2544 | 2596 | return chipmask; |
1da177e4 LT |
2597 | } |
2598 | ||
2599 | /*****************************************************************************/ | |
2600 | ||
2601 | /* | |
2602 | * Initialize hardware specific port registers. | |
2603 | */ | |
2604 | ||
ca7ed0f2 | 2605 | static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp) |
1da177e4 | 2606 | { |
b65b5b59 | 2607 | unsigned long flags; |
a0564e14 JS |
2608 | pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp, |
2609 | panelp, portp); | |
1da177e4 | 2610 | |
615e4a71 JS |
2611 | if ((brdp == NULL) || (panelp == NULL) || |
2612 | (portp == NULL)) | |
1da177e4 LT |
2613 | return; |
2614 | ||
b65b5b59 | 2615 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2616 | portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) || |
2617 | (portp->portnr < 8)) ? 0 : EREG_BANKSIZE); | |
2618 | portp->uartaddr = (portp->portnr & 0x04) << 5; | |
2619 | portp->pagenr = panelp->pagenr + (portp->portnr >> 3); | |
2620 | ||
2621 | BRDENABLE(portp->brdnr, portp->pagenr); | |
2622 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
2623 | stl_cd1400setreg(portp, LIVR, (portp->portnr << 3)); | |
2624 | portp->hwid = stl_cd1400getreg(portp, GFRCR); | |
2625 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 2626 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
2627 | } |
2628 | ||
2629 | /*****************************************************************************/ | |
2630 | ||
2631 | /* | |
2632 | * Wait for the command register to be ready. We will poll this, | |
2633 | * since it won't usually take too long to be ready. | |
2634 | */ | |
2635 | ||
ca7ed0f2 | 2636 | static void stl_cd1400ccrwait(struct stlport *portp) |
1da177e4 LT |
2637 | { |
2638 | int i; | |
2639 | ||
c62429d9 JS |
2640 | for (i = 0; i < CCR_MAXWAIT; i++) |
2641 | if (stl_cd1400getreg(portp, CCR) == 0) | |
1da177e4 | 2642 | return; |
1da177e4 LT |
2643 | |
2644 | printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n", | |
2645 | portp->portnr, portp->panelnr, portp->brdnr); | |
2646 | } | |
2647 | ||
2648 | /*****************************************************************************/ | |
2649 | ||
2650 | /* | |
2651 | * Set up the cd1400 registers for a port based on the termios port | |
2652 | * settings. | |
2653 | */ | |
2654 | ||
606d099c | 2655 | static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp) |
1da177e4 | 2656 | { |
ca7ed0f2 | 2657 | struct stlbrd *brdp; |
1da177e4 LT |
2658 | unsigned long flags; |
2659 | unsigned int clkdiv, baudrate; | |
2660 | unsigned char cor1, cor2, cor3; | |
2661 | unsigned char cor4, cor5, ccr; | |
2662 | unsigned char srer, sreron, sreroff; | |
2663 | unsigned char mcor1, mcor2, rtpr; | |
2664 | unsigned char clk, div; | |
2665 | ||
2666 | cor1 = 0; | |
2667 | cor2 = 0; | |
2668 | cor3 = 0; | |
2669 | cor4 = 0; | |
2670 | cor5 = 0; | |
2671 | ccr = 0; | |
2672 | rtpr = 0; | |
2673 | clk = 0; | |
2674 | div = 0; | |
2675 | mcor1 = 0; | |
2676 | mcor2 = 0; | |
2677 | sreron = 0; | |
2678 | sreroff = 0; | |
2679 | ||
2680 | brdp = stl_brds[portp->brdnr]; | |
615e4a71 | 2681 | if (brdp == NULL) |
1da177e4 LT |
2682 | return; |
2683 | ||
2684 | /* | |
2685 | * Set up the RX char ignore mask with those RX error types we | |
2686 | * can ignore. We can get the cd1400 to help us out a little here, | |
2687 | * it will ignore parity errors and breaks for us. | |
2688 | */ | |
2689 | portp->rxignoremsk = 0; | |
2690 | if (tiosp->c_iflag & IGNPAR) { | |
2691 | portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN); | |
2692 | cor1 |= COR1_PARIGNORE; | |
2693 | } | |
2694 | if (tiosp->c_iflag & IGNBRK) { | |
2695 | portp->rxignoremsk |= ST_BREAK; | |
2696 | cor4 |= COR4_IGNBRK; | |
2697 | } | |
2698 | ||
2699 | portp->rxmarkmsk = ST_OVERRUN; | |
2700 | if (tiosp->c_iflag & (INPCK | PARMRK)) | |
2701 | portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING); | |
2702 | if (tiosp->c_iflag & BRKINT) | |
2703 | portp->rxmarkmsk |= ST_BREAK; | |
2704 | ||
2705 | /* | |
2706 | * Go through the char size, parity and stop bits and set all the | |
2707 | * option register appropriately. | |
2708 | */ | |
2709 | switch (tiosp->c_cflag & CSIZE) { | |
2710 | case CS5: | |
2711 | cor1 |= COR1_CHL5; | |
2712 | break; | |
2713 | case CS6: | |
2714 | cor1 |= COR1_CHL6; | |
2715 | break; | |
2716 | case CS7: | |
2717 | cor1 |= COR1_CHL7; | |
2718 | break; | |
2719 | default: | |
2720 | cor1 |= COR1_CHL8; | |
2721 | break; | |
2722 | } | |
2723 | ||
2724 | if (tiosp->c_cflag & CSTOPB) | |
2725 | cor1 |= COR1_STOP2; | |
2726 | else | |
2727 | cor1 |= COR1_STOP1; | |
2728 | ||
2729 | if (tiosp->c_cflag & PARENB) { | |
2730 | if (tiosp->c_cflag & PARODD) | |
2731 | cor1 |= (COR1_PARENB | COR1_PARODD); | |
2732 | else | |
2733 | cor1 |= (COR1_PARENB | COR1_PAREVEN); | |
2734 | } else { | |
2735 | cor1 |= COR1_PARNONE; | |
2736 | } | |
2737 | ||
2738 | /* | |
2739 | * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing | |
2740 | * space for hardware flow control and the like. This should be set to | |
2741 | * VMIN. Also here we will set the RX data timeout to 10ms - this should | |
2742 | * really be based on VTIME. | |
2743 | */ | |
2744 | cor3 |= FIFO_RXTHRESHOLD; | |
2745 | rtpr = 2; | |
2746 | ||
2747 | /* | |
2748 | * Calculate the baud rate timers. For now we will just assume that | |
2749 | * the input and output baud are the same. Could have used a baud | |
2750 | * table here, but this way we can generate virtually any baud rate | |
2751 | * we like! | |
2752 | */ | |
2753 | baudrate = tiosp->c_cflag & CBAUD; | |
2754 | if (baudrate & CBAUDEX) { | |
2755 | baudrate &= ~CBAUDEX; | |
2756 | if ((baudrate < 1) || (baudrate > 4)) | |
2757 | tiosp->c_cflag &= ~CBAUDEX; | |
2758 | else | |
2759 | baudrate += 15; | |
2760 | } | |
2761 | baudrate = stl_baudrates[baudrate]; | |
2762 | if ((tiosp->c_cflag & CBAUD) == B38400) { | |
f8ae4764 | 2763 | if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) |
1da177e4 | 2764 | baudrate = 57600; |
f8ae4764 | 2765 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) |
1da177e4 | 2766 | baudrate = 115200; |
f8ae4764 | 2767 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) |
1da177e4 | 2768 | baudrate = 230400; |
f8ae4764 | 2769 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) |
1da177e4 | 2770 | baudrate = 460800; |
f8ae4764 | 2771 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) |
1da177e4 LT |
2772 | baudrate = (portp->baud_base / portp->custom_divisor); |
2773 | } | |
2774 | if (baudrate > STL_CD1400MAXBAUD) | |
2775 | baudrate = STL_CD1400MAXBAUD; | |
2776 | ||
2777 | if (baudrate > 0) { | |
c62429d9 JS |
2778 | for (clk = 0; clk < CD1400_NUMCLKS; clk++) { |
2779 | clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate; | |
1da177e4 LT |
2780 | if (clkdiv < 0x100) |
2781 | break; | |
2782 | } | |
2783 | div = (unsigned char) clkdiv; | |
2784 | } | |
2785 | ||
2786 | /* | |
2787 | * Check what form of modem signaling is required and set it up. | |
2788 | */ | |
2789 | if ((tiosp->c_cflag & CLOCAL) == 0) { | |
2790 | mcor1 |= MCOR1_DCD; | |
2791 | mcor2 |= MCOR2_DCD; | |
2792 | sreron |= SRER_MODEM; | |
f8ae4764 | 2793 | portp->port.flags |= ASYNC_CHECK_CD; |
c62429d9 | 2794 | } else |
f8ae4764 | 2795 | portp->port.flags &= ~ASYNC_CHECK_CD; |
1da177e4 LT |
2796 | |
2797 | /* | |
2798 | * Setup cd1400 enhanced modes if we can. In particular we want to | |
2799 | * handle as much of the flow control as possible automatically. As | |
2800 | * well as saving a few CPU cycles it will also greatly improve flow | |
2801 | * control reliability. | |
2802 | */ | |
2803 | if (tiosp->c_iflag & IXON) { | |
2804 | cor2 |= COR2_TXIBE; | |
2805 | cor3 |= COR3_SCD12; | |
2806 | if (tiosp->c_iflag & IXANY) | |
2807 | cor2 |= COR2_IXM; | |
2808 | } | |
2809 | ||
2810 | if (tiosp->c_cflag & CRTSCTS) { | |
2811 | cor2 |= COR2_CTSAE; | |
2812 | mcor1 |= FIFO_RTSTHRESHOLD; | |
2813 | } | |
2814 | ||
2815 | /* | |
2816 | * All cd1400 register values calculated so go through and set | |
2817 | * them all up. | |
2818 | */ | |
2819 | ||
a0564e14 | 2820 | pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", |
1da177e4 | 2821 | portp->portnr, portp->panelnr, portp->brdnr); |
a0564e14 | 2822 | pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n", |
1da177e4 | 2823 | cor1, cor2, cor3, cor4, cor5); |
a0564e14 | 2824 | pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n", |
1da177e4 | 2825 | mcor1, mcor2, rtpr, sreron, sreroff); |
a0564e14 JS |
2826 | pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div); |
2827 | pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n", | |
1da177e4 LT |
2828 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], |
2829 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]); | |
1da177e4 | 2830 | |
b65b5b59 | 2831 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2832 | BRDENABLE(portp->brdnr, portp->pagenr); |
2833 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3)); | |
2834 | srer = stl_cd1400getreg(portp, SRER); | |
2835 | stl_cd1400setreg(portp, SRER, 0); | |
2836 | if (stl_cd1400updatereg(portp, COR1, cor1)) | |
2837 | ccr = 1; | |
2838 | if (stl_cd1400updatereg(portp, COR2, cor2)) | |
2839 | ccr = 1; | |
2840 | if (stl_cd1400updatereg(portp, COR3, cor3)) | |
2841 | ccr = 1; | |
2842 | if (ccr) { | |
2843 | stl_cd1400ccrwait(portp); | |
2844 | stl_cd1400setreg(portp, CCR, CCR_CORCHANGE); | |
2845 | } | |
2846 | stl_cd1400setreg(portp, COR4, cor4); | |
2847 | stl_cd1400setreg(portp, COR5, cor5); | |
2848 | stl_cd1400setreg(portp, MCOR1, mcor1); | |
2849 | stl_cd1400setreg(portp, MCOR2, mcor2); | |
2850 | if (baudrate > 0) { | |
2851 | stl_cd1400setreg(portp, TCOR, clk); | |
2852 | stl_cd1400setreg(portp, TBPR, div); | |
2853 | stl_cd1400setreg(portp, RCOR, clk); | |
2854 | stl_cd1400setreg(portp, RBPR, div); | |
2855 | } | |
2856 | stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]); | |
2857 | stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]); | |
2858 | stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]); | |
2859 | stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]); | |
2860 | stl_cd1400setreg(portp, RTPR, rtpr); | |
2861 | mcor1 = stl_cd1400getreg(portp, MSVR1); | |
2862 | if (mcor1 & MSVR1_DCD) | |
2863 | portp->sigs |= TIOCM_CD; | |
2864 | else | |
2865 | portp->sigs &= ~TIOCM_CD; | |
2866 | stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron)); | |
2867 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 2868 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
2869 | } |
2870 | ||
2871 | /*****************************************************************************/ | |
2872 | ||
2873 | /* | |
2874 | * Set the state of the DTR and RTS signals. | |
2875 | */ | |
2876 | ||
ca7ed0f2 | 2877 | static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts) |
1da177e4 LT |
2878 | { |
2879 | unsigned char msvr1, msvr2; | |
2880 | unsigned long flags; | |
2881 | ||
a0564e14 JS |
2882 | pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n", |
2883 | portp, dtr, rts); | |
1da177e4 LT |
2884 | |
2885 | msvr1 = 0; | |
2886 | msvr2 = 0; | |
2887 | if (dtr > 0) | |
2888 | msvr1 = MSVR1_DTR; | |
2889 | if (rts > 0) | |
2890 | msvr2 = MSVR2_RTS; | |
2891 | ||
b65b5b59 | 2892 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2893 | BRDENABLE(portp->brdnr, portp->pagenr); |
2894 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
2895 | if (rts >= 0) | |
2896 | stl_cd1400setreg(portp, MSVR2, msvr2); | |
2897 | if (dtr >= 0) | |
2898 | stl_cd1400setreg(portp, MSVR1, msvr1); | |
2899 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 2900 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
2901 | } |
2902 | ||
2903 | /*****************************************************************************/ | |
2904 | ||
2905 | /* | |
2906 | * Return the state of the signals. | |
2907 | */ | |
2908 | ||
ca7ed0f2 | 2909 | static int stl_cd1400getsignals(struct stlport *portp) |
1da177e4 LT |
2910 | { |
2911 | unsigned char msvr1, msvr2; | |
2912 | unsigned long flags; | |
2913 | int sigs; | |
2914 | ||
a0564e14 | 2915 | pr_debug("stl_cd1400getsignals(portp=%p)\n", portp); |
1da177e4 | 2916 | |
b65b5b59 | 2917 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2918 | BRDENABLE(portp->brdnr, portp->pagenr); |
2919 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
2920 | msvr1 = stl_cd1400getreg(portp, MSVR1); | |
2921 | msvr2 = stl_cd1400getreg(portp, MSVR2); | |
2922 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 2923 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
2924 | |
2925 | sigs = 0; | |
2926 | sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0; | |
2927 | sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0; | |
2928 | sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0; | |
2929 | sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0; | |
2930 | #if 0 | |
2931 | sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0; | |
2932 | sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0; | |
2933 | #else | |
2934 | sigs |= TIOCM_DSR; | |
2935 | #endif | |
014c2544 | 2936 | return sigs; |
1da177e4 LT |
2937 | } |
2938 | ||
2939 | /*****************************************************************************/ | |
2940 | ||
2941 | /* | |
2942 | * Enable/Disable the Transmitter and/or Receiver. | |
2943 | */ | |
2944 | ||
ca7ed0f2 | 2945 | static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
2946 | { |
2947 | unsigned char ccr; | |
2948 | unsigned long flags; | |
2949 | ||
a0564e14 JS |
2950 | pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); |
2951 | ||
1da177e4 LT |
2952 | ccr = 0; |
2953 | ||
2954 | if (tx == 0) | |
2955 | ccr |= CCR_TXDISABLE; | |
2956 | else if (tx > 0) | |
2957 | ccr |= CCR_TXENABLE; | |
2958 | if (rx == 0) | |
2959 | ccr |= CCR_RXDISABLE; | |
2960 | else if (rx > 0) | |
2961 | ccr |= CCR_RXENABLE; | |
2962 | ||
b65b5b59 | 2963 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2964 | BRDENABLE(portp->brdnr, portp->pagenr); |
2965 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
2966 | stl_cd1400ccrwait(portp); | |
2967 | stl_cd1400setreg(portp, CCR, ccr); | |
2968 | stl_cd1400ccrwait(portp); | |
2969 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 2970 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
2971 | } |
2972 | ||
2973 | /*****************************************************************************/ | |
2974 | ||
2975 | /* | |
2976 | * Start/stop the Transmitter and/or Receiver. | |
2977 | */ | |
2978 | ||
ca7ed0f2 | 2979 | static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
2980 | { |
2981 | unsigned char sreron, sreroff; | |
2982 | unsigned long flags; | |
2983 | ||
a0564e14 | 2984 | pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); |
1da177e4 LT |
2985 | |
2986 | sreron = 0; | |
2987 | sreroff = 0; | |
2988 | if (tx == 0) | |
2989 | sreroff |= (SRER_TXDATA | SRER_TXEMPTY); | |
2990 | else if (tx == 1) | |
2991 | sreron |= SRER_TXDATA; | |
2992 | else if (tx >= 2) | |
2993 | sreron |= SRER_TXEMPTY; | |
2994 | if (rx == 0) | |
2995 | sreroff |= SRER_RXDATA; | |
2996 | else if (rx > 0) | |
2997 | sreron |= SRER_RXDATA; | |
2998 | ||
b65b5b59 | 2999 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3000 | BRDENABLE(portp->brdnr, portp->pagenr); |
3001 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3002 | stl_cd1400setreg(portp, SRER, | |
3003 | ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron)); | |
3004 | BRDDISABLE(portp->brdnr); | |
3005 | if (tx > 0) | |
3006 | set_bit(ASYI_TXBUSY, &portp->istate); | |
b65b5b59 | 3007 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3008 | } |
3009 | ||
3010 | /*****************************************************************************/ | |
3011 | ||
3012 | /* | |
3013 | * Disable all interrupts from this port. | |
3014 | */ | |
3015 | ||
ca7ed0f2 | 3016 | static void stl_cd1400disableintrs(struct stlport *portp) |
1da177e4 LT |
3017 | { |
3018 | unsigned long flags; | |
3019 | ||
a0564e14 JS |
3020 | pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp); |
3021 | ||
b65b5b59 | 3022 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3023 | BRDENABLE(portp->brdnr, portp->pagenr); |
3024 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3025 | stl_cd1400setreg(portp, SRER, 0); | |
3026 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3027 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3028 | } |
3029 | ||
3030 | /*****************************************************************************/ | |
3031 | ||
ca7ed0f2 | 3032 | static void stl_cd1400sendbreak(struct stlport *portp, int len) |
1da177e4 LT |
3033 | { |
3034 | unsigned long flags; | |
3035 | ||
a0564e14 | 3036 | pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len); |
1da177e4 | 3037 | |
b65b5b59 | 3038 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3039 | BRDENABLE(portp->brdnr, portp->pagenr); |
3040 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3041 | stl_cd1400setreg(portp, SRER, | |
3042 | ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) | | |
3043 | SRER_TXEMPTY)); | |
3044 | BRDDISABLE(portp->brdnr); | |
3045 | portp->brklen = len; | |
3046 | if (len == 1) | |
3047 | portp->stats.txbreaks++; | |
b65b5b59 | 3048 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3049 | } |
3050 | ||
3051 | /*****************************************************************************/ | |
3052 | ||
3053 | /* | |
3054 | * Take flow control actions... | |
3055 | */ | |
3056 | ||
ca7ed0f2 | 3057 | static void stl_cd1400flowctrl(struct stlport *portp, int state) |
1da177e4 LT |
3058 | { |
3059 | struct tty_struct *tty; | |
3060 | unsigned long flags; | |
3061 | ||
a0564e14 | 3062 | pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 3063 | |
615e4a71 | 3064 | if (portp == NULL) |
1da177e4 | 3065 | return; |
d18a750f | 3066 | tty = tty_port_tty_get(&portp->port); |
615e4a71 | 3067 | if (tty == NULL) |
1da177e4 LT |
3068 | return; |
3069 | ||
b65b5b59 | 3070 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3071 | BRDENABLE(portp->brdnr, portp->pagenr); |
3072 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3073 | ||
3074 | if (state) { | |
3075 | if (tty->termios->c_iflag & IXOFF) { | |
3076 | stl_cd1400ccrwait(portp); | |
3077 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1); | |
3078 | portp->stats.rxxon++; | |
3079 | stl_cd1400ccrwait(portp); | |
3080 | } | |
3081 | /* | |
3082 | * Question: should we return RTS to what it was before? It may | |
3083 | * have been set by an ioctl... Suppose not, since if you have | |
3084 | * hardware flow control set then it is pretty silly to go and | |
3085 | * set the RTS line by hand. | |
3086 | */ | |
3087 | if (tty->termios->c_cflag & CRTSCTS) { | |
3088 | stl_cd1400setreg(portp, MCOR1, | |
3089 | (stl_cd1400getreg(portp, MCOR1) | | |
3090 | FIFO_RTSTHRESHOLD)); | |
3091 | stl_cd1400setreg(portp, MSVR2, MSVR2_RTS); | |
3092 | portp->stats.rxrtson++; | |
3093 | } | |
3094 | } else { | |
3095 | if (tty->termios->c_iflag & IXOFF) { | |
3096 | stl_cd1400ccrwait(portp); | |
3097 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2); | |
3098 | portp->stats.rxxoff++; | |
3099 | stl_cd1400ccrwait(portp); | |
3100 | } | |
3101 | if (tty->termios->c_cflag & CRTSCTS) { | |
3102 | stl_cd1400setreg(portp, MCOR1, | |
3103 | (stl_cd1400getreg(portp, MCOR1) & 0xf0)); | |
3104 | stl_cd1400setreg(portp, MSVR2, 0); | |
3105 | portp->stats.rxrtsoff++; | |
3106 | } | |
3107 | } | |
3108 | ||
3109 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3110 | spin_unlock_irqrestore(&brd_lock, flags); |
d18a750f | 3111 | tty_kref_put(tty); |
1da177e4 LT |
3112 | } |
3113 | ||
3114 | /*****************************************************************************/ | |
3115 | ||
3116 | /* | |
3117 | * Send a flow control character... | |
3118 | */ | |
3119 | ||
ca7ed0f2 | 3120 | static void stl_cd1400sendflow(struct stlport *portp, int state) |
1da177e4 LT |
3121 | { |
3122 | struct tty_struct *tty; | |
3123 | unsigned long flags; | |
3124 | ||
a0564e14 | 3125 | pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 3126 | |
615e4a71 | 3127 | if (portp == NULL) |
1da177e4 | 3128 | return; |
d18a750f | 3129 | tty = tty_port_tty_get(&portp->port); |
615e4a71 | 3130 | if (tty == NULL) |
1da177e4 LT |
3131 | return; |
3132 | ||
b65b5b59 | 3133 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3134 | BRDENABLE(portp->brdnr, portp->pagenr); |
3135 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3136 | if (state) { | |
3137 | stl_cd1400ccrwait(portp); | |
3138 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1); | |
3139 | portp->stats.rxxon++; | |
3140 | stl_cd1400ccrwait(portp); | |
3141 | } else { | |
3142 | stl_cd1400ccrwait(portp); | |
3143 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2); | |
3144 | portp->stats.rxxoff++; | |
3145 | stl_cd1400ccrwait(portp); | |
3146 | } | |
3147 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3148 | spin_unlock_irqrestore(&brd_lock, flags); |
d18a750f | 3149 | tty_kref_put(tty); |
1da177e4 LT |
3150 | } |
3151 | ||
3152 | /*****************************************************************************/ | |
3153 | ||
ca7ed0f2 | 3154 | static void stl_cd1400flush(struct stlport *portp) |
1da177e4 LT |
3155 | { |
3156 | unsigned long flags; | |
3157 | ||
a0564e14 | 3158 | pr_debug("stl_cd1400flush(portp=%p)\n", portp); |
1da177e4 | 3159 | |
615e4a71 | 3160 | if (portp == NULL) |
1da177e4 LT |
3161 | return; |
3162 | ||
b65b5b59 | 3163 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3164 | BRDENABLE(portp->brdnr, portp->pagenr); |
3165 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3166 | stl_cd1400ccrwait(portp); | |
3167 | stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO); | |
3168 | stl_cd1400ccrwait(portp); | |
3169 | portp->tx.tail = portp->tx.head; | |
3170 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3171 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3172 | } |
3173 | ||
3174 | /*****************************************************************************/ | |
3175 | ||
3176 | /* | |
3177 | * Return the current state of data flow on this port. This is only | |
3178 | * really interresting when determining if data has fully completed | |
3179 | * transmission or not... This is easy for the cd1400, it accurately | |
3180 | * maintains the busy port flag. | |
3181 | */ | |
3182 | ||
ca7ed0f2 | 3183 | static int stl_cd1400datastate(struct stlport *portp) |
1da177e4 | 3184 | { |
a0564e14 | 3185 | pr_debug("stl_cd1400datastate(portp=%p)\n", portp); |
1da177e4 | 3186 | |
615e4a71 | 3187 | if (portp == NULL) |
014c2544 | 3188 | return 0; |
1da177e4 | 3189 | |
014c2544 | 3190 | return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0; |
1da177e4 LT |
3191 | } |
3192 | ||
3193 | /*****************************************************************************/ | |
3194 | ||
3195 | /* | |
3196 | * Interrupt service routine for cd1400 EasyIO boards. | |
3197 | */ | |
3198 | ||
ca7ed0f2 | 3199 | static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase) |
1da177e4 LT |
3200 | { |
3201 | unsigned char svrtype; | |
3202 | ||
a0564e14 | 3203 | pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase); |
1da177e4 | 3204 | |
b65b5b59 | 3205 | spin_lock(&brd_lock); |
1da177e4 LT |
3206 | outb(SVRR, iobase); |
3207 | svrtype = inb(iobase + EREG_DATA); | |
3208 | if (panelp->nrports > 4) { | |
3209 | outb((SVRR + 0x80), iobase); | |
3210 | svrtype |= inb(iobase + EREG_DATA); | |
3211 | } | |
3212 | ||
3213 | if (svrtype & SVRR_RX) | |
3214 | stl_cd1400rxisr(panelp, iobase); | |
3215 | else if (svrtype & SVRR_TX) | |
3216 | stl_cd1400txisr(panelp, iobase); | |
3217 | else if (svrtype & SVRR_MDM) | |
3218 | stl_cd1400mdmisr(panelp, iobase); | |
b65b5b59 AC |
3219 | |
3220 | spin_unlock(&brd_lock); | |
1da177e4 LT |
3221 | } |
3222 | ||
3223 | /*****************************************************************************/ | |
3224 | ||
3225 | /* | |
3226 | * Interrupt service routine for cd1400 panels. | |
3227 | */ | |
3228 | ||
ca7ed0f2 | 3229 | static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase) |
1da177e4 LT |
3230 | { |
3231 | unsigned char svrtype; | |
3232 | ||
a0564e14 | 3233 | pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase); |
1da177e4 LT |
3234 | |
3235 | outb(SVRR, iobase); | |
3236 | svrtype = inb(iobase + EREG_DATA); | |
3237 | outb((SVRR + 0x80), iobase); | |
3238 | svrtype |= inb(iobase + EREG_DATA); | |
3239 | if (svrtype & SVRR_RX) | |
3240 | stl_cd1400rxisr(panelp, iobase); | |
3241 | else if (svrtype & SVRR_TX) | |
3242 | stl_cd1400txisr(panelp, iobase); | |
3243 | else if (svrtype & SVRR_MDM) | |
3244 | stl_cd1400mdmisr(panelp, iobase); | |
3245 | } | |
3246 | ||
3247 | ||
3248 | /*****************************************************************************/ | |
3249 | ||
3250 | /* | |
3251 | * Unfortunately we need to handle breaks in the TX data stream, since | |
3252 | * this is the only way to generate them on the cd1400. | |
3253 | */ | |
3254 | ||
60be4810 | 3255 | static int stl_cd1400breakisr(struct stlport *portp, int ioaddr) |
1da177e4 LT |
3256 | { |
3257 | if (portp->brklen == 1) { | |
3258 | outb((COR2 + portp->uartaddr), ioaddr); | |
3259 | outb((inb(ioaddr + EREG_DATA) | COR2_ETC), | |
3260 | (ioaddr + EREG_DATA)); | |
3261 | outb((TDR + portp->uartaddr), ioaddr); | |
3262 | outb(ETC_CMD, (ioaddr + EREG_DATA)); | |
3263 | outb(ETC_STARTBREAK, (ioaddr + EREG_DATA)); | |
3264 | outb((SRER + portp->uartaddr), ioaddr); | |
3265 | outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)), | |
3266 | (ioaddr + EREG_DATA)); | |
014c2544 | 3267 | return 1; |
1da177e4 LT |
3268 | } else if (portp->brklen > 1) { |
3269 | outb((TDR + portp->uartaddr), ioaddr); | |
3270 | outb(ETC_CMD, (ioaddr + EREG_DATA)); | |
3271 | outb(ETC_STOPBREAK, (ioaddr + EREG_DATA)); | |
3272 | portp->brklen = -1; | |
014c2544 | 3273 | return 1; |
1da177e4 LT |
3274 | } else { |
3275 | outb((COR2 + portp->uartaddr), ioaddr); | |
3276 | outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC), | |
3277 | (ioaddr + EREG_DATA)); | |
3278 | portp->brklen = 0; | |
3279 | } | |
014c2544 | 3280 | return 0; |
1da177e4 LT |
3281 | } |
3282 | ||
3283 | /*****************************************************************************/ | |
3284 | ||
3285 | /* | |
3286 | * Transmit interrupt handler. This has gotta be fast! Handling TX | |
3287 | * chars is pretty simple, stuff as many as possible from the TX buffer | |
3288 | * into the cd1400 FIFO. Must also handle TX breaks here, since they | |
3289 | * are embedded as commands in the data stream. Oh no, had to use a goto! | |
3290 | * This could be optimized more, will do when I get time... | |
3291 | * In practice it is possible that interrupts are enabled but that the | |
3292 | * port has been hung up. Need to handle not having any TX buffer here, | |
3293 | * this is done by using the side effect that head and tail will also | |
3294 | * be NULL if the buffer has been freed. | |
3295 | */ | |
3296 | ||
ca7ed0f2 | 3297 | static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr) |
1da177e4 | 3298 | { |
ca7ed0f2 | 3299 | struct stlport *portp; |
1da177e4 LT |
3300 | int len, stlen; |
3301 | char *head, *tail; | |
3302 | unsigned char ioack, srer; | |
d18a750f | 3303 | struct tty_struct *tty; |
1da177e4 | 3304 | |
a0564e14 | 3305 | pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr); |
1da177e4 LT |
3306 | |
3307 | ioack = inb(ioaddr + EREG_TXACK); | |
3308 | if (((ioack & panelp->ackmask) != 0) || | |
3309 | ((ioack & ACK_TYPMASK) != ACK_TYPTX)) { | |
3310 | printk("STALLION: bad TX interrupt ack value=%x\n", ioack); | |
3311 | return; | |
3312 | } | |
3313 | portp = panelp->ports[(ioack >> 3)]; | |
3314 | ||
3315 | /* | |
3316 | * Unfortunately we need to handle breaks in the data stream, since | |
3317 | * this is the only way to generate them on the cd1400. Do it now if | |
3318 | * a break is to be sent. | |
3319 | */ | |
3320 | if (portp->brklen != 0) | |
3321 | if (stl_cd1400breakisr(portp, ioaddr)) | |
3322 | goto stl_txalldone; | |
3323 | ||
3324 | head = portp->tx.head; | |
3325 | tail = portp->tx.tail; | |
3326 | len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); | |
3327 | if ((len == 0) || ((len < STL_TXBUFLOW) && | |
3328 | (test_bit(ASYI_TXLOW, &portp->istate) == 0))) { | |
3329 | set_bit(ASYI_TXLOW, &portp->istate); | |
d18a750f AC |
3330 | tty = tty_port_tty_get(&portp->port); |
3331 | if (tty) { | |
3332 | tty_wakeup(tty); | |
3333 | tty_kref_put(tty); | |
3334 | } | |
1da177e4 LT |
3335 | } |
3336 | ||
3337 | if (len == 0) { | |
3338 | outb((SRER + portp->uartaddr), ioaddr); | |
3339 | srer = inb(ioaddr + EREG_DATA); | |
3340 | if (srer & SRER_TXDATA) { | |
3341 | srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY; | |
3342 | } else { | |
3343 | srer &= ~(SRER_TXDATA | SRER_TXEMPTY); | |
3344 | clear_bit(ASYI_TXBUSY, &portp->istate); | |
3345 | } | |
3346 | outb(srer, (ioaddr + EREG_DATA)); | |
3347 | } else { | |
843b568c | 3348 | len = min(len, CD1400_TXFIFOSIZE); |
1da177e4 | 3349 | portp->stats.txtotal += len; |
319fe7c3 JS |
3350 | stlen = min_t(unsigned int, len, |
3351 | (portp->tx.buf + STL_TXBUFSIZE) - tail); | |
1da177e4 LT |
3352 | outb((TDR + portp->uartaddr), ioaddr); |
3353 | outsb((ioaddr + EREG_DATA), tail, stlen); | |
3354 | len -= stlen; | |
3355 | tail += stlen; | |
3356 | if (tail >= (portp->tx.buf + STL_TXBUFSIZE)) | |
3357 | tail = portp->tx.buf; | |
3358 | if (len > 0) { | |
3359 | outsb((ioaddr + EREG_DATA), tail, len); | |
3360 | tail += len; | |
3361 | } | |
3362 | portp->tx.tail = tail; | |
3363 | } | |
3364 | ||
3365 | stl_txalldone: | |
3366 | outb((EOSRR + portp->uartaddr), ioaddr); | |
3367 | outb(0, (ioaddr + EREG_DATA)); | |
3368 | } | |
3369 | ||
3370 | /*****************************************************************************/ | |
3371 | ||
3372 | /* | |
3373 | * Receive character interrupt handler. Determine if we have good chars | |
3374 | * or bad chars and then process appropriately. Good chars are easy | |
3375 | * just shove the lot into the RX buffer and set all status byte to 0. | |
3376 | * If a bad RX char then process as required. This routine needs to be | |
3377 | * fast! In practice it is possible that we get an interrupt on a port | |
3378 | * that is closed. This can happen on hangups - since they completely | |
3379 | * shutdown a port not in user context. Need to handle this case. | |
3380 | */ | |
3381 | ||
ca7ed0f2 | 3382 | static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr) |
1da177e4 | 3383 | { |
ca7ed0f2 | 3384 | struct stlport *portp; |
1da177e4 LT |
3385 | struct tty_struct *tty; |
3386 | unsigned int ioack, len, buflen; | |
3387 | unsigned char status; | |
3388 | char ch; | |
3389 | ||
a0564e14 | 3390 | pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr); |
1da177e4 LT |
3391 | |
3392 | ioack = inb(ioaddr + EREG_RXACK); | |
3393 | if ((ioack & panelp->ackmask) != 0) { | |
3394 | printk("STALLION: bad RX interrupt ack value=%x\n", ioack); | |
3395 | return; | |
3396 | } | |
3397 | portp = panelp->ports[(ioack >> 3)]; | |
d18a750f | 3398 | tty = tty_port_tty_get(&portp->port); |
1da177e4 LT |
3399 | |
3400 | if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) { | |
3401 | outb((RDCR + portp->uartaddr), ioaddr); | |
3402 | len = inb(ioaddr + EREG_DATA); | |
33f0f88f | 3403 | if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) { |
319fe7c3 | 3404 | len = min_t(unsigned int, len, sizeof(stl_unwanted)); |
1da177e4 LT |
3405 | outb((RDSR + portp->uartaddr), ioaddr); |
3406 | insb((ioaddr + EREG_DATA), &stl_unwanted[0], len); | |
3407 | portp->stats.rxlost += len; | |
3408 | portp->stats.rxtotal += len; | |
3409 | } else { | |
843b568c | 3410 | len = min(len, buflen); |
1da177e4 | 3411 | if (len > 0) { |
33f0f88f | 3412 | unsigned char *ptr; |
1da177e4 | 3413 | outb((RDSR + portp->uartaddr), ioaddr); |
33f0f88f AC |
3414 | tty_prepare_flip_string(tty, &ptr, len); |
3415 | insb((ioaddr + EREG_DATA), ptr, len); | |
1da177e4 LT |
3416 | tty_schedule_flip(tty); |
3417 | portp->stats.rxtotal += len; | |
3418 | } | |
3419 | } | |
3420 | } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) { | |
3421 | outb((RDSR + portp->uartaddr), ioaddr); | |
3422 | status = inb(ioaddr + EREG_DATA); | |
3423 | ch = inb(ioaddr + EREG_DATA); | |
3424 | if (status & ST_PARITY) | |
3425 | portp->stats.rxparity++; | |
3426 | if (status & ST_FRAMING) | |
3427 | portp->stats.rxframing++; | |
3428 | if (status & ST_OVERRUN) | |
3429 | portp->stats.rxoverrun++; | |
3430 | if (status & ST_BREAK) | |
3431 | portp->stats.rxbreaks++; | |
3432 | if (status & ST_SCHARMASK) { | |
3433 | if ((status & ST_SCHARMASK) == ST_SCHAR1) | |
3434 | portp->stats.txxon++; | |
3435 | if ((status & ST_SCHARMASK) == ST_SCHAR2) | |
3436 | portp->stats.txxoff++; | |
3437 | goto stl_rxalldone; | |
3438 | } | |
33f0f88f | 3439 | if (tty != NULL && (portp->rxignoremsk & status) == 0) { |
1da177e4 LT |
3440 | if (portp->rxmarkmsk & status) { |
3441 | if (status & ST_BREAK) { | |
3442 | status = TTY_BREAK; | |
f8ae4764 | 3443 | if (portp->port.flags & ASYNC_SAK) { |
1da177e4 LT |
3444 | do_SAK(tty); |
3445 | BRDENABLE(portp->brdnr, portp->pagenr); | |
3446 | } | |
c62429d9 | 3447 | } else if (status & ST_PARITY) |
1da177e4 | 3448 | status = TTY_PARITY; |
c62429d9 | 3449 | else if (status & ST_FRAMING) |
1da177e4 | 3450 | status = TTY_FRAME; |
c62429d9 | 3451 | else if(status & ST_OVERRUN) |
1da177e4 | 3452 | status = TTY_OVERRUN; |
c62429d9 | 3453 | else |
1da177e4 | 3454 | status = 0; |
c62429d9 | 3455 | } else |
1da177e4 | 3456 | status = 0; |
33f0f88f AC |
3457 | tty_insert_flip_char(tty, ch, status); |
3458 | tty_schedule_flip(tty); | |
1da177e4 LT |
3459 | } |
3460 | } else { | |
3461 | printk("STALLION: bad RX interrupt ack value=%x\n", ioack); | |
d18a750f | 3462 | tty_kref_put(tty); |
1da177e4 LT |
3463 | return; |
3464 | } | |
3465 | ||
3466 | stl_rxalldone: | |
d18a750f | 3467 | tty_kref_put(tty); |
1da177e4 LT |
3468 | outb((EOSRR + portp->uartaddr), ioaddr); |
3469 | outb(0, (ioaddr + EREG_DATA)); | |
3470 | } | |
3471 | ||
3472 | /*****************************************************************************/ | |
3473 | ||
3474 | /* | |
3475 | * Modem interrupt handler. The is called when the modem signal line | |
3476 | * (DCD) has changed state. Leave most of the work to the off-level | |
3477 | * processing routine. | |
3478 | */ | |
3479 | ||
ca7ed0f2 | 3480 | static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr) |
1da177e4 | 3481 | { |
ca7ed0f2 | 3482 | struct stlport *portp; |
1da177e4 LT |
3483 | unsigned int ioack; |
3484 | unsigned char misr; | |
3485 | ||
a0564e14 | 3486 | pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp); |
1da177e4 LT |
3487 | |
3488 | ioack = inb(ioaddr + EREG_MDACK); | |
3489 | if (((ioack & panelp->ackmask) != 0) || | |
3490 | ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) { | |
3491 | printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack); | |
3492 | return; | |
3493 | } | |
3494 | portp = panelp->ports[(ioack >> 3)]; | |
3495 | ||
3496 | outb((MISR + portp->uartaddr), ioaddr); | |
3497 | misr = inb(ioaddr + EREG_DATA); | |
3498 | if (misr & MISR_DCD) { | |
ccfea3c9 | 3499 | stl_cd_change(portp); |
1da177e4 LT |
3500 | portp->stats.modem++; |
3501 | } | |
3502 | ||
3503 | outb((EOSRR + portp->uartaddr), ioaddr); | |
3504 | outb(0, (ioaddr + EREG_DATA)); | |
3505 | } | |
3506 | ||
3507 | /*****************************************************************************/ | |
3508 | /* SC26198 HARDWARE FUNCTIONS */ | |
3509 | /*****************************************************************************/ | |
3510 | ||
3511 | /* | |
3512 | * These functions get/set/update the registers of the sc26198 UARTs. | |
3513 | * Access to the sc26198 registers is via an address/data io port pair. | |
3514 | * (Maybe should make this inline...) | |
3515 | */ | |
3516 | ||
ca7ed0f2 | 3517 | static int stl_sc26198getreg(struct stlport *portp, int regnr) |
1da177e4 LT |
3518 | { |
3519 | outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); | |
014c2544 | 3520 | return inb(portp->ioaddr + XP_DATA); |
1da177e4 LT |
3521 | } |
3522 | ||
ca7ed0f2 | 3523 | static void stl_sc26198setreg(struct stlport *portp, int regnr, int value) |
1da177e4 LT |
3524 | { |
3525 | outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); | |
3526 | outb(value, (portp->ioaddr + XP_DATA)); | |
3527 | } | |
3528 | ||
ca7ed0f2 | 3529 | static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value) |
1da177e4 LT |
3530 | { |
3531 | outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); | |
3532 | if (inb(portp->ioaddr + XP_DATA) != value) { | |
3533 | outb(value, (portp->ioaddr + XP_DATA)); | |
014c2544 | 3534 | return 1; |
1da177e4 | 3535 | } |
014c2544 | 3536 | return 0; |
1da177e4 LT |
3537 | } |
3538 | ||
3539 | /*****************************************************************************/ | |
3540 | ||
3541 | /* | |
3542 | * Functions to get and set the sc26198 global registers. | |
3543 | */ | |
3544 | ||
ca7ed0f2 | 3545 | static int stl_sc26198getglobreg(struct stlport *portp, int regnr) |
1da177e4 LT |
3546 | { |
3547 | outb(regnr, (portp->ioaddr + XP_ADDR)); | |
014c2544 | 3548 | return inb(portp->ioaddr + XP_DATA); |
1da177e4 LT |
3549 | } |
3550 | ||
3551 | #if 0 | |
ca7ed0f2 | 3552 | static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value) |
1da177e4 LT |
3553 | { |
3554 | outb(regnr, (portp->ioaddr + XP_ADDR)); | |
3555 | outb(value, (portp->ioaddr + XP_DATA)); | |
3556 | } | |
3557 | #endif | |
3558 | ||
3559 | /*****************************************************************************/ | |
3560 | ||
3561 | /* | |
3562 | * Inbitialize the UARTs in a panel. We don't care what sort of board | |
3563 | * these ports are on - since the port io registers are almost | |
3564 | * identical when dealing with ports. | |
3565 | */ | |
3566 | ||
ca7ed0f2 | 3567 | static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp) |
1da177e4 LT |
3568 | { |
3569 | int chipmask, i; | |
3570 | int nrchips, ioaddr; | |
3571 | ||
a0564e14 | 3572 | pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp); |
1da177e4 LT |
3573 | |
3574 | BRDENABLE(panelp->brdnr, panelp->pagenr); | |
3575 | ||
3576 | /* | |
3577 | * Check that each chip is present and started up OK. | |
3578 | */ | |
3579 | chipmask = 0; | |
3580 | nrchips = (panelp->nrports + 4) / SC26198_PORTS; | |
3581 | if (brdp->brdtype == BRD_ECHPCI) | |
3582 | outb(panelp->pagenr, brdp->ioctrl); | |
3583 | ||
c62429d9 | 3584 | for (i = 0; i < nrchips; i++) { |
1da177e4 LT |
3585 | ioaddr = panelp->iobase + (i * 4); |
3586 | outb(SCCR, (ioaddr + XP_ADDR)); | |
3587 | outb(CR_RESETALL, (ioaddr + XP_DATA)); | |
3588 | outb(TSTR, (ioaddr + XP_ADDR)); | |
3589 | if (inb(ioaddr + XP_DATA) != 0) { | |
3590 | printk("STALLION: sc26198 not responding, " | |
3591 | "brd=%d panel=%d chip=%d\n", | |
3592 | panelp->brdnr, panelp->panelnr, i); | |
3593 | continue; | |
3594 | } | |
3595 | chipmask |= (0x1 << i); | |
3596 | outb(GCCR, (ioaddr + XP_ADDR)); | |
3597 | outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA)); | |
3598 | outb(WDTRCR, (ioaddr + XP_ADDR)); | |
3599 | outb(0xff, (ioaddr + XP_DATA)); | |
3600 | } | |
3601 | ||
3602 | BRDDISABLE(panelp->brdnr); | |
014c2544 | 3603 | return chipmask; |
1da177e4 LT |
3604 | } |
3605 | ||
3606 | /*****************************************************************************/ | |
3607 | ||
3608 | /* | |
3609 | * Initialize hardware specific port registers. | |
3610 | */ | |
3611 | ||
ca7ed0f2 | 3612 | static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp) |
1da177e4 | 3613 | { |
a0564e14 JS |
3614 | pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp, |
3615 | panelp, portp); | |
1da177e4 | 3616 | |
615e4a71 JS |
3617 | if ((brdp == NULL) || (panelp == NULL) || |
3618 | (portp == NULL)) | |
1da177e4 LT |
3619 | return; |
3620 | ||
3621 | portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4); | |
3622 | portp->uartaddr = (portp->portnr & 0x07) << 4; | |
3623 | portp->pagenr = panelp->pagenr; | |
3624 | portp->hwid = 0x1; | |
3625 | ||
3626 | BRDENABLE(portp->brdnr, portp->pagenr); | |
3627 | stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS); | |
3628 | BRDDISABLE(portp->brdnr); | |
3629 | } | |
3630 | ||
3631 | /*****************************************************************************/ | |
3632 | ||
3633 | /* | |
3634 | * Set up the sc26198 registers for a port based on the termios port | |
3635 | * settings. | |
3636 | */ | |
3637 | ||
606d099c | 3638 | static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp) |
1da177e4 | 3639 | { |
ca7ed0f2 | 3640 | struct stlbrd *brdp; |
1da177e4 LT |
3641 | unsigned long flags; |
3642 | unsigned int baudrate; | |
3643 | unsigned char mr0, mr1, mr2, clk; | |
3644 | unsigned char imron, imroff, iopr, ipr; | |
3645 | ||
3646 | mr0 = 0; | |
3647 | mr1 = 0; | |
3648 | mr2 = 0; | |
3649 | clk = 0; | |
3650 | iopr = 0; | |
3651 | imron = 0; | |
3652 | imroff = 0; | |
3653 | ||
3654 | brdp = stl_brds[portp->brdnr]; | |
615e4a71 | 3655 | if (brdp == NULL) |
1da177e4 LT |
3656 | return; |
3657 | ||
3658 | /* | |
3659 | * Set up the RX char ignore mask with those RX error types we | |
3660 | * can ignore. | |
3661 | */ | |
3662 | portp->rxignoremsk = 0; | |
3663 | if (tiosp->c_iflag & IGNPAR) | |
3664 | portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING | | |
3665 | SR_RXOVERRUN); | |
3666 | if (tiosp->c_iflag & IGNBRK) | |
3667 | portp->rxignoremsk |= SR_RXBREAK; | |
3668 | ||
3669 | portp->rxmarkmsk = SR_RXOVERRUN; | |
3670 | if (tiosp->c_iflag & (INPCK | PARMRK)) | |
3671 | portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING); | |
3672 | if (tiosp->c_iflag & BRKINT) | |
3673 | portp->rxmarkmsk |= SR_RXBREAK; | |
3674 | ||
3675 | /* | |
3676 | * Go through the char size, parity and stop bits and set all the | |
3677 | * option register appropriately. | |
3678 | */ | |
3679 | switch (tiosp->c_cflag & CSIZE) { | |
3680 | case CS5: | |
3681 | mr1 |= MR1_CS5; | |
3682 | break; | |
3683 | case CS6: | |
3684 | mr1 |= MR1_CS6; | |
3685 | break; | |
3686 | case CS7: | |
3687 | mr1 |= MR1_CS7; | |
3688 | break; | |
3689 | default: | |
3690 | mr1 |= MR1_CS8; | |
3691 | break; | |
3692 | } | |
3693 | ||
3694 | if (tiosp->c_cflag & CSTOPB) | |
3695 | mr2 |= MR2_STOP2; | |
3696 | else | |
3697 | mr2 |= MR2_STOP1; | |
3698 | ||
3699 | if (tiosp->c_cflag & PARENB) { | |
3700 | if (tiosp->c_cflag & PARODD) | |
3701 | mr1 |= (MR1_PARENB | MR1_PARODD); | |
3702 | else | |
3703 | mr1 |= (MR1_PARENB | MR1_PAREVEN); | |
c62429d9 | 3704 | } else |
1da177e4 | 3705 | mr1 |= MR1_PARNONE; |
1da177e4 LT |
3706 | |
3707 | mr1 |= MR1_ERRBLOCK; | |
3708 | ||
3709 | /* | |
3710 | * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing | |
3711 | * space for hardware flow control and the like. This should be set to | |
3712 | * VMIN. | |
3713 | */ | |
3714 | mr2 |= MR2_RXFIFOHALF; | |
3715 | ||
3716 | /* | |
3717 | * Calculate the baud rate timers. For now we will just assume that | |
3718 | * the input and output baud are the same. The sc26198 has a fixed | |
3719 | * baud rate table, so only discrete baud rates possible. | |
3720 | */ | |
3721 | baudrate = tiosp->c_cflag & CBAUD; | |
3722 | if (baudrate & CBAUDEX) { | |
3723 | baudrate &= ~CBAUDEX; | |
3724 | if ((baudrate < 1) || (baudrate > 4)) | |
3725 | tiosp->c_cflag &= ~CBAUDEX; | |
3726 | else | |
3727 | baudrate += 15; | |
3728 | } | |
3729 | baudrate = stl_baudrates[baudrate]; | |
3730 | if ((tiosp->c_cflag & CBAUD) == B38400) { | |
f8ae4764 | 3731 | if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) |
1da177e4 | 3732 | baudrate = 57600; |
f8ae4764 | 3733 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) |
1da177e4 | 3734 | baudrate = 115200; |
f8ae4764 | 3735 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) |
1da177e4 | 3736 | baudrate = 230400; |
f8ae4764 | 3737 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) |
1da177e4 | 3738 | baudrate = 460800; |
f8ae4764 | 3739 | else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) |
1da177e4 LT |
3740 | baudrate = (portp->baud_base / portp->custom_divisor); |
3741 | } | |
3742 | if (baudrate > STL_SC26198MAXBAUD) | |
3743 | baudrate = STL_SC26198MAXBAUD; | |
3744 | ||
c62429d9 JS |
3745 | if (baudrate > 0) |
3746 | for (clk = 0; clk < SC26198_NRBAUDS; clk++) | |
1da177e4 LT |
3747 | if (baudrate <= sc26198_baudtable[clk]) |
3748 | break; | |
1da177e4 LT |
3749 | |
3750 | /* | |
3751 | * Check what form of modem signaling is required and set it up. | |
3752 | */ | |
3753 | if (tiosp->c_cflag & CLOCAL) { | |
f8ae4764 | 3754 | portp->port.flags &= ~ASYNC_CHECK_CD; |
1da177e4 LT |
3755 | } else { |
3756 | iopr |= IOPR_DCDCOS; | |
3757 | imron |= IR_IOPORT; | |
f8ae4764 | 3758 | portp->port.flags |= ASYNC_CHECK_CD; |
1da177e4 LT |
3759 | } |
3760 | ||
3761 | /* | |
3762 | * Setup sc26198 enhanced modes if we can. In particular we want to | |
3763 | * handle as much of the flow control as possible automatically. As | |
3764 | * well as saving a few CPU cycles it will also greatly improve flow | |
3765 | * control reliability. | |
3766 | */ | |
3767 | if (tiosp->c_iflag & IXON) { | |
3768 | mr0 |= MR0_SWFTX | MR0_SWFT; | |
3769 | imron |= IR_XONXOFF; | |
c62429d9 | 3770 | } else |
1da177e4 | 3771 | imroff |= IR_XONXOFF; |
c62429d9 | 3772 | |
1da177e4 LT |
3773 | if (tiosp->c_iflag & IXOFF) |
3774 | mr0 |= MR0_SWFRX; | |
3775 | ||
3776 | if (tiosp->c_cflag & CRTSCTS) { | |
3777 | mr2 |= MR2_AUTOCTS; | |
3778 | mr1 |= MR1_AUTORTS; | |
3779 | } | |
3780 | ||
3781 | /* | |
3782 | * All sc26198 register values calculated so go through and set | |
3783 | * them all up. | |
3784 | */ | |
3785 | ||
a0564e14 | 3786 | pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", |
1da177e4 | 3787 | portp->portnr, portp->panelnr, portp->brdnr); |
a0564e14 JS |
3788 | pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk); |
3789 | pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff); | |
3790 | pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n", | |
1da177e4 LT |
3791 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], |
3792 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]); | |
1da177e4 | 3793 | |
b65b5b59 | 3794 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3795 | BRDENABLE(portp->brdnr, portp->pagenr); |
3796 | stl_sc26198setreg(portp, IMR, 0); | |
3797 | stl_sc26198updatereg(portp, MR0, mr0); | |
3798 | stl_sc26198updatereg(portp, MR1, mr1); | |
3799 | stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK); | |
3800 | stl_sc26198updatereg(portp, MR2, mr2); | |
3801 | stl_sc26198updatereg(portp, IOPIOR, | |
3802 | ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr)); | |
3803 | ||
3804 | if (baudrate > 0) { | |
3805 | stl_sc26198setreg(portp, TXCSR, clk); | |
3806 | stl_sc26198setreg(portp, RXCSR, clk); | |
3807 | } | |
3808 | ||
3809 | stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]); | |
3810 | stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]); | |
3811 | ||
3812 | ipr = stl_sc26198getreg(portp, IPR); | |
3813 | if (ipr & IPR_DCD) | |
3814 | portp->sigs &= ~TIOCM_CD; | |
3815 | else | |
3816 | portp->sigs |= TIOCM_CD; | |
3817 | ||
3818 | portp->imr = (portp->imr & ~imroff) | imron; | |
3819 | stl_sc26198setreg(portp, IMR, portp->imr); | |
3820 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3821 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3822 | } |
3823 | ||
3824 | /*****************************************************************************/ | |
3825 | ||
3826 | /* | |
3827 | * Set the state of the DTR and RTS signals. | |
3828 | */ | |
3829 | ||
ca7ed0f2 | 3830 | static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts) |
1da177e4 LT |
3831 | { |
3832 | unsigned char iopioron, iopioroff; | |
3833 | unsigned long flags; | |
3834 | ||
a0564e14 JS |
3835 | pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp, |
3836 | dtr, rts); | |
1da177e4 LT |
3837 | |
3838 | iopioron = 0; | |
3839 | iopioroff = 0; | |
3840 | if (dtr == 0) | |
3841 | iopioroff |= IPR_DTR; | |
3842 | else if (dtr > 0) | |
3843 | iopioron |= IPR_DTR; | |
3844 | if (rts == 0) | |
3845 | iopioroff |= IPR_RTS; | |
3846 | else if (rts > 0) | |
3847 | iopioron |= IPR_RTS; | |
3848 | ||
b65b5b59 | 3849 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3850 | BRDENABLE(portp->brdnr, portp->pagenr); |
3851 | stl_sc26198setreg(portp, IOPIOR, | |
3852 | ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron)); | |
3853 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3854 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3855 | } |
3856 | ||
3857 | /*****************************************************************************/ | |
3858 | ||
3859 | /* | |
3860 | * Return the state of the signals. | |
3861 | */ | |
3862 | ||
ca7ed0f2 | 3863 | static int stl_sc26198getsignals(struct stlport *portp) |
1da177e4 LT |
3864 | { |
3865 | unsigned char ipr; | |
3866 | unsigned long flags; | |
3867 | int sigs; | |
3868 | ||
a0564e14 | 3869 | pr_debug("stl_sc26198getsignals(portp=%p)\n", portp); |
1da177e4 | 3870 | |
b65b5b59 | 3871 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3872 | BRDENABLE(portp->brdnr, portp->pagenr); |
3873 | ipr = stl_sc26198getreg(portp, IPR); | |
3874 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3875 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3876 | |
3877 | sigs = 0; | |
3878 | sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD; | |
3879 | sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS; | |
3880 | sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR; | |
3881 | sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS; | |
3882 | sigs |= TIOCM_DSR; | |
014c2544 | 3883 | return sigs; |
1da177e4 LT |
3884 | } |
3885 | ||
3886 | /*****************************************************************************/ | |
3887 | ||
3888 | /* | |
3889 | * Enable/Disable the Transmitter and/or Receiver. | |
3890 | */ | |
3891 | ||
ca7ed0f2 | 3892 | static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
3893 | { |
3894 | unsigned char ccr; | |
3895 | unsigned long flags; | |
3896 | ||
a0564e14 | 3897 | pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx); |
1da177e4 LT |
3898 | |
3899 | ccr = portp->crenable; | |
3900 | if (tx == 0) | |
3901 | ccr &= ~CR_TXENABLE; | |
3902 | else if (tx > 0) | |
3903 | ccr |= CR_TXENABLE; | |
3904 | if (rx == 0) | |
3905 | ccr &= ~CR_RXENABLE; | |
3906 | else if (rx > 0) | |
3907 | ccr |= CR_RXENABLE; | |
3908 | ||
b65b5b59 | 3909 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3910 | BRDENABLE(portp->brdnr, portp->pagenr); |
3911 | stl_sc26198setreg(portp, SCCR, ccr); | |
3912 | BRDDISABLE(portp->brdnr); | |
3913 | portp->crenable = ccr; | |
b65b5b59 | 3914 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3915 | } |
3916 | ||
3917 | /*****************************************************************************/ | |
3918 | ||
3919 | /* | |
3920 | * Start/stop the Transmitter and/or Receiver. | |
3921 | */ | |
3922 | ||
ca7ed0f2 | 3923 | static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
3924 | { |
3925 | unsigned char imr; | |
3926 | unsigned long flags; | |
3927 | ||
a0564e14 | 3928 | pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); |
1da177e4 LT |
3929 | |
3930 | imr = portp->imr; | |
3931 | if (tx == 0) | |
3932 | imr &= ~IR_TXRDY; | |
3933 | else if (tx == 1) | |
3934 | imr |= IR_TXRDY; | |
3935 | if (rx == 0) | |
3936 | imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG); | |
3937 | else if (rx > 0) | |
3938 | imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG; | |
3939 | ||
b65b5b59 | 3940 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3941 | BRDENABLE(portp->brdnr, portp->pagenr); |
3942 | stl_sc26198setreg(portp, IMR, imr); | |
3943 | BRDDISABLE(portp->brdnr); | |
3944 | portp->imr = imr; | |
3945 | if (tx > 0) | |
3946 | set_bit(ASYI_TXBUSY, &portp->istate); | |
b65b5b59 | 3947 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3948 | } |
3949 | ||
3950 | /*****************************************************************************/ | |
3951 | ||
3952 | /* | |
3953 | * Disable all interrupts from this port. | |
3954 | */ | |
3955 | ||
ca7ed0f2 | 3956 | static void stl_sc26198disableintrs(struct stlport *portp) |
1da177e4 LT |
3957 | { |
3958 | unsigned long flags; | |
3959 | ||
a0564e14 | 3960 | pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp); |
1da177e4 | 3961 | |
b65b5b59 | 3962 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3963 | BRDENABLE(portp->brdnr, portp->pagenr); |
3964 | portp->imr = 0; | |
3965 | stl_sc26198setreg(portp, IMR, 0); | |
3966 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3967 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3968 | } |
3969 | ||
3970 | /*****************************************************************************/ | |
3971 | ||
ca7ed0f2 | 3972 | static void stl_sc26198sendbreak(struct stlport *portp, int len) |
1da177e4 LT |
3973 | { |
3974 | unsigned long flags; | |
3975 | ||
a0564e14 | 3976 | pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len); |
1da177e4 | 3977 | |
b65b5b59 | 3978 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3979 | BRDENABLE(portp->brdnr, portp->pagenr); |
3980 | if (len == 1) { | |
3981 | stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK); | |
3982 | portp->stats.txbreaks++; | |
c62429d9 | 3983 | } else |
1da177e4 | 3984 | stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK); |
c62429d9 | 3985 | |
1da177e4 | 3986 | BRDDISABLE(portp->brdnr); |
b65b5b59 | 3987 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3988 | } |
3989 | ||
3990 | /*****************************************************************************/ | |
3991 | ||
3992 | /* | |
3993 | * Take flow control actions... | |
3994 | */ | |
3995 | ||
ca7ed0f2 | 3996 | static void stl_sc26198flowctrl(struct stlport *portp, int state) |
1da177e4 LT |
3997 | { |
3998 | struct tty_struct *tty; | |
3999 | unsigned long flags; | |
4000 | unsigned char mr0; | |
4001 | ||
a0564e14 | 4002 | pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 4003 | |
615e4a71 | 4004 | if (portp == NULL) |
1da177e4 | 4005 | return; |
d18a750f | 4006 | tty = tty_port_tty_get(&portp->port); |
615e4a71 | 4007 | if (tty == NULL) |
1da177e4 LT |
4008 | return; |
4009 | ||
b65b5b59 | 4010 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4011 | BRDENABLE(portp->brdnr, portp->pagenr); |
4012 | ||
4013 | if (state) { | |
4014 | if (tty->termios->c_iflag & IXOFF) { | |
4015 | mr0 = stl_sc26198getreg(portp, MR0); | |
4016 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4017 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXON); | |
4018 | mr0 |= MR0_SWFRX; | |
4019 | portp->stats.rxxon++; | |
4020 | stl_sc26198wait(portp); | |
4021 | stl_sc26198setreg(portp, MR0, mr0); | |
4022 | } | |
4023 | /* | |
4024 | * Question: should we return RTS to what it was before? It may | |
4025 | * have been set by an ioctl... Suppose not, since if you have | |
4026 | * hardware flow control set then it is pretty silly to go and | |
4027 | * set the RTS line by hand. | |
4028 | */ | |
4029 | if (tty->termios->c_cflag & CRTSCTS) { | |
4030 | stl_sc26198setreg(portp, MR1, | |
4031 | (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS)); | |
4032 | stl_sc26198setreg(portp, IOPIOR, | |
4033 | (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS)); | |
4034 | portp->stats.rxrtson++; | |
4035 | } | |
4036 | } else { | |
4037 | if (tty->termios->c_iflag & IXOFF) { | |
4038 | mr0 = stl_sc26198getreg(portp, MR0); | |
4039 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4040 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF); | |
4041 | mr0 &= ~MR0_SWFRX; | |
4042 | portp->stats.rxxoff++; | |
4043 | stl_sc26198wait(portp); | |
4044 | stl_sc26198setreg(portp, MR0, mr0); | |
4045 | } | |
4046 | if (tty->termios->c_cflag & CRTSCTS) { | |
4047 | stl_sc26198setreg(portp, MR1, | |
4048 | (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS)); | |
4049 | stl_sc26198setreg(portp, IOPIOR, | |
4050 | (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS)); | |
4051 | portp->stats.rxrtsoff++; | |
4052 | } | |
4053 | } | |
4054 | ||
4055 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4056 | spin_unlock_irqrestore(&brd_lock, flags); |
d18a750f | 4057 | tty_kref_put(tty); |
1da177e4 LT |
4058 | } |
4059 | ||
4060 | /*****************************************************************************/ | |
4061 | ||
4062 | /* | |
4063 | * Send a flow control character. | |
4064 | */ | |
4065 | ||
ca7ed0f2 | 4066 | static void stl_sc26198sendflow(struct stlport *portp, int state) |
1da177e4 LT |
4067 | { |
4068 | struct tty_struct *tty; | |
4069 | unsigned long flags; | |
4070 | unsigned char mr0; | |
4071 | ||
a0564e14 | 4072 | pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 4073 | |
615e4a71 | 4074 | if (portp == NULL) |
1da177e4 | 4075 | return; |
d18a750f | 4076 | tty = tty_port_tty_get(&portp->port); |
615e4a71 | 4077 | if (tty == NULL) |
1da177e4 LT |
4078 | return; |
4079 | ||
b65b5b59 | 4080 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4081 | BRDENABLE(portp->brdnr, portp->pagenr); |
4082 | if (state) { | |
4083 | mr0 = stl_sc26198getreg(portp, MR0); | |
4084 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4085 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXON); | |
4086 | mr0 |= MR0_SWFRX; | |
4087 | portp->stats.rxxon++; | |
4088 | stl_sc26198wait(portp); | |
4089 | stl_sc26198setreg(portp, MR0, mr0); | |
4090 | } else { | |
4091 | mr0 = stl_sc26198getreg(portp, MR0); | |
4092 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4093 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF); | |
4094 | mr0 &= ~MR0_SWFRX; | |
4095 | portp->stats.rxxoff++; | |
4096 | stl_sc26198wait(portp); | |
4097 | stl_sc26198setreg(portp, MR0, mr0); | |
4098 | } | |
4099 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4100 | spin_unlock_irqrestore(&brd_lock, flags); |
d18a750f | 4101 | tty_kref_put(tty); |
1da177e4 LT |
4102 | } |
4103 | ||
4104 | /*****************************************************************************/ | |
4105 | ||
ca7ed0f2 | 4106 | static void stl_sc26198flush(struct stlport *portp) |
1da177e4 LT |
4107 | { |
4108 | unsigned long flags; | |
4109 | ||
a0564e14 | 4110 | pr_debug("stl_sc26198flush(portp=%p)\n", portp); |
1da177e4 | 4111 | |
615e4a71 | 4112 | if (portp == NULL) |
1da177e4 LT |
4113 | return; |
4114 | ||
b65b5b59 | 4115 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4116 | BRDENABLE(portp->brdnr, portp->pagenr); |
4117 | stl_sc26198setreg(portp, SCCR, CR_TXRESET); | |
4118 | stl_sc26198setreg(portp, SCCR, portp->crenable); | |
4119 | BRDDISABLE(portp->brdnr); | |
4120 | portp->tx.tail = portp->tx.head; | |
b65b5b59 | 4121 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4122 | } |
4123 | ||
4124 | /*****************************************************************************/ | |
4125 | ||
4126 | /* | |
4127 | * Return the current state of data flow on this port. This is only | |
4128 | * really interresting when determining if data has fully completed | |
4129 | * transmission or not... The sc26198 interrupt scheme cannot | |
4130 | * determine when all data has actually drained, so we need to | |
4131 | * check the port statusy register to be sure. | |
4132 | */ | |
4133 | ||
ca7ed0f2 | 4134 | static int stl_sc26198datastate(struct stlport *portp) |
1da177e4 LT |
4135 | { |
4136 | unsigned long flags; | |
4137 | unsigned char sr; | |
4138 | ||
a0564e14 | 4139 | pr_debug("stl_sc26198datastate(portp=%p)\n", portp); |
1da177e4 | 4140 | |
615e4a71 | 4141 | if (portp == NULL) |
014c2544 | 4142 | return 0; |
1da177e4 | 4143 | if (test_bit(ASYI_TXBUSY, &portp->istate)) |
014c2544 | 4144 | return 1; |
1da177e4 | 4145 | |
b65b5b59 | 4146 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4147 | BRDENABLE(portp->brdnr, portp->pagenr); |
4148 | sr = stl_sc26198getreg(portp, SR); | |
4149 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4150 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 | 4151 | |
014c2544 | 4152 | return (sr & SR_TXEMPTY) ? 0 : 1; |
1da177e4 LT |
4153 | } |
4154 | ||
4155 | /*****************************************************************************/ | |
4156 | ||
4157 | /* | |
4158 | * Delay for a small amount of time, to give the sc26198 a chance | |
4159 | * to process a command... | |
4160 | */ | |
4161 | ||
ca7ed0f2 | 4162 | static void stl_sc26198wait(struct stlport *portp) |
1da177e4 LT |
4163 | { |
4164 | int i; | |
4165 | ||
a0564e14 | 4166 | pr_debug("stl_sc26198wait(portp=%p)\n", portp); |
1da177e4 | 4167 | |
615e4a71 | 4168 | if (portp == NULL) |
1da177e4 LT |
4169 | return; |
4170 | ||
c62429d9 | 4171 | for (i = 0; i < 20; i++) |
1da177e4 LT |
4172 | stl_sc26198getglobreg(portp, TSTR); |
4173 | } | |
4174 | ||
4175 | /*****************************************************************************/ | |
4176 | ||
4177 | /* | |
4178 | * If we are TX flow controlled and in IXANY mode then we may | |
4179 | * need to unflow control here. We gotta do this because of the | |
4180 | * automatic flow control modes of the sc26198. | |
4181 | */ | |
4182 | ||
60be4810 | 4183 | static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty) |
1da177e4 LT |
4184 | { |
4185 | unsigned char mr0; | |
4186 | ||
4187 | mr0 = stl_sc26198getreg(portp, MR0); | |
4188 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4189 | stl_sc26198setreg(portp, SCCR, CR_HOSTXON); | |
4190 | stl_sc26198wait(portp); | |
4191 | stl_sc26198setreg(portp, MR0, mr0); | |
4192 | clear_bit(ASYI_TXFLOWED, &portp->istate); | |
4193 | } | |
4194 | ||
4195 | /*****************************************************************************/ | |
4196 | ||
4197 | /* | |
4198 | * Interrupt service routine for sc26198 panels. | |
4199 | */ | |
4200 | ||
ca7ed0f2 | 4201 | static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase) |
1da177e4 | 4202 | { |
ca7ed0f2 | 4203 | struct stlport *portp; |
1da177e4 LT |
4204 | unsigned int iack; |
4205 | ||
b65b5b59 AC |
4206 | spin_lock(&brd_lock); |
4207 | ||
1da177e4 LT |
4208 | /* |
4209 | * Work around bug in sc26198 chip... Cannot have A6 address | |
4210 | * line of UART high, else iack will be returned as 0. | |
4211 | */ | |
4212 | outb(0, (iobase + 1)); | |
4213 | ||
4214 | iack = inb(iobase + XP_IACK); | |
4215 | portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)]; | |
4216 | ||
4217 | if (iack & IVR_RXDATA) | |
4218 | stl_sc26198rxisr(portp, iack); | |
4219 | else if (iack & IVR_TXDATA) | |
4220 | stl_sc26198txisr(portp); | |
4221 | else | |
4222 | stl_sc26198otherisr(portp, iack); | |
b65b5b59 AC |
4223 | |
4224 | spin_unlock(&brd_lock); | |
1da177e4 LT |
4225 | } |
4226 | ||
4227 | /*****************************************************************************/ | |
4228 | ||
4229 | /* | |
4230 | * Transmit interrupt handler. This has gotta be fast! Handling TX | |
4231 | * chars is pretty simple, stuff as many as possible from the TX buffer | |
4232 | * into the sc26198 FIFO. | |
4233 | * In practice it is possible that interrupts are enabled but that the | |
4234 | * port has been hung up. Need to handle not having any TX buffer here, | |
4235 | * this is done by using the side effect that head and tail will also | |
4236 | * be NULL if the buffer has been freed. | |
4237 | */ | |
4238 | ||
ca7ed0f2 | 4239 | static void stl_sc26198txisr(struct stlport *portp) |
1da177e4 | 4240 | { |
d18a750f | 4241 | struct tty_struct *tty; |
1da177e4 LT |
4242 | unsigned int ioaddr; |
4243 | unsigned char mr0; | |
4244 | int len, stlen; | |
4245 | char *head, *tail; | |
4246 | ||
a0564e14 | 4247 | pr_debug("stl_sc26198txisr(portp=%p)\n", portp); |
1da177e4 LT |
4248 | |
4249 | ioaddr = portp->ioaddr; | |
4250 | head = portp->tx.head; | |
4251 | tail = portp->tx.tail; | |
4252 | len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); | |
4253 | if ((len == 0) || ((len < STL_TXBUFLOW) && | |
4254 | (test_bit(ASYI_TXLOW, &portp->istate) == 0))) { | |
4255 | set_bit(ASYI_TXLOW, &portp->istate); | |
d18a750f AC |
4256 | tty = tty_port_tty_get(&portp->port); |
4257 | if (tty) { | |
4258 | tty_wakeup(tty); | |
4259 | tty_kref_put(tty); | |
4260 | } | |
1da177e4 LT |
4261 | } |
4262 | ||
4263 | if (len == 0) { | |
4264 | outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR)); | |
4265 | mr0 = inb(ioaddr + XP_DATA); | |
4266 | if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) { | |
4267 | portp->imr &= ~IR_TXRDY; | |
4268 | outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR)); | |
4269 | outb(portp->imr, (ioaddr + XP_DATA)); | |
4270 | clear_bit(ASYI_TXBUSY, &portp->istate); | |
4271 | } else { | |
4272 | mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY); | |
4273 | outb(mr0, (ioaddr + XP_DATA)); | |
4274 | } | |
4275 | } else { | |
843b568c | 4276 | len = min(len, SC26198_TXFIFOSIZE); |
1da177e4 | 4277 | portp->stats.txtotal += len; |
319fe7c3 JS |
4278 | stlen = min_t(unsigned int, len, |
4279 | (portp->tx.buf + STL_TXBUFSIZE) - tail); | |
1da177e4 LT |
4280 | outb(GTXFIFO, (ioaddr + XP_ADDR)); |
4281 | outsb((ioaddr + XP_DATA), tail, stlen); | |
4282 | len -= stlen; | |
4283 | tail += stlen; | |
4284 | if (tail >= (portp->tx.buf + STL_TXBUFSIZE)) | |
4285 | tail = portp->tx.buf; | |
4286 | if (len > 0) { | |
4287 | outsb((ioaddr + XP_DATA), tail, len); | |
4288 | tail += len; | |
4289 | } | |
4290 | portp->tx.tail = tail; | |
4291 | } | |
4292 | } | |
4293 | ||
4294 | /*****************************************************************************/ | |
4295 | ||
4296 | /* | |
4297 | * Receive character interrupt handler. Determine if we have good chars | |
4298 | * or bad chars and then process appropriately. Good chars are easy | |
4299 | * just shove the lot into the RX buffer and set all status byte to 0. | |
4300 | * If a bad RX char then process as required. This routine needs to be | |
4301 | * fast! In practice it is possible that we get an interrupt on a port | |
4302 | * that is closed. This can happen on hangups - since they completely | |
4303 | * shutdown a port not in user context. Need to handle this case. | |
4304 | */ | |
4305 | ||
ca7ed0f2 | 4306 | static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack) |
1da177e4 LT |
4307 | { |
4308 | struct tty_struct *tty; | |
4309 | unsigned int len, buflen, ioaddr; | |
4310 | ||
a0564e14 | 4311 | pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack); |
1da177e4 | 4312 | |
d18a750f | 4313 | tty = tty_port_tty_get(&portp->port); |
1da177e4 LT |
4314 | ioaddr = portp->ioaddr; |
4315 | outb(GIBCR, (ioaddr + XP_ADDR)); | |
4316 | len = inb(ioaddr + XP_DATA) + 1; | |
4317 | ||
4318 | if ((iack & IVR_TYPEMASK) == IVR_RXDATA) { | |
33f0f88f | 4319 | if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) { |
319fe7c3 | 4320 | len = min_t(unsigned int, len, sizeof(stl_unwanted)); |
1da177e4 LT |
4321 | outb(GRXFIFO, (ioaddr + XP_ADDR)); |
4322 | insb((ioaddr + XP_DATA), &stl_unwanted[0], len); | |
4323 | portp->stats.rxlost += len; | |
4324 | portp->stats.rxtotal += len; | |
4325 | } else { | |
843b568c | 4326 | len = min(len, buflen); |
1da177e4 | 4327 | if (len > 0) { |
33f0f88f | 4328 | unsigned char *ptr; |
1da177e4 | 4329 | outb(GRXFIFO, (ioaddr + XP_ADDR)); |
33f0f88f AC |
4330 | tty_prepare_flip_string(tty, &ptr, len); |
4331 | insb((ioaddr + XP_DATA), ptr, len); | |
1da177e4 LT |
4332 | tty_schedule_flip(tty); |
4333 | portp->stats.rxtotal += len; | |
4334 | } | |
4335 | } | |
4336 | } else { | |
4337 | stl_sc26198rxbadchars(portp); | |
4338 | } | |
4339 | ||
4340 | /* | |
4341 | * If we are TX flow controlled and in IXANY mode then we may need | |
4342 | * to unflow control here. We gotta do this because of the automatic | |
4343 | * flow control modes of the sc26198. | |
4344 | */ | |
4345 | if (test_bit(ASYI_TXFLOWED, &portp->istate)) { | |
615e4a71 JS |
4346 | if ((tty != NULL) && |
4347 | (tty->termios != NULL) && | |
1da177e4 LT |
4348 | (tty->termios->c_iflag & IXANY)) { |
4349 | stl_sc26198txunflow(portp, tty); | |
4350 | } | |
4351 | } | |
d18a750f | 4352 | tty_kref_put(tty); |
1da177e4 LT |
4353 | } |
4354 | ||
4355 | /*****************************************************************************/ | |
4356 | ||
4357 | /* | |
4358 | * Process an RX bad character. | |
4359 | */ | |
4360 | ||
60be4810 | 4361 | static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch) |
1da177e4 LT |
4362 | { |
4363 | struct tty_struct *tty; | |
4364 | unsigned int ioaddr; | |
4365 | ||
d18a750f | 4366 | tty = tty_port_tty_get(&portp->port); |
1da177e4 LT |
4367 | ioaddr = portp->ioaddr; |
4368 | ||
4369 | if (status & SR_RXPARITY) | |
4370 | portp->stats.rxparity++; | |
4371 | if (status & SR_RXFRAMING) | |
4372 | portp->stats.rxframing++; | |
4373 | if (status & SR_RXOVERRUN) | |
4374 | portp->stats.rxoverrun++; | |
4375 | if (status & SR_RXBREAK) | |
4376 | portp->stats.rxbreaks++; | |
4377 | ||
615e4a71 | 4378 | if ((tty != NULL) && |
1da177e4 LT |
4379 | ((portp->rxignoremsk & status) == 0)) { |
4380 | if (portp->rxmarkmsk & status) { | |
4381 | if (status & SR_RXBREAK) { | |
4382 | status = TTY_BREAK; | |
f8ae4764 | 4383 | if (portp->port.flags & ASYNC_SAK) { |
1da177e4 LT |
4384 | do_SAK(tty); |
4385 | BRDENABLE(portp->brdnr, portp->pagenr); | |
4386 | } | |
c62429d9 | 4387 | } else if (status & SR_RXPARITY) |
1da177e4 | 4388 | status = TTY_PARITY; |
c62429d9 | 4389 | else if (status & SR_RXFRAMING) |
1da177e4 | 4390 | status = TTY_FRAME; |
c62429d9 | 4391 | else if(status & SR_RXOVERRUN) |
1da177e4 | 4392 | status = TTY_OVERRUN; |
c62429d9 | 4393 | else |
1da177e4 | 4394 | status = 0; |
c62429d9 | 4395 | } else |
1da177e4 | 4396 | status = 0; |
1da177e4 | 4397 | |
33f0f88f AC |
4398 | tty_insert_flip_char(tty, ch, status); |
4399 | tty_schedule_flip(tty); | |
1da177e4 LT |
4400 | |
4401 | if (status == 0) | |
4402 | portp->stats.rxtotal++; | |
4403 | } | |
d18a750f | 4404 | tty_kref_put(tty); |
1da177e4 LT |
4405 | } |
4406 | ||
4407 | /*****************************************************************************/ | |
4408 | ||
4409 | /* | |
4410 | * Process all characters in the RX FIFO of the UART. Check all char | |
4411 | * status bytes as well, and process as required. We need to check | |
4412 | * all bytes in the FIFO, in case some more enter the FIFO while we | |
4413 | * are here. To get the exact character error type we need to switch | |
4414 | * into CHAR error mode (that is why we need to make sure we empty | |
4415 | * the FIFO). | |
4416 | */ | |
4417 | ||
ca7ed0f2 | 4418 | static void stl_sc26198rxbadchars(struct stlport *portp) |
1da177e4 LT |
4419 | { |
4420 | unsigned char status, mr1; | |
4421 | char ch; | |
4422 | ||
4423 | /* | |
4424 | * To get the precise error type for each character we must switch | |
4425 | * back into CHAR error mode. | |
4426 | */ | |
4427 | mr1 = stl_sc26198getreg(portp, MR1); | |
4428 | stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK)); | |
4429 | ||
4430 | while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) { | |
4431 | stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR); | |
4432 | ch = stl_sc26198getreg(portp, RXFIFO); | |
4433 | stl_sc26198rxbadch(portp, status, ch); | |
4434 | } | |
4435 | ||
4436 | /* | |
4437 | * To get correct interrupt class we must switch back into BLOCK | |
4438 | * error mode. | |
4439 | */ | |
4440 | stl_sc26198setreg(portp, MR1, mr1); | |
4441 | } | |
4442 | ||
4443 | /*****************************************************************************/ | |
4444 | ||
4445 | /* | |
4446 | * Other interrupt handler. This includes modem signals, flow | |
4447 | * control actions, etc. Most stuff is left to off-level interrupt | |
4448 | * processing time. | |
4449 | */ | |
4450 | ||
ca7ed0f2 | 4451 | static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack) |
1da177e4 LT |
4452 | { |
4453 | unsigned char cir, ipr, xisr; | |
4454 | ||
a0564e14 | 4455 | pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack); |
1da177e4 LT |
4456 | |
4457 | cir = stl_sc26198getglobreg(portp, CIR); | |
4458 | ||
4459 | switch (cir & CIR_SUBTYPEMASK) { | |
4460 | case CIR_SUBCOS: | |
4461 | ipr = stl_sc26198getreg(portp, IPR); | |
4462 | if (ipr & IPR_DCDCHANGE) { | |
ccfea3c9 | 4463 | stl_cd_change(portp); |
1da177e4 LT |
4464 | portp->stats.modem++; |
4465 | } | |
4466 | break; | |
4467 | case CIR_SUBXONXOFF: | |
4468 | xisr = stl_sc26198getreg(portp, XISR); | |
4469 | if (xisr & XISR_RXXONGOT) { | |
4470 | set_bit(ASYI_TXFLOWED, &portp->istate); | |
4471 | portp->stats.txxoff++; | |
4472 | } | |
4473 | if (xisr & XISR_RXXOFFGOT) { | |
4474 | clear_bit(ASYI_TXFLOWED, &portp->istate); | |
4475 | portp->stats.txxon++; | |
4476 | } | |
4477 | break; | |
4478 | case CIR_SUBBREAK: | |
4479 | stl_sc26198setreg(portp, SCCR, CR_BREAKRESET); | |
4480 | stl_sc26198rxbadchars(portp); | |
4481 | break; | |
4482 | default: | |
4483 | break; | |
4484 | } | |
4485 | } | |
4486 | ||
fc06b5cf JS |
4487 | static void stl_free_isabrds(void) |
4488 | { | |
4489 | struct stlbrd *brdp; | |
4490 | unsigned int i; | |
4491 | ||
4492 | for (i = 0; i < stl_nrbrds; i++) { | |
4493 | if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED)) | |
4494 | continue; | |
4495 | ||
4496 | free_irq(brdp->irq, brdp); | |
4497 | ||
4498 | stl_cleanup_panels(brdp); | |
4499 | ||
4500 | release_region(brdp->ioaddr1, brdp->iosize1); | |
4501 | if (brdp->iosize2 > 0) | |
4502 | release_region(brdp->ioaddr2, brdp->iosize2); | |
4503 | ||
4504 | kfree(brdp); | |
4505 | stl_brds[i] = NULL; | |
4506 | } | |
4507 | } | |
4508 | ||
23b85a15 JS |
4509 | /* |
4510 | * Loadable module initialization stuff. | |
4511 | */ | |
4512 | static int __init stallion_module_init(void) | |
4513 | { | |
843b568c JS |
4514 | struct stlbrd *brdp; |
4515 | struct stlconf conf; | |
aeaccfe4 | 4516 | unsigned int i, j; |
fc06b5cf | 4517 | int retval; |
23b85a15 JS |
4518 | |
4519 | printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion); | |
4520 | ||
4521 | spin_lock_init(&stallion_lock); | |
4522 | spin_lock_init(&brd_lock); | |
4523 | ||
e415109f JS |
4524 | stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS); |
4525 | if (!stl_serial) { | |
4526 | retval = -ENOMEM; | |
4527 | goto err; | |
4528 | } | |
4529 | ||
4530 | stl_serial->owner = THIS_MODULE; | |
4531 | stl_serial->driver_name = stl_drvname; | |
4532 | stl_serial->name = "ttyE"; | |
4533 | stl_serial->major = STL_SERIALMAJOR; | |
4534 | stl_serial->minor_start = 0; | |
4535 | stl_serial->type = TTY_DRIVER_TYPE_SERIAL; | |
4536 | stl_serial->subtype = SERIAL_TYPE_NORMAL; | |
4537 | stl_serial->init_termios = stl_deftermios; | |
4538 | stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; | |
4539 | tty_set_operations(stl_serial, &stl_ops); | |
4540 | ||
4541 | retval = tty_register_driver(stl_serial); | |
4542 | if (retval) { | |
4543 | printk("STALLION: failed to register serial driver\n"); | |
4544 | goto err_frtty; | |
4545 | } | |
4546 | ||
843b568c JS |
4547 | /* |
4548 | * Find any dynamically supported boards. That is via module load | |
4549 | * line options. | |
4550 | */ | |
4551 | for (i = stl_nrbrds; i < stl_nargs; i++) { | |
4552 | memset(&conf, 0, sizeof(conf)); | |
4553 | if (stl_parsebrd(&conf, stl_brdsp[i]) == 0) | |
4554 | continue; | |
4555 | if ((brdp = stl_allocbrd()) == NULL) | |
4556 | continue; | |
4557 | brdp->brdnr = i; | |
4558 | brdp->brdtype = conf.brdtype; | |
4559 | brdp->ioaddr1 = conf.ioaddr1; | |
4560 | brdp->ioaddr2 = conf.ioaddr2; | |
4561 | brdp->irq = conf.irq; | |
4562 | brdp->irqtype = conf.irqtype; | |
b08b5ad9 IK |
4563 | stl_brds[brdp->brdnr] = brdp; |
4564 | if (stl_brdinit(brdp)) { | |
4565 | stl_brds[brdp->brdnr] = NULL; | |
843b568c | 4566 | kfree(brdp); |
b08b5ad9 | 4567 | } else { |
aeaccfe4 JS |
4568 | for (j = 0; j < brdp->nrports; j++) |
4569 | tty_register_device(stl_serial, | |
4570 | brdp->brdnr * STL_MAXPORTS + j, NULL); | |
843b568c | 4571 | stl_nrbrds = i + 1; |
79cfe7ab | 4572 | } |
843b568c | 4573 | } |
23b85a15 | 4574 | |
79cfe7ab | 4575 | /* this has to be _after_ isa finding because of locking */ |
b1b84fe0 | 4576 | retval = pci_register_driver(&stl_pcidriver); |
e415109f JS |
4577 | if (retval && stl_nrbrds == 0) { |
4578 | printk(KERN_ERR "STALLION: can't register pci driver\n"); | |
4579 | goto err_unrtty; | |
fc06b5cf | 4580 | } |
23b85a15 JS |
4581 | |
4582 | /* | |
4583 | * Set up a character driver for per board stuff. This is mainly used | |
4584 | * to do stats ioctls on the ports. | |
4585 | */ | |
4586 | if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem)) | |
4587 | printk("STALLION: failed to register serial board device\n"); | |
4588 | ||
4589 | stallion_class = class_create(THIS_MODULE, "staliomem"); | |
e415109f JS |
4590 | if (IS_ERR(stallion_class)) |
4591 | printk("STALLION: failed to create class\n"); | |
23b85a15 | 4592 | for (i = 0; i < 4; i++) |
03457cd4 GKH |
4593 | device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i), |
4594 | NULL, "staliomem%d", i); | |
23b85a15 | 4595 | |
23b85a15 | 4596 | return 0; |
e415109f JS |
4597 | err_unrtty: |
4598 | tty_unregister_driver(stl_serial); | |
4599 | err_frtty: | |
fc06b5cf | 4600 | put_tty_driver(stl_serial); |
b1b84fe0 JS |
4601 | err: |
4602 | return retval; | |
23b85a15 JS |
4603 | } |
4604 | ||
4605 | static void __exit stallion_module_exit(void) | |
4606 | { | |
aeaccfe4 JS |
4607 | struct stlbrd *brdp; |
4608 | unsigned int i, j; | |
23b85a15 JS |
4609 | |
4610 | pr_debug("cleanup_module()\n"); | |
4611 | ||
4612 | printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle, | |
4613 | stl_drvversion); | |
4614 | ||
4615 | /* | |
4616 | * Free up all allocated resources used by the ports. This includes | |
4617 | * memory and interrupts. As part of this process we will also do | |
4618 | * a hangup on every open port - to try to flush out any processes | |
4619 | * hanging onto ports. | |
4620 | */ | |
aeaccfe4 JS |
4621 | for (i = 0; i < stl_nrbrds; i++) { |
4622 | if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED)) | |
4623 | continue; | |
4624 | for (j = 0; j < brdp->nrports; j++) | |
4625 | tty_unregister_device(stl_serial, | |
4626 | brdp->brdnr * STL_MAXPORTS + j); | |
4627 | } | |
fc06b5cf | 4628 | |
23b85a15 | 4629 | for (i = 0; i < 4; i++) |
07c015e7 | 4630 | device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i)); |
68fc4fab | 4631 | unregister_chrdev(STL_SIOMEMMAJOR, "staliomem"); |
23b85a15 JS |
4632 | class_destroy(stallion_class); |
4633 | ||
b1b84fe0 JS |
4634 | pci_unregister_driver(&stl_pcidriver); |
4635 | ||
fc06b5cf | 4636 | stl_free_isabrds(); |
e415109f JS |
4637 | |
4638 | tty_unregister_driver(stl_serial); | |
4639 | put_tty_driver(stl_serial); | |
23b85a15 JS |
4640 | } |
4641 | ||
4642 | module_init(stallion_module_init); | |
4643 | module_exit(stallion_module_exit); | |
4644 | ||
4645 | MODULE_AUTHOR("Greg Ungerer"); | |
4646 | MODULE_DESCRIPTION("Stallion Multiport Serial Driver"); | |
4647 | MODULE_LICENSE("GPL"); |