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1da177e4 LT |
1 | /*****************************************************************************/ |
2 | ||
3 | /* | |
4 | * stallion.c -- stallion multiport serial driver. | |
5 | * | |
6 | * Copyright (C) 1996-1999 Stallion Technologies | |
7 | * Copyright (C) 1994-1996 Greg Ungerer. | |
8 | * | |
9 | * This code is loosely based on the Linux serial driver, written by | |
10 | * Linus Torvalds, Theodore T'so and others. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | */ | |
26 | ||
27 | /*****************************************************************************/ | |
28 | ||
1da177e4 LT |
29 | #include <linux/module.h> |
30 | #include <linux/slab.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/tty.h> | |
33 | #include <linux/tty_flip.h> | |
34 | #include <linux/serial.h> | |
35 | #include <linux/cd1400.h> | |
36 | #include <linux/sc26198.h> | |
37 | #include <linux/comstats.h> | |
38 | #include <linux/stallion.h> | |
39 | #include <linux/ioport.h> | |
40 | #include <linux/init.h> | |
41 | #include <linux/smp_lock.h> | |
1da177e4 LT |
42 | #include <linux/device.h> |
43 | #include <linux/delay.h> | |
843b568c | 44 | #include <linux/ctype.h> |
1da177e4 LT |
45 | |
46 | #include <asm/io.h> | |
47 | #include <asm/uaccess.h> | |
48 | ||
1da177e4 | 49 | #include <linux/pci.h> |
1da177e4 LT |
50 | |
51 | /*****************************************************************************/ | |
52 | ||
53 | /* | |
54 | * Define different board types. Use the standard Stallion "assigned" | |
55 | * board numbers. Boards supported in this driver are abbreviated as | |
56 | * EIO = EasyIO and ECH = EasyConnection 8/32. | |
57 | */ | |
58 | #define BRD_EASYIO 20 | |
59 | #define BRD_ECH 21 | |
60 | #define BRD_ECHMC 22 | |
61 | #define BRD_ECHPCI 26 | |
62 | #define BRD_ECH64PCI 27 | |
63 | #define BRD_EASYIOPCI 28 | |
64 | ||
843b568c | 65 | struct stlconf { |
6b2c9457 | 66 | unsigned int brdtype; |
1da177e4 LT |
67 | int ioaddr1; |
68 | int ioaddr2; | |
69 | unsigned long memaddr; | |
70 | int irq; | |
71 | int irqtype; | |
1da177e4 LT |
72 | }; |
73 | ||
843b568c | 74 | static unsigned int stl_nrbrds; |
1da177e4 LT |
75 | |
76 | /*****************************************************************************/ | |
77 | ||
78 | /* | |
79 | * Define some important driver characteristics. Device major numbers | |
80 | * allocated as per Linux Device Registry. | |
81 | */ | |
82 | #ifndef STL_SIOMEMMAJOR | |
83 | #define STL_SIOMEMMAJOR 28 | |
84 | #endif | |
85 | #ifndef STL_SERIALMAJOR | |
86 | #define STL_SERIALMAJOR 24 | |
87 | #endif | |
88 | #ifndef STL_CALLOUTMAJOR | |
89 | #define STL_CALLOUTMAJOR 25 | |
90 | #endif | |
91 | ||
92 | /* | |
93 | * Set the TX buffer size. Bigger is better, but we don't want | |
94 | * to chew too much memory with buffers! | |
95 | */ | |
96 | #define STL_TXBUFLOW 512 | |
97 | #define STL_TXBUFSIZE 4096 | |
98 | ||
99 | /*****************************************************************************/ | |
100 | ||
101 | /* | |
102 | * Define our local driver identity first. Set up stuff to deal with | |
103 | * all the local structures required by a serial tty driver. | |
104 | */ | |
105 | static char *stl_drvtitle = "Stallion Multiport Serial Driver"; | |
106 | static char *stl_drvname = "stallion"; | |
107 | static char *stl_drvversion = "5.6.0"; | |
108 | ||
109 | static struct tty_driver *stl_serial; | |
110 | ||
1da177e4 LT |
111 | /* |
112 | * Define a local default termios struct. All ports will be created | |
113 | * with this termios initially. Basically all it defines is a raw port | |
114 | * at 9600, 8 data bits, 1 stop bit. | |
115 | */ | |
606d099c | 116 | static struct ktermios stl_deftermios = { |
1da177e4 LT |
117 | .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL), |
118 | .c_cc = INIT_C_CC, | |
606d099c AC |
119 | .c_ispeed = 9600, |
120 | .c_ospeed = 9600, | |
1da177e4 LT |
121 | }; |
122 | ||
1da177e4 LT |
123 | /* |
124 | * Define global place to put buffer overflow characters. | |
125 | */ | |
126 | static char stl_unwanted[SC26198_RXFIFOSIZE]; | |
127 | ||
128 | /*****************************************************************************/ | |
129 | ||
79cfe7ab | 130 | static DEFINE_MUTEX(stl_brdslock); |
ca7ed0f2 | 131 | static struct stlbrd *stl_brds[STL_MAXBRDS]; |
1da177e4 LT |
132 | |
133 | /* | |
134 | * Per board state flags. Used with the state field of the board struct. | |
135 | * Not really much here! | |
136 | */ | |
137 | #define BRD_FOUND 0x1 | |
fc06b5cf JS |
138 | #define STL_PROBED 0x2 |
139 | ||
1da177e4 LT |
140 | |
141 | /* | |
142 | * Define the port structure istate flags. These set of flags are | |
143 | * modified at interrupt time - so setting and reseting them needs | |
144 | * to be atomic. Use the bit clear/setting routines for this. | |
145 | */ | |
146 | #define ASYI_TXBUSY 1 | |
147 | #define ASYI_TXLOW 2 | |
ccfea3c9 | 148 | #define ASYI_TXFLOWED 3 |
1da177e4 LT |
149 | |
150 | /* | |
151 | * Define an array of board names as printable strings. Handy for | |
152 | * referencing boards when printing trace and stuff. | |
153 | */ | |
154 | static char *stl_brdnames[] = { | |
615e4a71 JS |
155 | NULL, |
156 | NULL, | |
157 | NULL, | |
158 | NULL, | |
159 | NULL, | |
160 | NULL, | |
161 | NULL, | |
162 | NULL, | |
163 | NULL, | |
164 | NULL, | |
165 | NULL, | |
166 | NULL, | |
167 | NULL, | |
168 | NULL, | |
169 | NULL, | |
170 | NULL, | |
171 | NULL, | |
172 | NULL, | |
173 | NULL, | |
174 | NULL, | |
1da177e4 LT |
175 | "EasyIO", |
176 | "EC8/32-AT", | |
177 | "EC8/32-MC", | |
615e4a71 JS |
178 | NULL, |
179 | NULL, | |
180 | NULL, | |
1da177e4 LT |
181 | "EC8/32-PCI", |
182 | "EC8/64-PCI", | |
183 | "EasyIO-PCI", | |
184 | }; | |
185 | ||
186 | /*****************************************************************************/ | |
187 | ||
188 | /* | |
189 | * Define some string labels for arguments passed from the module | |
190 | * load line. These allow for easy board definitions, and easy | |
191 | * modification of the io, memory and irq resoucres. | |
192 | */ | |
6b2c9457 | 193 | static unsigned int stl_nargs; |
1da177e4 LT |
194 | static char *board0[4]; |
195 | static char *board1[4]; | |
196 | static char *board2[4]; | |
197 | static char *board3[4]; | |
198 | ||
199 | static char **stl_brdsp[] = { | |
200 | (char **) &board0, | |
201 | (char **) &board1, | |
202 | (char **) &board2, | |
203 | (char **) &board3 | |
204 | }; | |
205 | ||
206 | /* | |
207 | * Define a set of common board names, and types. This is used to | |
208 | * parse any module arguments. | |
209 | */ | |
210 | ||
ca7ed0f2 | 211 | static struct { |
1da177e4 LT |
212 | char *name; |
213 | int type; | |
ca7ed0f2 | 214 | } stl_brdstr[] = { |
1da177e4 LT |
215 | { "easyio", BRD_EASYIO }, |
216 | { "eio", BRD_EASYIO }, | |
217 | { "20", BRD_EASYIO }, | |
218 | { "ec8/32", BRD_ECH }, | |
219 | { "ec8/32-at", BRD_ECH }, | |
220 | { "ec8/32-isa", BRD_ECH }, | |
221 | { "ech", BRD_ECH }, | |
222 | { "echat", BRD_ECH }, | |
223 | { "21", BRD_ECH }, | |
224 | { "ec8/32-mc", BRD_ECHMC }, | |
225 | { "ec8/32-mca", BRD_ECHMC }, | |
226 | { "echmc", BRD_ECHMC }, | |
227 | { "echmca", BRD_ECHMC }, | |
228 | { "22", BRD_ECHMC }, | |
229 | { "ec8/32-pc", BRD_ECHPCI }, | |
230 | { "ec8/32-pci", BRD_ECHPCI }, | |
231 | { "26", BRD_ECHPCI }, | |
232 | { "ec8/64-pc", BRD_ECH64PCI }, | |
233 | { "ec8/64-pci", BRD_ECH64PCI }, | |
234 | { "ech-pci", BRD_ECH64PCI }, | |
235 | { "echpci", BRD_ECH64PCI }, | |
236 | { "echpc", BRD_ECH64PCI }, | |
237 | { "27", BRD_ECH64PCI }, | |
238 | { "easyio-pc", BRD_EASYIOPCI }, | |
239 | { "easyio-pci", BRD_EASYIOPCI }, | |
240 | { "eio-pci", BRD_EASYIOPCI }, | |
241 | { "eiopci", BRD_EASYIOPCI }, | |
242 | { "28", BRD_EASYIOPCI }, | |
243 | }; | |
244 | ||
245 | /* | |
246 | * Define the module agruments. | |
247 | */ | |
1da177e4 LT |
248 | |
249 | module_param_array(board0, charp, &stl_nargs, 0); | |
250 | MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
251 | module_param_array(board1, charp, &stl_nargs, 0); | |
252 | MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
253 | module_param_array(board2, charp, &stl_nargs, 0); | |
254 | MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
255 | module_param_array(board3, charp, &stl_nargs, 0); | |
256 | MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]"); | |
257 | ||
258 | /*****************************************************************************/ | |
259 | ||
260 | /* | |
261 | * Hardware ID bits for the EasyIO and ECH boards. These defines apply | |
262 | * to the directly accessible io ports of these boards (not the uarts - | |
263 | * they are in cd1400.h and sc26198.h). | |
264 | */ | |
265 | #define EIO_8PORTRS 0x04 | |
266 | #define EIO_4PORTRS 0x05 | |
267 | #define EIO_8PORTDI 0x00 | |
268 | #define EIO_8PORTM 0x06 | |
269 | #define EIO_MK3 0x03 | |
270 | #define EIO_IDBITMASK 0x07 | |
271 | ||
272 | #define EIO_BRDMASK 0xf0 | |
273 | #define ID_BRD4 0x10 | |
274 | #define ID_BRD8 0x20 | |
275 | #define ID_BRD16 0x30 | |
276 | ||
277 | #define EIO_INTRPEND 0x08 | |
278 | #define EIO_INTEDGE 0x00 | |
279 | #define EIO_INTLEVEL 0x08 | |
280 | #define EIO_0WS 0x10 | |
281 | ||
282 | #define ECH_ID 0xa0 | |
283 | #define ECH_IDBITMASK 0xe0 | |
284 | #define ECH_BRDENABLE 0x08 | |
285 | #define ECH_BRDDISABLE 0x00 | |
286 | #define ECH_INTENABLE 0x01 | |
287 | #define ECH_INTDISABLE 0x00 | |
288 | #define ECH_INTLEVEL 0x02 | |
289 | #define ECH_INTEDGE 0x00 | |
290 | #define ECH_INTRPEND 0x01 | |
291 | #define ECH_BRDRESET 0x01 | |
292 | ||
293 | #define ECHMC_INTENABLE 0x01 | |
294 | #define ECHMC_BRDRESET 0x02 | |
295 | ||
296 | #define ECH_PNLSTATUS 2 | |
297 | #define ECH_PNL16PORT 0x20 | |
298 | #define ECH_PNLIDMASK 0x07 | |
299 | #define ECH_PNLXPID 0x40 | |
300 | #define ECH_PNLINTRPEND 0x80 | |
301 | ||
302 | #define ECH_ADDR2MASK 0x1e0 | |
303 | ||
304 | /* | |
305 | * Define the vector mapping bits for the programmable interrupt board | |
306 | * hardware. These bits encode the interrupt for the board to use - it | |
307 | * is software selectable (except the EIO-8M). | |
308 | */ | |
309 | static unsigned char stl_vecmap[] = { | |
310 | 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07, | |
311 | 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03 | |
312 | }; | |
313 | ||
b65b5b59 AC |
314 | /* |
315 | * Lock ordering is that you may not take stallion_lock holding | |
316 | * brd_lock. | |
317 | */ | |
318 | ||
319 | static spinlock_t brd_lock; /* Guard the board mapping */ | |
320 | static spinlock_t stallion_lock; /* Guard the tty driver */ | |
321 | ||
1da177e4 LT |
322 | /* |
323 | * Set up enable and disable macros for the ECH boards. They require | |
324 | * the secondary io address space to be activated and deactivated. | |
325 | * This way all ECH boards can share their secondary io region. | |
326 | * If this is an ECH-PCI board then also need to set the page pointer | |
327 | * to point to the correct page. | |
328 | */ | |
329 | #define BRDENABLE(brdnr,pagenr) \ | |
330 | if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \ | |
331 | outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \ | |
332 | stl_brds[(brdnr)]->ioctrl); \ | |
333 | else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \ | |
334 | outb((pagenr), stl_brds[(brdnr)]->ioctrl); | |
335 | ||
336 | #define BRDDISABLE(brdnr) \ | |
337 | if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \ | |
338 | outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \ | |
339 | stl_brds[(brdnr)]->ioctrl); | |
340 | ||
341 | #define STL_CD1400MAXBAUD 230400 | |
342 | #define STL_SC26198MAXBAUD 460800 | |
343 | ||
344 | #define STL_BAUDBASE 115200 | |
345 | #define STL_CLOSEDELAY (5 * HZ / 10) | |
346 | ||
347 | /*****************************************************************************/ | |
348 | ||
1da177e4 LT |
349 | /* |
350 | * Define the Stallion PCI vendor and device IDs. | |
351 | */ | |
352 | #ifndef PCI_VENDOR_ID_STALLION | |
353 | #define PCI_VENDOR_ID_STALLION 0x124d | |
354 | #endif | |
355 | #ifndef PCI_DEVICE_ID_ECHPCI832 | |
356 | #define PCI_DEVICE_ID_ECHPCI832 0x0000 | |
357 | #endif | |
358 | #ifndef PCI_DEVICE_ID_ECHPCI864 | |
359 | #define PCI_DEVICE_ID_ECHPCI864 0x0002 | |
360 | #endif | |
361 | #ifndef PCI_DEVICE_ID_EIOPCI | |
362 | #define PCI_DEVICE_ID_EIOPCI 0x0003 | |
363 | #endif | |
364 | ||
365 | /* | |
366 | * Define structure to hold all Stallion PCI boards. | |
367 | */ | |
1da177e4 | 368 | |
b1b84fe0 JS |
369 | static struct pci_device_id stl_pcibrds[] = { |
370 | { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864), | |
371 | .driver_data = BRD_ECH64PCI }, | |
372 | { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI), | |
373 | .driver_data = BRD_EASYIOPCI }, | |
374 | { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832), | |
375 | .driver_data = BRD_ECHPCI }, | |
376 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410), | |
377 | .driver_data = BRD_ECHPCI }, | |
378 | { } | |
379 | }; | |
380 | MODULE_DEVICE_TABLE(pci, stl_pcibrds); | |
1da177e4 LT |
381 | |
382 | /*****************************************************************************/ | |
383 | ||
384 | /* | |
385 | * Define macros to extract a brd/port number from a minor number. | |
386 | */ | |
387 | #define MINOR2BRD(min) (((min) & 0xc0) >> 6) | |
388 | #define MINOR2PORT(min) ((min) & 0x3f) | |
389 | ||
390 | /* | |
391 | * Define a baud rate table that converts termios baud rate selector | |
392 | * into the actual baud rate value. All baud rate calculations are | |
393 | * based on the actual baud rate required. | |
394 | */ | |
395 | static unsigned int stl_baudrates[] = { | |
396 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, | |
397 | 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 | |
398 | }; | |
399 | ||
1da177e4 LT |
400 | /*****************************************************************************/ |
401 | ||
402 | /* | |
403 | * Declare all those functions in this driver! | |
404 | */ | |
405 | ||
1da177e4 | 406 | static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg); |
ca7ed0f2 | 407 | static int stl_brdinit(struct stlbrd *brdp); |
ca7ed0f2 JS |
408 | static int stl_getportstats(struct stlport *portp, comstats_t __user *cp); |
409 | static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp); | |
ca7ed0f2 | 410 | static int stl_waitcarrier(struct stlport *portp, struct file *filp); |
1da177e4 | 411 | |
1da177e4 LT |
412 | /* |
413 | * CD1400 uart specific handling functions. | |
414 | */ | |
ca7ed0f2 JS |
415 | static void stl_cd1400setreg(struct stlport *portp, int regnr, int value); |
416 | static int stl_cd1400getreg(struct stlport *portp, int regnr); | |
417 | static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value); | |
418 | static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp); | |
419 | static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); | |
606d099c | 420 | static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp); |
ca7ed0f2 JS |
421 | static int stl_cd1400getsignals(struct stlport *portp); |
422 | static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts); | |
423 | static void stl_cd1400ccrwait(struct stlport *portp); | |
424 | static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx); | |
425 | static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx); | |
426 | static void stl_cd1400disableintrs(struct stlport *portp); | |
427 | static void stl_cd1400sendbreak(struct stlport *portp, int len); | |
428 | static void stl_cd1400flowctrl(struct stlport *portp, int state); | |
429 | static void stl_cd1400sendflow(struct stlport *portp, int state); | |
430 | static void stl_cd1400flush(struct stlport *portp); | |
431 | static int stl_cd1400datastate(struct stlport *portp); | |
432 | static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase); | |
433 | static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase); | |
434 | static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr); | |
435 | static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr); | |
436 | static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr); | |
437 | ||
438 | static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr); | |
1da177e4 LT |
439 | |
440 | /* | |
441 | * SC26198 uart specific handling functions. | |
442 | */ | |
ca7ed0f2 JS |
443 | static void stl_sc26198setreg(struct stlport *portp, int regnr, int value); |
444 | static int stl_sc26198getreg(struct stlport *portp, int regnr); | |
445 | static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value); | |
446 | static int stl_sc26198getglobreg(struct stlport *portp, int regnr); | |
447 | static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp); | |
448 | static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); | |
606d099c | 449 | static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp); |
ca7ed0f2 JS |
450 | static int stl_sc26198getsignals(struct stlport *portp); |
451 | static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts); | |
452 | static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx); | |
453 | static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx); | |
454 | static void stl_sc26198disableintrs(struct stlport *portp); | |
455 | static void stl_sc26198sendbreak(struct stlport *portp, int len); | |
456 | static void stl_sc26198flowctrl(struct stlport *portp, int state); | |
457 | static void stl_sc26198sendflow(struct stlport *portp, int state); | |
458 | static void stl_sc26198flush(struct stlport *portp); | |
459 | static int stl_sc26198datastate(struct stlport *portp); | |
460 | static void stl_sc26198wait(struct stlport *portp); | |
461 | static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty); | |
462 | static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase); | |
463 | static void stl_sc26198txisr(struct stlport *port); | |
464 | static void stl_sc26198rxisr(struct stlport *port, unsigned int iack); | |
465 | static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch); | |
466 | static void stl_sc26198rxbadchars(struct stlport *portp); | |
467 | static void stl_sc26198otherisr(struct stlport *port, unsigned int iack); | |
1da177e4 LT |
468 | |
469 | /*****************************************************************************/ | |
470 | ||
471 | /* | |
472 | * Generic UART support structure. | |
473 | */ | |
474 | typedef struct uart { | |
ca7ed0f2 JS |
475 | int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp); |
476 | void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp); | |
606d099c | 477 | void (*setport)(struct stlport *portp, struct ktermios *tiosp); |
ca7ed0f2 JS |
478 | int (*getsignals)(struct stlport *portp); |
479 | void (*setsignals)(struct stlport *portp, int dtr, int rts); | |
480 | void (*enablerxtx)(struct stlport *portp, int rx, int tx); | |
481 | void (*startrxtx)(struct stlport *portp, int rx, int tx); | |
482 | void (*disableintrs)(struct stlport *portp); | |
483 | void (*sendbreak)(struct stlport *portp, int len); | |
484 | void (*flowctrl)(struct stlport *portp, int state); | |
485 | void (*sendflow)(struct stlport *portp, int state); | |
486 | void (*flush)(struct stlport *portp); | |
487 | int (*datastate)(struct stlport *portp); | |
488 | void (*intr)(struct stlpanel *panelp, unsigned int iobase); | |
1da177e4 LT |
489 | } uart_t; |
490 | ||
491 | /* | |
492 | * Define some macros to make calling these functions nice and clean. | |
493 | */ | |
494 | #define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit) | |
495 | #define stl_portinit (* ((uart_t *) portp->uartp)->portinit) | |
496 | #define stl_setport (* ((uart_t *) portp->uartp)->setport) | |
497 | #define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals) | |
498 | #define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals) | |
499 | #define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx) | |
500 | #define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx) | |
501 | #define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs) | |
502 | #define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak) | |
503 | #define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl) | |
504 | #define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow) | |
505 | #define stl_flush (* ((uart_t *) portp->uartp)->flush) | |
506 | #define stl_datastate (* ((uart_t *) portp->uartp)->datastate) | |
507 | ||
508 | /*****************************************************************************/ | |
509 | ||
510 | /* | |
511 | * CD1400 UART specific data initialization. | |
512 | */ | |
513 | static uart_t stl_cd1400uart = { | |
514 | stl_cd1400panelinit, | |
515 | stl_cd1400portinit, | |
516 | stl_cd1400setport, | |
517 | stl_cd1400getsignals, | |
518 | stl_cd1400setsignals, | |
519 | stl_cd1400enablerxtx, | |
520 | stl_cd1400startrxtx, | |
521 | stl_cd1400disableintrs, | |
522 | stl_cd1400sendbreak, | |
523 | stl_cd1400flowctrl, | |
524 | stl_cd1400sendflow, | |
525 | stl_cd1400flush, | |
526 | stl_cd1400datastate, | |
527 | stl_cd1400eiointr | |
528 | }; | |
529 | ||
530 | /* | |
531 | * Define the offsets within the register bank of a cd1400 based panel. | |
532 | * These io address offsets are common to the EasyIO board as well. | |
533 | */ | |
534 | #define EREG_ADDR 0 | |
535 | #define EREG_DATA 4 | |
536 | #define EREG_RXACK 5 | |
537 | #define EREG_TXACK 6 | |
538 | #define EREG_MDACK 7 | |
539 | ||
540 | #define EREG_BANKSIZE 8 | |
541 | ||
542 | #define CD1400_CLK 25000000 | |
543 | #define CD1400_CLK8M 20000000 | |
544 | ||
545 | /* | |
546 | * Define the cd1400 baud rate clocks. These are used when calculating | |
547 | * what clock and divisor to use for the required baud rate. Also | |
548 | * define the maximum baud rate allowed, and the default base baud. | |
549 | */ | |
550 | static int stl_cd1400clkdivs[] = { | |
551 | CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4 | |
552 | }; | |
553 | ||
554 | /*****************************************************************************/ | |
555 | ||
556 | /* | |
557 | * SC26198 UART specific data initization. | |
558 | */ | |
559 | static uart_t stl_sc26198uart = { | |
560 | stl_sc26198panelinit, | |
561 | stl_sc26198portinit, | |
562 | stl_sc26198setport, | |
563 | stl_sc26198getsignals, | |
564 | stl_sc26198setsignals, | |
565 | stl_sc26198enablerxtx, | |
566 | stl_sc26198startrxtx, | |
567 | stl_sc26198disableintrs, | |
568 | stl_sc26198sendbreak, | |
569 | stl_sc26198flowctrl, | |
570 | stl_sc26198sendflow, | |
571 | stl_sc26198flush, | |
572 | stl_sc26198datastate, | |
573 | stl_sc26198intr | |
574 | }; | |
575 | ||
576 | /* | |
577 | * Define the offsets within the register bank of a sc26198 based panel. | |
578 | */ | |
579 | #define XP_DATA 0 | |
580 | #define XP_ADDR 1 | |
581 | #define XP_MODID 2 | |
582 | #define XP_STATUS 2 | |
583 | #define XP_IACK 3 | |
584 | ||
585 | #define XP_BANKSIZE 4 | |
586 | ||
587 | /* | |
588 | * Define the sc26198 baud rate table. Offsets within the table | |
589 | * represent the actual baud rate selector of sc26198 registers. | |
590 | */ | |
591 | static unsigned int sc26198_baudtable[] = { | |
592 | 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600, | |
593 | 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200, | |
594 | 230400, 460800, 921600 | |
595 | }; | |
596 | ||
fe971071 | 597 | #define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable) |
1da177e4 LT |
598 | |
599 | /*****************************************************************************/ | |
600 | ||
601 | /* | |
602 | * Define the driver info for a user level control device. Used mainly | |
603 | * to get at port stats - only not using the port device itself. | |
604 | */ | |
62322d25 | 605 | static const struct file_operations stl_fsiomem = { |
1da177e4 LT |
606 | .owner = THIS_MODULE, |
607 | .ioctl = stl_memioctl, | |
608 | }; | |
609 | ||
ca8eca68 | 610 | static struct class *stallion_class; |
1da177e4 | 611 | |
ccfea3c9 JS |
612 | static void stl_cd_change(struct stlport *portp) |
613 | { | |
614 | unsigned int oldsigs = portp->sigs; | |
615 | ||
616 | if (!portp->tty) | |
617 | return; | |
618 | ||
619 | portp->sigs = stl_getsignals(portp); | |
620 | ||
621 | if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0)) | |
622 | wake_up_interruptible(&portp->open_wait); | |
623 | ||
624 | if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0)) | |
625 | if (portp->flags & ASYNC_CHECK_CD) | |
626 | tty_hangup(portp->tty); | |
627 | } | |
628 | ||
1da177e4 LT |
629 | /* |
630 | * Check for any arguments passed in on the module load command line. | |
631 | */ | |
632 | ||
1da177e4 LT |
633 | /*****************************************************************************/ |
634 | ||
1da177e4 LT |
635 | /* |
636 | * Parse the supplied argument string, into the board conf struct. | |
637 | */ | |
638 | ||
40e82652 | 639 | static int __init stl_parsebrd(struct stlconf *confp, char **argp) |
1da177e4 LT |
640 | { |
641 | char *sp; | |
6b2c9457 | 642 | unsigned int i; |
1da177e4 | 643 | |
a0564e14 | 644 | pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp); |
1da177e4 | 645 | |
615e4a71 | 646 | if ((argp[0] == NULL) || (*argp[0] == 0)) |
014c2544 | 647 | return 0; |
1da177e4 | 648 | |
c62429d9 | 649 | for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++) |
843b568c | 650 | *sp = tolower(*sp); |
1da177e4 | 651 | |
c62429d9 | 652 | for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++) |
1da177e4 LT |
653 | if (strcmp(stl_brdstr[i].name, argp[0]) == 0) |
654 | break; | |
c62429d9 | 655 | |
fe971071 | 656 | if (i == ARRAY_SIZE(stl_brdstr)) { |
1da177e4 | 657 | printk("STALLION: unknown board name, %s?\n", argp[0]); |
fe971071 | 658 | return 0; |
1da177e4 LT |
659 | } |
660 | ||
661 | confp->brdtype = stl_brdstr[i].type; | |
662 | ||
663 | i = 1; | |
615e4a71 | 664 | if ((argp[i] != NULL) && (*argp[i] != 0)) |
843b568c | 665 | confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0); |
1da177e4 LT |
666 | i++; |
667 | if (confp->brdtype == BRD_ECH) { | |
615e4a71 | 668 | if ((argp[i] != NULL) && (*argp[i] != 0)) |
843b568c | 669 | confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0); |
1da177e4 LT |
670 | i++; |
671 | } | |
615e4a71 | 672 | if ((argp[i] != NULL) && (*argp[i] != 0)) |
843b568c | 673 | confp->irq = simple_strtoul(argp[i], NULL, 0); |
014c2544 | 674 | return 1; |
1da177e4 LT |
675 | } |
676 | ||
677 | /*****************************************************************************/ | |
678 | ||
1da177e4 LT |
679 | /* |
680 | * Allocate a new board structure. Fill out the basic info in it. | |
681 | */ | |
682 | ||
ca7ed0f2 | 683 | static struct stlbrd *stl_allocbrd(void) |
1da177e4 | 684 | { |
ca7ed0f2 | 685 | struct stlbrd *brdp; |
1da177e4 | 686 | |
ca7ed0f2 | 687 | brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL); |
b0b4ed72 | 688 | if (!brdp) { |
b65b5b59 | 689 | printk("STALLION: failed to allocate memory (size=%Zd)\n", |
ca7ed0f2 | 690 | sizeof(struct stlbrd)); |
b0b4ed72 | 691 | return NULL; |
1da177e4 LT |
692 | } |
693 | ||
1da177e4 | 694 | brdp->magic = STL_BOARDMAGIC; |
014c2544 | 695 | return brdp; |
1da177e4 LT |
696 | } |
697 | ||
698 | /*****************************************************************************/ | |
699 | ||
700 | static int stl_open(struct tty_struct *tty, struct file *filp) | |
701 | { | |
ca7ed0f2 JS |
702 | struct stlport *portp; |
703 | struct stlbrd *brdp; | |
6b2c9457 JS |
704 | unsigned int minordev, brdnr, panelnr; |
705 | int portnr, rc; | |
1da177e4 | 706 | |
a0564e14 | 707 | pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name); |
1da177e4 LT |
708 | |
709 | minordev = tty->index; | |
710 | brdnr = MINOR2BRD(minordev); | |
711 | if (brdnr >= stl_nrbrds) | |
014c2544 | 712 | return -ENODEV; |
1da177e4 | 713 | brdp = stl_brds[brdnr]; |
615e4a71 | 714 | if (brdp == NULL) |
014c2544 | 715 | return -ENODEV; |
1da177e4 | 716 | minordev = MINOR2PORT(minordev); |
c62429d9 | 717 | for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) { |
615e4a71 | 718 | if (brdp->panels[panelnr] == NULL) |
1da177e4 LT |
719 | break; |
720 | if (minordev < brdp->panels[panelnr]->nrports) { | |
721 | portnr = minordev; | |
722 | break; | |
723 | } | |
724 | minordev -= brdp->panels[panelnr]->nrports; | |
725 | } | |
726 | if (portnr < 0) | |
014c2544 | 727 | return -ENODEV; |
1da177e4 LT |
728 | |
729 | portp = brdp->panels[panelnr]->ports[portnr]; | |
615e4a71 | 730 | if (portp == NULL) |
014c2544 | 731 | return -ENODEV; |
1da177e4 LT |
732 | |
733 | /* | |
734 | * On the first open of the device setup the port hardware, and | |
735 | * initialize the per port data structure. | |
736 | */ | |
737 | portp->tty = tty; | |
738 | tty->driver_data = portp; | |
739 | portp->refcount++; | |
740 | ||
741 | if ((portp->flags & ASYNC_INITIALIZED) == 0) { | |
b0b4ed72 TK |
742 | if (!portp->tx.buf) { |
743 | portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL); | |
744 | if (!portp->tx.buf) | |
014c2544 | 745 | return -ENOMEM; |
1da177e4 LT |
746 | portp->tx.head = portp->tx.buf; |
747 | portp->tx.tail = portp->tx.buf; | |
748 | } | |
749 | stl_setport(portp, tty->termios); | |
750 | portp->sigs = stl_getsignals(portp); | |
751 | stl_setsignals(portp, 1, 1); | |
752 | stl_enablerxtx(portp, 1, 1); | |
753 | stl_startrxtx(portp, 1, 0); | |
754 | clear_bit(TTY_IO_ERROR, &tty->flags); | |
755 | portp->flags |= ASYNC_INITIALIZED; | |
756 | } | |
757 | ||
758 | /* | |
759 | * Check if this port is in the middle of closing. If so then wait | |
760 | * until it is closed then return error status, based on flag settings. | |
761 | * The sleep here does not need interrupt protection since the wakeup | |
762 | * for it is done with the same context. | |
763 | */ | |
764 | if (portp->flags & ASYNC_CLOSING) { | |
765 | interruptible_sleep_on(&portp->close_wait); | |
766 | if (portp->flags & ASYNC_HUP_NOTIFY) | |
014c2544 JJ |
767 | return -EAGAIN; |
768 | return -ERESTARTSYS; | |
1da177e4 LT |
769 | } |
770 | ||
771 | /* | |
772 | * Based on type of open being done check if it can overlap with any | |
773 | * previous opens still in effect. If we are a normal serial device | |
774 | * then also we might have to wait for carrier. | |
775 | */ | |
c62429d9 | 776 | if (!(filp->f_flags & O_NONBLOCK)) |
1da177e4 | 777 | if ((rc = stl_waitcarrier(portp, filp)) != 0) |
014c2544 | 778 | return rc; |
c62429d9 | 779 | |
1da177e4 LT |
780 | portp->flags |= ASYNC_NORMAL_ACTIVE; |
781 | ||
014c2544 | 782 | return 0; |
1da177e4 LT |
783 | } |
784 | ||
785 | /*****************************************************************************/ | |
786 | ||
787 | /* | |
788 | * Possibly need to wait for carrier (DCD signal) to come high. Say | |
789 | * maybe because if we are clocal then we don't need to wait... | |
790 | */ | |
791 | ||
ca7ed0f2 | 792 | static int stl_waitcarrier(struct stlport *portp, struct file *filp) |
1da177e4 LT |
793 | { |
794 | unsigned long flags; | |
795 | int rc, doclocal; | |
796 | ||
a0564e14 | 797 | pr_debug("stl_waitcarrier(portp=%p,filp=%p)\n", portp, filp); |
1da177e4 LT |
798 | |
799 | rc = 0; | |
800 | doclocal = 0; | |
801 | ||
b65b5b59 AC |
802 | spin_lock_irqsave(&stallion_lock, flags); |
803 | ||
1da177e4 LT |
804 | if (portp->tty->termios->c_cflag & CLOCAL) |
805 | doclocal++; | |
806 | ||
1da177e4 LT |
807 | portp->openwaitcnt++; |
808 | if (! tty_hung_up_p(filp)) | |
809 | portp->refcount--; | |
810 | ||
811 | for (;;) { | |
b65b5b59 | 812 | /* Takes brd_lock internally */ |
1da177e4 LT |
813 | stl_setsignals(portp, 1, 1); |
814 | if (tty_hung_up_p(filp) || | |
815 | ((portp->flags & ASYNC_INITIALIZED) == 0)) { | |
816 | if (portp->flags & ASYNC_HUP_NOTIFY) | |
817 | rc = -EBUSY; | |
818 | else | |
819 | rc = -ERESTARTSYS; | |
820 | break; | |
821 | } | |
822 | if (((portp->flags & ASYNC_CLOSING) == 0) && | |
c62429d9 | 823 | (doclocal || (portp->sigs & TIOCM_CD))) |
1da177e4 | 824 | break; |
1da177e4 LT |
825 | if (signal_pending(current)) { |
826 | rc = -ERESTARTSYS; | |
827 | break; | |
828 | } | |
b65b5b59 | 829 | /* FIXME */ |
1da177e4 LT |
830 | interruptible_sleep_on(&portp->open_wait); |
831 | } | |
832 | ||
833 | if (! tty_hung_up_p(filp)) | |
834 | portp->refcount++; | |
835 | portp->openwaitcnt--; | |
b65b5b59 | 836 | spin_unlock_irqrestore(&stallion_lock, flags); |
1da177e4 | 837 | |
014c2544 | 838 | return rc; |
1da177e4 LT |
839 | } |
840 | ||
841 | /*****************************************************************************/ | |
842 | ||
96b066b8 JS |
843 | static void stl_flushbuffer(struct tty_struct *tty) |
844 | { | |
845 | struct stlport *portp; | |
846 | ||
847 | pr_debug("stl_flushbuffer(tty=%p)\n", tty); | |
848 | ||
849 | if (tty == NULL) | |
850 | return; | |
851 | portp = tty->driver_data; | |
852 | if (portp == NULL) | |
853 | return; | |
854 | ||
855 | stl_flush(portp); | |
856 | tty_wakeup(tty); | |
857 | } | |
858 | ||
859 | /*****************************************************************************/ | |
860 | ||
861 | static void stl_waituntilsent(struct tty_struct *tty, int timeout) | |
862 | { | |
863 | struct stlport *portp; | |
864 | unsigned long tend; | |
865 | ||
866 | pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout); | |
867 | ||
868 | if (tty == NULL) | |
869 | return; | |
870 | portp = tty->driver_data; | |
871 | if (portp == NULL) | |
872 | return; | |
873 | ||
874 | if (timeout == 0) | |
875 | timeout = HZ; | |
876 | tend = jiffies + timeout; | |
877 | ||
878 | while (stl_datastate(portp)) { | |
879 | if (signal_pending(current)) | |
880 | break; | |
881 | msleep_interruptible(20); | |
882 | if (time_after_eq(jiffies, tend)) | |
883 | break; | |
884 | } | |
885 | } | |
886 | ||
887 | /*****************************************************************************/ | |
888 | ||
1da177e4 LT |
889 | static void stl_close(struct tty_struct *tty, struct file *filp) |
890 | { | |
ca7ed0f2 | 891 | struct stlport *portp; |
1da177e4 LT |
892 | unsigned long flags; |
893 | ||
a0564e14 | 894 | pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp); |
1da177e4 LT |
895 | |
896 | portp = tty->driver_data; | |
615e4a71 | 897 | if (portp == NULL) |
1da177e4 LT |
898 | return; |
899 | ||
b65b5b59 | 900 | spin_lock_irqsave(&stallion_lock, flags); |
1da177e4 | 901 | if (tty_hung_up_p(filp)) { |
b65b5b59 | 902 | spin_unlock_irqrestore(&stallion_lock, flags); |
1da177e4 LT |
903 | return; |
904 | } | |
905 | if ((tty->count == 1) && (portp->refcount != 1)) | |
906 | portp->refcount = 1; | |
907 | if (portp->refcount-- > 1) { | |
b65b5b59 | 908 | spin_unlock_irqrestore(&stallion_lock, flags); |
1da177e4 LT |
909 | return; |
910 | } | |
911 | ||
912 | portp->refcount = 0; | |
913 | portp->flags |= ASYNC_CLOSING; | |
914 | ||
915 | /* | |
916 | * May want to wait for any data to drain before closing. The BUSY | |
917 | * flag keeps track of whether we are still sending or not - it is | |
918 | * very accurate for the cd1400, not quite so for the sc26198. | |
919 | * (The sc26198 has no "end-of-data" interrupt only empty FIFO) | |
920 | */ | |
921 | tty->closing = 1; | |
b65b5b59 AC |
922 | |
923 | spin_unlock_irqrestore(&stallion_lock, flags); | |
924 | ||
1da177e4 LT |
925 | if (portp->closing_wait != ASYNC_CLOSING_WAIT_NONE) |
926 | tty_wait_until_sent(tty, portp->closing_wait); | |
927 | stl_waituntilsent(tty, (HZ / 2)); | |
928 | ||
b65b5b59 AC |
929 | |
930 | spin_lock_irqsave(&stallion_lock, flags); | |
1da177e4 | 931 | portp->flags &= ~ASYNC_INITIALIZED; |
b65b5b59 AC |
932 | spin_unlock_irqrestore(&stallion_lock, flags); |
933 | ||
1da177e4 LT |
934 | stl_disableintrs(portp); |
935 | if (tty->termios->c_cflag & HUPCL) | |
936 | stl_setsignals(portp, 0, 0); | |
937 | stl_enablerxtx(portp, 0, 0); | |
938 | stl_flushbuffer(tty); | |
939 | portp->istate = 0; | |
615e4a71 | 940 | if (portp->tx.buf != NULL) { |
1da177e4 | 941 | kfree(portp->tx.buf); |
615e4a71 JS |
942 | portp->tx.buf = NULL; |
943 | portp->tx.head = NULL; | |
944 | portp->tx.tail = NULL; | |
1da177e4 LT |
945 | } |
946 | set_bit(TTY_IO_ERROR, &tty->flags); | |
947 | tty_ldisc_flush(tty); | |
948 | ||
949 | tty->closing = 0; | |
615e4a71 | 950 | portp->tty = NULL; |
1da177e4 LT |
951 | |
952 | if (portp->openwaitcnt) { | |
953 | if (portp->close_delay) | |
954 | msleep_interruptible(jiffies_to_msecs(portp->close_delay)); | |
955 | wake_up_interruptible(&portp->open_wait); | |
956 | } | |
957 | ||
958 | portp->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); | |
959 | wake_up_interruptible(&portp->close_wait); | |
1da177e4 LT |
960 | } |
961 | ||
962 | /*****************************************************************************/ | |
963 | ||
964 | /* | |
965 | * Write routine. Take data and stuff it in to the TX ring queue. | |
966 | * If transmit interrupts are not running then start them. | |
967 | */ | |
968 | ||
969 | static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
970 | { | |
ca7ed0f2 | 971 | struct stlport *portp; |
1da177e4 LT |
972 | unsigned int len, stlen; |
973 | unsigned char *chbuf; | |
974 | char *head, *tail; | |
975 | ||
a0564e14 | 976 | pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count); |
1da177e4 | 977 | |
1da177e4 | 978 | portp = tty->driver_data; |
615e4a71 | 979 | if (portp == NULL) |
014c2544 | 980 | return 0; |
615e4a71 | 981 | if (portp->tx.buf == NULL) |
014c2544 | 982 | return 0; |
1da177e4 LT |
983 | |
984 | /* | |
985 | * If copying direct from user space we must cater for page faults, | |
986 | * causing us to "sleep" here for a while. To handle this copy in all | |
987 | * the data we need now, into a local buffer. Then when we got it all | |
988 | * copy it into the TX buffer. | |
989 | */ | |
990 | chbuf = (unsigned char *) buf; | |
991 | ||
992 | head = portp->tx.head; | |
993 | tail = portp->tx.tail; | |
994 | if (head >= tail) { | |
995 | len = STL_TXBUFSIZE - (head - tail) - 1; | |
996 | stlen = STL_TXBUFSIZE - (head - portp->tx.buf); | |
997 | } else { | |
998 | len = tail - head - 1; | |
999 | stlen = len; | |
1000 | } | |
1001 | ||
843b568c | 1002 | len = min(len, (unsigned int)count); |
1da177e4 LT |
1003 | count = 0; |
1004 | while (len > 0) { | |
843b568c | 1005 | stlen = min(len, stlen); |
1da177e4 LT |
1006 | memcpy(head, chbuf, stlen); |
1007 | len -= stlen; | |
1008 | chbuf += stlen; | |
1009 | count += stlen; | |
1010 | head += stlen; | |
1011 | if (head >= (portp->tx.buf + STL_TXBUFSIZE)) { | |
1012 | head = portp->tx.buf; | |
1013 | stlen = tail - head; | |
1014 | } | |
1015 | } | |
1016 | portp->tx.head = head; | |
1017 | ||
1018 | clear_bit(ASYI_TXLOW, &portp->istate); | |
1019 | stl_startrxtx(portp, -1, 1); | |
1020 | ||
014c2544 | 1021 | return count; |
1da177e4 LT |
1022 | } |
1023 | ||
1024 | /*****************************************************************************/ | |
1025 | ||
1026 | static void stl_putchar(struct tty_struct *tty, unsigned char ch) | |
1027 | { | |
ca7ed0f2 | 1028 | struct stlport *portp; |
1da177e4 LT |
1029 | unsigned int len; |
1030 | char *head, *tail; | |
1031 | ||
a0564e14 | 1032 | pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch); |
1da177e4 | 1033 | |
615e4a71 | 1034 | if (tty == NULL) |
1da177e4 LT |
1035 | return; |
1036 | portp = tty->driver_data; | |
615e4a71 | 1037 | if (portp == NULL) |
1da177e4 | 1038 | return; |
615e4a71 | 1039 | if (portp->tx.buf == NULL) |
1da177e4 LT |
1040 | return; |
1041 | ||
1042 | head = portp->tx.head; | |
1043 | tail = portp->tx.tail; | |
1044 | ||
1045 | len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head); | |
1046 | len--; | |
1047 | ||
1048 | if (len > 0) { | |
1049 | *head++ = ch; | |
1050 | if (head >= (portp->tx.buf + STL_TXBUFSIZE)) | |
1051 | head = portp->tx.buf; | |
1052 | } | |
1053 | portp->tx.head = head; | |
1054 | } | |
1055 | ||
1056 | /*****************************************************************************/ | |
1057 | ||
1058 | /* | |
1059 | * If there are any characters in the buffer then make sure that TX | |
1060 | * interrupts are on and get'em out. Normally used after the putchar | |
1061 | * routine has been called. | |
1062 | */ | |
1063 | ||
1064 | static void stl_flushchars(struct tty_struct *tty) | |
1065 | { | |
ca7ed0f2 | 1066 | struct stlport *portp; |
1da177e4 | 1067 | |
a0564e14 | 1068 | pr_debug("stl_flushchars(tty=%p)\n", tty); |
1da177e4 | 1069 | |
615e4a71 | 1070 | if (tty == NULL) |
1da177e4 LT |
1071 | return; |
1072 | portp = tty->driver_data; | |
615e4a71 | 1073 | if (portp == NULL) |
1da177e4 | 1074 | return; |
615e4a71 | 1075 | if (portp->tx.buf == NULL) |
1da177e4 LT |
1076 | return; |
1077 | ||
1da177e4 LT |
1078 | stl_startrxtx(portp, -1, 1); |
1079 | } | |
1080 | ||
1081 | /*****************************************************************************/ | |
1082 | ||
1083 | static int stl_writeroom(struct tty_struct *tty) | |
1084 | { | |
ca7ed0f2 | 1085 | struct stlport *portp; |
1da177e4 LT |
1086 | char *head, *tail; |
1087 | ||
a0564e14 | 1088 | pr_debug("stl_writeroom(tty=%p)\n", tty); |
1da177e4 | 1089 | |
615e4a71 | 1090 | if (tty == NULL) |
014c2544 | 1091 | return 0; |
1da177e4 | 1092 | portp = tty->driver_data; |
615e4a71 | 1093 | if (portp == NULL) |
014c2544 | 1094 | return 0; |
615e4a71 | 1095 | if (portp->tx.buf == NULL) |
014c2544 | 1096 | return 0; |
1da177e4 LT |
1097 | |
1098 | head = portp->tx.head; | |
1099 | tail = portp->tx.tail; | |
c62429d9 | 1100 | return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1); |
1da177e4 LT |
1101 | } |
1102 | ||
1103 | /*****************************************************************************/ | |
1104 | ||
1105 | /* | |
1106 | * Return number of chars in the TX buffer. Normally we would just | |
1107 | * calculate the number of chars in the buffer and return that, but if | |
1108 | * the buffer is empty and TX interrupts are still on then we return | |
1109 | * that the buffer still has 1 char in it. This way whoever called us | |
1110 | * will not think that ALL chars have drained - since the UART still | |
1111 | * must have some chars in it (we are busy after all). | |
1112 | */ | |
1113 | ||
1114 | static int stl_charsinbuffer(struct tty_struct *tty) | |
1115 | { | |
ca7ed0f2 | 1116 | struct stlport *portp; |
1da177e4 LT |
1117 | unsigned int size; |
1118 | char *head, *tail; | |
1119 | ||
a0564e14 | 1120 | pr_debug("stl_charsinbuffer(tty=%p)\n", tty); |
1da177e4 | 1121 | |
615e4a71 | 1122 | if (tty == NULL) |
014c2544 | 1123 | return 0; |
1da177e4 | 1124 | portp = tty->driver_data; |
615e4a71 | 1125 | if (portp == NULL) |
014c2544 | 1126 | return 0; |
615e4a71 | 1127 | if (portp->tx.buf == NULL) |
014c2544 | 1128 | return 0; |
1da177e4 LT |
1129 | |
1130 | head = portp->tx.head; | |
1131 | tail = portp->tx.tail; | |
1132 | size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); | |
1133 | if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate)) | |
1134 | size = 1; | |
014c2544 | 1135 | return size; |
1da177e4 LT |
1136 | } |
1137 | ||
1138 | /*****************************************************************************/ | |
1139 | ||
1140 | /* | |
1141 | * Generate the serial struct info. | |
1142 | */ | |
1143 | ||
ca7ed0f2 | 1144 | static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp) |
1da177e4 LT |
1145 | { |
1146 | struct serial_struct sio; | |
ca7ed0f2 | 1147 | struct stlbrd *brdp; |
1da177e4 | 1148 | |
a0564e14 | 1149 | pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp); |
1da177e4 LT |
1150 | |
1151 | memset(&sio, 0, sizeof(struct serial_struct)); | |
1152 | sio.line = portp->portnr; | |
1153 | sio.port = portp->ioaddr; | |
1154 | sio.flags = portp->flags; | |
1155 | sio.baud_base = portp->baud_base; | |
1156 | sio.close_delay = portp->close_delay; | |
1157 | sio.closing_wait = portp->closing_wait; | |
1158 | sio.custom_divisor = portp->custom_divisor; | |
1159 | sio.hub6 = 0; | |
1160 | if (portp->uartp == &stl_cd1400uart) { | |
1161 | sio.type = PORT_CIRRUS; | |
1162 | sio.xmit_fifo_size = CD1400_TXFIFOSIZE; | |
1163 | } else { | |
1164 | sio.type = PORT_UNKNOWN; | |
1165 | sio.xmit_fifo_size = SC26198_TXFIFOSIZE; | |
1166 | } | |
1167 | ||
1168 | brdp = stl_brds[portp->brdnr]; | |
615e4a71 | 1169 | if (brdp != NULL) |
1da177e4 LT |
1170 | sio.irq = brdp->irq; |
1171 | ||
1172 | return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0; | |
1173 | } | |
1174 | ||
1175 | /*****************************************************************************/ | |
1176 | ||
1177 | /* | |
1178 | * Set port according to the serial struct info. | |
1179 | * At this point we do not do any auto-configure stuff, so we will | |
1180 | * just quietly ignore any requests to change irq, etc. | |
1181 | */ | |
1182 | ||
ca7ed0f2 | 1183 | static int stl_setserial(struct stlport *portp, struct serial_struct __user *sp) |
1da177e4 LT |
1184 | { |
1185 | struct serial_struct sio; | |
1186 | ||
a0564e14 | 1187 | pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp); |
1da177e4 LT |
1188 | |
1189 | if (copy_from_user(&sio, sp, sizeof(struct serial_struct))) | |
1190 | return -EFAULT; | |
1191 | if (!capable(CAP_SYS_ADMIN)) { | |
1192 | if ((sio.baud_base != portp->baud_base) || | |
1193 | (sio.close_delay != portp->close_delay) || | |
1194 | ((sio.flags & ~ASYNC_USR_MASK) != | |
1195 | (portp->flags & ~ASYNC_USR_MASK))) | |
014c2544 | 1196 | return -EPERM; |
1da177e4 LT |
1197 | } |
1198 | ||
1199 | portp->flags = (portp->flags & ~ASYNC_USR_MASK) | | |
1200 | (sio.flags & ASYNC_USR_MASK); | |
1201 | portp->baud_base = sio.baud_base; | |
1202 | portp->close_delay = sio.close_delay; | |
1203 | portp->closing_wait = sio.closing_wait; | |
1204 | portp->custom_divisor = sio.custom_divisor; | |
1205 | stl_setport(portp, portp->tty->termios); | |
014c2544 | 1206 | return 0; |
1da177e4 LT |
1207 | } |
1208 | ||
1209 | /*****************************************************************************/ | |
1210 | ||
1211 | static int stl_tiocmget(struct tty_struct *tty, struct file *file) | |
1212 | { | |
ca7ed0f2 | 1213 | struct stlport *portp; |
1da177e4 | 1214 | |
615e4a71 | 1215 | if (tty == NULL) |
014c2544 | 1216 | return -ENODEV; |
1da177e4 | 1217 | portp = tty->driver_data; |
615e4a71 | 1218 | if (portp == NULL) |
014c2544 | 1219 | return -ENODEV; |
1da177e4 | 1220 | if (tty->flags & (1 << TTY_IO_ERROR)) |
014c2544 | 1221 | return -EIO; |
1da177e4 LT |
1222 | |
1223 | return stl_getsignals(portp); | |
1224 | } | |
1225 | ||
1226 | static int stl_tiocmset(struct tty_struct *tty, struct file *file, | |
1227 | unsigned int set, unsigned int clear) | |
1228 | { | |
ca7ed0f2 | 1229 | struct stlport *portp; |
1da177e4 LT |
1230 | int rts = -1, dtr = -1; |
1231 | ||
615e4a71 | 1232 | if (tty == NULL) |
014c2544 | 1233 | return -ENODEV; |
1da177e4 | 1234 | portp = tty->driver_data; |
615e4a71 | 1235 | if (portp == NULL) |
014c2544 | 1236 | return -ENODEV; |
1da177e4 | 1237 | if (tty->flags & (1 << TTY_IO_ERROR)) |
014c2544 | 1238 | return -EIO; |
1da177e4 LT |
1239 | |
1240 | if (set & TIOCM_RTS) | |
1241 | rts = 1; | |
1242 | if (set & TIOCM_DTR) | |
1243 | dtr = 1; | |
1244 | if (clear & TIOCM_RTS) | |
1245 | rts = 0; | |
1246 | if (clear & TIOCM_DTR) | |
1247 | dtr = 0; | |
1248 | ||
1249 | stl_setsignals(portp, dtr, rts); | |
1250 | return 0; | |
1251 | } | |
1252 | ||
1253 | static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg) | |
1254 | { | |
ca7ed0f2 | 1255 | struct stlport *portp; |
1da177e4 LT |
1256 | unsigned int ival; |
1257 | int rc; | |
1258 | void __user *argp = (void __user *)arg; | |
1259 | ||
a0564e14 JS |
1260 | pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd, |
1261 | arg); | |
1da177e4 | 1262 | |
615e4a71 | 1263 | if (tty == NULL) |
014c2544 | 1264 | return -ENODEV; |
1da177e4 | 1265 | portp = tty->driver_data; |
615e4a71 | 1266 | if (portp == NULL) |
014c2544 | 1267 | return -ENODEV; |
1da177e4 LT |
1268 | |
1269 | if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && | |
c62429d9 | 1270 | (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS)) |
1da177e4 | 1271 | if (tty->flags & (1 << TTY_IO_ERROR)) |
014c2544 | 1272 | return -EIO; |
1da177e4 LT |
1273 | |
1274 | rc = 0; | |
1275 | ||
1276 | switch (cmd) { | |
1277 | case TIOCGSOFTCAR: | |
1278 | rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0), | |
1279 | (unsigned __user *) argp); | |
1280 | break; | |
1281 | case TIOCSSOFTCAR: | |
1282 | if (get_user(ival, (unsigned int __user *) arg)) | |
1283 | return -EFAULT; | |
1284 | tty->termios->c_cflag = | |
1285 | (tty->termios->c_cflag & ~CLOCAL) | | |
1286 | (ival ? CLOCAL : 0); | |
1287 | break; | |
1288 | case TIOCGSERIAL: | |
1289 | rc = stl_getserial(portp, argp); | |
1290 | break; | |
1291 | case TIOCSSERIAL: | |
1292 | rc = stl_setserial(portp, argp); | |
1293 | break; | |
1294 | case COM_GETPORTSTATS: | |
1295 | rc = stl_getportstats(portp, argp); | |
1296 | break; | |
1297 | case COM_CLRPORTSTATS: | |
1298 | rc = stl_clrportstats(portp, argp); | |
1299 | break; | |
1300 | case TIOCSERCONFIG: | |
1301 | case TIOCSERGWILD: | |
1302 | case TIOCSERSWILD: | |
1303 | case TIOCSERGETLSR: | |
1304 | case TIOCSERGSTRUCT: | |
1305 | case TIOCSERGETMULTI: | |
1306 | case TIOCSERSETMULTI: | |
1307 | default: | |
1308 | rc = -ENOIOCTLCMD; | |
1309 | break; | |
1310 | } | |
1311 | ||
014c2544 | 1312 | return rc; |
1da177e4 LT |
1313 | } |
1314 | ||
1315 | /*****************************************************************************/ | |
1316 | ||
96b066b8 JS |
1317 | /* |
1318 | * Start the transmitter again. Just turn TX interrupts back on. | |
1319 | */ | |
1320 | ||
1321 | static void stl_start(struct tty_struct *tty) | |
1322 | { | |
1323 | struct stlport *portp; | |
1324 | ||
1325 | pr_debug("stl_start(tty=%p)\n", tty); | |
1326 | ||
1327 | if (tty == NULL) | |
1328 | return; | |
1329 | portp = tty->driver_data; | |
1330 | if (portp == NULL) | |
1331 | return; | |
1332 | stl_startrxtx(portp, -1, 1); | |
1333 | } | |
1334 | ||
1335 | /*****************************************************************************/ | |
1336 | ||
606d099c | 1337 | static void stl_settermios(struct tty_struct *tty, struct ktermios *old) |
1da177e4 | 1338 | { |
ca7ed0f2 | 1339 | struct stlport *portp; |
606d099c | 1340 | struct ktermios *tiosp; |
1da177e4 | 1341 | |
a0564e14 | 1342 | pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old); |
1da177e4 | 1343 | |
615e4a71 | 1344 | if (tty == NULL) |
1da177e4 LT |
1345 | return; |
1346 | portp = tty->driver_data; | |
615e4a71 | 1347 | if (portp == NULL) |
1da177e4 LT |
1348 | return; |
1349 | ||
1350 | tiosp = tty->termios; | |
1351 | if ((tiosp->c_cflag == old->c_cflag) && | |
1352 | (tiosp->c_iflag == old->c_iflag)) | |
1353 | return; | |
1354 | ||
1355 | stl_setport(portp, tiosp); | |
1356 | stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0), | |
1357 | -1); | |
1358 | if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) { | |
1359 | tty->hw_stopped = 0; | |
1360 | stl_start(tty); | |
1361 | } | |
1362 | if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL)) | |
1363 | wake_up_interruptible(&portp->open_wait); | |
1364 | } | |
1365 | ||
1366 | /*****************************************************************************/ | |
1367 | ||
1368 | /* | |
1369 | * Attempt to flow control who ever is sending us data. Based on termios | |
1370 | * settings use software or/and hardware flow control. | |
1371 | */ | |
1372 | ||
1373 | static void stl_throttle(struct tty_struct *tty) | |
1374 | { | |
ca7ed0f2 | 1375 | struct stlport *portp; |
1da177e4 | 1376 | |
a0564e14 | 1377 | pr_debug("stl_throttle(tty=%p)\n", tty); |
1da177e4 | 1378 | |
615e4a71 | 1379 | if (tty == NULL) |
1da177e4 LT |
1380 | return; |
1381 | portp = tty->driver_data; | |
615e4a71 | 1382 | if (portp == NULL) |
1da177e4 LT |
1383 | return; |
1384 | stl_flowctrl(portp, 0); | |
1385 | } | |
1386 | ||
1387 | /*****************************************************************************/ | |
1388 | ||
1389 | /* | |
1390 | * Unflow control the device sending us data... | |
1391 | */ | |
1392 | ||
1393 | static void stl_unthrottle(struct tty_struct *tty) | |
1394 | { | |
ca7ed0f2 | 1395 | struct stlport *portp; |
1da177e4 | 1396 | |
a0564e14 | 1397 | pr_debug("stl_unthrottle(tty=%p)\n", tty); |
1da177e4 | 1398 | |
615e4a71 | 1399 | if (tty == NULL) |
1da177e4 LT |
1400 | return; |
1401 | portp = tty->driver_data; | |
615e4a71 | 1402 | if (portp == NULL) |
1da177e4 LT |
1403 | return; |
1404 | stl_flowctrl(portp, 1); | |
1405 | } | |
1406 | ||
1407 | /*****************************************************************************/ | |
1408 | ||
1409 | /* | |
1410 | * Stop the transmitter. Basically to do this we will just turn TX | |
1411 | * interrupts off. | |
1412 | */ | |
1413 | ||
1414 | static void stl_stop(struct tty_struct *tty) | |
1415 | { | |
ca7ed0f2 | 1416 | struct stlport *portp; |
1da177e4 | 1417 | |
a0564e14 | 1418 | pr_debug("stl_stop(tty=%p)\n", tty); |
1da177e4 | 1419 | |
615e4a71 | 1420 | if (tty == NULL) |
1da177e4 LT |
1421 | return; |
1422 | portp = tty->driver_data; | |
615e4a71 | 1423 | if (portp == NULL) |
1da177e4 LT |
1424 | return; |
1425 | stl_startrxtx(portp, -1, 0); | |
1426 | } | |
1427 | ||
1428 | /*****************************************************************************/ | |
1429 | ||
1da177e4 LT |
1430 | /* |
1431 | * Hangup this port. This is pretty much like closing the port, only | |
1432 | * a little more brutal. No waiting for data to drain. Shutdown the | |
1433 | * port and maybe drop signals. | |
1434 | */ | |
1435 | ||
1436 | static void stl_hangup(struct tty_struct *tty) | |
1437 | { | |
ca7ed0f2 | 1438 | struct stlport *portp; |
1da177e4 | 1439 | |
a0564e14 | 1440 | pr_debug("stl_hangup(tty=%p)\n", tty); |
1da177e4 | 1441 | |
615e4a71 | 1442 | if (tty == NULL) |
1da177e4 LT |
1443 | return; |
1444 | portp = tty->driver_data; | |
615e4a71 | 1445 | if (portp == NULL) |
1da177e4 LT |
1446 | return; |
1447 | ||
1448 | portp->flags &= ~ASYNC_INITIALIZED; | |
1449 | stl_disableintrs(portp); | |
1450 | if (tty->termios->c_cflag & HUPCL) | |
1451 | stl_setsignals(portp, 0, 0); | |
1452 | stl_enablerxtx(portp, 0, 0); | |
1453 | stl_flushbuffer(tty); | |
1454 | portp->istate = 0; | |
1455 | set_bit(TTY_IO_ERROR, &tty->flags); | |
615e4a71 | 1456 | if (portp->tx.buf != NULL) { |
1da177e4 | 1457 | kfree(portp->tx.buf); |
615e4a71 JS |
1458 | portp->tx.buf = NULL; |
1459 | portp->tx.head = NULL; | |
1460 | portp->tx.tail = NULL; | |
1da177e4 | 1461 | } |
615e4a71 | 1462 | portp->tty = NULL; |
1da177e4 LT |
1463 | portp->flags &= ~ASYNC_NORMAL_ACTIVE; |
1464 | portp->refcount = 0; | |
1465 | wake_up_interruptible(&portp->open_wait); | |
1466 | } | |
1467 | ||
1468 | /*****************************************************************************/ | |
1469 | ||
1da177e4 LT |
1470 | static void stl_breakctl(struct tty_struct *tty, int state) |
1471 | { | |
ca7ed0f2 | 1472 | struct stlport *portp; |
1da177e4 | 1473 | |
a0564e14 | 1474 | pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state); |
1da177e4 | 1475 | |
615e4a71 | 1476 | if (tty == NULL) |
1da177e4 LT |
1477 | return; |
1478 | portp = tty->driver_data; | |
615e4a71 | 1479 | if (portp == NULL) |
1da177e4 LT |
1480 | return; |
1481 | ||
1482 | stl_sendbreak(portp, ((state == -1) ? 1 : 2)); | |
1483 | } | |
1484 | ||
1485 | /*****************************************************************************/ | |
1486 | ||
1da177e4 LT |
1487 | static void stl_sendxchar(struct tty_struct *tty, char ch) |
1488 | { | |
ca7ed0f2 | 1489 | struct stlport *portp; |
1da177e4 | 1490 | |
a0564e14 | 1491 | pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch); |
1da177e4 | 1492 | |
615e4a71 | 1493 | if (tty == NULL) |
1da177e4 LT |
1494 | return; |
1495 | portp = tty->driver_data; | |
615e4a71 | 1496 | if (portp == NULL) |
1da177e4 LT |
1497 | return; |
1498 | ||
1499 | if (ch == STOP_CHAR(tty)) | |
1500 | stl_sendflow(portp, 0); | |
1501 | else if (ch == START_CHAR(tty)) | |
1502 | stl_sendflow(portp, 1); | |
1503 | else | |
1504 | stl_putchar(tty, ch); | |
1505 | } | |
1506 | ||
1507 | /*****************************************************************************/ | |
1508 | ||
1509 | #define MAXLINE 80 | |
1510 | ||
1511 | /* | |
1512 | * Format info for a specified port. The line is deliberately limited | |
1513 | * to 80 characters. (If it is too long it will be truncated, if too | |
1514 | * short then padded with spaces). | |
1515 | */ | |
1516 | ||
ca7ed0f2 | 1517 | static int stl_portinfo(struct stlport *portp, int portnr, char *pos) |
1da177e4 LT |
1518 | { |
1519 | char *sp; | |
1520 | int sigs, cnt; | |
1521 | ||
1522 | sp = pos; | |
1523 | sp += sprintf(sp, "%d: uart:%s tx:%d rx:%d", | |
1524 | portnr, (portp->hwid == 1) ? "SC26198" : "CD1400", | |
1525 | (int) portp->stats.txtotal, (int) portp->stats.rxtotal); | |
1526 | ||
1527 | if (portp->stats.rxframing) | |
1528 | sp += sprintf(sp, " fe:%d", (int) portp->stats.rxframing); | |
1529 | if (portp->stats.rxparity) | |
1530 | sp += sprintf(sp, " pe:%d", (int) portp->stats.rxparity); | |
1531 | if (portp->stats.rxbreaks) | |
1532 | sp += sprintf(sp, " brk:%d", (int) portp->stats.rxbreaks); | |
1533 | if (portp->stats.rxoverrun) | |
1534 | sp += sprintf(sp, " oe:%d", (int) portp->stats.rxoverrun); | |
1535 | ||
1536 | sigs = stl_getsignals(portp); | |
1537 | cnt = sprintf(sp, "%s%s%s%s%s ", | |
1538 | (sigs & TIOCM_RTS) ? "|RTS" : "", | |
1539 | (sigs & TIOCM_CTS) ? "|CTS" : "", | |
1540 | (sigs & TIOCM_DTR) ? "|DTR" : "", | |
1541 | (sigs & TIOCM_CD) ? "|DCD" : "", | |
1542 | (sigs & TIOCM_DSR) ? "|DSR" : ""); | |
1543 | *sp = ' '; | |
1544 | sp += cnt; | |
1545 | ||
c62429d9 | 1546 | for (cnt = sp - pos; cnt < (MAXLINE - 1); cnt++) |
1da177e4 LT |
1547 | *sp++ = ' '; |
1548 | if (cnt >= MAXLINE) | |
1549 | pos[(MAXLINE - 2)] = '+'; | |
1550 | pos[(MAXLINE - 1)] = '\n'; | |
1551 | ||
014c2544 | 1552 | return MAXLINE; |
1da177e4 LT |
1553 | } |
1554 | ||
1555 | /*****************************************************************************/ | |
1556 | ||
1557 | /* | |
1558 | * Port info, read from the /proc file system. | |
1559 | */ | |
1560 | ||
1561 | static int stl_readproc(char *page, char **start, off_t off, int count, int *eof, void *data) | |
1562 | { | |
ca7ed0f2 JS |
1563 | struct stlbrd *brdp; |
1564 | struct stlpanel *panelp; | |
1565 | struct stlport *portp; | |
6b2c9457 JS |
1566 | unsigned int brdnr, panelnr, portnr; |
1567 | int totalport, curoff, maxoff; | |
1da177e4 LT |
1568 | char *pos; |
1569 | ||
a0564e14 JS |
1570 | pr_debug("stl_readproc(page=%p,start=%p,off=%lx,count=%d,eof=%p," |
1571 | "data=%p\n", page, start, off, count, eof, data); | |
1da177e4 LT |
1572 | |
1573 | pos = page; | |
1574 | totalport = 0; | |
1575 | curoff = 0; | |
1576 | ||
1577 | if (off == 0) { | |
1578 | pos += sprintf(pos, "%s: version %s", stl_drvtitle, | |
1579 | stl_drvversion); | |
1580 | while (pos < (page + MAXLINE - 1)) | |
1581 | *pos++ = ' '; | |
1582 | *pos++ = '\n'; | |
1583 | } | |
1584 | curoff = MAXLINE; | |
1585 | ||
1586 | /* | |
1587 | * We scan through for each board, panel and port. The offset is | |
1588 | * calculated on the fly, and irrelevant ports are skipped. | |
1589 | */ | |
c62429d9 | 1590 | for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) { |
1da177e4 | 1591 | brdp = stl_brds[brdnr]; |
615e4a71 | 1592 | if (brdp == NULL) |
1da177e4 LT |
1593 | continue; |
1594 | if (brdp->state == 0) | |
1595 | continue; | |
1596 | ||
1597 | maxoff = curoff + (brdp->nrports * MAXLINE); | |
1598 | if (off >= maxoff) { | |
1599 | curoff = maxoff; | |
1600 | continue; | |
1601 | } | |
1602 | ||
1603 | totalport = brdnr * STL_MAXPORTS; | |
c62429d9 | 1604 | for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) { |
1da177e4 | 1605 | panelp = brdp->panels[panelnr]; |
615e4a71 | 1606 | if (panelp == NULL) |
1da177e4 LT |
1607 | continue; |
1608 | ||
1609 | maxoff = curoff + (panelp->nrports * MAXLINE); | |
1610 | if (off >= maxoff) { | |
1611 | curoff = maxoff; | |
1612 | totalport += panelp->nrports; | |
1613 | continue; | |
1614 | } | |
1615 | ||
c62429d9 | 1616 | for (portnr = 0; portnr < panelp->nrports; portnr++, |
1da177e4 LT |
1617 | totalport++) { |
1618 | portp = panelp->ports[portnr]; | |
615e4a71 | 1619 | if (portp == NULL) |
1da177e4 LT |
1620 | continue; |
1621 | if (off >= (curoff += MAXLINE)) | |
1622 | continue; | |
1623 | if ((pos - page + MAXLINE) > count) | |
1624 | goto stl_readdone; | |
1625 | pos += stl_portinfo(portp, totalport, pos); | |
1626 | } | |
1627 | } | |
1628 | } | |
1629 | ||
1630 | *eof = 1; | |
1631 | ||
1632 | stl_readdone: | |
1633 | *start = page; | |
c62429d9 | 1634 | return pos - page; |
1da177e4 LT |
1635 | } |
1636 | ||
1637 | /*****************************************************************************/ | |
1638 | ||
1639 | /* | |
1640 | * All board interrupts are vectored through here first. This code then | |
1641 | * calls off to the approrpriate board interrupt handlers. | |
1642 | */ | |
1643 | ||
7d12e780 | 1644 | static irqreturn_t stl_intr(int irq, void *dev_id) |
1da177e4 | 1645 | { |
ca7ed0f2 | 1646 | struct stlbrd *brdp = dev_id; |
1da177e4 | 1647 | |
a6f97b29 | 1648 | pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq); |
1da177e4 LT |
1649 | |
1650 | return IRQ_RETVAL((* brdp->isr)(brdp)); | |
1651 | } | |
1652 | ||
1653 | /*****************************************************************************/ | |
1654 | ||
1655 | /* | |
1656 | * Interrupt service routine for EasyIO board types. | |
1657 | */ | |
1658 | ||
ca7ed0f2 | 1659 | static int stl_eiointr(struct stlbrd *brdp) |
1da177e4 | 1660 | { |
ca7ed0f2 | 1661 | struct stlpanel *panelp; |
1da177e4 LT |
1662 | unsigned int iobase; |
1663 | int handled = 0; | |
1664 | ||
b65b5b59 | 1665 | spin_lock(&brd_lock); |
1da177e4 LT |
1666 | panelp = brdp->panels[0]; |
1667 | iobase = panelp->iobase; | |
1668 | while (inb(brdp->iostatus) & EIO_INTRPEND) { | |
1669 | handled = 1; | |
1670 | (* panelp->isr)(panelp, iobase); | |
1671 | } | |
b65b5b59 | 1672 | spin_unlock(&brd_lock); |
1da177e4 LT |
1673 | return handled; |
1674 | } | |
1675 | ||
1676 | /*****************************************************************************/ | |
1677 | ||
1678 | /* | |
1679 | * Interrupt service routine for ECH-AT board types. | |
1680 | */ | |
1681 | ||
ca7ed0f2 | 1682 | static int stl_echatintr(struct stlbrd *brdp) |
1da177e4 | 1683 | { |
ca7ed0f2 | 1684 | struct stlpanel *panelp; |
6b2c9457 | 1685 | unsigned int ioaddr, bnknr; |
1da177e4 LT |
1686 | int handled = 0; |
1687 | ||
1688 | outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl); | |
1689 | ||
1690 | while (inb(brdp->iostatus) & ECH_INTRPEND) { | |
1691 | handled = 1; | |
c62429d9 | 1692 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1693 | ioaddr = brdp->bnkstataddr[bnknr]; |
1694 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1695 | panelp = brdp->bnk2panel[bnknr]; | |
1696 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1697 | } | |
1698 | } | |
1699 | } | |
1700 | ||
1701 | outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl); | |
1702 | ||
1703 | return handled; | |
1704 | } | |
1705 | ||
1706 | /*****************************************************************************/ | |
1707 | ||
1708 | /* | |
1709 | * Interrupt service routine for ECH-MCA board types. | |
1710 | */ | |
1711 | ||
ca7ed0f2 | 1712 | static int stl_echmcaintr(struct stlbrd *brdp) |
1da177e4 | 1713 | { |
ca7ed0f2 | 1714 | struct stlpanel *panelp; |
6b2c9457 | 1715 | unsigned int ioaddr, bnknr; |
1da177e4 LT |
1716 | int handled = 0; |
1717 | ||
1718 | while (inb(brdp->iostatus) & ECH_INTRPEND) { | |
1719 | handled = 1; | |
c62429d9 | 1720 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1721 | ioaddr = brdp->bnkstataddr[bnknr]; |
1722 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1723 | panelp = brdp->bnk2panel[bnknr]; | |
1724 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1725 | } | |
1726 | } | |
1727 | } | |
1728 | return handled; | |
1729 | } | |
1730 | ||
1731 | /*****************************************************************************/ | |
1732 | ||
1733 | /* | |
1734 | * Interrupt service routine for ECH-PCI board types. | |
1735 | */ | |
1736 | ||
ca7ed0f2 | 1737 | static int stl_echpciintr(struct stlbrd *brdp) |
1da177e4 | 1738 | { |
ca7ed0f2 | 1739 | struct stlpanel *panelp; |
6b2c9457 | 1740 | unsigned int ioaddr, bnknr, recheck; |
1da177e4 LT |
1741 | int handled = 0; |
1742 | ||
1743 | while (1) { | |
1744 | recheck = 0; | |
c62429d9 | 1745 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1746 | outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl); |
1747 | ioaddr = brdp->bnkstataddr[bnknr]; | |
1748 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1749 | panelp = brdp->bnk2panel[bnknr]; | |
1750 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1751 | recheck++; | |
1752 | handled = 1; | |
1753 | } | |
1754 | } | |
1755 | if (! recheck) | |
1756 | break; | |
1757 | } | |
1758 | return handled; | |
1759 | } | |
1760 | ||
1761 | /*****************************************************************************/ | |
1762 | ||
1763 | /* | |
1764 | * Interrupt service routine for ECH-8/64-PCI board types. | |
1765 | */ | |
1766 | ||
ca7ed0f2 | 1767 | static int stl_echpci64intr(struct stlbrd *brdp) |
1da177e4 | 1768 | { |
ca7ed0f2 | 1769 | struct stlpanel *panelp; |
6b2c9457 | 1770 | unsigned int ioaddr, bnknr; |
1da177e4 LT |
1771 | int handled = 0; |
1772 | ||
1773 | while (inb(brdp->ioctrl) & 0x1) { | |
1774 | handled = 1; | |
c62429d9 | 1775 | for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) { |
1da177e4 LT |
1776 | ioaddr = brdp->bnkstataddr[bnknr]; |
1777 | if (inb(ioaddr) & ECH_PNLINTRPEND) { | |
1778 | panelp = brdp->bnk2panel[bnknr]; | |
1779 | (* panelp->isr)(panelp, (ioaddr & 0xfffc)); | |
1780 | } | |
1781 | } | |
1782 | } | |
1783 | ||
1784 | return handled; | |
1785 | } | |
1786 | ||
1787 | /*****************************************************************************/ | |
1788 | ||
1da177e4 LT |
1789 | /* |
1790 | * Initialize all the ports on a panel. | |
1791 | */ | |
1792 | ||
705c1862 | 1793 | static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp) |
1da177e4 | 1794 | { |
6b2c9457 JS |
1795 | struct stlport *portp; |
1796 | unsigned int i; | |
1797 | int chipmask; | |
1da177e4 | 1798 | |
a0564e14 | 1799 | pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp); |
1da177e4 LT |
1800 | |
1801 | chipmask = stl_panelinit(brdp, panelp); | |
1802 | ||
1803 | /* | |
1804 | * All UART's are initialized (if found!). Now go through and setup | |
1805 | * each ports data structures. | |
1806 | */ | |
c62429d9 | 1807 | for (i = 0; i < panelp->nrports; i++) { |
ca7ed0f2 | 1808 | portp = kzalloc(sizeof(struct stlport), GFP_KERNEL); |
b0b4ed72 | 1809 | if (!portp) { |
1da177e4 | 1810 | printk("STALLION: failed to allocate memory " |
ca7ed0f2 | 1811 | "(size=%Zd)\n", sizeof(struct stlport)); |
1da177e4 LT |
1812 | break; |
1813 | } | |
1da177e4 LT |
1814 | |
1815 | portp->magic = STL_PORTMAGIC; | |
1816 | portp->portnr = i; | |
1817 | portp->brdnr = panelp->brdnr; | |
1818 | portp->panelnr = panelp->panelnr; | |
1819 | portp->uartp = panelp->uartp; | |
1820 | portp->clk = brdp->clk; | |
1821 | portp->baud_base = STL_BAUDBASE; | |
1822 | portp->close_delay = STL_CLOSEDELAY; | |
1823 | portp->closing_wait = 30 * HZ; | |
1da177e4 LT |
1824 | init_waitqueue_head(&portp->open_wait); |
1825 | init_waitqueue_head(&portp->close_wait); | |
1826 | portp->stats.brd = portp->brdnr; | |
1827 | portp->stats.panel = portp->panelnr; | |
1828 | portp->stats.port = portp->portnr; | |
1829 | panelp->ports[i] = portp; | |
1830 | stl_portinit(brdp, panelp, portp); | |
1831 | } | |
1832 | ||
c62429d9 | 1833 | return 0; |
1da177e4 LT |
1834 | } |
1835 | ||
3b85b341 JS |
1836 | static void stl_cleanup_panels(struct stlbrd *brdp) |
1837 | { | |
1838 | struct stlpanel *panelp; | |
1839 | struct stlport *portp; | |
1840 | unsigned int j, k; | |
1841 | ||
1842 | for (j = 0; j < STL_MAXPANELS; j++) { | |
1843 | panelp = brdp->panels[j]; | |
1844 | if (panelp == NULL) | |
1845 | continue; | |
1846 | for (k = 0; k < STL_PORTSPERPANEL; k++) { | |
1847 | portp = panelp->ports[k]; | |
1848 | if (portp == NULL) | |
1849 | continue; | |
1850 | if (portp->tty != NULL) | |
1851 | stl_hangup(portp->tty); | |
1852 | kfree(portp->tx.buf); | |
1853 | kfree(portp); | |
1854 | } | |
1855 | kfree(panelp); | |
1856 | } | |
1857 | } | |
1858 | ||
1da177e4 LT |
1859 | /*****************************************************************************/ |
1860 | ||
1861 | /* | |
1862 | * Try to find and initialize an EasyIO board. | |
1863 | */ | |
1864 | ||
705c1862 | 1865 | static int __devinit stl_initeio(struct stlbrd *brdp) |
1da177e4 | 1866 | { |
ca7ed0f2 | 1867 | struct stlpanel *panelp; |
1da177e4 LT |
1868 | unsigned int status; |
1869 | char *name; | |
3b85b341 | 1870 | int retval; |
1da177e4 | 1871 | |
a0564e14 | 1872 | pr_debug("stl_initeio(brdp=%p)\n", brdp); |
1da177e4 LT |
1873 | |
1874 | brdp->ioctrl = brdp->ioaddr1 + 1; | |
1875 | brdp->iostatus = brdp->ioaddr1 + 2; | |
1876 | ||
1877 | status = inb(brdp->iostatus); | |
1878 | if ((status & EIO_IDBITMASK) == EIO_MK3) | |
1879 | brdp->ioctrl++; | |
1880 | ||
1881 | /* | |
1882 | * Handle board specific stuff now. The real difference is PCI | |
1883 | * or not PCI. | |
1884 | */ | |
1885 | if (brdp->brdtype == BRD_EASYIOPCI) { | |
1886 | brdp->iosize1 = 0x80; | |
1887 | brdp->iosize2 = 0x80; | |
1888 | name = "serial(EIO-PCI)"; | |
1889 | outb(0x41, (brdp->ioaddr2 + 0x4c)); | |
1890 | } else { | |
1891 | brdp->iosize1 = 8; | |
1892 | name = "serial(EIO)"; | |
1893 | if ((brdp->irq < 0) || (brdp->irq > 15) || | |
1894 | (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { | |
1895 | printk("STALLION: invalid irq=%d for brd=%d\n", | |
1896 | brdp->irq, brdp->brdnr); | |
3b85b341 JS |
1897 | retval = -EINVAL; |
1898 | goto err; | |
1da177e4 LT |
1899 | } |
1900 | outb((stl_vecmap[brdp->irq] | EIO_0WS | | |
1901 | ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)), | |
1902 | brdp->ioctrl); | |
1903 | } | |
1904 | ||
3b85b341 | 1905 | retval = -EBUSY; |
1da177e4 LT |
1906 | if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) { |
1907 | printk(KERN_WARNING "STALLION: Warning, board %d I/O address " | |
1908 | "%x conflicts with another device\n", brdp->brdnr, | |
1909 | brdp->ioaddr1); | |
3b85b341 | 1910 | goto err; |
1da177e4 LT |
1911 | } |
1912 | ||
1913 | if (brdp->iosize2 > 0) | |
1914 | if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) { | |
1915 | printk(KERN_WARNING "STALLION: Warning, board %d I/O " | |
1916 | "address %x conflicts with another device\n", | |
1917 | brdp->brdnr, brdp->ioaddr2); | |
1918 | printk(KERN_WARNING "STALLION: Warning, also " | |
1919 | "releasing board %d I/O address %x \n", | |
1920 | brdp->brdnr, brdp->ioaddr1); | |
3b85b341 | 1921 | goto err_rel1; |
1da177e4 LT |
1922 | } |
1923 | ||
1924 | /* | |
1925 | * Everything looks OK, so let's go ahead and probe for the hardware. | |
1926 | */ | |
1927 | brdp->clk = CD1400_CLK; | |
1928 | brdp->isr = stl_eiointr; | |
1929 | ||
3b85b341 | 1930 | retval = -ENODEV; |
1da177e4 LT |
1931 | switch (status & EIO_IDBITMASK) { |
1932 | case EIO_8PORTM: | |
1933 | brdp->clk = CD1400_CLK8M; | |
1934 | /* fall thru */ | |
1935 | case EIO_8PORTRS: | |
1936 | case EIO_8PORTDI: | |
1937 | brdp->nrports = 8; | |
1938 | break; | |
1939 | case EIO_4PORTRS: | |
1940 | brdp->nrports = 4; | |
1941 | break; | |
1942 | case EIO_MK3: | |
1943 | switch (status & EIO_BRDMASK) { | |
1944 | case ID_BRD4: | |
1945 | brdp->nrports = 4; | |
1946 | break; | |
1947 | case ID_BRD8: | |
1948 | brdp->nrports = 8; | |
1949 | break; | |
1950 | case ID_BRD16: | |
1951 | brdp->nrports = 16; | |
1952 | break; | |
1953 | default: | |
3b85b341 | 1954 | goto err_rel2; |
1da177e4 LT |
1955 | } |
1956 | break; | |
1957 | default: | |
3b85b341 | 1958 | goto err_rel2; |
1da177e4 LT |
1959 | } |
1960 | ||
1961 | /* | |
1962 | * We have verified that the board is actually present, so now we | |
1963 | * can complete the setup. | |
1964 | */ | |
1965 | ||
ca7ed0f2 | 1966 | panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL); |
b0b4ed72 | 1967 | if (!panelp) { |
1da177e4 | 1968 | printk(KERN_WARNING "STALLION: failed to allocate memory " |
ca7ed0f2 | 1969 | "(size=%Zd)\n", sizeof(struct stlpanel)); |
3b85b341 JS |
1970 | retval = -ENOMEM; |
1971 | goto err_rel2; | |
1da177e4 | 1972 | } |
1da177e4 LT |
1973 | |
1974 | panelp->magic = STL_PANELMAGIC; | |
1975 | panelp->brdnr = brdp->brdnr; | |
1976 | panelp->panelnr = 0; | |
1977 | panelp->nrports = brdp->nrports; | |
1978 | panelp->iobase = brdp->ioaddr1; | |
1979 | panelp->hwid = status; | |
1980 | if ((status & EIO_IDBITMASK) == EIO_MK3) { | |
615e4a71 | 1981 | panelp->uartp = &stl_sc26198uart; |
1da177e4 LT |
1982 | panelp->isr = stl_sc26198intr; |
1983 | } else { | |
615e4a71 | 1984 | panelp->uartp = &stl_cd1400uart; |
1da177e4 LT |
1985 | panelp->isr = stl_cd1400eiointr; |
1986 | } | |
1987 | ||
1988 | brdp->panels[0] = panelp; | |
1989 | brdp->nrpanels = 1; | |
1990 | brdp->state |= BRD_FOUND; | |
1991 | brdp->hwid = status; | |
0f2ed4c6 | 1992 | if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) { |
1da177e4 LT |
1993 | printk("STALLION: failed to register interrupt " |
1994 | "routine for %s irq=%d\n", name, brdp->irq); | |
3b85b341 JS |
1995 | retval = -ENODEV; |
1996 | goto err_fr; | |
1da177e4 | 1997 | } |
3b85b341 JS |
1998 | |
1999 | return 0; | |
2000 | err_fr: | |
2001 | stl_cleanup_panels(brdp); | |
2002 | err_rel2: | |
2003 | if (brdp->iosize2 > 0) | |
2004 | release_region(brdp->ioaddr2, brdp->iosize2); | |
2005 | err_rel1: | |
2006 | release_region(brdp->ioaddr1, brdp->iosize1); | |
2007 | err: | |
2008 | return retval; | |
1da177e4 LT |
2009 | } |
2010 | ||
2011 | /*****************************************************************************/ | |
2012 | ||
2013 | /* | |
2014 | * Try to find an ECH board and initialize it. This code is capable of | |
2015 | * dealing with all types of ECH board. | |
2016 | */ | |
2017 | ||
705c1862 | 2018 | static int __devinit stl_initech(struct stlbrd *brdp) |
1da177e4 | 2019 | { |
ca7ed0f2 | 2020 | struct stlpanel *panelp; |
6b2c9457 JS |
2021 | unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i; |
2022 | int retval; | |
1da177e4 LT |
2023 | char *name; |
2024 | ||
a0564e14 | 2025 | pr_debug("stl_initech(brdp=%p)\n", brdp); |
1da177e4 LT |
2026 | |
2027 | status = 0; | |
2028 | conflict = 0; | |
2029 | ||
2030 | /* | |
2031 | * Set up the initial board register contents for boards. This varies a | |
2032 | * bit between the different board types. So we need to handle each | |
2033 | * separately. Also do a check that the supplied IRQ is good. | |
2034 | */ | |
2035 | switch (brdp->brdtype) { | |
2036 | ||
2037 | case BRD_ECH: | |
2038 | brdp->isr = stl_echatintr; | |
2039 | brdp->ioctrl = brdp->ioaddr1 + 1; | |
2040 | brdp->iostatus = brdp->ioaddr1 + 1; | |
2041 | status = inb(brdp->iostatus); | |
3b85b341 JS |
2042 | if ((status & ECH_IDBITMASK) != ECH_ID) { |
2043 | retval = -ENODEV; | |
2044 | goto err; | |
2045 | } | |
1da177e4 LT |
2046 | if ((brdp->irq < 0) || (brdp->irq > 15) || |
2047 | (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { | |
2048 | printk("STALLION: invalid irq=%d for brd=%d\n", | |
2049 | brdp->irq, brdp->brdnr); | |
3b85b341 JS |
2050 | retval = -EINVAL; |
2051 | goto err; | |
1da177e4 LT |
2052 | } |
2053 | status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1); | |
2054 | status |= (stl_vecmap[brdp->irq] << 1); | |
2055 | outb((status | ECH_BRDRESET), brdp->ioaddr1); | |
2056 | brdp->ioctrlval = ECH_INTENABLE | | |
2057 | ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE); | |
c62429d9 | 2058 | for (i = 0; i < 10; i++) |
1da177e4 LT |
2059 | outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl); |
2060 | brdp->iosize1 = 2; | |
2061 | brdp->iosize2 = 32; | |
2062 | name = "serial(EC8/32)"; | |
2063 | outb(status, brdp->ioaddr1); | |
2064 | break; | |
2065 | ||
2066 | case BRD_ECHMC: | |
2067 | brdp->isr = stl_echmcaintr; | |
2068 | brdp->ioctrl = brdp->ioaddr1 + 0x20; | |
2069 | brdp->iostatus = brdp->ioctrl; | |
2070 | status = inb(brdp->iostatus); | |
3b85b341 JS |
2071 | if ((status & ECH_IDBITMASK) != ECH_ID) { |
2072 | retval = -ENODEV; | |
2073 | goto err; | |
2074 | } | |
1da177e4 LT |
2075 | if ((brdp->irq < 0) || (brdp->irq > 15) || |
2076 | (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) { | |
2077 | printk("STALLION: invalid irq=%d for brd=%d\n", | |
2078 | brdp->irq, brdp->brdnr); | |
3b85b341 JS |
2079 | retval = -EINVAL; |
2080 | goto err; | |
1da177e4 LT |
2081 | } |
2082 | outb(ECHMC_BRDRESET, brdp->ioctrl); | |
2083 | outb(ECHMC_INTENABLE, brdp->ioctrl); | |
2084 | brdp->iosize1 = 64; | |
2085 | name = "serial(EC8/32-MC)"; | |
2086 | break; | |
2087 | ||
2088 | case BRD_ECHPCI: | |
2089 | brdp->isr = stl_echpciintr; | |
2090 | brdp->ioctrl = brdp->ioaddr1 + 2; | |
2091 | brdp->iosize1 = 4; | |
2092 | brdp->iosize2 = 8; | |
2093 | name = "serial(EC8/32-PCI)"; | |
2094 | break; | |
2095 | ||
2096 | case BRD_ECH64PCI: | |
2097 | brdp->isr = stl_echpci64intr; | |
2098 | brdp->ioctrl = brdp->ioaddr2 + 0x40; | |
2099 | outb(0x43, (brdp->ioaddr1 + 0x4c)); | |
2100 | brdp->iosize1 = 0x80; | |
2101 | brdp->iosize2 = 0x80; | |
2102 | name = "serial(EC8/64-PCI)"; | |
2103 | break; | |
2104 | ||
2105 | default: | |
2106 | printk("STALLION: unknown board type=%d\n", brdp->brdtype); | |
3b85b341 JS |
2107 | retval = -EINVAL; |
2108 | goto err; | |
1da177e4 LT |
2109 | } |
2110 | ||
2111 | /* | |
2112 | * Check boards for possible IO address conflicts and return fail status | |
2113 | * if an IO conflict found. | |
2114 | */ | |
3b85b341 | 2115 | retval = -EBUSY; |
1da177e4 LT |
2116 | if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) { |
2117 | printk(KERN_WARNING "STALLION: Warning, board %d I/O address " | |
2118 | "%x conflicts with another device\n", brdp->brdnr, | |
2119 | brdp->ioaddr1); | |
3b85b341 | 2120 | goto err; |
1da177e4 LT |
2121 | } |
2122 | ||
2123 | if (brdp->iosize2 > 0) | |
2124 | if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) { | |
2125 | printk(KERN_WARNING "STALLION: Warning, board %d I/O " | |
2126 | "address %x conflicts with another device\n", | |
2127 | brdp->brdnr, brdp->ioaddr2); | |
2128 | printk(KERN_WARNING "STALLION: Warning, also " | |
2129 | "releasing board %d I/O address %x \n", | |
2130 | brdp->brdnr, brdp->ioaddr1); | |
3b85b341 | 2131 | goto err_rel1; |
1da177e4 LT |
2132 | } |
2133 | ||
2134 | /* | |
2135 | * Scan through the secondary io address space looking for panels. | |
2136 | * As we find'em allocate and initialize panel structures for each. | |
2137 | */ | |
2138 | brdp->clk = CD1400_CLK; | |
2139 | brdp->hwid = status; | |
2140 | ||
2141 | ioaddr = brdp->ioaddr2; | |
2142 | banknr = 0; | |
2143 | panelnr = 0; | |
2144 | nxtid = 0; | |
2145 | ||
c62429d9 | 2146 | for (i = 0; i < STL_MAXPANELS; i++) { |
1da177e4 LT |
2147 | if (brdp->brdtype == BRD_ECHPCI) { |
2148 | outb(nxtid, brdp->ioctrl); | |
2149 | ioaddr = brdp->ioaddr2; | |
2150 | } | |
2151 | status = inb(ioaddr + ECH_PNLSTATUS); | |
2152 | if ((status & ECH_PNLIDMASK) != nxtid) | |
64834b22 | 2153 | break; |
ca7ed0f2 | 2154 | panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL); |
b0b4ed72 | 2155 | if (!panelp) { |
1da177e4 | 2156 | printk("STALLION: failed to allocate memory " |
ca7ed0f2 | 2157 | "(size=%Zd)\n", sizeof(struct stlpanel)); |
49277b1c | 2158 | retval = -ENOMEM; |
3b85b341 | 2159 | goto err_fr; |
1da177e4 | 2160 | } |
1da177e4 LT |
2161 | panelp->magic = STL_PANELMAGIC; |
2162 | panelp->brdnr = brdp->brdnr; | |
2163 | panelp->panelnr = panelnr; | |
2164 | panelp->iobase = ioaddr; | |
2165 | panelp->pagenr = nxtid; | |
2166 | panelp->hwid = status; | |
2167 | brdp->bnk2panel[banknr] = panelp; | |
2168 | brdp->bnkpageaddr[banknr] = nxtid; | |
2169 | brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS; | |
2170 | ||
2171 | if (status & ECH_PNLXPID) { | |
615e4a71 | 2172 | panelp->uartp = &stl_sc26198uart; |
1da177e4 LT |
2173 | panelp->isr = stl_sc26198intr; |
2174 | if (status & ECH_PNL16PORT) { | |
2175 | panelp->nrports = 16; | |
2176 | brdp->bnk2panel[banknr] = panelp; | |
2177 | brdp->bnkpageaddr[banknr] = nxtid; | |
2178 | brdp->bnkstataddr[banknr++] = ioaddr + 4 + | |
2179 | ECH_PNLSTATUS; | |
c62429d9 | 2180 | } else |
1da177e4 | 2181 | panelp->nrports = 8; |
1da177e4 | 2182 | } else { |
615e4a71 | 2183 | panelp->uartp = &stl_cd1400uart; |
1da177e4 LT |
2184 | panelp->isr = stl_cd1400echintr; |
2185 | if (status & ECH_PNL16PORT) { | |
2186 | panelp->nrports = 16; | |
2187 | panelp->ackmask = 0x80; | |
2188 | if (brdp->brdtype != BRD_ECHPCI) | |
2189 | ioaddr += EREG_BANKSIZE; | |
2190 | brdp->bnk2panel[banknr] = panelp; | |
2191 | brdp->bnkpageaddr[banknr] = ++nxtid; | |
2192 | brdp->bnkstataddr[banknr++] = ioaddr + | |
2193 | ECH_PNLSTATUS; | |
2194 | } else { | |
2195 | panelp->nrports = 8; | |
2196 | panelp->ackmask = 0xc0; | |
2197 | } | |
2198 | } | |
2199 | ||
2200 | nxtid++; | |
2201 | ioaddr += EREG_BANKSIZE; | |
2202 | brdp->nrports += panelp->nrports; | |
2203 | brdp->panels[panelnr++] = panelp; | |
2204 | if ((brdp->brdtype != BRD_ECHPCI) && | |
49277b1c JS |
2205 | (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) { |
2206 | retval = -EINVAL; | |
3b85b341 | 2207 | goto err_fr; |
49277b1c | 2208 | } |
1da177e4 LT |
2209 | } |
2210 | ||
2211 | brdp->nrpanels = panelnr; | |
2212 | brdp->nrbnks = banknr; | |
2213 | if (brdp->brdtype == BRD_ECH) | |
2214 | outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl); | |
2215 | ||
2216 | brdp->state |= BRD_FOUND; | |
0f2ed4c6 | 2217 | if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) { |
1da177e4 LT |
2218 | printk("STALLION: failed to register interrupt " |
2219 | "routine for %s irq=%d\n", name, brdp->irq); | |
3b85b341 JS |
2220 | retval = -ENODEV; |
2221 | goto err_fr; | |
1da177e4 LT |
2222 | } |
2223 | ||
3b85b341 JS |
2224 | return 0; |
2225 | err_fr: | |
2226 | stl_cleanup_panels(brdp); | |
2227 | if (brdp->iosize2 > 0) | |
2228 | release_region(brdp->ioaddr2, brdp->iosize2); | |
2229 | err_rel1: | |
2230 | release_region(brdp->ioaddr1, brdp->iosize1); | |
2231 | err: | |
2232 | return retval; | |
1da177e4 LT |
2233 | } |
2234 | ||
2235 | /*****************************************************************************/ | |
2236 | ||
2237 | /* | |
2238 | * Initialize and configure the specified board. | |
2239 | * Scan through all the boards in the configuration and see what we | |
2240 | * can find. Handle EIO and the ECH boards a little differently here | |
2241 | * since the initial search and setup is very different. | |
2242 | */ | |
2243 | ||
705c1862 | 2244 | static int __devinit stl_brdinit(struct stlbrd *brdp) |
1da177e4 | 2245 | { |
3b85b341 | 2246 | int i, retval; |
1da177e4 | 2247 | |
a0564e14 | 2248 | pr_debug("stl_brdinit(brdp=%p)\n", brdp); |
1da177e4 LT |
2249 | |
2250 | switch (brdp->brdtype) { | |
2251 | case BRD_EASYIO: | |
2252 | case BRD_EASYIOPCI: | |
3b85b341 JS |
2253 | retval = stl_initeio(brdp); |
2254 | if (retval) | |
2255 | goto err; | |
1da177e4 LT |
2256 | break; |
2257 | case BRD_ECH: | |
2258 | case BRD_ECHMC: | |
2259 | case BRD_ECHPCI: | |
2260 | case BRD_ECH64PCI: | |
3b85b341 JS |
2261 | retval = stl_initech(brdp); |
2262 | if (retval) | |
2263 | goto err; | |
1da177e4 LT |
2264 | break; |
2265 | default: | |
2266 | printk("STALLION: board=%d is unknown board type=%d\n", | |
2267 | brdp->brdnr, brdp->brdtype); | |
3b85b341 JS |
2268 | retval = -ENODEV; |
2269 | goto err; | |
1da177e4 LT |
2270 | } |
2271 | ||
1da177e4 LT |
2272 | if ((brdp->state & BRD_FOUND) == 0) { |
2273 | printk("STALLION: %s board not found, board=%d io=%x irq=%d\n", | |
2274 | stl_brdnames[brdp->brdtype], brdp->brdnr, | |
2275 | brdp->ioaddr1, brdp->irq); | |
3b85b341 | 2276 | goto err_free; |
1da177e4 LT |
2277 | } |
2278 | ||
c62429d9 | 2279 | for (i = 0; i < STL_MAXPANELS; i++) |
615e4a71 | 2280 | if (brdp->panels[i] != NULL) |
1da177e4 LT |
2281 | stl_initports(brdp, brdp->panels[i]); |
2282 | ||
2283 | printk("STALLION: %s found, board=%d io=%x irq=%d " | |
2284 | "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype], | |
2285 | brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels, | |
2286 | brdp->nrports); | |
3b85b341 JS |
2287 | |
2288 | return 0; | |
2289 | err_free: | |
2290 | free_irq(brdp->irq, brdp); | |
2291 | ||
2292 | stl_cleanup_panels(brdp); | |
2293 | ||
2294 | release_region(brdp->ioaddr1, brdp->iosize1); | |
2295 | if (brdp->iosize2 > 0) | |
2296 | release_region(brdp->ioaddr2, brdp->iosize2); | |
3b85b341 JS |
2297 | err: |
2298 | return retval; | |
1da177e4 LT |
2299 | } |
2300 | ||
2301 | /*****************************************************************************/ | |
2302 | ||
2303 | /* | |
2304 | * Find the next available board number that is free. | |
2305 | */ | |
2306 | ||
705c1862 | 2307 | static int __devinit stl_getbrdnr(void) |
1da177e4 | 2308 | { |
6b2c9457 | 2309 | unsigned int i; |
1da177e4 | 2310 | |
c62429d9 | 2311 | for (i = 0; i < STL_MAXBRDS; i++) |
615e4a71 | 2312 | if (stl_brds[i] == NULL) { |
1da177e4 LT |
2313 | if (i >= stl_nrbrds) |
2314 | stl_nrbrds = i + 1; | |
c62429d9 | 2315 | return i; |
1da177e4 | 2316 | } |
c62429d9 JS |
2317 | |
2318 | return -1; | |
1da177e4 LT |
2319 | } |
2320 | ||
b1b84fe0 | 2321 | /*****************************************************************************/ |
1da177e4 LT |
2322 | /* |
2323 | * We have a Stallion board. Allocate a board structure and | |
2324 | * initialize it. Read its IO and IRQ resources from PCI | |
2325 | * configuration space. | |
2326 | */ | |
2327 | ||
b1b84fe0 JS |
2328 | static int __devinit stl_pciprobe(struct pci_dev *pdev, |
2329 | const struct pci_device_id *ent) | |
1da177e4 | 2330 | { |
b1b84fe0 | 2331 | struct stlbrd *brdp; |
aeaccfe4 | 2332 | unsigned int i, brdtype = ent->driver_data; |
6b2c9457 | 2333 | int brdnr, retval = -ENODEV; |
1da177e4 | 2334 | |
b1b84fe0 | 2335 | if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) |
3b85b341 | 2336 | goto err; |
b1b84fe0 | 2337 | |
3b85b341 JS |
2338 | retval = pci_enable_device(pdev); |
2339 | if (retval) | |
2340 | goto err; | |
2341 | brdp = stl_allocbrd(); | |
2342 | if (brdp == NULL) { | |
2343 | retval = -ENOMEM; | |
2344 | goto err; | |
2345 | } | |
79cfe7ab | 2346 | mutex_lock(&stl_brdslock); |
6b2c9457 JS |
2347 | brdnr = stl_getbrdnr(); |
2348 | if (brdnr < 0) { | |
fefaf9a7 | 2349 | dev_err(&pdev->dev, "too many boards found, " |
1da177e4 | 2350 | "maximum supported %d\n", STL_MAXBRDS); |
79cfe7ab | 2351 | mutex_unlock(&stl_brdslock); |
49277b1c | 2352 | retval = -ENODEV; |
3b85b341 | 2353 | goto err_fr; |
1da177e4 | 2354 | } |
6b2c9457 | 2355 | brdp->brdnr = (unsigned int)brdnr; |
79cfe7ab JS |
2356 | stl_brds[brdp->brdnr] = brdp; |
2357 | mutex_unlock(&stl_brdslock); | |
2358 | ||
1da177e4 | 2359 | brdp->brdtype = brdtype; |
fc06b5cf | 2360 | brdp->state |= STL_PROBED; |
1da177e4 | 2361 | |
1da177e4 LT |
2362 | /* |
2363 | * We have all resources from the board, so let's setup the actual | |
2364 | * board structure now. | |
2365 | */ | |
2366 | switch (brdtype) { | |
2367 | case BRD_ECHPCI: | |
b1b84fe0 JS |
2368 | brdp->ioaddr2 = pci_resource_start(pdev, 0); |
2369 | brdp->ioaddr1 = pci_resource_start(pdev, 1); | |
1da177e4 LT |
2370 | break; |
2371 | case BRD_ECH64PCI: | |
b1b84fe0 JS |
2372 | brdp->ioaddr2 = pci_resource_start(pdev, 2); |
2373 | brdp->ioaddr1 = pci_resource_start(pdev, 1); | |
1da177e4 LT |
2374 | break; |
2375 | case BRD_EASYIOPCI: | |
b1b84fe0 JS |
2376 | brdp->ioaddr1 = pci_resource_start(pdev, 2); |
2377 | brdp->ioaddr2 = pci_resource_start(pdev, 1); | |
1da177e4 LT |
2378 | break; |
2379 | default: | |
fefaf9a7 | 2380 | dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype); |
1da177e4 LT |
2381 | break; |
2382 | } | |
2383 | ||
b1b84fe0 | 2384 | brdp->irq = pdev->irq; |
3b85b341 JS |
2385 | retval = stl_brdinit(brdp); |
2386 | if (retval) | |
79cfe7ab | 2387 | goto err_null; |
1da177e4 | 2388 | |
b1b84fe0 JS |
2389 | pci_set_drvdata(pdev, brdp); |
2390 | ||
aeaccfe4 JS |
2391 | for (i = 0; i < brdp->nrports; i++) |
2392 | tty_register_device(stl_serial, | |
2393 | brdp->brdnr * STL_MAXPORTS + i, &pdev->dev); | |
2394 | ||
3b85b341 | 2395 | return 0; |
79cfe7ab JS |
2396 | err_null: |
2397 | stl_brds[brdp->brdnr] = NULL; | |
3b85b341 JS |
2398 | err_fr: |
2399 | kfree(brdp); | |
2400 | err: | |
2401 | return retval; | |
1da177e4 LT |
2402 | } |
2403 | ||
b1b84fe0 | 2404 | static void __devexit stl_pciremove(struct pci_dev *pdev) |
1da177e4 | 2405 | { |
b1b84fe0 | 2406 | struct stlbrd *brdp = pci_get_drvdata(pdev); |
aeaccfe4 | 2407 | unsigned int i; |
1da177e4 | 2408 | |
b1b84fe0 | 2409 | free_irq(brdp->irq, brdp); |
1da177e4 | 2410 | |
b1b84fe0 | 2411 | stl_cleanup_panels(brdp); |
1da177e4 | 2412 | |
b1b84fe0 JS |
2413 | release_region(brdp->ioaddr1, brdp->iosize1); |
2414 | if (brdp->iosize2 > 0) | |
2415 | release_region(brdp->ioaddr2, brdp->iosize2); | |
1da177e4 | 2416 | |
aeaccfe4 JS |
2417 | for (i = 0; i < brdp->nrports; i++) |
2418 | tty_unregister_device(stl_serial, | |
2419 | brdp->brdnr * STL_MAXPORTS + i); | |
2420 | ||
b1b84fe0 JS |
2421 | stl_brds[brdp->brdnr] = NULL; |
2422 | kfree(brdp); | |
1da177e4 LT |
2423 | } |
2424 | ||
b1b84fe0 JS |
2425 | static struct pci_driver stl_pcidriver = { |
2426 | .name = "stallion", | |
2427 | .id_table = stl_pcibrds, | |
2428 | .probe = stl_pciprobe, | |
2429 | .remove = __devexit_p(stl_pciremove) | |
2430 | }; | |
1da177e4 LT |
2431 | |
2432 | /*****************************************************************************/ | |
2433 | ||
1da177e4 LT |
2434 | /* |
2435 | * Return the board stats structure to user app. | |
2436 | */ | |
2437 | ||
2438 | static int stl_getbrdstats(combrd_t __user *bp) | |
2439 | { | |
6b2c9457 | 2440 | combrd_t stl_brdstats; |
ca7ed0f2 JS |
2441 | struct stlbrd *brdp; |
2442 | struct stlpanel *panelp; | |
6b2c9457 | 2443 | unsigned int i; |
1da177e4 LT |
2444 | |
2445 | if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t))) | |
2446 | return -EFAULT; | |
2447 | if (stl_brdstats.brd >= STL_MAXBRDS) | |
c62429d9 | 2448 | return -ENODEV; |
1da177e4 | 2449 | brdp = stl_brds[stl_brdstats.brd]; |
615e4a71 | 2450 | if (brdp == NULL) |
c62429d9 | 2451 | return -ENODEV; |
1da177e4 LT |
2452 | |
2453 | memset(&stl_brdstats, 0, sizeof(combrd_t)); | |
2454 | stl_brdstats.brd = brdp->brdnr; | |
2455 | stl_brdstats.type = brdp->brdtype; | |
2456 | stl_brdstats.hwid = brdp->hwid; | |
2457 | stl_brdstats.state = brdp->state; | |
2458 | stl_brdstats.ioaddr = brdp->ioaddr1; | |
2459 | stl_brdstats.ioaddr2 = brdp->ioaddr2; | |
2460 | stl_brdstats.irq = brdp->irq; | |
2461 | stl_brdstats.nrpanels = brdp->nrpanels; | |
2462 | stl_brdstats.nrports = brdp->nrports; | |
c62429d9 | 2463 | for (i = 0; i < brdp->nrpanels; i++) { |
1da177e4 LT |
2464 | panelp = brdp->panels[i]; |
2465 | stl_brdstats.panels[i].panel = i; | |
2466 | stl_brdstats.panels[i].hwid = panelp->hwid; | |
2467 | stl_brdstats.panels[i].nrports = panelp->nrports; | |
2468 | } | |
2469 | ||
2470 | return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0; | |
2471 | } | |
2472 | ||
2473 | /*****************************************************************************/ | |
2474 | ||
2475 | /* | |
2476 | * Resolve the referenced port number into a port struct pointer. | |
2477 | */ | |
2478 | ||
ca7ed0f2 | 2479 | static struct stlport *stl_getport(int brdnr, int panelnr, int portnr) |
1da177e4 | 2480 | { |
ca7ed0f2 JS |
2481 | struct stlbrd *brdp; |
2482 | struct stlpanel *panelp; | |
1da177e4 | 2483 | |
c62429d9 JS |
2484 | if (brdnr < 0 || brdnr >= STL_MAXBRDS) |
2485 | return NULL; | |
1da177e4 | 2486 | brdp = stl_brds[brdnr]; |
615e4a71 | 2487 | if (brdp == NULL) |
c62429d9 | 2488 | return NULL; |
6b2c9457 | 2489 | if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels) |
c62429d9 | 2490 | return NULL; |
1da177e4 | 2491 | panelp = brdp->panels[panelnr]; |
615e4a71 | 2492 | if (panelp == NULL) |
c62429d9 | 2493 | return NULL; |
6b2c9457 | 2494 | if (portnr < 0 || (unsigned int)portnr >= panelp->nrports) |
c62429d9 JS |
2495 | return NULL; |
2496 | return panelp->ports[portnr]; | |
1da177e4 LT |
2497 | } |
2498 | ||
2499 | /*****************************************************************************/ | |
2500 | ||
2501 | /* | |
2502 | * Return the port stats structure to user app. A NULL port struct | |
2503 | * pointer passed in means that we need to find out from the app | |
2504 | * what port to get stats for (used through board control device). | |
2505 | */ | |
2506 | ||
ca7ed0f2 | 2507 | static int stl_getportstats(struct stlport *portp, comstats_t __user *cp) |
1da177e4 | 2508 | { |
6b2c9457 | 2509 | comstats_t stl_comstats; |
1da177e4 LT |
2510 | unsigned char *head, *tail; |
2511 | unsigned long flags; | |
2512 | ||
2513 | if (!portp) { | |
2514 | if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t))) | |
2515 | return -EFAULT; | |
2516 | portp = stl_getport(stl_comstats.brd, stl_comstats.panel, | |
2517 | stl_comstats.port); | |
615e4a71 | 2518 | if (portp == NULL) |
c62429d9 | 2519 | return -ENODEV; |
1da177e4 LT |
2520 | } |
2521 | ||
2522 | portp->stats.state = portp->istate; | |
2523 | portp->stats.flags = portp->flags; | |
2524 | portp->stats.hwid = portp->hwid; | |
2525 | ||
2526 | portp->stats.ttystate = 0; | |
2527 | portp->stats.cflags = 0; | |
2528 | portp->stats.iflags = 0; | |
2529 | portp->stats.oflags = 0; | |
2530 | portp->stats.lflags = 0; | |
2531 | portp->stats.rxbuffered = 0; | |
2532 | ||
b65b5b59 | 2533 | spin_lock_irqsave(&stallion_lock, flags); |
c62429d9 | 2534 | if (portp->tty != NULL) |
1da177e4 LT |
2535 | if (portp->tty->driver_data == portp) { |
2536 | portp->stats.ttystate = portp->tty->flags; | |
33f0f88f AC |
2537 | /* No longer available as a statistic */ |
2538 | portp->stats.rxbuffered = 1; /*portp->tty->flip.count; */ | |
615e4a71 | 2539 | if (portp->tty->termios != NULL) { |
1da177e4 LT |
2540 | portp->stats.cflags = portp->tty->termios->c_cflag; |
2541 | portp->stats.iflags = portp->tty->termios->c_iflag; | |
2542 | portp->stats.oflags = portp->tty->termios->c_oflag; | |
2543 | portp->stats.lflags = portp->tty->termios->c_lflag; | |
2544 | } | |
2545 | } | |
b65b5b59 | 2546 | spin_unlock_irqrestore(&stallion_lock, flags); |
1da177e4 LT |
2547 | |
2548 | head = portp->tx.head; | |
2549 | tail = portp->tx.tail; | |
c62429d9 JS |
2550 | portp->stats.txbuffered = (head >= tail) ? (head - tail) : |
2551 | (STL_TXBUFSIZE - (tail - head)); | |
1da177e4 LT |
2552 | |
2553 | portp->stats.signals = (unsigned long) stl_getsignals(portp); | |
2554 | ||
2555 | return copy_to_user(cp, &portp->stats, | |
2556 | sizeof(comstats_t)) ? -EFAULT : 0; | |
2557 | } | |
2558 | ||
2559 | /*****************************************************************************/ | |
2560 | ||
2561 | /* | |
2562 | * Clear the port stats structure. We also return it zeroed out... | |
2563 | */ | |
2564 | ||
ca7ed0f2 | 2565 | static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp) |
1da177e4 | 2566 | { |
6b2c9457 JS |
2567 | comstats_t stl_comstats; |
2568 | ||
1da177e4 LT |
2569 | if (!portp) { |
2570 | if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t))) | |
2571 | return -EFAULT; | |
2572 | portp = stl_getport(stl_comstats.brd, stl_comstats.panel, | |
2573 | stl_comstats.port); | |
615e4a71 | 2574 | if (portp == NULL) |
c62429d9 | 2575 | return -ENODEV; |
1da177e4 LT |
2576 | } |
2577 | ||
2578 | memset(&portp->stats, 0, sizeof(comstats_t)); | |
2579 | portp->stats.brd = portp->brdnr; | |
2580 | portp->stats.panel = portp->panelnr; | |
2581 | portp->stats.port = portp->portnr; | |
2582 | return copy_to_user(cp, &portp->stats, | |
2583 | sizeof(comstats_t)) ? -EFAULT : 0; | |
2584 | } | |
2585 | ||
2586 | /*****************************************************************************/ | |
2587 | ||
2588 | /* | |
2589 | * Return the entire driver ports structure to a user app. | |
2590 | */ | |
2591 | ||
ca7ed0f2 | 2592 | static int stl_getportstruct(struct stlport __user *arg) |
1da177e4 | 2593 | { |
6b2c9457 | 2594 | struct stlport stl_dummyport; |
ca7ed0f2 | 2595 | struct stlport *portp; |
1da177e4 | 2596 | |
ca7ed0f2 | 2597 | if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport))) |
1da177e4 LT |
2598 | return -EFAULT; |
2599 | portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr, | |
2600 | stl_dummyport.portnr); | |
2601 | if (!portp) | |
2602 | return -ENODEV; | |
ca7ed0f2 | 2603 | return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0; |
1da177e4 LT |
2604 | } |
2605 | ||
2606 | /*****************************************************************************/ | |
2607 | ||
2608 | /* | |
2609 | * Return the entire driver board structure to a user app. | |
2610 | */ | |
2611 | ||
ca7ed0f2 | 2612 | static int stl_getbrdstruct(struct stlbrd __user *arg) |
1da177e4 | 2613 | { |
6b2c9457 | 2614 | struct stlbrd stl_dummybrd; |
ca7ed0f2 | 2615 | struct stlbrd *brdp; |
1da177e4 | 2616 | |
ca7ed0f2 | 2617 | if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd))) |
1da177e4 | 2618 | return -EFAULT; |
6b2c9457 | 2619 | if (stl_dummybrd.brdnr >= STL_MAXBRDS) |
1da177e4 LT |
2620 | return -ENODEV; |
2621 | brdp = stl_brds[stl_dummybrd.brdnr]; | |
2622 | if (!brdp) | |
c62429d9 | 2623 | return -ENODEV; |
ca7ed0f2 | 2624 | return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0; |
1da177e4 LT |
2625 | } |
2626 | ||
2627 | /*****************************************************************************/ | |
2628 | ||
2629 | /* | |
2630 | * The "staliomem" device is also required to do some special operations | |
2631 | * on the board and/or ports. In this driver it is mostly used for stats | |
2632 | * collection. | |
2633 | */ | |
2634 | ||
2635 | static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg) | |
2636 | { | |
2637 | int brdnr, rc; | |
2638 | void __user *argp = (void __user *)arg; | |
2639 | ||
a0564e14 | 2640 | pr_debug("stl_memioctl(ip=%p,fp=%p,cmd=%x,arg=%lx)\n", ip, fp, cmd,arg); |
1da177e4 LT |
2641 | |
2642 | brdnr = iminor(ip); | |
2643 | if (brdnr >= STL_MAXBRDS) | |
c62429d9 | 2644 | return -ENODEV; |
1da177e4 LT |
2645 | rc = 0; |
2646 | ||
2647 | switch (cmd) { | |
2648 | case COM_GETPORTSTATS: | |
2649 | rc = stl_getportstats(NULL, argp); | |
2650 | break; | |
2651 | case COM_CLRPORTSTATS: | |
2652 | rc = stl_clrportstats(NULL, argp); | |
2653 | break; | |
2654 | case COM_GETBRDSTATS: | |
2655 | rc = stl_getbrdstats(argp); | |
2656 | break; | |
2657 | case COM_READPORT: | |
2658 | rc = stl_getportstruct(argp); | |
2659 | break; | |
2660 | case COM_READBOARD: | |
2661 | rc = stl_getbrdstruct(argp); | |
2662 | break; | |
2663 | default: | |
2664 | rc = -ENOIOCTLCMD; | |
2665 | break; | |
2666 | } | |
2667 | ||
c62429d9 | 2668 | return rc; |
1da177e4 LT |
2669 | } |
2670 | ||
b68e31d0 | 2671 | static const struct tty_operations stl_ops = { |
1da177e4 LT |
2672 | .open = stl_open, |
2673 | .close = stl_close, | |
2674 | .write = stl_write, | |
2675 | .put_char = stl_putchar, | |
2676 | .flush_chars = stl_flushchars, | |
2677 | .write_room = stl_writeroom, | |
2678 | .chars_in_buffer = stl_charsinbuffer, | |
2679 | .ioctl = stl_ioctl, | |
2680 | .set_termios = stl_settermios, | |
2681 | .throttle = stl_throttle, | |
2682 | .unthrottle = stl_unthrottle, | |
2683 | .stop = stl_stop, | |
2684 | .start = stl_start, | |
2685 | .hangup = stl_hangup, | |
2686 | .flush_buffer = stl_flushbuffer, | |
2687 | .break_ctl = stl_breakctl, | |
2688 | .wait_until_sent = stl_waituntilsent, | |
2689 | .send_xchar = stl_sendxchar, | |
2690 | .read_proc = stl_readproc, | |
2691 | .tiocmget = stl_tiocmget, | |
2692 | .tiocmset = stl_tiocmset, | |
2693 | }; | |
2694 | ||
1da177e4 LT |
2695 | /*****************************************************************************/ |
2696 | /* CD1400 HARDWARE FUNCTIONS */ | |
2697 | /*****************************************************************************/ | |
2698 | ||
2699 | /* | |
2700 | * These functions get/set/update the registers of the cd1400 UARTs. | |
2701 | * Access to the cd1400 registers is via an address/data io port pair. | |
2702 | * (Maybe should make this inline...) | |
2703 | */ | |
2704 | ||
ca7ed0f2 | 2705 | static int stl_cd1400getreg(struct stlport *portp, int regnr) |
1da177e4 LT |
2706 | { |
2707 | outb((regnr + portp->uartaddr), portp->ioaddr); | |
014c2544 | 2708 | return inb(portp->ioaddr + EREG_DATA); |
1da177e4 LT |
2709 | } |
2710 | ||
ca7ed0f2 | 2711 | static void stl_cd1400setreg(struct stlport *portp, int regnr, int value) |
1da177e4 | 2712 | { |
c62429d9 | 2713 | outb(regnr + portp->uartaddr, portp->ioaddr); |
1da177e4 LT |
2714 | outb(value, portp->ioaddr + EREG_DATA); |
2715 | } | |
2716 | ||
ca7ed0f2 | 2717 | static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value) |
1da177e4 | 2718 | { |
c62429d9 | 2719 | outb(regnr + portp->uartaddr, portp->ioaddr); |
1da177e4 LT |
2720 | if (inb(portp->ioaddr + EREG_DATA) != value) { |
2721 | outb(value, portp->ioaddr + EREG_DATA); | |
014c2544 | 2722 | return 1; |
1da177e4 | 2723 | } |
014c2544 | 2724 | return 0; |
1da177e4 LT |
2725 | } |
2726 | ||
2727 | /*****************************************************************************/ | |
2728 | ||
2729 | /* | |
2730 | * Inbitialize the UARTs in a panel. We don't care what sort of board | |
2731 | * these ports are on - since the port io registers are almost | |
2732 | * identical when dealing with ports. | |
2733 | */ | |
2734 | ||
ca7ed0f2 | 2735 | static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp) |
1da177e4 LT |
2736 | { |
2737 | unsigned int gfrcr; | |
2738 | int chipmask, i, j; | |
2739 | int nrchips, uartaddr, ioaddr; | |
b65b5b59 | 2740 | unsigned long flags; |
1da177e4 | 2741 | |
a0564e14 | 2742 | pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp); |
1da177e4 | 2743 | |
b65b5b59 | 2744 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2745 | BRDENABLE(panelp->brdnr, panelp->pagenr); |
2746 | ||
2747 | /* | |
2748 | * Check that each chip is present and started up OK. | |
2749 | */ | |
2750 | chipmask = 0; | |
2751 | nrchips = panelp->nrports / CD1400_PORTS; | |
c62429d9 | 2752 | for (i = 0; i < nrchips; i++) { |
1da177e4 LT |
2753 | if (brdp->brdtype == BRD_ECHPCI) { |
2754 | outb((panelp->pagenr + (i >> 1)), brdp->ioctrl); | |
2755 | ioaddr = panelp->iobase; | |
c62429d9 | 2756 | } else |
1da177e4 | 2757 | ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1)); |
1da177e4 LT |
2758 | uartaddr = (i & 0x01) ? 0x080 : 0; |
2759 | outb((GFRCR + uartaddr), ioaddr); | |
2760 | outb(0, (ioaddr + EREG_DATA)); | |
2761 | outb((CCR + uartaddr), ioaddr); | |
2762 | outb(CCR_RESETFULL, (ioaddr + EREG_DATA)); | |
2763 | outb(CCR_RESETFULL, (ioaddr + EREG_DATA)); | |
2764 | outb((GFRCR + uartaddr), ioaddr); | |
c62429d9 | 2765 | for (j = 0; j < CCR_MAXWAIT; j++) |
1da177e4 LT |
2766 | if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0) |
2767 | break; | |
c62429d9 | 2768 | |
1da177e4 LT |
2769 | if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) { |
2770 | printk("STALLION: cd1400 not responding, " | |
2771 | "brd=%d panel=%d chip=%d\n", | |
2772 | panelp->brdnr, panelp->panelnr, i); | |
2773 | continue; | |
2774 | } | |
2775 | chipmask |= (0x1 << i); | |
2776 | outb((PPR + uartaddr), ioaddr); | |
2777 | outb(PPR_SCALAR, (ioaddr + EREG_DATA)); | |
2778 | } | |
2779 | ||
2780 | BRDDISABLE(panelp->brdnr); | |
b65b5b59 | 2781 | spin_unlock_irqrestore(&brd_lock, flags); |
014c2544 | 2782 | return chipmask; |
1da177e4 LT |
2783 | } |
2784 | ||
2785 | /*****************************************************************************/ | |
2786 | ||
2787 | /* | |
2788 | * Initialize hardware specific port registers. | |
2789 | */ | |
2790 | ||
ca7ed0f2 | 2791 | static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp) |
1da177e4 | 2792 | { |
b65b5b59 | 2793 | unsigned long flags; |
a0564e14 JS |
2794 | pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp, |
2795 | panelp, portp); | |
1da177e4 | 2796 | |
615e4a71 JS |
2797 | if ((brdp == NULL) || (panelp == NULL) || |
2798 | (portp == NULL)) | |
1da177e4 LT |
2799 | return; |
2800 | ||
b65b5b59 | 2801 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
2802 | portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) || |
2803 | (portp->portnr < 8)) ? 0 : EREG_BANKSIZE); | |
2804 | portp->uartaddr = (portp->portnr & 0x04) << 5; | |
2805 | portp->pagenr = panelp->pagenr + (portp->portnr >> 3); | |
2806 | ||
2807 | BRDENABLE(portp->brdnr, portp->pagenr); | |
2808 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
2809 | stl_cd1400setreg(portp, LIVR, (portp->portnr << 3)); | |
2810 | portp->hwid = stl_cd1400getreg(portp, GFRCR); | |
2811 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 2812 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
2813 | } |
2814 | ||
2815 | /*****************************************************************************/ | |
2816 | ||
2817 | /* | |
2818 | * Wait for the command register to be ready. We will poll this, | |
2819 | * since it won't usually take too long to be ready. | |
2820 | */ | |
2821 | ||
ca7ed0f2 | 2822 | static void stl_cd1400ccrwait(struct stlport *portp) |
1da177e4 LT |
2823 | { |
2824 | int i; | |
2825 | ||
c62429d9 JS |
2826 | for (i = 0; i < CCR_MAXWAIT; i++) |
2827 | if (stl_cd1400getreg(portp, CCR) == 0) | |
1da177e4 | 2828 | return; |
1da177e4 LT |
2829 | |
2830 | printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n", | |
2831 | portp->portnr, portp->panelnr, portp->brdnr); | |
2832 | } | |
2833 | ||
2834 | /*****************************************************************************/ | |
2835 | ||
2836 | /* | |
2837 | * Set up the cd1400 registers for a port based on the termios port | |
2838 | * settings. | |
2839 | */ | |
2840 | ||
606d099c | 2841 | static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp) |
1da177e4 | 2842 | { |
ca7ed0f2 | 2843 | struct stlbrd *brdp; |
1da177e4 LT |
2844 | unsigned long flags; |
2845 | unsigned int clkdiv, baudrate; | |
2846 | unsigned char cor1, cor2, cor3; | |
2847 | unsigned char cor4, cor5, ccr; | |
2848 | unsigned char srer, sreron, sreroff; | |
2849 | unsigned char mcor1, mcor2, rtpr; | |
2850 | unsigned char clk, div; | |
2851 | ||
2852 | cor1 = 0; | |
2853 | cor2 = 0; | |
2854 | cor3 = 0; | |
2855 | cor4 = 0; | |
2856 | cor5 = 0; | |
2857 | ccr = 0; | |
2858 | rtpr = 0; | |
2859 | clk = 0; | |
2860 | div = 0; | |
2861 | mcor1 = 0; | |
2862 | mcor2 = 0; | |
2863 | sreron = 0; | |
2864 | sreroff = 0; | |
2865 | ||
2866 | brdp = stl_brds[portp->brdnr]; | |
615e4a71 | 2867 | if (brdp == NULL) |
1da177e4 LT |
2868 | return; |
2869 | ||
2870 | /* | |
2871 | * Set up the RX char ignore mask with those RX error types we | |
2872 | * can ignore. We can get the cd1400 to help us out a little here, | |
2873 | * it will ignore parity errors and breaks for us. | |
2874 | */ | |
2875 | portp->rxignoremsk = 0; | |
2876 | if (tiosp->c_iflag & IGNPAR) { | |
2877 | portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN); | |
2878 | cor1 |= COR1_PARIGNORE; | |
2879 | } | |
2880 | if (tiosp->c_iflag & IGNBRK) { | |
2881 | portp->rxignoremsk |= ST_BREAK; | |
2882 | cor4 |= COR4_IGNBRK; | |
2883 | } | |
2884 | ||
2885 | portp->rxmarkmsk = ST_OVERRUN; | |
2886 | if (tiosp->c_iflag & (INPCK | PARMRK)) | |
2887 | portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING); | |
2888 | if (tiosp->c_iflag & BRKINT) | |
2889 | portp->rxmarkmsk |= ST_BREAK; | |
2890 | ||
2891 | /* | |
2892 | * Go through the char size, parity and stop bits and set all the | |
2893 | * option register appropriately. | |
2894 | */ | |
2895 | switch (tiosp->c_cflag & CSIZE) { | |
2896 | case CS5: | |
2897 | cor1 |= COR1_CHL5; | |
2898 | break; | |
2899 | case CS6: | |
2900 | cor1 |= COR1_CHL6; | |
2901 | break; | |
2902 | case CS7: | |
2903 | cor1 |= COR1_CHL7; | |
2904 | break; | |
2905 | default: | |
2906 | cor1 |= COR1_CHL8; | |
2907 | break; | |
2908 | } | |
2909 | ||
2910 | if (tiosp->c_cflag & CSTOPB) | |
2911 | cor1 |= COR1_STOP2; | |
2912 | else | |
2913 | cor1 |= COR1_STOP1; | |
2914 | ||
2915 | if (tiosp->c_cflag & PARENB) { | |
2916 | if (tiosp->c_cflag & PARODD) | |
2917 | cor1 |= (COR1_PARENB | COR1_PARODD); | |
2918 | else | |
2919 | cor1 |= (COR1_PARENB | COR1_PAREVEN); | |
2920 | } else { | |
2921 | cor1 |= COR1_PARNONE; | |
2922 | } | |
2923 | ||
2924 | /* | |
2925 | * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing | |
2926 | * space for hardware flow control and the like. This should be set to | |
2927 | * VMIN. Also here we will set the RX data timeout to 10ms - this should | |
2928 | * really be based on VTIME. | |
2929 | */ | |
2930 | cor3 |= FIFO_RXTHRESHOLD; | |
2931 | rtpr = 2; | |
2932 | ||
2933 | /* | |
2934 | * Calculate the baud rate timers. For now we will just assume that | |
2935 | * the input and output baud are the same. Could have used a baud | |
2936 | * table here, but this way we can generate virtually any baud rate | |
2937 | * we like! | |
2938 | */ | |
2939 | baudrate = tiosp->c_cflag & CBAUD; | |
2940 | if (baudrate & CBAUDEX) { | |
2941 | baudrate &= ~CBAUDEX; | |
2942 | if ((baudrate < 1) || (baudrate > 4)) | |
2943 | tiosp->c_cflag &= ~CBAUDEX; | |
2944 | else | |
2945 | baudrate += 15; | |
2946 | } | |
2947 | baudrate = stl_baudrates[baudrate]; | |
2948 | if ((tiosp->c_cflag & CBAUD) == B38400) { | |
2949 | if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) | |
2950 | baudrate = 57600; | |
2951 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) | |
2952 | baudrate = 115200; | |
2953 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) | |
2954 | baudrate = 230400; | |
2955 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) | |
2956 | baudrate = 460800; | |
2957 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) | |
2958 | baudrate = (portp->baud_base / portp->custom_divisor); | |
2959 | } | |
2960 | if (baudrate > STL_CD1400MAXBAUD) | |
2961 | baudrate = STL_CD1400MAXBAUD; | |
2962 | ||
2963 | if (baudrate > 0) { | |
c62429d9 JS |
2964 | for (clk = 0; clk < CD1400_NUMCLKS; clk++) { |
2965 | clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate; | |
1da177e4 LT |
2966 | if (clkdiv < 0x100) |
2967 | break; | |
2968 | } | |
2969 | div = (unsigned char) clkdiv; | |
2970 | } | |
2971 | ||
2972 | /* | |
2973 | * Check what form of modem signaling is required and set it up. | |
2974 | */ | |
2975 | if ((tiosp->c_cflag & CLOCAL) == 0) { | |
2976 | mcor1 |= MCOR1_DCD; | |
2977 | mcor2 |= MCOR2_DCD; | |
2978 | sreron |= SRER_MODEM; | |
2979 | portp->flags |= ASYNC_CHECK_CD; | |
c62429d9 | 2980 | } else |
1da177e4 | 2981 | portp->flags &= ~ASYNC_CHECK_CD; |
1da177e4 LT |
2982 | |
2983 | /* | |
2984 | * Setup cd1400 enhanced modes if we can. In particular we want to | |
2985 | * handle as much of the flow control as possible automatically. As | |
2986 | * well as saving a few CPU cycles it will also greatly improve flow | |
2987 | * control reliability. | |
2988 | */ | |
2989 | if (tiosp->c_iflag & IXON) { | |
2990 | cor2 |= COR2_TXIBE; | |
2991 | cor3 |= COR3_SCD12; | |
2992 | if (tiosp->c_iflag & IXANY) | |
2993 | cor2 |= COR2_IXM; | |
2994 | } | |
2995 | ||
2996 | if (tiosp->c_cflag & CRTSCTS) { | |
2997 | cor2 |= COR2_CTSAE; | |
2998 | mcor1 |= FIFO_RTSTHRESHOLD; | |
2999 | } | |
3000 | ||
3001 | /* | |
3002 | * All cd1400 register values calculated so go through and set | |
3003 | * them all up. | |
3004 | */ | |
3005 | ||
a0564e14 | 3006 | pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", |
1da177e4 | 3007 | portp->portnr, portp->panelnr, portp->brdnr); |
a0564e14 | 3008 | pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n", |
1da177e4 | 3009 | cor1, cor2, cor3, cor4, cor5); |
a0564e14 | 3010 | pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n", |
1da177e4 | 3011 | mcor1, mcor2, rtpr, sreron, sreroff); |
a0564e14 JS |
3012 | pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div); |
3013 | pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n", | |
1da177e4 LT |
3014 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], |
3015 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]); | |
1da177e4 | 3016 | |
b65b5b59 | 3017 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3018 | BRDENABLE(portp->brdnr, portp->pagenr); |
3019 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3)); | |
3020 | srer = stl_cd1400getreg(portp, SRER); | |
3021 | stl_cd1400setreg(portp, SRER, 0); | |
3022 | if (stl_cd1400updatereg(portp, COR1, cor1)) | |
3023 | ccr = 1; | |
3024 | if (stl_cd1400updatereg(portp, COR2, cor2)) | |
3025 | ccr = 1; | |
3026 | if (stl_cd1400updatereg(portp, COR3, cor3)) | |
3027 | ccr = 1; | |
3028 | if (ccr) { | |
3029 | stl_cd1400ccrwait(portp); | |
3030 | stl_cd1400setreg(portp, CCR, CCR_CORCHANGE); | |
3031 | } | |
3032 | stl_cd1400setreg(portp, COR4, cor4); | |
3033 | stl_cd1400setreg(portp, COR5, cor5); | |
3034 | stl_cd1400setreg(portp, MCOR1, mcor1); | |
3035 | stl_cd1400setreg(portp, MCOR2, mcor2); | |
3036 | if (baudrate > 0) { | |
3037 | stl_cd1400setreg(portp, TCOR, clk); | |
3038 | stl_cd1400setreg(portp, TBPR, div); | |
3039 | stl_cd1400setreg(portp, RCOR, clk); | |
3040 | stl_cd1400setreg(portp, RBPR, div); | |
3041 | } | |
3042 | stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]); | |
3043 | stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]); | |
3044 | stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]); | |
3045 | stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]); | |
3046 | stl_cd1400setreg(portp, RTPR, rtpr); | |
3047 | mcor1 = stl_cd1400getreg(portp, MSVR1); | |
3048 | if (mcor1 & MSVR1_DCD) | |
3049 | portp->sigs |= TIOCM_CD; | |
3050 | else | |
3051 | portp->sigs &= ~TIOCM_CD; | |
3052 | stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron)); | |
3053 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3054 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3055 | } |
3056 | ||
3057 | /*****************************************************************************/ | |
3058 | ||
3059 | /* | |
3060 | * Set the state of the DTR and RTS signals. | |
3061 | */ | |
3062 | ||
ca7ed0f2 | 3063 | static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts) |
1da177e4 LT |
3064 | { |
3065 | unsigned char msvr1, msvr2; | |
3066 | unsigned long flags; | |
3067 | ||
a0564e14 JS |
3068 | pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n", |
3069 | portp, dtr, rts); | |
1da177e4 LT |
3070 | |
3071 | msvr1 = 0; | |
3072 | msvr2 = 0; | |
3073 | if (dtr > 0) | |
3074 | msvr1 = MSVR1_DTR; | |
3075 | if (rts > 0) | |
3076 | msvr2 = MSVR2_RTS; | |
3077 | ||
b65b5b59 | 3078 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3079 | BRDENABLE(portp->brdnr, portp->pagenr); |
3080 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3081 | if (rts >= 0) | |
3082 | stl_cd1400setreg(portp, MSVR2, msvr2); | |
3083 | if (dtr >= 0) | |
3084 | stl_cd1400setreg(portp, MSVR1, msvr1); | |
3085 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3086 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3087 | } |
3088 | ||
3089 | /*****************************************************************************/ | |
3090 | ||
3091 | /* | |
3092 | * Return the state of the signals. | |
3093 | */ | |
3094 | ||
ca7ed0f2 | 3095 | static int stl_cd1400getsignals(struct stlport *portp) |
1da177e4 LT |
3096 | { |
3097 | unsigned char msvr1, msvr2; | |
3098 | unsigned long flags; | |
3099 | int sigs; | |
3100 | ||
a0564e14 | 3101 | pr_debug("stl_cd1400getsignals(portp=%p)\n", portp); |
1da177e4 | 3102 | |
b65b5b59 | 3103 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3104 | BRDENABLE(portp->brdnr, portp->pagenr); |
3105 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3106 | msvr1 = stl_cd1400getreg(portp, MSVR1); | |
3107 | msvr2 = stl_cd1400getreg(portp, MSVR2); | |
3108 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3109 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3110 | |
3111 | sigs = 0; | |
3112 | sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0; | |
3113 | sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0; | |
3114 | sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0; | |
3115 | sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0; | |
3116 | #if 0 | |
3117 | sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0; | |
3118 | sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0; | |
3119 | #else | |
3120 | sigs |= TIOCM_DSR; | |
3121 | #endif | |
014c2544 | 3122 | return sigs; |
1da177e4 LT |
3123 | } |
3124 | ||
3125 | /*****************************************************************************/ | |
3126 | ||
3127 | /* | |
3128 | * Enable/Disable the Transmitter and/or Receiver. | |
3129 | */ | |
3130 | ||
ca7ed0f2 | 3131 | static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
3132 | { |
3133 | unsigned char ccr; | |
3134 | unsigned long flags; | |
3135 | ||
a0564e14 JS |
3136 | pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); |
3137 | ||
1da177e4 LT |
3138 | ccr = 0; |
3139 | ||
3140 | if (tx == 0) | |
3141 | ccr |= CCR_TXDISABLE; | |
3142 | else if (tx > 0) | |
3143 | ccr |= CCR_TXENABLE; | |
3144 | if (rx == 0) | |
3145 | ccr |= CCR_RXDISABLE; | |
3146 | else if (rx > 0) | |
3147 | ccr |= CCR_RXENABLE; | |
3148 | ||
b65b5b59 | 3149 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3150 | BRDENABLE(portp->brdnr, portp->pagenr); |
3151 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3152 | stl_cd1400ccrwait(portp); | |
3153 | stl_cd1400setreg(portp, CCR, ccr); | |
3154 | stl_cd1400ccrwait(portp); | |
3155 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3156 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3157 | } |
3158 | ||
3159 | /*****************************************************************************/ | |
3160 | ||
3161 | /* | |
3162 | * Start/stop the Transmitter and/or Receiver. | |
3163 | */ | |
3164 | ||
ca7ed0f2 | 3165 | static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
3166 | { |
3167 | unsigned char sreron, sreroff; | |
3168 | unsigned long flags; | |
3169 | ||
a0564e14 | 3170 | pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); |
1da177e4 LT |
3171 | |
3172 | sreron = 0; | |
3173 | sreroff = 0; | |
3174 | if (tx == 0) | |
3175 | sreroff |= (SRER_TXDATA | SRER_TXEMPTY); | |
3176 | else if (tx == 1) | |
3177 | sreron |= SRER_TXDATA; | |
3178 | else if (tx >= 2) | |
3179 | sreron |= SRER_TXEMPTY; | |
3180 | if (rx == 0) | |
3181 | sreroff |= SRER_RXDATA; | |
3182 | else if (rx > 0) | |
3183 | sreron |= SRER_RXDATA; | |
3184 | ||
b65b5b59 | 3185 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3186 | BRDENABLE(portp->brdnr, portp->pagenr); |
3187 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3188 | stl_cd1400setreg(portp, SRER, | |
3189 | ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron)); | |
3190 | BRDDISABLE(portp->brdnr); | |
3191 | if (tx > 0) | |
3192 | set_bit(ASYI_TXBUSY, &portp->istate); | |
b65b5b59 | 3193 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3194 | } |
3195 | ||
3196 | /*****************************************************************************/ | |
3197 | ||
3198 | /* | |
3199 | * Disable all interrupts from this port. | |
3200 | */ | |
3201 | ||
ca7ed0f2 | 3202 | static void stl_cd1400disableintrs(struct stlport *portp) |
1da177e4 LT |
3203 | { |
3204 | unsigned long flags; | |
3205 | ||
a0564e14 JS |
3206 | pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp); |
3207 | ||
b65b5b59 | 3208 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3209 | BRDENABLE(portp->brdnr, portp->pagenr); |
3210 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3211 | stl_cd1400setreg(portp, SRER, 0); | |
3212 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3213 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3214 | } |
3215 | ||
3216 | /*****************************************************************************/ | |
3217 | ||
ca7ed0f2 | 3218 | static void stl_cd1400sendbreak(struct stlport *portp, int len) |
1da177e4 LT |
3219 | { |
3220 | unsigned long flags; | |
3221 | ||
a0564e14 | 3222 | pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len); |
1da177e4 | 3223 | |
b65b5b59 | 3224 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3225 | BRDENABLE(portp->brdnr, portp->pagenr); |
3226 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3227 | stl_cd1400setreg(portp, SRER, | |
3228 | ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) | | |
3229 | SRER_TXEMPTY)); | |
3230 | BRDDISABLE(portp->brdnr); | |
3231 | portp->brklen = len; | |
3232 | if (len == 1) | |
3233 | portp->stats.txbreaks++; | |
b65b5b59 | 3234 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3235 | } |
3236 | ||
3237 | /*****************************************************************************/ | |
3238 | ||
3239 | /* | |
3240 | * Take flow control actions... | |
3241 | */ | |
3242 | ||
ca7ed0f2 | 3243 | static void stl_cd1400flowctrl(struct stlport *portp, int state) |
1da177e4 LT |
3244 | { |
3245 | struct tty_struct *tty; | |
3246 | unsigned long flags; | |
3247 | ||
a0564e14 | 3248 | pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 3249 | |
615e4a71 | 3250 | if (portp == NULL) |
1da177e4 LT |
3251 | return; |
3252 | tty = portp->tty; | |
615e4a71 | 3253 | if (tty == NULL) |
1da177e4 LT |
3254 | return; |
3255 | ||
b65b5b59 | 3256 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3257 | BRDENABLE(portp->brdnr, portp->pagenr); |
3258 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3259 | ||
3260 | if (state) { | |
3261 | if (tty->termios->c_iflag & IXOFF) { | |
3262 | stl_cd1400ccrwait(portp); | |
3263 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1); | |
3264 | portp->stats.rxxon++; | |
3265 | stl_cd1400ccrwait(portp); | |
3266 | } | |
3267 | /* | |
3268 | * Question: should we return RTS to what it was before? It may | |
3269 | * have been set by an ioctl... Suppose not, since if you have | |
3270 | * hardware flow control set then it is pretty silly to go and | |
3271 | * set the RTS line by hand. | |
3272 | */ | |
3273 | if (tty->termios->c_cflag & CRTSCTS) { | |
3274 | stl_cd1400setreg(portp, MCOR1, | |
3275 | (stl_cd1400getreg(portp, MCOR1) | | |
3276 | FIFO_RTSTHRESHOLD)); | |
3277 | stl_cd1400setreg(portp, MSVR2, MSVR2_RTS); | |
3278 | portp->stats.rxrtson++; | |
3279 | } | |
3280 | } else { | |
3281 | if (tty->termios->c_iflag & IXOFF) { | |
3282 | stl_cd1400ccrwait(portp); | |
3283 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2); | |
3284 | portp->stats.rxxoff++; | |
3285 | stl_cd1400ccrwait(portp); | |
3286 | } | |
3287 | if (tty->termios->c_cflag & CRTSCTS) { | |
3288 | stl_cd1400setreg(portp, MCOR1, | |
3289 | (stl_cd1400getreg(portp, MCOR1) & 0xf0)); | |
3290 | stl_cd1400setreg(portp, MSVR2, 0); | |
3291 | portp->stats.rxrtsoff++; | |
3292 | } | |
3293 | } | |
3294 | ||
3295 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3296 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3297 | } |
3298 | ||
3299 | /*****************************************************************************/ | |
3300 | ||
3301 | /* | |
3302 | * Send a flow control character... | |
3303 | */ | |
3304 | ||
ca7ed0f2 | 3305 | static void stl_cd1400sendflow(struct stlport *portp, int state) |
1da177e4 LT |
3306 | { |
3307 | struct tty_struct *tty; | |
3308 | unsigned long flags; | |
3309 | ||
a0564e14 | 3310 | pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 3311 | |
615e4a71 | 3312 | if (portp == NULL) |
1da177e4 LT |
3313 | return; |
3314 | tty = portp->tty; | |
615e4a71 | 3315 | if (tty == NULL) |
1da177e4 LT |
3316 | return; |
3317 | ||
b65b5b59 | 3318 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3319 | BRDENABLE(portp->brdnr, portp->pagenr); |
3320 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3321 | if (state) { | |
3322 | stl_cd1400ccrwait(portp); | |
3323 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1); | |
3324 | portp->stats.rxxon++; | |
3325 | stl_cd1400ccrwait(portp); | |
3326 | } else { | |
3327 | stl_cd1400ccrwait(portp); | |
3328 | stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2); | |
3329 | portp->stats.rxxoff++; | |
3330 | stl_cd1400ccrwait(portp); | |
3331 | } | |
3332 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3333 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3334 | } |
3335 | ||
3336 | /*****************************************************************************/ | |
3337 | ||
ca7ed0f2 | 3338 | static void stl_cd1400flush(struct stlport *portp) |
1da177e4 LT |
3339 | { |
3340 | unsigned long flags; | |
3341 | ||
a0564e14 | 3342 | pr_debug("stl_cd1400flush(portp=%p)\n", portp); |
1da177e4 | 3343 | |
615e4a71 | 3344 | if (portp == NULL) |
1da177e4 LT |
3345 | return; |
3346 | ||
b65b5b59 | 3347 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3348 | BRDENABLE(portp->brdnr, portp->pagenr); |
3349 | stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03)); | |
3350 | stl_cd1400ccrwait(portp); | |
3351 | stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO); | |
3352 | stl_cd1400ccrwait(portp); | |
3353 | portp->tx.tail = portp->tx.head; | |
3354 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3355 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
3356 | } |
3357 | ||
3358 | /*****************************************************************************/ | |
3359 | ||
3360 | /* | |
3361 | * Return the current state of data flow on this port. This is only | |
3362 | * really interresting when determining if data has fully completed | |
3363 | * transmission or not... This is easy for the cd1400, it accurately | |
3364 | * maintains the busy port flag. | |
3365 | */ | |
3366 | ||
ca7ed0f2 | 3367 | static int stl_cd1400datastate(struct stlport *portp) |
1da177e4 | 3368 | { |
a0564e14 | 3369 | pr_debug("stl_cd1400datastate(portp=%p)\n", portp); |
1da177e4 | 3370 | |
615e4a71 | 3371 | if (portp == NULL) |
014c2544 | 3372 | return 0; |
1da177e4 | 3373 | |
014c2544 | 3374 | return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0; |
1da177e4 LT |
3375 | } |
3376 | ||
3377 | /*****************************************************************************/ | |
3378 | ||
3379 | /* | |
3380 | * Interrupt service routine for cd1400 EasyIO boards. | |
3381 | */ | |
3382 | ||
ca7ed0f2 | 3383 | static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase) |
1da177e4 LT |
3384 | { |
3385 | unsigned char svrtype; | |
3386 | ||
a0564e14 | 3387 | pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase); |
1da177e4 | 3388 | |
b65b5b59 | 3389 | spin_lock(&brd_lock); |
1da177e4 LT |
3390 | outb(SVRR, iobase); |
3391 | svrtype = inb(iobase + EREG_DATA); | |
3392 | if (panelp->nrports > 4) { | |
3393 | outb((SVRR + 0x80), iobase); | |
3394 | svrtype |= inb(iobase + EREG_DATA); | |
3395 | } | |
3396 | ||
3397 | if (svrtype & SVRR_RX) | |
3398 | stl_cd1400rxisr(panelp, iobase); | |
3399 | else if (svrtype & SVRR_TX) | |
3400 | stl_cd1400txisr(panelp, iobase); | |
3401 | else if (svrtype & SVRR_MDM) | |
3402 | stl_cd1400mdmisr(panelp, iobase); | |
b65b5b59 AC |
3403 | |
3404 | spin_unlock(&brd_lock); | |
1da177e4 LT |
3405 | } |
3406 | ||
3407 | /*****************************************************************************/ | |
3408 | ||
3409 | /* | |
3410 | * Interrupt service routine for cd1400 panels. | |
3411 | */ | |
3412 | ||
ca7ed0f2 | 3413 | static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase) |
1da177e4 LT |
3414 | { |
3415 | unsigned char svrtype; | |
3416 | ||
a0564e14 | 3417 | pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase); |
1da177e4 LT |
3418 | |
3419 | outb(SVRR, iobase); | |
3420 | svrtype = inb(iobase + EREG_DATA); | |
3421 | outb((SVRR + 0x80), iobase); | |
3422 | svrtype |= inb(iobase + EREG_DATA); | |
3423 | if (svrtype & SVRR_RX) | |
3424 | stl_cd1400rxisr(panelp, iobase); | |
3425 | else if (svrtype & SVRR_TX) | |
3426 | stl_cd1400txisr(panelp, iobase); | |
3427 | else if (svrtype & SVRR_MDM) | |
3428 | stl_cd1400mdmisr(panelp, iobase); | |
3429 | } | |
3430 | ||
3431 | ||
3432 | /*****************************************************************************/ | |
3433 | ||
3434 | /* | |
3435 | * Unfortunately we need to handle breaks in the TX data stream, since | |
3436 | * this is the only way to generate them on the cd1400. | |
3437 | */ | |
3438 | ||
60be4810 | 3439 | static int stl_cd1400breakisr(struct stlport *portp, int ioaddr) |
1da177e4 LT |
3440 | { |
3441 | if (portp->brklen == 1) { | |
3442 | outb((COR2 + portp->uartaddr), ioaddr); | |
3443 | outb((inb(ioaddr + EREG_DATA) | COR2_ETC), | |
3444 | (ioaddr + EREG_DATA)); | |
3445 | outb((TDR + portp->uartaddr), ioaddr); | |
3446 | outb(ETC_CMD, (ioaddr + EREG_DATA)); | |
3447 | outb(ETC_STARTBREAK, (ioaddr + EREG_DATA)); | |
3448 | outb((SRER + portp->uartaddr), ioaddr); | |
3449 | outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)), | |
3450 | (ioaddr + EREG_DATA)); | |
014c2544 | 3451 | return 1; |
1da177e4 LT |
3452 | } else if (portp->brklen > 1) { |
3453 | outb((TDR + portp->uartaddr), ioaddr); | |
3454 | outb(ETC_CMD, (ioaddr + EREG_DATA)); | |
3455 | outb(ETC_STOPBREAK, (ioaddr + EREG_DATA)); | |
3456 | portp->brklen = -1; | |
014c2544 | 3457 | return 1; |
1da177e4 LT |
3458 | } else { |
3459 | outb((COR2 + portp->uartaddr), ioaddr); | |
3460 | outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC), | |
3461 | (ioaddr + EREG_DATA)); | |
3462 | portp->brklen = 0; | |
3463 | } | |
014c2544 | 3464 | return 0; |
1da177e4 LT |
3465 | } |
3466 | ||
3467 | /*****************************************************************************/ | |
3468 | ||
3469 | /* | |
3470 | * Transmit interrupt handler. This has gotta be fast! Handling TX | |
3471 | * chars is pretty simple, stuff as many as possible from the TX buffer | |
3472 | * into the cd1400 FIFO. Must also handle TX breaks here, since they | |
3473 | * are embedded as commands in the data stream. Oh no, had to use a goto! | |
3474 | * This could be optimized more, will do when I get time... | |
3475 | * In practice it is possible that interrupts are enabled but that the | |
3476 | * port has been hung up. Need to handle not having any TX buffer here, | |
3477 | * this is done by using the side effect that head and tail will also | |
3478 | * be NULL if the buffer has been freed. | |
3479 | */ | |
3480 | ||
ca7ed0f2 | 3481 | static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr) |
1da177e4 | 3482 | { |
ca7ed0f2 | 3483 | struct stlport *portp; |
1da177e4 LT |
3484 | int len, stlen; |
3485 | char *head, *tail; | |
3486 | unsigned char ioack, srer; | |
3487 | ||
a0564e14 | 3488 | pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr); |
1da177e4 LT |
3489 | |
3490 | ioack = inb(ioaddr + EREG_TXACK); | |
3491 | if (((ioack & panelp->ackmask) != 0) || | |
3492 | ((ioack & ACK_TYPMASK) != ACK_TYPTX)) { | |
3493 | printk("STALLION: bad TX interrupt ack value=%x\n", ioack); | |
3494 | return; | |
3495 | } | |
3496 | portp = panelp->ports[(ioack >> 3)]; | |
3497 | ||
3498 | /* | |
3499 | * Unfortunately we need to handle breaks in the data stream, since | |
3500 | * this is the only way to generate them on the cd1400. Do it now if | |
3501 | * a break is to be sent. | |
3502 | */ | |
3503 | if (portp->brklen != 0) | |
3504 | if (stl_cd1400breakisr(portp, ioaddr)) | |
3505 | goto stl_txalldone; | |
3506 | ||
3507 | head = portp->tx.head; | |
3508 | tail = portp->tx.tail; | |
3509 | len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); | |
3510 | if ((len == 0) || ((len < STL_TXBUFLOW) && | |
3511 | (test_bit(ASYI_TXLOW, &portp->istate) == 0))) { | |
3512 | set_bit(ASYI_TXLOW, &portp->istate); | |
ccfea3c9 JS |
3513 | if (portp->tty) |
3514 | tty_wakeup(portp->tty); | |
1da177e4 LT |
3515 | } |
3516 | ||
3517 | if (len == 0) { | |
3518 | outb((SRER + portp->uartaddr), ioaddr); | |
3519 | srer = inb(ioaddr + EREG_DATA); | |
3520 | if (srer & SRER_TXDATA) { | |
3521 | srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY; | |
3522 | } else { | |
3523 | srer &= ~(SRER_TXDATA | SRER_TXEMPTY); | |
3524 | clear_bit(ASYI_TXBUSY, &portp->istate); | |
3525 | } | |
3526 | outb(srer, (ioaddr + EREG_DATA)); | |
3527 | } else { | |
843b568c | 3528 | len = min(len, CD1400_TXFIFOSIZE); |
1da177e4 | 3529 | portp->stats.txtotal += len; |
319fe7c3 JS |
3530 | stlen = min_t(unsigned int, len, |
3531 | (portp->tx.buf + STL_TXBUFSIZE) - tail); | |
1da177e4 LT |
3532 | outb((TDR + portp->uartaddr), ioaddr); |
3533 | outsb((ioaddr + EREG_DATA), tail, stlen); | |
3534 | len -= stlen; | |
3535 | tail += stlen; | |
3536 | if (tail >= (portp->tx.buf + STL_TXBUFSIZE)) | |
3537 | tail = portp->tx.buf; | |
3538 | if (len > 0) { | |
3539 | outsb((ioaddr + EREG_DATA), tail, len); | |
3540 | tail += len; | |
3541 | } | |
3542 | portp->tx.tail = tail; | |
3543 | } | |
3544 | ||
3545 | stl_txalldone: | |
3546 | outb((EOSRR + portp->uartaddr), ioaddr); | |
3547 | outb(0, (ioaddr + EREG_DATA)); | |
3548 | } | |
3549 | ||
3550 | /*****************************************************************************/ | |
3551 | ||
3552 | /* | |
3553 | * Receive character interrupt handler. Determine if we have good chars | |
3554 | * or bad chars and then process appropriately. Good chars are easy | |
3555 | * just shove the lot into the RX buffer and set all status byte to 0. | |
3556 | * If a bad RX char then process as required. This routine needs to be | |
3557 | * fast! In practice it is possible that we get an interrupt on a port | |
3558 | * that is closed. This can happen on hangups - since they completely | |
3559 | * shutdown a port not in user context. Need to handle this case. | |
3560 | */ | |
3561 | ||
ca7ed0f2 | 3562 | static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr) |
1da177e4 | 3563 | { |
ca7ed0f2 | 3564 | struct stlport *portp; |
1da177e4 LT |
3565 | struct tty_struct *tty; |
3566 | unsigned int ioack, len, buflen; | |
3567 | unsigned char status; | |
3568 | char ch; | |
3569 | ||
a0564e14 | 3570 | pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr); |
1da177e4 LT |
3571 | |
3572 | ioack = inb(ioaddr + EREG_RXACK); | |
3573 | if ((ioack & panelp->ackmask) != 0) { | |
3574 | printk("STALLION: bad RX interrupt ack value=%x\n", ioack); | |
3575 | return; | |
3576 | } | |
3577 | portp = panelp->ports[(ioack >> 3)]; | |
3578 | tty = portp->tty; | |
3579 | ||
3580 | if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) { | |
3581 | outb((RDCR + portp->uartaddr), ioaddr); | |
3582 | len = inb(ioaddr + EREG_DATA); | |
33f0f88f | 3583 | if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) { |
319fe7c3 | 3584 | len = min_t(unsigned int, len, sizeof(stl_unwanted)); |
1da177e4 LT |
3585 | outb((RDSR + portp->uartaddr), ioaddr); |
3586 | insb((ioaddr + EREG_DATA), &stl_unwanted[0], len); | |
3587 | portp->stats.rxlost += len; | |
3588 | portp->stats.rxtotal += len; | |
3589 | } else { | |
843b568c | 3590 | len = min(len, buflen); |
1da177e4 | 3591 | if (len > 0) { |
33f0f88f | 3592 | unsigned char *ptr; |
1da177e4 | 3593 | outb((RDSR + portp->uartaddr), ioaddr); |
33f0f88f AC |
3594 | tty_prepare_flip_string(tty, &ptr, len); |
3595 | insb((ioaddr + EREG_DATA), ptr, len); | |
1da177e4 LT |
3596 | tty_schedule_flip(tty); |
3597 | portp->stats.rxtotal += len; | |
3598 | } | |
3599 | } | |
3600 | } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) { | |
3601 | outb((RDSR + portp->uartaddr), ioaddr); | |
3602 | status = inb(ioaddr + EREG_DATA); | |
3603 | ch = inb(ioaddr + EREG_DATA); | |
3604 | if (status & ST_PARITY) | |
3605 | portp->stats.rxparity++; | |
3606 | if (status & ST_FRAMING) | |
3607 | portp->stats.rxframing++; | |
3608 | if (status & ST_OVERRUN) | |
3609 | portp->stats.rxoverrun++; | |
3610 | if (status & ST_BREAK) | |
3611 | portp->stats.rxbreaks++; | |
3612 | if (status & ST_SCHARMASK) { | |
3613 | if ((status & ST_SCHARMASK) == ST_SCHAR1) | |
3614 | portp->stats.txxon++; | |
3615 | if ((status & ST_SCHARMASK) == ST_SCHAR2) | |
3616 | portp->stats.txxoff++; | |
3617 | goto stl_rxalldone; | |
3618 | } | |
33f0f88f | 3619 | if (tty != NULL && (portp->rxignoremsk & status) == 0) { |
1da177e4 LT |
3620 | if (portp->rxmarkmsk & status) { |
3621 | if (status & ST_BREAK) { | |
3622 | status = TTY_BREAK; | |
3623 | if (portp->flags & ASYNC_SAK) { | |
3624 | do_SAK(tty); | |
3625 | BRDENABLE(portp->brdnr, portp->pagenr); | |
3626 | } | |
c62429d9 | 3627 | } else if (status & ST_PARITY) |
1da177e4 | 3628 | status = TTY_PARITY; |
c62429d9 | 3629 | else if (status & ST_FRAMING) |
1da177e4 | 3630 | status = TTY_FRAME; |
c62429d9 | 3631 | else if(status & ST_OVERRUN) |
1da177e4 | 3632 | status = TTY_OVERRUN; |
c62429d9 | 3633 | else |
1da177e4 | 3634 | status = 0; |
c62429d9 | 3635 | } else |
1da177e4 | 3636 | status = 0; |
33f0f88f AC |
3637 | tty_insert_flip_char(tty, ch, status); |
3638 | tty_schedule_flip(tty); | |
1da177e4 LT |
3639 | } |
3640 | } else { | |
3641 | printk("STALLION: bad RX interrupt ack value=%x\n", ioack); | |
3642 | return; | |
3643 | } | |
3644 | ||
3645 | stl_rxalldone: | |
3646 | outb((EOSRR + portp->uartaddr), ioaddr); | |
3647 | outb(0, (ioaddr + EREG_DATA)); | |
3648 | } | |
3649 | ||
3650 | /*****************************************************************************/ | |
3651 | ||
3652 | /* | |
3653 | * Modem interrupt handler. The is called when the modem signal line | |
3654 | * (DCD) has changed state. Leave most of the work to the off-level | |
3655 | * processing routine. | |
3656 | */ | |
3657 | ||
ca7ed0f2 | 3658 | static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr) |
1da177e4 | 3659 | { |
ca7ed0f2 | 3660 | struct stlport *portp; |
1da177e4 LT |
3661 | unsigned int ioack; |
3662 | unsigned char misr; | |
3663 | ||
a0564e14 | 3664 | pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp); |
1da177e4 LT |
3665 | |
3666 | ioack = inb(ioaddr + EREG_MDACK); | |
3667 | if (((ioack & panelp->ackmask) != 0) || | |
3668 | ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) { | |
3669 | printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack); | |
3670 | return; | |
3671 | } | |
3672 | portp = panelp->ports[(ioack >> 3)]; | |
3673 | ||
3674 | outb((MISR + portp->uartaddr), ioaddr); | |
3675 | misr = inb(ioaddr + EREG_DATA); | |
3676 | if (misr & MISR_DCD) { | |
ccfea3c9 | 3677 | stl_cd_change(portp); |
1da177e4 LT |
3678 | portp->stats.modem++; |
3679 | } | |
3680 | ||
3681 | outb((EOSRR + portp->uartaddr), ioaddr); | |
3682 | outb(0, (ioaddr + EREG_DATA)); | |
3683 | } | |
3684 | ||
3685 | /*****************************************************************************/ | |
3686 | /* SC26198 HARDWARE FUNCTIONS */ | |
3687 | /*****************************************************************************/ | |
3688 | ||
3689 | /* | |
3690 | * These functions get/set/update the registers of the sc26198 UARTs. | |
3691 | * Access to the sc26198 registers is via an address/data io port pair. | |
3692 | * (Maybe should make this inline...) | |
3693 | */ | |
3694 | ||
ca7ed0f2 | 3695 | static int stl_sc26198getreg(struct stlport *portp, int regnr) |
1da177e4 LT |
3696 | { |
3697 | outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); | |
014c2544 | 3698 | return inb(portp->ioaddr + XP_DATA); |
1da177e4 LT |
3699 | } |
3700 | ||
ca7ed0f2 | 3701 | static void stl_sc26198setreg(struct stlport *portp, int regnr, int value) |
1da177e4 LT |
3702 | { |
3703 | outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); | |
3704 | outb(value, (portp->ioaddr + XP_DATA)); | |
3705 | } | |
3706 | ||
ca7ed0f2 | 3707 | static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value) |
1da177e4 LT |
3708 | { |
3709 | outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR)); | |
3710 | if (inb(portp->ioaddr + XP_DATA) != value) { | |
3711 | outb(value, (portp->ioaddr + XP_DATA)); | |
014c2544 | 3712 | return 1; |
1da177e4 | 3713 | } |
014c2544 | 3714 | return 0; |
1da177e4 LT |
3715 | } |
3716 | ||
3717 | /*****************************************************************************/ | |
3718 | ||
3719 | /* | |
3720 | * Functions to get and set the sc26198 global registers. | |
3721 | */ | |
3722 | ||
ca7ed0f2 | 3723 | static int stl_sc26198getglobreg(struct stlport *portp, int regnr) |
1da177e4 LT |
3724 | { |
3725 | outb(regnr, (portp->ioaddr + XP_ADDR)); | |
014c2544 | 3726 | return inb(portp->ioaddr + XP_DATA); |
1da177e4 LT |
3727 | } |
3728 | ||
3729 | #if 0 | |
ca7ed0f2 | 3730 | static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value) |
1da177e4 LT |
3731 | { |
3732 | outb(regnr, (portp->ioaddr + XP_ADDR)); | |
3733 | outb(value, (portp->ioaddr + XP_DATA)); | |
3734 | } | |
3735 | #endif | |
3736 | ||
3737 | /*****************************************************************************/ | |
3738 | ||
3739 | /* | |
3740 | * Inbitialize the UARTs in a panel. We don't care what sort of board | |
3741 | * these ports are on - since the port io registers are almost | |
3742 | * identical when dealing with ports. | |
3743 | */ | |
3744 | ||
ca7ed0f2 | 3745 | static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp) |
1da177e4 LT |
3746 | { |
3747 | int chipmask, i; | |
3748 | int nrchips, ioaddr; | |
3749 | ||
a0564e14 | 3750 | pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp); |
1da177e4 LT |
3751 | |
3752 | BRDENABLE(panelp->brdnr, panelp->pagenr); | |
3753 | ||
3754 | /* | |
3755 | * Check that each chip is present and started up OK. | |
3756 | */ | |
3757 | chipmask = 0; | |
3758 | nrchips = (panelp->nrports + 4) / SC26198_PORTS; | |
3759 | if (brdp->brdtype == BRD_ECHPCI) | |
3760 | outb(panelp->pagenr, brdp->ioctrl); | |
3761 | ||
c62429d9 | 3762 | for (i = 0; i < nrchips; i++) { |
1da177e4 LT |
3763 | ioaddr = panelp->iobase + (i * 4); |
3764 | outb(SCCR, (ioaddr + XP_ADDR)); | |
3765 | outb(CR_RESETALL, (ioaddr + XP_DATA)); | |
3766 | outb(TSTR, (ioaddr + XP_ADDR)); | |
3767 | if (inb(ioaddr + XP_DATA) != 0) { | |
3768 | printk("STALLION: sc26198 not responding, " | |
3769 | "brd=%d panel=%d chip=%d\n", | |
3770 | panelp->brdnr, panelp->panelnr, i); | |
3771 | continue; | |
3772 | } | |
3773 | chipmask |= (0x1 << i); | |
3774 | outb(GCCR, (ioaddr + XP_ADDR)); | |
3775 | outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA)); | |
3776 | outb(WDTRCR, (ioaddr + XP_ADDR)); | |
3777 | outb(0xff, (ioaddr + XP_DATA)); | |
3778 | } | |
3779 | ||
3780 | BRDDISABLE(panelp->brdnr); | |
014c2544 | 3781 | return chipmask; |
1da177e4 LT |
3782 | } |
3783 | ||
3784 | /*****************************************************************************/ | |
3785 | ||
3786 | /* | |
3787 | * Initialize hardware specific port registers. | |
3788 | */ | |
3789 | ||
ca7ed0f2 | 3790 | static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp) |
1da177e4 | 3791 | { |
a0564e14 JS |
3792 | pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp, |
3793 | panelp, portp); | |
1da177e4 | 3794 | |
615e4a71 JS |
3795 | if ((brdp == NULL) || (panelp == NULL) || |
3796 | (portp == NULL)) | |
1da177e4 LT |
3797 | return; |
3798 | ||
3799 | portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4); | |
3800 | portp->uartaddr = (portp->portnr & 0x07) << 4; | |
3801 | portp->pagenr = panelp->pagenr; | |
3802 | portp->hwid = 0x1; | |
3803 | ||
3804 | BRDENABLE(portp->brdnr, portp->pagenr); | |
3805 | stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS); | |
3806 | BRDDISABLE(portp->brdnr); | |
3807 | } | |
3808 | ||
3809 | /*****************************************************************************/ | |
3810 | ||
3811 | /* | |
3812 | * Set up the sc26198 registers for a port based on the termios port | |
3813 | * settings. | |
3814 | */ | |
3815 | ||
606d099c | 3816 | static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp) |
1da177e4 | 3817 | { |
ca7ed0f2 | 3818 | struct stlbrd *brdp; |
1da177e4 LT |
3819 | unsigned long flags; |
3820 | unsigned int baudrate; | |
3821 | unsigned char mr0, mr1, mr2, clk; | |
3822 | unsigned char imron, imroff, iopr, ipr; | |
3823 | ||
3824 | mr0 = 0; | |
3825 | mr1 = 0; | |
3826 | mr2 = 0; | |
3827 | clk = 0; | |
3828 | iopr = 0; | |
3829 | imron = 0; | |
3830 | imroff = 0; | |
3831 | ||
3832 | brdp = stl_brds[portp->brdnr]; | |
615e4a71 | 3833 | if (brdp == NULL) |
1da177e4 LT |
3834 | return; |
3835 | ||
3836 | /* | |
3837 | * Set up the RX char ignore mask with those RX error types we | |
3838 | * can ignore. | |
3839 | */ | |
3840 | portp->rxignoremsk = 0; | |
3841 | if (tiosp->c_iflag & IGNPAR) | |
3842 | portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING | | |
3843 | SR_RXOVERRUN); | |
3844 | if (tiosp->c_iflag & IGNBRK) | |
3845 | portp->rxignoremsk |= SR_RXBREAK; | |
3846 | ||
3847 | portp->rxmarkmsk = SR_RXOVERRUN; | |
3848 | if (tiosp->c_iflag & (INPCK | PARMRK)) | |
3849 | portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING); | |
3850 | if (tiosp->c_iflag & BRKINT) | |
3851 | portp->rxmarkmsk |= SR_RXBREAK; | |
3852 | ||
3853 | /* | |
3854 | * Go through the char size, parity and stop bits and set all the | |
3855 | * option register appropriately. | |
3856 | */ | |
3857 | switch (tiosp->c_cflag & CSIZE) { | |
3858 | case CS5: | |
3859 | mr1 |= MR1_CS5; | |
3860 | break; | |
3861 | case CS6: | |
3862 | mr1 |= MR1_CS6; | |
3863 | break; | |
3864 | case CS7: | |
3865 | mr1 |= MR1_CS7; | |
3866 | break; | |
3867 | default: | |
3868 | mr1 |= MR1_CS8; | |
3869 | break; | |
3870 | } | |
3871 | ||
3872 | if (tiosp->c_cflag & CSTOPB) | |
3873 | mr2 |= MR2_STOP2; | |
3874 | else | |
3875 | mr2 |= MR2_STOP1; | |
3876 | ||
3877 | if (tiosp->c_cflag & PARENB) { | |
3878 | if (tiosp->c_cflag & PARODD) | |
3879 | mr1 |= (MR1_PARENB | MR1_PARODD); | |
3880 | else | |
3881 | mr1 |= (MR1_PARENB | MR1_PAREVEN); | |
c62429d9 | 3882 | } else |
1da177e4 | 3883 | mr1 |= MR1_PARNONE; |
1da177e4 LT |
3884 | |
3885 | mr1 |= MR1_ERRBLOCK; | |
3886 | ||
3887 | /* | |
3888 | * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing | |
3889 | * space for hardware flow control and the like. This should be set to | |
3890 | * VMIN. | |
3891 | */ | |
3892 | mr2 |= MR2_RXFIFOHALF; | |
3893 | ||
3894 | /* | |
3895 | * Calculate the baud rate timers. For now we will just assume that | |
3896 | * the input and output baud are the same. The sc26198 has a fixed | |
3897 | * baud rate table, so only discrete baud rates possible. | |
3898 | */ | |
3899 | baudrate = tiosp->c_cflag & CBAUD; | |
3900 | if (baudrate & CBAUDEX) { | |
3901 | baudrate &= ~CBAUDEX; | |
3902 | if ((baudrate < 1) || (baudrate > 4)) | |
3903 | tiosp->c_cflag &= ~CBAUDEX; | |
3904 | else | |
3905 | baudrate += 15; | |
3906 | } | |
3907 | baudrate = stl_baudrates[baudrate]; | |
3908 | if ((tiosp->c_cflag & CBAUD) == B38400) { | |
3909 | if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) | |
3910 | baudrate = 57600; | |
3911 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) | |
3912 | baudrate = 115200; | |
3913 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) | |
3914 | baudrate = 230400; | |
3915 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) | |
3916 | baudrate = 460800; | |
3917 | else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) | |
3918 | baudrate = (portp->baud_base / portp->custom_divisor); | |
3919 | } | |
3920 | if (baudrate > STL_SC26198MAXBAUD) | |
3921 | baudrate = STL_SC26198MAXBAUD; | |
3922 | ||
c62429d9 JS |
3923 | if (baudrate > 0) |
3924 | for (clk = 0; clk < SC26198_NRBAUDS; clk++) | |
1da177e4 LT |
3925 | if (baudrate <= sc26198_baudtable[clk]) |
3926 | break; | |
1da177e4 LT |
3927 | |
3928 | /* | |
3929 | * Check what form of modem signaling is required and set it up. | |
3930 | */ | |
3931 | if (tiosp->c_cflag & CLOCAL) { | |
3932 | portp->flags &= ~ASYNC_CHECK_CD; | |
3933 | } else { | |
3934 | iopr |= IOPR_DCDCOS; | |
3935 | imron |= IR_IOPORT; | |
3936 | portp->flags |= ASYNC_CHECK_CD; | |
3937 | } | |
3938 | ||
3939 | /* | |
3940 | * Setup sc26198 enhanced modes if we can. In particular we want to | |
3941 | * handle as much of the flow control as possible automatically. As | |
3942 | * well as saving a few CPU cycles it will also greatly improve flow | |
3943 | * control reliability. | |
3944 | */ | |
3945 | if (tiosp->c_iflag & IXON) { | |
3946 | mr0 |= MR0_SWFTX | MR0_SWFT; | |
3947 | imron |= IR_XONXOFF; | |
c62429d9 | 3948 | } else |
1da177e4 | 3949 | imroff |= IR_XONXOFF; |
c62429d9 | 3950 | |
1da177e4 LT |
3951 | if (tiosp->c_iflag & IXOFF) |
3952 | mr0 |= MR0_SWFRX; | |
3953 | ||
3954 | if (tiosp->c_cflag & CRTSCTS) { | |
3955 | mr2 |= MR2_AUTOCTS; | |
3956 | mr1 |= MR1_AUTORTS; | |
3957 | } | |
3958 | ||
3959 | /* | |
3960 | * All sc26198 register values calculated so go through and set | |
3961 | * them all up. | |
3962 | */ | |
3963 | ||
a0564e14 | 3964 | pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", |
1da177e4 | 3965 | portp->portnr, portp->panelnr, portp->brdnr); |
a0564e14 JS |
3966 | pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk); |
3967 | pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff); | |
3968 | pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n", | |
1da177e4 LT |
3969 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], |
3970 | tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]); | |
1da177e4 | 3971 | |
b65b5b59 | 3972 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
3973 | BRDENABLE(portp->brdnr, portp->pagenr); |
3974 | stl_sc26198setreg(portp, IMR, 0); | |
3975 | stl_sc26198updatereg(portp, MR0, mr0); | |
3976 | stl_sc26198updatereg(portp, MR1, mr1); | |
3977 | stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK); | |
3978 | stl_sc26198updatereg(portp, MR2, mr2); | |
3979 | stl_sc26198updatereg(portp, IOPIOR, | |
3980 | ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr)); | |
3981 | ||
3982 | if (baudrate > 0) { | |
3983 | stl_sc26198setreg(portp, TXCSR, clk); | |
3984 | stl_sc26198setreg(portp, RXCSR, clk); | |
3985 | } | |
3986 | ||
3987 | stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]); | |
3988 | stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]); | |
3989 | ||
3990 | ipr = stl_sc26198getreg(portp, IPR); | |
3991 | if (ipr & IPR_DCD) | |
3992 | portp->sigs &= ~TIOCM_CD; | |
3993 | else | |
3994 | portp->sigs |= TIOCM_CD; | |
3995 | ||
3996 | portp->imr = (portp->imr & ~imroff) | imron; | |
3997 | stl_sc26198setreg(portp, IMR, portp->imr); | |
3998 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 3999 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4000 | } |
4001 | ||
4002 | /*****************************************************************************/ | |
4003 | ||
4004 | /* | |
4005 | * Set the state of the DTR and RTS signals. | |
4006 | */ | |
4007 | ||
ca7ed0f2 | 4008 | static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts) |
1da177e4 LT |
4009 | { |
4010 | unsigned char iopioron, iopioroff; | |
4011 | unsigned long flags; | |
4012 | ||
a0564e14 JS |
4013 | pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp, |
4014 | dtr, rts); | |
1da177e4 LT |
4015 | |
4016 | iopioron = 0; | |
4017 | iopioroff = 0; | |
4018 | if (dtr == 0) | |
4019 | iopioroff |= IPR_DTR; | |
4020 | else if (dtr > 0) | |
4021 | iopioron |= IPR_DTR; | |
4022 | if (rts == 0) | |
4023 | iopioroff |= IPR_RTS; | |
4024 | else if (rts > 0) | |
4025 | iopioron |= IPR_RTS; | |
4026 | ||
b65b5b59 | 4027 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4028 | BRDENABLE(portp->brdnr, portp->pagenr); |
4029 | stl_sc26198setreg(portp, IOPIOR, | |
4030 | ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron)); | |
4031 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4032 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4033 | } |
4034 | ||
4035 | /*****************************************************************************/ | |
4036 | ||
4037 | /* | |
4038 | * Return the state of the signals. | |
4039 | */ | |
4040 | ||
ca7ed0f2 | 4041 | static int stl_sc26198getsignals(struct stlport *portp) |
1da177e4 LT |
4042 | { |
4043 | unsigned char ipr; | |
4044 | unsigned long flags; | |
4045 | int sigs; | |
4046 | ||
a0564e14 | 4047 | pr_debug("stl_sc26198getsignals(portp=%p)\n", portp); |
1da177e4 | 4048 | |
b65b5b59 | 4049 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4050 | BRDENABLE(portp->brdnr, portp->pagenr); |
4051 | ipr = stl_sc26198getreg(portp, IPR); | |
4052 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4053 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4054 | |
4055 | sigs = 0; | |
4056 | sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD; | |
4057 | sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS; | |
4058 | sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR; | |
4059 | sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS; | |
4060 | sigs |= TIOCM_DSR; | |
014c2544 | 4061 | return sigs; |
1da177e4 LT |
4062 | } |
4063 | ||
4064 | /*****************************************************************************/ | |
4065 | ||
4066 | /* | |
4067 | * Enable/Disable the Transmitter and/or Receiver. | |
4068 | */ | |
4069 | ||
ca7ed0f2 | 4070 | static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
4071 | { |
4072 | unsigned char ccr; | |
4073 | unsigned long flags; | |
4074 | ||
a0564e14 | 4075 | pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx); |
1da177e4 LT |
4076 | |
4077 | ccr = portp->crenable; | |
4078 | if (tx == 0) | |
4079 | ccr &= ~CR_TXENABLE; | |
4080 | else if (tx > 0) | |
4081 | ccr |= CR_TXENABLE; | |
4082 | if (rx == 0) | |
4083 | ccr &= ~CR_RXENABLE; | |
4084 | else if (rx > 0) | |
4085 | ccr |= CR_RXENABLE; | |
4086 | ||
b65b5b59 | 4087 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4088 | BRDENABLE(portp->brdnr, portp->pagenr); |
4089 | stl_sc26198setreg(portp, SCCR, ccr); | |
4090 | BRDDISABLE(portp->brdnr); | |
4091 | portp->crenable = ccr; | |
b65b5b59 | 4092 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4093 | } |
4094 | ||
4095 | /*****************************************************************************/ | |
4096 | ||
4097 | /* | |
4098 | * Start/stop the Transmitter and/or Receiver. | |
4099 | */ | |
4100 | ||
ca7ed0f2 | 4101 | static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx) |
1da177e4 LT |
4102 | { |
4103 | unsigned char imr; | |
4104 | unsigned long flags; | |
4105 | ||
a0564e14 | 4106 | pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx); |
1da177e4 LT |
4107 | |
4108 | imr = portp->imr; | |
4109 | if (tx == 0) | |
4110 | imr &= ~IR_TXRDY; | |
4111 | else if (tx == 1) | |
4112 | imr |= IR_TXRDY; | |
4113 | if (rx == 0) | |
4114 | imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG); | |
4115 | else if (rx > 0) | |
4116 | imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG; | |
4117 | ||
b65b5b59 | 4118 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4119 | BRDENABLE(portp->brdnr, portp->pagenr); |
4120 | stl_sc26198setreg(portp, IMR, imr); | |
4121 | BRDDISABLE(portp->brdnr); | |
4122 | portp->imr = imr; | |
4123 | if (tx > 0) | |
4124 | set_bit(ASYI_TXBUSY, &portp->istate); | |
b65b5b59 | 4125 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4126 | } |
4127 | ||
4128 | /*****************************************************************************/ | |
4129 | ||
4130 | /* | |
4131 | * Disable all interrupts from this port. | |
4132 | */ | |
4133 | ||
ca7ed0f2 | 4134 | static void stl_sc26198disableintrs(struct stlport *portp) |
1da177e4 LT |
4135 | { |
4136 | unsigned long flags; | |
4137 | ||
a0564e14 | 4138 | pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp); |
1da177e4 | 4139 | |
b65b5b59 | 4140 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4141 | BRDENABLE(portp->brdnr, portp->pagenr); |
4142 | portp->imr = 0; | |
4143 | stl_sc26198setreg(portp, IMR, 0); | |
4144 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4145 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4146 | } |
4147 | ||
4148 | /*****************************************************************************/ | |
4149 | ||
ca7ed0f2 | 4150 | static void stl_sc26198sendbreak(struct stlport *portp, int len) |
1da177e4 LT |
4151 | { |
4152 | unsigned long flags; | |
4153 | ||
a0564e14 | 4154 | pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len); |
1da177e4 | 4155 | |
b65b5b59 | 4156 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4157 | BRDENABLE(portp->brdnr, portp->pagenr); |
4158 | if (len == 1) { | |
4159 | stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK); | |
4160 | portp->stats.txbreaks++; | |
c62429d9 | 4161 | } else |
1da177e4 | 4162 | stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK); |
c62429d9 | 4163 | |
1da177e4 | 4164 | BRDDISABLE(portp->brdnr); |
b65b5b59 | 4165 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4166 | } |
4167 | ||
4168 | /*****************************************************************************/ | |
4169 | ||
4170 | /* | |
4171 | * Take flow control actions... | |
4172 | */ | |
4173 | ||
ca7ed0f2 | 4174 | static void stl_sc26198flowctrl(struct stlport *portp, int state) |
1da177e4 LT |
4175 | { |
4176 | struct tty_struct *tty; | |
4177 | unsigned long flags; | |
4178 | unsigned char mr0; | |
4179 | ||
a0564e14 | 4180 | pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 4181 | |
615e4a71 | 4182 | if (portp == NULL) |
1da177e4 LT |
4183 | return; |
4184 | tty = portp->tty; | |
615e4a71 | 4185 | if (tty == NULL) |
1da177e4 LT |
4186 | return; |
4187 | ||
b65b5b59 | 4188 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4189 | BRDENABLE(portp->brdnr, portp->pagenr); |
4190 | ||
4191 | if (state) { | |
4192 | if (tty->termios->c_iflag & IXOFF) { | |
4193 | mr0 = stl_sc26198getreg(portp, MR0); | |
4194 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4195 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXON); | |
4196 | mr0 |= MR0_SWFRX; | |
4197 | portp->stats.rxxon++; | |
4198 | stl_sc26198wait(portp); | |
4199 | stl_sc26198setreg(portp, MR0, mr0); | |
4200 | } | |
4201 | /* | |
4202 | * Question: should we return RTS to what it was before? It may | |
4203 | * have been set by an ioctl... Suppose not, since if you have | |
4204 | * hardware flow control set then it is pretty silly to go and | |
4205 | * set the RTS line by hand. | |
4206 | */ | |
4207 | if (tty->termios->c_cflag & CRTSCTS) { | |
4208 | stl_sc26198setreg(portp, MR1, | |
4209 | (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS)); | |
4210 | stl_sc26198setreg(portp, IOPIOR, | |
4211 | (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS)); | |
4212 | portp->stats.rxrtson++; | |
4213 | } | |
4214 | } else { | |
4215 | if (tty->termios->c_iflag & IXOFF) { | |
4216 | mr0 = stl_sc26198getreg(portp, MR0); | |
4217 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4218 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF); | |
4219 | mr0 &= ~MR0_SWFRX; | |
4220 | portp->stats.rxxoff++; | |
4221 | stl_sc26198wait(portp); | |
4222 | stl_sc26198setreg(portp, MR0, mr0); | |
4223 | } | |
4224 | if (tty->termios->c_cflag & CRTSCTS) { | |
4225 | stl_sc26198setreg(portp, MR1, | |
4226 | (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS)); | |
4227 | stl_sc26198setreg(portp, IOPIOR, | |
4228 | (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS)); | |
4229 | portp->stats.rxrtsoff++; | |
4230 | } | |
4231 | } | |
4232 | ||
4233 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4234 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4235 | } |
4236 | ||
4237 | /*****************************************************************************/ | |
4238 | ||
4239 | /* | |
4240 | * Send a flow control character. | |
4241 | */ | |
4242 | ||
ca7ed0f2 | 4243 | static void stl_sc26198sendflow(struct stlport *portp, int state) |
1da177e4 LT |
4244 | { |
4245 | struct tty_struct *tty; | |
4246 | unsigned long flags; | |
4247 | unsigned char mr0; | |
4248 | ||
a0564e14 | 4249 | pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state); |
1da177e4 | 4250 | |
615e4a71 | 4251 | if (portp == NULL) |
1da177e4 LT |
4252 | return; |
4253 | tty = portp->tty; | |
615e4a71 | 4254 | if (tty == NULL) |
1da177e4 LT |
4255 | return; |
4256 | ||
b65b5b59 | 4257 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4258 | BRDENABLE(portp->brdnr, portp->pagenr); |
4259 | if (state) { | |
4260 | mr0 = stl_sc26198getreg(portp, MR0); | |
4261 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4262 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXON); | |
4263 | mr0 |= MR0_SWFRX; | |
4264 | portp->stats.rxxon++; | |
4265 | stl_sc26198wait(portp); | |
4266 | stl_sc26198setreg(portp, MR0, mr0); | |
4267 | } else { | |
4268 | mr0 = stl_sc26198getreg(portp, MR0); | |
4269 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4270 | stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF); | |
4271 | mr0 &= ~MR0_SWFRX; | |
4272 | portp->stats.rxxoff++; | |
4273 | stl_sc26198wait(portp); | |
4274 | stl_sc26198setreg(portp, MR0, mr0); | |
4275 | } | |
4276 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4277 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4278 | } |
4279 | ||
4280 | /*****************************************************************************/ | |
4281 | ||
ca7ed0f2 | 4282 | static void stl_sc26198flush(struct stlport *portp) |
1da177e4 LT |
4283 | { |
4284 | unsigned long flags; | |
4285 | ||
a0564e14 | 4286 | pr_debug("stl_sc26198flush(portp=%p)\n", portp); |
1da177e4 | 4287 | |
615e4a71 | 4288 | if (portp == NULL) |
1da177e4 LT |
4289 | return; |
4290 | ||
b65b5b59 | 4291 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4292 | BRDENABLE(portp->brdnr, portp->pagenr); |
4293 | stl_sc26198setreg(portp, SCCR, CR_TXRESET); | |
4294 | stl_sc26198setreg(portp, SCCR, portp->crenable); | |
4295 | BRDDISABLE(portp->brdnr); | |
4296 | portp->tx.tail = portp->tx.head; | |
b65b5b59 | 4297 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 LT |
4298 | } |
4299 | ||
4300 | /*****************************************************************************/ | |
4301 | ||
4302 | /* | |
4303 | * Return the current state of data flow on this port. This is only | |
4304 | * really interresting when determining if data has fully completed | |
4305 | * transmission or not... The sc26198 interrupt scheme cannot | |
4306 | * determine when all data has actually drained, so we need to | |
4307 | * check the port statusy register to be sure. | |
4308 | */ | |
4309 | ||
ca7ed0f2 | 4310 | static int stl_sc26198datastate(struct stlport *portp) |
1da177e4 LT |
4311 | { |
4312 | unsigned long flags; | |
4313 | unsigned char sr; | |
4314 | ||
a0564e14 | 4315 | pr_debug("stl_sc26198datastate(portp=%p)\n", portp); |
1da177e4 | 4316 | |
615e4a71 | 4317 | if (portp == NULL) |
014c2544 | 4318 | return 0; |
1da177e4 | 4319 | if (test_bit(ASYI_TXBUSY, &portp->istate)) |
014c2544 | 4320 | return 1; |
1da177e4 | 4321 | |
b65b5b59 | 4322 | spin_lock_irqsave(&brd_lock, flags); |
1da177e4 LT |
4323 | BRDENABLE(portp->brdnr, portp->pagenr); |
4324 | sr = stl_sc26198getreg(portp, SR); | |
4325 | BRDDISABLE(portp->brdnr); | |
b65b5b59 | 4326 | spin_unlock_irqrestore(&brd_lock, flags); |
1da177e4 | 4327 | |
014c2544 | 4328 | return (sr & SR_TXEMPTY) ? 0 : 1; |
1da177e4 LT |
4329 | } |
4330 | ||
4331 | /*****************************************************************************/ | |
4332 | ||
4333 | /* | |
4334 | * Delay for a small amount of time, to give the sc26198 a chance | |
4335 | * to process a command... | |
4336 | */ | |
4337 | ||
ca7ed0f2 | 4338 | static void stl_sc26198wait(struct stlport *portp) |
1da177e4 LT |
4339 | { |
4340 | int i; | |
4341 | ||
a0564e14 | 4342 | pr_debug("stl_sc26198wait(portp=%p)\n", portp); |
1da177e4 | 4343 | |
615e4a71 | 4344 | if (portp == NULL) |
1da177e4 LT |
4345 | return; |
4346 | ||
c62429d9 | 4347 | for (i = 0; i < 20; i++) |
1da177e4 LT |
4348 | stl_sc26198getglobreg(portp, TSTR); |
4349 | } | |
4350 | ||
4351 | /*****************************************************************************/ | |
4352 | ||
4353 | /* | |
4354 | * If we are TX flow controlled and in IXANY mode then we may | |
4355 | * need to unflow control here. We gotta do this because of the | |
4356 | * automatic flow control modes of the sc26198. | |
4357 | */ | |
4358 | ||
60be4810 | 4359 | static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty) |
1da177e4 LT |
4360 | { |
4361 | unsigned char mr0; | |
4362 | ||
4363 | mr0 = stl_sc26198getreg(portp, MR0); | |
4364 | stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX)); | |
4365 | stl_sc26198setreg(portp, SCCR, CR_HOSTXON); | |
4366 | stl_sc26198wait(portp); | |
4367 | stl_sc26198setreg(portp, MR0, mr0); | |
4368 | clear_bit(ASYI_TXFLOWED, &portp->istate); | |
4369 | } | |
4370 | ||
4371 | /*****************************************************************************/ | |
4372 | ||
4373 | /* | |
4374 | * Interrupt service routine for sc26198 panels. | |
4375 | */ | |
4376 | ||
ca7ed0f2 | 4377 | static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase) |
1da177e4 | 4378 | { |
ca7ed0f2 | 4379 | struct stlport *portp; |
1da177e4 LT |
4380 | unsigned int iack; |
4381 | ||
b65b5b59 AC |
4382 | spin_lock(&brd_lock); |
4383 | ||
1da177e4 LT |
4384 | /* |
4385 | * Work around bug in sc26198 chip... Cannot have A6 address | |
4386 | * line of UART high, else iack will be returned as 0. | |
4387 | */ | |
4388 | outb(0, (iobase + 1)); | |
4389 | ||
4390 | iack = inb(iobase + XP_IACK); | |
4391 | portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)]; | |
4392 | ||
4393 | if (iack & IVR_RXDATA) | |
4394 | stl_sc26198rxisr(portp, iack); | |
4395 | else if (iack & IVR_TXDATA) | |
4396 | stl_sc26198txisr(portp); | |
4397 | else | |
4398 | stl_sc26198otherisr(portp, iack); | |
b65b5b59 AC |
4399 | |
4400 | spin_unlock(&brd_lock); | |
1da177e4 LT |
4401 | } |
4402 | ||
4403 | /*****************************************************************************/ | |
4404 | ||
4405 | /* | |
4406 | * Transmit interrupt handler. This has gotta be fast! Handling TX | |
4407 | * chars is pretty simple, stuff as many as possible from the TX buffer | |
4408 | * into the sc26198 FIFO. | |
4409 | * In practice it is possible that interrupts are enabled but that the | |
4410 | * port has been hung up. Need to handle not having any TX buffer here, | |
4411 | * this is done by using the side effect that head and tail will also | |
4412 | * be NULL if the buffer has been freed. | |
4413 | */ | |
4414 | ||
ca7ed0f2 | 4415 | static void stl_sc26198txisr(struct stlport *portp) |
1da177e4 LT |
4416 | { |
4417 | unsigned int ioaddr; | |
4418 | unsigned char mr0; | |
4419 | int len, stlen; | |
4420 | char *head, *tail; | |
4421 | ||
a0564e14 | 4422 | pr_debug("stl_sc26198txisr(portp=%p)\n", portp); |
1da177e4 LT |
4423 | |
4424 | ioaddr = portp->ioaddr; | |
4425 | head = portp->tx.head; | |
4426 | tail = portp->tx.tail; | |
4427 | len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head)); | |
4428 | if ((len == 0) || ((len < STL_TXBUFLOW) && | |
4429 | (test_bit(ASYI_TXLOW, &portp->istate) == 0))) { | |
4430 | set_bit(ASYI_TXLOW, &portp->istate); | |
ccfea3c9 JS |
4431 | if (portp->tty) |
4432 | tty_wakeup(portp->tty); | |
1da177e4 LT |
4433 | } |
4434 | ||
4435 | if (len == 0) { | |
4436 | outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR)); | |
4437 | mr0 = inb(ioaddr + XP_DATA); | |
4438 | if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) { | |
4439 | portp->imr &= ~IR_TXRDY; | |
4440 | outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR)); | |
4441 | outb(portp->imr, (ioaddr + XP_DATA)); | |
4442 | clear_bit(ASYI_TXBUSY, &portp->istate); | |
4443 | } else { | |
4444 | mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY); | |
4445 | outb(mr0, (ioaddr + XP_DATA)); | |
4446 | } | |
4447 | } else { | |
843b568c | 4448 | len = min(len, SC26198_TXFIFOSIZE); |
1da177e4 | 4449 | portp->stats.txtotal += len; |
319fe7c3 JS |
4450 | stlen = min_t(unsigned int, len, |
4451 | (portp->tx.buf + STL_TXBUFSIZE) - tail); | |
1da177e4 LT |
4452 | outb(GTXFIFO, (ioaddr + XP_ADDR)); |
4453 | outsb((ioaddr + XP_DATA), tail, stlen); | |
4454 | len -= stlen; | |
4455 | tail += stlen; | |
4456 | if (tail >= (portp->tx.buf + STL_TXBUFSIZE)) | |
4457 | tail = portp->tx.buf; | |
4458 | if (len > 0) { | |
4459 | outsb((ioaddr + XP_DATA), tail, len); | |
4460 | tail += len; | |
4461 | } | |
4462 | portp->tx.tail = tail; | |
4463 | } | |
4464 | } | |
4465 | ||
4466 | /*****************************************************************************/ | |
4467 | ||
4468 | /* | |
4469 | * Receive character interrupt handler. Determine if we have good chars | |
4470 | * or bad chars and then process appropriately. Good chars are easy | |
4471 | * just shove the lot into the RX buffer and set all status byte to 0. | |
4472 | * If a bad RX char then process as required. This routine needs to be | |
4473 | * fast! In practice it is possible that we get an interrupt on a port | |
4474 | * that is closed. This can happen on hangups - since they completely | |
4475 | * shutdown a port not in user context. Need to handle this case. | |
4476 | */ | |
4477 | ||
ca7ed0f2 | 4478 | static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack) |
1da177e4 LT |
4479 | { |
4480 | struct tty_struct *tty; | |
4481 | unsigned int len, buflen, ioaddr; | |
4482 | ||
a0564e14 | 4483 | pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack); |
1da177e4 LT |
4484 | |
4485 | tty = portp->tty; | |
4486 | ioaddr = portp->ioaddr; | |
4487 | outb(GIBCR, (ioaddr + XP_ADDR)); | |
4488 | len = inb(ioaddr + XP_DATA) + 1; | |
4489 | ||
4490 | if ((iack & IVR_TYPEMASK) == IVR_RXDATA) { | |
33f0f88f | 4491 | if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) { |
319fe7c3 | 4492 | len = min_t(unsigned int, len, sizeof(stl_unwanted)); |
1da177e4 LT |
4493 | outb(GRXFIFO, (ioaddr + XP_ADDR)); |
4494 | insb((ioaddr + XP_DATA), &stl_unwanted[0], len); | |
4495 | portp->stats.rxlost += len; | |
4496 | portp->stats.rxtotal += len; | |
4497 | } else { | |
843b568c | 4498 | len = min(len, buflen); |
1da177e4 | 4499 | if (len > 0) { |
33f0f88f | 4500 | unsigned char *ptr; |
1da177e4 | 4501 | outb(GRXFIFO, (ioaddr + XP_ADDR)); |
33f0f88f AC |
4502 | tty_prepare_flip_string(tty, &ptr, len); |
4503 | insb((ioaddr + XP_DATA), ptr, len); | |
1da177e4 LT |
4504 | tty_schedule_flip(tty); |
4505 | portp->stats.rxtotal += len; | |
4506 | } | |
4507 | } | |
4508 | } else { | |
4509 | stl_sc26198rxbadchars(portp); | |
4510 | } | |
4511 | ||
4512 | /* | |
4513 | * If we are TX flow controlled and in IXANY mode then we may need | |
4514 | * to unflow control here. We gotta do this because of the automatic | |
4515 | * flow control modes of the sc26198. | |
4516 | */ | |
4517 | if (test_bit(ASYI_TXFLOWED, &portp->istate)) { | |
615e4a71 JS |
4518 | if ((tty != NULL) && |
4519 | (tty->termios != NULL) && | |
1da177e4 LT |
4520 | (tty->termios->c_iflag & IXANY)) { |
4521 | stl_sc26198txunflow(portp, tty); | |
4522 | } | |
4523 | } | |
4524 | } | |
4525 | ||
4526 | /*****************************************************************************/ | |
4527 | ||
4528 | /* | |
4529 | * Process an RX bad character. | |
4530 | */ | |
4531 | ||
60be4810 | 4532 | static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch) |
1da177e4 LT |
4533 | { |
4534 | struct tty_struct *tty; | |
4535 | unsigned int ioaddr; | |
4536 | ||
4537 | tty = portp->tty; | |
4538 | ioaddr = portp->ioaddr; | |
4539 | ||
4540 | if (status & SR_RXPARITY) | |
4541 | portp->stats.rxparity++; | |
4542 | if (status & SR_RXFRAMING) | |
4543 | portp->stats.rxframing++; | |
4544 | if (status & SR_RXOVERRUN) | |
4545 | portp->stats.rxoverrun++; | |
4546 | if (status & SR_RXBREAK) | |
4547 | portp->stats.rxbreaks++; | |
4548 | ||
615e4a71 | 4549 | if ((tty != NULL) && |
1da177e4 LT |
4550 | ((portp->rxignoremsk & status) == 0)) { |
4551 | if (portp->rxmarkmsk & status) { | |
4552 | if (status & SR_RXBREAK) { | |
4553 | status = TTY_BREAK; | |
4554 | if (portp->flags & ASYNC_SAK) { | |
4555 | do_SAK(tty); | |
4556 | BRDENABLE(portp->brdnr, portp->pagenr); | |
4557 | } | |
c62429d9 | 4558 | } else if (status & SR_RXPARITY) |
1da177e4 | 4559 | status = TTY_PARITY; |
c62429d9 | 4560 | else if (status & SR_RXFRAMING) |
1da177e4 | 4561 | status = TTY_FRAME; |
c62429d9 | 4562 | else if(status & SR_RXOVERRUN) |
1da177e4 | 4563 | status = TTY_OVERRUN; |
c62429d9 | 4564 | else |
1da177e4 | 4565 | status = 0; |
c62429d9 | 4566 | } else |
1da177e4 | 4567 | status = 0; |
1da177e4 | 4568 | |
33f0f88f AC |
4569 | tty_insert_flip_char(tty, ch, status); |
4570 | tty_schedule_flip(tty); | |
1da177e4 LT |
4571 | |
4572 | if (status == 0) | |
4573 | portp->stats.rxtotal++; | |
4574 | } | |
4575 | } | |
4576 | ||
4577 | /*****************************************************************************/ | |
4578 | ||
4579 | /* | |
4580 | * Process all characters in the RX FIFO of the UART. Check all char | |
4581 | * status bytes as well, and process as required. We need to check | |
4582 | * all bytes in the FIFO, in case some more enter the FIFO while we | |
4583 | * are here. To get the exact character error type we need to switch | |
4584 | * into CHAR error mode (that is why we need to make sure we empty | |
4585 | * the FIFO). | |
4586 | */ | |
4587 | ||
ca7ed0f2 | 4588 | static void stl_sc26198rxbadchars(struct stlport *portp) |
1da177e4 LT |
4589 | { |
4590 | unsigned char status, mr1; | |
4591 | char ch; | |
4592 | ||
4593 | /* | |
4594 | * To get the precise error type for each character we must switch | |
4595 | * back into CHAR error mode. | |
4596 | */ | |
4597 | mr1 = stl_sc26198getreg(portp, MR1); | |
4598 | stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK)); | |
4599 | ||
4600 | while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) { | |
4601 | stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR); | |
4602 | ch = stl_sc26198getreg(portp, RXFIFO); | |
4603 | stl_sc26198rxbadch(portp, status, ch); | |
4604 | } | |
4605 | ||
4606 | /* | |
4607 | * To get correct interrupt class we must switch back into BLOCK | |
4608 | * error mode. | |
4609 | */ | |
4610 | stl_sc26198setreg(portp, MR1, mr1); | |
4611 | } | |
4612 | ||
4613 | /*****************************************************************************/ | |
4614 | ||
4615 | /* | |
4616 | * Other interrupt handler. This includes modem signals, flow | |
4617 | * control actions, etc. Most stuff is left to off-level interrupt | |
4618 | * processing time. | |
4619 | */ | |
4620 | ||
ca7ed0f2 | 4621 | static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack) |
1da177e4 LT |
4622 | { |
4623 | unsigned char cir, ipr, xisr; | |
4624 | ||
a0564e14 | 4625 | pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack); |
1da177e4 LT |
4626 | |
4627 | cir = stl_sc26198getglobreg(portp, CIR); | |
4628 | ||
4629 | switch (cir & CIR_SUBTYPEMASK) { | |
4630 | case CIR_SUBCOS: | |
4631 | ipr = stl_sc26198getreg(portp, IPR); | |
4632 | if (ipr & IPR_DCDCHANGE) { | |
ccfea3c9 | 4633 | stl_cd_change(portp); |
1da177e4 LT |
4634 | portp->stats.modem++; |
4635 | } | |
4636 | break; | |
4637 | case CIR_SUBXONXOFF: | |
4638 | xisr = stl_sc26198getreg(portp, XISR); | |
4639 | if (xisr & XISR_RXXONGOT) { | |
4640 | set_bit(ASYI_TXFLOWED, &portp->istate); | |
4641 | portp->stats.txxoff++; | |
4642 | } | |
4643 | if (xisr & XISR_RXXOFFGOT) { | |
4644 | clear_bit(ASYI_TXFLOWED, &portp->istate); | |
4645 | portp->stats.txxon++; | |
4646 | } | |
4647 | break; | |
4648 | case CIR_SUBBREAK: | |
4649 | stl_sc26198setreg(portp, SCCR, CR_BREAKRESET); | |
4650 | stl_sc26198rxbadchars(portp); | |
4651 | break; | |
4652 | default: | |
4653 | break; | |
4654 | } | |
4655 | } | |
4656 | ||
fc06b5cf JS |
4657 | static void stl_free_isabrds(void) |
4658 | { | |
4659 | struct stlbrd *brdp; | |
4660 | unsigned int i; | |
4661 | ||
4662 | for (i = 0; i < stl_nrbrds; i++) { | |
4663 | if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED)) | |
4664 | continue; | |
4665 | ||
4666 | free_irq(brdp->irq, brdp); | |
4667 | ||
4668 | stl_cleanup_panels(brdp); | |
4669 | ||
4670 | release_region(brdp->ioaddr1, brdp->iosize1); | |
4671 | if (brdp->iosize2 > 0) | |
4672 | release_region(brdp->ioaddr2, brdp->iosize2); | |
4673 | ||
4674 | kfree(brdp); | |
4675 | stl_brds[i] = NULL; | |
4676 | } | |
4677 | } | |
4678 | ||
23b85a15 JS |
4679 | /* |
4680 | * Loadable module initialization stuff. | |
4681 | */ | |
4682 | static int __init stallion_module_init(void) | |
4683 | { | |
843b568c JS |
4684 | struct stlbrd *brdp; |
4685 | struct stlconf conf; | |
aeaccfe4 | 4686 | unsigned int i, j; |
fc06b5cf | 4687 | int retval; |
23b85a15 JS |
4688 | |
4689 | printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion); | |
4690 | ||
4691 | spin_lock_init(&stallion_lock); | |
4692 | spin_lock_init(&brd_lock); | |
4693 | ||
e415109f JS |
4694 | stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS); |
4695 | if (!stl_serial) { | |
4696 | retval = -ENOMEM; | |
4697 | goto err; | |
4698 | } | |
4699 | ||
4700 | stl_serial->owner = THIS_MODULE; | |
4701 | stl_serial->driver_name = stl_drvname; | |
4702 | stl_serial->name = "ttyE"; | |
4703 | stl_serial->major = STL_SERIALMAJOR; | |
4704 | stl_serial->minor_start = 0; | |
4705 | stl_serial->type = TTY_DRIVER_TYPE_SERIAL; | |
4706 | stl_serial->subtype = SERIAL_TYPE_NORMAL; | |
4707 | stl_serial->init_termios = stl_deftermios; | |
4708 | stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; | |
4709 | tty_set_operations(stl_serial, &stl_ops); | |
4710 | ||
4711 | retval = tty_register_driver(stl_serial); | |
4712 | if (retval) { | |
4713 | printk("STALLION: failed to register serial driver\n"); | |
4714 | goto err_frtty; | |
4715 | } | |
4716 | ||
843b568c JS |
4717 | /* |
4718 | * Find any dynamically supported boards. That is via module load | |
4719 | * line options. | |
4720 | */ | |
4721 | for (i = stl_nrbrds; i < stl_nargs; i++) { | |
4722 | memset(&conf, 0, sizeof(conf)); | |
4723 | if (stl_parsebrd(&conf, stl_brdsp[i]) == 0) | |
4724 | continue; | |
4725 | if ((brdp = stl_allocbrd()) == NULL) | |
4726 | continue; | |
4727 | brdp->brdnr = i; | |
4728 | brdp->brdtype = conf.brdtype; | |
4729 | brdp->ioaddr1 = conf.ioaddr1; | |
4730 | brdp->ioaddr2 = conf.ioaddr2; | |
4731 | brdp->irq = conf.irq; | |
4732 | brdp->irqtype = conf.irqtype; | |
b08b5ad9 IK |
4733 | stl_brds[brdp->brdnr] = brdp; |
4734 | if (stl_brdinit(brdp)) { | |
4735 | stl_brds[brdp->brdnr] = NULL; | |
843b568c | 4736 | kfree(brdp); |
b08b5ad9 | 4737 | } else { |
aeaccfe4 JS |
4738 | for (j = 0; j < brdp->nrports; j++) |
4739 | tty_register_device(stl_serial, | |
4740 | brdp->brdnr * STL_MAXPORTS + j, NULL); | |
843b568c | 4741 | stl_nrbrds = i + 1; |
79cfe7ab | 4742 | } |
843b568c | 4743 | } |
23b85a15 | 4744 | |
79cfe7ab | 4745 | /* this has to be _after_ isa finding because of locking */ |
b1b84fe0 | 4746 | retval = pci_register_driver(&stl_pcidriver); |
e415109f JS |
4747 | if (retval && stl_nrbrds == 0) { |
4748 | printk(KERN_ERR "STALLION: can't register pci driver\n"); | |
4749 | goto err_unrtty; | |
fc06b5cf | 4750 | } |
23b85a15 JS |
4751 | |
4752 | /* | |
4753 | * Set up a character driver for per board stuff. This is mainly used | |
4754 | * to do stats ioctls on the ports. | |
4755 | */ | |
4756 | if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem)) | |
4757 | printk("STALLION: failed to register serial board device\n"); | |
4758 | ||
4759 | stallion_class = class_create(THIS_MODULE, "staliomem"); | |
e415109f JS |
4760 | if (IS_ERR(stallion_class)) |
4761 | printk("STALLION: failed to create class\n"); | |
23b85a15 | 4762 | for (i = 0; i < 4; i++) |
07c015e7 | 4763 | device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i), |
4764 | "staliomem%d", i); | |
23b85a15 | 4765 | |
23b85a15 | 4766 | return 0; |
e415109f JS |
4767 | err_unrtty: |
4768 | tty_unregister_driver(stl_serial); | |
4769 | err_frtty: | |
fc06b5cf | 4770 | put_tty_driver(stl_serial); |
b1b84fe0 JS |
4771 | err: |
4772 | return retval; | |
23b85a15 JS |
4773 | } |
4774 | ||
4775 | static void __exit stallion_module_exit(void) | |
4776 | { | |
aeaccfe4 JS |
4777 | struct stlbrd *brdp; |
4778 | unsigned int i, j; | |
23b85a15 JS |
4779 | |
4780 | pr_debug("cleanup_module()\n"); | |
4781 | ||
4782 | printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle, | |
4783 | stl_drvversion); | |
4784 | ||
4785 | /* | |
4786 | * Free up all allocated resources used by the ports. This includes | |
4787 | * memory and interrupts. As part of this process we will also do | |
4788 | * a hangup on every open port - to try to flush out any processes | |
4789 | * hanging onto ports. | |
4790 | */ | |
aeaccfe4 JS |
4791 | for (i = 0; i < stl_nrbrds; i++) { |
4792 | if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED)) | |
4793 | continue; | |
4794 | for (j = 0; j < brdp->nrports; j++) | |
4795 | tty_unregister_device(stl_serial, | |
4796 | brdp->brdnr * STL_MAXPORTS + j); | |
4797 | } | |
fc06b5cf | 4798 | |
23b85a15 | 4799 | for (i = 0; i < 4; i++) |
07c015e7 | 4800 | device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i)); |
68fc4fab | 4801 | unregister_chrdev(STL_SIOMEMMAJOR, "staliomem"); |
23b85a15 JS |
4802 | class_destroy(stallion_class); |
4803 | ||
b1b84fe0 JS |
4804 | pci_unregister_driver(&stl_pcidriver); |
4805 | ||
fc06b5cf | 4806 | stl_free_isabrds(); |
e415109f JS |
4807 | |
4808 | tty_unregister_driver(stl_serial); | |
4809 | put_tty_driver(stl_serial); | |
23b85a15 JS |
4810 | } |
4811 | ||
4812 | module_init(stallion_module_init); | |
4813 | module_exit(stallion_module_exit); | |
4814 | ||
4815 | MODULE_AUTHOR("Greg Ungerer"); | |
4816 | MODULE_DESCRIPTION("Stallion Multiport Serial Driver"); | |
4817 | MODULE_LICENSE("GPL"); |