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Merge branch 'linux-2.6'
[deliverable/linux.git] / drivers / char / stallion.c
CommitLineData
1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4
LT		 29#include <linux/module.h>
30#include <linux/slab.h>
31#include <linux/interrupt.h>
32#include <linux/tty.h>
33#include <linux/tty_flip.h>
34#include <linux/serial.h>
35#include <linux/cd1400.h>
36#include <linux/sc26198.h>
37#include <linux/comstats.h>
38#include <linux/stallion.h>
39#include <linux/ioport.h>
40#include <linux/init.h>
41#include <linux/smp_lock.h>
1da177e4
LT		 42#include <linux/device.h>
43#include <linux/delay.h>
843b568c 44#include <linux/ctype.h>
1da177e4
LT		 45
46#include <asm/io.h>
47#include <asm/uaccess.h>
48
1da177e4 49#include <linux/pci.h>
1da177e4
LT		 50
51/*****************************************************************************/
52
53/*
54 * Define different board types. Use the standard Stallion "assigned"
55 * board numbers. Boards supported in this driver are abbreviated as
56 * EIO = EasyIO and ECH = EasyConnection 8/32.
57 */
58#define BRD_EASYIO 20
59#define BRD_ECH 21
60#define BRD_ECHMC 22
61#define BRD_ECHPCI 26
62#define BRD_ECH64PCI 27
63#define BRD_EASYIOPCI 28
64
843b568c 65struct stlconf {
6b2c9457 66 unsigned int brdtype;
1da177e4
LT		 67 int ioaddr1;
68 int ioaddr2;
69 unsigned long memaddr;
70 int irq;
71 int irqtype;
1da177e4
LT		 72};
73
843b568c 74static unsigned int stl_nrbrds;
1da177e4
LT		 75
76/*****************************************************************************/
77
78/*
79 * Define some important driver characteristics. Device major numbers
80 * allocated as per Linux Device Registry.
81 */
82#ifndef STL_SIOMEMMAJOR
83#define STL_SIOMEMMAJOR 28
84#endif
85#ifndef STL_SERIALMAJOR
86#define STL_SERIALMAJOR 24
87#endif
88#ifndef STL_CALLOUTMAJOR
89#define STL_CALLOUTMAJOR 25
90#endif
91
92/*
93 * Set the TX buffer size. Bigger is better, but we don't want
94 * to chew too much memory with buffers!
95 */
96#define STL_TXBUFLOW 512
97#define STL_TXBUFSIZE 4096
98
99/*****************************************************************************/
100
101/*
102 * Define our local driver identity first. Set up stuff to deal with
103 * all the local structures required by a serial tty driver.
104 */
105static char *stl_drvtitle = "Stallion Multiport Serial Driver";
106static char *stl_drvname = "stallion";
107static char *stl_drvversion = "5.6.0";
108
109static struct tty_driver *stl_serial;
110
1da177e4
LT		 111/*
112 * Define a local default termios struct. All ports will be created
113 * with this termios initially. Basically all it defines is a raw port
114 * at 9600, 8 data bits, 1 stop bit.
115 */
606d099c 116static struct ktermios stl_deftermios = {
1da177e4
LT		 117 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
118 .c_cc = INIT_C_CC,
606d099c
AC		 119 .c_ispeed = 9600,
120 .c_ospeed = 9600,
1da177e4
LT		 121};
122
1da177e4
LT		 123/*
124 * Define global place to put buffer overflow characters.
125 */
126static char stl_unwanted[SC26198_RXFIFOSIZE];
127
128/*****************************************************************************/
129
79cfe7ab 130static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 131static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4
LT		 132
133/*
134 * Per board state flags. Used with the state field of the board struct.
135 * Not really much here!
136 */
137#define BRD_FOUND 0x1
fc06b5cf
JS		 138#define STL_PROBED 0x2
139
1da177e4
LT		 140
141/*
142 * Define the port structure istate flags. These set of flags are
143 * modified at interrupt time - so setting and reseting them needs
144 * to be atomic. Use the bit clear/setting routines for this.
145 */
146#define ASYI_TXBUSY 1
147#define ASYI_TXLOW 2
148#define ASYI_DCDCHANGE 3
149#define ASYI_TXFLOWED 4
150
151/*
152 * Define an array of board names as printable strings. Handy for
153 * referencing boards when printing trace and stuff.
154 */
155static char *stl_brdnames[] = {
615e4a71
JS		 156 NULL,
157 NULL,
158 NULL,
159 NULL,
160 NULL,
161 NULL,
162 NULL,
163 NULL,
164 NULL,
165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
1da177e4
LT		 176 "EasyIO",
177 "EC8/32-AT",
178 "EC8/32-MC",
615e4a71
JS		 179 NULL,
180 NULL,
181 NULL,
1da177e4
LT		 182 "EC8/32-PCI",
183 "EC8/64-PCI",
184 "EasyIO-PCI",
185};
186
187/*****************************************************************************/
188
189/*
190 * Define some string labels for arguments passed from the module
191 * load line. These allow for easy board definitions, and easy
192 * modification of the io, memory and irq resoucres.
193 */
6b2c9457 194static unsigned int stl_nargs;
1da177e4
LT		 195static char *board0[4];
196static char *board1[4];
197static char *board2[4];
198static char *board3[4];
199
200static char **stl_brdsp[] = {
201 (char **) &board0,
202 (char **) &board1,
203 (char **) &board2,
204 (char **) &board3
205};
206
207/*
208 * Define a set of common board names, and types. This is used to
209 * parse any module arguments.
210 */
211
ca7ed0f2 212static struct {
1da177e4
LT		 213 char *name;
214 int type;
ca7ed0f2 215} stl_brdstr[] = {
1da177e4
LT		 216 { "easyio", BRD_EASYIO },
217 { "eio", BRD_EASYIO },
218 { "20", BRD_EASYIO },
219 { "ec8/32", BRD_ECH },
220 { "ec8/32-at", BRD_ECH },
221 { "ec8/32-isa", BRD_ECH },
222 { "ech", BRD_ECH },
223 { "echat", BRD_ECH },
224 { "21", BRD_ECH },
225 { "ec8/32-mc", BRD_ECHMC },
226 { "ec8/32-mca", BRD_ECHMC },
227 { "echmc", BRD_ECHMC },
228 { "echmca", BRD_ECHMC },
229 { "22", BRD_ECHMC },
230 { "ec8/32-pc", BRD_ECHPCI },
231 { "ec8/32-pci", BRD_ECHPCI },
232 { "26", BRD_ECHPCI },
233 { "ec8/64-pc", BRD_ECH64PCI },
234 { "ec8/64-pci", BRD_ECH64PCI },
235 { "ech-pci", BRD_ECH64PCI },
236 { "echpci", BRD_ECH64PCI },
237 { "echpc", BRD_ECH64PCI },
238 { "27", BRD_ECH64PCI },
239 { "easyio-pc", BRD_EASYIOPCI },
240 { "easyio-pci", BRD_EASYIOPCI },
241 { "eio-pci", BRD_EASYIOPCI },
242 { "eiopci", BRD_EASYIOPCI },
243 { "28", BRD_EASYIOPCI },
244};
245
246/*
247 * Define the module agruments.
248 */
1da177e4
LT		 249
250module_param_array(board0, charp, &stl_nargs, 0);
251MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
252module_param_array(board1, charp, &stl_nargs, 0);
253MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
254module_param_array(board2, charp, &stl_nargs, 0);
255MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
256module_param_array(board3, charp, &stl_nargs, 0);
257MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
258
259/*****************************************************************************/
260
261/*
262 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
263 * to the directly accessible io ports of these boards (not the uarts -
264 * they are in cd1400.h and sc26198.h).
265 */
266#define EIO_8PORTRS 0x04
267#define EIO_4PORTRS 0x05
268#define EIO_8PORTDI 0x00
269#define EIO_8PORTM 0x06
270#define EIO_MK3 0x03
271#define EIO_IDBITMASK 0x07
272
273#define EIO_BRDMASK 0xf0
274#define ID_BRD4 0x10
275#define ID_BRD8 0x20
276#define ID_BRD16 0x30
277
278#define EIO_INTRPEND 0x08
279#define EIO_INTEDGE 0x00
280#define EIO_INTLEVEL 0x08
281#define EIO_0WS 0x10
282
283#define ECH_ID 0xa0
284#define ECH_IDBITMASK 0xe0
285#define ECH_BRDENABLE 0x08
286#define ECH_BRDDISABLE 0x00
287#define ECH_INTENABLE 0x01
288#define ECH_INTDISABLE 0x00
289#define ECH_INTLEVEL 0x02
290#define ECH_INTEDGE 0x00
291#define ECH_INTRPEND 0x01
292#define ECH_BRDRESET 0x01
293
294#define ECHMC_INTENABLE 0x01
295#define ECHMC_BRDRESET 0x02
296
297#define ECH_PNLSTATUS 2
298#define ECH_PNL16PORT 0x20
299#define ECH_PNLIDMASK 0x07
300#define ECH_PNLXPID 0x40
301#define ECH_PNLINTRPEND 0x80
302
303#define ECH_ADDR2MASK 0x1e0
304
305/*
306 * Define the vector mapping bits for the programmable interrupt board
307 * hardware. These bits encode the interrupt for the board to use - it
308 * is software selectable (except the EIO-8M).
309 */
310static unsigned char stl_vecmap[] = {
311 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
312 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
313};
314
b65b5b59
AC		 315/*
316 * Lock ordering is that you may not take stallion_lock holding
317 * brd_lock.
318 */
319
320static spinlock_t brd_lock; /* Guard the board mapping */
321static spinlock_t stallion_lock; /* Guard the tty driver */
322
1da177e4
LT		 323/*
324 * Set up enable and disable macros for the ECH boards. They require
325 * the secondary io address space to be activated and deactivated.
326 * This way all ECH boards can share their secondary io region.
327 * If this is an ECH-PCI board then also need to set the page pointer
328 * to point to the correct page.
329 */
330#define BRDENABLE(brdnr,pagenr) \
331 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
332 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
333 stl_brds[(brdnr)]->ioctrl); \
334 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
335 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
336
337#define BRDDISABLE(brdnr) \
338 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
339 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
340 stl_brds[(brdnr)]->ioctrl);
341
342#define STL_CD1400MAXBAUD 230400
343#define STL_SC26198MAXBAUD 460800
344
345#define STL_BAUDBASE 115200
346#define STL_CLOSEDELAY (5 * HZ / 10)
347
348/*****************************************************************************/
349
1da177e4
LT		 350/*
351 * Define the Stallion PCI vendor and device IDs.
352 */
353#ifndef PCI_VENDOR_ID_STALLION
354#define PCI_VENDOR_ID_STALLION 0x124d
355#endif
356#ifndef PCI_DEVICE_ID_ECHPCI832
357#define PCI_DEVICE_ID_ECHPCI832 0x0000
358#endif
359#ifndef PCI_DEVICE_ID_ECHPCI864
360#define PCI_DEVICE_ID_ECHPCI864 0x0002
361#endif
362#ifndef PCI_DEVICE_ID_EIOPCI
363#define PCI_DEVICE_ID_EIOPCI 0x0003
364#endif
365
366/*
367 * Define structure to hold all Stallion PCI boards.
368 */
1da177e4 369
b1b84fe0
JS		 370static struct pci_device_id stl_pcibrds[] = {
371 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
372 .driver_data = BRD_ECH64PCI },
373 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
374 .driver_data = BRD_EASYIOPCI },
375 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
376 .driver_data = BRD_ECHPCI },
377 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
378 .driver_data = BRD_ECHPCI },
379 { }
380};
381MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 382
383/*****************************************************************************/
384
385/*
386 * Define macros to extract a brd/port number from a minor number.
387 */
388#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
389#define MINOR2PORT(min) ((min) & 0x3f)
390
391/*
392 * Define a baud rate table that converts termios baud rate selector
393 * into the actual baud rate value. All baud rate calculations are
394 * based on the actual baud rate required.
395 */
396static unsigned int stl_baudrates[] = {
397 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
398 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
399};
400
1da177e4
LT		 401/*****************************************************************************/
402
403/*
404 * Declare all those functions in this driver!
405 */
406
1da177e4 407static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 408static int stl_brdinit(struct stlbrd *brdp);
ca7ed0f2
JS		 409static int stl_getportstats(struct stlport *portp, comstats_t __user *cp);
410static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 411static int stl_waitcarrier(struct stlport *portp, struct file *filp);
1da177e4 412
1da177e4
LT		 413/*
414 * CD1400 uart specific handling functions.
415 */
ca7ed0f2
JS		 416static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
417static int stl_cd1400getreg(struct stlport *portp, int regnr);
418static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
419static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
420static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 421static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 422static int stl_cd1400getsignals(struct stlport *portp);
423static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
424static void stl_cd1400ccrwait(struct stlport *portp);
425static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
426static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
427static void stl_cd1400disableintrs(struct stlport *portp);
428static void stl_cd1400sendbreak(struct stlport *portp, int len);
429static void stl_cd1400flowctrl(struct stlport *portp, int state);
430static void stl_cd1400sendflow(struct stlport *portp, int state);
431static void stl_cd1400flush(struct stlport *portp);
432static int stl_cd1400datastate(struct stlport *portp);
433static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
434static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
435static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
436static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
437static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
438
439static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 440
441/*
442 * SC26198 uart specific handling functions.
443 */
ca7ed0f2
JS		 444static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
445static int stl_sc26198getreg(struct stlport *portp, int regnr);
446static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
447static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
448static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
449static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 450static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 451static int stl_sc26198getsignals(struct stlport *portp);
452static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
453static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
454static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
455static void stl_sc26198disableintrs(struct stlport *portp);
456static void stl_sc26198sendbreak(struct stlport *portp, int len);
457static void stl_sc26198flowctrl(struct stlport *portp, int state);
458static void stl_sc26198sendflow(struct stlport *portp, int state);
459static void stl_sc26198flush(struct stlport *portp);
460static int stl_sc26198datastate(struct stlport *portp);
461static void stl_sc26198wait(struct stlport *portp);
462static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
463static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
464static void stl_sc26198txisr(struct stlport *port);
465static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
466static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
467static void stl_sc26198rxbadchars(struct stlport *portp);
468static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 469
470/*****************************************************************************/
471
472/*
473 * Generic UART support structure.
474 */
475typedef struct uart {
ca7ed0f2
JS		 476 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
477 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 478 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 479 int (*getsignals)(struct stlport *portp);
480 void (*setsignals)(struct stlport *portp, int dtr, int rts);
481 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
482 void (*startrxtx)(struct stlport *portp, int rx, int tx);
483 void (*disableintrs)(struct stlport *portp);
484 void (*sendbreak)(struct stlport *portp, int len);
485 void (*flowctrl)(struct stlport *portp, int state);
486 void (*sendflow)(struct stlport *portp, int state);
487 void (*flush)(struct stlport *portp);
488 int (*datastate)(struct stlport *portp);
489 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 490} uart_t;
491
492/*
493 * Define some macros to make calling these functions nice and clean.
494 */
495#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
496#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
497#define stl_setport (* ((uart_t *) portp->uartp)->setport)
498#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
499#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
500#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
501#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
502#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
503#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
504#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
505#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
506#define stl_flush (* ((uart_t *) portp->uartp)->flush)
507#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
508
509/*****************************************************************************/
510
511/*
512 * CD1400 UART specific data initialization.
513 */
514static uart_t stl_cd1400uart = {
515 stl_cd1400panelinit,
516 stl_cd1400portinit,
517 stl_cd1400setport,
518 stl_cd1400getsignals,
519 stl_cd1400setsignals,
520 stl_cd1400enablerxtx,
521 stl_cd1400startrxtx,
522 stl_cd1400disableintrs,
523 stl_cd1400sendbreak,
524 stl_cd1400flowctrl,
525 stl_cd1400sendflow,
526 stl_cd1400flush,
527 stl_cd1400datastate,
528 stl_cd1400eiointr
529};
530
531/*
532 * Define the offsets within the register bank of a cd1400 based panel.
533 * These io address offsets are common to the EasyIO board as well.
534 */
535#define EREG_ADDR 0
536#define EREG_DATA 4
537#define EREG_RXACK 5
538#define EREG_TXACK 6
539#define EREG_MDACK 7
540
541#define EREG_BANKSIZE 8
542
543#define CD1400_CLK 25000000
544#define CD1400_CLK8M 20000000
545
546/*
547 * Define the cd1400 baud rate clocks. These are used when calculating
548 * what clock and divisor to use for the required baud rate. Also
549 * define the maximum baud rate allowed, and the default base baud.
550 */
551static int stl_cd1400clkdivs[] = {
552 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
553};
554
555/*****************************************************************************/
556
557/*
558 * SC26198 UART specific data initization.
559 */
560static uart_t stl_sc26198uart = {
561 stl_sc26198panelinit,
562 stl_sc26198portinit,
563 stl_sc26198setport,
564 stl_sc26198getsignals,
565 stl_sc26198setsignals,
566 stl_sc26198enablerxtx,
567 stl_sc26198startrxtx,
568 stl_sc26198disableintrs,
569 stl_sc26198sendbreak,
570 stl_sc26198flowctrl,
571 stl_sc26198sendflow,
572 stl_sc26198flush,
573 stl_sc26198datastate,
574 stl_sc26198intr
575};
576
577/*
578 * Define the offsets within the register bank of a sc26198 based panel.
579 */
580#define XP_DATA 0
581#define XP_ADDR 1
582#define XP_MODID 2
583#define XP_STATUS 2
584#define XP_IACK 3
585
586#define XP_BANKSIZE 4
587
588/*
589 * Define the sc26198 baud rate table. Offsets within the table
590 * represent the actual baud rate selector of sc26198 registers.
591 */
592static unsigned int sc26198_baudtable[] = {
593 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
594 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
595 230400, 460800, 921600
596};
597
fe971071 598#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 599
600/*****************************************************************************/
601
602/*
603 * Define the driver info for a user level control device. Used mainly
604 * to get at port stats - only not using the port device itself.
605 */
62322d25 606static const struct file_operations stl_fsiomem = {
1da177e4
LT		 607 .owner = THIS_MODULE,
608 .ioctl = stl_memioctl,
609};
610
ca8eca68 611static struct class *stallion_class;
1da177e4 612
1da177e4
LT		 613/*
614 * Check for any arguments passed in on the module load command line.
615 */
616
1da177e4
LT		 617/*****************************************************************************/
618
1da177e4
LT		 619/*
620 * Parse the supplied argument string, into the board conf struct.
621 */
622
40e82652 623static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 624{
625 char *sp;
6b2c9457 626 unsigned int i;
1da177e4 627
a0564e14 628 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 629
615e4a71 630 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 631 return 0;
1da177e4 632
c62429d9 633 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 634 *sp = tolower(*sp);
1da177e4 635
c62429d9 636 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 637 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
638 break;
c62429d9 639
fe971071 640 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 641 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 642 return 0;
1da177e4
LT		 643 }
644
645 confp->brdtype = stl_brdstr[i].type;
646
647 i = 1;
615e4a71 648 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 649 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 650 i++;
651 if (confp->brdtype == BRD_ECH) {
615e4a71 652 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 653 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 654 i++;
655 }
615e4a71 656 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 657 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 658 return 1;
1da177e4
LT		 659}
660
661/*****************************************************************************/
662
1da177e4
LT		 663/*
664 * Allocate a new board structure. Fill out the basic info in it.
665 */
666
ca7ed0f2 667static struct stlbrd *stl_allocbrd(void)
1da177e4 668{
ca7ed0f2 669 struct stlbrd *brdp;
1da177e4 670
ca7ed0f2 671 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 672 if (!brdp) {
b65b5b59 673 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 674 sizeof(struct stlbrd));
b0b4ed72 675 return NULL;
1da177e4
LT		 676 }
677
1da177e4 678 brdp->magic = STL_BOARDMAGIC;
014c2544 679 return brdp;
1da177e4
LT		 680}
681
682/*****************************************************************************/
683
684static int stl_open(struct tty_struct *tty, struct file *filp)
685{
ca7ed0f2
JS		 686 struct stlport *portp;
687 struct stlbrd *brdp;
6b2c9457
JS		 688 unsigned int minordev, brdnr, panelnr;
689 int portnr, rc;
1da177e4 690
a0564e14 691 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 692
693 minordev = tty->index;
694 brdnr = MINOR2BRD(minordev);
695 if (brdnr >= stl_nrbrds)
014c2544 696 return -ENODEV;
1da177e4 697 brdp = stl_brds[brdnr];
615e4a71 698 if (brdp == NULL)
014c2544 699 return -ENODEV;
1da177e4 700 minordev = MINOR2PORT(minordev);
c62429d9 701 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 702 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 703 break;
704 if (minordev < brdp->panels[panelnr]->nrports) {
705 portnr = minordev;
706 break;
707 }
708 minordev -= brdp->panels[panelnr]->nrports;
709 }
710 if (portnr < 0)
014c2544 711 return -ENODEV;
1da177e4
LT		 712
713 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 714 if (portp == NULL)
014c2544 715 return -ENODEV;
1da177e4
LT		 716
717/*
718 * On the first open of the device setup the port hardware, and
719 * initialize the per port data structure.
720 */
721 portp->tty = tty;
722 tty->driver_data = portp;
723 portp->refcount++;
724
725 if ((portp->flags & ASYNC_INITIALIZED) == 0) {
b0b4ed72
TK		 726 if (!portp->tx.buf) {
727 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
728 if (!portp->tx.buf)
014c2544 729 return -ENOMEM;
1da177e4
LT		 730 portp->tx.head = portp->tx.buf;
731 portp->tx.tail = portp->tx.buf;
732 }
733 stl_setport(portp, tty->termios);
734 portp->sigs = stl_getsignals(portp);
735 stl_setsignals(portp, 1, 1);
736 stl_enablerxtx(portp, 1, 1);
737 stl_startrxtx(portp, 1, 0);
738 clear_bit(TTY_IO_ERROR, &tty->flags);
739 portp->flags |= ASYNC_INITIALIZED;
740 }
741
742/*
743 * Check if this port is in the middle of closing. If so then wait
744 * until it is closed then return error status, based on flag settings.
745 * The sleep here does not need interrupt protection since the wakeup
746 * for it is done with the same context.
747 */
748 if (portp->flags & ASYNC_CLOSING) {
749 interruptible_sleep_on(&portp->close_wait);
750 if (portp->flags & ASYNC_HUP_NOTIFY)
014c2544
JJ		 751 return -EAGAIN;
752 return -ERESTARTSYS;
1da177e4
LT		 753 }
754
755/*
756 * Based on type of open being done check if it can overlap with any
757 * previous opens still in effect. If we are a normal serial device
758 * then also we might have to wait for carrier.
759 */
c62429d9 760 if (!(filp->f_flags & O_NONBLOCK))
1da177e4 761 if ((rc = stl_waitcarrier(portp, filp)) != 0)
014c2544 762 return rc;
c62429d9 763
1da177e4
LT		 764 portp->flags |= ASYNC_NORMAL_ACTIVE;
765
014c2544 766 return 0;
1da177e4
LT		 767}
768
769/*****************************************************************************/
770
771/*
772 * Possibly need to wait for carrier (DCD signal) to come high. Say
773 * maybe because if we are clocal then we don't need to wait...
774 */
775
ca7ed0f2 776static int stl_waitcarrier(struct stlport *portp, struct file *filp)
1da177e4
LT		 777{
778 unsigned long flags;
779 int rc, doclocal;
780
a0564e14 781 pr_debug("stl_waitcarrier(portp=%p,filp=%p)\n", portp, filp);
1da177e4
LT		 782
783 rc = 0;
784 doclocal = 0;
785
b65b5b59
AC		 786 spin_lock_irqsave(&stallion_lock, flags);
787
1da177e4
LT		 788 if (portp->tty->termios->c_cflag & CLOCAL)
789 doclocal++;
790
1da177e4
LT		 791 portp->openwaitcnt++;
792 if (! tty_hung_up_p(filp))
793 portp->refcount--;
794
795 for (;;) {
b65b5b59 796 /* Takes brd_lock internally */
1da177e4
LT		 797 stl_setsignals(portp, 1, 1);
798 if (tty_hung_up_p(filp) ||
799 ((portp->flags & ASYNC_INITIALIZED) == 0)) {
800 if (portp->flags & ASYNC_HUP_NOTIFY)
801 rc = -EBUSY;
802 else
803 rc = -ERESTARTSYS;
804 break;
805 }
806 if (((portp->flags & ASYNC_CLOSING) == 0) &&
c62429d9 807 (doclocal || (portp->sigs & TIOCM_CD)))
1da177e4 808 break;
1da177e4
LT		 809 if (signal_pending(current)) {
810 rc = -ERESTARTSYS;
811 break;
812 }
b65b5b59 813 /* FIXME */
1da177e4
LT		 814 interruptible_sleep_on(&portp->open_wait);
815 }
816
817 if (! tty_hung_up_p(filp))
818 portp->refcount++;
819 portp->openwaitcnt--;
b65b5b59 820 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4 821
014c2544 822 return rc;
1da177e4
LT		 823}
824
825/*****************************************************************************/
826
96b066b8
JS		 827static void stl_flushbuffer(struct tty_struct *tty)
828{
829 struct stlport *portp;
830
831 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
832
833 if (tty == NULL)
834 return;
835 portp = tty->driver_data;
836 if (portp == NULL)
837 return;
838
839 stl_flush(portp);
840 tty_wakeup(tty);
841}
842
843/*****************************************************************************/
844
845static void stl_waituntilsent(struct tty_struct *tty, int timeout)
846{
847 struct stlport *portp;
848 unsigned long tend;
849
850 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
851
852 if (tty == NULL)
853 return;
854 portp = tty->driver_data;
855 if (portp == NULL)
856 return;
857
858 if (timeout == 0)
859 timeout = HZ;
860 tend = jiffies + timeout;
861
862 while (stl_datastate(portp)) {
863 if (signal_pending(current))
864 break;
865 msleep_interruptible(20);
866 if (time_after_eq(jiffies, tend))
867 break;
868 }
869}
870
871/*****************************************************************************/
872
1da177e4
LT		 873static void stl_close(struct tty_struct *tty, struct file *filp)
874{
ca7ed0f2 875 struct stlport *portp;
1da177e4
LT		 876 unsigned long flags;
877
a0564e14 878 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4
LT		 879
880 portp = tty->driver_data;
615e4a71 881 if (portp == NULL)
1da177e4
LT		 882 return;
883
b65b5b59 884 spin_lock_irqsave(&stallion_lock, flags);
1da177e4 885 if (tty_hung_up_p(filp)) {
b65b5b59 886 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 887 return;
888 }
889 if ((tty->count == 1) && (portp->refcount != 1))
890 portp->refcount = 1;
891 if (portp->refcount-- > 1) {
b65b5b59 892 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 893 return;
894 }
895
896 portp->refcount = 0;
897 portp->flags |= ASYNC_CLOSING;
898
899/*
900 * May want to wait for any data to drain before closing. The BUSY
901 * flag keeps track of whether we are still sending or not - it is
902 * very accurate for the cd1400, not quite so for the sc26198.
903 * (The sc26198 has no "end-of-data" interrupt only empty FIFO)
904 */
905 tty->closing = 1;
b65b5b59
AC		 906
907 spin_unlock_irqrestore(&stallion_lock, flags);
908
1da177e4
LT		 909 if (portp->closing_wait != ASYNC_CLOSING_WAIT_NONE)
910 tty_wait_until_sent(tty, portp->closing_wait);
911 stl_waituntilsent(tty, (HZ / 2));
912
b65b5b59
AC		 913
914 spin_lock_irqsave(&stallion_lock, flags);
1da177e4 915 portp->flags &= ~ASYNC_INITIALIZED;
b65b5b59
AC		 916 spin_unlock_irqrestore(&stallion_lock, flags);
917
1da177e4
LT		 918 stl_disableintrs(portp);
919 if (tty->termios->c_cflag & HUPCL)
920 stl_setsignals(portp, 0, 0);
921 stl_enablerxtx(portp, 0, 0);
922 stl_flushbuffer(tty);
923 portp->istate = 0;
615e4a71 924 if (portp->tx.buf != NULL) {
1da177e4 925 kfree(portp->tx.buf);
615e4a71
JS		 926 portp->tx.buf = NULL;
927 portp->tx.head = NULL;
928 portp->tx.tail = NULL;
1da177e4
LT		 929 }
930 set_bit(TTY_IO_ERROR, &tty->flags);
931 tty_ldisc_flush(tty);
932
933 tty->closing = 0;
615e4a71 934 portp->tty = NULL;
1da177e4
LT		 935
936 if (portp->openwaitcnt) {
937 if (portp->close_delay)
938 msleep_interruptible(jiffies_to_msecs(portp->close_delay));
939 wake_up_interruptible(&portp->open_wait);
940 }
941
942 portp->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
943 wake_up_interruptible(&portp->close_wait);
1da177e4
LT		 944}
945
946/*****************************************************************************/
947
948/*
949 * Write routine. Take data and stuff it in to the TX ring queue.
950 * If transmit interrupts are not running then start them.
951 */
952
953static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
954{
ca7ed0f2 955 struct stlport *portp;
1da177e4
LT		 956 unsigned int len, stlen;
957 unsigned char *chbuf;
958 char *head, *tail;
959
a0564e14 960 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 961
1da177e4 962 portp = tty->driver_data;
615e4a71 963 if (portp == NULL)
014c2544 964 return 0;
615e4a71 965 if (portp->tx.buf == NULL)
014c2544 966 return 0;
1da177e4
LT		 967
968/*
969 * If copying direct from user space we must cater for page faults,
970 * causing us to "sleep" here for a while. To handle this copy in all
971 * the data we need now, into a local buffer. Then when we got it all
972 * copy it into the TX buffer.
973 */
974 chbuf = (unsigned char *) buf;
975
976 head = portp->tx.head;
977 tail = portp->tx.tail;
978 if (head >= tail) {
979 len = STL_TXBUFSIZE - (head - tail) - 1;
980 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
981 } else {
982 len = tail - head - 1;
983 stlen = len;
984 }
985
843b568c 986 len = min(len, (unsigned int)count);
1da177e4
LT		 987 count = 0;
988 while (len > 0) {
843b568c 989 stlen = min(len, stlen);
1da177e4
LT		 990 memcpy(head, chbuf, stlen);
991 len -= stlen;
992 chbuf += stlen;
993 count += stlen;
994 head += stlen;
995 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
996 head = portp->tx.buf;
997 stlen = tail - head;
998 }
999 }
1000 portp->tx.head = head;
1001
1002 clear_bit(ASYI_TXLOW, &portp->istate);
1003 stl_startrxtx(portp, -1, 1);
1004
014c2544 1005 return count;
1da177e4
LT		 1006}
1007
1008/*****************************************************************************/
1009
1010static void stl_putchar(struct tty_struct *tty, unsigned char ch)
1011{
ca7ed0f2 1012 struct stlport *portp;
1da177e4
LT		 1013 unsigned int len;
1014 char *head, *tail;
1015
a0564e14 1016 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1017
615e4a71 1018 if (tty == NULL)
1da177e4
LT		 1019 return;
1020 portp = tty->driver_data;
615e4a71 1021 if (portp == NULL)
1da177e4 1022 return;
615e4a71 1023 if (portp->tx.buf == NULL)
1da177e4
LT		 1024 return;
1025
1026 head = portp->tx.head;
1027 tail = portp->tx.tail;
1028
1029 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
1030 len--;
1031
1032 if (len > 0) {
1033 *head++ = ch;
1034 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
1035 head = portp->tx.buf;
1036 }
1037 portp->tx.head = head;
1038}
1039
1040/*****************************************************************************/
1041
1042/*
1043 * If there are any characters in the buffer then make sure that TX
1044 * interrupts are on and get'em out. Normally used after the putchar
1045 * routine has been called.
1046 */
1047
1048static void stl_flushchars(struct tty_struct *tty)
1049{
ca7ed0f2 1050 struct stlport *portp;
1da177e4 1051
a0564e14 1052 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 1053
615e4a71 1054 if (tty == NULL)
1da177e4
LT		 1055 return;
1056 portp = tty->driver_data;
615e4a71 1057 if (portp == NULL)
1da177e4 1058 return;
615e4a71 1059 if (portp->tx.buf == NULL)
1da177e4
LT		 1060 return;
1061
1da177e4
LT		 1062 stl_startrxtx(portp, -1, 1);
1063}
1064
1065/*****************************************************************************/
1066
1067static int stl_writeroom(struct tty_struct *tty)
1068{
ca7ed0f2 1069 struct stlport *portp;
1da177e4
LT		 1070 char *head, *tail;
1071
a0564e14 1072 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 1073
615e4a71 1074 if (tty == NULL)
014c2544 1075 return 0;
1da177e4 1076 portp = tty->driver_data;
615e4a71 1077 if (portp == NULL)
014c2544 1078 return 0;
615e4a71 1079 if (portp->tx.buf == NULL)
014c2544 1080 return 0;
1da177e4
LT		 1081
1082 head = portp->tx.head;
1083 tail = portp->tx.tail;
c62429d9 1084 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 1085}
1086
1087/*****************************************************************************/
1088
1089/*
1090 * Return number of chars in the TX buffer. Normally we would just
1091 * calculate the number of chars in the buffer and return that, but if
1092 * the buffer is empty and TX interrupts are still on then we return
1093 * that the buffer still has 1 char in it. This way whoever called us
1094 * will not think that ALL chars have drained - since the UART still
1095 * must have some chars in it (we are busy after all).
1096 */
1097
1098static int stl_charsinbuffer(struct tty_struct *tty)
1099{
ca7ed0f2 1100 struct stlport *portp;
1da177e4
LT		 1101 unsigned int size;
1102 char *head, *tail;
1103
a0564e14 1104 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1105
615e4a71 1106 if (tty == NULL)
014c2544 1107 return 0;
1da177e4 1108 portp = tty->driver_data;
615e4a71 1109 if (portp == NULL)
014c2544 1110 return 0;
615e4a71 1111 if (portp->tx.buf == NULL)
014c2544 1112 return 0;
1da177e4
LT		 1113
1114 head = portp->tx.head;
1115 tail = portp->tx.tail;
1116 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1117 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1118 size = 1;
014c2544 1119 return size;
1da177e4
LT		 1120}
1121
1122/*****************************************************************************/
1123
1124/*
1125 * Generate the serial struct info.
1126 */
1127
ca7ed0f2 1128static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1129{
1130 struct serial_struct sio;
ca7ed0f2 1131 struct stlbrd *brdp;
1da177e4 1132
a0564e14 1133 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1134
1135 memset(&sio, 0, sizeof(struct serial_struct));
1136 sio.line = portp->portnr;
1137 sio.port = portp->ioaddr;
1138 sio.flags = portp->flags;
1139 sio.baud_base = portp->baud_base;
1140 sio.close_delay = portp->close_delay;
1141 sio.closing_wait = portp->closing_wait;
1142 sio.custom_divisor = portp->custom_divisor;
1143 sio.hub6 = 0;
1144 if (portp->uartp == &stl_cd1400uart) {
1145 sio.type = PORT_CIRRUS;
1146 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1147 } else {
1148 sio.type = PORT_UNKNOWN;
1149 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1150 }
1151
1152 brdp = stl_brds[portp->brdnr];
615e4a71 1153 if (brdp != NULL)
1da177e4
LT		 1154 sio.irq = brdp->irq;
1155
1156 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1157}
1158
1159/*****************************************************************************/
1160
1161/*
1162 * Set port according to the serial struct info.
1163 * At this point we do not do any auto-configure stuff, so we will
1164 * just quietly ignore any requests to change irq, etc.
1165 */
1166
ca7ed0f2 1167static int stl_setserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1168{
1169 struct serial_struct sio;
1170
a0564e14 1171 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1172
1173 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1174 return -EFAULT;
1175 if (!capable(CAP_SYS_ADMIN)) {
1176 if ((sio.baud_base != portp->baud_base) ||
1177 (sio.close_delay != portp->close_delay) ||
1178 ((sio.flags & ~ASYNC_USR_MASK) !=
1179 (portp->flags & ~ASYNC_USR_MASK)))
014c2544 1180 return -EPERM;
1da177e4
LT		 1181 }
1182
1183 portp->flags = (portp->flags & ~ASYNC_USR_MASK) |
1184 (sio.flags & ASYNC_USR_MASK);
1185 portp->baud_base = sio.baud_base;
1186 portp->close_delay = sio.close_delay;
1187 portp->closing_wait = sio.closing_wait;
1188 portp->custom_divisor = sio.custom_divisor;
1189 stl_setport(portp, portp->tty->termios);
014c2544 1190 return 0;
1da177e4
LT		 1191}
1192
1193/*****************************************************************************/
1194
1195static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1196{
ca7ed0f2 1197 struct stlport *portp;
1da177e4 1198
615e4a71 1199 if (tty == NULL)
014c2544 1200 return -ENODEV;
1da177e4 1201 portp = tty->driver_data;
615e4a71 1202 if (portp == NULL)
014c2544 1203 return -ENODEV;
1da177e4 1204 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1205 return -EIO;
1da177e4
LT		 1206
1207 return stl_getsignals(portp);
1208}
1209
1210static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1211 unsigned int set, unsigned int clear)
1212{
ca7ed0f2 1213 struct stlport *portp;
1da177e4
LT		 1214 int rts = -1, dtr = -1;
1215
615e4a71 1216 if (tty == NULL)
014c2544 1217 return -ENODEV;
1da177e4 1218 portp = tty->driver_data;
615e4a71 1219 if (portp == NULL)
014c2544 1220 return -ENODEV;
1da177e4 1221 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1222 return -EIO;
1da177e4
LT		 1223
1224 if (set & TIOCM_RTS)
1225 rts = 1;
1226 if (set & TIOCM_DTR)
1227 dtr = 1;
1228 if (clear & TIOCM_RTS)
1229 rts = 0;
1230 if (clear & TIOCM_DTR)
1231 dtr = 0;
1232
1233 stl_setsignals(portp, dtr, rts);
1234 return 0;
1235}
1236
1237static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1238{
ca7ed0f2 1239 struct stlport *portp;
1da177e4
LT		 1240 unsigned int ival;
1241 int rc;
1242 void __user *argp = (void __user *)arg;
1243
a0564e14
JS		 1244 pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd,
1245 arg);
1da177e4 1246
615e4a71 1247 if (tty == NULL)
014c2544 1248 return -ENODEV;
1da177e4 1249 portp = tty->driver_data;
615e4a71 1250 if (portp == NULL)
014c2544 1251 return -ENODEV;
1da177e4
LT		 1252
1253 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1254 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1255 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1256 return -EIO;
1da177e4
LT		 1257
1258 rc = 0;
1259
1260 switch (cmd) {
1261 case TIOCGSOFTCAR:
1262 rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0),
1263 (unsigned __user *) argp);
1264 break;
1265 case TIOCSSOFTCAR:
1266 if (get_user(ival, (unsigned int __user *) arg))
1267 return -EFAULT;
1268 tty->termios->c_cflag =
1269 (tty->termios->c_cflag & ~CLOCAL) |
1270 (ival ? CLOCAL : 0);
1271 break;
1272 case TIOCGSERIAL:
1273 rc = stl_getserial(portp, argp);
1274 break;
1275 case TIOCSSERIAL:
1276 rc = stl_setserial(portp, argp);
1277 break;
1278 case COM_GETPORTSTATS:
1279 rc = stl_getportstats(portp, argp);
1280 break;
1281 case COM_CLRPORTSTATS:
1282 rc = stl_clrportstats(portp, argp);
1283 break;
1284 case TIOCSERCONFIG:
1285 case TIOCSERGWILD:
1286 case TIOCSERSWILD:
1287 case TIOCSERGETLSR:
1288 case TIOCSERGSTRUCT:
1289 case TIOCSERGETMULTI:
1290 case TIOCSERSETMULTI:
1291 default:
1292 rc = -ENOIOCTLCMD;
1293 break;
1294 }
1295
014c2544 1296 return rc;
1da177e4
LT		 1297}
1298
1299/*****************************************************************************/
1300
96b066b8
JS		 1301/*
1302 * Start the transmitter again. Just turn TX interrupts back on.
1303 */
1304
1305static void stl_start(struct tty_struct *tty)
1306{
1307 struct stlport *portp;
1308
1309 pr_debug("stl_start(tty=%p)\n", tty);
1310
1311 if (tty == NULL)
1312 return;
1313 portp = tty->driver_data;
1314 if (portp == NULL)
1315 return;
1316 stl_startrxtx(portp, -1, 1);
1317}
1318
1319/*****************************************************************************/
1320
606d099c 1321static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1322{
ca7ed0f2 1323 struct stlport *portp;
606d099c 1324 struct ktermios *tiosp;
1da177e4 1325
a0564e14 1326 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1327
615e4a71 1328 if (tty == NULL)
1da177e4
LT		 1329 return;
1330 portp = tty->driver_data;
615e4a71 1331 if (portp == NULL)
1da177e4
LT		 1332 return;
1333
1334 tiosp = tty->termios;
1335 if ((tiosp->c_cflag == old->c_cflag) &&
1336 (tiosp->c_iflag == old->c_iflag))
1337 return;
1338
1339 stl_setport(portp, tiosp);
1340 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1341 -1);
1342 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1343 tty->hw_stopped = 0;
1344 stl_start(tty);
1345 }
1346 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
1347 wake_up_interruptible(&portp->open_wait);
1348}
1349
1350/*****************************************************************************/
1351
1352/*
1353 * Attempt to flow control who ever is sending us data. Based on termios
1354 * settings use software or/and hardware flow control.
1355 */
1356
1357static void stl_throttle(struct tty_struct *tty)
1358{
ca7ed0f2 1359 struct stlport *portp;
1da177e4 1360
a0564e14 1361 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1362
615e4a71 1363 if (tty == NULL)
1da177e4
LT		 1364 return;
1365 portp = tty->driver_data;
615e4a71 1366 if (portp == NULL)
1da177e4
LT		 1367 return;
1368 stl_flowctrl(portp, 0);
1369}
1370
1371/*****************************************************************************/
1372
1373/*
1374 * Unflow control the device sending us data...
1375 */
1376
1377static void stl_unthrottle(struct tty_struct *tty)
1378{
ca7ed0f2 1379 struct stlport *portp;
1da177e4 1380
a0564e14 1381 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1382
615e4a71 1383 if (tty == NULL)
1da177e4
LT		 1384 return;
1385 portp = tty->driver_data;
615e4a71 1386 if (portp == NULL)
1da177e4
LT		 1387 return;
1388 stl_flowctrl(portp, 1);
1389}
1390
1391/*****************************************************************************/
1392
1393/*
1394 * Stop the transmitter. Basically to do this we will just turn TX
1395 * interrupts off.
1396 */
1397
1398static void stl_stop(struct tty_struct *tty)
1399{
ca7ed0f2 1400 struct stlport *portp;
1da177e4 1401
a0564e14 1402 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1403
615e4a71 1404 if (tty == NULL)
1da177e4
LT		 1405 return;
1406 portp = tty->driver_data;
615e4a71 1407 if (portp == NULL)
1da177e4
LT		 1408 return;
1409 stl_startrxtx(portp, -1, 0);
1410}
1411
1412/*****************************************************************************/
1413
1da177e4
LT		 1414/*
1415 * Hangup this port. This is pretty much like closing the port, only
1416 * a little more brutal. No waiting for data to drain. Shutdown the
1417 * port and maybe drop signals.
1418 */
1419
1420static void stl_hangup(struct tty_struct *tty)
1421{
ca7ed0f2 1422 struct stlport *portp;
1da177e4 1423
a0564e14 1424 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1425
615e4a71 1426 if (tty == NULL)
1da177e4
LT		 1427 return;
1428 portp = tty->driver_data;
615e4a71 1429 if (portp == NULL)
1da177e4
LT		 1430 return;
1431
1432 portp->flags &= ~ASYNC_INITIALIZED;
1433 stl_disableintrs(portp);
1434 if (tty->termios->c_cflag & HUPCL)
1435 stl_setsignals(portp, 0, 0);
1436 stl_enablerxtx(portp, 0, 0);
1437 stl_flushbuffer(tty);
1438 portp->istate = 0;
1439 set_bit(TTY_IO_ERROR, &tty->flags);
615e4a71 1440 if (portp->tx.buf != NULL) {
1da177e4 1441 kfree(portp->tx.buf);
615e4a71
JS		 1442 portp->tx.buf = NULL;
1443 portp->tx.head = NULL;
1444 portp->tx.tail = NULL;
1da177e4 1445 }
615e4a71 1446 portp->tty = NULL;
1da177e4
LT		 1447 portp->flags &= ~ASYNC_NORMAL_ACTIVE;
1448 portp->refcount = 0;
1449 wake_up_interruptible(&portp->open_wait);
1450}
1451
1452/*****************************************************************************/
1453
1da177e4
LT		 1454static void stl_breakctl(struct tty_struct *tty, int state)
1455{
ca7ed0f2 1456 struct stlport *portp;
1da177e4 1457
a0564e14 1458 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1459
615e4a71 1460 if (tty == NULL)
1da177e4
LT		 1461 return;
1462 portp = tty->driver_data;
615e4a71 1463 if (portp == NULL)
1da177e4
LT		 1464 return;
1465
1466 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
1467}
1468
1469/*****************************************************************************/
1470
1da177e4
LT		 1471static void stl_sendxchar(struct tty_struct *tty, char ch)
1472{
ca7ed0f2 1473 struct stlport *portp;
1da177e4 1474
a0564e14 1475 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1476
615e4a71 1477 if (tty == NULL)
1da177e4
LT		 1478 return;
1479 portp = tty->driver_data;
615e4a71 1480 if (portp == NULL)
1da177e4
LT		 1481 return;
1482
1483 if (ch == STOP_CHAR(tty))
1484 stl_sendflow(portp, 0);
1485 else if (ch == START_CHAR(tty))
1486 stl_sendflow(portp, 1);
1487 else
1488 stl_putchar(tty, ch);
1489}
1490
1491/*****************************************************************************/
1492
1493#define MAXLINE 80
1494
1495/*
1496 * Format info for a specified port. The line is deliberately limited
1497 * to 80 characters. (If it is too long it will be truncated, if too
1498 * short then padded with spaces).
1499 */
1500
ca7ed0f2 1501static int stl_portinfo(struct stlport *portp, int portnr, char *pos)
1da177e4
LT		 1502{
1503 char *sp;
1504 int sigs, cnt;
1505
1506 sp = pos;
1507 sp += sprintf(sp, "%d: uart:%s tx:%d rx:%d",
1508 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1509 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1510
1511 if (portp->stats.rxframing)
1512 sp += sprintf(sp, " fe:%d", (int) portp->stats.rxframing);
1513 if (portp->stats.rxparity)
1514 sp += sprintf(sp, " pe:%d", (int) portp->stats.rxparity);
1515 if (portp->stats.rxbreaks)
1516 sp += sprintf(sp, " brk:%d", (int) portp->stats.rxbreaks);
1517 if (portp->stats.rxoverrun)
1518 sp += sprintf(sp, " oe:%d", (int) portp->stats.rxoverrun);
1519
1520 sigs = stl_getsignals(portp);
1521 cnt = sprintf(sp, "%s%s%s%s%s ",
1522 (sigs & TIOCM_RTS) ? "|RTS" : "",
1523 (sigs & TIOCM_CTS) ? "|CTS" : "",
1524 (sigs & TIOCM_DTR) ? "|DTR" : "",
1525 (sigs & TIOCM_CD) ? "|DCD" : "",
1526 (sigs & TIOCM_DSR) ? "|DSR" : "");
1527 *sp = ' ';
1528 sp += cnt;
1529
c62429d9 1530 for (cnt = sp - pos; cnt < (MAXLINE - 1); cnt++)
1da177e4
LT		 1531 *sp++ = ' ';
1532 if (cnt >= MAXLINE)
1533 pos[(MAXLINE - 2)] = '+';
1534 pos[(MAXLINE - 1)] = '\n';
1535
014c2544 1536 return MAXLINE;
1da177e4
LT		 1537}
1538
1539/*****************************************************************************/
1540
1541/*
1542 * Port info, read from the /proc file system.
1543 */
1544
1545static int stl_readproc(char *page, char **start, off_t off, int count, int *eof, void *data)
1546{
ca7ed0f2
JS		 1547 struct stlbrd *brdp;
1548 struct stlpanel *panelp;
1549 struct stlport *portp;
6b2c9457
JS		 1550 unsigned int brdnr, panelnr, portnr;
1551 int totalport, curoff, maxoff;
1da177e4
LT		 1552 char *pos;
1553
a0564e14
JS		 1554 pr_debug("stl_readproc(page=%p,start=%p,off=%lx,count=%d,eof=%p,"
1555 "data=%p\n", page, start, off, count, eof, data);
1da177e4
LT		 1556
1557 pos = page;
1558 totalport = 0;
1559 curoff = 0;
1560
1561 if (off == 0) {
1562 pos += sprintf(pos, "%s: version %s", stl_drvtitle,
1563 stl_drvversion);
1564 while (pos < (page + MAXLINE - 1))
1565 *pos++ = ' ';
1566 *pos++ = '\n';
1567 }
1568 curoff = MAXLINE;
1569
1570/*
1571 * We scan through for each board, panel and port. The offset is
1572 * calculated on the fly, and irrelevant ports are skipped.
1573 */
c62429d9 1574 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1575 brdp = stl_brds[brdnr];
615e4a71 1576 if (brdp == NULL)
1da177e4
LT		 1577 continue;
1578 if (brdp->state == 0)
1579 continue;
1580
1581 maxoff = curoff + (brdp->nrports * MAXLINE);
1582 if (off >= maxoff) {
1583 curoff = maxoff;
1584 continue;
1585 }
1586
1587 totalport = brdnr * STL_MAXPORTS;
c62429d9 1588 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1589 panelp = brdp->panels[panelnr];
615e4a71 1590 if (panelp == NULL)
1da177e4
LT		 1591 continue;
1592
1593 maxoff = curoff + (panelp->nrports * MAXLINE);
1594 if (off >= maxoff) {
1595 curoff = maxoff;
1596 totalport += panelp->nrports;
1597 continue;
1598 }
1599
c62429d9 1600 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1601 totalport++) {
1602 portp = panelp->ports[portnr];
615e4a71 1603 if (portp == NULL)
1da177e4
LT		 1604 continue;
1605 if (off >= (curoff += MAXLINE))
1606 continue;
1607 if ((pos - page + MAXLINE) > count)
1608 goto stl_readdone;
1609 pos += stl_portinfo(portp, totalport, pos);
1610 }
1611 }
1612 }
1613
1614 *eof = 1;
1615
1616stl_readdone:
1617 *start = page;
c62429d9 1618 return pos - page;
1da177e4
LT		 1619}
1620
1621/*****************************************************************************/
1622
1623/*
1624 * All board interrupts are vectored through here first. This code then
1625 * calls off to the approrpriate board interrupt handlers.
1626 */
1627
7d12e780 1628static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1629{
ca7ed0f2 1630 struct stlbrd *brdp = dev_id;
1da177e4 1631
a0564e14 1632 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, irq);
1da177e4
LT		 1633
1634 return IRQ_RETVAL((* brdp->isr)(brdp));
1635}
1636
1637/*****************************************************************************/
1638
1639/*
1640 * Interrupt service routine for EasyIO board types.
1641 */
1642
ca7ed0f2 1643static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1644{
ca7ed0f2 1645 struct stlpanel *panelp;
1da177e4
LT		 1646 unsigned int iobase;
1647 int handled = 0;
1648
b65b5b59 1649 spin_lock(&brd_lock);
1da177e4
LT		 1650 panelp = brdp->panels[0];
1651 iobase = panelp->iobase;
1652 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1653 handled = 1;
1654 (* panelp->isr)(panelp, iobase);
1655 }
b65b5b59 1656 spin_unlock(&brd_lock);
1da177e4
LT		 1657 return handled;
1658}
1659
1660/*****************************************************************************/
1661
1662/*
1663 * Interrupt service routine for ECH-AT board types.
1664 */
1665
ca7ed0f2 1666static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1667{
ca7ed0f2 1668 struct stlpanel *panelp;
6b2c9457 1669 unsigned int ioaddr, bnknr;
1da177e4
LT		 1670 int handled = 0;
1671
1672 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1673
1674 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1675 handled = 1;
c62429d9 1676 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1677 ioaddr = brdp->bnkstataddr[bnknr];
1678 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1679 panelp = brdp->bnk2panel[bnknr];
1680 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1681 }
1682 }
1683 }
1684
1685 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1686
1687 return handled;
1688}
1689
1690/*****************************************************************************/
1691
1692/*
1693 * Interrupt service routine for ECH-MCA board types.
1694 */
1695
ca7ed0f2 1696static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1697{
ca7ed0f2 1698 struct stlpanel *panelp;
6b2c9457 1699 unsigned int ioaddr, bnknr;
1da177e4
LT		 1700 int handled = 0;
1701
1702 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1703 handled = 1;
c62429d9 1704 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1705 ioaddr = brdp->bnkstataddr[bnknr];
1706 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1707 panelp = brdp->bnk2panel[bnknr];
1708 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1709 }
1710 }
1711 }
1712 return handled;
1713}
1714
1715/*****************************************************************************/
1716
1717/*
1718 * Interrupt service routine for ECH-PCI board types.
1719 */
1720
ca7ed0f2 1721static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1722{
ca7ed0f2 1723 struct stlpanel *panelp;
6b2c9457 1724 unsigned int ioaddr, bnknr, recheck;
1da177e4
LT		 1725 int handled = 0;
1726
1727 while (1) {
1728 recheck = 0;
c62429d9 1729 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1730 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1731 ioaddr = brdp->bnkstataddr[bnknr];
1732 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1733 panelp = brdp->bnk2panel[bnknr];
1734 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1735 recheck++;
1736 handled = 1;
1737 }
1738 }
1739 if (! recheck)
1740 break;
1741 }
1742 return handled;
1743}
1744
1745/*****************************************************************************/
1746
1747/*
1748 * Interrupt service routine for ECH-8/64-PCI board types.
1749 */
1750
ca7ed0f2 1751static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1752{
ca7ed0f2 1753 struct stlpanel *panelp;
6b2c9457 1754 unsigned int ioaddr, bnknr;
1da177e4
LT		 1755 int handled = 0;
1756
1757 while (inb(brdp->ioctrl) & 0x1) {
1758 handled = 1;
c62429d9 1759 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1760 ioaddr = brdp->bnkstataddr[bnknr];
1761 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1762 panelp = brdp->bnk2panel[bnknr];
1763 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1764 }
1765 }
1766 }
1767
1768 return handled;
1769}
1770
1771/*****************************************************************************/
1772
1773/*
1774 * Service an off-level request for some channel.
1775 */
3e577a80 1776static void stl_offintr(struct work_struct *work)
1da177e4 1777{
ca7ed0f2 1778 struct stlport *portp = container_of(work, struct stlport, tqueue);
1da177e4
LT		 1779 struct tty_struct *tty;
1780 unsigned int oldsigs;
1781
a0564e14 1782 pr_debug("stl_offintr(portp=%p)\n", portp);
1da177e4 1783
615e4a71 1784 if (portp == NULL)
1da177e4
LT		 1785 return;
1786
1787 tty = portp->tty;
615e4a71 1788 if (tty == NULL)
1da177e4
LT		 1789 return;
1790
1791 lock_kernel();
c62429d9 1792 if (test_bit(ASYI_TXLOW, &portp->istate))
1da177e4 1793 tty_wakeup(tty);
c62429d9 1794
1da177e4
LT		 1795 if (test_bit(ASYI_DCDCHANGE, &portp->istate)) {
1796 clear_bit(ASYI_DCDCHANGE, &portp->istate);
1797 oldsigs = portp->sigs;
1798 portp->sigs = stl_getsignals(portp);
1799 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
1800 wake_up_interruptible(&portp->open_wait);
c62429d9 1801 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
1da177e4
LT		 1802 if (portp->flags & ASYNC_CHECK_CD)
1803 tty_hangup(tty); /* FIXME: module removal race here - AKPM */
1da177e4
LT		 1804 }
1805 unlock_kernel();
1806}
1807
1808/*****************************************************************************/
1809
1810/*
1811 * Initialize all the ports on a panel.
1812 */
1813
705c1862 1814static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1815{
6b2c9457
JS		 1816 struct stlport *portp;
1817 unsigned int i;
1818 int chipmask;
1da177e4 1819
a0564e14 1820 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1821
1822 chipmask = stl_panelinit(brdp, panelp);
1823
1824/*
1825 * All UART's are initialized (if found!). Now go through and setup
1826 * each ports data structures.
1827 */
c62429d9 1828 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1829 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1830 if (!portp) {
1da177e4 1831 printk("STALLION: failed to allocate memory "
ca7ed0f2 1832 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1833 break;
1834 }
1da177e4
LT		 1835
1836 portp->magic = STL_PORTMAGIC;
1837 portp->portnr = i;
1838 portp->brdnr = panelp->brdnr;
1839 portp->panelnr = panelp->panelnr;
1840 portp->uartp = panelp->uartp;
1841 portp->clk = brdp->clk;
1842 portp->baud_base = STL_BAUDBASE;
1843 portp->close_delay = STL_CLOSEDELAY;
1844 portp->closing_wait = 30 * HZ;
3e577a80 1845 INIT_WORK(&portp->tqueue, stl_offintr);
1da177e4
LT		 1846 init_waitqueue_head(&portp->open_wait);
1847 init_waitqueue_head(&portp->close_wait);
1848 portp->stats.brd = portp->brdnr;
1849 portp->stats.panel = portp->panelnr;
1850 portp->stats.port = portp->portnr;
1851 panelp->ports[i] = portp;
1852 stl_portinit(brdp, panelp, portp);
1853 }
1854
c62429d9 1855 return 0;
1da177e4
LT		 1856}
1857
3b85b341
JS		 1858static void stl_cleanup_panels(struct stlbrd *brdp)
1859{
1860 struct stlpanel *panelp;
1861 struct stlport *portp;
1862 unsigned int j, k;
1863
1864 for (j = 0; j < STL_MAXPANELS; j++) {
1865 panelp = brdp->panels[j];
1866 if (panelp == NULL)
1867 continue;
1868 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1869 portp = panelp->ports[k];
1870 if (portp == NULL)
1871 continue;
1872 if (portp->tty != NULL)
1873 stl_hangup(portp->tty);
1874 kfree(portp->tx.buf);
1875 kfree(portp);
1876 }
1877 kfree(panelp);
1878 }
1879}
1880
1da177e4
LT		 1881/*****************************************************************************/
1882
1883/*
1884 * Try to find and initialize an EasyIO board.
1885 */
1886
705c1862 1887static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1888{
ca7ed0f2 1889 struct stlpanel *panelp;
1da177e4
LT		 1890 unsigned int status;
1891 char *name;
3b85b341 1892 int retval;
1da177e4 1893
a0564e14 1894 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1895
1896 brdp->ioctrl = brdp->ioaddr1 + 1;
1897 brdp->iostatus = brdp->ioaddr1 + 2;
1898
1899 status = inb(brdp->iostatus);
1900 if ((status & EIO_IDBITMASK) == EIO_MK3)
1901 brdp->ioctrl++;
1902
1903/*
1904 * Handle board specific stuff now. The real difference is PCI
1905 * or not PCI.
1906 */
1907 if (brdp->brdtype == BRD_EASYIOPCI) {
1908 brdp->iosize1 = 0x80;
1909 brdp->iosize2 = 0x80;
1910 name = "serial(EIO-PCI)";
1911 outb(0x41, (brdp->ioaddr2 + 0x4c));
1912 } else {
1913 brdp->iosize1 = 8;
1914 name = "serial(EIO)";
1915 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1916 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1917 printk("STALLION: invalid irq=%d for brd=%d\n",
1918 brdp->irq, brdp->brdnr);
3b85b341
JS		 1919 retval = -EINVAL;
1920 goto err;
1da177e4
LT		 1921 }
1922 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1923 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1924 brdp->ioctrl);
1925 }
1926
3b85b341 1927 retval = -EBUSY;
1da177e4
LT		 1928 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1929 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1930 "%x conflicts with another device\n", brdp->brdnr,
1931 brdp->ioaddr1);
3b85b341 1932 goto err;
1da177e4
LT		 1933 }
1934
1935 if (brdp->iosize2 > 0)
1936 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1937 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1938 "address %x conflicts with another device\n",
1939 brdp->brdnr, brdp->ioaddr2);
1940 printk(KERN_WARNING "STALLION: Warning, also "
1941 "releasing board %d I/O address %x \n",
1942 brdp->brdnr, brdp->ioaddr1);
3b85b341 1943 goto err_rel1;
1da177e4
LT		 1944 }
1945
1946/*
1947 * Everything looks OK, so let's go ahead and probe for the hardware.
1948 */
1949 brdp->clk = CD1400_CLK;
1950 brdp->isr = stl_eiointr;
1951
3b85b341 1952 retval = -ENODEV;
1da177e4
LT		 1953 switch (status & EIO_IDBITMASK) {
1954 case EIO_8PORTM:
1955 brdp->clk = CD1400_CLK8M;
1956 /* fall thru */
1957 case EIO_8PORTRS:
1958 case EIO_8PORTDI:
1959 brdp->nrports = 8;
1960 break;
1961 case EIO_4PORTRS:
1962 brdp->nrports = 4;
1963 break;
1964 case EIO_MK3:
1965 switch (status & EIO_BRDMASK) {
1966 case ID_BRD4:
1967 brdp->nrports = 4;
1968 break;
1969 case ID_BRD8:
1970 brdp->nrports = 8;
1971 break;
1972 case ID_BRD16:
1973 brdp->nrports = 16;
1974 break;
1975 default:
3b85b341 1976 goto err_rel2;
1da177e4
LT		 1977 }
1978 break;
1979 default:
3b85b341 1980 goto err_rel2;
1da177e4
LT		 1981 }
1982
1983/*
1984 * We have verified that the board is actually present, so now we
1985 * can complete the setup.
1986 */
1987
ca7ed0f2 1988 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1989 if (!panelp) {
1da177e4 1990 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 1991 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 1992 retval = -ENOMEM;
1993 goto err_rel2;
1da177e4 1994 }
1da177e4
LT		 1995
1996 panelp->magic = STL_PANELMAGIC;
1997 panelp->brdnr = brdp->brdnr;
1998 panelp->panelnr = 0;
1999 panelp->nrports = brdp->nrports;
2000 panelp->iobase = brdp->ioaddr1;
2001 panelp->hwid = status;
2002 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 2003 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 2004 panelp->isr = stl_sc26198intr;
2005 } else {
615e4a71 2006 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 2007 panelp->isr = stl_cd1400eiointr;
2008 }
2009
2010 brdp->panels[0] = panelp;
2011 brdp->nrpanels = 1;
2012 brdp->state |= BRD_FOUND;
2013 brdp->hwid = status;
0f2ed4c6 2014 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2015 printk("STALLION: failed to register interrupt "
2016 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2017 retval = -ENODEV;
2018 goto err_fr;
1da177e4 2019 }
3b85b341
JS		 2020
2021 return 0;
2022err_fr:
2023 stl_cleanup_panels(brdp);
2024err_rel2:
2025 if (brdp->iosize2 > 0)
2026 release_region(brdp->ioaddr2, brdp->iosize2);
2027err_rel1:
2028 release_region(brdp->ioaddr1, brdp->iosize1);
2029err:
2030 return retval;
1da177e4
LT		 2031}
2032
2033/*****************************************************************************/
2034
2035/*
2036 * Try to find an ECH board and initialize it. This code is capable of
2037 * dealing with all types of ECH board.
2038 */
2039
705c1862 2040static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 2041{
ca7ed0f2 2042 struct stlpanel *panelp;
6b2c9457
JS		 2043 unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i;
2044 int retval;
1da177e4
LT		 2045 char *name;
2046
a0564e14 2047 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 2048
2049 status = 0;
2050 conflict = 0;
2051
2052/*
2053 * Set up the initial board register contents for boards. This varies a
2054 * bit between the different board types. So we need to handle each
2055 * separately. Also do a check that the supplied IRQ is good.
2056 */
2057 switch (brdp->brdtype) {
2058
2059 case BRD_ECH:
2060 brdp->isr = stl_echatintr;
2061 brdp->ioctrl = brdp->ioaddr1 + 1;
2062 brdp->iostatus = brdp->ioaddr1 + 1;
2063 status = inb(brdp->iostatus);
3b85b341
JS		 2064 if ((status & ECH_IDBITMASK) != ECH_ID) {
2065 retval = -ENODEV;
2066 goto err;
2067 }
1da177e4
LT		 2068 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2069 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2070 printk("STALLION: invalid irq=%d for brd=%d\n",
2071 brdp->irq, brdp->brdnr);
3b85b341
JS		 2072 retval = -EINVAL;
2073 goto err;
1da177e4
LT		 2074 }
2075 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
2076 status |= (stl_vecmap[brdp->irq] << 1);
2077 outb((status | ECH_BRDRESET), brdp->ioaddr1);
2078 brdp->ioctrlval = ECH_INTENABLE |
2079 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 2080 for (i = 0; i < 10; i++)
1da177e4
LT		 2081 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
2082 brdp->iosize1 = 2;
2083 brdp->iosize2 = 32;
2084 name = "serial(EC8/32)";
2085 outb(status, brdp->ioaddr1);
2086 break;
2087
2088 case BRD_ECHMC:
2089 brdp->isr = stl_echmcaintr;
2090 brdp->ioctrl = brdp->ioaddr1 + 0x20;
2091 brdp->iostatus = brdp->ioctrl;
2092 status = inb(brdp->iostatus);
3b85b341
JS		 2093 if ((status & ECH_IDBITMASK) != ECH_ID) {
2094 retval = -ENODEV;
2095 goto err;
2096 }
1da177e4
LT		 2097 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2098 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2099 printk("STALLION: invalid irq=%d for brd=%d\n",
2100 brdp->irq, brdp->brdnr);
3b85b341
JS		 2101 retval = -EINVAL;
2102 goto err;
1da177e4
LT		 2103 }
2104 outb(ECHMC_BRDRESET, brdp->ioctrl);
2105 outb(ECHMC_INTENABLE, brdp->ioctrl);
2106 brdp->iosize1 = 64;
2107 name = "serial(EC8/32-MC)";
2108 break;
2109
2110 case BRD_ECHPCI:
2111 brdp->isr = stl_echpciintr;
2112 brdp->ioctrl = brdp->ioaddr1 + 2;
2113 brdp->iosize1 = 4;
2114 brdp->iosize2 = 8;
2115 name = "serial(EC8/32-PCI)";
2116 break;
2117
2118 case BRD_ECH64PCI:
2119 brdp->isr = stl_echpci64intr;
2120 brdp->ioctrl = brdp->ioaddr2 + 0x40;
2121 outb(0x43, (brdp->ioaddr1 + 0x4c));
2122 brdp->iosize1 = 0x80;
2123 brdp->iosize2 = 0x80;
2124 name = "serial(EC8/64-PCI)";
2125 break;
2126
2127 default:
2128 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 2129 retval = -EINVAL;
2130 goto err;
1da177e4
LT		 2131 }
2132
2133/*
2134 * Check boards for possible IO address conflicts and return fail status
2135 * if an IO conflict found.
2136 */
3b85b341 2137 retval = -EBUSY;
1da177e4
LT		 2138 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
2139 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
2140 "%x conflicts with another device\n", brdp->brdnr,
2141 brdp->ioaddr1);
3b85b341 2142 goto err;
1da177e4
LT		 2143 }
2144
2145 if (brdp->iosize2 > 0)
2146 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
2147 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
2148 "address %x conflicts with another device\n",
2149 brdp->brdnr, brdp->ioaddr2);
2150 printk(KERN_WARNING "STALLION: Warning, also "
2151 "releasing board %d I/O address %x \n",
2152 brdp->brdnr, brdp->ioaddr1);
3b85b341 2153 goto err_rel1;
1da177e4
LT		 2154 }
2155
2156/*
2157 * Scan through the secondary io address space looking for panels.
2158 * As we find'em allocate and initialize panel structures for each.
2159 */
2160 brdp->clk = CD1400_CLK;
2161 brdp->hwid = status;
2162
2163 ioaddr = brdp->ioaddr2;
2164 banknr = 0;
2165 panelnr = 0;
2166 nxtid = 0;
2167
c62429d9 2168 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 2169 if (brdp->brdtype == BRD_ECHPCI) {
2170 outb(nxtid, brdp->ioctrl);
2171 ioaddr = brdp->ioaddr2;
2172 }
2173 status = inb(ioaddr + ECH_PNLSTATUS);
2174 if ((status & ECH_PNLIDMASK) != nxtid)
3b85b341 2175 goto err_fr;
ca7ed0f2 2176 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 2177 if (!panelp) {
1da177e4 2178 printk("STALLION: failed to allocate memory "
ca7ed0f2 2179 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341 2180 goto err_fr;
1da177e4 2181 }
1da177e4
LT		 2182 panelp->magic = STL_PANELMAGIC;
2183 panelp->brdnr = brdp->brdnr;
2184 panelp->panelnr = panelnr;
2185 panelp->iobase = ioaddr;
2186 panelp->pagenr = nxtid;
2187 panelp->hwid = status;
2188 brdp->bnk2panel[banknr] = panelp;
2189 brdp->bnkpageaddr[banknr] = nxtid;
2190 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2191
2192 if (status & ECH_PNLXPID) {
615e4a71 2193 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 2194 panelp->isr = stl_sc26198intr;
2195 if (status & ECH_PNL16PORT) {
2196 panelp->nrports = 16;
2197 brdp->bnk2panel[banknr] = panelp;
2198 brdp->bnkpageaddr[banknr] = nxtid;
2199 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2200 ECH_PNLSTATUS;
c62429d9 2201 } else
1da177e4 2202 panelp->nrports = 8;
1da177e4 2203 } else {
615e4a71 2204 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 2205 panelp->isr = stl_cd1400echintr;
2206 if (status & ECH_PNL16PORT) {
2207 panelp->nrports = 16;
2208 panelp->ackmask = 0x80;
2209 if (brdp->brdtype != BRD_ECHPCI)
2210 ioaddr += EREG_BANKSIZE;
2211 brdp->bnk2panel[banknr] = panelp;
2212 brdp->bnkpageaddr[banknr] = ++nxtid;
2213 brdp->bnkstataddr[banknr++] = ioaddr +
2214 ECH_PNLSTATUS;
2215 } else {
2216 panelp->nrports = 8;
2217 panelp->ackmask = 0xc0;
2218 }
2219 }
2220
2221 nxtid++;
2222 ioaddr += EREG_BANKSIZE;
2223 brdp->nrports += panelp->nrports;
2224 brdp->panels[panelnr++] = panelp;
2225 if ((brdp->brdtype != BRD_ECHPCI) &&
2226 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2)))
3b85b341 2227 goto err_fr;
1da177e4
LT		 2228 }
2229
2230 brdp->nrpanels = panelnr;
2231 brdp->nrbnks = banknr;
2232 if (brdp->brdtype == BRD_ECH)
2233 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2234
2235 brdp->state |= BRD_FOUND;
0f2ed4c6 2236 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2237 printk("STALLION: failed to register interrupt "
2238 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2239 retval = -ENODEV;
2240 goto err_fr;
1da177e4
LT		 2241 }
2242
3b85b341
JS		 2243 return 0;
2244err_fr:
2245 stl_cleanup_panels(brdp);
2246 if (brdp->iosize2 > 0)
2247 release_region(brdp->ioaddr2, brdp->iosize2);
2248err_rel1:
2249 release_region(brdp->ioaddr1, brdp->iosize1);
2250err:
2251 return retval;
1da177e4
LT		 2252}
2253
2254/*****************************************************************************/
2255
2256/*
2257 * Initialize and configure the specified board.
2258 * Scan through all the boards in the configuration and see what we
2259 * can find. Handle EIO and the ECH boards a little differently here
2260 * since the initial search and setup is very different.
2261 */
2262
705c1862 2263static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2264{
3b85b341 2265 int i, retval;
1da177e4 2266
a0564e14 2267 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2268
2269 switch (brdp->brdtype) {
2270 case BRD_EASYIO:
2271 case BRD_EASYIOPCI:
3b85b341
JS		 2272 retval = stl_initeio(brdp);
2273 if (retval)
2274 goto err;
1da177e4
LT		 2275 break;
2276 case BRD_ECH:
2277 case BRD_ECHMC:
2278 case BRD_ECHPCI:
2279 case BRD_ECH64PCI:
3b85b341
JS		 2280 retval = stl_initech(brdp);
2281 if (retval)
2282 goto err;
1da177e4
LT		 2283 break;
2284 default:
2285 printk("STALLION: board=%d is unknown board type=%d\n",
2286 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2287 retval = -ENODEV;
2288 goto err;
1da177e4
LT		 2289 }
2290
1da177e4
LT		 2291 if ((brdp->state & BRD_FOUND) == 0) {
2292 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2293 stl_brdnames[brdp->brdtype], brdp->brdnr,
2294 brdp->ioaddr1, brdp->irq);
3b85b341 2295 goto err_free;
1da177e4
LT		 2296 }
2297
c62429d9 2298 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2299 if (brdp->panels[i] != NULL)
1da177e4
LT		 2300 stl_initports(brdp, brdp->panels[i]);
2301
2302 printk("STALLION: %s found, board=%d io=%x irq=%d "
2303 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2304 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2305 brdp->nrports);
3b85b341
JS		 2306
2307 return 0;
2308err_free:
2309 free_irq(brdp->irq, brdp);
2310
2311 stl_cleanup_panels(brdp);
2312
2313 release_region(brdp->ioaddr1, brdp->iosize1);
2314 if (brdp->iosize2 > 0)
2315 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2316err:
2317 return retval;
1da177e4
LT		 2318}
2319
2320/*****************************************************************************/
2321
2322/*
2323 * Find the next available board number that is free.
2324 */
2325
705c1862 2326static int __devinit stl_getbrdnr(void)
1da177e4 2327{
6b2c9457 2328 unsigned int i;
1da177e4 2329
c62429d9 2330 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2331 if (stl_brds[i] == NULL) {
1da177e4
LT		 2332 if (i >= stl_nrbrds)
2333 stl_nrbrds = i + 1;
c62429d9 2334 return i;
1da177e4 2335 }
c62429d9
JS		 2336
2337 return -1;
1da177e4
LT		 2338}
2339
b1b84fe0 2340/*****************************************************************************/
1da177e4
LT		 2341/*
2342 * We have a Stallion board. Allocate a board structure and
2343 * initialize it. Read its IO and IRQ resources from PCI
2344 * configuration space.
2345 */
2346
b1b84fe0
JS		 2347static int __devinit stl_pciprobe(struct pci_dev *pdev,
2348 const struct pci_device_id *ent)
1da177e4 2349{
b1b84fe0 2350 struct stlbrd *brdp;
aeaccfe4 2351 unsigned int i, brdtype = ent->driver_data;
6b2c9457 2352 int brdnr, retval = -ENODEV;
1da177e4 2353
b1b84fe0 2354 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2355 goto err;
b1b84fe0
JS		 2356
2357 dev_info(&pdev->dev, "please, report this to LKML: %x/%x/%x\n",
2358 pdev->vendor, pdev->device, pdev->class);
1da177e4 2359
3b85b341
JS		 2360 retval = pci_enable_device(pdev);
2361 if (retval)
2362 goto err;
2363 brdp = stl_allocbrd();
2364 if (brdp == NULL) {
2365 retval = -ENOMEM;
2366 goto err;
2367 }
79cfe7ab 2368 mutex_lock(&stl_brdslock);
6b2c9457
JS		 2369 brdnr = stl_getbrdnr();
2370 if (brdnr < 0) {
fefaf9a7 2371 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2372 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2373 mutex_unlock(&stl_brdslock);
3b85b341 2374 goto err_fr;
1da177e4 2375 }
6b2c9457 2376 brdp->brdnr = (unsigned int)brdnr;
79cfe7ab
JS		 2377 stl_brds[brdp->brdnr] = brdp;
2378 mutex_unlock(&stl_brdslock);
2379
1da177e4 2380 brdp->brdtype = brdtype;
fc06b5cf 2381 brdp->state |= STL_PROBED;
1da177e4 2382
1da177e4
LT		 2383/*
2384 * We have all resources from the board, so let's setup the actual
2385 * board structure now.
2386 */
2387 switch (brdtype) {
2388 case BRD_ECHPCI:
b1b84fe0
JS		 2389 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2390 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2391 break;
2392 case BRD_ECH64PCI:
b1b84fe0
JS		 2393 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2394 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2395 break;
2396 case BRD_EASYIOPCI:
b1b84fe0
JS		 2397 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2398 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2399 break;
2400 default:
fefaf9a7 2401 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2402 break;
2403 }
2404
b1b84fe0 2405 brdp->irq = pdev->irq;
3b85b341
JS		 2406 retval = stl_brdinit(brdp);
2407 if (retval)
79cfe7ab 2408 goto err_null;
1da177e4 2409
b1b84fe0
JS		 2410 pci_set_drvdata(pdev, brdp);
2411
aeaccfe4
JS		 2412 for (i = 0; i < brdp->nrports; i++)
2413 tty_register_device(stl_serial,
2414 brdp->brdnr * STL_MAXPORTS + i, &pdev->dev);
2415
3b85b341 2416 return 0;
79cfe7ab
JS		 2417err_null:
2418 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2419err_fr:
2420 kfree(brdp);
2421err:
2422 return retval;
1da177e4
LT		 2423}
2424
b1b84fe0 2425static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2426{
b1b84fe0 2427 struct stlbrd *brdp = pci_get_drvdata(pdev);
aeaccfe4 2428 unsigned int i;
1da177e4 2429
b1b84fe0 2430 free_irq(brdp->irq, brdp);
1da177e4 2431
b1b84fe0 2432 stl_cleanup_panels(brdp);
1da177e4 2433
b1b84fe0
JS		 2434 release_region(brdp->ioaddr1, brdp->iosize1);
2435 if (brdp->iosize2 > 0)
2436 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2437
aeaccfe4
JS		 2438 for (i = 0; i < brdp->nrports; i++)
2439 tty_unregister_device(stl_serial,
2440 brdp->brdnr * STL_MAXPORTS + i);
2441
b1b84fe0
JS		 2442 stl_brds[brdp->brdnr] = NULL;
2443 kfree(brdp);
1da177e4
LT		 2444}
2445
b1b84fe0
JS		 2446static struct pci_driver stl_pcidriver = {
2447 .name = "stallion",
2448 .id_table = stl_pcibrds,
2449 .probe = stl_pciprobe,
2450 .remove = __devexit_p(stl_pciremove)
2451};
1da177e4
LT		 2452
2453/*****************************************************************************/
2454
1da177e4
LT		 2455/*
2456 * Return the board stats structure to user app.
2457 */
2458
2459static int stl_getbrdstats(combrd_t __user *bp)
2460{
6b2c9457 2461 combrd_t stl_brdstats;
ca7ed0f2
JS		 2462 struct stlbrd *brdp;
2463 struct stlpanel *panelp;
6b2c9457 2464 unsigned int i;
1da177e4
LT		 2465
2466 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2467 return -EFAULT;
2468 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2469 return -ENODEV;
1da177e4 2470 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2471 if (brdp == NULL)
c62429d9 2472 return -ENODEV;
1da177e4
LT		 2473
2474 memset(&stl_brdstats, 0, sizeof(combrd_t));
2475 stl_brdstats.brd = brdp->brdnr;
2476 stl_brdstats.type = brdp->brdtype;
2477 stl_brdstats.hwid = brdp->hwid;
2478 stl_brdstats.state = brdp->state;
2479 stl_brdstats.ioaddr = brdp->ioaddr1;
2480 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2481 stl_brdstats.irq = brdp->irq;
2482 stl_brdstats.nrpanels = brdp->nrpanels;
2483 stl_brdstats.nrports = brdp->nrports;
c62429d9 2484 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2485 panelp = brdp->panels[i];
2486 stl_brdstats.panels[i].panel = i;
2487 stl_brdstats.panels[i].hwid = panelp->hwid;
2488 stl_brdstats.panels[i].nrports = panelp->nrports;
2489 }
2490
2491 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2492}
2493
2494/*****************************************************************************/
2495
2496/*
2497 * Resolve the referenced port number into a port struct pointer.
2498 */
2499
ca7ed0f2 2500static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2501{
ca7ed0f2
JS		 2502 struct stlbrd *brdp;
2503 struct stlpanel *panelp;
1da177e4 2504
c62429d9
JS		 2505 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2506 return NULL;
1da177e4 2507 brdp = stl_brds[brdnr];
615e4a71 2508 if (brdp == NULL)
c62429d9 2509 return NULL;
6b2c9457 2510 if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels)
c62429d9 2511 return NULL;
1da177e4 2512 panelp = brdp->panels[panelnr];
615e4a71 2513 if (panelp == NULL)
c62429d9 2514 return NULL;
6b2c9457 2515 if (portnr < 0 || (unsigned int)portnr >= panelp->nrports)
c62429d9
JS		 2516 return NULL;
2517 return panelp->ports[portnr];
1da177e4
LT		 2518}
2519
2520/*****************************************************************************/
2521
2522/*
2523 * Return the port stats structure to user app. A NULL port struct
2524 * pointer passed in means that we need to find out from the app
2525 * what port to get stats for (used through board control device).
2526 */
2527
ca7ed0f2 2528static int stl_getportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2529{
6b2c9457 2530 comstats_t stl_comstats;
1da177e4
LT		 2531 unsigned char *head, *tail;
2532 unsigned long flags;
2533
2534 if (!portp) {
2535 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2536 return -EFAULT;
2537 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2538 stl_comstats.port);
615e4a71 2539 if (portp == NULL)
c62429d9 2540 return -ENODEV;
1da177e4
LT		 2541 }
2542
2543 portp->stats.state = portp->istate;
2544 portp->stats.flags = portp->flags;
2545 portp->stats.hwid = portp->hwid;
2546
2547 portp->stats.ttystate = 0;
2548 portp->stats.cflags = 0;
2549 portp->stats.iflags = 0;
2550 portp->stats.oflags = 0;
2551 portp->stats.lflags = 0;
2552 portp->stats.rxbuffered = 0;
2553
b65b5b59 2554 spin_lock_irqsave(&stallion_lock, flags);
c62429d9 2555 if (portp->tty != NULL)
1da177e4
LT		 2556 if (portp->tty->driver_data == portp) {
2557 portp->stats.ttystate = portp->tty->flags;
33f0f88f
AC		 2558 /* No longer available as a statistic */
2559 portp->stats.rxbuffered = 1; /*portp->tty->flip.count; */
615e4a71 2560 if (portp->tty->termios != NULL) {
1da177e4
LT		 2561 portp->stats.cflags = portp->tty->termios->c_cflag;
2562 portp->stats.iflags = portp->tty->termios->c_iflag;
2563 portp->stats.oflags = portp->tty->termios->c_oflag;
2564 portp->stats.lflags = portp->tty->termios->c_lflag;
2565 }
2566 }
b65b5b59 2567 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2568
2569 head = portp->tx.head;
2570 tail = portp->tx.tail;
c62429d9
JS		 2571 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2572 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2573
2574 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2575
2576 return copy_to_user(cp, &portp->stats,
2577 sizeof(comstats_t)) ? -EFAULT : 0;
2578}
2579
2580/*****************************************************************************/
2581
2582/*
2583 * Clear the port stats structure. We also return it zeroed out...
2584 */
2585
ca7ed0f2 2586static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2587{
6b2c9457
JS		 2588 comstats_t stl_comstats;
2589
1da177e4
LT		 2590 if (!portp) {
2591 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2592 return -EFAULT;
2593 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2594 stl_comstats.port);
615e4a71 2595 if (portp == NULL)
c62429d9 2596 return -ENODEV;
1da177e4
LT		 2597 }
2598
2599 memset(&portp->stats, 0, sizeof(comstats_t));
2600 portp->stats.brd = portp->brdnr;
2601 portp->stats.panel = portp->panelnr;
2602 portp->stats.port = portp->portnr;
2603 return copy_to_user(cp, &portp->stats,
2604 sizeof(comstats_t)) ? -EFAULT : 0;
2605}
2606
2607/*****************************************************************************/
2608
2609/*
2610 * Return the entire driver ports structure to a user app.
2611 */
2612
ca7ed0f2 2613static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2614{
6b2c9457 2615 struct stlport stl_dummyport;
ca7ed0f2 2616 struct stlport *portp;
1da177e4 2617
ca7ed0f2 2618 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2619 return -EFAULT;
2620 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2621 stl_dummyport.portnr);
2622 if (!portp)
2623 return -ENODEV;
ca7ed0f2 2624 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2625}
2626
2627/*****************************************************************************/
2628
2629/*
2630 * Return the entire driver board structure to a user app.
2631 */
2632
ca7ed0f2 2633static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2634{
6b2c9457 2635 struct stlbrd stl_dummybrd;
ca7ed0f2 2636 struct stlbrd *brdp;
1da177e4 2637
ca7ed0f2 2638 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4 2639 return -EFAULT;
6b2c9457 2640 if (stl_dummybrd.brdnr >= STL_MAXBRDS)
1da177e4
LT		 2641 return -ENODEV;
2642 brdp = stl_brds[stl_dummybrd.brdnr];
2643 if (!brdp)
c62429d9 2644 return -ENODEV;
ca7ed0f2 2645 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2646}
2647
2648/*****************************************************************************/
2649
2650/*
2651 * The "staliomem" device is also required to do some special operations
2652 * on the board and/or ports. In this driver it is mostly used for stats
2653 * collection.
2654 */
2655
2656static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg)
2657{
2658 int brdnr, rc;
2659 void __user *argp = (void __user *)arg;
2660
a0564e14 2661 pr_debug("stl_memioctl(ip=%p,fp=%p,cmd=%x,arg=%lx)\n", ip, fp, cmd,arg);
1da177e4
LT		 2662
2663 brdnr = iminor(ip);
2664 if (brdnr >= STL_MAXBRDS)
c62429d9 2665 return -ENODEV;
1da177e4
LT		 2666 rc = 0;
2667
2668 switch (cmd) {
2669 case COM_GETPORTSTATS:
2670 rc = stl_getportstats(NULL, argp);
2671 break;
2672 case COM_CLRPORTSTATS:
2673 rc = stl_clrportstats(NULL, argp);
2674 break;
2675 case COM_GETBRDSTATS:
2676 rc = stl_getbrdstats(argp);
2677 break;
2678 case COM_READPORT:
2679 rc = stl_getportstruct(argp);
2680 break;
2681 case COM_READBOARD:
2682 rc = stl_getbrdstruct(argp);
2683 break;
2684 default:
2685 rc = -ENOIOCTLCMD;
2686 break;
2687 }
2688
c62429d9 2689 return rc;
1da177e4
LT		 2690}
2691
b68e31d0 2692static const struct tty_operations stl_ops = {
1da177e4
LT		 2693 .open = stl_open,
2694 .close = stl_close,
2695 .write = stl_write,
2696 .put_char = stl_putchar,
2697 .flush_chars = stl_flushchars,
2698 .write_room = stl_writeroom,
2699 .chars_in_buffer = stl_charsinbuffer,
2700 .ioctl = stl_ioctl,
2701 .set_termios = stl_settermios,
2702 .throttle = stl_throttle,
2703 .unthrottle = stl_unthrottle,
2704 .stop = stl_stop,
2705 .start = stl_start,
2706 .hangup = stl_hangup,
2707 .flush_buffer = stl_flushbuffer,
2708 .break_ctl = stl_breakctl,
2709 .wait_until_sent = stl_waituntilsent,
2710 .send_xchar = stl_sendxchar,
2711 .read_proc = stl_readproc,
2712 .tiocmget = stl_tiocmget,
2713 .tiocmset = stl_tiocmset,
2714};
2715
1da177e4
LT		 2716/*****************************************************************************/
2717/* CD1400 HARDWARE FUNCTIONS */
2718/*****************************************************************************/
2719
2720/*
2721 * These functions get/set/update the registers of the cd1400 UARTs.
2722 * Access to the cd1400 registers is via an address/data io port pair.
2723 * (Maybe should make this inline...)
2724 */
2725
ca7ed0f2 2726static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2727{
2728 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2729 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2730}
2731
ca7ed0f2 2732static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2733{
c62429d9 2734 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2735 outb(value, portp->ioaddr + EREG_DATA);
2736}
2737
ca7ed0f2 2738static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2739{
c62429d9 2740 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2741 if (inb(portp->ioaddr + EREG_DATA) != value) {
2742 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2743 return 1;
1da177e4 2744 }
014c2544 2745 return 0;
1da177e4
LT		 2746}
2747
2748/*****************************************************************************/
2749
2750/*
2751 * Inbitialize the UARTs in a panel. We don't care what sort of board
2752 * these ports are on - since the port io registers are almost
2753 * identical when dealing with ports.
2754 */
2755
ca7ed0f2 2756static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2757{
2758 unsigned int gfrcr;
2759 int chipmask, i, j;
2760 int nrchips, uartaddr, ioaddr;
b65b5b59 2761 unsigned long flags;
1da177e4 2762
a0564e14 2763 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2764
b65b5b59 2765 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2766 BRDENABLE(panelp->brdnr, panelp->pagenr);
2767
2768/*
2769 * Check that each chip is present and started up OK.
2770 */
2771 chipmask = 0;
2772 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2773 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2774 if (brdp->brdtype == BRD_ECHPCI) {
2775 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2776 ioaddr = panelp->iobase;
c62429d9 2777 } else
1da177e4 2778 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2779 uartaddr = (i & 0x01) ? 0x080 : 0;
2780 outb((GFRCR + uartaddr), ioaddr);
2781 outb(0, (ioaddr + EREG_DATA));
2782 outb((CCR + uartaddr), ioaddr);
2783 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2784 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2785 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2786 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2787 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2788 break;
c62429d9 2789
1da177e4
LT		 2790 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2791 printk("STALLION: cd1400 not responding, "
2792 "brd=%d panel=%d chip=%d\n",
2793 panelp->brdnr, panelp->panelnr, i);
2794 continue;
2795 }
2796 chipmask |= (0x1 << i);
2797 outb((PPR + uartaddr), ioaddr);
2798 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2799 }
2800
2801 BRDDISABLE(panelp->brdnr);
b65b5b59 2802 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2803 return chipmask;
1da177e4
LT		 2804}
2805
2806/*****************************************************************************/
2807
2808/*
2809 * Initialize hardware specific port registers.
2810 */
2811
ca7ed0f2 2812static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2813{
b65b5b59 2814 unsigned long flags;
a0564e14
JS		 2815 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2816 panelp, portp);
1da177e4 2817
615e4a71
JS		 2818 if ((brdp == NULL) || (panelp == NULL) ||
2819 (portp == NULL))
1da177e4
LT		 2820 return;
2821
b65b5b59 2822 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2823 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2824 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2825 portp->uartaddr = (portp->portnr & 0x04) << 5;
2826 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2827
2828 BRDENABLE(portp->brdnr, portp->pagenr);
2829 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2830 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2831 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2832 BRDDISABLE(portp->brdnr);
b65b5b59 2833 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2834}
2835
2836/*****************************************************************************/
2837
2838/*
2839 * Wait for the command register to be ready. We will poll this,
2840 * since it won't usually take too long to be ready.
2841 */
2842
ca7ed0f2 2843static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2844{
2845 int i;
2846
c62429d9
JS		 2847 for (i = 0; i < CCR_MAXWAIT; i++)
2848 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2849 return;
1da177e4
LT		 2850
2851 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2852 portp->portnr, portp->panelnr, portp->brdnr);
2853}
2854
2855/*****************************************************************************/
2856
2857/*
2858 * Set up the cd1400 registers for a port based on the termios port
2859 * settings.
2860 */
2861
606d099c 2862static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2863{
ca7ed0f2 2864 struct stlbrd *brdp;
1da177e4
LT		 2865 unsigned long flags;
2866 unsigned int clkdiv, baudrate;
2867 unsigned char cor1, cor2, cor3;
2868 unsigned char cor4, cor5, ccr;
2869 unsigned char srer, sreron, sreroff;
2870 unsigned char mcor1, mcor2, rtpr;
2871 unsigned char clk, div;
2872
2873 cor1 = 0;
2874 cor2 = 0;
2875 cor3 = 0;
2876 cor4 = 0;
2877 cor5 = 0;
2878 ccr = 0;
2879 rtpr = 0;
2880 clk = 0;
2881 div = 0;
2882 mcor1 = 0;
2883 mcor2 = 0;
2884 sreron = 0;
2885 sreroff = 0;
2886
2887 brdp = stl_brds[portp->brdnr];
615e4a71 2888 if (brdp == NULL)
1da177e4
LT		 2889 return;
2890
2891/*
2892 * Set up the RX char ignore mask with those RX error types we
2893 * can ignore. We can get the cd1400 to help us out a little here,
2894 * it will ignore parity errors and breaks for us.
2895 */
2896 portp->rxignoremsk = 0;
2897 if (tiosp->c_iflag & IGNPAR) {
2898 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2899 cor1 |= COR1_PARIGNORE;
2900 }
2901 if (tiosp->c_iflag & IGNBRK) {
2902 portp->rxignoremsk |= ST_BREAK;
2903 cor4 |= COR4_IGNBRK;
2904 }
2905
2906 portp->rxmarkmsk = ST_OVERRUN;
2907 if (tiosp->c_iflag & (INPCK | PARMRK))
2908 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2909 if (tiosp->c_iflag & BRKINT)
2910 portp->rxmarkmsk |= ST_BREAK;
2911
2912/*
2913 * Go through the char size, parity and stop bits and set all the
2914 * option register appropriately.
2915 */
2916 switch (tiosp->c_cflag & CSIZE) {
2917 case CS5:
2918 cor1 |= COR1_CHL5;
2919 break;
2920 case CS6:
2921 cor1 |= COR1_CHL6;
2922 break;
2923 case CS7:
2924 cor1 |= COR1_CHL7;
2925 break;
2926 default:
2927 cor1 |= COR1_CHL8;
2928 break;
2929 }
2930
2931 if (tiosp->c_cflag & CSTOPB)
2932 cor1 |= COR1_STOP2;
2933 else
2934 cor1 |= COR1_STOP1;
2935
2936 if (tiosp->c_cflag & PARENB) {
2937 if (tiosp->c_cflag & PARODD)
2938 cor1 |= (COR1_PARENB | COR1_PARODD);
2939 else
2940 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2941 } else {
2942 cor1 |= COR1_PARNONE;
2943 }
2944
2945/*
2946 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2947 * space for hardware flow control and the like. This should be set to
2948 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2949 * really be based on VTIME.
2950 */
2951 cor3 |= FIFO_RXTHRESHOLD;
2952 rtpr = 2;
2953
2954/*
2955 * Calculate the baud rate timers. For now we will just assume that
2956 * the input and output baud are the same. Could have used a baud
2957 * table here, but this way we can generate virtually any baud rate
2958 * we like!
2959 */
2960 baudrate = tiosp->c_cflag & CBAUD;
2961 if (baudrate & CBAUDEX) {
2962 baudrate &= ~CBAUDEX;
2963 if ((baudrate < 1) || (baudrate > 4))
2964 tiosp->c_cflag &= ~CBAUDEX;
2965 else
2966 baudrate += 15;
2967 }
2968 baudrate = stl_baudrates[baudrate];
2969 if ((tiosp->c_cflag & CBAUD) == B38400) {
2970 if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
2971 baudrate = 57600;
2972 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
2973 baudrate = 115200;
2974 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
2975 baudrate = 230400;
2976 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
2977 baudrate = 460800;
2978 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
2979 baudrate = (portp->baud_base / portp->custom_divisor);
2980 }
2981 if (baudrate > STL_CD1400MAXBAUD)
2982 baudrate = STL_CD1400MAXBAUD;
2983
2984 if (baudrate > 0) {
c62429d9
JS		 2985 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2986 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2987 if (clkdiv < 0x100)
2988 break;
2989 }
2990 div = (unsigned char) clkdiv;
2991 }
2992
2993/*
2994 * Check what form of modem signaling is required and set it up.
2995 */
2996 if ((tiosp->c_cflag & CLOCAL) == 0) {
2997 mcor1 |= MCOR1_DCD;
2998 mcor2 |= MCOR2_DCD;
2999 sreron |= SRER_MODEM;
3000 portp->flags |= ASYNC_CHECK_CD;
c62429d9 3001 } else
1da177e4 3002 portp->flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 3003
3004/*
3005 * Setup cd1400 enhanced modes if we can. In particular we want to
3006 * handle as much of the flow control as possible automatically. As
3007 * well as saving a few CPU cycles it will also greatly improve flow
3008 * control reliability.
3009 */
3010 if (tiosp->c_iflag & IXON) {
3011 cor2 |= COR2_TXIBE;
3012 cor3 |= COR3_SCD12;
3013 if (tiosp->c_iflag & IXANY)
3014 cor2 |= COR2_IXM;
3015 }
3016
3017 if (tiosp->c_cflag & CRTSCTS) {
3018 cor2 |= COR2_CTSAE;
3019 mcor1 |= FIFO_RTSTHRESHOLD;
3020 }
3021
3022/*
3023 * All cd1400 register values calculated so go through and set
3024 * them all up.
3025 */
3026
a0564e14 3027 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3028 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 3029 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 3030 cor1, cor2, cor3, cor4, cor5);
a0564e14 3031 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 3032 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 3033 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
3034 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3035 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3036 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3037
b65b5b59 3038 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3039 BRDENABLE(portp->brdnr, portp->pagenr);
3040 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3041 srer = stl_cd1400getreg(portp, SRER);
3042 stl_cd1400setreg(portp, SRER, 0);
3043 if (stl_cd1400updatereg(portp, COR1, cor1))
3044 ccr = 1;
3045 if (stl_cd1400updatereg(portp, COR2, cor2))
3046 ccr = 1;
3047 if (stl_cd1400updatereg(portp, COR3, cor3))
3048 ccr = 1;
3049 if (ccr) {
3050 stl_cd1400ccrwait(portp);
3051 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
3052 }
3053 stl_cd1400setreg(portp, COR4, cor4);
3054 stl_cd1400setreg(portp, COR5, cor5);
3055 stl_cd1400setreg(portp, MCOR1, mcor1);
3056 stl_cd1400setreg(portp, MCOR2, mcor2);
3057 if (baudrate > 0) {
3058 stl_cd1400setreg(portp, TCOR, clk);
3059 stl_cd1400setreg(portp, TBPR, div);
3060 stl_cd1400setreg(portp, RCOR, clk);
3061 stl_cd1400setreg(portp, RBPR, div);
3062 }
3063 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
3064 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
3065 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
3066 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
3067 stl_cd1400setreg(portp, RTPR, rtpr);
3068 mcor1 = stl_cd1400getreg(portp, MSVR1);
3069 if (mcor1 & MSVR1_DCD)
3070 portp->sigs |= TIOCM_CD;
3071 else
3072 portp->sigs &= ~TIOCM_CD;
3073 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
3074 BRDDISABLE(portp->brdnr);
b65b5b59 3075 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3076}
3077
3078/*****************************************************************************/
3079
3080/*
3081 * Set the state of the DTR and RTS signals.
3082 */
3083
ca7ed0f2 3084static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3085{
3086 unsigned char msvr1, msvr2;
3087 unsigned long flags;
3088
a0564e14
JS		 3089 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
3090 portp, dtr, rts);
1da177e4
LT		 3091
3092 msvr1 = 0;
3093 msvr2 = 0;
3094 if (dtr > 0)
3095 msvr1 = MSVR1_DTR;
3096 if (rts > 0)
3097 msvr2 = MSVR2_RTS;
3098
b65b5b59 3099 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3100 BRDENABLE(portp->brdnr, portp->pagenr);
3101 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3102 if (rts >= 0)
3103 stl_cd1400setreg(portp, MSVR2, msvr2);
3104 if (dtr >= 0)
3105 stl_cd1400setreg(portp, MSVR1, msvr1);
3106 BRDDISABLE(portp->brdnr);
b65b5b59 3107 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3108}
3109
3110/*****************************************************************************/
3111
3112/*
3113 * Return the state of the signals.
3114 */
3115
ca7ed0f2 3116static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 3117{
3118 unsigned char msvr1, msvr2;
3119 unsigned long flags;
3120 int sigs;
3121
a0564e14 3122 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 3123
b65b5b59 3124 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3125 BRDENABLE(portp->brdnr, portp->pagenr);
3126 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3127 msvr1 = stl_cd1400getreg(portp, MSVR1);
3128 msvr2 = stl_cd1400getreg(portp, MSVR2);
3129 BRDDISABLE(portp->brdnr);
b65b5b59 3130 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3131
3132 sigs = 0;
3133 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
3134 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
3135 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
3136 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
3137#if 0
3138 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
3139 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
3140#else
3141 sigs |= TIOCM_DSR;
3142#endif
014c2544 3143 return sigs;
1da177e4
LT		 3144}
3145
3146/*****************************************************************************/
3147
3148/*
3149 * Enable/Disable the Transmitter and/or Receiver.
3150 */
3151
ca7ed0f2 3152static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3153{
3154 unsigned char ccr;
3155 unsigned long flags;
3156
a0564e14
JS		 3157 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
3158
1da177e4
LT		 3159 ccr = 0;
3160
3161 if (tx == 0)
3162 ccr |= CCR_TXDISABLE;
3163 else if (tx > 0)
3164 ccr |= CCR_TXENABLE;
3165 if (rx == 0)
3166 ccr |= CCR_RXDISABLE;
3167 else if (rx > 0)
3168 ccr |= CCR_RXENABLE;
3169
b65b5b59 3170 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3171 BRDENABLE(portp->brdnr, portp->pagenr);
3172 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3173 stl_cd1400ccrwait(portp);
3174 stl_cd1400setreg(portp, CCR, ccr);
3175 stl_cd1400ccrwait(portp);
3176 BRDDISABLE(portp->brdnr);
b65b5b59 3177 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3178}
3179
3180/*****************************************************************************/
3181
3182/*
3183 * Start/stop the Transmitter and/or Receiver.
3184 */
3185
ca7ed0f2 3186static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3187{
3188 unsigned char sreron, sreroff;
3189 unsigned long flags;
3190
a0564e14 3191 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3192
3193 sreron = 0;
3194 sreroff = 0;
3195 if (tx == 0)
3196 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3197 else if (tx == 1)
3198 sreron |= SRER_TXDATA;
3199 else if (tx >= 2)
3200 sreron |= SRER_TXEMPTY;
3201 if (rx == 0)
3202 sreroff |= SRER_RXDATA;
3203 else if (rx > 0)
3204 sreron |= SRER_RXDATA;
3205
b65b5b59 3206 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3207 BRDENABLE(portp->brdnr, portp->pagenr);
3208 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3209 stl_cd1400setreg(portp, SRER,
3210 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3211 BRDDISABLE(portp->brdnr);
3212 if (tx > 0)
3213 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3214 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3215}
3216
3217/*****************************************************************************/
3218
3219/*
3220 * Disable all interrupts from this port.
3221 */
3222
ca7ed0f2 3223static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3224{
3225 unsigned long flags;
3226
a0564e14
JS		 3227 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3228
b65b5b59 3229 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3230 BRDENABLE(portp->brdnr, portp->pagenr);
3231 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3232 stl_cd1400setreg(portp, SRER, 0);
3233 BRDDISABLE(portp->brdnr);
b65b5b59 3234 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3235}
3236
3237/*****************************************************************************/
3238
ca7ed0f2 3239static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3240{
3241 unsigned long flags;
3242
a0564e14 3243 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3244
b65b5b59 3245 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3246 BRDENABLE(portp->brdnr, portp->pagenr);
3247 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3248 stl_cd1400setreg(portp, SRER,
3249 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3250 SRER_TXEMPTY));
3251 BRDDISABLE(portp->brdnr);
3252 portp->brklen = len;
3253 if (len == 1)
3254 portp->stats.txbreaks++;
b65b5b59 3255 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3256}
3257
3258/*****************************************************************************/
3259
3260/*
3261 * Take flow control actions...
3262 */
3263
ca7ed0f2 3264static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3265{
3266 struct tty_struct *tty;
3267 unsigned long flags;
3268
a0564e14 3269 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3270
615e4a71 3271 if (portp == NULL)
1da177e4
LT		 3272 return;
3273 tty = portp->tty;
615e4a71 3274 if (tty == NULL)
1da177e4
LT		 3275 return;
3276
b65b5b59 3277 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3278 BRDENABLE(portp->brdnr, portp->pagenr);
3279 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3280
3281 if (state) {
3282 if (tty->termios->c_iflag & IXOFF) {
3283 stl_cd1400ccrwait(portp);
3284 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3285 portp->stats.rxxon++;
3286 stl_cd1400ccrwait(portp);
3287 }
3288/*
3289 * Question: should we return RTS to what it was before? It may
3290 * have been set by an ioctl... Suppose not, since if you have
3291 * hardware flow control set then it is pretty silly to go and
3292 * set the RTS line by hand.
3293 */
3294 if (tty->termios->c_cflag & CRTSCTS) {
3295 stl_cd1400setreg(portp, MCOR1,
3296 (stl_cd1400getreg(portp, MCOR1) |
3297 FIFO_RTSTHRESHOLD));
3298 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3299 portp->stats.rxrtson++;
3300 }
3301 } else {
3302 if (tty->termios->c_iflag & IXOFF) {
3303 stl_cd1400ccrwait(portp);
3304 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3305 portp->stats.rxxoff++;
3306 stl_cd1400ccrwait(portp);
3307 }
3308 if (tty->termios->c_cflag & CRTSCTS) {
3309 stl_cd1400setreg(portp, MCOR1,
3310 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3311 stl_cd1400setreg(portp, MSVR2, 0);
3312 portp->stats.rxrtsoff++;
3313 }
3314 }
3315
3316 BRDDISABLE(portp->brdnr);
b65b5b59 3317 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3318}
3319
3320/*****************************************************************************/
3321
3322/*
3323 * Send a flow control character...
3324 */
3325
ca7ed0f2 3326static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3327{
3328 struct tty_struct *tty;
3329 unsigned long flags;
3330
a0564e14 3331 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3332
615e4a71 3333 if (portp == NULL)
1da177e4
LT		 3334 return;
3335 tty = portp->tty;
615e4a71 3336 if (tty == NULL)
1da177e4
LT		 3337 return;
3338
b65b5b59 3339 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3340 BRDENABLE(portp->brdnr, portp->pagenr);
3341 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3342 if (state) {
3343 stl_cd1400ccrwait(portp);
3344 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3345 portp->stats.rxxon++;
3346 stl_cd1400ccrwait(portp);
3347 } else {
3348 stl_cd1400ccrwait(portp);
3349 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3350 portp->stats.rxxoff++;
3351 stl_cd1400ccrwait(portp);
3352 }
3353 BRDDISABLE(portp->brdnr);
b65b5b59 3354 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3355}
3356
3357/*****************************************************************************/
3358
ca7ed0f2 3359static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3360{
3361 unsigned long flags;
3362
a0564e14 3363 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3364
615e4a71 3365 if (portp == NULL)
1da177e4
LT		 3366 return;
3367
b65b5b59 3368 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3369 BRDENABLE(portp->brdnr, portp->pagenr);
3370 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3371 stl_cd1400ccrwait(portp);
3372 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3373 stl_cd1400ccrwait(portp);
3374 portp->tx.tail = portp->tx.head;
3375 BRDDISABLE(portp->brdnr);
b65b5b59 3376 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3377}
3378
3379/*****************************************************************************/
3380
3381/*
3382 * Return the current state of data flow on this port. This is only
3383 * really interresting when determining if data has fully completed
3384 * transmission or not... This is easy for the cd1400, it accurately
3385 * maintains the busy port flag.
3386 */
3387
ca7ed0f2 3388static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3389{
a0564e14 3390 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3391
615e4a71 3392 if (portp == NULL)
014c2544 3393 return 0;
1da177e4 3394
014c2544 3395 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3396}
3397
3398/*****************************************************************************/
3399
3400/*
3401 * Interrupt service routine for cd1400 EasyIO boards.
3402 */
3403
ca7ed0f2 3404static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3405{
3406 unsigned char svrtype;
3407
a0564e14 3408 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3409
b65b5b59 3410 spin_lock(&brd_lock);
1da177e4
LT		 3411 outb(SVRR, iobase);
3412 svrtype = inb(iobase + EREG_DATA);
3413 if (panelp->nrports > 4) {
3414 outb((SVRR + 0x80), iobase);
3415 svrtype |= inb(iobase + EREG_DATA);
3416 }
3417
3418 if (svrtype & SVRR_RX)
3419 stl_cd1400rxisr(panelp, iobase);
3420 else if (svrtype & SVRR_TX)
3421 stl_cd1400txisr(panelp, iobase);
3422 else if (svrtype & SVRR_MDM)
3423 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3424
3425 spin_unlock(&brd_lock);
1da177e4
LT		 3426}
3427
3428/*****************************************************************************/
3429
3430/*
3431 * Interrupt service routine for cd1400 panels.
3432 */
3433
ca7ed0f2 3434static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3435{
3436 unsigned char svrtype;
3437
a0564e14 3438 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3439
3440 outb(SVRR, iobase);
3441 svrtype = inb(iobase + EREG_DATA);
3442 outb((SVRR + 0x80), iobase);
3443 svrtype |= inb(iobase + EREG_DATA);
3444 if (svrtype & SVRR_RX)
3445 stl_cd1400rxisr(panelp, iobase);
3446 else if (svrtype & SVRR_TX)
3447 stl_cd1400txisr(panelp, iobase);
3448 else if (svrtype & SVRR_MDM)
3449 stl_cd1400mdmisr(panelp, iobase);
3450}
3451
3452
3453/*****************************************************************************/
3454
3455/*
3456 * Unfortunately we need to handle breaks in the TX data stream, since
3457 * this is the only way to generate them on the cd1400.
3458 */
3459
60be4810 3460static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3461{
3462 if (portp->brklen == 1) {
3463 outb((COR2 + portp->uartaddr), ioaddr);
3464 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3465 (ioaddr + EREG_DATA));
3466 outb((TDR + portp->uartaddr), ioaddr);
3467 outb(ETC_CMD, (ioaddr + EREG_DATA));
3468 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3469 outb((SRER + portp->uartaddr), ioaddr);
3470 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3471 (ioaddr + EREG_DATA));
014c2544 3472 return 1;
1da177e4
LT		 3473 } else if (portp->brklen > 1) {
3474 outb((TDR + portp->uartaddr), ioaddr);
3475 outb(ETC_CMD, (ioaddr + EREG_DATA));
3476 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3477 portp->brklen = -1;
014c2544 3478 return 1;
1da177e4
LT		 3479 } else {
3480 outb((COR2 + portp->uartaddr), ioaddr);
3481 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3482 (ioaddr + EREG_DATA));
3483 portp->brklen = 0;
3484 }
014c2544 3485 return 0;
1da177e4
LT		 3486}
3487
3488/*****************************************************************************/
3489
3490/*
3491 * Transmit interrupt handler. This has gotta be fast! Handling TX
3492 * chars is pretty simple, stuff as many as possible from the TX buffer
3493 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3494 * are embedded as commands in the data stream. Oh no, had to use a goto!
3495 * This could be optimized more, will do when I get time...
3496 * In practice it is possible that interrupts are enabled but that the
3497 * port has been hung up. Need to handle not having any TX buffer here,
3498 * this is done by using the side effect that head and tail will also
3499 * be NULL if the buffer has been freed.
3500 */
3501
ca7ed0f2 3502static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3503{
ca7ed0f2 3504 struct stlport *portp;
1da177e4
LT		 3505 int len, stlen;
3506 char *head, *tail;
3507 unsigned char ioack, srer;
3508
a0564e14 3509 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3510
3511 ioack = inb(ioaddr + EREG_TXACK);
3512 if (((ioack & panelp->ackmask) != 0) ||
3513 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3514 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3515 return;
3516 }
3517 portp = panelp->ports[(ioack >> 3)];
3518
3519/*
3520 * Unfortunately we need to handle breaks in the data stream, since
3521 * this is the only way to generate them on the cd1400. Do it now if
3522 * a break is to be sent.
3523 */
3524 if (portp->brklen != 0)
3525 if (stl_cd1400breakisr(portp, ioaddr))
3526 goto stl_txalldone;
3527
3528 head = portp->tx.head;
3529 tail = portp->tx.tail;
3530 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3531 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3532 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3533 set_bit(ASYI_TXLOW, &portp->istate);
3534 schedule_work(&portp->tqueue);
3535 }
3536
3537 if (len == 0) {
3538 outb((SRER + portp->uartaddr), ioaddr);
3539 srer = inb(ioaddr + EREG_DATA);
3540 if (srer & SRER_TXDATA) {
3541 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3542 } else {
3543 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3544 clear_bit(ASYI_TXBUSY, &portp->istate);
3545 }
3546 outb(srer, (ioaddr + EREG_DATA));
3547 } else {
843b568c 3548 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3549 portp->stats.txtotal += len;
843b568c 3550 stlen = min(len, ((portp->tx.buf + STL_TXBUFSIZE) - tail));
1da177e4
LT		 3551 outb((TDR + portp->uartaddr), ioaddr);
3552 outsb((ioaddr + EREG_DATA), tail, stlen);
3553 len -= stlen;
3554 tail += stlen;
3555 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3556 tail = portp->tx.buf;
3557 if (len > 0) {
3558 outsb((ioaddr + EREG_DATA), tail, len);
3559 tail += len;
3560 }
3561 portp->tx.tail = tail;
3562 }
3563
3564stl_txalldone:
3565 outb((EOSRR + portp->uartaddr), ioaddr);
3566 outb(0, (ioaddr + EREG_DATA));
3567}
3568
3569/*****************************************************************************/
3570
3571/*
3572 * Receive character interrupt handler. Determine if we have good chars
3573 * or bad chars and then process appropriately. Good chars are easy
3574 * just shove the lot into the RX buffer and set all status byte to 0.
3575 * If a bad RX char then process as required. This routine needs to be
3576 * fast! In practice it is possible that we get an interrupt on a port
3577 * that is closed. This can happen on hangups - since they completely
3578 * shutdown a port not in user context. Need to handle this case.
3579 */
3580
ca7ed0f2 3581static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3582{
ca7ed0f2 3583 struct stlport *portp;
1da177e4
LT		 3584 struct tty_struct *tty;
3585 unsigned int ioack, len, buflen;
3586 unsigned char status;
3587 char ch;
3588
a0564e14 3589 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3590
3591 ioack = inb(ioaddr + EREG_RXACK);
3592 if ((ioack & panelp->ackmask) != 0) {
3593 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3594 return;
3595 }
3596 portp = panelp->ports[(ioack >> 3)];
3597 tty = portp->tty;
3598
3599 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3600 outb((RDCR + portp->uartaddr), ioaddr);
3601 len = inb(ioaddr + EREG_DATA);
33f0f88f 3602 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
843b568c 3603 len = min(len, sizeof(stl_unwanted));
1da177e4
LT		 3604 outb((RDSR + portp->uartaddr), ioaddr);
3605 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3606 portp->stats.rxlost += len;
3607 portp->stats.rxtotal += len;
3608 } else {
843b568c 3609 len = min(len, buflen);
1da177e4 3610 if (len > 0) {
33f0f88f 3611 unsigned char *ptr;
1da177e4 3612 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3613 tty_prepare_flip_string(tty, &ptr, len);
3614 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3615 tty_schedule_flip(tty);
3616 portp->stats.rxtotal += len;
3617 }
3618 }
3619 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3620 outb((RDSR + portp->uartaddr), ioaddr);
3621 status = inb(ioaddr + EREG_DATA);
3622 ch = inb(ioaddr + EREG_DATA);
3623 if (status & ST_PARITY)
3624 portp->stats.rxparity++;
3625 if (status & ST_FRAMING)
3626 portp->stats.rxframing++;
3627 if (status & ST_OVERRUN)
3628 portp->stats.rxoverrun++;
3629 if (status & ST_BREAK)
3630 portp->stats.rxbreaks++;
3631 if (status & ST_SCHARMASK) {
3632 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3633 portp->stats.txxon++;
3634 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3635 portp->stats.txxoff++;
3636 goto stl_rxalldone;
3637 }
33f0f88f 3638 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3639 if (portp->rxmarkmsk & status) {
3640 if (status & ST_BREAK) {
3641 status = TTY_BREAK;
3642 if (portp->flags & ASYNC_SAK) {
3643 do_SAK(tty);
3644 BRDENABLE(portp->brdnr, portp->pagenr);
3645 }
c62429d9 3646 } else if (status & ST_PARITY)
1da177e4 3647 status = TTY_PARITY;
c62429d9 3648 else if (status & ST_FRAMING)
1da177e4 3649 status = TTY_FRAME;
c62429d9 3650 else if(status & ST_OVERRUN)
1da177e4 3651 status = TTY_OVERRUN;
c62429d9 3652 else
1da177e4 3653 status = 0;
c62429d9 3654 } else
1da177e4 3655 status = 0;
33f0f88f
AC		 3656 tty_insert_flip_char(tty, ch, status);
3657 tty_schedule_flip(tty);
1da177e4
LT		 3658 }
3659 } else {
3660 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3661 return;
3662 }
3663
3664stl_rxalldone:
3665 outb((EOSRR + portp->uartaddr), ioaddr);
3666 outb(0, (ioaddr + EREG_DATA));
3667}
3668
3669/*****************************************************************************/
3670
3671/*
3672 * Modem interrupt handler. The is called when the modem signal line
3673 * (DCD) has changed state. Leave most of the work to the off-level
3674 * processing routine.
3675 */
3676
ca7ed0f2 3677static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3678{
ca7ed0f2 3679 struct stlport *portp;
1da177e4
LT		 3680 unsigned int ioack;
3681 unsigned char misr;
3682
a0564e14 3683 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3684
3685 ioack = inb(ioaddr + EREG_MDACK);
3686 if (((ioack & panelp->ackmask) != 0) ||
3687 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3688 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3689 return;
3690 }
3691 portp = panelp->ports[(ioack >> 3)];
3692
3693 outb((MISR + portp->uartaddr), ioaddr);
3694 misr = inb(ioaddr + EREG_DATA);
3695 if (misr & MISR_DCD) {
3696 set_bit(ASYI_DCDCHANGE, &portp->istate);
3697 schedule_work(&portp->tqueue);
3698 portp->stats.modem++;
3699 }
3700
3701 outb((EOSRR + portp->uartaddr), ioaddr);
3702 outb(0, (ioaddr + EREG_DATA));
3703}
3704
3705/*****************************************************************************/
3706/* SC26198 HARDWARE FUNCTIONS */
3707/*****************************************************************************/
3708
3709/*
3710 * These functions get/set/update the registers of the sc26198 UARTs.
3711 * Access to the sc26198 registers is via an address/data io port pair.
3712 * (Maybe should make this inline...)
3713 */
3714
ca7ed0f2 3715static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3716{
3717 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3718 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3719}
3720
ca7ed0f2 3721static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3722{
3723 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3724 outb(value, (portp->ioaddr + XP_DATA));
3725}
3726
ca7ed0f2 3727static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3728{
3729 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3730 if (inb(portp->ioaddr + XP_DATA) != value) {
3731 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3732 return 1;
1da177e4 3733 }
014c2544 3734 return 0;
1da177e4
LT		 3735}
3736
3737/*****************************************************************************/
3738
3739/*
3740 * Functions to get and set the sc26198 global registers.
3741 */
3742
ca7ed0f2 3743static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3744{
3745 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3746 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3747}
3748
3749#if 0
ca7ed0f2 3750static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3751{
3752 outb(regnr, (portp->ioaddr + XP_ADDR));
3753 outb(value, (portp->ioaddr + XP_DATA));
3754}
3755#endif
3756
3757/*****************************************************************************/
3758
3759/*
3760 * Inbitialize the UARTs in a panel. We don't care what sort of board
3761 * these ports are on - since the port io registers are almost
3762 * identical when dealing with ports.
3763 */
3764
ca7ed0f2 3765static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3766{
3767 int chipmask, i;
3768 int nrchips, ioaddr;
3769
a0564e14 3770 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3771
3772 BRDENABLE(panelp->brdnr, panelp->pagenr);
3773
3774/*
3775 * Check that each chip is present and started up OK.
3776 */
3777 chipmask = 0;
3778 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3779 if (brdp->brdtype == BRD_ECHPCI)
3780 outb(panelp->pagenr, brdp->ioctrl);
3781
c62429d9 3782 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3783 ioaddr = panelp->iobase + (i * 4);
3784 outb(SCCR, (ioaddr + XP_ADDR));
3785 outb(CR_RESETALL, (ioaddr + XP_DATA));
3786 outb(TSTR, (ioaddr + XP_ADDR));
3787 if (inb(ioaddr + XP_DATA) != 0) {
3788 printk("STALLION: sc26198 not responding, "
3789 "brd=%d panel=%d chip=%d\n",
3790 panelp->brdnr, panelp->panelnr, i);
3791 continue;
3792 }
3793 chipmask |= (0x1 << i);
3794 outb(GCCR, (ioaddr + XP_ADDR));
3795 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3796 outb(WDTRCR, (ioaddr + XP_ADDR));
3797 outb(0xff, (ioaddr + XP_DATA));
3798 }
3799
3800 BRDDISABLE(panelp->brdnr);
014c2544 3801 return chipmask;
1da177e4
LT		 3802}
3803
3804/*****************************************************************************/
3805
3806/*
3807 * Initialize hardware specific port registers.
3808 */
3809
ca7ed0f2 3810static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3811{
a0564e14
JS		 3812 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3813 panelp, portp);
1da177e4 3814
615e4a71
JS		 3815 if ((brdp == NULL) || (panelp == NULL) ||
3816 (portp == NULL))
1da177e4
LT		 3817 return;
3818
3819 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3820 portp->uartaddr = (portp->portnr & 0x07) << 4;
3821 portp->pagenr = panelp->pagenr;
3822 portp->hwid = 0x1;
3823
3824 BRDENABLE(portp->brdnr, portp->pagenr);
3825 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3826 BRDDISABLE(portp->brdnr);
3827}
3828
3829/*****************************************************************************/
3830
3831/*
3832 * Set up the sc26198 registers for a port based on the termios port
3833 * settings.
3834 */
3835
606d099c 3836static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3837{
ca7ed0f2 3838 struct stlbrd *brdp;
1da177e4
LT		 3839 unsigned long flags;
3840 unsigned int baudrate;
3841 unsigned char mr0, mr1, mr2, clk;
3842 unsigned char imron, imroff, iopr, ipr;
3843
3844 mr0 = 0;
3845 mr1 = 0;
3846 mr2 = 0;
3847 clk = 0;
3848 iopr = 0;
3849 imron = 0;
3850 imroff = 0;
3851
3852 brdp = stl_brds[portp->brdnr];
615e4a71 3853 if (brdp == NULL)
1da177e4
LT		 3854 return;
3855
3856/*
3857 * Set up the RX char ignore mask with those RX error types we
3858 * can ignore.
3859 */
3860 portp->rxignoremsk = 0;
3861 if (tiosp->c_iflag & IGNPAR)
3862 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3863 SR_RXOVERRUN);
3864 if (tiosp->c_iflag & IGNBRK)
3865 portp->rxignoremsk |= SR_RXBREAK;
3866
3867 portp->rxmarkmsk = SR_RXOVERRUN;
3868 if (tiosp->c_iflag & (INPCK | PARMRK))
3869 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3870 if (tiosp->c_iflag & BRKINT)
3871 portp->rxmarkmsk |= SR_RXBREAK;
3872
3873/*
3874 * Go through the char size, parity and stop bits and set all the
3875 * option register appropriately.
3876 */
3877 switch (tiosp->c_cflag & CSIZE) {
3878 case CS5:
3879 mr1 |= MR1_CS5;
3880 break;
3881 case CS6:
3882 mr1 |= MR1_CS6;
3883 break;
3884 case CS7:
3885 mr1 |= MR1_CS7;
3886 break;
3887 default:
3888 mr1 |= MR1_CS8;
3889 break;
3890 }
3891
3892 if (tiosp->c_cflag & CSTOPB)
3893 mr2 |= MR2_STOP2;
3894 else
3895 mr2 |= MR2_STOP1;
3896
3897 if (tiosp->c_cflag & PARENB) {
3898 if (tiosp->c_cflag & PARODD)
3899 mr1 |= (MR1_PARENB | MR1_PARODD);
3900 else
3901 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3902 } else
1da177e4 3903 mr1 |= MR1_PARNONE;
1da177e4
LT		 3904
3905 mr1 |= MR1_ERRBLOCK;
3906
3907/*
3908 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3909 * space for hardware flow control and the like. This should be set to
3910 * VMIN.
3911 */
3912 mr2 |= MR2_RXFIFOHALF;
3913
3914/*
3915 * Calculate the baud rate timers. For now we will just assume that
3916 * the input and output baud are the same. The sc26198 has a fixed
3917 * baud rate table, so only discrete baud rates possible.
3918 */
3919 baudrate = tiosp->c_cflag & CBAUD;
3920 if (baudrate & CBAUDEX) {
3921 baudrate &= ~CBAUDEX;
3922 if ((baudrate < 1) || (baudrate > 4))
3923 tiosp->c_cflag &= ~CBAUDEX;
3924 else
3925 baudrate += 15;
3926 }
3927 baudrate = stl_baudrates[baudrate];
3928 if ((tiosp->c_cflag & CBAUD) == B38400) {
3929 if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
3930 baudrate = 57600;
3931 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
3932 baudrate = 115200;
3933 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
3934 baudrate = 230400;
3935 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
3936 baudrate = 460800;
3937 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
3938 baudrate = (portp->baud_base / portp->custom_divisor);
3939 }
3940 if (baudrate > STL_SC26198MAXBAUD)
3941 baudrate = STL_SC26198MAXBAUD;
3942
c62429d9
JS		 3943 if (baudrate > 0)
3944 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3945 if (baudrate <= sc26198_baudtable[clk])
3946 break;
1da177e4
LT		 3947
3948/*
3949 * Check what form of modem signaling is required and set it up.
3950 */
3951 if (tiosp->c_cflag & CLOCAL) {
3952 portp->flags &= ~ASYNC_CHECK_CD;
3953 } else {
3954 iopr |= IOPR_DCDCOS;
3955 imron |= IR_IOPORT;
3956 portp->flags |= ASYNC_CHECK_CD;
3957 }
3958
3959/*
3960 * Setup sc26198 enhanced modes if we can. In particular we want to
3961 * handle as much of the flow control as possible automatically. As
3962 * well as saving a few CPU cycles it will also greatly improve flow
3963 * control reliability.
3964 */
3965 if (tiosp->c_iflag & IXON) {
3966 mr0 |= MR0_SWFTX | MR0_SWFT;
3967 imron |= IR_XONXOFF;
c62429d9 3968 } else
1da177e4 3969 imroff |= IR_XONXOFF;
c62429d9 3970
1da177e4
LT		 3971 if (tiosp->c_iflag & IXOFF)
3972 mr0 |= MR0_SWFRX;
3973
3974 if (tiosp->c_cflag & CRTSCTS) {
3975 mr2 |= MR2_AUTOCTS;
3976 mr1 |= MR1_AUTORTS;
3977 }
3978
3979/*
3980 * All sc26198 register values calculated so go through and set
3981 * them all up.
3982 */
3983
a0564e14 3984 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3985 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3986 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3987 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3988 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3989 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3990 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3991
b65b5b59 3992 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3993 BRDENABLE(portp->brdnr, portp->pagenr);
3994 stl_sc26198setreg(portp, IMR, 0);
3995 stl_sc26198updatereg(portp, MR0, mr0);
3996 stl_sc26198updatereg(portp, MR1, mr1);
3997 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3998 stl_sc26198updatereg(portp, MR2, mr2);
3999 stl_sc26198updatereg(portp, IOPIOR,
4000 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
4001
4002 if (baudrate > 0) {
4003 stl_sc26198setreg(portp, TXCSR, clk);
4004 stl_sc26198setreg(portp, RXCSR, clk);
4005 }
4006
4007 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
4008 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
4009
4010 ipr = stl_sc26198getreg(portp, IPR);
4011 if (ipr & IPR_DCD)
4012 portp->sigs &= ~TIOCM_CD;
4013 else
4014 portp->sigs |= TIOCM_CD;
4015
4016 portp->imr = (portp->imr & ~imroff) | imron;
4017 stl_sc26198setreg(portp, IMR, portp->imr);
4018 BRDDISABLE(portp->brdnr);
b65b5b59 4019 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4020}
4021
4022/*****************************************************************************/
4023
4024/*
4025 * Set the state of the DTR and RTS signals.
4026 */
4027
ca7ed0f2 4028static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 4029{
4030 unsigned char iopioron, iopioroff;
4031 unsigned long flags;
4032
a0564e14
JS		 4033 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
4034 dtr, rts);
1da177e4
LT		 4035
4036 iopioron = 0;
4037 iopioroff = 0;
4038 if (dtr == 0)
4039 iopioroff |= IPR_DTR;
4040 else if (dtr > 0)
4041 iopioron |= IPR_DTR;
4042 if (rts == 0)
4043 iopioroff |= IPR_RTS;
4044 else if (rts > 0)
4045 iopioron |= IPR_RTS;
4046
b65b5b59 4047 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4048 BRDENABLE(portp->brdnr, portp->pagenr);
4049 stl_sc26198setreg(portp, IOPIOR,
4050 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
4051 BRDDISABLE(portp->brdnr);
b65b5b59 4052 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4053}
4054
4055/*****************************************************************************/
4056
4057/*
4058 * Return the state of the signals.
4059 */
4060
ca7ed0f2 4061static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 4062{
4063 unsigned char ipr;
4064 unsigned long flags;
4065 int sigs;
4066
a0564e14 4067 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 4068
b65b5b59 4069 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4070 BRDENABLE(portp->brdnr, portp->pagenr);
4071 ipr = stl_sc26198getreg(portp, IPR);
4072 BRDDISABLE(portp->brdnr);
b65b5b59 4073 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4074
4075 sigs = 0;
4076 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
4077 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
4078 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
4079 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
4080 sigs |= TIOCM_DSR;
014c2544 4081 return sigs;
1da177e4
LT		 4082}
4083
4084/*****************************************************************************/
4085
4086/*
4087 * Enable/Disable the Transmitter and/or Receiver.
4088 */
4089
ca7ed0f2 4090static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 4091{
4092 unsigned char ccr;
4093 unsigned long flags;
4094
a0564e14 4095 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 4096
4097 ccr = portp->crenable;
4098 if (tx == 0)
4099 ccr &= ~CR_TXENABLE;
4100 else if (tx > 0)
4101 ccr |= CR_TXENABLE;
4102 if (rx == 0)
4103 ccr &= ~CR_RXENABLE;
4104 else if (rx > 0)
4105 ccr |= CR_RXENABLE;
4106
b65b5b59 4107 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4108 BRDENABLE(portp->brdnr, portp->pagenr);
4109 stl_sc26198setreg(portp, SCCR, ccr);
4110 BRDDISABLE(portp->brdnr);
4111 portp->crenable = ccr;
b65b5b59 4112 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4113}
4114
4115/*****************************************************************************/
4116
4117/*
4118 * Start/stop the Transmitter and/or Receiver.
4119 */
4120
ca7ed0f2 4121static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 4122{
4123 unsigned char imr;
4124 unsigned long flags;
4125
a0564e14 4126 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 4127
4128 imr = portp->imr;
4129 if (tx == 0)
4130 imr &= ~IR_TXRDY;
4131 else if (tx == 1)
4132 imr |= IR_TXRDY;
4133 if (rx == 0)
4134 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
4135 else if (rx > 0)
4136 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
4137
b65b5b59 4138 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4139 BRDENABLE(portp->brdnr, portp->pagenr);
4140 stl_sc26198setreg(portp, IMR, imr);
4141 BRDDISABLE(portp->brdnr);
4142 portp->imr = imr;
4143 if (tx > 0)
4144 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 4145 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4146}
4147
4148/*****************************************************************************/
4149
4150/*
4151 * Disable all interrupts from this port.
4152 */
4153
ca7ed0f2 4154static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 4155{
4156 unsigned long flags;
4157
a0564e14 4158 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 4159
b65b5b59 4160 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4161 BRDENABLE(portp->brdnr, portp->pagenr);
4162 portp->imr = 0;
4163 stl_sc26198setreg(portp, IMR, 0);
4164 BRDDISABLE(portp->brdnr);
b65b5b59 4165 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4166}
4167
4168/*****************************************************************************/
4169
ca7ed0f2 4170static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 4171{
4172 unsigned long flags;
4173
a0564e14 4174 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 4175
b65b5b59 4176 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4177 BRDENABLE(portp->brdnr, portp->pagenr);
4178 if (len == 1) {
4179 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4180 portp->stats.txbreaks++;
c62429d9 4181 } else
1da177e4 4182 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 4183
1da177e4 4184 BRDDISABLE(portp->brdnr);
b65b5b59 4185 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4186}
4187
4188/*****************************************************************************/
4189
4190/*
4191 * Take flow control actions...
4192 */
4193
ca7ed0f2 4194static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 4195{
4196 struct tty_struct *tty;
4197 unsigned long flags;
4198 unsigned char mr0;
4199
a0564e14 4200 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4201
615e4a71 4202 if (portp == NULL)
1da177e4
LT		 4203 return;
4204 tty = portp->tty;
615e4a71 4205 if (tty == NULL)
1da177e4
LT		 4206 return;
4207
b65b5b59 4208 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4209 BRDENABLE(portp->brdnr, portp->pagenr);
4210
4211 if (state) {
4212 if (tty->termios->c_iflag & IXOFF) {
4213 mr0 = stl_sc26198getreg(portp, MR0);
4214 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4215 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4216 mr0 |= MR0_SWFRX;
4217 portp->stats.rxxon++;
4218 stl_sc26198wait(portp);
4219 stl_sc26198setreg(portp, MR0, mr0);
4220 }
4221/*
4222 * Question: should we return RTS to what it was before? It may
4223 * have been set by an ioctl... Suppose not, since if you have
4224 * hardware flow control set then it is pretty silly to go and
4225 * set the RTS line by hand.
4226 */
4227 if (tty->termios->c_cflag & CRTSCTS) {
4228 stl_sc26198setreg(portp, MR1,
4229 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4230 stl_sc26198setreg(portp, IOPIOR,
4231 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4232 portp->stats.rxrtson++;
4233 }
4234 } else {
4235 if (tty->termios->c_iflag & IXOFF) {
4236 mr0 = stl_sc26198getreg(portp, MR0);
4237 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4238 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4239 mr0 &= ~MR0_SWFRX;
4240 portp->stats.rxxoff++;
4241 stl_sc26198wait(portp);
4242 stl_sc26198setreg(portp, MR0, mr0);
4243 }
4244 if (tty->termios->c_cflag & CRTSCTS) {
4245 stl_sc26198setreg(portp, MR1,
4246 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4247 stl_sc26198setreg(portp, IOPIOR,
4248 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4249 portp->stats.rxrtsoff++;
4250 }
4251 }
4252
4253 BRDDISABLE(portp->brdnr);
b65b5b59 4254 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4255}
4256
4257/*****************************************************************************/
4258
4259/*
4260 * Send a flow control character.
4261 */
4262
ca7ed0f2 4263static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4264{
4265 struct tty_struct *tty;
4266 unsigned long flags;
4267 unsigned char mr0;
4268
a0564e14 4269 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4270
615e4a71 4271 if (portp == NULL)
1da177e4
LT		 4272 return;
4273 tty = portp->tty;
615e4a71 4274 if (tty == NULL)
1da177e4
LT		 4275 return;
4276
b65b5b59 4277 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4278 BRDENABLE(portp->brdnr, portp->pagenr);
4279 if (state) {
4280 mr0 = stl_sc26198getreg(portp, MR0);
4281 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4282 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4283 mr0 |= MR0_SWFRX;
4284 portp->stats.rxxon++;
4285 stl_sc26198wait(portp);
4286 stl_sc26198setreg(portp, MR0, mr0);
4287 } else {
4288 mr0 = stl_sc26198getreg(portp, MR0);
4289 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4290 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4291 mr0 &= ~MR0_SWFRX;
4292 portp->stats.rxxoff++;
4293 stl_sc26198wait(portp);
4294 stl_sc26198setreg(portp, MR0, mr0);
4295 }
4296 BRDDISABLE(portp->brdnr);
b65b5b59 4297 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4298}
4299
4300/*****************************************************************************/
4301
ca7ed0f2 4302static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4303{
4304 unsigned long flags;
4305
a0564e14 4306 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4307
615e4a71 4308 if (portp == NULL)
1da177e4
LT		 4309 return;
4310
b65b5b59 4311 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4312 BRDENABLE(portp->brdnr, portp->pagenr);
4313 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4314 stl_sc26198setreg(portp, SCCR, portp->crenable);
4315 BRDDISABLE(portp->brdnr);
4316 portp->tx.tail = portp->tx.head;
b65b5b59 4317 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4318}
4319
4320/*****************************************************************************/
4321
4322/*
4323 * Return the current state of data flow on this port. This is only
4324 * really interresting when determining if data has fully completed
4325 * transmission or not... The sc26198 interrupt scheme cannot
4326 * determine when all data has actually drained, so we need to
4327 * check the port statusy register to be sure.
4328 */
4329
ca7ed0f2 4330static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4331{
4332 unsigned long flags;
4333 unsigned char sr;
4334
a0564e14 4335 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4336
615e4a71 4337 if (portp == NULL)
014c2544 4338 return 0;
1da177e4 4339 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4340 return 1;
1da177e4 4341
b65b5b59 4342 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4343 BRDENABLE(portp->brdnr, portp->pagenr);
4344 sr = stl_sc26198getreg(portp, SR);
4345 BRDDISABLE(portp->brdnr);
b65b5b59 4346 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4347
014c2544 4348 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4349}
4350
4351/*****************************************************************************/
4352
4353/*
4354 * Delay for a small amount of time, to give the sc26198 a chance
4355 * to process a command...
4356 */
4357
ca7ed0f2 4358static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4359{
4360 int i;
4361
a0564e14 4362 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4363
615e4a71 4364 if (portp == NULL)
1da177e4
LT		 4365 return;
4366
c62429d9 4367 for (i = 0; i < 20; i++)
1da177e4
LT		 4368 stl_sc26198getglobreg(portp, TSTR);
4369}
4370
4371/*****************************************************************************/
4372
4373/*
4374 * If we are TX flow controlled and in IXANY mode then we may
4375 * need to unflow control here. We gotta do this because of the
4376 * automatic flow control modes of the sc26198.
4377 */
4378
60be4810 4379static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4380{
4381 unsigned char mr0;
4382
4383 mr0 = stl_sc26198getreg(portp, MR0);
4384 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4385 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4386 stl_sc26198wait(portp);
4387 stl_sc26198setreg(portp, MR0, mr0);
4388 clear_bit(ASYI_TXFLOWED, &portp->istate);
4389}
4390
4391/*****************************************************************************/
4392
4393/*
4394 * Interrupt service routine for sc26198 panels.
4395 */
4396
ca7ed0f2 4397static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4398{
ca7ed0f2 4399 struct stlport *portp;
1da177e4
LT		 4400 unsigned int iack;
4401
b65b5b59
AC		 4402 spin_lock(&brd_lock);
4403
1da177e4
LT		 4404/*
4405 * Work around bug in sc26198 chip... Cannot have A6 address
4406 * line of UART high, else iack will be returned as 0.
4407 */
4408 outb(0, (iobase + 1));
4409
4410 iack = inb(iobase + XP_IACK);
4411 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4412
4413 if (iack & IVR_RXDATA)
4414 stl_sc26198rxisr(portp, iack);
4415 else if (iack & IVR_TXDATA)
4416 stl_sc26198txisr(portp);
4417 else
4418 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4419
4420 spin_unlock(&brd_lock);
1da177e4
LT		 4421}
4422
4423/*****************************************************************************/
4424
4425/*
4426 * Transmit interrupt handler. This has gotta be fast! Handling TX
4427 * chars is pretty simple, stuff as many as possible from the TX buffer
4428 * into the sc26198 FIFO.
4429 * In practice it is possible that interrupts are enabled but that the
4430 * port has been hung up. Need to handle not having any TX buffer here,
4431 * this is done by using the side effect that head and tail will also
4432 * be NULL if the buffer has been freed.
4433 */
4434
ca7ed0f2 4435static void stl_sc26198txisr(struct stlport *portp)
1da177e4
LT		 4436{
4437 unsigned int ioaddr;
4438 unsigned char mr0;
4439 int len, stlen;
4440 char *head, *tail;
4441
a0564e14 4442 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4443
4444 ioaddr = portp->ioaddr;
4445 head = portp->tx.head;
4446 tail = portp->tx.tail;
4447 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4448 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4449 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4450 set_bit(ASYI_TXLOW, &portp->istate);
4451 schedule_work(&portp->tqueue);
4452 }
4453
4454 if (len == 0) {
4455 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4456 mr0 = inb(ioaddr + XP_DATA);
4457 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4458 portp->imr &= ~IR_TXRDY;
4459 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4460 outb(portp->imr, (ioaddr + XP_DATA));
4461 clear_bit(ASYI_TXBUSY, &portp->istate);
4462 } else {
4463 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4464 outb(mr0, (ioaddr + XP_DATA));
4465 }
4466 } else {
843b568c 4467 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4468 portp->stats.txtotal += len;
843b568c 4469 stlen = min(len, ((portp->tx.buf + STL_TXBUFSIZE) - tail));
1da177e4
LT		 4470 outb(GTXFIFO, (ioaddr + XP_ADDR));
4471 outsb((ioaddr + XP_DATA), tail, stlen);
4472 len -= stlen;
4473 tail += stlen;
4474 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4475 tail = portp->tx.buf;
4476 if (len > 0) {
4477 outsb((ioaddr + XP_DATA), tail, len);
4478 tail += len;
4479 }
4480 portp->tx.tail = tail;
4481 }
4482}
4483
4484/*****************************************************************************/
4485
4486/*
4487 * Receive character interrupt handler. Determine if we have good chars
4488 * or bad chars and then process appropriately. Good chars are easy
4489 * just shove the lot into the RX buffer and set all status byte to 0.
4490 * If a bad RX char then process as required. This routine needs to be
4491 * fast! In practice it is possible that we get an interrupt on a port
4492 * that is closed. This can happen on hangups - since they completely
4493 * shutdown a port not in user context. Need to handle this case.
4494 */
4495
ca7ed0f2 4496static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4497{
4498 struct tty_struct *tty;
4499 unsigned int len, buflen, ioaddr;
4500
a0564e14 4501 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4502
4503 tty = portp->tty;
4504 ioaddr = portp->ioaddr;
4505 outb(GIBCR, (ioaddr + XP_ADDR));
4506 len = inb(ioaddr + XP_DATA) + 1;
4507
4508 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4509 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
843b568c 4510 len = min(len, sizeof(stl_unwanted));
1da177e4
LT		 4511 outb(GRXFIFO, (ioaddr + XP_ADDR));
4512 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4513 portp->stats.rxlost += len;
4514 portp->stats.rxtotal += len;
4515 } else {
843b568c 4516 len = min(len, buflen);
1da177e4 4517 if (len > 0) {
33f0f88f 4518 unsigned char *ptr;
1da177e4 4519 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4520 tty_prepare_flip_string(tty, &ptr, len);
4521 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4522 tty_schedule_flip(tty);
4523 portp->stats.rxtotal += len;
4524 }
4525 }
4526 } else {
4527 stl_sc26198rxbadchars(portp);
4528 }
4529
4530/*
4531 * If we are TX flow controlled and in IXANY mode then we may need
4532 * to unflow control here. We gotta do this because of the automatic
4533 * flow control modes of the sc26198.
4534 */
4535 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4536 if ((tty != NULL) &&
4537 (tty->termios != NULL) &&
1da177e4
LT		 4538 (tty->termios->c_iflag & IXANY)) {
4539 stl_sc26198txunflow(portp, tty);
4540 }
4541 }
4542}
4543
4544/*****************************************************************************/
4545
4546/*
4547 * Process an RX bad character.
4548 */
4549
60be4810 4550static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4551{
4552 struct tty_struct *tty;
4553 unsigned int ioaddr;
4554
4555 tty = portp->tty;
4556 ioaddr = portp->ioaddr;
4557
4558 if (status & SR_RXPARITY)
4559 portp->stats.rxparity++;
4560 if (status & SR_RXFRAMING)
4561 portp->stats.rxframing++;
4562 if (status & SR_RXOVERRUN)
4563 portp->stats.rxoverrun++;
4564 if (status & SR_RXBREAK)
4565 portp->stats.rxbreaks++;
4566
615e4a71 4567 if ((tty != NULL) &&
1da177e4
LT		 4568 ((portp->rxignoremsk & status) == 0)) {
4569 if (portp->rxmarkmsk & status) {
4570 if (status & SR_RXBREAK) {
4571 status = TTY_BREAK;
4572 if (portp->flags & ASYNC_SAK) {
4573 do_SAK(tty);
4574 BRDENABLE(portp->brdnr, portp->pagenr);
4575 }
c62429d9 4576 } else if (status & SR_RXPARITY)
1da177e4 4577 status = TTY_PARITY;
c62429d9 4578 else if (status & SR_RXFRAMING)
1da177e4 4579 status = TTY_FRAME;
c62429d9 4580 else if(status & SR_RXOVERRUN)
1da177e4 4581 status = TTY_OVERRUN;
c62429d9 4582 else
1da177e4 4583 status = 0;
c62429d9 4584 } else
1da177e4 4585 status = 0;
1da177e4 4586
33f0f88f
AC		 4587 tty_insert_flip_char(tty, ch, status);
4588 tty_schedule_flip(tty);
1da177e4
LT		 4589
4590 if (status == 0)
4591 portp->stats.rxtotal++;
4592 }
4593}
4594
4595/*****************************************************************************/
4596
4597/*
4598 * Process all characters in the RX FIFO of the UART. Check all char
4599 * status bytes as well, and process as required. We need to check
4600 * all bytes in the FIFO, in case some more enter the FIFO while we
4601 * are here. To get the exact character error type we need to switch
4602 * into CHAR error mode (that is why we need to make sure we empty
4603 * the FIFO).
4604 */
4605
ca7ed0f2 4606static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4607{
4608 unsigned char status, mr1;
4609 char ch;
4610
4611/*
4612 * To get the precise error type for each character we must switch
4613 * back into CHAR error mode.
4614 */
4615 mr1 = stl_sc26198getreg(portp, MR1);
4616 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4617
4618 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4619 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4620 ch = stl_sc26198getreg(portp, RXFIFO);
4621 stl_sc26198rxbadch(portp, status, ch);
4622 }
4623
4624/*
4625 * To get correct interrupt class we must switch back into BLOCK
4626 * error mode.
4627 */
4628 stl_sc26198setreg(portp, MR1, mr1);
4629}
4630
4631/*****************************************************************************/
4632
4633/*
4634 * Other interrupt handler. This includes modem signals, flow
4635 * control actions, etc. Most stuff is left to off-level interrupt
4636 * processing time.
4637 */
4638
ca7ed0f2 4639static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4640{
4641 unsigned char cir, ipr, xisr;
4642
a0564e14 4643 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4644
4645 cir = stl_sc26198getglobreg(portp, CIR);
4646
4647 switch (cir & CIR_SUBTYPEMASK) {
4648 case CIR_SUBCOS:
4649 ipr = stl_sc26198getreg(portp, IPR);
4650 if (ipr & IPR_DCDCHANGE) {
4651 set_bit(ASYI_DCDCHANGE, &portp->istate);
4652 schedule_work(&portp->tqueue);
4653 portp->stats.modem++;
4654 }
4655 break;
4656 case CIR_SUBXONXOFF:
4657 xisr = stl_sc26198getreg(portp, XISR);
4658 if (xisr & XISR_RXXONGOT) {
4659 set_bit(ASYI_TXFLOWED, &portp->istate);
4660 portp->stats.txxoff++;
4661 }
4662 if (xisr & XISR_RXXOFFGOT) {
4663 clear_bit(ASYI_TXFLOWED, &portp->istate);
4664 portp->stats.txxon++;
4665 }
4666 break;
4667 case CIR_SUBBREAK:
4668 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4669 stl_sc26198rxbadchars(portp);
4670 break;
4671 default:
4672 break;
4673 }
4674}
4675
fc06b5cf
JS		 4676static void stl_free_isabrds(void)
4677{
4678 struct stlbrd *brdp;
4679 unsigned int i;
4680
4681 for (i = 0; i < stl_nrbrds; i++) {
4682 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4683 continue;
4684
4685 free_irq(brdp->irq, brdp);
4686
4687 stl_cleanup_panels(brdp);
4688
4689 release_region(brdp->ioaddr1, brdp->iosize1);
4690 if (brdp->iosize2 > 0)
4691 release_region(brdp->ioaddr2, brdp->iosize2);
4692
4693 kfree(brdp);
4694 stl_brds[i] = NULL;
4695 }
4696}
4697
23b85a15
JS		 4698/*
4699 * Loadable module initialization stuff.
4700 */
4701static int __init stallion_module_init(void)
4702{
843b568c
JS		 4703 struct stlbrd *brdp;
4704 struct stlconf conf;
aeaccfe4 4705 unsigned int i, j;
fc06b5cf 4706 int retval;
23b85a15
JS		 4707
4708 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4709
4710 spin_lock_init(&stallion_lock);
4711 spin_lock_init(&brd_lock);
4712
843b568c
JS		 4713/*
4714 * Find any dynamically supported boards. That is via module load
4715 * line options.
4716 */
4717 for (i = stl_nrbrds; i < stl_nargs; i++) {
4718 memset(&conf, 0, sizeof(conf));
4719 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4720 continue;
4721 if ((brdp = stl_allocbrd()) == NULL)
4722 continue;
4723 brdp->brdnr = i;
4724 brdp->brdtype = conf.brdtype;
4725 brdp->ioaddr1 = conf.ioaddr1;
4726 brdp->ioaddr2 = conf.ioaddr2;
4727 brdp->irq = conf.irq;
4728 brdp->irqtype = conf.irqtype;
4729 if (stl_brdinit(brdp))
4730 kfree(brdp);
79cfe7ab 4731 else {
aeaccfe4
JS		 4732 for (j = 0; j < brdp->nrports; j++)
4733 tty_register_device(stl_serial,
4734 brdp->brdnr * STL_MAXPORTS + j, NULL);
79cfe7ab 4735 stl_brds[brdp->brdnr] = brdp;
843b568c 4736 stl_nrbrds = i + 1;
79cfe7ab 4737 }
843b568c 4738 }
23b85a15 4739
79cfe7ab 4740 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4741 retval = pci_register_driver(&stl_pcidriver);
fc06b5cf 4742 if (retval && stl_nrbrds == 0)
b1b84fe0
JS		 4743 goto err;
4744
23b85a15 4745 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
fc06b5cf
JS		 4746 if (!stl_serial) {
4747 retval = -ENOMEM;
4748 goto err_pcidr;
4749 }
23b85a15
JS		 4750
4751/*
4752 * Set up a character driver for per board stuff. This is mainly used
4753 * to do stats ioctls on the ports.
4754 */
4755 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4756 printk("STALLION: failed to register serial board device\n");
4757
4758 stallion_class = class_create(THIS_MODULE, "staliomem");
fc06b5cf
JS		 4759 if (IS_ERR(stallion_class)) {
4760 retval = PTR_ERR(stallion_class);
4761 goto err_reg;
4762 }
23b85a15
JS		 4763 for (i = 0; i < 4; i++)
4764 class_device_create(stallion_class, NULL,
4765 MKDEV(STL_SIOMEMMAJOR, i), NULL,
4766 "staliomem%d", i);
4767
4768 stl_serial->owner = THIS_MODULE;
4769 stl_serial->driver_name = stl_drvname;
4770 stl_serial->name = "ttyE";
4771 stl_serial->major = STL_SERIALMAJOR;
4772 stl_serial->minor_start = 0;
4773 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4774 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4775 stl_serial->init_termios = stl_deftermios;
aeaccfe4 4776 stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
23b85a15
JS		 4777 tty_set_operations(stl_serial, &stl_ops);
4778
fc06b5cf
JS		 4779 retval = tty_register_driver(stl_serial);
4780 if (retval) {
23b85a15 4781 printk("STALLION: failed to register serial driver\n");
fc06b5cf 4782 goto err_clsdev;
23b85a15
JS		 4783 }
4784
4785 return 0;
fc06b5cf
JS		 4786err_clsdev:
4787 for (i = 0; i < 4; i++)
4788 class_device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
4789 class_destroy(stallion_class);
4790err_reg:
4791 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
4792 put_tty_driver(stl_serial);
4793err_pcidr:
4794 pci_unregister_driver(&stl_pcidriver);
4795 stl_free_isabrds();
b1b84fe0
JS		 4796err:
4797 return retval;
23b85a15
JS		 4798}
4799
4800static void __exit stallion_module_exit(void)
4801{
aeaccfe4
JS		 4802 struct stlbrd *brdp;
4803 unsigned int i, j;
4804 int retval;
23b85a15
JS		 4805
4806 pr_debug("cleanup_module()\n");
4807
4808 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4809 stl_drvversion);
4810
4811/*
4812 * Free up all allocated resources used by the ports. This includes
4813 * memory and interrupts. As part of this process we will also do
4814 * a hangup on every open port - to try to flush out any processes
4815 * hanging onto ports.
4816 */
aeaccfe4
JS		 4817 for (i = 0; i < stl_nrbrds; i++) {
4818 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4819 continue;
4820 for (j = 0; j < brdp->nrports; j++)
4821 tty_unregister_device(stl_serial,
4822 brdp->brdnr * STL_MAXPORTS + j);
4823 }
fc06b5cf 4824 tty_unregister_driver(stl_serial);
23b85a15 4825 put_tty_driver(stl_serial);
fc06b5cf 4826
23b85a15
JS		 4827 for (i = 0; i < 4; i++)
4828 class_device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
aeaccfe4 4829 if ((retval = unregister_chrdev(STL_SIOMEMMAJOR, "staliomem")))
23b85a15 4830 printk("STALLION: failed to un-register serial memory device, "
aeaccfe4 4831 "errno=%d\n", -retval);
23b85a15
JS		 4832 class_destroy(stallion_class);
4833
b1b84fe0
JS		 4834 pci_unregister_driver(&stl_pcidriver);
4835
fc06b5cf 4836 stl_free_isabrds();
23b85a15
JS		 4837}
4838
4839module_init(stallion_module_init);
4840module_exit(stallion_module_exit);
4841
4842MODULE_AUTHOR("Greg Ungerer");
4843MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4844MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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