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[PATCH] Char: stallion, remove syntactic sugar
[deliverable/linux.git] / drivers / char / stallion.c
CommitLineData
1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4
LT		 29#include <linux/module.h>
30#include <linux/slab.h>
31#include <linux/interrupt.h>
32#include <linux/tty.h>
33#include <linux/tty_flip.h>
34#include <linux/serial.h>
35#include <linux/cd1400.h>
36#include <linux/sc26198.h>
37#include <linux/comstats.h>
38#include <linux/stallion.h>
39#include <linux/ioport.h>
40#include <linux/init.h>
41#include <linux/smp_lock.h>
1da177e4
LT		 42#include <linux/device.h>
43#include <linux/delay.h>
843b568c 44#include <linux/ctype.h>
1da177e4
LT		 45
46#include <asm/io.h>
47#include <asm/uaccess.h>
48
1da177e4 49#include <linux/pci.h>
1da177e4
LT		 50
51/*****************************************************************************/
52
53/*
54 * Define different board types. Use the standard Stallion "assigned"
55 * board numbers. Boards supported in this driver are abbreviated as
56 * EIO = EasyIO and ECH = EasyConnection 8/32.
57 */
58#define BRD_EASYIO 20
59#define BRD_ECH 21
60#define BRD_ECHMC 22
61#define BRD_ECHPCI 26
62#define BRD_ECH64PCI 27
63#define BRD_EASYIOPCI 28
64
843b568c 65struct stlconf {
1da177e4
LT		 66 int brdtype;
67 int ioaddr1;
68 int ioaddr2;
69 unsigned long memaddr;
70 int irq;
71 int irqtype;
1da177e4
LT		 72};
73
843b568c 74static unsigned int stl_nrbrds;
1da177e4
LT		 75
76/*****************************************************************************/
77
78/*
79 * Define some important driver characteristics. Device major numbers
80 * allocated as per Linux Device Registry.
81 */
82#ifndef STL_SIOMEMMAJOR
83#define STL_SIOMEMMAJOR 28
84#endif
85#ifndef STL_SERIALMAJOR
86#define STL_SERIALMAJOR 24
87#endif
88#ifndef STL_CALLOUTMAJOR
89#define STL_CALLOUTMAJOR 25
90#endif
91
92/*
93 * Set the TX buffer size. Bigger is better, but we don't want
94 * to chew too much memory with buffers!
95 */
96#define STL_TXBUFLOW 512
97#define STL_TXBUFSIZE 4096
98
99/*****************************************************************************/
100
101/*
102 * Define our local driver identity first. Set up stuff to deal with
103 * all the local structures required by a serial tty driver.
104 */
105static char *stl_drvtitle = "Stallion Multiport Serial Driver";
106static char *stl_drvname = "stallion";
107static char *stl_drvversion = "5.6.0";
108
109static struct tty_driver *stl_serial;
110
1da177e4
LT		 111/*
112 * Define a local default termios struct. All ports will be created
113 * with this termios initially. Basically all it defines is a raw port
114 * at 9600, 8 data bits, 1 stop bit.
115 */
606d099c 116static struct ktermios stl_deftermios = {
1da177e4
LT		 117 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
118 .c_cc = INIT_C_CC,
606d099c
AC		 119 .c_ispeed = 9600,
120 .c_ospeed = 9600,
1da177e4
LT		 121};
122
123/*
124 * Define global stats structures. Not used often, and can be
125 * re-used for each stats call.
126 */
127static comstats_t stl_comstats;
128static combrd_t stl_brdstats;
ca7ed0f2
JS		 129static struct stlbrd stl_dummybrd;
130static struct stlport stl_dummyport;
1da177e4
LT		 131
132/*
133 * Define global place to put buffer overflow characters.
134 */
135static char stl_unwanted[SC26198_RXFIFOSIZE];
136
137/*****************************************************************************/
138
79cfe7ab 139static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 140static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4
LT		 141
142/*
143 * Per board state flags. Used with the state field of the board struct.
144 * Not really much here!
145 */
146#define BRD_FOUND 0x1
fc06b5cf
JS		 147#define STL_PROBED 0x2
148
1da177e4
LT		 149
150/*
151 * Define the port structure istate flags. These set of flags are
152 * modified at interrupt time - so setting and reseting them needs
153 * to be atomic. Use the bit clear/setting routines for this.
154 */
155#define ASYI_TXBUSY 1
156#define ASYI_TXLOW 2
157#define ASYI_DCDCHANGE 3
158#define ASYI_TXFLOWED 4
159
160/*
161 * Define an array of board names as printable strings. Handy for
162 * referencing boards when printing trace and stuff.
163 */
164static char *stl_brdnames[] = {
615e4a71
JS		 165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
176 NULL,
177 NULL,
178 NULL,
179 NULL,
180 NULL,
181 NULL,
182 NULL,
183 NULL,
184 NULL,
1da177e4
LT		 185 "EasyIO",
186 "EC8/32-AT",
187 "EC8/32-MC",
615e4a71
JS		 188 NULL,
189 NULL,
190 NULL,
1da177e4
LT		 191 "EC8/32-PCI",
192 "EC8/64-PCI",
193 "EasyIO-PCI",
194};
195
196/*****************************************************************************/
197
198/*
199 * Define some string labels for arguments passed from the module
200 * load line. These allow for easy board definitions, and easy
201 * modification of the io, memory and irq resoucres.
202 */
203static int stl_nargs = 0;
204static char *board0[4];
205static char *board1[4];
206static char *board2[4];
207static char *board3[4];
208
209static char **stl_brdsp[] = {
210 (char **) &board0,
211 (char **) &board1,
212 (char **) &board2,
213 (char **) &board3
214};
215
216/*
217 * Define a set of common board names, and types. This is used to
218 * parse any module arguments.
219 */
220
ca7ed0f2 221static struct {
1da177e4
LT		 222 char *name;
223 int type;
ca7ed0f2 224} stl_brdstr[] = {
1da177e4
LT		 225 { "easyio", BRD_EASYIO },
226 { "eio", BRD_EASYIO },
227 { "20", BRD_EASYIO },
228 { "ec8/32", BRD_ECH },
229 { "ec8/32-at", BRD_ECH },
230 { "ec8/32-isa", BRD_ECH },
231 { "ech", BRD_ECH },
232 { "echat", BRD_ECH },
233 { "21", BRD_ECH },
234 { "ec8/32-mc", BRD_ECHMC },
235 { "ec8/32-mca", BRD_ECHMC },
236 { "echmc", BRD_ECHMC },
237 { "echmca", BRD_ECHMC },
238 { "22", BRD_ECHMC },
239 { "ec8/32-pc", BRD_ECHPCI },
240 { "ec8/32-pci", BRD_ECHPCI },
241 { "26", BRD_ECHPCI },
242 { "ec8/64-pc", BRD_ECH64PCI },
243 { "ec8/64-pci", BRD_ECH64PCI },
244 { "ech-pci", BRD_ECH64PCI },
245 { "echpci", BRD_ECH64PCI },
246 { "echpc", BRD_ECH64PCI },
247 { "27", BRD_ECH64PCI },
248 { "easyio-pc", BRD_EASYIOPCI },
249 { "easyio-pci", BRD_EASYIOPCI },
250 { "eio-pci", BRD_EASYIOPCI },
251 { "eiopci", BRD_EASYIOPCI },
252 { "28", BRD_EASYIOPCI },
253};
254
255/*
256 * Define the module agruments.
257 */
1da177e4
LT		 258
259module_param_array(board0, charp, &stl_nargs, 0);
260MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
261module_param_array(board1, charp, &stl_nargs, 0);
262MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
263module_param_array(board2, charp, &stl_nargs, 0);
264MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
265module_param_array(board3, charp, &stl_nargs, 0);
266MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
267
268/*****************************************************************************/
269
270/*
271 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
272 * to the directly accessible io ports of these boards (not the uarts -
273 * they are in cd1400.h and sc26198.h).
274 */
275#define EIO_8PORTRS 0x04
276#define EIO_4PORTRS 0x05
277#define EIO_8PORTDI 0x00
278#define EIO_8PORTM 0x06
279#define EIO_MK3 0x03
280#define EIO_IDBITMASK 0x07
281
282#define EIO_BRDMASK 0xf0
283#define ID_BRD4 0x10
284#define ID_BRD8 0x20
285#define ID_BRD16 0x30
286
287#define EIO_INTRPEND 0x08
288#define EIO_INTEDGE 0x00
289#define EIO_INTLEVEL 0x08
290#define EIO_0WS 0x10
291
292#define ECH_ID 0xa0
293#define ECH_IDBITMASK 0xe0
294#define ECH_BRDENABLE 0x08
295#define ECH_BRDDISABLE 0x00
296#define ECH_INTENABLE 0x01
297#define ECH_INTDISABLE 0x00
298#define ECH_INTLEVEL 0x02
299#define ECH_INTEDGE 0x00
300#define ECH_INTRPEND 0x01
301#define ECH_BRDRESET 0x01
302
303#define ECHMC_INTENABLE 0x01
304#define ECHMC_BRDRESET 0x02
305
306#define ECH_PNLSTATUS 2
307#define ECH_PNL16PORT 0x20
308#define ECH_PNLIDMASK 0x07
309#define ECH_PNLXPID 0x40
310#define ECH_PNLINTRPEND 0x80
311
312#define ECH_ADDR2MASK 0x1e0
313
314/*
315 * Define the vector mapping bits for the programmable interrupt board
316 * hardware. These bits encode the interrupt for the board to use - it
317 * is software selectable (except the EIO-8M).
318 */
319static unsigned char stl_vecmap[] = {
320 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
321 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
322};
323
b65b5b59
AC		 324/*
325 * Lock ordering is that you may not take stallion_lock holding
326 * brd_lock.
327 */
328
329static spinlock_t brd_lock; /* Guard the board mapping */
330static spinlock_t stallion_lock; /* Guard the tty driver */
331
1da177e4
LT		 332/*
333 * Set up enable and disable macros for the ECH boards. They require
334 * the secondary io address space to be activated and deactivated.
335 * This way all ECH boards can share their secondary io region.
336 * If this is an ECH-PCI board then also need to set the page pointer
337 * to point to the correct page.
338 */
339#define BRDENABLE(brdnr,pagenr) \
340 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
341 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
342 stl_brds[(brdnr)]->ioctrl); \
343 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
344 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
345
346#define BRDDISABLE(brdnr) \
347 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
348 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
349 stl_brds[(brdnr)]->ioctrl);
350
351#define STL_CD1400MAXBAUD 230400
352#define STL_SC26198MAXBAUD 460800
353
354#define STL_BAUDBASE 115200
355#define STL_CLOSEDELAY (5 * HZ / 10)
356
357/*****************************************************************************/
358
1da177e4
LT		 359/*
360 * Define the Stallion PCI vendor and device IDs.
361 */
362#ifndef PCI_VENDOR_ID_STALLION
363#define PCI_VENDOR_ID_STALLION 0x124d
364#endif
365#ifndef PCI_DEVICE_ID_ECHPCI832
366#define PCI_DEVICE_ID_ECHPCI832 0x0000
367#endif
368#ifndef PCI_DEVICE_ID_ECHPCI864
369#define PCI_DEVICE_ID_ECHPCI864 0x0002
370#endif
371#ifndef PCI_DEVICE_ID_EIOPCI
372#define PCI_DEVICE_ID_EIOPCI 0x0003
373#endif
374
375/*
376 * Define structure to hold all Stallion PCI boards.
377 */
1da177e4 378
b1b84fe0
JS		 379static struct pci_device_id stl_pcibrds[] = {
380 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
381 .driver_data = BRD_ECH64PCI },
382 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
383 .driver_data = BRD_EASYIOPCI },
384 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
385 .driver_data = BRD_ECHPCI },
386 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
387 .driver_data = BRD_ECHPCI },
388 { }
389};
390MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 391
392/*****************************************************************************/
393
394/*
395 * Define macros to extract a brd/port number from a minor number.
396 */
397#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
398#define MINOR2PORT(min) ((min) & 0x3f)
399
400/*
401 * Define a baud rate table that converts termios baud rate selector
402 * into the actual baud rate value. All baud rate calculations are
403 * based on the actual baud rate required.
404 */
405static unsigned int stl_baudrates[] = {
406 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
407 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
408};
409
1da177e4
LT		 410/*****************************************************************************/
411
412/*
413 * Declare all those functions in this driver!
414 */
415
1da177e4 416static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 417static int stl_brdinit(struct stlbrd *brdp);
ca7ed0f2
JS		 418static int stl_getportstats(struct stlport *portp, comstats_t __user *cp);
419static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 420static int stl_waitcarrier(struct stlport *portp, struct file *filp);
1da177e4 421
1da177e4
LT		 422/*
423 * CD1400 uart specific handling functions.
424 */
ca7ed0f2
JS		 425static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
426static int stl_cd1400getreg(struct stlport *portp, int regnr);
427static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
428static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
429static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 430static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 431static int stl_cd1400getsignals(struct stlport *portp);
432static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
433static void stl_cd1400ccrwait(struct stlport *portp);
434static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
435static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
436static void stl_cd1400disableintrs(struct stlport *portp);
437static void stl_cd1400sendbreak(struct stlport *portp, int len);
438static void stl_cd1400flowctrl(struct stlport *portp, int state);
439static void stl_cd1400sendflow(struct stlport *portp, int state);
440static void stl_cd1400flush(struct stlport *portp);
441static int stl_cd1400datastate(struct stlport *portp);
442static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
443static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
444static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
445static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
446static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
447
448static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 449
450/*
451 * SC26198 uart specific handling functions.
452 */
ca7ed0f2
JS		 453static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
454static int stl_sc26198getreg(struct stlport *portp, int regnr);
455static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
456static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
457static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
458static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 459static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 460static int stl_sc26198getsignals(struct stlport *portp);
461static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
462static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
463static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
464static void stl_sc26198disableintrs(struct stlport *portp);
465static void stl_sc26198sendbreak(struct stlport *portp, int len);
466static void stl_sc26198flowctrl(struct stlport *portp, int state);
467static void stl_sc26198sendflow(struct stlport *portp, int state);
468static void stl_sc26198flush(struct stlport *portp);
469static int stl_sc26198datastate(struct stlport *portp);
470static void stl_sc26198wait(struct stlport *portp);
471static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
472static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
473static void stl_sc26198txisr(struct stlport *port);
474static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
475static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
476static void stl_sc26198rxbadchars(struct stlport *portp);
477static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 478
479/*****************************************************************************/
480
481/*
482 * Generic UART support structure.
483 */
484typedef struct uart {
ca7ed0f2
JS		 485 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
486 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 487 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 488 int (*getsignals)(struct stlport *portp);
489 void (*setsignals)(struct stlport *portp, int dtr, int rts);
490 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
491 void (*startrxtx)(struct stlport *portp, int rx, int tx);
492 void (*disableintrs)(struct stlport *portp);
493 void (*sendbreak)(struct stlport *portp, int len);
494 void (*flowctrl)(struct stlport *portp, int state);
495 void (*sendflow)(struct stlport *portp, int state);
496 void (*flush)(struct stlport *portp);
497 int (*datastate)(struct stlport *portp);
498 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 499} uart_t;
500
501/*
502 * Define some macros to make calling these functions nice and clean.
503 */
504#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
505#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
506#define stl_setport (* ((uart_t *) portp->uartp)->setport)
507#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
508#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
509#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
510#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
511#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
512#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
513#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
514#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
515#define stl_flush (* ((uart_t *) portp->uartp)->flush)
516#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
517
518/*****************************************************************************/
519
520/*
521 * CD1400 UART specific data initialization.
522 */
523static uart_t stl_cd1400uart = {
524 stl_cd1400panelinit,
525 stl_cd1400portinit,
526 stl_cd1400setport,
527 stl_cd1400getsignals,
528 stl_cd1400setsignals,
529 stl_cd1400enablerxtx,
530 stl_cd1400startrxtx,
531 stl_cd1400disableintrs,
532 stl_cd1400sendbreak,
533 stl_cd1400flowctrl,
534 stl_cd1400sendflow,
535 stl_cd1400flush,
536 stl_cd1400datastate,
537 stl_cd1400eiointr
538};
539
540/*
541 * Define the offsets within the register bank of a cd1400 based panel.
542 * These io address offsets are common to the EasyIO board as well.
543 */
544#define EREG_ADDR 0
545#define EREG_DATA 4
546#define EREG_RXACK 5
547#define EREG_TXACK 6
548#define EREG_MDACK 7
549
550#define EREG_BANKSIZE 8
551
552#define CD1400_CLK 25000000
553#define CD1400_CLK8M 20000000
554
555/*
556 * Define the cd1400 baud rate clocks. These are used when calculating
557 * what clock and divisor to use for the required baud rate. Also
558 * define the maximum baud rate allowed, and the default base baud.
559 */
560static int stl_cd1400clkdivs[] = {
561 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
562};
563
564/*****************************************************************************/
565
566/*
567 * SC26198 UART specific data initization.
568 */
569static uart_t stl_sc26198uart = {
570 stl_sc26198panelinit,
571 stl_sc26198portinit,
572 stl_sc26198setport,
573 stl_sc26198getsignals,
574 stl_sc26198setsignals,
575 stl_sc26198enablerxtx,
576 stl_sc26198startrxtx,
577 stl_sc26198disableintrs,
578 stl_sc26198sendbreak,
579 stl_sc26198flowctrl,
580 stl_sc26198sendflow,
581 stl_sc26198flush,
582 stl_sc26198datastate,
583 stl_sc26198intr
584};
585
586/*
587 * Define the offsets within the register bank of a sc26198 based panel.
588 */
589#define XP_DATA 0
590#define XP_ADDR 1
591#define XP_MODID 2
592#define XP_STATUS 2
593#define XP_IACK 3
594
595#define XP_BANKSIZE 4
596
597/*
598 * Define the sc26198 baud rate table. Offsets within the table
599 * represent the actual baud rate selector of sc26198 registers.
600 */
601static unsigned int sc26198_baudtable[] = {
602 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
603 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
604 230400, 460800, 921600
605};
606
fe971071 607#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 608
609/*****************************************************************************/
610
611/*
612 * Define the driver info for a user level control device. Used mainly
613 * to get at port stats - only not using the port device itself.
614 */
62322d25 615static const struct file_operations stl_fsiomem = {
1da177e4
LT		 616 .owner = THIS_MODULE,
617 .ioctl = stl_memioctl,
618};
619
ca8eca68 620static struct class *stallion_class;
1da177e4 621
1da177e4
LT		 622/*
623 * Check for any arguments passed in on the module load command line.
624 */
625
1da177e4
LT		 626/*****************************************************************************/
627
1da177e4
LT		 628/*
629 * Parse the supplied argument string, into the board conf struct.
630 */
631
40e82652 632static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 633{
634 char *sp;
fe971071 635 int i;
1da177e4 636
a0564e14 637 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 638
615e4a71 639 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 640 return 0;
1da177e4 641
c62429d9 642 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 643 *sp = tolower(*sp);
1da177e4 644
c62429d9 645 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 646 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
647 break;
c62429d9 648
fe971071 649 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 650 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 651 return 0;
1da177e4
LT		 652 }
653
654 confp->brdtype = stl_brdstr[i].type;
655
656 i = 1;
615e4a71 657 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 658 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 659 i++;
660 if (confp->brdtype == BRD_ECH) {
615e4a71 661 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 662 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 663 i++;
664 }
615e4a71 665 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 666 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 667 return 1;
1da177e4
LT		 668}
669
670/*****************************************************************************/
671
1da177e4
LT		 672/*
673 * Allocate a new board structure. Fill out the basic info in it.
674 */
675
ca7ed0f2 676static struct stlbrd *stl_allocbrd(void)
1da177e4 677{
ca7ed0f2 678 struct stlbrd *brdp;
1da177e4 679
ca7ed0f2 680 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 681 if (!brdp) {
b65b5b59 682 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 683 sizeof(struct stlbrd));
b0b4ed72 684 return NULL;
1da177e4
LT		 685 }
686
1da177e4 687 brdp->magic = STL_BOARDMAGIC;
014c2544 688 return brdp;
1da177e4
LT		 689}
690
691/*****************************************************************************/
692
693static int stl_open(struct tty_struct *tty, struct file *filp)
694{
ca7ed0f2
JS		 695 struct stlport *portp;
696 struct stlbrd *brdp;
1da177e4
LT		 697 unsigned int minordev;
698 int brdnr, panelnr, portnr, rc;
699
a0564e14 700 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 701
702 minordev = tty->index;
703 brdnr = MINOR2BRD(minordev);
704 if (brdnr >= stl_nrbrds)
014c2544 705 return -ENODEV;
1da177e4 706 brdp = stl_brds[brdnr];
615e4a71 707 if (brdp == NULL)
014c2544 708 return -ENODEV;
1da177e4 709 minordev = MINOR2PORT(minordev);
c62429d9 710 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 711 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 712 break;
713 if (minordev < brdp->panels[panelnr]->nrports) {
714 portnr = minordev;
715 break;
716 }
717 minordev -= brdp->panels[panelnr]->nrports;
718 }
719 if (portnr < 0)
014c2544 720 return -ENODEV;
1da177e4
LT		 721
722 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 723 if (portp == NULL)
014c2544 724 return -ENODEV;
1da177e4
LT		 725
726/*
727 * On the first open of the device setup the port hardware, and
728 * initialize the per port data structure.
729 */
730 portp->tty = tty;
731 tty->driver_data = portp;
732 portp->refcount++;
733
734 if ((portp->flags & ASYNC_INITIALIZED) == 0) {
b0b4ed72
TK		 735 if (!portp->tx.buf) {
736 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
737 if (!portp->tx.buf)
014c2544 738 return -ENOMEM;
1da177e4
LT		 739 portp->tx.head = portp->tx.buf;
740 portp->tx.tail = portp->tx.buf;
741 }
742 stl_setport(portp, tty->termios);
743 portp->sigs = stl_getsignals(portp);
744 stl_setsignals(portp, 1, 1);
745 stl_enablerxtx(portp, 1, 1);
746 stl_startrxtx(portp, 1, 0);
747 clear_bit(TTY_IO_ERROR, &tty->flags);
748 portp->flags |= ASYNC_INITIALIZED;
749 }
750
751/*
752 * Check if this port is in the middle of closing. If so then wait
753 * until it is closed then return error status, based on flag settings.
754 * The sleep here does not need interrupt protection since the wakeup
755 * for it is done with the same context.
756 */
757 if (portp->flags & ASYNC_CLOSING) {
758 interruptible_sleep_on(&portp->close_wait);
759 if (portp->flags & ASYNC_HUP_NOTIFY)
014c2544
JJ		 760 return -EAGAIN;
761 return -ERESTARTSYS;
1da177e4
LT		 762 }
763
764/*
765 * Based on type of open being done check if it can overlap with any
766 * previous opens still in effect. If we are a normal serial device
767 * then also we might have to wait for carrier.
768 */
c62429d9 769 if (!(filp->f_flags & O_NONBLOCK))
1da177e4 770 if ((rc = stl_waitcarrier(portp, filp)) != 0)
014c2544 771 return rc;
c62429d9 772
1da177e4
LT		 773 portp->flags |= ASYNC_NORMAL_ACTIVE;
774
014c2544 775 return 0;
1da177e4
LT		 776}
777
778/*****************************************************************************/
779
780/*
781 * Possibly need to wait for carrier (DCD signal) to come high. Say
782 * maybe because if we are clocal then we don't need to wait...
783 */
784
ca7ed0f2 785static int stl_waitcarrier(struct stlport *portp, struct file *filp)
1da177e4
LT		 786{
787 unsigned long flags;
788 int rc, doclocal;
789
a0564e14 790 pr_debug("stl_waitcarrier(portp=%p,filp=%p)\n", portp, filp);
1da177e4
LT		 791
792 rc = 0;
793 doclocal = 0;
794
b65b5b59
AC		 795 spin_lock_irqsave(&stallion_lock, flags);
796
1da177e4
LT		 797 if (portp->tty->termios->c_cflag & CLOCAL)
798 doclocal++;
799
1da177e4
LT		 800 portp->openwaitcnt++;
801 if (! tty_hung_up_p(filp))
802 portp->refcount--;
803
804 for (;;) {
b65b5b59 805 /* Takes brd_lock internally */
1da177e4
LT		 806 stl_setsignals(portp, 1, 1);
807 if (tty_hung_up_p(filp) ||
808 ((portp->flags & ASYNC_INITIALIZED) == 0)) {
809 if (portp->flags & ASYNC_HUP_NOTIFY)
810 rc = -EBUSY;
811 else
812 rc = -ERESTARTSYS;
813 break;
814 }
815 if (((portp->flags & ASYNC_CLOSING) == 0) &&
c62429d9 816 (doclocal || (portp->sigs & TIOCM_CD)))
1da177e4 817 break;
1da177e4
LT		 818 if (signal_pending(current)) {
819 rc = -ERESTARTSYS;
820 break;
821 }
b65b5b59 822 /* FIXME */
1da177e4
LT		 823 interruptible_sleep_on(&portp->open_wait);
824 }
825
826 if (! tty_hung_up_p(filp))
827 portp->refcount++;
828 portp->openwaitcnt--;
b65b5b59 829 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4 830
014c2544 831 return rc;
1da177e4
LT		 832}
833
834/*****************************************************************************/
835
96b066b8
JS		 836static void stl_flushbuffer(struct tty_struct *tty)
837{
838 struct stlport *portp;
839
840 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
841
842 if (tty == NULL)
843 return;
844 portp = tty->driver_data;
845 if (portp == NULL)
846 return;
847
848 stl_flush(portp);
849 tty_wakeup(tty);
850}
851
852/*****************************************************************************/
853
854static void stl_waituntilsent(struct tty_struct *tty, int timeout)
855{
856 struct stlport *portp;
857 unsigned long tend;
858
859 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
860
861 if (tty == NULL)
862 return;
863 portp = tty->driver_data;
864 if (portp == NULL)
865 return;
866
867 if (timeout == 0)
868 timeout = HZ;
869 tend = jiffies + timeout;
870
871 while (stl_datastate(portp)) {
872 if (signal_pending(current))
873 break;
874 msleep_interruptible(20);
875 if (time_after_eq(jiffies, tend))
876 break;
877 }
878}
879
880/*****************************************************************************/
881
1da177e4
LT		 882static void stl_close(struct tty_struct *tty, struct file *filp)
883{
ca7ed0f2 884 struct stlport *portp;
1da177e4
LT		 885 unsigned long flags;
886
a0564e14 887 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4
LT		 888
889 portp = tty->driver_data;
615e4a71 890 if (portp == NULL)
1da177e4
LT		 891 return;
892
b65b5b59 893 spin_lock_irqsave(&stallion_lock, flags);
1da177e4 894 if (tty_hung_up_p(filp)) {
b65b5b59 895 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 896 return;
897 }
898 if ((tty->count == 1) && (portp->refcount != 1))
899 portp->refcount = 1;
900 if (portp->refcount-- > 1) {
b65b5b59 901 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 902 return;
903 }
904
905 portp->refcount = 0;
906 portp->flags |= ASYNC_CLOSING;
907
908/*
909 * May want to wait for any data to drain before closing. The BUSY
910 * flag keeps track of whether we are still sending or not - it is
911 * very accurate for the cd1400, not quite so for the sc26198.
912 * (The sc26198 has no "end-of-data" interrupt only empty FIFO)
913 */
914 tty->closing = 1;
b65b5b59
AC		 915
916 spin_unlock_irqrestore(&stallion_lock, flags);
917
1da177e4
LT		 918 if (portp->closing_wait != ASYNC_CLOSING_WAIT_NONE)
919 tty_wait_until_sent(tty, portp->closing_wait);
920 stl_waituntilsent(tty, (HZ / 2));
921
b65b5b59
AC		 922
923 spin_lock_irqsave(&stallion_lock, flags);
1da177e4 924 portp->flags &= ~ASYNC_INITIALIZED;
b65b5b59
AC		 925 spin_unlock_irqrestore(&stallion_lock, flags);
926
1da177e4
LT		 927 stl_disableintrs(portp);
928 if (tty->termios->c_cflag & HUPCL)
929 stl_setsignals(portp, 0, 0);
930 stl_enablerxtx(portp, 0, 0);
931 stl_flushbuffer(tty);
932 portp->istate = 0;
615e4a71 933 if (portp->tx.buf != NULL) {
1da177e4 934 kfree(portp->tx.buf);
615e4a71
JS		 935 portp->tx.buf = NULL;
936 portp->tx.head = NULL;
937 portp->tx.tail = NULL;
1da177e4
LT		 938 }
939 set_bit(TTY_IO_ERROR, &tty->flags);
940 tty_ldisc_flush(tty);
941
942 tty->closing = 0;
615e4a71 943 portp->tty = NULL;
1da177e4
LT		 944
945 if (portp->openwaitcnt) {
946 if (portp->close_delay)
947 msleep_interruptible(jiffies_to_msecs(portp->close_delay));
948 wake_up_interruptible(&portp->open_wait);
949 }
950
951 portp->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
952 wake_up_interruptible(&portp->close_wait);
1da177e4
LT		 953}
954
955/*****************************************************************************/
956
957/*
958 * Write routine. Take data and stuff it in to the TX ring queue.
959 * If transmit interrupts are not running then start them.
960 */
961
962static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
963{
ca7ed0f2 964 struct stlport *portp;
1da177e4
LT		 965 unsigned int len, stlen;
966 unsigned char *chbuf;
967 char *head, *tail;
968
a0564e14 969 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 970
1da177e4 971 portp = tty->driver_data;
615e4a71 972 if (portp == NULL)
014c2544 973 return 0;
615e4a71 974 if (portp->tx.buf == NULL)
014c2544 975 return 0;
1da177e4
LT		 976
977/*
978 * If copying direct from user space we must cater for page faults,
979 * causing us to "sleep" here for a while. To handle this copy in all
980 * the data we need now, into a local buffer. Then when we got it all
981 * copy it into the TX buffer.
982 */
983 chbuf = (unsigned char *) buf;
984
985 head = portp->tx.head;
986 tail = portp->tx.tail;
987 if (head >= tail) {
988 len = STL_TXBUFSIZE - (head - tail) - 1;
989 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
990 } else {
991 len = tail - head - 1;
992 stlen = len;
993 }
994
843b568c 995 len = min(len, (unsigned int)count);
1da177e4
LT		 996 count = 0;
997 while (len > 0) {
843b568c 998 stlen = min(len, stlen);
1da177e4
LT		 999 memcpy(head, chbuf, stlen);
1000 len -= stlen;
1001 chbuf += stlen;
1002 count += stlen;
1003 head += stlen;
1004 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
1005 head = portp->tx.buf;
1006 stlen = tail - head;
1007 }
1008 }
1009 portp->tx.head = head;
1010
1011 clear_bit(ASYI_TXLOW, &portp->istate);
1012 stl_startrxtx(portp, -1, 1);
1013
014c2544 1014 return count;
1da177e4
LT		 1015}
1016
1017/*****************************************************************************/
1018
1019static void stl_putchar(struct tty_struct *tty, unsigned char ch)
1020{
ca7ed0f2 1021 struct stlport *portp;
1da177e4
LT		 1022 unsigned int len;
1023 char *head, *tail;
1024
a0564e14 1025 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1026
615e4a71 1027 if (tty == NULL)
1da177e4
LT		 1028 return;
1029 portp = tty->driver_data;
615e4a71 1030 if (portp == NULL)
1da177e4 1031 return;
615e4a71 1032 if (portp->tx.buf == NULL)
1da177e4
LT		 1033 return;
1034
1035 head = portp->tx.head;
1036 tail = portp->tx.tail;
1037
1038 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
1039 len--;
1040
1041 if (len > 0) {
1042 *head++ = ch;
1043 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
1044 head = portp->tx.buf;
1045 }
1046 portp->tx.head = head;
1047}
1048
1049/*****************************************************************************/
1050
1051/*
1052 * If there are any characters in the buffer then make sure that TX
1053 * interrupts are on and get'em out. Normally used after the putchar
1054 * routine has been called.
1055 */
1056
1057static void stl_flushchars(struct tty_struct *tty)
1058{
ca7ed0f2 1059 struct stlport *portp;
1da177e4 1060
a0564e14 1061 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 1062
615e4a71 1063 if (tty == NULL)
1da177e4
LT		 1064 return;
1065 portp = tty->driver_data;
615e4a71 1066 if (portp == NULL)
1da177e4 1067 return;
615e4a71 1068 if (portp->tx.buf == NULL)
1da177e4
LT		 1069 return;
1070
1da177e4
LT		 1071 stl_startrxtx(portp, -1, 1);
1072}
1073
1074/*****************************************************************************/
1075
1076static int stl_writeroom(struct tty_struct *tty)
1077{
ca7ed0f2 1078 struct stlport *portp;
1da177e4
LT		 1079 char *head, *tail;
1080
a0564e14 1081 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 1082
615e4a71 1083 if (tty == NULL)
014c2544 1084 return 0;
1da177e4 1085 portp = tty->driver_data;
615e4a71 1086 if (portp == NULL)
014c2544 1087 return 0;
615e4a71 1088 if (portp->tx.buf == NULL)
014c2544 1089 return 0;
1da177e4
LT		 1090
1091 head = portp->tx.head;
1092 tail = portp->tx.tail;
c62429d9 1093 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 1094}
1095
1096/*****************************************************************************/
1097
1098/*
1099 * Return number of chars in the TX buffer. Normally we would just
1100 * calculate the number of chars in the buffer and return that, but if
1101 * the buffer is empty and TX interrupts are still on then we return
1102 * that the buffer still has 1 char in it. This way whoever called us
1103 * will not think that ALL chars have drained - since the UART still
1104 * must have some chars in it (we are busy after all).
1105 */
1106
1107static int stl_charsinbuffer(struct tty_struct *tty)
1108{
ca7ed0f2 1109 struct stlport *portp;
1da177e4
LT		 1110 unsigned int size;
1111 char *head, *tail;
1112
a0564e14 1113 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1114
615e4a71 1115 if (tty == NULL)
014c2544 1116 return 0;
1da177e4 1117 portp = tty->driver_data;
615e4a71 1118 if (portp == NULL)
014c2544 1119 return 0;
615e4a71 1120 if (portp->tx.buf == NULL)
014c2544 1121 return 0;
1da177e4
LT		 1122
1123 head = portp->tx.head;
1124 tail = portp->tx.tail;
1125 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1126 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1127 size = 1;
014c2544 1128 return size;
1da177e4
LT		 1129}
1130
1131/*****************************************************************************/
1132
1133/*
1134 * Generate the serial struct info.
1135 */
1136
ca7ed0f2 1137static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1138{
1139 struct serial_struct sio;
ca7ed0f2 1140 struct stlbrd *brdp;
1da177e4 1141
a0564e14 1142 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1143
1144 memset(&sio, 0, sizeof(struct serial_struct));
1145 sio.line = portp->portnr;
1146 sio.port = portp->ioaddr;
1147 sio.flags = portp->flags;
1148 sio.baud_base = portp->baud_base;
1149 sio.close_delay = portp->close_delay;
1150 sio.closing_wait = portp->closing_wait;
1151 sio.custom_divisor = portp->custom_divisor;
1152 sio.hub6 = 0;
1153 if (portp->uartp == &stl_cd1400uart) {
1154 sio.type = PORT_CIRRUS;
1155 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1156 } else {
1157 sio.type = PORT_UNKNOWN;
1158 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1159 }
1160
1161 brdp = stl_brds[portp->brdnr];
615e4a71 1162 if (brdp != NULL)
1da177e4
LT		 1163 sio.irq = brdp->irq;
1164
1165 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1166}
1167
1168/*****************************************************************************/
1169
1170/*
1171 * Set port according to the serial struct info.
1172 * At this point we do not do any auto-configure stuff, so we will
1173 * just quietly ignore any requests to change irq, etc.
1174 */
1175
ca7ed0f2 1176static int stl_setserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1177{
1178 struct serial_struct sio;
1179
a0564e14 1180 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1181
1182 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1183 return -EFAULT;
1184 if (!capable(CAP_SYS_ADMIN)) {
1185 if ((sio.baud_base != portp->baud_base) ||
1186 (sio.close_delay != portp->close_delay) ||
1187 ((sio.flags & ~ASYNC_USR_MASK) !=
1188 (portp->flags & ~ASYNC_USR_MASK)))
014c2544 1189 return -EPERM;
1da177e4
LT		 1190 }
1191
1192 portp->flags = (portp->flags & ~ASYNC_USR_MASK) |
1193 (sio.flags & ASYNC_USR_MASK);
1194 portp->baud_base = sio.baud_base;
1195 portp->close_delay = sio.close_delay;
1196 portp->closing_wait = sio.closing_wait;
1197 portp->custom_divisor = sio.custom_divisor;
1198 stl_setport(portp, portp->tty->termios);
014c2544 1199 return 0;
1da177e4
LT		 1200}
1201
1202/*****************************************************************************/
1203
1204static int stl_tiocmget(struct tty_struct *tty, struct file *file)
1205{
ca7ed0f2 1206 struct stlport *portp;
1da177e4 1207
615e4a71 1208 if (tty == NULL)
014c2544 1209 return -ENODEV;
1da177e4 1210 portp = tty->driver_data;
615e4a71 1211 if (portp == NULL)
014c2544 1212 return -ENODEV;
1da177e4 1213 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1214 return -EIO;
1da177e4
LT		 1215
1216 return stl_getsignals(portp);
1217}
1218
1219static int stl_tiocmset(struct tty_struct *tty, struct file *file,
1220 unsigned int set, unsigned int clear)
1221{
ca7ed0f2 1222 struct stlport *portp;
1da177e4
LT		 1223 int rts = -1, dtr = -1;
1224
615e4a71 1225 if (tty == NULL)
014c2544 1226 return -ENODEV;
1da177e4 1227 portp = tty->driver_data;
615e4a71 1228 if (portp == NULL)
014c2544 1229 return -ENODEV;
1da177e4 1230 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1231 return -EIO;
1da177e4
LT		 1232
1233 if (set & TIOCM_RTS)
1234 rts = 1;
1235 if (set & TIOCM_DTR)
1236 dtr = 1;
1237 if (clear & TIOCM_RTS)
1238 rts = 0;
1239 if (clear & TIOCM_DTR)
1240 dtr = 0;
1241
1242 stl_setsignals(portp, dtr, rts);
1243 return 0;
1244}
1245
1246static int stl_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1247{
ca7ed0f2 1248 struct stlport *portp;
1da177e4
LT		 1249 unsigned int ival;
1250 int rc;
1251 void __user *argp = (void __user *)arg;
1252
a0564e14
JS		 1253 pr_debug("stl_ioctl(tty=%p,file=%p,cmd=%x,arg=%lx)\n", tty, file, cmd,
1254 arg);
1da177e4 1255
615e4a71 1256 if (tty == NULL)
014c2544 1257 return -ENODEV;
1da177e4 1258 portp = tty->driver_data;
615e4a71 1259 if (portp == NULL)
014c2544 1260 return -ENODEV;
1da177e4
LT		 1261
1262 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1263 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1264 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1265 return -EIO;
1da177e4
LT		 1266
1267 rc = 0;
1268
1269 switch (cmd) {
1270 case TIOCGSOFTCAR:
1271 rc = put_user(((tty->termios->c_cflag & CLOCAL) ? 1 : 0),
1272 (unsigned __user *) argp);
1273 break;
1274 case TIOCSSOFTCAR:
1275 if (get_user(ival, (unsigned int __user *) arg))
1276 return -EFAULT;
1277 tty->termios->c_cflag =
1278 (tty->termios->c_cflag & ~CLOCAL) |
1279 (ival ? CLOCAL : 0);
1280 break;
1281 case TIOCGSERIAL:
1282 rc = stl_getserial(portp, argp);
1283 break;
1284 case TIOCSSERIAL:
1285 rc = stl_setserial(portp, argp);
1286 break;
1287 case COM_GETPORTSTATS:
1288 rc = stl_getportstats(portp, argp);
1289 break;
1290 case COM_CLRPORTSTATS:
1291 rc = stl_clrportstats(portp, argp);
1292 break;
1293 case TIOCSERCONFIG:
1294 case TIOCSERGWILD:
1295 case TIOCSERSWILD:
1296 case TIOCSERGETLSR:
1297 case TIOCSERGSTRUCT:
1298 case TIOCSERGETMULTI:
1299 case TIOCSERSETMULTI:
1300 default:
1301 rc = -ENOIOCTLCMD;
1302 break;
1303 }
1304
014c2544 1305 return rc;
1da177e4
LT		 1306}
1307
1308/*****************************************************************************/
1309
96b066b8
JS		 1310/*
1311 * Start the transmitter again. Just turn TX interrupts back on.
1312 */
1313
1314static void stl_start(struct tty_struct *tty)
1315{
1316 struct stlport *portp;
1317
1318 pr_debug("stl_start(tty=%p)\n", tty);
1319
1320 if (tty == NULL)
1321 return;
1322 portp = tty->driver_data;
1323 if (portp == NULL)
1324 return;
1325 stl_startrxtx(portp, -1, 1);
1326}
1327
1328/*****************************************************************************/
1329
606d099c 1330static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1331{
ca7ed0f2 1332 struct stlport *portp;
606d099c 1333 struct ktermios *tiosp;
1da177e4 1334
a0564e14 1335 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1336
615e4a71 1337 if (tty == NULL)
1da177e4
LT		 1338 return;
1339 portp = tty->driver_data;
615e4a71 1340 if (portp == NULL)
1da177e4
LT		 1341 return;
1342
1343 tiosp = tty->termios;
1344 if ((tiosp->c_cflag == old->c_cflag) &&
1345 (tiosp->c_iflag == old->c_iflag))
1346 return;
1347
1348 stl_setport(portp, tiosp);
1349 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1350 -1);
1351 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1352 tty->hw_stopped = 0;
1353 stl_start(tty);
1354 }
1355 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
1356 wake_up_interruptible(&portp->open_wait);
1357}
1358
1359/*****************************************************************************/
1360
1361/*
1362 * Attempt to flow control who ever is sending us data. Based on termios
1363 * settings use software or/and hardware flow control.
1364 */
1365
1366static void stl_throttle(struct tty_struct *tty)
1367{
ca7ed0f2 1368 struct stlport *portp;
1da177e4 1369
a0564e14 1370 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1371
615e4a71 1372 if (tty == NULL)
1da177e4
LT		 1373 return;
1374 portp = tty->driver_data;
615e4a71 1375 if (portp == NULL)
1da177e4
LT		 1376 return;
1377 stl_flowctrl(portp, 0);
1378}
1379
1380/*****************************************************************************/
1381
1382/*
1383 * Unflow control the device sending us data...
1384 */
1385
1386static void stl_unthrottle(struct tty_struct *tty)
1387{
ca7ed0f2 1388 struct stlport *portp;
1da177e4 1389
a0564e14 1390 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1391
615e4a71 1392 if (tty == NULL)
1da177e4
LT		 1393 return;
1394 portp = tty->driver_data;
615e4a71 1395 if (portp == NULL)
1da177e4
LT		 1396 return;
1397 stl_flowctrl(portp, 1);
1398}
1399
1400/*****************************************************************************/
1401
1402/*
1403 * Stop the transmitter. Basically to do this we will just turn TX
1404 * interrupts off.
1405 */
1406
1407static void stl_stop(struct tty_struct *tty)
1408{
ca7ed0f2 1409 struct stlport *portp;
1da177e4 1410
a0564e14 1411 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1412
615e4a71 1413 if (tty == NULL)
1da177e4
LT		 1414 return;
1415 portp = tty->driver_data;
615e4a71 1416 if (portp == NULL)
1da177e4
LT		 1417 return;
1418 stl_startrxtx(portp, -1, 0);
1419}
1420
1421/*****************************************************************************/
1422
1da177e4
LT		 1423/*
1424 * Hangup this port. This is pretty much like closing the port, only
1425 * a little more brutal. No waiting for data to drain. Shutdown the
1426 * port and maybe drop signals.
1427 */
1428
1429static void stl_hangup(struct tty_struct *tty)
1430{
ca7ed0f2 1431 struct stlport *portp;
1da177e4 1432
a0564e14 1433 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1434
615e4a71 1435 if (tty == NULL)
1da177e4
LT		 1436 return;
1437 portp = tty->driver_data;
615e4a71 1438 if (portp == NULL)
1da177e4
LT		 1439 return;
1440
1441 portp->flags &= ~ASYNC_INITIALIZED;
1442 stl_disableintrs(portp);
1443 if (tty->termios->c_cflag & HUPCL)
1444 stl_setsignals(portp, 0, 0);
1445 stl_enablerxtx(portp, 0, 0);
1446 stl_flushbuffer(tty);
1447 portp->istate = 0;
1448 set_bit(TTY_IO_ERROR, &tty->flags);
615e4a71 1449 if (portp->tx.buf != NULL) {
1da177e4 1450 kfree(portp->tx.buf);
615e4a71
JS		 1451 portp->tx.buf = NULL;
1452 portp->tx.head = NULL;
1453 portp->tx.tail = NULL;
1da177e4 1454 }
615e4a71 1455 portp->tty = NULL;
1da177e4
LT		 1456 portp->flags &= ~ASYNC_NORMAL_ACTIVE;
1457 portp->refcount = 0;
1458 wake_up_interruptible(&portp->open_wait);
1459}
1460
1461/*****************************************************************************/
1462
1da177e4
LT		 1463static void stl_breakctl(struct tty_struct *tty, int state)
1464{
ca7ed0f2 1465 struct stlport *portp;
1da177e4 1466
a0564e14 1467 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1468
615e4a71 1469 if (tty == NULL)
1da177e4
LT		 1470 return;
1471 portp = tty->driver_data;
615e4a71 1472 if (portp == NULL)
1da177e4
LT		 1473 return;
1474
1475 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
1476}
1477
1478/*****************************************************************************/
1479
1da177e4
LT		 1480static void stl_sendxchar(struct tty_struct *tty, char ch)
1481{
ca7ed0f2 1482 struct stlport *portp;
1da177e4 1483
a0564e14 1484 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1485
615e4a71 1486 if (tty == NULL)
1da177e4
LT		 1487 return;
1488 portp = tty->driver_data;
615e4a71 1489 if (portp == NULL)
1da177e4
LT		 1490 return;
1491
1492 if (ch == STOP_CHAR(tty))
1493 stl_sendflow(portp, 0);
1494 else if (ch == START_CHAR(tty))
1495 stl_sendflow(portp, 1);
1496 else
1497 stl_putchar(tty, ch);
1498}
1499
1500/*****************************************************************************/
1501
1502#define MAXLINE 80
1503
1504/*
1505 * Format info for a specified port. The line is deliberately limited
1506 * to 80 characters. (If it is too long it will be truncated, if too
1507 * short then padded with spaces).
1508 */
1509
ca7ed0f2 1510static int stl_portinfo(struct stlport *portp, int portnr, char *pos)
1da177e4
LT		 1511{
1512 char *sp;
1513 int sigs, cnt;
1514
1515 sp = pos;
1516 sp += sprintf(sp, "%d: uart:%s tx:%d rx:%d",
1517 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1518 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1519
1520 if (portp->stats.rxframing)
1521 sp += sprintf(sp, " fe:%d", (int) portp->stats.rxframing);
1522 if (portp->stats.rxparity)
1523 sp += sprintf(sp, " pe:%d", (int) portp->stats.rxparity);
1524 if (portp->stats.rxbreaks)
1525 sp += sprintf(sp, " brk:%d", (int) portp->stats.rxbreaks);
1526 if (portp->stats.rxoverrun)
1527 sp += sprintf(sp, " oe:%d", (int) portp->stats.rxoverrun);
1528
1529 sigs = stl_getsignals(portp);
1530 cnt = sprintf(sp, "%s%s%s%s%s ",
1531 (sigs & TIOCM_RTS) ? "|RTS" : "",
1532 (sigs & TIOCM_CTS) ? "|CTS" : "",
1533 (sigs & TIOCM_DTR) ? "|DTR" : "",
1534 (sigs & TIOCM_CD) ? "|DCD" : "",
1535 (sigs & TIOCM_DSR) ? "|DSR" : "");
1536 *sp = ' ';
1537 sp += cnt;
1538
c62429d9 1539 for (cnt = sp - pos; cnt < (MAXLINE - 1); cnt++)
1da177e4
LT		 1540 *sp++ = ' ';
1541 if (cnt >= MAXLINE)
1542 pos[(MAXLINE - 2)] = '+';
1543 pos[(MAXLINE - 1)] = '\n';
1544
014c2544 1545 return MAXLINE;
1da177e4
LT		 1546}
1547
1548/*****************************************************************************/
1549
1550/*
1551 * Port info, read from the /proc file system.
1552 */
1553
1554static int stl_readproc(char *page, char **start, off_t off, int count, int *eof, void *data)
1555{
ca7ed0f2
JS		 1556 struct stlbrd *brdp;
1557 struct stlpanel *panelp;
1558 struct stlport *portp;
1da177e4
LT		 1559 int brdnr, panelnr, portnr, totalport;
1560 int curoff, maxoff;
1561 char *pos;
1562
a0564e14
JS		 1563 pr_debug("stl_readproc(page=%p,start=%p,off=%lx,count=%d,eof=%p,"
1564 "data=%p\n", page, start, off, count, eof, data);
1da177e4
LT		 1565
1566 pos = page;
1567 totalport = 0;
1568 curoff = 0;
1569
1570 if (off == 0) {
1571 pos += sprintf(pos, "%s: version %s", stl_drvtitle,
1572 stl_drvversion);
1573 while (pos < (page + MAXLINE - 1))
1574 *pos++ = ' ';
1575 *pos++ = '\n';
1576 }
1577 curoff = MAXLINE;
1578
1579/*
1580 * We scan through for each board, panel and port. The offset is
1581 * calculated on the fly, and irrelevant ports are skipped.
1582 */
c62429d9 1583 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1584 brdp = stl_brds[brdnr];
615e4a71 1585 if (brdp == NULL)
1da177e4
LT		 1586 continue;
1587 if (brdp->state == 0)
1588 continue;
1589
1590 maxoff = curoff + (brdp->nrports * MAXLINE);
1591 if (off >= maxoff) {
1592 curoff = maxoff;
1593 continue;
1594 }
1595
1596 totalport = brdnr * STL_MAXPORTS;
c62429d9 1597 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1598 panelp = brdp->panels[panelnr];
615e4a71 1599 if (panelp == NULL)
1da177e4
LT		 1600 continue;
1601
1602 maxoff = curoff + (panelp->nrports * MAXLINE);
1603 if (off >= maxoff) {
1604 curoff = maxoff;
1605 totalport += panelp->nrports;
1606 continue;
1607 }
1608
c62429d9 1609 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1610 totalport++) {
1611 portp = panelp->ports[portnr];
615e4a71 1612 if (portp == NULL)
1da177e4
LT		 1613 continue;
1614 if (off >= (curoff += MAXLINE))
1615 continue;
1616 if ((pos - page + MAXLINE) > count)
1617 goto stl_readdone;
1618 pos += stl_portinfo(portp, totalport, pos);
1619 }
1620 }
1621 }
1622
1623 *eof = 1;
1624
1625stl_readdone:
1626 *start = page;
c62429d9 1627 return pos - page;
1da177e4
LT		 1628}
1629
1630/*****************************************************************************/
1631
1632/*
1633 * All board interrupts are vectored through here first. This code then
1634 * calls off to the approrpriate board interrupt handlers.
1635 */
1636
7d12e780 1637static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1638{
ca7ed0f2 1639 struct stlbrd *brdp = dev_id;
1da177e4 1640
a0564e14 1641 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, irq);
1da177e4
LT		 1642
1643 return IRQ_RETVAL((* brdp->isr)(brdp));
1644}
1645
1646/*****************************************************************************/
1647
1648/*
1649 * Interrupt service routine for EasyIO board types.
1650 */
1651
ca7ed0f2 1652static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1653{
ca7ed0f2 1654 struct stlpanel *panelp;
1da177e4
LT		 1655 unsigned int iobase;
1656 int handled = 0;
1657
b65b5b59 1658 spin_lock(&brd_lock);
1da177e4
LT		 1659 panelp = brdp->panels[0];
1660 iobase = panelp->iobase;
1661 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1662 handled = 1;
1663 (* panelp->isr)(panelp, iobase);
1664 }
b65b5b59 1665 spin_unlock(&brd_lock);
1da177e4
LT		 1666 return handled;
1667}
1668
1669/*****************************************************************************/
1670
1671/*
1672 * Interrupt service routine for ECH-AT board types.
1673 */
1674
ca7ed0f2 1675static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1676{
ca7ed0f2 1677 struct stlpanel *panelp;
1da177e4
LT		 1678 unsigned int ioaddr;
1679 int bnknr;
1680 int handled = 0;
1681
1682 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1683
1684 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1685 handled = 1;
c62429d9 1686 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1687 ioaddr = brdp->bnkstataddr[bnknr];
1688 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1689 panelp = brdp->bnk2panel[bnknr];
1690 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1691 }
1692 }
1693 }
1694
1695 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1696
1697 return handled;
1698}
1699
1700/*****************************************************************************/
1701
1702/*
1703 * Interrupt service routine for ECH-MCA board types.
1704 */
1705
ca7ed0f2 1706static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1707{
ca7ed0f2 1708 struct stlpanel *panelp;
1da177e4
LT		 1709 unsigned int ioaddr;
1710 int bnknr;
1711 int handled = 0;
1712
1713 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1714 handled = 1;
c62429d9 1715 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1716 ioaddr = brdp->bnkstataddr[bnknr];
1717 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1718 panelp = brdp->bnk2panel[bnknr];
1719 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1720 }
1721 }
1722 }
1723 return handled;
1724}
1725
1726/*****************************************************************************/
1727
1728/*
1729 * Interrupt service routine for ECH-PCI board types.
1730 */
1731
ca7ed0f2 1732static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1733{
ca7ed0f2 1734 struct stlpanel *panelp;
1da177e4
LT		 1735 unsigned int ioaddr;
1736 int bnknr, recheck;
1737 int handled = 0;
1738
1739 while (1) {
1740 recheck = 0;
c62429d9 1741 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1742 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1743 ioaddr = brdp->bnkstataddr[bnknr];
1744 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1745 panelp = brdp->bnk2panel[bnknr];
1746 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1747 recheck++;
1748 handled = 1;
1749 }
1750 }
1751 if (! recheck)
1752 break;
1753 }
1754 return handled;
1755}
1756
1757/*****************************************************************************/
1758
1759/*
1760 * Interrupt service routine for ECH-8/64-PCI board types.
1761 */
1762
ca7ed0f2 1763static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1764{
ca7ed0f2 1765 struct stlpanel *panelp;
1da177e4
LT		 1766 unsigned int ioaddr;
1767 int bnknr;
1768 int handled = 0;
1769
1770 while (inb(brdp->ioctrl) & 0x1) {
1771 handled = 1;
c62429d9 1772 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1773 ioaddr = brdp->bnkstataddr[bnknr];
1774 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1775 panelp = brdp->bnk2panel[bnknr];
1776 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1777 }
1778 }
1779 }
1780
1781 return handled;
1782}
1783
1784/*****************************************************************************/
1785
1786/*
1787 * Service an off-level request for some channel.
1788 */
3e577a80 1789static void stl_offintr(struct work_struct *work)
1da177e4 1790{
ca7ed0f2 1791 struct stlport *portp = container_of(work, struct stlport, tqueue);
1da177e4
LT		 1792 struct tty_struct *tty;
1793 unsigned int oldsigs;
1794
a0564e14 1795 pr_debug("stl_offintr(portp=%p)\n", portp);
1da177e4 1796
615e4a71 1797 if (portp == NULL)
1da177e4
LT		 1798 return;
1799
1800 tty = portp->tty;
615e4a71 1801 if (tty == NULL)
1da177e4
LT		 1802 return;
1803
1804 lock_kernel();
c62429d9 1805 if (test_bit(ASYI_TXLOW, &portp->istate))
1da177e4 1806 tty_wakeup(tty);
c62429d9 1807
1da177e4
LT		 1808 if (test_bit(ASYI_DCDCHANGE, &portp->istate)) {
1809 clear_bit(ASYI_DCDCHANGE, &portp->istate);
1810 oldsigs = portp->sigs;
1811 portp->sigs = stl_getsignals(portp);
1812 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
1813 wake_up_interruptible(&portp->open_wait);
c62429d9 1814 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
1da177e4
LT		 1815 if (portp->flags & ASYNC_CHECK_CD)
1816 tty_hangup(tty); /* FIXME: module removal race here - AKPM */
1da177e4
LT		 1817 }
1818 unlock_kernel();
1819}
1820
1821/*****************************************************************************/
1822
1823/*
1824 * Initialize all the ports on a panel.
1825 */
1826
705c1862 1827static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1828{
ca7ed0f2 1829 struct stlport *portp;
1da177e4
LT		 1830 int chipmask, i;
1831
a0564e14 1832 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1833
1834 chipmask = stl_panelinit(brdp, panelp);
1835
1836/*
1837 * All UART's are initialized (if found!). Now go through and setup
1838 * each ports data structures.
1839 */
c62429d9 1840 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1841 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1842 if (!portp) {
1da177e4 1843 printk("STALLION: failed to allocate memory "
ca7ed0f2 1844 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1845 break;
1846 }
1da177e4
LT		 1847
1848 portp->magic = STL_PORTMAGIC;
1849 portp->portnr = i;
1850 portp->brdnr = panelp->brdnr;
1851 portp->panelnr = panelp->panelnr;
1852 portp->uartp = panelp->uartp;
1853 portp->clk = brdp->clk;
1854 portp->baud_base = STL_BAUDBASE;
1855 portp->close_delay = STL_CLOSEDELAY;
1856 portp->closing_wait = 30 * HZ;
3e577a80 1857 INIT_WORK(&portp->tqueue, stl_offintr);
1da177e4
LT		 1858 init_waitqueue_head(&portp->open_wait);
1859 init_waitqueue_head(&portp->close_wait);
1860 portp->stats.brd = portp->brdnr;
1861 portp->stats.panel = portp->panelnr;
1862 portp->stats.port = portp->portnr;
1863 panelp->ports[i] = portp;
1864 stl_portinit(brdp, panelp, portp);
1865 }
1866
c62429d9 1867 return 0;
1da177e4
LT		 1868}
1869
3b85b341
JS		 1870static void stl_cleanup_panels(struct stlbrd *brdp)
1871{
1872 struct stlpanel *panelp;
1873 struct stlport *portp;
1874 unsigned int j, k;
1875
1876 for (j = 0; j < STL_MAXPANELS; j++) {
1877 panelp = brdp->panels[j];
1878 if (panelp == NULL)
1879 continue;
1880 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1881 portp = panelp->ports[k];
1882 if (portp == NULL)
1883 continue;
1884 if (portp->tty != NULL)
1885 stl_hangup(portp->tty);
1886 kfree(portp->tx.buf);
1887 kfree(portp);
1888 }
1889 kfree(panelp);
1890 }
1891}
1892
1da177e4
LT		 1893/*****************************************************************************/
1894
1895/*
1896 * Try to find and initialize an EasyIO board.
1897 */
1898
705c1862 1899static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1900{
ca7ed0f2 1901 struct stlpanel *panelp;
1da177e4
LT		 1902 unsigned int status;
1903 char *name;
3b85b341 1904 int retval;
1da177e4 1905
a0564e14 1906 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1907
1908 brdp->ioctrl = brdp->ioaddr1 + 1;
1909 brdp->iostatus = brdp->ioaddr1 + 2;
1910
1911 status = inb(brdp->iostatus);
1912 if ((status & EIO_IDBITMASK) == EIO_MK3)
1913 brdp->ioctrl++;
1914
1915/*
1916 * Handle board specific stuff now. The real difference is PCI
1917 * or not PCI.
1918 */
1919 if (brdp->brdtype == BRD_EASYIOPCI) {
1920 brdp->iosize1 = 0x80;
1921 brdp->iosize2 = 0x80;
1922 name = "serial(EIO-PCI)";
1923 outb(0x41, (brdp->ioaddr2 + 0x4c));
1924 } else {
1925 brdp->iosize1 = 8;
1926 name = "serial(EIO)";
1927 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1928 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1929 printk("STALLION: invalid irq=%d for brd=%d\n",
1930 brdp->irq, brdp->brdnr);
3b85b341
JS		 1931 retval = -EINVAL;
1932 goto err;
1da177e4
LT		 1933 }
1934 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1935 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1936 brdp->ioctrl);
1937 }
1938
3b85b341 1939 retval = -EBUSY;
1da177e4
LT		 1940 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1941 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1942 "%x conflicts with another device\n", brdp->brdnr,
1943 brdp->ioaddr1);
3b85b341 1944 goto err;
1da177e4
LT		 1945 }
1946
1947 if (brdp->iosize2 > 0)
1948 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1949 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1950 "address %x conflicts with another device\n",
1951 brdp->brdnr, brdp->ioaddr2);
1952 printk(KERN_WARNING "STALLION: Warning, also "
1953 "releasing board %d I/O address %x \n",
1954 brdp->brdnr, brdp->ioaddr1);
3b85b341 1955 goto err_rel1;
1da177e4
LT		 1956 }
1957
1958/*
1959 * Everything looks OK, so let's go ahead and probe for the hardware.
1960 */
1961 brdp->clk = CD1400_CLK;
1962 brdp->isr = stl_eiointr;
1963
3b85b341 1964 retval = -ENODEV;
1da177e4
LT		 1965 switch (status & EIO_IDBITMASK) {
1966 case EIO_8PORTM:
1967 brdp->clk = CD1400_CLK8M;
1968 /* fall thru */
1969 case EIO_8PORTRS:
1970 case EIO_8PORTDI:
1971 brdp->nrports = 8;
1972 break;
1973 case EIO_4PORTRS:
1974 brdp->nrports = 4;
1975 break;
1976 case EIO_MK3:
1977 switch (status & EIO_BRDMASK) {
1978 case ID_BRD4:
1979 brdp->nrports = 4;
1980 break;
1981 case ID_BRD8:
1982 brdp->nrports = 8;
1983 break;
1984 case ID_BRD16:
1985 brdp->nrports = 16;
1986 break;
1987 default:
3b85b341 1988 goto err_rel2;
1da177e4
LT		 1989 }
1990 break;
1991 default:
3b85b341 1992 goto err_rel2;
1da177e4
LT		 1993 }
1994
1995/*
1996 * We have verified that the board is actually present, so now we
1997 * can complete the setup.
1998 */
1999
ca7ed0f2 2000 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 2001 if (!panelp) {
1da177e4 2002 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 2003 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 2004 retval = -ENOMEM;
2005 goto err_rel2;
1da177e4 2006 }
1da177e4
LT		 2007
2008 panelp->magic = STL_PANELMAGIC;
2009 panelp->brdnr = brdp->brdnr;
2010 panelp->panelnr = 0;
2011 panelp->nrports = brdp->nrports;
2012 panelp->iobase = brdp->ioaddr1;
2013 panelp->hwid = status;
2014 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 2015 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 2016 panelp->isr = stl_sc26198intr;
2017 } else {
615e4a71 2018 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 2019 panelp->isr = stl_cd1400eiointr;
2020 }
2021
2022 brdp->panels[0] = panelp;
2023 brdp->nrpanels = 1;
2024 brdp->state |= BRD_FOUND;
2025 brdp->hwid = status;
0f2ed4c6 2026 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2027 printk("STALLION: failed to register interrupt "
2028 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2029 retval = -ENODEV;
2030 goto err_fr;
1da177e4 2031 }
3b85b341
JS		 2032
2033 return 0;
2034err_fr:
2035 stl_cleanup_panels(brdp);
2036err_rel2:
2037 if (brdp->iosize2 > 0)
2038 release_region(brdp->ioaddr2, brdp->iosize2);
2039err_rel1:
2040 release_region(brdp->ioaddr1, brdp->iosize1);
2041err:
2042 return retval;
1da177e4
LT		 2043}
2044
2045/*****************************************************************************/
2046
2047/*
2048 * Try to find an ECH board and initialize it. This code is capable of
2049 * dealing with all types of ECH board.
2050 */
2051
705c1862 2052static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 2053{
ca7ed0f2 2054 struct stlpanel *panelp;
1da177e4 2055 unsigned int status, nxtid, ioaddr, conflict;
3b85b341 2056 int panelnr, banknr, i, retval;
1da177e4
LT		 2057 char *name;
2058
a0564e14 2059 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 2060
2061 status = 0;
2062 conflict = 0;
2063
2064/*
2065 * Set up the initial board register contents for boards. This varies a
2066 * bit between the different board types. So we need to handle each
2067 * separately. Also do a check that the supplied IRQ is good.
2068 */
2069 switch (brdp->brdtype) {
2070
2071 case BRD_ECH:
2072 brdp->isr = stl_echatintr;
2073 brdp->ioctrl = brdp->ioaddr1 + 1;
2074 brdp->iostatus = brdp->ioaddr1 + 1;
2075 status = inb(brdp->iostatus);
3b85b341
JS		 2076 if ((status & ECH_IDBITMASK) != ECH_ID) {
2077 retval = -ENODEV;
2078 goto err;
2079 }
1da177e4
LT		 2080 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2081 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2082 printk("STALLION: invalid irq=%d for brd=%d\n",
2083 brdp->irq, brdp->brdnr);
3b85b341
JS		 2084 retval = -EINVAL;
2085 goto err;
1da177e4
LT		 2086 }
2087 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
2088 status |= (stl_vecmap[brdp->irq] << 1);
2089 outb((status | ECH_BRDRESET), brdp->ioaddr1);
2090 brdp->ioctrlval = ECH_INTENABLE |
2091 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 2092 for (i = 0; i < 10; i++)
1da177e4
LT		 2093 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
2094 brdp->iosize1 = 2;
2095 brdp->iosize2 = 32;
2096 name = "serial(EC8/32)";
2097 outb(status, brdp->ioaddr1);
2098 break;
2099
2100 case BRD_ECHMC:
2101 brdp->isr = stl_echmcaintr;
2102 brdp->ioctrl = brdp->ioaddr1 + 0x20;
2103 brdp->iostatus = brdp->ioctrl;
2104 status = inb(brdp->iostatus);
3b85b341
JS		 2105 if ((status & ECH_IDBITMASK) != ECH_ID) {
2106 retval = -ENODEV;
2107 goto err;
2108 }
1da177e4
LT		 2109 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2110 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2111 printk("STALLION: invalid irq=%d for brd=%d\n",
2112 brdp->irq, brdp->brdnr);
3b85b341
JS		 2113 retval = -EINVAL;
2114 goto err;
1da177e4
LT		 2115 }
2116 outb(ECHMC_BRDRESET, brdp->ioctrl);
2117 outb(ECHMC_INTENABLE, brdp->ioctrl);
2118 brdp->iosize1 = 64;
2119 name = "serial(EC8/32-MC)";
2120 break;
2121
2122 case BRD_ECHPCI:
2123 brdp->isr = stl_echpciintr;
2124 brdp->ioctrl = brdp->ioaddr1 + 2;
2125 brdp->iosize1 = 4;
2126 brdp->iosize2 = 8;
2127 name = "serial(EC8/32-PCI)";
2128 break;
2129
2130 case BRD_ECH64PCI:
2131 brdp->isr = stl_echpci64intr;
2132 brdp->ioctrl = brdp->ioaddr2 + 0x40;
2133 outb(0x43, (brdp->ioaddr1 + 0x4c));
2134 brdp->iosize1 = 0x80;
2135 brdp->iosize2 = 0x80;
2136 name = "serial(EC8/64-PCI)";
2137 break;
2138
2139 default:
2140 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 2141 retval = -EINVAL;
2142 goto err;
1da177e4
LT		 2143 }
2144
2145/*
2146 * Check boards for possible IO address conflicts and return fail status
2147 * if an IO conflict found.
2148 */
3b85b341 2149 retval = -EBUSY;
1da177e4
LT		 2150 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
2151 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
2152 "%x conflicts with another device\n", brdp->brdnr,
2153 brdp->ioaddr1);
3b85b341 2154 goto err;
1da177e4
LT		 2155 }
2156
2157 if (brdp->iosize2 > 0)
2158 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
2159 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
2160 "address %x conflicts with another device\n",
2161 brdp->brdnr, brdp->ioaddr2);
2162 printk(KERN_WARNING "STALLION: Warning, also "
2163 "releasing board %d I/O address %x \n",
2164 brdp->brdnr, brdp->ioaddr1);
3b85b341 2165 goto err_rel1;
1da177e4
LT		 2166 }
2167
2168/*
2169 * Scan through the secondary io address space looking for panels.
2170 * As we find'em allocate and initialize panel structures for each.
2171 */
2172 brdp->clk = CD1400_CLK;
2173 brdp->hwid = status;
2174
2175 ioaddr = brdp->ioaddr2;
2176 banknr = 0;
2177 panelnr = 0;
2178 nxtid = 0;
2179
c62429d9 2180 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 2181 if (brdp->brdtype == BRD_ECHPCI) {
2182 outb(nxtid, brdp->ioctrl);
2183 ioaddr = brdp->ioaddr2;
2184 }
2185 status = inb(ioaddr + ECH_PNLSTATUS);
2186 if ((status & ECH_PNLIDMASK) != nxtid)
3b85b341 2187 goto err_fr;
ca7ed0f2 2188 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 2189 if (!panelp) {
1da177e4 2190 printk("STALLION: failed to allocate memory "
ca7ed0f2 2191 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341 2192 goto err_fr;
1da177e4 2193 }
1da177e4
LT		 2194 panelp->magic = STL_PANELMAGIC;
2195 panelp->brdnr = brdp->brdnr;
2196 panelp->panelnr = panelnr;
2197 panelp->iobase = ioaddr;
2198 panelp->pagenr = nxtid;
2199 panelp->hwid = status;
2200 brdp->bnk2panel[banknr] = panelp;
2201 brdp->bnkpageaddr[banknr] = nxtid;
2202 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2203
2204 if (status & ECH_PNLXPID) {
615e4a71 2205 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 2206 panelp->isr = stl_sc26198intr;
2207 if (status & ECH_PNL16PORT) {
2208 panelp->nrports = 16;
2209 brdp->bnk2panel[banknr] = panelp;
2210 brdp->bnkpageaddr[banknr] = nxtid;
2211 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2212 ECH_PNLSTATUS;
c62429d9 2213 } else
1da177e4 2214 panelp->nrports = 8;
1da177e4 2215 } else {
615e4a71 2216 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 2217 panelp->isr = stl_cd1400echintr;
2218 if (status & ECH_PNL16PORT) {
2219 panelp->nrports = 16;
2220 panelp->ackmask = 0x80;
2221 if (brdp->brdtype != BRD_ECHPCI)
2222 ioaddr += EREG_BANKSIZE;
2223 brdp->bnk2panel[banknr] = panelp;
2224 brdp->bnkpageaddr[banknr] = ++nxtid;
2225 brdp->bnkstataddr[banknr++] = ioaddr +
2226 ECH_PNLSTATUS;
2227 } else {
2228 panelp->nrports = 8;
2229 panelp->ackmask = 0xc0;
2230 }
2231 }
2232
2233 nxtid++;
2234 ioaddr += EREG_BANKSIZE;
2235 brdp->nrports += panelp->nrports;
2236 brdp->panels[panelnr++] = panelp;
2237 if ((brdp->brdtype != BRD_ECHPCI) &&
2238 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2)))
3b85b341 2239 goto err_fr;
1da177e4
LT		 2240 }
2241
2242 brdp->nrpanels = panelnr;
2243 brdp->nrbnks = banknr;
2244 if (brdp->brdtype == BRD_ECH)
2245 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2246
2247 brdp->state |= BRD_FOUND;
0f2ed4c6 2248 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2249 printk("STALLION: failed to register interrupt "
2250 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2251 retval = -ENODEV;
2252 goto err_fr;
1da177e4
LT		 2253 }
2254
3b85b341
JS		 2255 return 0;
2256err_fr:
2257 stl_cleanup_panels(brdp);
2258 if (brdp->iosize2 > 0)
2259 release_region(brdp->ioaddr2, brdp->iosize2);
2260err_rel1:
2261 release_region(brdp->ioaddr1, brdp->iosize1);
2262err:
2263 return retval;
1da177e4
LT		 2264}
2265
2266/*****************************************************************************/
2267
2268/*
2269 * Initialize and configure the specified board.
2270 * Scan through all the boards in the configuration and see what we
2271 * can find. Handle EIO and the ECH boards a little differently here
2272 * since the initial search and setup is very different.
2273 */
2274
705c1862 2275static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2276{
3b85b341 2277 int i, retval;
1da177e4 2278
a0564e14 2279 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2280
2281 switch (brdp->brdtype) {
2282 case BRD_EASYIO:
2283 case BRD_EASYIOPCI:
3b85b341
JS		 2284 retval = stl_initeio(brdp);
2285 if (retval)
2286 goto err;
1da177e4
LT		 2287 break;
2288 case BRD_ECH:
2289 case BRD_ECHMC:
2290 case BRD_ECHPCI:
2291 case BRD_ECH64PCI:
3b85b341
JS		 2292 retval = stl_initech(brdp);
2293 if (retval)
2294 goto err;
1da177e4
LT		 2295 break;
2296 default:
2297 printk("STALLION: board=%d is unknown board type=%d\n",
2298 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2299 retval = -ENODEV;
2300 goto err;
1da177e4
LT		 2301 }
2302
1da177e4
LT		 2303 if ((brdp->state & BRD_FOUND) == 0) {
2304 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2305 stl_brdnames[brdp->brdtype], brdp->brdnr,
2306 brdp->ioaddr1, brdp->irq);
3b85b341 2307 goto err_free;
1da177e4
LT		 2308 }
2309
c62429d9 2310 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2311 if (brdp->panels[i] != NULL)
1da177e4
LT		 2312 stl_initports(brdp, brdp->panels[i]);
2313
2314 printk("STALLION: %s found, board=%d io=%x irq=%d "
2315 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2316 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2317 brdp->nrports);
3b85b341
JS		 2318
2319 return 0;
2320err_free:
2321 free_irq(brdp->irq, brdp);
2322
2323 stl_cleanup_panels(brdp);
2324
2325 release_region(brdp->ioaddr1, brdp->iosize1);
2326 if (brdp->iosize2 > 0)
2327 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2328err:
2329 return retval;
1da177e4
LT		 2330}
2331
2332/*****************************************************************************/
2333
2334/*
2335 * Find the next available board number that is free.
2336 */
2337
705c1862 2338static int __devinit stl_getbrdnr(void)
1da177e4
LT		 2339{
2340 int i;
2341
c62429d9 2342 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2343 if (stl_brds[i] == NULL) {
1da177e4
LT		 2344 if (i >= stl_nrbrds)
2345 stl_nrbrds = i + 1;
c62429d9 2346 return i;
1da177e4 2347 }
c62429d9
JS		 2348
2349 return -1;
1da177e4
LT		 2350}
2351
b1b84fe0 2352/*****************************************************************************/
1da177e4
LT		 2353/*
2354 * We have a Stallion board. Allocate a board structure and
2355 * initialize it. Read its IO and IRQ resources from PCI
2356 * configuration space.
2357 */
2358
b1b84fe0
JS		 2359static int __devinit stl_pciprobe(struct pci_dev *pdev,
2360 const struct pci_device_id *ent)
1da177e4 2361{
b1b84fe0
JS		 2362 struct stlbrd *brdp;
2363 unsigned int brdtype = ent->driver_data;
3b85b341 2364 int retval = -ENODEV;
1da177e4 2365
b1b84fe0 2366 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2367 goto err;
b1b84fe0
JS		 2368
2369 dev_info(&pdev->dev, "please, report this to LKML: %x/%x/%x\n",
2370 pdev->vendor, pdev->device, pdev->class);
1da177e4 2371
3b85b341
JS		 2372 retval = pci_enable_device(pdev);
2373 if (retval)
2374 goto err;
2375 brdp = stl_allocbrd();
2376 if (brdp == NULL) {
2377 retval = -ENOMEM;
2378 goto err;
2379 }
79cfe7ab 2380 mutex_lock(&stl_brdslock);
3b85b341
JS		 2381 brdp->brdnr = stl_getbrdnr();
2382 if (brdp->brdnr < 0) {
fefaf9a7 2383 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2384 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2385 mutex_unlock(&stl_brdslock);
3b85b341 2386 goto err_fr;
1da177e4 2387 }
79cfe7ab
JS		 2388 stl_brds[brdp->brdnr] = brdp;
2389 mutex_unlock(&stl_brdslock);
2390
1da177e4 2391 brdp->brdtype = brdtype;
fc06b5cf 2392 brdp->state |= STL_PROBED;
1da177e4 2393
1da177e4
LT		 2394/*
2395 * We have all resources from the board, so let's setup the actual
2396 * board structure now.
2397 */
2398 switch (brdtype) {
2399 case BRD_ECHPCI:
b1b84fe0
JS		 2400 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2401 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2402 break;
2403 case BRD_ECH64PCI:
b1b84fe0
JS		 2404 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2405 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2406 break;
2407 case BRD_EASYIOPCI:
b1b84fe0
JS		 2408 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2409 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2410 break;
2411 default:
fefaf9a7 2412 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2413 break;
2414 }
2415
b1b84fe0 2416 brdp->irq = pdev->irq;
3b85b341
JS		 2417 retval = stl_brdinit(brdp);
2418 if (retval)
79cfe7ab 2419 goto err_null;
1da177e4 2420
b1b84fe0
JS		 2421 pci_set_drvdata(pdev, brdp);
2422
3b85b341 2423 return 0;
79cfe7ab
JS		 2424err_null:
2425 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2426err_fr:
2427 kfree(brdp);
2428err:
2429 return retval;
1da177e4
LT		 2430}
2431
b1b84fe0 2432static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2433{
b1b84fe0 2434 struct stlbrd *brdp = pci_get_drvdata(pdev);
1da177e4 2435
b1b84fe0 2436 free_irq(brdp->irq, brdp);
1da177e4 2437
b1b84fe0 2438 stl_cleanup_panels(brdp);
1da177e4 2439
b1b84fe0
JS		 2440 release_region(brdp->ioaddr1, brdp->iosize1);
2441 if (brdp->iosize2 > 0)
2442 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2443
b1b84fe0
JS		 2444 stl_brds[brdp->brdnr] = NULL;
2445 kfree(brdp);
1da177e4
LT		 2446}
2447
b1b84fe0
JS		 2448static struct pci_driver stl_pcidriver = {
2449 .name = "stallion",
2450 .id_table = stl_pcibrds,
2451 .probe = stl_pciprobe,
2452 .remove = __devexit_p(stl_pciremove)
2453};
1da177e4
LT		 2454
2455/*****************************************************************************/
2456
1da177e4
LT		 2457/*
2458 * Return the board stats structure to user app.
2459 */
2460
2461static int stl_getbrdstats(combrd_t __user *bp)
2462{
ca7ed0f2
JS		 2463 struct stlbrd *brdp;
2464 struct stlpanel *panelp;
1da177e4
LT		 2465 int i;
2466
2467 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2468 return -EFAULT;
2469 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2470 return -ENODEV;
1da177e4 2471 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2472 if (brdp == NULL)
c62429d9 2473 return -ENODEV;
1da177e4
LT		 2474
2475 memset(&stl_brdstats, 0, sizeof(combrd_t));
2476 stl_brdstats.brd = brdp->brdnr;
2477 stl_brdstats.type = brdp->brdtype;
2478 stl_brdstats.hwid = brdp->hwid;
2479 stl_brdstats.state = brdp->state;
2480 stl_brdstats.ioaddr = brdp->ioaddr1;
2481 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2482 stl_brdstats.irq = brdp->irq;
2483 stl_brdstats.nrpanels = brdp->nrpanels;
2484 stl_brdstats.nrports = brdp->nrports;
c62429d9 2485 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2486 panelp = brdp->panels[i];
2487 stl_brdstats.panels[i].panel = i;
2488 stl_brdstats.panels[i].hwid = panelp->hwid;
2489 stl_brdstats.panels[i].nrports = panelp->nrports;
2490 }
2491
2492 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2493}
2494
2495/*****************************************************************************/
2496
2497/*
2498 * Resolve the referenced port number into a port struct pointer.
2499 */
2500
ca7ed0f2 2501static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2502{
ca7ed0f2
JS		 2503 struct stlbrd *brdp;
2504 struct stlpanel *panelp;
1da177e4 2505
c62429d9
JS		 2506 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2507 return NULL;
1da177e4 2508 brdp = stl_brds[brdnr];
615e4a71 2509 if (brdp == NULL)
c62429d9
JS		 2510 return NULL;
2511 if (panelnr < 0 || panelnr >= brdp->nrpanels)
2512 return NULL;
1da177e4 2513 panelp = brdp->panels[panelnr];
615e4a71 2514 if (panelp == NULL)
c62429d9
JS		 2515 return NULL;
2516 if (portnr < 0 || portnr >= panelp->nrports)
2517 return NULL;
2518 return panelp->ports[portnr];
1da177e4
LT		 2519}
2520
2521/*****************************************************************************/
2522
2523/*
2524 * Return the port stats structure to user app. A NULL port struct
2525 * pointer passed in means that we need to find out from the app
2526 * what port to get stats for (used through board control device).
2527 */
2528
ca7ed0f2 2529static int stl_getportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4
LT		 2530{
2531 unsigned char *head, *tail;
2532 unsigned long flags;
2533
2534 if (!portp) {
2535 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2536 return -EFAULT;
2537 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2538 stl_comstats.port);
615e4a71 2539 if (portp == NULL)
c62429d9 2540 return -ENODEV;
1da177e4
LT		 2541 }
2542
2543 portp->stats.state = portp->istate;
2544 portp->stats.flags = portp->flags;
2545 portp->stats.hwid = portp->hwid;
2546
2547 portp->stats.ttystate = 0;
2548 portp->stats.cflags = 0;
2549 portp->stats.iflags = 0;
2550 portp->stats.oflags = 0;
2551 portp->stats.lflags = 0;
2552 portp->stats.rxbuffered = 0;
2553
b65b5b59 2554 spin_lock_irqsave(&stallion_lock, flags);
c62429d9 2555 if (portp->tty != NULL)
1da177e4
LT		 2556 if (portp->tty->driver_data == portp) {
2557 portp->stats.ttystate = portp->tty->flags;
33f0f88f
AC		 2558 /* No longer available as a statistic */
2559 portp->stats.rxbuffered = 1; /*portp->tty->flip.count; */
615e4a71 2560 if (portp->tty->termios != NULL) {
1da177e4
LT		 2561 portp->stats.cflags = portp->tty->termios->c_cflag;
2562 portp->stats.iflags = portp->tty->termios->c_iflag;
2563 portp->stats.oflags = portp->tty->termios->c_oflag;
2564 portp->stats.lflags = portp->tty->termios->c_lflag;
2565 }
2566 }
b65b5b59 2567 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2568
2569 head = portp->tx.head;
2570 tail = portp->tx.tail;
c62429d9
JS		 2571 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2572 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2573
2574 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2575
2576 return copy_to_user(cp, &portp->stats,
2577 sizeof(comstats_t)) ? -EFAULT : 0;
2578}
2579
2580/*****************************************************************************/
2581
2582/*
2583 * Clear the port stats structure. We also return it zeroed out...
2584 */
2585
ca7ed0f2 2586static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4
LT		 2587{
2588 if (!portp) {
2589 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2590 return -EFAULT;
2591 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2592 stl_comstats.port);
615e4a71 2593 if (portp == NULL)
c62429d9 2594 return -ENODEV;
1da177e4
LT		 2595 }
2596
2597 memset(&portp->stats, 0, sizeof(comstats_t));
2598 portp->stats.brd = portp->brdnr;
2599 portp->stats.panel = portp->panelnr;
2600 portp->stats.port = portp->portnr;
2601 return copy_to_user(cp, &portp->stats,
2602 sizeof(comstats_t)) ? -EFAULT : 0;
2603}
2604
2605/*****************************************************************************/
2606
2607/*
2608 * Return the entire driver ports structure to a user app.
2609 */
2610
ca7ed0f2 2611static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2612{
ca7ed0f2 2613 struct stlport *portp;
1da177e4 2614
ca7ed0f2 2615 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2616 return -EFAULT;
2617 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2618 stl_dummyport.portnr);
2619 if (!portp)
2620 return -ENODEV;
ca7ed0f2 2621 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2622}
2623
2624/*****************************************************************************/
2625
2626/*
2627 * Return the entire driver board structure to a user app.
2628 */
2629
ca7ed0f2 2630static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2631{
ca7ed0f2 2632 struct stlbrd *brdp;
1da177e4 2633
ca7ed0f2 2634 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4
LT		 2635 return -EFAULT;
2636 if ((stl_dummybrd.brdnr < 0) || (stl_dummybrd.brdnr >= STL_MAXBRDS))
2637 return -ENODEV;
2638 brdp = stl_brds[stl_dummybrd.brdnr];
2639 if (!brdp)
c62429d9 2640 return -ENODEV;
ca7ed0f2 2641 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2642}
2643
2644/*****************************************************************************/
2645
2646/*
2647 * The "staliomem" device is also required to do some special operations
2648 * on the board and/or ports. In this driver it is mostly used for stats
2649 * collection.
2650 */
2651
2652static int stl_memioctl(struct inode *ip, struct file *fp, unsigned int cmd, unsigned long arg)
2653{
2654 int brdnr, rc;
2655 void __user *argp = (void __user *)arg;
2656
a0564e14 2657 pr_debug("stl_memioctl(ip=%p,fp=%p,cmd=%x,arg=%lx)\n", ip, fp, cmd,arg);
1da177e4
LT		 2658
2659 brdnr = iminor(ip);
2660 if (brdnr >= STL_MAXBRDS)
c62429d9 2661 return -ENODEV;
1da177e4
LT		 2662 rc = 0;
2663
2664 switch (cmd) {
2665 case COM_GETPORTSTATS:
2666 rc = stl_getportstats(NULL, argp);
2667 break;
2668 case COM_CLRPORTSTATS:
2669 rc = stl_clrportstats(NULL, argp);
2670 break;
2671 case COM_GETBRDSTATS:
2672 rc = stl_getbrdstats(argp);
2673 break;
2674 case COM_READPORT:
2675 rc = stl_getportstruct(argp);
2676 break;
2677 case COM_READBOARD:
2678 rc = stl_getbrdstruct(argp);
2679 break;
2680 default:
2681 rc = -ENOIOCTLCMD;
2682 break;
2683 }
2684
c62429d9 2685 return rc;
1da177e4
LT		 2686}
2687
b68e31d0 2688static const struct tty_operations stl_ops = {
1da177e4
LT		 2689 .open = stl_open,
2690 .close = stl_close,
2691 .write = stl_write,
2692 .put_char = stl_putchar,
2693 .flush_chars = stl_flushchars,
2694 .write_room = stl_writeroom,
2695 .chars_in_buffer = stl_charsinbuffer,
2696 .ioctl = stl_ioctl,
2697 .set_termios = stl_settermios,
2698 .throttle = stl_throttle,
2699 .unthrottle = stl_unthrottle,
2700 .stop = stl_stop,
2701 .start = stl_start,
2702 .hangup = stl_hangup,
2703 .flush_buffer = stl_flushbuffer,
2704 .break_ctl = stl_breakctl,
2705 .wait_until_sent = stl_waituntilsent,
2706 .send_xchar = stl_sendxchar,
2707 .read_proc = stl_readproc,
2708 .tiocmget = stl_tiocmget,
2709 .tiocmset = stl_tiocmset,
2710};
2711
1da177e4
LT		 2712/*****************************************************************************/
2713/* CD1400 HARDWARE FUNCTIONS */
2714/*****************************************************************************/
2715
2716/*
2717 * These functions get/set/update the registers of the cd1400 UARTs.
2718 * Access to the cd1400 registers is via an address/data io port pair.
2719 * (Maybe should make this inline...)
2720 */
2721
ca7ed0f2 2722static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2723{
2724 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2725 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2726}
2727
ca7ed0f2 2728static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2729{
c62429d9 2730 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2731 outb(value, portp->ioaddr + EREG_DATA);
2732}
2733
ca7ed0f2 2734static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2735{
c62429d9 2736 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2737 if (inb(portp->ioaddr + EREG_DATA) != value) {
2738 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2739 return 1;
1da177e4 2740 }
014c2544 2741 return 0;
1da177e4
LT		 2742}
2743
2744/*****************************************************************************/
2745
2746/*
2747 * Inbitialize the UARTs in a panel. We don't care what sort of board
2748 * these ports are on - since the port io registers are almost
2749 * identical when dealing with ports.
2750 */
2751
ca7ed0f2 2752static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2753{
2754 unsigned int gfrcr;
2755 int chipmask, i, j;
2756 int nrchips, uartaddr, ioaddr;
b65b5b59 2757 unsigned long flags;
1da177e4 2758
a0564e14 2759 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2760
b65b5b59 2761 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2762 BRDENABLE(panelp->brdnr, panelp->pagenr);
2763
2764/*
2765 * Check that each chip is present and started up OK.
2766 */
2767 chipmask = 0;
2768 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2769 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2770 if (brdp->brdtype == BRD_ECHPCI) {
2771 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2772 ioaddr = panelp->iobase;
c62429d9 2773 } else
1da177e4 2774 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2775 uartaddr = (i & 0x01) ? 0x080 : 0;
2776 outb((GFRCR + uartaddr), ioaddr);
2777 outb(0, (ioaddr + EREG_DATA));
2778 outb((CCR + uartaddr), ioaddr);
2779 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2780 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2781 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2782 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2783 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2784 break;
c62429d9 2785
1da177e4
LT		 2786 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2787 printk("STALLION: cd1400 not responding, "
2788 "brd=%d panel=%d chip=%d\n",
2789 panelp->brdnr, panelp->panelnr, i);
2790 continue;
2791 }
2792 chipmask |= (0x1 << i);
2793 outb((PPR + uartaddr), ioaddr);
2794 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2795 }
2796
2797 BRDDISABLE(panelp->brdnr);
b65b5b59 2798 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2799 return chipmask;
1da177e4
LT		 2800}
2801
2802/*****************************************************************************/
2803
2804/*
2805 * Initialize hardware specific port registers.
2806 */
2807
ca7ed0f2 2808static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2809{
b65b5b59 2810 unsigned long flags;
a0564e14
JS		 2811 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2812 panelp, portp);
1da177e4 2813
615e4a71
JS		 2814 if ((brdp == NULL) || (panelp == NULL) ||
2815 (portp == NULL))
1da177e4
LT		 2816 return;
2817
b65b5b59 2818 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2819 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2820 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2821 portp->uartaddr = (portp->portnr & 0x04) << 5;
2822 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2823
2824 BRDENABLE(portp->brdnr, portp->pagenr);
2825 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2826 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2827 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2828 BRDDISABLE(portp->brdnr);
b65b5b59 2829 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2830}
2831
2832/*****************************************************************************/
2833
2834/*
2835 * Wait for the command register to be ready. We will poll this,
2836 * since it won't usually take too long to be ready.
2837 */
2838
ca7ed0f2 2839static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2840{
2841 int i;
2842
c62429d9
JS		 2843 for (i = 0; i < CCR_MAXWAIT; i++)
2844 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2845 return;
1da177e4
LT		 2846
2847 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2848 portp->portnr, portp->panelnr, portp->brdnr);
2849}
2850
2851/*****************************************************************************/
2852
2853/*
2854 * Set up the cd1400 registers for a port based on the termios port
2855 * settings.
2856 */
2857
606d099c 2858static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2859{
ca7ed0f2 2860 struct stlbrd *brdp;
1da177e4
LT		 2861 unsigned long flags;
2862 unsigned int clkdiv, baudrate;
2863 unsigned char cor1, cor2, cor3;
2864 unsigned char cor4, cor5, ccr;
2865 unsigned char srer, sreron, sreroff;
2866 unsigned char mcor1, mcor2, rtpr;
2867 unsigned char clk, div;
2868
2869 cor1 = 0;
2870 cor2 = 0;
2871 cor3 = 0;
2872 cor4 = 0;
2873 cor5 = 0;
2874 ccr = 0;
2875 rtpr = 0;
2876 clk = 0;
2877 div = 0;
2878 mcor1 = 0;
2879 mcor2 = 0;
2880 sreron = 0;
2881 sreroff = 0;
2882
2883 brdp = stl_brds[portp->brdnr];
615e4a71 2884 if (brdp == NULL)
1da177e4
LT		 2885 return;
2886
2887/*
2888 * Set up the RX char ignore mask with those RX error types we
2889 * can ignore. We can get the cd1400 to help us out a little here,
2890 * it will ignore parity errors and breaks for us.
2891 */
2892 portp->rxignoremsk = 0;
2893 if (tiosp->c_iflag & IGNPAR) {
2894 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2895 cor1 |= COR1_PARIGNORE;
2896 }
2897 if (tiosp->c_iflag & IGNBRK) {
2898 portp->rxignoremsk |= ST_BREAK;
2899 cor4 |= COR4_IGNBRK;
2900 }
2901
2902 portp->rxmarkmsk = ST_OVERRUN;
2903 if (tiosp->c_iflag & (INPCK | PARMRK))
2904 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2905 if (tiosp->c_iflag & BRKINT)
2906 portp->rxmarkmsk |= ST_BREAK;
2907
2908/*
2909 * Go through the char size, parity and stop bits and set all the
2910 * option register appropriately.
2911 */
2912 switch (tiosp->c_cflag & CSIZE) {
2913 case CS5:
2914 cor1 |= COR1_CHL5;
2915 break;
2916 case CS6:
2917 cor1 |= COR1_CHL6;
2918 break;
2919 case CS7:
2920 cor1 |= COR1_CHL7;
2921 break;
2922 default:
2923 cor1 |= COR1_CHL8;
2924 break;
2925 }
2926
2927 if (tiosp->c_cflag & CSTOPB)
2928 cor1 |= COR1_STOP2;
2929 else
2930 cor1 |= COR1_STOP1;
2931
2932 if (tiosp->c_cflag & PARENB) {
2933 if (tiosp->c_cflag & PARODD)
2934 cor1 |= (COR1_PARENB | COR1_PARODD);
2935 else
2936 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2937 } else {
2938 cor1 |= COR1_PARNONE;
2939 }
2940
2941/*
2942 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2943 * space for hardware flow control and the like. This should be set to
2944 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2945 * really be based on VTIME.
2946 */
2947 cor3 |= FIFO_RXTHRESHOLD;
2948 rtpr = 2;
2949
2950/*
2951 * Calculate the baud rate timers. For now we will just assume that
2952 * the input and output baud are the same. Could have used a baud
2953 * table here, but this way we can generate virtually any baud rate
2954 * we like!
2955 */
2956 baudrate = tiosp->c_cflag & CBAUD;
2957 if (baudrate & CBAUDEX) {
2958 baudrate &= ~CBAUDEX;
2959 if ((baudrate < 1) || (baudrate > 4))
2960 tiosp->c_cflag &= ~CBAUDEX;
2961 else
2962 baudrate += 15;
2963 }
2964 baudrate = stl_baudrates[baudrate];
2965 if ((tiosp->c_cflag & CBAUD) == B38400) {
2966 if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
2967 baudrate = 57600;
2968 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
2969 baudrate = 115200;
2970 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
2971 baudrate = 230400;
2972 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
2973 baudrate = 460800;
2974 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
2975 baudrate = (portp->baud_base / portp->custom_divisor);
2976 }
2977 if (baudrate > STL_CD1400MAXBAUD)
2978 baudrate = STL_CD1400MAXBAUD;
2979
2980 if (baudrate > 0) {
c62429d9
JS		 2981 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2982 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2983 if (clkdiv < 0x100)
2984 break;
2985 }
2986 div = (unsigned char) clkdiv;
2987 }
2988
2989/*
2990 * Check what form of modem signaling is required and set it up.
2991 */
2992 if ((tiosp->c_cflag & CLOCAL) == 0) {
2993 mcor1 |= MCOR1_DCD;
2994 mcor2 |= MCOR2_DCD;
2995 sreron |= SRER_MODEM;
2996 portp->flags |= ASYNC_CHECK_CD;
c62429d9 2997 } else
1da177e4 2998 portp->flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 2999
3000/*
3001 * Setup cd1400 enhanced modes if we can. In particular we want to
3002 * handle as much of the flow control as possible automatically. As
3003 * well as saving a few CPU cycles it will also greatly improve flow
3004 * control reliability.
3005 */
3006 if (tiosp->c_iflag & IXON) {
3007 cor2 |= COR2_TXIBE;
3008 cor3 |= COR3_SCD12;
3009 if (tiosp->c_iflag & IXANY)
3010 cor2 |= COR2_IXM;
3011 }
3012
3013 if (tiosp->c_cflag & CRTSCTS) {
3014 cor2 |= COR2_CTSAE;
3015 mcor1 |= FIFO_RTSTHRESHOLD;
3016 }
3017
3018/*
3019 * All cd1400 register values calculated so go through and set
3020 * them all up.
3021 */
3022
a0564e14 3023 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3024 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 3025 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 3026 cor1, cor2, cor3, cor4, cor5);
a0564e14 3027 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 3028 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 3029 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
3030 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3031 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3032 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3033
b65b5b59 3034 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3035 BRDENABLE(portp->brdnr, portp->pagenr);
3036 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3037 srer = stl_cd1400getreg(portp, SRER);
3038 stl_cd1400setreg(portp, SRER, 0);
3039 if (stl_cd1400updatereg(portp, COR1, cor1))
3040 ccr = 1;
3041 if (stl_cd1400updatereg(portp, COR2, cor2))
3042 ccr = 1;
3043 if (stl_cd1400updatereg(portp, COR3, cor3))
3044 ccr = 1;
3045 if (ccr) {
3046 stl_cd1400ccrwait(portp);
3047 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
3048 }
3049 stl_cd1400setreg(portp, COR4, cor4);
3050 stl_cd1400setreg(portp, COR5, cor5);
3051 stl_cd1400setreg(portp, MCOR1, mcor1);
3052 stl_cd1400setreg(portp, MCOR2, mcor2);
3053 if (baudrate > 0) {
3054 stl_cd1400setreg(portp, TCOR, clk);
3055 stl_cd1400setreg(portp, TBPR, div);
3056 stl_cd1400setreg(portp, RCOR, clk);
3057 stl_cd1400setreg(portp, RBPR, div);
3058 }
3059 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
3060 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
3061 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
3062 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
3063 stl_cd1400setreg(portp, RTPR, rtpr);
3064 mcor1 = stl_cd1400getreg(portp, MSVR1);
3065 if (mcor1 & MSVR1_DCD)
3066 portp->sigs |= TIOCM_CD;
3067 else
3068 portp->sigs &= ~TIOCM_CD;
3069 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
3070 BRDDISABLE(portp->brdnr);
b65b5b59 3071 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3072}
3073
3074/*****************************************************************************/
3075
3076/*
3077 * Set the state of the DTR and RTS signals.
3078 */
3079
ca7ed0f2 3080static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3081{
3082 unsigned char msvr1, msvr2;
3083 unsigned long flags;
3084
a0564e14
JS		 3085 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
3086 portp, dtr, rts);
1da177e4
LT		 3087
3088 msvr1 = 0;
3089 msvr2 = 0;
3090 if (dtr > 0)
3091 msvr1 = MSVR1_DTR;
3092 if (rts > 0)
3093 msvr2 = MSVR2_RTS;
3094
b65b5b59 3095 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3096 BRDENABLE(portp->brdnr, portp->pagenr);
3097 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3098 if (rts >= 0)
3099 stl_cd1400setreg(portp, MSVR2, msvr2);
3100 if (dtr >= 0)
3101 stl_cd1400setreg(portp, MSVR1, msvr1);
3102 BRDDISABLE(portp->brdnr);
b65b5b59 3103 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3104}
3105
3106/*****************************************************************************/
3107
3108/*
3109 * Return the state of the signals.
3110 */
3111
ca7ed0f2 3112static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 3113{
3114 unsigned char msvr1, msvr2;
3115 unsigned long flags;
3116 int sigs;
3117
a0564e14 3118 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 3119
b65b5b59 3120 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3121 BRDENABLE(portp->brdnr, portp->pagenr);
3122 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3123 msvr1 = stl_cd1400getreg(portp, MSVR1);
3124 msvr2 = stl_cd1400getreg(portp, MSVR2);
3125 BRDDISABLE(portp->brdnr);
b65b5b59 3126 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3127
3128 sigs = 0;
3129 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
3130 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
3131 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
3132 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
3133#if 0
3134 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
3135 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
3136#else
3137 sigs |= TIOCM_DSR;
3138#endif
014c2544 3139 return sigs;
1da177e4
LT		 3140}
3141
3142/*****************************************************************************/
3143
3144/*
3145 * Enable/Disable the Transmitter and/or Receiver.
3146 */
3147
ca7ed0f2 3148static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3149{
3150 unsigned char ccr;
3151 unsigned long flags;
3152
a0564e14
JS		 3153 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
3154
1da177e4
LT		 3155 ccr = 0;
3156
3157 if (tx == 0)
3158 ccr |= CCR_TXDISABLE;
3159 else if (tx > 0)
3160 ccr |= CCR_TXENABLE;
3161 if (rx == 0)
3162 ccr |= CCR_RXDISABLE;
3163 else if (rx > 0)
3164 ccr |= CCR_RXENABLE;
3165
b65b5b59 3166 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3167 BRDENABLE(portp->brdnr, portp->pagenr);
3168 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3169 stl_cd1400ccrwait(portp);
3170 stl_cd1400setreg(portp, CCR, ccr);
3171 stl_cd1400ccrwait(portp);
3172 BRDDISABLE(portp->brdnr);
b65b5b59 3173 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3174}
3175
3176/*****************************************************************************/
3177
3178/*
3179 * Start/stop the Transmitter and/or Receiver.
3180 */
3181
ca7ed0f2 3182static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3183{
3184 unsigned char sreron, sreroff;
3185 unsigned long flags;
3186
a0564e14 3187 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3188
3189 sreron = 0;
3190 sreroff = 0;
3191 if (tx == 0)
3192 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3193 else if (tx == 1)
3194 sreron |= SRER_TXDATA;
3195 else if (tx >= 2)
3196 sreron |= SRER_TXEMPTY;
3197 if (rx == 0)
3198 sreroff |= SRER_RXDATA;
3199 else if (rx > 0)
3200 sreron |= SRER_RXDATA;
3201
b65b5b59 3202 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3203 BRDENABLE(portp->brdnr, portp->pagenr);
3204 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3205 stl_cd1400setreg(portp, SRER,
3206 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3207 BRDDISABLE(portp->brdnr);
3208 if (tx > 0)
3209 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3210 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3211}
3212
3213/*****************************************************************************/
3214
3215/*
3216 * Disable all interrupts from this port.
3217 */
3218
ca7ed0f2 3219static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3220{
3221 unsigned long flags;
3222
a0564e14
JS		 3223 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3224
b65b5b59 3225 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3226 BRDENABLE(portp->brdnr, portp->pagenr);
3227 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3228 stl_cd1400setreg(portp, SRER, 0);
3229 BRDDISABLE(portp->brdnr);
b65b5b59 3230 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3231}
3232
3233/*****************************************************************************/
3234
ca7ed0f2 3235static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3236{
3237 unsigned long flags;
3238
a0564e14 3239 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3240
b65b5b59 3241 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3242 BRDENABLE(portp->brdnr, portp->pagenr);
3243 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3244 stl_cd1400setreg(portp, SRER,
3245 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3246 SRER_TXEMPTY));
3247 BRDDISABLE(portp->brdnr);
3248 portp->brklen = len;
3249 if (len == 1)
3250 portp->stats.txbreaks++;
b65b5b59 3251 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3252}
3253
3254/*****************************************************************************/
3255
3256/*
3257 * Take flow control actions...
3258 */
3259
ca7ed0f2 3260static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3261{
3262 struct tty_struct *tty;
3263 unsigned long flags;
3264
a0564e14 3265 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3266
615e4a71 3267 if (portp == NULL)
1da177e4
LT		 3268 return;
3269 tty = portp->tty;
615e4a71 3270 if (tty == NULL)
1da177e4
LT		 3271 return;
3272
b65b5b59 3273 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3274 BRDENABLE(portp->brdnr, portp->pagenr);
3275 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3276
3277 if (state) {
3278 if (tty->termios->c_iflag & IXOFF) {
3279 stl_cd1400ccrwait(portp);
3280 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3281 portp->stats.rxxon++;
3282 stl_cd1400ccrwait(portp);
3283 }
3284/*
3285 * Question: should we return RTS to what it was before? It may
3286 * have been set by an ioctl... Suppose not, since if you have
3287 * hardware flow control set then it is pretty silly to go and
3288 * set the RTS line by hand.
3289 */
3290 if (tty->termios->c_cflag & CRTSCTS) {
3291 stl_cd1400setreg(portp, MCOR1,
3292 (stl_cd1400getreg(portp, MCOR1) |
3293 FIFO_RTSTHRESHOLD));
3294 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3295 portp->stats.rxrtson++;
3296 }
3297 } else {
3298 if (tty->termios->c_iflag & IXOFF) {
3299 stl_cd1400ccrwait(portp);
3300 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3301 portp->stats.rxxoff++;
3302 stl_cd1400ccrwait(portp);
3303 }
3304 if (tty->termios->c_cflag & CRTSCTS) {
3305 stl_cd1400setreg(portp, MCOR1,
3306 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3307 stl_cd1400setreg(portp, MSVR2, 0);
3308 portp->stats.rxrtsoff++;
3309 }
3310 }
3311
3312 BRDDISABLE(portp->brdnr);
b65b5b59 3313 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3314}
3315
3316/*****************************************************************************/
3317
3318/*
3319 * Send a flow control character...
3320 */
3321
ca7ed0f2 3322static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3323{
3324 struct tty_struct *tty;
3325 unsigned long flags;
3326
a0564e14 3327 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3328
615e4a71 3329 if (portp == NULL)
1da177e4
LT		 3330 return;
3331 tty = portp->tty;
615e4a71 3332 if (tty == NULL)
1da177e4
LT		 3333 return;
3334
b65b5b59 3335 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3336 BRDENABLE(portp->brdnr, portp->pagenr);
3337 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3338 if (state) {
3339 stl_cd1400ccrwait(portp);
3340 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3341 portp->stats.rxxon++;
3342 stl_cd1400ccrwait(portp);
3343 } else {
3344 stl_cd1400ccrwait(portp);
3345 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3346 portp->stats.rxxoff++;
3347 stl_cd1400ccrwait(portp);
3348 }
3349 BRDDISABLE(portp->brdnr);
b65b5b59 3350 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3351}
3352
3353/*****************************************************************************/
3354
ca7ed0f2 3355static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3356{
3357 unsigned long flags;
3358
a0564e14 3359 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3360
615e4a71 3361 if (portp == NULL)
1da177e4
LT		 3362 return;
3363
b65b5b59 3364 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3365 BRDENABLE(portp->brdnr, portp->pagenr);
3366 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3367 stl_cd1400ccrwait(portp);
3368 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3369 stl_cd1400ccrwait(portp);
3370 portp->tx.tail = portp->tx.head;
3371 BRDDISABLE(portp->brdnr);
b65b5b59 3372 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3373}
3374
3375/*****************************************************************************/
3376
3377/*
3378 * Return the current state of data flow on this port. This is only
3379 * really interresting when determining if data has fully completed
3380 * transmission or not... This is easy for the cd1400, it accurately
3381 * maintains the busy port flag.
3382 */
3383
ca7ed0f2 3384static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3385{
a0564e14 3386 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3387
615e4a71 3388 if (portp == NULL)
014c2544 3389 return 0;
1da177e4 3390
014c2544 3391 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3392}
3393
3394/*****************************************************************************/
3395
3396/*
3397 * Interrupt service routine for cd1400 EasyIO boards.
3398 */
3399
ca7ed0f2 3400static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3401{
3402 unsigned char svrtype;
3403
a0564e14 3404 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3405
b65b5b59 3406 spin_lock(&brd_lock);
1da177e4
LT		 3407 outb(SVRR, iobase);
3408 svrtype = inb(iobase + EREG_DATA);
3409 if (panelp->nrports > 4) {
3410 outb((SVRR + 0x80), iobase);
3411 svrtype |= inb(iobase + EREG_DATA);
3412 }
3413
3414 if (svrtype & SVRR_RX)
3415 stl_cd1400rxisr(panelp, iobase);
3416 else if (svrtype & SVRR_TX)
3417 stl_cd1400txisr(panelp, iobase);
3418 else if (svrtype & SVRR_MDM)
3419 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3420
3421 spin_unlock(&brd_lock);
1da177e4
LT		 3422}
3423
3424/*****************************************************************************/
3425
3426/*
3427 * Interrupt service routine for cd1400 panels.
3428 */
3429
ca7ed0f2 3430static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3431{
3432 unsigned char svrtype;
3433
a0564e14 3434 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3435
3436 outb(SVRR, iobase);
3437 svrtype = inb(iobase + EREG_DATA);
3438 outb((SVRR + 0x80), iobase);
3439 svrtype |= inb(iobase + EREG_DATA);
3440 if (svrtype & SVRR_RX)
3441 stl_cd1400rxisr(panelp, iobase);
3442 else if (svrtype & SVRR_TX)
3443 stl_cd1400txisr(panelp, iobase);
3444 else if (svrtype & SVRR_MDM)
3445 stl_cd1400mdmisr(panelp, iobase);
3446}
3447
3448
3449/*****************************************************************************/
3450
3451/*
3452 * Unfortunately we need to handle breaks in the TX data stream, since
3453 * this is the only way to generate them on the cd1400.
3454 */
3455
60be4810 3456static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3457{
3458 if (portp->brklen == 1) {
3459 outb((COR2 + portp->uartaddr), ioaddr);
3460 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3461 (ioaddr + EREG_DATA));
3462 outb((TDR + portp->uartaddr), ioaddr);
3463 outb(ETC_CMD, (ioaddr + EREG_DATA));
3464 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3465 outb((SRER + portp->uartaddr), ioaddr);
3466 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3467 (ioaddr + EREG_DATA));
014c2544 3468 return 1;
1da177e4
LT		 3469 } else if (portp->brklen > 1) {
3470 outb((TDR + portp->uartaddr), ioaddr);
3471 outb(ETC_CMD, (ioaddr + EREG_DATA));
3472 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3473 portp->brklen = -1;
014c2544 3474 return 1;
1da177e4
LT		 3475 } else {
3476 outb((COR2 + portp->uartaddr), ioaddr);
3477 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3478 (ioaddr + EREG_DATA));
3479 portp->brklen = 0;
3480 }
014c2544 3481 return 0;
1da177e4
LT		 3482}
3483
3484/*****************************************************************************/
3485
3486/*
3487 * Transmit interrupt handler. This has gotta be fast! Handling TX
3488 * chars is pretty simple, stuff as many as possible from the TX buffer
3489 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3490 * are embedded as commands in the data stream. Oh no, had to use a goto!
3491 * This could be optimized more, will do when I get time...
3492 * In practice it is possible that interrupts are enabled but that the
3493 * port has been hung up. Need to handle not having any TX buffer here,
3494 * this is done by using the side effect that head and tail will also
3495 * be NULL if the buffer has been freed.
3496 */
3497
ca7ed0f2 3498static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3499{
ca7ed0f2 3500 struct stlport *portp;
1da177e4
LT		 3501 int len, stlen;
3502 char *head, *tail;
3503 unsigned char ioack, srer;
3504
a0564e14 3505 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3506
3507 ioack = inb(ioaddr + EREG_TXACK);
3508 if (((ioack & panelp->ackmask) != 0) ||
3509 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3510 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3511 return;
3512 }
3513 portp = panelp->ports[(ioack >> 3)];
3514
3515/*
3516 * Unfortunately we need to handle breaks in the data stream, since
3517 * this is the only way to generate them on the cd1400. Do it now if
3518 * a break is to be sent.
3519 */
3520 if (portp->brklen != 0)
3521 if (stl_cd1400breakisr(portp, ioaddr))
3522 goto stl_txalldone;
3523
3524 head = portp->tx.head;
3525 tail = portp->tx.tail;
3526 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3527 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3528 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3529 set_bit(ASYI_TXLOW, &portp->istate);
3530 schedule_work(&portp->tqueue);
3531 }
3532
3533 if (len == 0) {
3534 outb((SRER + portp->uartaddr), ioaddr);
3535 srer = inb(ioaddr + EREG_DATA);
3536 if (srer & SRER_TXDATA) {
3537 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3538 } else {
3539 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3540 clear_bit(ASYI_TXBUSY, &portp->istate);
3541 }
3542 outb(srer, (ioaddr + EREG_DATA));
3543 } else {
843b568c 3544 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3545 portp->stats.txtotal += len;
843b568c 3546 stlen = min(len, ((portp->tx.buf + STL_TXBUFSIZE) - tail));
1da177e4
LT		 3547 outb((TDR + portp->uartaddr), ioaddr);
3548 outsb((ioaddr + EREG_DATA), tail, stlen);
3549 len -= stlen;
3550 tail += stlen;
3551 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3552 tail = portp->tx.buf;
3553 if (len > 0) {
3554 outsb((ioaddr + EREG_DATA), tail, len);
3555 tail += len;
3556 }
3557 portp->tx.tail = tail;
3558 }
3559
3560stl_txalldone:
3561 outb((EOSRR + portp->uartaddr), ioaddr);
3562 outb(0, (ioaddr + EREG_DATA));
3563}
3564
3565/*****************************************************************************/
3566
3567/*
3568 * Receive character interrupt handler. Determine if we have good chars
3569 * or bad chars and then process appropriately. Good chars are easy
3570 * just shove the lot into the RX buffer and set all status byte to 0.
3571 * If a bad RX char then process as required. This routine needs to be
3572 * fast! In practice it is possible that we get an interrupt on a port
3573 * that is closed. This can happen on hangups - since they completely
3574 * shutdown a port not in user context. Need to handle this case.
3575 */
3576
ca7ed0f2 3577static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3578{
ca7ed0f2 3579 struct stlport *portp;
1da177e4
LT		 3580 struct tty_struct *tty;
3581 unsigned int ioack, len, buflen;
3582 unsigned char status;
3583 char ch;
3584
a0564e14 3585 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3586
3587 ioack = inb(ioaddr + EREG_RXACK);
3588 if ((ioack & panelp->ackmask) != 0) {
3589 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3590 return;
3591 }
3592 portp = panelp->ports[(ioack >> 3)];
3593 tty = portp->tty;
3594
3595 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3596 outb((RDCR + portp->uartaddr), ioaddr);
3597 len = inb(ioaddr + EREG_DATA);
33f0f88f 3598 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
843b568c 3599 len = min(len, sizeof(stl_unwanted));
1da177e4
LT		 3600 outb((RDSR + portp->uartaddr), ioaddr);
3601 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3602 portp->stats.rxlost += len;
3603 portp->stats.rxtotal += len;
3604 } else {
843b568c 3605 len = min(len, buflen);
1da177e4 3606 if (len > 0) {
33f0f88f 3607 unsigned char *ptr;
1da177e4 3608 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3609 tty_prepare_flip_string(tty, &ptr, len);
3610 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3611 tty_schedule_flip(tty);
3612 portp->stats.rxtotal += len;
3613 }
3614 }
3615 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3616 outb((RDSR + portp->uartaddr), ioaddr);
3617 status = inb(ioaddr + EREG_DATA);
3618 ch = inb(ioaddr + EREG_DATA);
3619 if (status & ST_PARITY)
3620 portp->stats.rxparity++;
3621 if (status & ST_FRAMING)
3622 portp->stats.rxframing++;
3623 if (status & ST_OVERRUN)
3624 portp->stats.rxoverrun++;
3625 if (status & ST_BREAK)
3626 portp->stats.rxbreaks++;
3627 if (status & ST_SCHARMASK) {
3628 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3629 portp->stats.txxon++;
3630 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3631 portp->stats.txxoff++;
3632 goto stl_rxalldone;
3633 }
33f0f88f 3634 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3635 if (portp->rxmarkmsk & status) {
3636 if (status & ST_BREAK) {
3637 status = TTY_BREAK;
3638 if (portp->flags & ASYNC_SAK) {
3639 do_SAK(tty);
3640 BRDENABLE(portp->brdnr, portp->pagenr);
3641 }
c62429d9 3642 } else if (status & ST_PARITY)
1da177e4 3643 status = TTY_PARITY;
c62429d9 3644 else if (status & ST_FRAMING)
1da177e4 3645 status = TTY_FRAME;
c62429d9 3646 else if(status & ST_OVERRUN)
1da177e4 3647 status = TTY_OVERRUN;
c62429d9 3648 else
1da177e4 3649 status = 0;
c62429d9 3650 } else
1da177e4 3651 status = 0;
33f0f88f
AC		 3652 tty_insert_flip_char(tty, ch, status);
3653 tty_schedule_flip(tty);
1da177e4
LT		 3654 }
3655 } else {
3656 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3657 return;
3658 }
3659
3660stl_rxalldone:
3661 outb((EOSRR + portp->uartaddr), ioaddr);
3662 outb(0, (ioaddr + EREG_DATA));
3663}
3664
3665/*****************************************************************************/
3666
3667/*
3668 * Modem interrupt handler. The is called when the modem signal line
3669 * (DCD) has changed state. Leave most of the work to the off-level
3670 * processing routine.
3671 */
3672
ca7ed0f2 3673static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3674{
ca7ed0f2 3675 struct stlport *portp;
1da177e4
LT		 3676 unsigned int ioack;
3677 unsigned char misr;
3678
a0564e14 3679 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3680
3681 ioack = inb(ioaddr + EREG_MDACK);
3682 if (((ioack & panelp->ackmask) != 0) ||
3683 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3684 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3685 return;
3686 }
3687 portp = panelp->ports[(ioack >> 3)];
3688
3689 outb((MISR + portp->uartaddr), ioaddr);
3690 misr = inb(ioaddr + EREG_DATA);
3691 if (misr & MISR_DCD) {
3692 set_bit(ASYI_DCDCHANGE, &portp->istate);
3693 schedule_work(&portp->tqueue);
3694 portp->stats.modem++;
3695 }
3696
3697 outb((EOSRR + portp->uartaddr), ioaddr);
3698 outb(0, (ioaddr + EREG_DATA));
3699}
3700
3701/*****************************************************************************/
3702/* SC26198 HARDWARE FUNCTIONS */
3703/*****************************************************************************/
3704
3705/*
3706 * These functions get/set/update the registers of the sc26198 UARTs.
3707 * Access to the sc26198 registers is via an address/data io port pair.
3708 * (Maybe should make this inline...)
3709 */
3710
ca7ed0f2 3711static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3712{
3713 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3714 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3715}
3716
ca7ed0f2 3717static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3718{
3719 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3720 outb(value, (portp->ioaddr + XP_DATA));
3721}
3722
ca7ed0f2 3723static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3724{
3725 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3726 if (inb(portp->ioaddr + XP_DATA) != value) {
3727 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3728 return 1;
1da177e4 3729 }
014c2544 3730 return 0;
1da177e4
LT		 3731}
3732
3733/*****************************************************************************/
3734
3735/*
3736 * Functions to get and set the sc26198 global registers.
3737 */
3738
ca7ed0f2 3739static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3740{
3741 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3742 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3743}
3744
3745#if 0
ca7ed0f2 3746static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3747{
3748 outb(regnr, (portp->ioaddr + XP_ADDR));
3749 outb(value, (portp->ioaddr + XP_DATA));
3750}
3751#endif
3752
3753/*****************************************************************************/
3754
3755/*
3756 * Inbitialize the UARTs in a panel. We don't care what sort of board
3757 * these ports are on - since the port io registers are almost
3758 * identical when dealing with ports.
3759 */
3760
ca7ed0f2 3761static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3762{
3763 int chipmask, i;
3764 int nrchips, ioaddr;
3765
a0564e14 3766 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3767
3768 BRDENABLE(panelp->brdnr, panelp->pagenr);
3769
3770/*
3771 * Check that each chip is present and started up OK.
3772 */
3773 chipmask = 0;
3774 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3775 if (brdp->brdtype == BRD_ECHPCI)
3776 outb(panelp->pagenr, brdp->ioctrl);
3777
c62429d9 3778 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3779 ioaddr = panelp->iobase + (i * 4);
3780 outb(SCCR, (ioaddr + XP_ADDR));
3781 outb(CR_RESETALL, (ioaddr + XP_DATA));
3782 outb(TSTR, (ioaddr + XP_ADDR));
3783 if (inb(ioaddr + XP_DATA) != 0) {
3784 printk("STALLION: sc26198 not responding, "
3785 "brd=%d panel=%d chip=%d\n",
3786 panelp->brdnr, panelp->panelnr, i);
3787 continue;
3788 }
3789 chipmask |= (0x1 << i);
3790 outb(GCCR, (ioaddr + XP_ADDR));
3791 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3792 outb(WDTRCR, (ioaddr + XP_ADDR));
3793 outb(0xff, (ioaddr + XP_DATA));
3794 }
3795
3796 BRDDISABLE(panelp->brdnr);
014c2544 3797 return chipmask;
1da177e4
LT		 3798}
3799
3800/*****************************************************************************/
3801
3802/*
3803 * Initialize hardware specific port registers.
3804 */
3805
ca7ed0f2 3806static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3807{
a0564e14
JS		 3808 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3809 panelp, portp);
1da177e4 3810
615e4a71
JS		 3811 if ((brdp == NULL) || (panelp == NULL) ||
3812 (portp == NULL))
1da177e4
LT		 3813 return;
3814
3815 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3816 portp->uartaddr = (portp->portnr & 0x07) << 4;
3817 portp->pagenr = panelp->pagenr;
3818 portp->hwid = 0x1;
3819
3820 BRDENABLE(portp->brdnr, portp->pagenr);
3821 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3822 BRDDISABLE(portp->brdnr);
3823}
3824
3825/*****************************************************************************/
3826
3827/*
3828 * Set up the sc26198 registers for a port based on the termios port
3829 * settings.
3830 */
3831
606d099c 3832static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3833{
ca7ed0f2 3834 struct stlbrd *brdp;
1da177e4
LT		 3835 unsigned long flags;
3836 unsigned int baudrate;
3837 unsigned char mr0, mr1, mr2, clk;
3838 unsigned char imron, imroff, iopr, ipr;
3839
3840 mr0 = 0;
3841 mr1 = 0;
3842 mr2 = 0;
3843 clk = 0;
3844 iopr = 0;
3845 imron = 0;
3846 imroff = 0;
3847
3848 brdp = stl_brds[portp->brdnr];
615e4a71 3849 if (brdp == NULL)
1da177e4
LT		 3850 return;
3851
3852/*
3853 * Set up the RX char ignore mask with those RX error types we
3854 * can ignore.
3855 */
3856 portp->rxignoremsk = 0;
3857 if (tiosp->c_iflag & IGNPAR)
3858 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3859 SR_RXOVERRUN);
3860 if (tiosp->c_iflag & IGNBRK)
3861 portp->rxignoremsk |= SR_RXBREAK;
3862
3863 portp->rxmarkmsk = SR_RXOVERRUN;
3864 if (tiosp->c_iflag & (INPCK | PARMRK))
3865 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3866 if (tiosp->c_iflag & BRKINT)
3867 portp->rxmarkmsk |= SR_RXBREAK;
3868
3869/*
3870 * Go through the char size, parity and stop bits and set all the
3871 * option register appropriately.
3872 */
3873 switch (tiosp->c_cflag & CSIZE) {
3874 case CS5:
3875 mr1 |= MR1_CS5;
3876 break;
3877 case CS6:
3878 mr1 |= MR1_CS6;
3879 break;
3880 case CS7:
3881 mr1 |= MR1_CS7;
3882 break;
3883 default:
3884 mr1 |= MR1_CS8;
3885 break;
3886 }
3887
3888 if (tiosp->c_cflag & CSTOPB)
3889 mr2 |= MR2_STOP2;
3890 else
3891 mr2 |= MR2_STOP1;
3892
3893 if (tiosp->c_cflag & PARENB) {
3894 if (tiosp->c_cflag & PARODD)
3895 mr1 |= (MR1_PARENB | MR1_PARODD);
3896 else
3897 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3898 } else
1da177e4 3899 mr1 |= MR1_PARNONE;
1da177e4
LT		 3900
3901 mr1 |= MR1_ERRBLOCK;
3902
3903/*
3904 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3905 * space for hardware flow control and the like. This should be set to
3906 * VMIN.
3907 */
3908 mr2 |= MR2_RXFIFOHALF;
3909
3910/*
3911 * Calculate the baud rate timers. For now we will just assume that
3912 * the input and output baud are the same. The sc26198 has a fixed
3913 * baud rate table, so only discrete baud rates possible.
3914 */
3915 baudrate = tiosp->c_cflag & CBAUD;
3916 if (baudrate & CBAUDEX) {
3917 baudrate &= ~CBAUDEX;
3918 if ((baudrate < 1) || (baudrate > 4))
3919 tiosp->c_cflag &= ~CBAUDEX;
3920 else
3921 baudrate += 15;
3922 }
3923 baudrate = stl_baudrates[baudrate];
3924 if ((tiosp->c_cflag & CBAUD) == B38400) {
3925 if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
3926 baudrate = 57600;
3927 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
3928 baudrate = 115200;
3929 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
3930 baudrate = 230400;
3931 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
3932 baudrate = 460800;
3933 else if ((portp->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
3934 baudrate = (portp->baud_base / portp->custom_divisor);
3935 }
3936 if (baudrate > STL_SC26198MAXBAUD)
3937 baudrate = STL_SC26198MAXBAUD;
3938
c62429d9
JS		 3939 if (baudrate > 0)
3940 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3941 if (baudrate <= sc26198_baudtable[clk])
3942 break;
1da177e4
LT		 3943
3944/*
3945 * Check what form of modem signaling is required and set it up.
3946 */
3947 if (tiosp->c_cflag & CLOCAL) {
3948 portp->flags &= ~ASYNC_CHECK_CD;
3949 } else {
3950 iopr |= IOPR_DCDCOS;
3951 imron |= IR_IOPORT;
3952 portp->flags |= ASYNC_CHECK_CD;
3953 }
3954
3955/*
3956 * Setup sc26198 enhanced modes if we can. In particular we want to
3957 * handle as much of the flow control as possible automatically. As
3958 * well as saving a few CPU cycles it will also greatly improve flow
3959 * control reliability.
3960 */
3961 if (tiosp->c_iflag & IXON) {
3962 mr0 |= MR0_SWFTX | MR0_SWFT;
3963 imron |= IR_XONXOFF;
c62429d9 3964 } else
1da177e4 3965 imroff |= IR_XONXOFF;
c62429d9 3966
1da177e4
LT		 3967 if (tiosp->c_iflag & IXOFF)
3968 mr0 |= MR0_SWFRX;
3969
3970 if (tiosp->c_cflag & CRTSCTS) {
3971 mr2 |= MR2_AUTOCTS;
3972 mr1 |= MR1_AUTORTS;
3973 }
3974
3975/*
3976 * All sc26198 register values calculated so go through and set
3977 * them all up.
3978 */
3979
a0564e14 3980 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3981 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3982 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3983 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3984 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3985 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3986 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3987
b65b5b59 3988 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3989 BRDENABLE(portp->brdnr, portp->pagenr);
3990 stl_sc26198setreg(portp, IMR, 0);
3991 stl_sc26198updatereg(portp, MR0, mr0);
3992 stl_sc26198updatereg(portp, MR1, mr1);
3993 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3994 stl_sc26198updatereg(portp, MR2, mr2);
3995 stl_sc26198updatereg(portp, IOPIOR,
3996 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
3997
3998 if (baudrate > 0) {
3999 stl_sc26198setreg(portp, TXCSR, clk);
4000 stl_sc26198setreg(portp, RXCSR, clk);
4001 }
4002
4003 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
4004 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
4005
4006 ipr = stl_sc26198getreg(portp, IPR);
4007 if (ipr & IPR_DCD)
4008 portp->sigs &= ~TIOCM_CD;
4009 else
4010 portp->sigs |= TIOCM_CD;
4011
4012 portp->imr = (portp->imr & ~imroff) | imron;
4013 stl_sc26198setreg(portp, IMR, portp->imr);
4014 BRDDISABLE(portp->brdnr);
b65b5b59 4015 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4016}
4017
4018/*****************************************************************************/
4019
4020/*
4021 * Set the state of the DTR and RTS signals.
4022 */
4023
ca7ed0f2 4024static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 4025{
4026 unsigned char iopioron, iopioroff;
4027 unsigned long flags;
4028
a0564e14
JS		 4029 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
4030 dtr, rts);
1da177e4
LT		 4031
4032 iopioron = 0;
4033 iopioroff = 0;
4034 if (dtr == 0)
4035 iopioroff |= IPR_DTR;
4036 else if (dtr > 0)
4037 iopioron |= IPR_DTR;
4038 if (rts == 0)
4039 iopioroff |= IPR_RTS;
4040 else if (rts > 0)
4041 iopioron |= IPR_RTS;
4042
b65b5b59 4043 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4044 BRDENABLE(portp->brdnr, portp->pagenr);
4045 stl_sc26198setreg(portp, IOPIOR,
4046 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
4047 BRDDISABLE(portp->brdnr);
b65b5b59 4048 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4049}
4050
4051/*****************************************************************************/
4052
4053/*
4054 * Return the state of the signals.
4055 */
4056
ca7ed0f2 4057static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 4058{
4059 unsigned char ipr;
4060 unsigned long flags;
4061 int sigs;
4062
a0564e14 4063 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 4064
b65b5b59 4065 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4066 BRDENABLE(portp->brdnr, portp->pagenr);
4067 ipr = stl_sc26198getreg(portp, IPR);
4068 BRDDISABLE(portp->brdnr);
b65b5b59 4069 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4070
4071 sigs = 0;
4072 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
4073 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
4074 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
4075 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
4076 sigs |= TIOCM_DSR;
014c2544 4077 return sigs;
1da177e4
LT		 4078}
4079
4080/*****************************************************************************/
4081
4082/*
4083 * Enable/Disable the Transmitter and/or Receiver.
4084 */
4085
ca7ed0f2 4086static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 4087{
4088 unsigned char ccr;
4089 unsigned long flags;
4090
a0564e14 4091 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 4092
4093 ccr = portp->crenable;
4094 if (tx == 0)
4095 ccr &= ~CR_TXENABLE;
4096 else if (tx > 0)
4097 ccr |= CR_TXENABLE;
4098 if (rx == 0)
4099 ccr &= ~CR_RXENABLE;
4100 else if (rx > 0)
4101 ccr |= CR_RXENABLE;
4102
b65b5b59 4103 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4104 BRDENABLE(portp->brdnr, portp->pagenr);
4105 stl_sc26198setreg(portp, SCCR, ccr);
4106 BRDDISABLE(portp->brdnr);
4107 portp->crenable = ccr;
b65b5b59 4108 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4109}
4110
4111/*****************************************************************************/
4112
4113/*
4114 * Start/stop the Transmitter and/or Receiver.
4115 */
4116
ca7ed0f2 4117static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 4118{
4119 unsigned char imr;
4120 unsigned long flags;
4121
a0564e14 4122 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 4123
4124 imr = portp->imr;
4125 if (tx == 0)
4126 imr &= ~IR_TXRDY;
4127 else if (tx == 1)
4128 imr |= IR_TXRDY;
4129 if (rx == 0)
4130 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
4131 else if (rx > 0)
4132 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
4133
b65b5b59 4134 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4135 BRDENABLE(portp->brdnr, portp->pagenr);
4136 stl_sc26198setreg(portp, IMR, imr);
4137 BRDDISABLE(portp->brdnr);
4138 portp->imr = imr;
4139 if (tx > 0)
4140 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 4141 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4142}
4143
4144/*****************************************************************************/
4145
4146/*
4147 * Disable all interrupts from this port.
4148 */
4149
ca7ed0f2 4150static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 4151{
4152 unsigned long flags;
4153
a0564e14 4154 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 4155
b65b5b59 4156 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4157 BRDENABLE(portp->brdnr, portp->pagenr);
4158 portp->imr = 0;
4159 stl_sc26198setreg(portp, IMR, 0);
4160 BRDDISABLE(portp->brdnr);
b65b5b59 4161 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4162}
4163
4164/*****************************************************************************/
4165
ca7ed0f2 4166static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 4167{
4168 unsigned long flags;
4169
a0564e14 4170 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 4171
b65b5b59 4172 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4173 BRDENABLE(portp->brdnr, portp->pagenr);
4174 if (len == 1) {
4175 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4176 portp->stats.txbreaks++;
c62429d9 4177 } else
1da177e4 4178 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 4179
1da177e4 4180 BRDDISABLE(portp->brdnr);
b65b5b59 4181 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4182}
4183
4184/*****************************************************************************/
4185
4186/*
4187 * Take flow control actions...
4188 */
4189
ca7ed0f2 4190static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 4191{
4192 struct tty_struct *tty;
4193 unsigned long flags;
4194 unsigned char mr0;
4195
a0564e14 4196 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4197
615e4a71 4198 if (portp == NULL)
1da177e4
LT		 4199 return;
4200 tty = portp->tty;
615e4a71 4201 if (tty == NULL)
1da177e4
LT		 4202 return;
4203
b65b5b59 4204 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4205 BRDENABLE(portp->brdnr, portp->pagenr);
4206
4207 if (state) {
4208 if (tty->termios->c_iflag & IXOFF) {
4209 mr0 = stl_sc26198getreg(portp, MR0);
4210 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4211 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4212 mr0 |= MR0_SWFRX;
4213 portp->stats.rxxon++;
4214 stl_sc26198wait(portp);
4215 stl_sc26198setreg(portp, MR0, mr0);
4216 }
4217/*
4218 * Question: should we return RTS to what it was before? It may
4219 * have been set by an ioctl... Suppose not, since if you have
4220 * hardware flow control set then it is pretty silly to go and
4221 * set the RTS line by hand.
4222 */
4223 if (tty->termios->c_cflag & CRTSCTS) {
4224 stl_sc26198setreg(portp, MR1,
4225 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4226 stl_sc26198setreg(portp, IOPIOR,
4227 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4228 portp->stats.rxrtson++;
4229 }
4230 } else {
4231 if (tty->termios->c_iflag & IXOFF) {
4232 mr0 = stl_sc26198getreg(portp, MR0);
4233 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4234 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4235 mr0 &= ~MR0_SWFRX;
4236 portp->stats.rxxoff++;
4237 stl_sc26198wait(portp);
4238 stl_sc26198setreg(portp, MR0, mr0);
4239 }
4240 if (tty->termios->c_cflag & CRTSCTS) {
4241 stl_sc26198setreg(portp, MR1,
4242 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4243 stl_sc26198setreg(portp, IOPIOR,
4244 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4245 portp->stats.rxrtsoff++;
4246 }
4247 }
4248
4249 BRDDISABLE(portp->brdnr);
b65b5b59 4250 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4251}
4252
4253/*****************************************************************************/
4254
4255/*
4256 * Send a flow control character.
4257 */
4258
ca7ed0f2 4259static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4260{
4261 struct tty_struct *tty;
4262 unsigned long flags;
4263 unsigned char mr0;
4264
a0564e14 4265 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4266
615e4a71 4267 if (portp == NULL)
1da177e4
LT		 4268 return;
4269 tty = portp->tty;
615e4a71 4270 if (tty == NULL)
1da177e4
LT		 4271 return;
4272
b65b5b59 4273 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4274 BRDENABLE(portp->brdnr, portp->pagenr);
4275 if (state) {
4276 mr0 = stl_sc26198getreg(portp, MR0);
4277 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4278 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4279 mr0 |= MR0_SWFRX;
4280 portp->stats.rxxon++;
4281 stl_sc26198wait(portp);
4282 stl_sc26198setreg(portp, MR0, mr0);
4283 } else {
4284 mr0 = stl_sc26198getreg(portp, MR0);
4285 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4286 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4287 mr0 &= ~MR0_SWFRX;
4288 portp->stats.rxxoff++;
4289 stl_sc26198wait(portp);
4290 stl_sc26198setreg(portp, MR0, mr0);
4291 }
4292 BRDDISABLE(portp->brdnr);
b65b5b59 4293 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4294}
4295
4296/*****************************************************************************/
4297
ca7ed0f2 4298static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4299{
4300 unsigned long flags;
4301
a0564e14 4302 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4303
615e4a71 4304 if (portp == NULL)
1da177e4
LT		 4305 return;
4306
b65b5b59 4307 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4308 BRDENABLE(portp->brdnr, portp->pagenr);
4309 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4310 stl_sc26198setreg(portp, SCCR, portp->crenable);
4311 BRDDISABLE(portp->brdnr);
4312 portp->tx.tail = portp->tx.head;
b65b5b59 4313 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4314}
4315
4316/*****************************************************************************/
4317
4318/*
4319 * Return the current state of data flow on this port. This is only
4320 * really interresting when determining if data has fully completed
4321 * transmission or not... The sc26198 interrupt scheme cannot
4322 * determine when all data has actually drained, so we need to
4323 * check the port statusy register to be sure.
4324 */
4325
ca7ed0f2 4326static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4327{
4328 unsigned long flags;
4329 unsigned char sr;
4330
a0564e14 4331 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4332
615e4a71 4333 if (portp == NULL)
014c2544 4334 return 0;
1da177e4 4335 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4336 return 1;
1da177e4 4337
b65b5b59 4338 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4339 BRDENABLE(portp->brdnr, portp->pagenr);
4340 sr = stl_sc26198getreg(portp, SR);
4341 BRDDISABLE(portp->brdnr);
b65b5b59 4342 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4343
014c2544 4344 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4345}
4346
4347/*****************************************************************************/
4348
4349/*
4350 * Delay for a small amount of time, to give the sc26198 a chance
4351 * to process a command...
4352 */
4353
ca7ed0f2 4354static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4355{
4356 int i;
4357
a0564e14 4358 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4359
615e4a71 4360 if (portp == NULL)
1da177e4
LT		 4361 return;
4362
c62429d9 4363 for (i = 0; i < 20; i++)
1da177e4
LT		 4364 stl_sc26198getglobreg(portp, TSTR);
4365}
4366
4367/*****************************************************************************/
4368
4369/*
4370 * If we are TX flow controlled and in IXANY mode then we may
4371 * need to unflow control here. We gotta do this because of the
4372 * automatic flow control modes of the sc26198.
4373 */
4374
60be4810 4375static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4376{
4377 unsigned char mr0;
4378
4379 mr0 = stl_sc26198getreg(portp, MR0);
4380 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4381 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4382 stl_sc26198wait(portp);
4383 stl_sc26198setreg(portp, MR0, mr0);
4384 clear_bit(ASYI_TXFLOWED, &portp->istate);
4385}
4386
4387/*****************************************************************************/
4388
4389/*
4390 * Interrupt service routine for sc26198 panels.
4391 */
4392
ca7ed0f2 4393static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4394{
ca7ed0f2 4395 struct stlport *portp;
1da177e4
LT		 4396 unsigned int iack;
4397
b65b5b59
AC		 4398 spin_lock(&brd_lock);
4399
1da177e4
LT		 4400/*
4401 * Work around bug in sc26198 chip... Cannot have A6 address
4402 * line of UART high, else iack will be returned as 0.
4403 */
4404 outb(0, (iobase + 1));
4405
4406 iack = inb(iobase + XP_IACK);
4407 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4408
4409 if (iack & IVR_RXDATA)
4410 stl_sc26198rxisr(portp, iack);
4411 else if (iack & IVR_TXDATA)
4412 stl_sc26198txisr(portp);
4413 else
4414 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4415
4416 spin_unlock(&brd_lock);
1da177e4
LT		 4417}
4418
4419/*****************************************************************************/
4420
4421/*
4422 * Transmit interrupt handler. This has gotta be fast! Handling TX
4423 * chars is pretty simple, stuff as many as possible from the TX buffer
4424 * into the sc26198 FIFO.
4425 * In practice it is possible that interrupts are enabled but that the
4426 * port has been hung up. Need to handle not having any TX buffer here,
4427 * this is done by using the side effect that head and tail will also
4428 * be NULL if the buffer has been freed.
4429 */
4430
ca7ed0f2 4431static void stl_sc26198txisr(struct stlport *portp)
1da177e4
LT		 4432{
4433 unsigned int ioaddr;
4434 unsigned char mr0;
4435 int len, stlen;
4436 char *head, *tail;
4437
a0564e14 4438 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4439
4440 ioaddr = portp->ioaddr;
4441 head = portp->tx.head;
4442 tail = portp->tx.tail;
4443 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4444 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4445 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4446 set_bit(ASYI_TXLOW, &portp->istate);
4447 schedule_work(&portp->tqueue);
4448 }
4449
4450 if (len == 0) {
4451 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4452 mr0 = inb(ioaddr + XP_DATA);
4453 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4454 portp->imr &= ~IR_TXRDY;
4455 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4456 outb(portp->imr, (ioaddr + XP_DATA));
4457 clear_bit(ASYI_TXBUSY, &portp->istate);
4458 } else {
4459 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4460 outb(mr0, (ioaddr + XP_DATA));
4461 }
4462 } else {
843b568c 4463 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4464 portp->stats.txtotal += len;
843b568c 4465 stlen = min(len, ((portp->tx.buf + STL_TXBUFSIZE) - tail));
1da177e4
LT		 4466 outb(GTXFIFO, (ioaddr + XP_ADDR));
4467 outsb((ioaddr + XP_DATA), tail, stlen);
4468 len -= stlen;
4469 tail += stlen;
4470 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4471 tail = portp->tx.buf;
4472 if (len > 0) {
4473 outsb((ioaddr + XP_DATA), tail, len);
4474 tail += len;
4475 }
4476 portp->tx.tail = tail;
4477 }
4478}
4479
4480/*****************************************************************************/
4481
4482/*
4483 * Receive character interrupt handler. Determine if we have good chars
4484 * or bad chars and then process appropriately. Good chars are easy
4485 * just shove the lot into the RX buffer and set all status byte to 0.
4486 * If a bad RX char then process as required. This routine needs to be
4487 * fast! In practice it is possible that we get an interrupt on a port
4488 * that is closed. This can happen on hangups - since they completely
4489 * shutdown a port not in user context. Need to handle this case.
4490 */
4491
ca7ed0f2 4492static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4493{
4494 struct tty_struct *tty;
4495 unsigned int len, buflen, ioaddr;
4496
a0564e14 4497 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4498
4499 tty = portp->tty;
4500 ioaddr = portp->ioaddr;
4501 outb(GIBCR, (ioaddr + XP_ADDR));
4502 len = inb(ioaddr + XP_DATA) + 1;
4503
4504 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4505 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
843b568c 4506 len = min(len, sizeof(stl_unwanted));
1da177e4
LT		 4507 outb(GRXFIFO, (ioaddr + XP_ADDR));
4508 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4509 portp->stats.rxlost += len;
4510 portp->stats.rxtotal += len;
4511 } else {
843b568c 4512 len = min(len, buflen);
1da177e4 4513 if (len > 0) {
33f0f88f 4514 unsigned char *ptr;
1da177e4 4515 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4516 tty_prepare_flip_string(tty, &ptr, len);
4517 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4518 tty_schedule_flip(tty);
4519 portp->stats.rxtotal += len;
4520 }
4521 }
4522 } else {
4523 stl_sc26198rxbadchars(portp);
4524 }
4525
4526/*
4527 * If we are TX flow controlled and in IXANY mode then we may need
4528 * to unflow control here. We gotta do this because of the automatic
4529 * flow control modes of the sc26198.
4530 */
4531 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4532 if ((tty != NULL) &&
4533 (tty->termios != NULL) &&
1da177e4
LT		 4534 (tty->termios->c_iflag & IXANY)) {
4535 stl_sc26198txunflow(portp, tty);
4536 }
4537 }
4538}
4539
4540/*****************************************************************************/
4541
4542/*
4543 * Process an RX bad character.
4544 */
4545
60be4810 4546static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4547{
4548 struct tty_struct *tty;
4549 unsigned int ioaddr;
4550
4551 tty = portp->tty;
4552 ioaddr = portp->ioaddr;
4553
4554 if (status & SR_RXPARITY)
4555 portp->stats.rxparity++;
4556 if (status & SR_RXFRAMING)
4557 portp->stats.rxframing++;
4558 if (status & SR_RXOVERRUN)
4559 portp->stats.rxoverrun++;
4560 if (status & SR_RXBREAK)
4561 portp->stats.rxbreaks++;
4562
615e4a71 4563 if ((tty != NULL) &&
1da177e4
LT		 4564 ((portp->rxignoremsk & status) == 0)) {
4565 if (portp->rxmarkmsk & status) {
4566 if (status & SR_RXBREAK) {
4567 status = TTY_BREAK;
4568 if (portp->flags & ASYNC_SAK) {
4569 do_SAK(tty);
4570 BRDENABLE(portp->brdnr, portp->pagenr);
4571 }
c62429d9 4572 } else if (status & SR_RXPARITY)
1da177e4 4573 status = TTY_PARITY;
c62429d9 4574 else if (status & SR_RXFRAMING)
1da177e4 4575 status = TTY_FRAME;
c62429d9 4576 else if(status & SR_RXOVERRUN)
1da177e4 4577 status = TTY_OVERRUN;
c62429d9 4578 else
1da177e4 4579 status = 0;
c62429d9 4580 } else
1da177e4 4581 status = 0;
1da177e4 4582
33f0f88f
AC		 4583 tty_insert_flip_char(tty, ch, status);
4584 tty_schedule_flip(tty);
1da177e4
LT		 4585
4586 if (status == 0)
4587 portp->stats.rxtotal++;
4588 }
4589}
4590
4591/*****************************************************************************/
4592
4593/*
4594 * Process all characters in the RX FIFO of the UART. Check all char
4595 * status bytes as well, and process as required. We need to check
4596 * all bytes in the FIFO, in case some more enter the FIFO while we
4597 * are here. To get the exact character error type we need to switch
4598 * into CHAR error mode (that is why we need to make sure we empty
4599 * the FIFO).
4600 */
4601
ca7ed0f2 4602static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4603{
4604 unsigned char status, mr1;
4605 char ch;
4606
4607/*
4608 * To get the precise error type for each character we must switch
4609 * back into CHAR error mode.
4610 */
4611 mr1 = stl_sc26198getreg(portp, MR1);
4612 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4613
4614 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4615 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4616 ch = stl_sc26198getreg(portp, RXFIFO);
4617 stl_sc26198rxbadch(portp, status, ch);
4618 }
4619
4620/*
4621 * To get correct interrupt class we must switch back into BLOCK
4622 * error mode.
4623 */
4624 stl_sc26198setreg(portp, MR1, mr1);
4625}
4626
4627/*****************************************************************************/
4628
4629/*
4630 * Other interrupt handler. This includes modem signals, flow
4631 * control actions, etc. Most stuff is left to off-level interrupt
4632 * processing time.
4633 */
4634
ca7ed0f2 4635static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4636{
4637 unsigned char cir, ipr, xisr;
4638
a0564e14 4639 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4640
4641 cir = stl_sc26198getglobreg(portp, CIR);
4642
4643 switch (cir & CIR_SUBTYPEMASK) {
4644 case CIR_SUBCOS:
4645 ipr = stl_sc26198getreg(portp, IPR);
4646 if (ipr & IPR_DCDCHANGE) {
4647 set_bit(ASYI_DCDCHANGE, &portp->istate);
4648 schedule_work(&portp->tqueue);
4649 portp->stats.modem++;
4650 }
4651 break;
4652 case CIR_SUBXONXOFF:
4653 xisr = stl_sc26198getreg(portp, XISR);
4654 if (xisr & XISR_RXXONGOT) {
4655 set_bit(ASYI_TXFLOWED, &portp->istate);
4656 portp->stats.txxoff++;
4657 }
4658 if (xisr & XISR_RXXOFFGOT) {
4659 clear_bit(ASYI_TXFLOWED, &portp->istate);
4660 portp->stats.txxon++;
4661 }
4662 break;
4663 case CIR_SUBBREAK:
4664 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4665 stl_sc26198rxbadchars(portp);
4666 break;
4667 default:
4668 break;
4669 }
4670}
4671
fc06b5cf
JS		 4672static void stl_free_isabrds(void)
4673{
4674 struct stlbrd *brdp;
4675 unsigned int i;
4676
4677 for (i = 0; i < stl_nrbrds; i++) {
4678 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4679 continue;
4680
4681 free_irq(brdp->irq, brdp);
4682
4683 stl_cleanup_panels(brdp);
4684
4685 release_region(brdp->ioaddr1, brdp->iosize1);
4686 if (brdp->iosize2 > 0)
4687 release_region(brdp->ioaddr2, brdp->iosize2);
4688
4689 kfree(brdp);
4690 stl_brds[i] = NULL;
4691 }
4692}
4693
23b85a15
JS		 4694/*
4695 * Loadable module initialization stuff.
4696 */
4697static int __init stallion_module_init(void)
4698{
843b568c
JS		 4699 struct stlbrd *brdp;
4700 struct stlconf conf;
fc06b5cf
JS		 4701 unsigned int i;
4702 int retval;
23b85a15
JS		 4703
4704 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4705
4706 spin_lock_init(&stallion_lock);
4707 spin_lock_init(&brd_lock);
4708
843b568c
JS		 4709/*
4710 * Find any dynamically supported boards. That is via module load
4711 * line options.
4712 */
4713 for (i = stl_nrbrds; i < stl_nargs; i++) {
4714 memset(&conf, 0, sizeof(conf));
4715 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4716 continue;
4717 if ((brdp = stl_allocbrd()) == NULL)
4718 continue;
4719 brdp->brdnr = i;
4720 brdp->brdtype = conf.brdtype;
4721 brdp->ioaddr1 = conf.ioaddr1;
4722 brdp->ioaddr2 = conf.ioaddr2;
4723 brdp->irq = conf.irq;
4724 brdp->irqtype = conf.irqtype;
4725 if (stl_brdinit(brdp))
4726 kfree(brdp);
79cfe7ab
JS		 4727 else {
4728 stl_brds[brdp->brdnr] = brdp;
843b568c 4729 stl_nrbrds = i + 1;
79cfe7ab 4730 }
843b568c 4731 }
23b85a15 4732
79cfe7ab 4733 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4734 retval = pci_register_driver(&stl_pcidriver);
fc06b5cf 4735 if (retval && stl_nrbrds == 0)
b1b84fe0
JS		 4736 goto err;
4737
23b85a15 4738 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
fc06b5cf
JS		 4739 if (!stl_serial) {
4740 retval = -ENOMEM;
4741 goto err_pcidr;
4742 }
23b85a15
JS		 4743
4744/*
4745 * Set up a character driver for per board stuff. This is mainly used
4746 * to do stats ioctls on the ports.
4747 */
4748 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4749 printk("STALLION: failed to register serial board device\n");
4750
4751 stallion_class = class_create(THIS_MODULE, "staliomem");
fc06b5cf
JS		 4752 if (IS_ERR(stallion_class)) {
4753 retval = PTR_ERR(stallion_class);
4754 goto err_reg;
4755 }
23b85a15
JS		 4756 for (i = 0; i < 4; i++)
4757 class_device_create(stallion_class, NULL,
4758 MKDEV(STL_SIOMEMMAJOR, i), NULL,
4759 "staliomem%d", i);
4760
4761 stl_serial->owner = THIS_MODULE;
4762 stl_serial->driver_name = stl_drvname;
4763 stl_serial->name = "ttyE";
4764 stl_serial->major = STL_SERIALMAJOR;
4765 stl_serial->minor_start = 0;
4766 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4767 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4768 stl_serial->init_termios = stl_deftermios;
4769 stl_serial->flags = TTY_DRIVER_REAL_RAW;
4770 tty_set_operations(stl_serial, &stl_ops);
4771
fc06b5cf
JS		 4772 retval = tty_register_driver(stl_serial);
4773 if (retval) {
23b85a15 4774 printk("STALLION: failed to register serial driver\n");
fc06b5cf 4775 goto err_clsdev;
23b85a15
JS		 4776 }
4777
4778 return 0;
fc06b5cf
JS		 4779err_clsdev:
4780 for (i = 0; i < 4; i++)
4781 class_device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
4782 class_destroy(stallion_class);
4783err_reg:
4784 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
4785 put_tty_driver(stl_serial);
4786err_pcidr:
4787 pci_unregister_driver(&stl_pcidriver);
4788 stl_free_isabrds();
b1b84fe0
JS		 4789err:
4790 return retval;
23b85a15
JS		 4791}
4792
4793static void __exit stallion_module_exit(void)
4794{
b1b84fe0 4795 int i;
23b85a15
JS		 4796
4797 pr_debug("cleanup_module()\n");
4798
4799 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4800 stl_drvversion);
4801
4802/*
4803 * Free up all allocated resources used by the ports. This includes
4804 * memory and interrupts. As part of this process we will also do
4805 * a hangup on every open port - to try to flush out any processes
4806 * hanging onto ports.
4807 */
fc06b5cf 4808 tty_unregister_driver(stl_serial);
23b85a15 4809 put_tty_driver(stl_serial);
fc06b5cf 4810
23b85a15
JS		 4811 for (i = 0; i < 4; i++)
4812 class_device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
4813 if ((i = unregister_chrdev(STL_SIOMEMMAJOR, "staliomem")))
4814 printk("STALLION: failed to un-register serial memory device, "
4815 "errno=%d\n", -i);
4816 class_destroy(stallion_class);
4817
b1b84fe0
JS		 4818 pci_unregister_driver(&stl_pcidriver);
4819
fc06b5cf 4820 stl_free_isabrds();
23b85a15
JS		 4821}
4822
4823module_init(stallion_module_init);
4824module_exit(stallion_module_exit);
4825
4826MODULE_AUTHOR("Greg Ungerer");
4827MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4828MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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