Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Copyright (C) 2004 IBM Corporation | |
3 | * | |
4 | * Authors: | |
5 | * Leendert van Doorn <leendert@watson.ibm.com> | |
6 | * Dave Safford <safford@watson.ibm.com> | |
7 | * Reiner Sailer <sailer@watson.ibm.com> | |
8 | * Kylene Hall <kjhall@us.ibm.com> | |
9 | * | |
8e81cc13 | 10 | * Maintained by: <tpmdd-devel@lists.sourceforge.net> |
1da177e4 LT |
11 | * |
12 | * Device driver for TCG/TCPA TPM (trusted platform module). | |
13 | * Specifications at www.trustedcomputinggroup.org | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License as | |
17 | * published by the Free Software Foundation, version 2 of the | |
18 | * License. | |
19 | * | |
20 | */ | |
21 | ||
22 | #include "tpm.h" | |
ad5ea3cc | 23 | #include "tpm_atmel.h" |
1da177e4 LT |
24 | |
25 | /* write status bits */ | |
3122a88a KH |
26 | enum tpm_atmel_write_status { |
27 | ATML_STATUS_ABORT = 0x01, | |
28 | ATML_STATUS_LASTBYTE = 0x04 | |
29 | }; | |
1da177e4 | 30 | /* read status bits */ |
3122a88a KH |
31 | enum tpm_atmel_read_status { |
32 | ATML_STATUS_BUSY = 0x01, | |
33 | ATML_STATUS_DATA_AVAIL = 0x02, | |
34 | ATML_STATUS_REWRITE = 0x04, | |
35 | ATML_STATUS_READY = 0x08 | |
36 | }; | |
1da177e4 | 37 | |
b888c87b | 38 | static int tpm_atml_recv(struct tpm_chip *chip, u8 *buf, size_t count) |
1da177e4 LT |
39 | { |
40 | u8 status, *hdr = buf; | |
41 | u32 size; | |
42 | int i; | |
43 | __be32 *native_size; | |
44 | ||
45 | /* start reading header */ | |
46 | if (count < 6) | |
47 | return -EIO; | |
48 | ||
49 | for (i = 0; i < 6; i++) { | |
90dda520 | 50 | status = ioread8(chip->vendor.iobase + 1); |
1da177e4 | 51 | if ((status & ATML_STATUS_DATA_AVAIL) == 0) { |
71ed848f | 52 | dev_err(chip->pdev, "error reading header\n"); |
1da177e4 LT |
53 | return -EIO; |
54 | } | |
90dda520 | 55 | *buf++ = ioread8(chip->vendor.iobase); |
1da177e4 LT |
56 | } |
57 | ||
58 | /* size of the data received */ | |
59 | native_size = (__force __be32 *) (hdr + 2); | |
60 | size = be32_to_cpu(*native_size); | |
61 | ||
62 | if (count < size) { | |
71ed848f | 63 | dev_err(chip->pdev, |
1da177e4 LT |
64 | "Recv size(%d) less than available space\n", size); |
65 | for (; i < size; i++) { /* clear the waiting data anyway */ | |
90dda520 | 66 | status = ioread8(chip->vendor.iobase + 1); |
1da177e4 | 67 | if ((status & ATML_STATUS_DATA_AVAIL) == 0) { |
71ed848f | 68 | dev_err(chip->pdev, "error reading data\n"); |
1da177e4 LT |
69 | return -EIO; |
70 | } | |
71 | } | |
72 | return -EIO; | |
73 | } | |
74 | ||
75 | /* read all the data available */ | |
76 | for (; i < size; i++) { | |
90dda520 | 77 | status = ioread8(chip->vendor.iobase + 1); |
1da177e4 | 78 | if ((status & ATML_STATUS_DATA_AVAIL) == 0) { |
71ed848f | 79 | dev_err(chip->pdev, "error reading data\n"); |
1da177e4 LT |
80 | return -EIO; |
81 | } | |
90dda520 | 82 | *buf++ = ioread8(chip->vendor.iobase); |
1da177e4 LT |
83 | } |
84 | ||
85 | /* make sure data available is gone */ | |
90dda520 | 86 | status = ioread8(chip->vendor.iobase + 1); |
90612b30 | 87 | |
1da177e4 | 88 | if (status & ATML_STATUS_DATA_AVAIL) { |
71ed848f | 89 | dev_err(chip->pdev, "data available is stuck\n"); |
1da177e4 LT |
90 | return -EIO; |
91 | } | |
92 | ||
93 | return size; | |
94 | } | |
95 | ||
b888c87b | 96 | static int tpm_atml_send(struct tpm_chip *chip, u8 *buf, size_t count) |
1da177e4 LT |
97 | { |
98 | int i; | |
99 | ||
71ed848f | 100 | dev_dbg(chip->pdev, "tpm_atml_send:\n"); |
1da177e4 | 101 | for (i = 0; i < count; i++) { |
71ed848f | 102 | dev_dbg(chip->pdev, "%d 0x%x(%d)\n", i, buf[i], buf[i]); |
90dda520 | 103 | iowrite8(buf[i], chip->vendor.iobase); |
1da177e4 LT |
104 | } |
105 | ||
106 | return count; | |
107 | } | |
108 | ||
109 | static void tpm_atml_cancel(struct tpm_chip *chip) | |
110 | { | |
90dda520 | 111 | iowrite8(ATML_STATUS_ABORT, chip->vendor.iobase + 1); |
1da177e4 LT |
112 | } |
113 | ||
b4ed3e3c KJH |
114 | static u8 tpm_atml_status(struct tpm_chip *chip) |
115 | { | |
90dda520 | 116 | return ioread8(chip->vendor.iobase + 1); |
b4ed3e3c KJH |
117 | } |
118 | ||
1f866057 SB |
119 | static bool tpm_atml_req_canceled(struct tpm_chip *chip, u8 status) |
120 | { | |
121 | return (status == ATML_STATUS_READY); | |
122 | } | |
123 | ||
01ad1fa7 | 124 | static const struct tpm_class_ops tpm_atmel = { |
1da177e4 LT |
125 | .recv = tpm_atml_recv, |
126 | .send = tpm_atml_send, | |
127 | .cancel = tpm_atml_cancel, | |
b4ed3e3c | 128 | .status = tpm_atml_status, |
1da177e4 LT |
129 | .req_complete_mask = ATML_STATUS_BUSY | ATML_STATUS_DATA_AVAIL, |
130 | .req_complete_val = ATML_STATUS_DATA_AVAIL, | |
1f866057 | 131 | .req_canceled = tpm_atml_req_canceled, |
1da177e4 LT |
132 | }; |
133 | ||
b888c87b | 134 | static struct platform_device *pdev; |
682e97ac | 135 | |
ad5ea3cc | 136 | static void atml_plat_remove(void) |
682e97ac | 137 | { |
ad5ea3cc KJH |
138 | struct tpm_chip *chip = dev_get_drvdata(&pdev->dev); |
139 | ||
b888c87b | 140 | if (chip) { |
afb5abc2 | 141 | tpm_chip_unregister(chip); |
90dda520 KJH |
142 | if (chip->vendor.have_region) |
143 | atmel_release_region(chip->vendor.base, | |
144 | chip->vendor.region_size); | |
145 | atmel_put_base_addr(chip->vendor.iobase); | |
ad5ea3cc | 146 | platform_device_unregister(pdev); |
682e97ac KJH |
147 | } |
148 | } | |
149 | ||
8324be05 | 150 | static SIMPLE_DEV_PM_OPS(tpm_atml_pm, tpm_pm_suspend, tpm_pm_resume); |
7a192ec3 | 151 | |
7a192ec3 ML |
152 | static struct platform_driver atml_drv = { |
153 | .driver = { | |
154 | .name = "tpm_atmel", | |
8324be05 | 155 | .pm = &tpm_atml_pm, |
7a192ec3 | 156 | }, |
682e97ac KJH |
157 | }; |
158 | ||
159 | static int __init init_atmel(void) | |
1da177e4 | 160 | { |
1da177e4 | 161 | int rc = 0; |
e0dd03ca KJH |
162 | void __iomem *iobase = NULL; |
163 | int have_region, region_size; | |
164 | unsigned long base; | |
165 | struct tpm_chip *chip; | |
1da177e4 | 166 | |
7a192ec3 | 167 | rc = platform_driver_register(&atml_drv); |
f33d9bd5 JG |
168 | if (rc) |
169 | return rc; | |
1da177e4 | 170 | |
e0dd03ca | 171 | if ((iobase = atmel_get_base_addr(&base, ®ion_size)) == NULL) { |
ad5ea3cc KJH |
172 | rc = -ENODEV; |
173 | goto err_unreg_drv; | |
682e97ac | 174 | } |
1da177e4 | 175 | |
e0dd03ca | 176 | have_region = |
90612b30 | 177 | (atmel_request_region |
1e6e0974 | 178 | (base, region_size, "tpm_atmel0") == NULL) ? 0 : 1; |
e0dd03ca | 179 | |
f33d9bd5 JG |
180 | pdev = platform_device_register_simple("tpm_atmel", -1, NULL, 0); |
181 | if (IS_ERR(pdev)) { | |
ad5ea3cc KJH |
182 | rc = PTR_ERR(pdev); |
183 | goto err_rel_reg; | |
682e97ac | 184 | } |
1da177e4 | 185 | |
afb5abc2 JS |
186 | chip = tpmm_chip_alloc(&pdev->dev, &tpm_atmel); |
187 | if (IS_ERR(chip)) { | |
188 | rc = PTR_ERR(chip); | |
ad5ea3cc | 189 | goto err_unreg_dev; |
e0dd03ca KJH |
190 | } |
191 | ||
192 | chip->vendor.iobase = iobase; | |
193 | chip->vendor.base = base; | |
194 | chip->vendor.have_region = have_region; | |
195 | chip->vendor.region_size = region_size; | |
196 | ||
afb5abc2 JS |
197 | rc = tpm_chip_register(chip); |
198 | if (rc) | |
199 | goto err_unreg_dev; | |
200 | ||
682e97ac | 201 | return 0; |
ad5ea3cc KJH |
202 | |
203 | err_unreg_dev: | |
204 | platform_device_unregister(pdev); | |
205 | err_rel_reg: | |
e0dd03ca KJH |
206 | atmel_put_base_addr(iobase); |
207 | if (have_region) | |
208 | atmel_release_region(base, | |
209 | region_size); | |
ad5ea3cc | 210 | err_unreg_drv: |
7a192ec3 | 211 | platform_driver_unregister(&atml_drv); |
ad5ea3cc | 212 | return rc; |
1da177e4 LT |
213 | } |
214 | ||
215 | static void __exit cleanup_atmel(void) | |
216 | { | |
7a192ec3 | 217 | platform_driver_unregister(&atml_drv); |
ad5ea3cc | 218 | atml_plat_remove(); |
1da177e4 LT |
219 | } |
220 | ||
221 | module_init(init_atmel); | |
222 | module_exit(cleanup_atmel); | |
223 | ||
224 | MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); | |
225 | MODULE_DESCRIPTION("TPM Driver"); | |
226 | MODULE_VERSION("2.0"); | |
227 | MODULE_LICENSE("GPL"); |