[deliverable/linux.git] / drivers / char / tpm / tpm_infineon.c

/*
 * Description:
 * Device Driver for the Infineon Technologies
 * SLD 9630 TT 1.1 and SLB 9635 TT 1.2 Trusted Platform Module
 * Specifications at www.trustedcomputinggroup.org
 *
 * Copyright (C) 2005, Marcel Selhorst <tpmdd@selhorst.net>
 * Sirrix AG - security technologies <tpmdd@sirrix.com> and
 * Applied Data Security Group, Ruhr-University Bochum, Germany
 * Project-Homepage: http://www.trust.rub.de/projects/linux-device-driver-infineon-tpm/ 
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation, version 2 of the
 * License.
 */

#include <linux/init.h>
#include <linux/pnp.h>
#include "tpm.h"

/* Infineon specific definitions */
/* maximum number of WTX-packages */
#define	TPM_MAX_WTX_PACKAGES 	50
/* msleep-Time for WTX-packages */
#define	TPM_WTX_MSLEEP_TIME 	20
/* msleep-Time --> Interval to check status register */
#define	TPM_MSLEEP_TIME 	3
/* gives number of max. msleep()-calls before throwing timeout */
#define	TPM_MAX_TRIES		5000
#define	TPM_INFINEON_DEV_VEN_VALUE	0x15D1

#define TPM_INF_IO_PORT		0x0
#define TPM_INF_IO_MEM		0x1

#define TPM_INF_ADDR		0x0
#define TPM_INF_DATA		0x1

struct tpm_inf_dev {
	int iotype;

	void __iomem *mem_base;	/* MMIO ioremap'd addr */
	unsigned long map_base;	/* phys MMIO base */
	unsigned long map_size;	/* MMIO region size */
	unsigned int index_off;	/* index register offset */

	unsigned int data_regs;	/* Data registers */
	unsigned int data_size;

	unsigned int config_port;	/* IO Port config index reg */
	unsigned int config_size;
};

static struct tpm_inf_dev tpm_dev;

static inline void tpm_data_out(unsigned char data, unsigned char offset)
{
	if (tpm_dev.iotype == TPM_INF_IO_PORT)
		outb(data, tpm_dev.data_regs + offset);
	else
		writeb(data, tpm_dev.mem_base + tpm_dev.data_regs + offset);
}

static inline unsigned char tpm_data_in(unsigned char offset)
{
	if (tpm_dev.iotype == TPM_INF_IO_PORT)
		return inb(tpm_dev.data_regs + offset);
	else
		return readb(tpm_dev.mem_base + tpm_dev.data_regs + offset);
}

static inline void tpm_config_out(unsigned char data, unsigned char offset)
{
	if (tpm_dev.iotype == TPM_INF_IO_PORT)
		outb(data, tpm_dev.config_port + offset);
	else
		writeb(data, tpm_dev.mem_base + tpm_dev.index_off + offset);
}

static inline unsigned char tpm_config_in(unsigned char offset)
{
	if (tpm_dev.iotype == TPM_INF_IO_PORT)
		return inb(tpm_dev.config_port + offset);
	else
		return readb(tpm_dev.mem_base + tpm_dev.index_off + offset);
}

/* TPM header definitions */
enum infineon_tpm_header {
	TPM_VL_VER = 0x01,
	TPM_VL_CHANNEL_CONTROL = 0x07,
	TPM_VL_CHANNEL_PERSONALISATION = 0x0A,
	TPM_VL_CHANNEL_TPM = 0x0B,
	TPM_VL_CONTROL = 0x00,
	TPM_INF_NAK = 0x15,
	TPM_CTRL_WTX = 0x10,
	TPM_CTRL_WTX_ABORT = 0x18,
	TPM_CTRL_WTX_ABORT_ACK = 0x18,
	TPM_CTRL_ERROR = 0x20,
	TPM_CTRL_CHAININGACK = 0x40,
	TPM_CTRL_CHAINING = 0x80,
	TPM_CTRL_DATA = 0x04,
	TPM_CTRL_DATA_CHA = 0x84,
	TPM_CTRL_DATA_CHA_ACK = 0xC4
};

enum infineon_tpm_register {
	WRFIFO = 0x00,
	RDFIFO = 0x01,
	STAT = 0x02,
	CMD = 0x03
};

enum infineon_tpm_command_bits {
	CMD_DIS = 0x00,
	CMD_LP = 0x01,
	CMD_RES = 0x02,
	CMD_IRQC = 0x06
};

enum infineon_tpm_status_bits {
	STAT_XFE = 0x00,
	STAT_LPA = 0x01,
	STAT_FOK = 0x02,
	STAT_TOK = 0x03,
	STAT_IRQA = 0x06,
	STAT_RDA = 0x07
};

/* some outgoing values */
enum infineon_tpm_values {
	CHIP_ID1 = 0x20,
	CHIP_ID2 = 0x21,
	TPM_DAR = 0x30,
	RESET_LP_IRQC_DISABLE = 0x41,
	ENABLE_REGISTER_PAIR = 0x55,
	IOLIMH = 0x60,
	IOLIML = 0x61,
	DISABLE_REGISTER_PAIR = 0xAA,
	IDVENL = 0xF1,
	IDVENH = 0xF2,
	IDPDL = 0xF3,
	IDPDH = 0xF4
};

static int number_of_wtx;

static int empty_fifo(struct tpm_chip *chip, int clear_wrfifo)
{
	int status;
	int check = 0;
	int i;

	if (clear_wrfifo) {
		for (i = 0; i < 4096; i++) {
			status = tpm_data_in(WRFIFO);
			if (status == 0xff) {
				if (check == 5)
					break;
				else
					check++;
			}
		}
	}
	/* Note: The values which are currently in the FIFO of the TPM
	   are thrown away since there is no usage for them. Usually,
	   this has nothing to say, since the TPM will give its answer
	   immediately or will be aborted anyway, so the data here is
	   usually garbage and useless.
	   We have to clean this, because the next communication with
	   the TPM would be rubbish, if there is still some old data
	   in the Read FIFO.
	 */
	i = 0;
	do {
		status = tpm_data_in(RDFIFO);
		status = tpm_data_in(STAT);
		i++;
		if (i == TPM_MAX_TRIES)
			return -EIO;
	} while ((status & (1 << STAT_RDA)) != 0);
	return 0;
}

static int wait(struct tpm_chip *chip, int wait_for_bit)
{
	int status;
	int i;
	for (i = 0; i < TPM_MAX_TRIES; i++) {
		status = tpm_data_in(STAT);
		/* check the status-register if wait_for_bit is set */
		if (status & 1 << wait_for_bit)
			break;
		msleep(TPM_MSLEEP_TIME);
	}
	if (i == TPM_MAX_TRIES) {	/* timeout occurs */
		if (wait_for_bit == STAT_XFE)
			dev_err(chip->dev, "Timeout in wait(STAT_XFE)\n");
		if (wait_for_bit == STAT_RDA)
			dev_err(chip->dev, "Timeout in wait(STAT_RDA)\n");
		return -EIO;
	}
	return 0;
};

static void wait_and_send(struct tpm_chip *chip, u8 sendbyte)
{
	wait(chip, STAT_XFE);
	tpm_data_out(sendbyte, WRFIFO);
}

    /* Note: WTX means Waiting-Time-Extension. Whenever the TPM needs more
       calculation time, it sends a WTX-package, which has to be acknowledged
       or aborted. This usually occurs if you are hammering the TPM with key
       creation. Set the maximum number of WTX-packages in the definitions
       above, if the number is reached, the waiting-time will be denied
       and the TPM command has to be resend.
     */

static void tpm_wtx(struct tpm_chip *chip)
{
	number_of_wtx++;
	dev_info(chip->dev, "Granting WTX (%02d / %02d)\n",
		 number_of_wtx, TPM_MAX_WTX_PACKAGES);
	wait_and_send(chip, TPM_VL_VER);
	wait_and_send(chip, TPM_CTRL_WTX);
	wait_and_send(chip, 0x00);
	wait_and_send(chip, 0x00);
	msleep(TPM_WTX_MSLEEP_TIME);
}

static void tpm_wtx_abort(struct tpm_chip *chip)
{
	dev_info(chip->dev, "Aborting WTX\n");
	wait_and_send(chip, TPM_VL_VER);
	wait_and_send(chip, TPM_CTRL_WTX_ABORT);
	wait_and_send(chip, 0x00);
	wait_and_send(chip, 0x00);
	number_of_wtx = 0;
	msleep(TPM_WTX_MSLEEP_TIME);
}

static int tpm_inf_recv(struct tpm_chip *chip, u8 * buf, size_t count)
{
	int i;
	int ret;
	u32 size = 0;
	number_of_wtx = 0;

recv_begin:
	/* start receiving header */
	for (i = 0; i < 4; i++) {
		ret = wait(chip, STAT_RDA);
		if (ret)
			return -EIO;
		buf[i] = tpm_data_in(RDFIFO);
	}

	if (buf[0] != TPM_VL_VER) {
		dev_err(chip->dev,
			"Wrong transport protocol implementation!\n");
		return -EIO;
	}

	if (buf[1] == TPM_CTRL_DATA) {
		/* size of the data received */
		size = ((buf[2] << 8) | buf[3]);

		for (i = 0; i < size; i++) {
			wait(chip, STAT_RDA);
			buf[i] = tpm_data_in(RDFIFO);
		}

		if ((size == 0x6D00) && (buf[1] == 0x80)) {
			dev_err(chip->dev, "Error handling on vendor layer!\n");
			return -EIO;
		}

		for (i = 0; i < size; i++)
			buf[i] = buf[i + 6];

		size = size - 6;
		return size;
	}

	if (buf[1] == TPM_CTRL_WTX) {
		dev_info(chip->dev, "WTX-package received\n");
		if (number_of_wtx < TPM_MAX_WTX_PACKAGES) {
			tpm_wtx(chip);
			goto recv_begin;
		} else {
			tpm_wtx_abort(chip);
			goto recv_begin;
		}
	}

	if (buf[1] == TPM_CTRL_WTX_ABORT_ACK) {
		dev_info(chip->dev, "WTX-abort acknowledged\n");
		return size;
	}

	if (buf[1] == TPM_CTRL_ERROR) {
		dev_err(chip->dev, "ERROR-package received:\n");
		if (buf[4] == TPM_INF_NAK)
			dev_err(chip->dev,
				"-> Negative acknowledgement"
				" - retransmit command!\n");
		return -EIO;
	}
	return -EIO;
}

static int tpm_inf_send(struct tpm_chip *chip, u8 * buf, size_t count)
{
	int i;
	int ret;
	u8 count_high, count_low, count_4, count_3, count_2, count_1;

	/* Disabling Reset, LP and IRQC */
	tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);

	ret = empty_fifo(chip, 1);
	if (ret) {
		dev_err(chip->dev, "Timeout while clearing FIFO\n");
		return -EIO;
	}

	ret = wait(chip, STAT_XFE);
	if (ret)
		return -EIO;

	count_4 = (count & 0xff000000) >> 24;
	count_3 = (count & 0x00ff0000) >> 16;
	count_2 = (count & 0x0000ff00) >> 8;
	count_1 = (count & 0x000000ff);
	count_high = ((count + 6) & 0xffffff00) >> 8;
	count_low = ((count + 6) & 0x000000ff);

	/* Sending Header */
	wait_and_send(chip, TPM_VL_VER);
	wait_and_send(chip, TPM_CTRL_DATA);
	wait_and_send(chip, count_high);
	wait_and_send(chip, count_low);

	/* Sending Data Header */
	wait_and_send(chip, TPM_VL_VER);
	wait_and_send(chip, TPM_VL_CHANNEL_TPM);
	wait_and_send(chip, count_4);
	wait_and_send(chip, count_3);
	wait_and_send(chip, count_2);
	wait_and_send(chip, count_1);

	/* Sending Data */
	for (i = 0; i < count; i++) {
		wait_and_send(chip, buf[i]);
	}
	return count;
}

static void tpm_inf_cancel(struct tpm_chip *chip)
{
	/*
	   Since we are using the legacy mode to communicate
	   with the TPM, we have no cancel functions, but have
	   a workaround for interrupting the TPM through WTX.
	 */
}

static u8 tpm_inf_status(struct tpm_chip *chip)
{
	return tpm_data_in(STAT);
}

static const struct tpm_class_ops tpm_inf = {
	.recv = tpm_inf_recv,
	.send = tpm_inf_send,
	.cancel = tpm_inf_cancel,
	.status = tpm_inf_status,
	.req_complete_mask = 0,
	.req_complete_val = 0,
};

static const struct pnp_device_id tpm_inf_pnp_tbl[] = {
	/* Infineon TPMs */
	{"IFX0101", 0},
	{"IFX0102", 0},
	{"", 0}
};

MODULE_DEVICE_TABLE(pnp, tpm_inf_pnp_tbl);

static int tpm_inf_pnp_probe(struct pnp_dev *dev,
				       const struct pnp_device_id *dev_id)
{
	int rc = 0;
	u8 iol, ioh;
	int vendorid[2];
	int version[2];
	int productid[2];
	char chipname[20];
	struct tpm_chip *chip;

	/* read IO-ports through PnP */
	if (pnp_port_valid(dev, 0) && pnp_port_valid(dev, 1) &&
	    !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) {

		tpm_dev.iotype = TPM_INF_IO_PORT;

		tpm_dev.config_port = pnp_port_start(dev, 0);
		tpm_dev.config_size = pnp_port_len(dev, 0);
		tpm_dev.data_regs = pnp_port_start(dev, 1);
		tpm_dev.data_size = pnp_port_len(dev, 1);
		if ((tpm_dev.data_size < 4) || (tpm_dev.config_size < 2)) {
			rc = -EINVAL;
			goto err_last;
		}
		dev_info(&dev->dev, "Found %s with ID %s\n",
			 dev->name, dev_id->id);
		if (!((tpm_dev.data_regs >> 8) & 0xff)) {
			rc = -EINVAL;
			goto err_last;
		}
		/* publish my base address and request region */
		if (request_region(tpm_dev.data_regs, tpm_dev.data_size,
				   "tpm_infineon0") == NULL) {
			rc = -EINVAL;
			goto err_last;
		}
		if (request_region(tpm_dev.config_port, tpm_dev.config_size,
				   "tpm_infineon0") == NULL) {
			release_region(tpm_dev.data_regs, tpm_dev.data_size);
			rc = -EINVAL;
			goto err_last;
		}
	} else if (pnp_mem_valid(dev, 0) &&
		   !(pnp_mem_flags(dev, 0) & IORESOURCE_DISABLED)) {

		tpm_dev.iotype = TPM_INF_IO_MEM;

		tpm_dev.map_base = pnp_mem_start(dev, 0);
		tpm_dev.map_size = pnp_mem_len(dev, 0);

		dev_info(&dev->dev, "Found %s with ID %s\n",
			 dev->name, dev_id->id);

		/* publish my base address and request region */
		if (request_mem_region(tpm_dev.map_base, tpm_dev.map_size,
				       "tpm_infineon0") == NULL) {
			rc = -EINVAL;
			goto err_last;
		}

		tpm_dev.mem_base = ioremap(tpm_dev.map_base, tpm_dev.map_size);
		if (tpm_dev.mem_base == NULL) {
			release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
			rc = -EINVAL;
			goto err_last;
		}

		/*
		 * The only known MMIO based Infineon TPM system provides
		 * a single large mem region with the device config
		 * registers at the default TPM_ADDR.  The data registers
		 * seem like they could be placed anywhere within the MMIO
		 * region, but lets just put them at zero offset.
		 */
		tpm_dev.index_off = TPM_ADDR;
		tpm_dev.data_regs = 0x0;
	} else {
		rc = -EINVAL;
		goto err_last;
	}

	/* query chip for its vendor, its version number a.s.o. */
	tpm_config_out(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
	tpm_config_out(IDVENL, TPM_INF_ADDR);
	vendorid[1] = tpm_config_in(TPM_INF_DATA);
	tpm_config_out(IDVENH, TPM_INF_ADDR);
	vendorid[0] = tpm_config_in(TPM_INF_DATA);
	tpm_config_out(IDPDL, TPM_INF_ADDR);
	productid[1] = tpm_config_in(TPM_INF_DATA);
	tpm_config_out(IDPDH, TPM_INF_ADDR);
	productid[0] = tpm_config_in(TPM_INF_DATA);
	tpm_config_out(CHIP_ID1, TPM_INF_ADDR);
	version[1] = tpm_config_in(TPM_INF_DATA);
	tpm_config_out(CHIP_ID2, TPM_INF_ADDR);
	version[0] = tpm_config_in(TPM_INF_DATA);

	switch ((productid[0] << 8) | productid[1]) {
	case 6:
		snprintf(chipname, sizeof(chipname), " (SLD 9630 TT 1.1)");
		break;
	case 11:
		snprintf(chipname, sizeof(chipname), " (SLB 9635 TT 1.2)");
		break;
	default:
		snprintf(chipname, sizeof(chipname), " (unknown chip)");
		break;
	}

	if ((vendorid[0] << 8 | vendorid[1]) == (TPM_INFINEON_DEV_VEN_VALUE)) {

		/* configure TPM with IO-ports */
		tpm_config_out(IOLIMH, TPM_INF_ADDR);
		tpm_config_out((tpm_dev.data_regs >> 8) & 0xff, TPM_INF_DATA);
		tpm_config_out(IOLIML, TPM_INF_ADDR);
		tpm_config_out((tpm_dev.data_regs & 0xff), TPM_INF_DATA);

		/* control if IO-ports are set correctly */
		tpm_config_out(IOLIMH, TPM_INF_ADDR);
		ioh = tpm_config_in(TPM_INF_DATA);
		tpm_config_out(IOLIML, TPM_INF_ADDR);
		iol = tpm_config_in(TPM_INF_DATA);

		if ((ioh << 8 | iol) != tpm_dev.data_regs) {
			dev_err(&dev->dev,
				"Could not set IO-data registers to 0x%x\n",
				tpm_dev.data_regs);
			rc = -EIO;
			goto err_release_region;
		}

		/* activate register */
		tpm_config_out(TPM_DAR, TPM_INF_ADDR);
		tpm_config_out(0x01, TPM_INF_DATA);
		tpm_config_out(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);

		/* disable RESET, LP and IRQC */
		tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);

		/* Finally, we're done, print some infos */
		dev_info(&dev->dev, "TPM found: "
			 "config base 0x%lx, "
			 "data base 0x%lx, "
			 "chip version 0x%02x%02x, "
			 "vendor id 0x%x%x (Infineon), "
			 "product id 0x%02x%02x"
			 "%s\n",
			 tpm_dev.iotype == TPM_INF_IO_PORT ?
			 tpm_dev.config_port :
			 tpm_dev.map_base + tpm_dev.index_off,
			 tpm_dev.iotype == TPM_INF_IO_PORT ?
			 tpm_dev.data_regs :
			 tpm_dev.map_base + tpm_dev.data_regs,
			 version[0], version[1],
			 vendorid[0], vendorid[1],
			 productid[0], productid[1], chipname);

		chip = tpmm_chip_alloc(&dev->dev, &tpm_inf);
		if (IS_ERR(chip)) {
			rc = PTR_ERR(chip);
			goto err_release_region;
		}

		rc = tpm_chip_register(chip);
		if (rc)
			goto err_release_region;

		return 0;
	} else {
		rc = -ENODEV;
		goto err_release_region;
	}

err_release_region:
	if (tpm_dev.iotype == TPM_INF_IO_PORT) {
		release_region(tpm_dev.data_regs, tpm_dev.data_size);
		release_region(tpm_dev.config_port, tpm_dev.config_size);
	} else {
		iounmap(tpm_dev.mem_base);
		release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
	}

err_last:
	return rc;
}

static void tpm_inf_pnp_remove(struct pnp_dev *dev)
{
	struct tpm_chip *chip = pnp_get_drvdata(dev);

	tpm_chip_unregister(chip);

	if (tpm_dev.iotype == TPM_INF_IO_PORT) {
		release_region(tpm_dev.data_regs, tpm_dev.data_size);
		release_region(tpm_dev.config_port,
			       tpm_dev.config_size);
	} else {
		iounmap(tpm_dev.mem_base);
		release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
	}
}

static int tpm_inf_pnp_suspend(struct pnp_dev *dev, pm_message_t pm_state)
{
	struct tpm_chip *chip = pnp_get_drvdata(dev);
	int rc;
	if (chip) {
		u8 savestate[] = {
			0, 193,	/* TPM_TAG_RQU_COMMAND */
			0, 0, 0, 10,	/* blob length (in bytes) */
			0, 0, 0, 152	/* TPM_ORD_SaveState */
		};
		dev_info(&dev->dev, "saving TPM state\n");
		rc = tpm_inf_send(chip, savestate, sizeof(savestate));
		if (rc < 0) {
			dev_err(&dev->dev, "error while saving TPM state\n");
			return rc;
		}
	}
	return 0;
}

static int tpm_inf_pnp_resume(struct pnp_dev *dev)
{
	/* Re-configure TPM after suspending */
	tpm_config_out(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
	tpm_config_out(IOLIMH, TPM_INF_ADDR);
	tpm_config_out((tpm_dev.data_regs >> 8) & 0xff, TPM_INF_DATA);
	tpm_config_out(IOLIML, TPM_INF_ADDR);
	tpm_config_out((tpm_dev.data_regs & 0xff), TPM_INF_DATA);
	/* activate register */
	tpm_config_out(TPM_DAR, TPM_INF_ADDR);
	tpm_config_out(0x01, TPM_INF_DATA);
	tpm_config_out(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
	/* disable RESET, LP and IRQC */
	tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
	return tpm_pm_resume(&dev->dev);
}

static struct pnp_driver tpm_inf_pnp_driver = {
	.name = "tpm_inf_pnp",
	.id_table = tpm_inf_pnp_tbl,
	.probe = tpm_inf_pnp_probe,
	.suspend = tpm_inf_pnp_suspend,
	.resume = tpm_inf_pnp_resume,
	.remove = tpm_inf_pnp_remove
};

static int __init init_inf(void)
{
	return pnp_register_driver(&tpm_inf_pnp_driver);
}

static void __exit cleanup_inf(void)
{
	pnp_unregister_driver(&tpm_inf_pnp_driver);
}

module_init(init_inf);
module_exit(cleanup_inf);

MODULE_AUTHOR("Marcel Selhorst <tpmdd@sirrix.com>");
MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
MODULE_VERSION("1.9.2");
MODULE_LICENSE("GPL");
Commit	Line	Data
ebb81fdb MS	1	/*
	2	* Description:
	3	* Device Driver for the Infineon Technologies
f9abb020	4	* SLD 9630 TT 1.1 and SLB 9635 TT 1.2 Trusted Platform Module
ebb81fdb MS	5	* Specifications at www.trustedcomputinggroup.org
ebb81fdb MS	6	*
cbb2d5e4 RA	7	* Copyright (C) 2005, Marcel Selhorst <tpmdd@selhorst.net>
cbb2d5e4 RA	8	* Sirrix AG - security technologies <tpmdd@sirrix.com> and
ebb81fdb	9	* Applied Data Security Group, Ruhr-University Bochum, Germany
631dd1a8	10	* Project-Homepage: http://www.trust.rub.de/projects/linux-device-driver-infineon-tpm/
ebb81fdb MS	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License as
	14	* published by the Free Software Foundation, version 2 of the
	15	* License.
ebb81fdb MS	16	*/
ebb81fdb MS	17
397c7182	18	#include <linux/init.h>
f9abb020	19	#include <linux/pnp.h>
ebb81fdb MS	20	#include "tpm.h"
	21
	22	/* Infineon specific definitions */
	23	/* maximum number of WTX-packages */
	24	#define TPM_MAX_WTX_PACKAGES 50
	25	/* msleep-Time for WTX-packages */
	26	#define TPM_WTX_MSLEEP_TIME 20
	27	/* msleep-Time --> Interval to check status register */
	28	#define TPM_MSLEEP_TIME 3
	29	/* gives number of max. msleep()-calls before throwing timeout */
	30	#define TPM_MAX_TRIES 5000
f9abb020 MS	31	#define TPM_INFINEON_DEV_VEN_VALUE 0x15D1
f9abb020 MS	32
d954e8ed AW	33	#define TPM_INF_IO_PORT 0x0
	34	#define TPM_INF_IO_MEM 0x1
	35
	36	#define TPM_INF_ADDR 0x0
	37	#define TPM_INF_DATA 0x1
	38
	39	struct tpm_inf_dev {
	40	int iotype;
	41
93716b94 MS	42	void __iomem mem_base; / MMIO ioremap'd addr */
	43	unsigned long map_base; /* phys MMIO base */
	44	unsigned long map_size; /* MMIO region size */
	45	unsigned int index_off; /* index register offset */
d954e8ed	46
93716b94	47	unsigned int data_regs; /* Data registers */
d954e8ed AW	48	unsigned int data_size;
	49
	50	unsigned int config_port; /* IO Port config index reg */
	51	unsigned int config_size;
	52	};
	53
	54	static struct tpm_inf_dev tpm_dev;
	55
	56	static inline void tpm_data_out(unsigned char data, unsigned char offset)
	57	{
	58	if (tpm_dev.iotype == TPM_INF_IO_PORT)
	59	outb(data, tpm_dev.data_regs + offset);
	60	else
	61	writeb(data, tpm_dev.mem_base + tpm_dev.data_regs + offset);
	62	}
	63
	64	static inline unsigned char tpm_data_in(unsigned char offset)
	65	{
	66	if (tpm_dev.iotype == TPM_INF_IO_PORT)
	67	return inb(tpm_dev.data_regs + offset);
	68	else
	69	return readb(tpm_dev.mem_base + tpm_dev.data_regs + offset);
	70	}
	71
	72	static inline void tpm_config_out(unsigned char data, unsigned char offset)
	73	{
	74	if (tpm_dev.iotype == TPM_INF_IO_PORT)
	75	outb(data, tpm_dev.config_port + offset);
	76	else
	77	writeb(data, tpm_dev.mem_base + tpm_dev.index_off + offset);
	78	}
	79
	80	static inline unsigned char tpm_config_in(unsigned char offset)
	81	{
	82	if (tpm_dev.iotype == TPM_INF_IO_PORT)
	83	return inb(tpm_dev.config_port + offset);
	84	else
	85	return readb(tpm_dev.mem_base + tpm_dev.index_off + offset);
	86	}
ebb81fdb MS	87
	88	/* TPM header definitions */
	89	enum infineon_tpm_header {
	90	TPM_VL_VER = 0x01,
	91	TPM_VL_CHANNEL_CONTROL = 0x07,
	92	TPM_VL_CHANNEL_PERSONALISATION = 0x0A,
	93	TPM_VL_CHANNEL_TPM = 0x0B,
	94	TPM_VL_CONTROL = 0x00,
	95	TPM_INF_NAK = 0x15,
	96	TPM_CTRL_WTX = 0x10,
	97	TPM_CTRL_WTX_ABORT = 0x18,
	98	TPM_CTRL_WTX_ABORT_ACK = 0x18,
	99	TPM_CTRL_ERROR = 0x20,
	100	TPM_CTRL_CHAININGACK = 0x40,
	101	TPM_CTRL_CHAINING = 0x80,
	102	TPM_CTRL_DATA = 0x04,
	103	TPM_CTRL_DATA_CHA = 0x84,
	104	TPM_CTRL_DATA_CHA_ACK = 0xC4
	105	};
	106
	107	enum infineon_tpm_register {
	108	WRFIFO = 0x00,
	109	RDFIFO = 0x01,
	110	STAT = 0x02,
	111	CMD = 0x03
	112	};
	113
	114	enum infineon_tpm_command_bits {
	115	CMD_DIS = 0x00,
	116	CMD_LP = 0x01,
	117	CMD_RES = 0x02,
	118	CMD_IRQC = 0x06
	119	};
	120
	121	enum infineon_tpm_status_bits {
	122	STAT_XFE = 0x00,
	123	STAT_LPA = 0x01,
	124	STAT_FOK = 0x02,
	125	STAT_TOK = 0x03,
	126	STAT_IRQA = 0x06,
	127	STAT_RDA = 0x07
	128	};
	129
	130	/* some outgoing values */
	131	enum infineon_tpm_values {
	132	CHIP_ID1 = 0x20,
	133	CHIP_ID2 = 0x21,
3dcce8e2	134	TPM_DAR = 0x30,
ebb81fdb MS	135	RESET_LP_IRQC_DISABLE = 0x41,
	136	ENABLE_REGISTER_PAIR = 0x55,
	137	IOLIMH = 0x60,
	138	IOLIML = 0x61,
	139	DISABLE_REGISTER_PAIR = 0xAA,
	140	IDVENL = 0xF1,
	141	IDVENH = 0xF2,
	142	IDPDL = 0xF3,
	143	IDPDH = 0xF4
	144	};
	145
	146	static int number_of_wtx;
	147
	148	static int empty_fifo(struct tpm_chip *chip, int clear_wrfifo)
	149	{
	150	int status;
	151	int check = 0;
	152	int i;
	153
	154	if (clear_wrfifo) {
	155	for (i = 0; i < 4096; i++) {
d954e8ed	156	status = tpm_data_in(WRFIFO);
ebb81fdb MS	157	if (status == 0xff) {
	158	if (check == 5)
	159	break;
	160	else
	161	check++;
	162	}
	163	}
	164	}
	165	/* Note: The values which are currently in the FIFO of the TPM
	166	are thrown away since there is no usage for them. Usually,
	167	this has nothing to say, since the TPM will give its answer
	168	immediately or will be aborted anyway, so the data here is
	169	usually garbage and useless.
	170	We have to clean this, because the next communication with
	171	the TPM would be rubbish, if there is still some old data
	172	in the Read FIFO.
	173	*/
	174	i = 0;
	175	do {
d954e8ed AW	176	status = tpm_data_in(RDFIFO);
d954e8ed AW	177	status = tpm_data_in(STAT);
ebb81fdb MS	178	i++;
	179	if (i == TPM_MAX_TRIES)
	180	return -EIO;
	181	} while ((status & (1 << STAT_RDA)) != 0);
	182	return 0;
	183	}
	184
	185	static int wait(struct tpm_chip *chip, int wait_for_bit)
	186	{
	187	int status;
	188	int i;
	189	for (i = 0; i < TPM_MAX_TRIES; i++) {
d954e8ed	190	status = tpm_data_in(STAT);
ebb81fdb MS	191	/* check the status-register if wait_for_bit is set */
	192	if (status & 1 << wait_for_bit)
	193	break;
	194	msleep(TPM_MSLEEP_TIME);
	195	}
	196	if (i == TPM_MAX_TRIES) { /* timeout occurs */
	197	if (wait_for_bit == STAT_XFE)
1b8333b0	198	dev_err(chip->dev, "Timeout in wait(STAT_XFE)\n");
ebb81fdb	199	if (wait_for_bit == STAT_RDA)
1b8333b0	200	dev_err(chip->dev, "Timeout in wait(STAT_RDA)\n");
ebb81fdb MS	201	return -EIO;
	202	}
	203	return 0;
	204	};
	205
	206	static void wait_and_send(struct tpm_chip *chip, u8 sendbyte)
	207	{
	208	wait(chip, STAT_XFE);
d954e8ed	209	tpm_data_out(sendbyte, WRFIFO);
ebb81fdb MS	210	}
	211
	212	/* Note: WTX means Waiting-Time-Extension. Whenever the TPM needs more
	213	calculation time, it sends a WTX-package, which has to be acknowledged
	214	or aborted. This usually occurs if you are hammering the TPM with key
	215	creation. Set the maximum number of WTX-packages in the definitions
	216	above, if the number is reached, the waiting-time will be denied
	217	and the TPM command has to be resend.
	218	*/
	219
	220	static void tpm_wtx(struct tpm_chip *chip)
	221	{
	222	number_of_wtx++;
e659a3fe	223	dev_info(chip->dev, "Granting WTX (%02d / %02d)\n",
ebb81fdb MS	224	number_of_wtx, TPM_MAX_WTX_PACKAGES);
	225	wait_and_send(chip, TPM_VL_VER);
	226	wait_and_send(chip, TPM_CTRL_WTX);
	227	wait_and_send(chip, 0x00);
	228	wait_and_send(chip, 0x00);
	229	msleep(TPM_WTX_MSLEEP_TIME);
	230	}
	231
	232	static void tpm_wtx_abort(struct tpm_chip *chip)
	233	{
e659a3fe	234	dev_info(chip->dev, "Aborting WTX\n");
ebb81fdb MS	235	wait_and_send(chip, TPM_VL_VER);
	236	wait_and_send(chip, TPM_CTRL_WTX_ABORT);
	237	wait_and_send(chip, 0x00);
	238	wait_and_send(chip, 0x00);
	239	number_of_wtx = 0;
	240	msleep(TPM_WTX_MSLEEP_TIME);
	241	}
	242
	243	static int tpm_inf_recv(struct tpm_chip chip, u8 buf, size_t count)
	244	{
	245	int i;
	246	int ret;
	247	u32 size = 0;
8c9e8779	248	number_of_wtx = 0;
ebb81fdb MS	249
	250	recv_begin:
	251	/* start receiving header */
	252	for (i = 0; i < 4; i++) {
	253	ret = wait(chip, STAT_RDA);
	254	if (ret)
	255	return -EIO;
d954e8ed	256	buf[i] = tpm_data_in(RDFIFO);
ebb81fdb MS	257	}
	258
	259	if (buf[0] != TPM_VL_VER) {
e659a3fe	260	dev_err(chip->dev,
ebb81fdb MS	261	"Wrong transport protocol implementation!\n");
	262	return -EIO;
	263	}
	264
	265	if (buf[1] == TPM_CTRL_DATA) {
	266	/* size of the data received */
	267	size = ((buf[2] << 8) \| buf[3]);
	268
	269	for (i = 0; i < size; i++) {
	270	wait(chip, STAT_RDA);
d954e8ed	271	buf[i] = tpm_data_in(RDFIFO);
ebb81fdb MS	272	}
	273
	274	if ((size == 0x6D00) && (buf[1] == 0x80)) {
1b8333b0	275	dev_err(chip->dev, "Error handling on vendor layer!\n");
ebb81fdb MS	276	return -EIO;
	277	}
	278
	279	for (i = 0; i < size; i++)
	280	buf[i] = buf[i + 6];
	281
	282	size = size - 6;
	283	return size;
	284	}
	285
	286	if (buf[1] == TPM_CTRL_WTX) {
e659a3fe	287	dev_info(chip->dev, "WTX-package received\n");
ebb81fdb MS	288	if (number_of_wtx < TPM_MAX_WTX_PACKAGES) {
	289	tpm_wtx(chip);
	290	goto recv_begin;
	291	} else {
	292	tpm_wtx_abort(chip);
	293	goto recv_begin;
	294	}
	295	}
	296
	297	if (buf[1] == TPM_CTRL_WTX_ABORT_ACK) {
e659a3fe	298	dev_info(chip->dev, "WTX-abort acknowledged\n");
ebb81fdb MS	299	return size;
	300	}
	301
	302	if (buf[1] == TPM_CTRL_ERROR) {
e659a3fe	303	dev_err(chip->dev, "ERROR-package received:\n");
ebb81fdb	304	if (buf[4] == TPM_INF_NAK)
e659a3fe	305	dev_err(chip->dev,
ebb81fdb MS	306	"-> Negative acknowledgement"
	307	" - retransmit command!\n");
	308	return -EIO;
	309	}
	310	return -EIO;
	311	}
	312
	313	static int tpm_inf_send(struct tpm_chip chip, u8 buf, size_t count)
	314	{
	315	int i;
	316	int ret;
	317	u8 count_high, count_low, count_4, count_3, count_2, count_1;
	318
	319	/* Disabling Reset, LP and IRQC */
d954e8ed	320	tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
ebb81fdb MS	321
	322	ret = empty_fifo(chip, 1);
	323	if (ret) {
e659a3fe	324	dev_err(chip->dev, "Timeout while clearing FIFO\n");
ebb81fdb MS	325	return -EIO;
	326	}
	327
	328	ret = wait(chip, STAT_XFE);
	329	if (ret)
	330	return -EIO;
	331
	332	count_4 = (count & 0xff000000) >> 24;
	333	count_3 = (count & 0x00ff0000) >> 16;
	334	count_2 = (count & 0x0000ff00) >> 8;
	335	count_1 = (count & 0x000000ff);
	336	count_high = ((count + 6) & 0xffffff00) >> 8;
	337	count_low = ((count + 6) & 0x000000ff);
	338
	339	/* Sending Header */
	340	wait_and_send(chip, TPM_VL_VER);
	341	wait_and_send(chip, TPM_CTRL_DATA);
	342	wait_and_send(chip, count_high);
	343	wait_and_send(chip, count_low);
	344
	345	/* Sending Data Header */
	346	wait_and_send(chip, TPM_VL_VER);
	347	wait_and_send(chip, TPM_VL_CHANNEL_TPM);
	348	wait_and_send(chip, count_4);
	349	wait_and_send(chip, count_3);
	350	wait_and_send(chip, count_2);
	351	wait_and_send(chip, count_1);
	352
	353	/* Sending Data */
	354	for (i = 0; i < count; i++) {
	355	wait_and_send(chip, buf[i]);
	356	}
	357	return count;
	358	}
	359
	360	static void tpm_inf_cancel(struct tpm_chip *chip)
	361	{
f9abb020 MS	362	/*
	363	Since we are using the legacy mode to communicate
	364	with the TPM, we have no cancel functions, but have
	365	a workaround for interrupting the TPM through WTX.
ebb81fdb MS	366	*/
	367	}
	368
b4ed3e3c KJH	369	static u8 tpm_inf_status(struct tpm_chip *chip)
b4ed3e3c KJH	370	{
d954e8ed	371	return tpm_data_in(STAT);
b4ed3e3c KJH	372	}
b4ed3e3c KJH	373
01ad1fa7	374	static const struct tpm_class_ops tpm_inf = {
ebb81fdb MS	375	.recv = tpm_inf_recv,
	376	.send = tpm_inf_send,
	377	.cancel = tpm_inf_cancel,
b4ed3e3c	378	.status = tpm_inf_status,
ebb81fdb MS	379	.req_complete_mask = 0,
ebb81fdb MS	380	.req_complete_val = 0,
ebb81fdb MS	381	};
ebb81fdb MS	382
93716b94	383	static const struct pnp_device_id tpm_inf_pnp_tbl[] = {
f9abb020 MS	384	/* Infineon TPMs */
	385	{"IFX0101", 0},
	386	{"IFX0102", 0},
	387	{"", 0}
	388	};
1b8333b0	389
93716b94	390	MODULE_DEVICE_TABLE(pnp, tpm_inf_pnp_tbl);
f9abb020	391
afc6d369	392	static int tpm_inf_pnp_probe(struct pnp_dev *dev,
1b8333b0	393	const struct pnp_device_id *dev_id)
ebb81fdb MS	394	{
	395	int rc = 0;
	396	u8 iol, ioh;
	397	int vendorid[2];
	398	int version[2];
	399	int productid[2];
f9abb020	400	char chipname[20];
e496f540	401	struct tpm_chip *chip;
ebb81fdb	402
1b8333b0 MS	403	/* read IO-ports through PnP */
	404	if (pnp_port_valid(dev, 0) && pnp_port_valid(dev, 1) &&
	405	!(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) {
d954e8ed	406
93716b94	407	tpm_dev.iotype = TPM_INF_IO_PORT;
d954e8ed AW	408
	409	tpm_dev.config_port = pnp_port_start(dev, 0);
	410	tpm_dev.config_size = pnp_port_len(dev, 0);
	411	tpm_dev.data_regs = pnp_port_start(dev, 1);
	412	tpm_dev.data_size = pnp_port_len(dev, 1);
	413	if ((tpm_dev.data_size < 4) \|\| (tpm_dev.config_size < 2)) {
8c9e8779 MS	414	rc = -EINVAL;
	415	goto err_last;
	416	}
1b8333b0 MS	417	dev_info(&dev->dev, "Found %s with ID %s\n",
1b8333b0 MS	418	dev->name, dev_id->id);
d954e8ed	419	if (!((tpm_dev.data_regs >> 8) & 0xff)) {
8c9e8779 MS	420	rc = -EINVAL;
	421	goto err_last;
	422	}
1b8333b0	423	/* publish my base address and request region */
d954e8ed AW	424	if (request_region(tpm_dev.data_regs, tpm_dev.data_size,
d954e8ed AW	425	"tpm_infineon0") == NULL) {
8c9e8779 MS	426	rc = -EINVAL;
	427	goto err_last;
	428	}
d954e8ed AW	429	if (request_region(tpm_dev.config_port, tpm_dev.config_size,
	430	"tpm_infineon0") == NULL) {
	431	release_region(tpm_dev.data_regs, tpm_dev.data_size);
8c9e8779 MS	432	rc = -EINVAL;
8c9e8779 MS	433	goto err_last;
1b8333b0	434	}
d954e8ed	435	} else if (pnp_mem_valid(dev, 0) &&
93716b94	436	!(pnp_mem_flags(dev, 0) & IORESOURCE_DISABLED)) {
d954e8ed	437
93716b94	438	tpm_dev.iotype = TPM_INF_IO_MEM;
d954e8ed AW	439
	440	tpm_dev.map_base = pnp_mem_start(dev, 0);
	441	tpm_dev.map_size = pnp_mem_len(dev, 0);
	442
	443	dev_info(&dev->dev, "Found %s with ID %s\n",
	444	dev->name, dev_id->id);
	445
	446	/* publish my base address and request region */
	447	if (request_mem_region(tpm_dev.map_base, tpm_dev.map_size,
	448	"tpm_infineon0") == NULL) {
	449	rc = -EINVAL;
	450	goto err_last;
	451	}
	452
	453	tpm_dev.mem_base = ioremap(tpm_dev.map_base, tpm_dev.map_size);
	454	if (tpm_dev.mem_base == NULL) {
	455	release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
	456	rc = -EINVAL;
	457	goto err_last;
	458	}
	459
	460	/*
	461	* The only known MMIO based Infineon TPM system provides
	462	* a single large mem region with the device config
	463	* registers at the default TPM_ADDR. The data registers
	464	* seem like they could be placed anywhere within the MMIO
	465	* region, but lets just put them at zero offset.
	466	*/
	467	tpm_dev.index_off = TPM_ADDR;
	468	tpm_dev.data_regs = 0x0;
e8a65015	469	} else {
8c9e8779 MS	470	rc = -EINVAL;
8c9e8779 MS	471	goto err_last;
f9abb020 MS	472	}
f9abb020 MS	473
ebb81fdb	474	/* query chip for its vendor, its version number a.s.o. */
d954e8ed AW	475	tpm_config_out(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
	476	tpm_config_out(IDVENL, TPM_INF_ADDR);
	477	vendorid[1] = tpm_config_in(TPM_INF_DATA);
	478	tpm_config_out(IDVENH, TPM_INF_ADDR);
	479	vendorid[0] = tpm_config_in(TPM_INF_DATA);
	480	tpm_config_out(IDPDL, TPM_INF_ADDR);
	481	productid[1] = tpm_config_in(TPM_INF_DATA);
	482	tpm_config_out(IDPDH, TPM_INF_ADDR);
	483	productid[0] = tpm_config_in(TPM_INF_DATA);
	484	tpm_config_out(CHIP_ID1, TPM_INF_ADDR);
	485	version[1] = tpm_config_in(TPM_INF_DATA);
	486	tpm_config_out(CHIP_ID2, TPM_INF_ADDR);
	487	version[0] = tpm_config_in(TPM_INF_DATA);
f9abb020 MS	488
	489	switch ((productid[0] << 8) \| productid[1]) {
	490	case 6:
e8a65015	491	snprintf(chipname, sizeof(chipname), " (SLD 9630 TT 1.1)");
f9abb020 MS	492	break;
f9abb020 MS	493	case 11:
e8a65015	494	snprintf(chipname, sizeof(chipname), " (SLB 9635 TT 1.2)");
f9abb020 MS	495	break;
f9abb020 MS	496	default:
e8a65015	497	snprintf(chipname, sizeof(chipname), " (unknown chip)");
f9abb020 MS	498	break;
f9abb020 MS	499	}
f9abb020 MS	500
f9abb020 MS	501	if ((vendorid[0] << 8 \| vendorid[1]) == (TPM_INFINEON_DEV_VEN_VALUE)) {
ebb81fdb	502
f9abb020	503	/* configure TPM with IO-ports */
d954e8ed AW	504	tpm_config_out(IOLIMH, TPM_INF_ADDR);
	505	tpm_config_out((tpm_dev.data_regs >> 8) & 0xff, TPM_INF_DATA);
	506	tpm_config_out(IOLIML, TPM_INF_ADDR);
	507	tpm_config_out((tpm_dev.data_regs & 0xff), TPM_INF_DATA);
f9abb020 MS	508
f9abb020 MS	509	/* control if IO-ports are set correctly */
d954e8ed AW	510	tpm_config_out(IOLIMH, TPM_INF_ADDR);
	511	ioh = tpm_config_in(TPM_INF_DATA);
	512	tpm_config_out(IOLIML, TPM_INF_ADDR);
	513	iol = tpm_config_in(TPM_INF_DATA);
f9abb020	514
d954e8ed	515	if ((ioh << 8 \| iol) != tpm_dev.data_regs) {
1b8333b0	516	dev_err(&dev->dev,
d954e8ed AW	517	"Could not set IO-data registers to 0x%x\n",
d954e8ed AW	518	tpm_dev.data_regs);
8c9e8779 MS	519	rc = -EIO;
8c9e8779 MS	520	goto err_release_region;
ebb81fdb MS	521	}
	522
	523	/* activate register */
d954e8ed AW	524	tpm_config_out(TPM_DAR, TPM_INF_ADDR);
	525	tpm_config_out(0x01, TPM_INF_DATA);
	526	tpm_config_out(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
ebb81fdb MS	527
ebb81fdb MS	528	/* disable RESET, LP and IRQC */
d954e8ed	529	tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
ebb81fdb MS	530
ebb81fdb MS	531	/* Finally, we're done, print some infos */
1b8333b0	532	dev_info(&dev->dev, "TPM found: "
d954e8ed AW	533	"config base 0x%lx, "
d954e8ed AW	534	"data base 0x%lx, "
e496f540 MS	535	"chip version 0x%02x%02x, "
	536	"vendor id 0x%x%x (Infineon), "
	537	"product id 0x%02x%02x"
ebb81fdb	538	"%s\n",
d954e8ed	539	tpm_dev.iotype == TPM_INF_IO_PORT ?
93716b94 MS	540	tpm_dev.config_port :
93716b94 MS	541	tpm_dev.map_base + tpm_dev.index_off,
d954e8ed	542	tpm_dev.iotype == TPM_INF_IO_PORT ?
93716b94 MS	543	tpm_dev.data_regs :
93716b94 MS	544	tpm_dev.map_base + tpm_dev.data_regs,
ebb81fdb MS	545	version[0], version[1],
ebb81fdb MS	546	vendorid[0], vendorid[1],
f9abb020	547	productid[0], productid[1], chipname);
ebb81fdb	548
afb5abc2 JS	549	chip = tpmm_chip_alloc(&dev->dev, &tpm_inf);
	550	if (IS_ERR(chip)) {
	551	rc = PTR_ERR(chip);
	552	goto err_release_region;
	553	}
	554
	555	rc = tpm_chip_register(chip);
	556	if (rc)
8c9e8779	557	goto err_release_region;
d954e8ed	558
ebb81fdb MS	559	return 0;
ebb81fdb MS	560	} else {
8c9e8779 MS	561	rc = -ENODEV;
8c9e8779 MS	562	goto err_release_region;
ebb81fdb	563	}
8c9e8779 MS	564
8c9e8779 MS	565	err_release_region:
d954e8ed AW	566	if (tpm_dev.iotype == TPM_INF_IO_PORT) {
	567	release_region(tpm_dev.data_regs, tpm_dev.data_size);
	568	release_region(tpm_dev.config_port, tpm_dev.config_size);
	569	} else {
	570	iounmap(tpm_dev.mem_base);
	571	release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
	572	}
8c9e8779 MS	573
	574	err_last:
	575	return rc;
ebb81fdb MS	576	}
ebb81fdb MS	577
39af33fc	578	static void tpm_inf_pnp_remove(struct pnp_dev *dev)
e659a3fe	579	{
1b8333b0	580	struct tpm_chip *chip = pnp_get_drvdata(dev);
e659a3fe	581
afb5abc2 JS	582	tpm_chip_unregister(chip);
	583
	584	if (tpm_dev.iotype == TPM_INF_IO_PORT) {
	585	release_region(tpm_dev.data_regs, tpm_dev.data_size);
	586	release_region(tpm_dev.config_port,
	587	tpm_dev.config_size);
	588	} else {
	589	iounmap(tpm_dev.mem_base);
	590	release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
1b8333b0	591	}
e659a3fe KJH	592	}
e659a3fe KJH	593
93716b94 MS	594	static int tpm_inf_pnp_suspend(struct pnp_dev *dev, pm_message_t pm_state)
	595	{
	596	struct tpm_chip *chip = pnp_get_drvdata(dev);
	597	int rc;
	598	if (chip) {
	599	u8 savestate[] = {
	600	0, 193, /* TPM_TAG_RQU_COMMAND */
	601	0, 0, 0, 10, /* blob length (in bytes) */
	602	0, 0, 0, 152 /* TPM_ORD_SaveState */
	603	};
	604	dev_info(&dev->dev, "saving TPM state\n");
	605	rc = tpm_inf_send(chip, savestate, sizeof(savestate));
	606	if (rc < 0) {
	607	dev_err(&dev->dev, "error while saving TPM state\n");
	608	return rc;
	609	}
	610	}
	611	return 0;
	612	}
	613
	614	static int tpm_inf_pnp_resume(struct pnp_dev *dev)
	615	{
	616	/* Re-configure TPM after suspending */
	617	tpm_config_out(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
	618	tpm_config_out(IOLIMH, TPM_INF_ADDR);
	619	tpm_config_out((tpm_dev.data_regs >> 8) & 0xff, TPM_INF_DATA);
	620	tpm_config_out(IOLIML, TPM_INF_ADDR);
	621	tpm_config_out((tpm_dev.data_regs & 0xff), TPM_INF_DATA);
	622	/* activate register */
	623	tpm_config_out(TPM_DAR, TPM_INF_ADDR);
	624	tpm_config_out(0x01, TPM_INF_DATA);
	625	tpm_config_out(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
	626	/* disable RESET, LP and IRQC */
	627	tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
	628	return tpm_pm_resume(&dev->dev);
	629	}
	630
e1d42c98	631	static struct pnp_driver tpm_inf_pnp_driver = {
1b8333b0	632	.name = "tpm_inf_pnp",
93716b94	633	.id_table = tpm_inf_pnp_tbl,
1b8333b0	634	.probe = tpm_inf_pnp_probe,
93716b94 MS	635	.suspend = tpm_inf_pnp_suspend,
93716b94 MS	636	.resume = tpm_inf_pnp_resume,
164dce82	637	.remove = tpm_inf_pnp_remove
ebb81fdb MS	638	};
	639
	640	static int __init init_inf(void)
	641	{
e1d42c98	642	return pnp_register_driver(&tpm_inf_pnp_driver);
ebb81fdb MS	643	}
	644
	645	static void __exit cleanup_inf(void)
	646	{
e1d42c98	647	pnp_unregister_driver(&tpm_inf_pnp_driver);
ebb81fdb MS	648	}
	649
	650	module_init(init_inf);
	651	module_exit(cleanup_inf);
	652
cbb2d5e4	653	MODULE_AUTHOR("Marcel Selhorst <tpmdd@sirrix.com>");
f9abb020	654	MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
93716b94	655	MODULE_VERSION("1.9.2");
ebb81fdb	656	MODULE_LICENSE("GPL");