tty: Introduce a tty_port generic block_til_ready
[deliverable/linux.git] / drivers / char / vme_scc.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/char/vme_scc.c: MVME147, MVME162, BVME6000 SCC serial ports
3 * implementation.
4 * Copyright 1999 Richard Hirst <richard@sleepie.demon.co.uk>
5 *
6 * Based on atari_SCC.c which was
7 * Copyright 1994-95 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
8 * Partially based on PC-Linux serial.c by Linus Torvalds and Theodore Ts'o
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
13 *
14 */
15
16#include <linux/module.h>
1da177e4
LT
17#include <linux/kdev_t.h>
18#include <asm/io.h>
19#include <linux/kernel.h>
1da177e4
LT
20#include <linux/ioport.h>
21#include <linux/interrupt.h>
22#include <linux/errno.h>
23#include <linux/tty.h>
24#include <linux/tty_flip.h>
25#include <linux/mm.h>
26#include <linux/serial.h>
27#include <linux/fcntl.h>
28#include <linux/major.h>
29#include <linux/delay.h>
30#include <linux/slab.h>
31#include <linux/miscdevice.h>
32#include <linux/console.h>
33#include <linux/init.h>
34#include <asm/setup.h>
35#include <asm/bootinfo.h>
36
37#ifdef CONFIG_MVME147_SCC
38#include <asm/mvme147hw.h>
39#endif
40#ifdef CONFIG_MVME162_SCC
41#include <asm/mvme16xhw.h>
42#endif
43#ifdef CONFIG_BVME6000_SCC
44#include <asm/bvme6000hw.h>
45#endif
46
47#include <linux/generic_serial.h>
48#include "scc.h"
49
50
51#define CHANNEL_A 0
52#define CHANNEL_B 1
53
54#define SCC_MINOR_BASE 64
55
56/* Shadows for all SCC write registers */
57static unsigned char scc_shadow[2][16];
58
59/* Location to access for SCC register access delay */
60static volatile unsigned char *scc_del = NULL;
61
62/* To keep track of STATUS_REG state for detection of Ext/Status int source */
63static unsigned char scc_last_status_reg[2];
64
65/***************************** Prototypes *****************************/
66
67/* Function prototypes */
68static void scc_disable_tx_interrupts(void * ptr);
69static void scc_enable_tx_interrupts(void * ptr);
70static void scc_disable_rx_interrupts(void * ptr);
71static void scc_enable_rx_interrupts(void * ptr);
31f35939 72static int scc_carrier_raised(struct tty_port *port);
1da177e4
LT
73static void scc_shutdown_port(void * ptr);
74static int scc_set_real_termios(void *ptr);
75static void scc_hungup(void *ptr);
76static void scc_close(void *ptr);
77static int scc_chars_in_buffer(void * ptr);
78static int scc_open(struct tty_struct * tty, struct file * filp);
79static int scc_ioctl(struct tty_struct * tty, struct file * filp,
80 unsigned int cmd, unsigned long arg);
81static void scc_throttle(struct tty_struct *tty);
82static void scc_unthrottle(struct tty_struct *tty);
7d12e780
DH
83static irqreturn_t scc_tx_int(int irq, void *data);
84static irqreturn_t scc_rx_int(int irq, void *data);
85static irqreturn_t scc_stat_int(int irq, void *data);
86static irqreturn_t scc_spcond_int(int irq, void *data);
1da177e4 87static void scc_setsignals(struct scc_port *port, int dtr, int rts);
9e98966c 88static int scc_break_ctl(struct tty_struct *tty, int break_state);
1da177e4
LT
89
90static struct tty_driver *scc_driver;
91
eb4db450 92static struct scc_port scc_ports[2];
1da177e4
LT
93
94/*---------------------------------------------------------------------------
95 * Interface from generic_serial.c back here
96 *--------------------------------------------------------------------------*/
97
98static struct real_driver scc_real_driver = {
99 scc_disable_tx_interrupts,
100 scc_enable_tx_interrupts,
101 scc_disable_rx_interrupts,
102 scc_enable_rx_interrupts,
1da177e4
LT
103 scc_shutdown_port,
104 scc_set_real_termios,
105 scc_chars_in_buffer,
106 scc_close,
107 scc_hungup,
108 NULL
109};
110
111
b68e31d0 112static const struct tty_operations scc_ops = {
1da177e4
LT
113 .open = scc_open,
114 .close = gs_close,
115 .write = gs_write,
116 .put_char = gs_put_char,
117 .flush_chars = gs_flush_chars,
118 .write_room = gs_write_room,
119 .chars_in_buffer = gs_chars_in_buffer,
120 .flush_buffer = gs_flush_buffer,
121 .ioctl = scc_ioctl,
122 .throttle = scc_throttle,
123 .unthrottle = scc_unthrottle,
124 .set_termios = gs_set_termios,
125 .stop = gs_stop,
126 .start = gs_start,
127 .hangup = gs_hangup,
128 .break_ctl = scc_break_ctl,
129};
130
31f35939
AC
131static const struct tty_port_operations scc_port_ops = {
132 .carrier_raised = scc_carrier_raised,
133};
134
1da177e4
LT
135/*----------------------------------------------------------------------------
136 * vme_scc_init() and support functions
137 *---------------------------------------------------------------------------*/
138
139static int scc_init_drivers(void)
140{
141 int error;
142
143 scc_driver = alloc_tty_driver(2);
144 if (!scc_driver)
145 return -ENOMEM;
146 scc_driver->owner = THIS_MODULE;
147 scc_driver->driver_name = "scc";
148 scc_driver->name = "ttyS";
1da177e4
LT
149 scc_driver->major = TTY_MAJOR;
150 scc_driver->minor_start = SCC_MINOR_BASE;
151 scc_driver->type = TTY_DRIVER_TYPE_SERIAL;
152 scc_driver->subtype = SERIAL_TYPE_NORMAL;
153 scc_driver->init_termios = tty_std_termios;
154 scc_driver->init_termios.c_cflag =
155 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
606d099c
AC
156 scc_driver->init_termios.c_ispeed = 9600;
157 scc_driver->init_termios.c_ospeed = 9600;
1da177e4
LT
158 scc_driver->flags = TTY_DRIVER_REAL_RAW;
159 tty_set_operations(scc_driver, &scc_ops);
160
161 if ((error = tty_register_driver(scc_driver))) {
162 printk(KERN_ERR "scc: Couldn't register scc driver, error = %d\n",
163 error);
164 put_tty_driver(scc_driver);
165 return 1;
166 }
167
168 return 0;
169}
170
171
172/* ports[] array is indexed by line no (i.e. [0] for ttyS0, [1] for ttyS1).
173 */
174
175static void scc_init_portstructs(void)
176{
177 struct scc_port *port;
178 int i;
179
180 for (i = 0; i < 2; i++) {
181 port = scc_ports + i;
31f35939
AC
182 tty_port_init(&port->gs.port);
183 port->gs.port.ops = &scc_port_ops;
1da177e4
LT
184 port->gs.magic = SCC_MAGIC;
185 port->gs.close_delay = HZ/2;
186 port->gs.closing_wait = 30 * HZ;
187 port->gs.rd = &scc_real_driver;
188#ifdef NEW_WRITE_LOCKING
81861d78 189 port->gs.port_write_mutex = MUTEX;
1da177e4 190#endif
732730d4
GU
191 init_waitqueue_head(&port->gs.port.open_wait);
192 init_waitqueue_head(&port->gs.port.close_wait);
1da177e4
LT
193 }
194}
195
196
197#ifdef CONFIG_MVME147_SCC
198static int mvme147_scc_init(void)
199{
200 struct scc_port *port;
201
202 printk(KERN_INFO "SCC: MVME147 Serial Driver\n");
203 /* Init channel A */
204 port = &scc_ports[0];
205 port->channel = CHANNEL_A;
206 port->ctrlp = (volatile unsigned char *)M147_SCC_A_ADDR;
207 port->datap = port->ctrlp + 1;
208 port->port_a = &scc_ports[0];
209 port->port_b = &scc_ports[1];
0f2ed4c6 210 request_irq(MVME147_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
1da177e4 211 "SCC-A TX", port);
0f2ed4c6 212 request_irq(MVME147_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
1da177e4 213 "SCC-A status", port);
0f2ed4c6 214 request_irq(MVME147_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
1da177e4 215 "SCC-A RX", port);
0f2ed4c6 216 request_irq(MVME147_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
1da177e4
LT
217 "SCC-A special cond", port);
218 {
219 SCC_ACCESS_INIT(port);
220
221 /* disable interrupts for this channel */
222 SCCwrite(INT_AND_DMA_REG, 0);
223 /* Set the interrupt vector */
224 SCCwrite(INT_VECTOR_REG, MVME147_IRQ_SCC_BASE);
225 /* Interrupt parameters: vector includes status, status low */
226 SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
227 SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
228 }
229
230 /* Init channel B */
231 port = &scc_ports[1];
232 port->channel = CHANNEL_B;
233 port->ctrlp = (volatile unsigned char *)M147_SCC_B_ADDR;
234 port->datap = port->ctrlp + 1;
235 port->port_a = &scc_ports[0];
236 port->port_b = &scc_ports[1];
0f2ed4c6 237 request_irq(MVME147_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
1da177e4 238 "SCC-B TX", port);
0f2ed4c6 239 request_irq(MVME147_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
1da177e4 240 "SCC-B status", port);
0f2ed4c6 241 request_irq(MVME147_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
1da177e4 242 "SCC-B RX", port);
0f2ed4c6 243 request_irq(MVME147_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
1da177e4
LT
244 "SCC-B special cond", port);
245 {
246 SCC_ACCESS_INIT(port);
247
248 /* disable interrupts for this channel */
249 SCCwrite(INT_AND_DMA_REG, 0);
250 }
251
252 /* Ensure interrupts are enabled in the PCC chip */
253 m147_pcc->serial_cntrl=PCC_LEVEL_SERIAL|PCC_INT_ENAB;
254
255 /* Initialise the tty driver structures and register */
256 scc_init_portstructs();
257 scc_init_drivers();
258
259 return 0;
260}
261#endif
262
263
264#ifdef CONFIG_MVME162_SCC
265static int mvme162_scc_init(void)
266{
267 struct scc_port *port;
268
269 if (!(mvme16x_config & MVME16x_CONFIG_GOT_SCCA))
270 return (-ENODEV);
271
272 printk(KERN_INFO "SCC: MVME162 Serial Driver\n");
273 /* Init channel A */
274 port = &scc_ports[0];
275 port->channel = CHANNEL_A;
276 port->ctrlp = (volatile unsigned char *)MVME_SCC_A_ADDR;
277 port->datap = port->ctrlp + 2;
278 port->port_a = &scc_ports[0];
279 port->port_b = &scc_ports[1];
0f2ed4c6 280 request_irq(MVME162_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
1da177e4 281 "SCC-A TX", port);
0f2ed4c6 282 request_irq(MVME162_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
1da177e4 283 "SCC-A status", port);
0f2ed4c6 284 request_irq(MVME162_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
1da177e4 285 "SCC-A RX", port);
0f2ed4c6 286 request_irq(MVME162_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
1da177e4
LT
287 "SCC-A special cond", port);
288 {
289 SCC_ACCESS_INIT(port);
290
291 /* disable interrupts for this channel */
292 SCCwrite(INT_AND_DMA_REG, 0);
293 /* Set the interrupt vector */
294 SCCwrite(INT_VECTOR_REG, MVME162_IRQ_SCC_BASE);
295 /* Interrupt parameters: vector includes status, status low */
296 SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
297 SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
298 }
299
300 /* Init channel B */
301 port = &scc_ports[1];
302 port->channel = CHANNEL_B;
303 port->ctrlp = (volatile unsigned char *)MVME_SCC_B_ADDR;
304 port->datap = port->ctrlp + 2;
305 port->port_a = &scc_ports[0];
306 port->port_b = &scc_ports[1];
0f2ed4c6 307 request_irq(MVME162_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
1da177e4 308 "SCC-B TX", port);
0f2ed4c6 309 request_irq(MVME162_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
1da177e4 310 "SCC-B status", port);
0f2ed4c6 311 request_irq(MVME162_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
1da177e4 312 "SCC-B RX", port);
0f2ed4c6 313 request_irq(MVME162_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
1da177e4
LT
314 "SCC-B special cond", port);
315
316 {
317 SCC_ACCESS_INIT(port); /* Either channel will do */
318
319 /* disable interrupts for this channel */
320 SCCwrite(INT_AND_DMA_REG, 0);
321 }
322
323 /* Ensure interrupts are enabled in the MC2 chip */
324 *(volatile char *)0xfff4201d = 0x14;
325
326 /* Initialise the tty driver structures and register */
327 scc_init_portstructs();
328 scc_init_drivers();
329
330 return 0;
331}
332#endif
333
334
335#ifdef CONFIG_BVME6000_SCC
336static int bvme6000_scc_init(void)
337{
338 struct scc_port *port;
339
340 printk(KERN_INFO "SCC: BVME6000 Serial Driver\n");
341 /* Init channel A */
342 port = &scc_ports[0];
343 port->channel = CHANNEL_A;
344 port->ctrlp = (volatile unsigned char *)BVME_SCC_A_ADDR;
345 port->datap = port->ctrlp + 4;
346 port->port_a = &scc_ports[0];
347 port->port_b = &scc_ports[1];
0f2ed4c6 348 request_irq(BVME_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
1da177e4 349 "SCC-A TX", port);
0f2ed4c6 350 request_irq(BVME_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
1da177e4 351 "SCC-A status", port);
0f2ed4c6 352 request_irq(BVME_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
1da177e4 353 "SCC-A RX", port);
0f2ed4c6 354 request_irq(BVME_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
1da177e4
LT
355 "SCC-A special cond", port);
356 {
357 SCC_ACCESS_INIT(port);
358
359 /* disable interrupts for this channel */
360 SCCwrite(INT_AND_DMA_REG, 0);
361 /* Set the interrupt vector */
362 SCCwrite(INT_VECTOR_REG, BVME_IRQ_SCC_BASE);
363 /* Interrupt parameters: vector includes status, status low */
364 SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
365 SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
366 }
367
368 /* Init channel B */
369 port = &scc_ports[1];
370 port->channel = CHANNEL_B;
371 port->ctrlp = (volatile unsigned char *)BVME_SCC_B_ADDR;
372 port->datap = port->ctrlp + 4;
373 port->port_a = &scc_ports[0];
374 port->port_b = &scc_ports[1];
0f2ed4c6 375 request_irq(BVME_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
1da177e4 376 "SCC-B TX", port);
0f2ed4c6 377 request_irq(BVME_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
1da177e4 378 "SCC-B status", port);
0f2ed4c6 379 request_irq(BVME_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
1da177e4 380 "SCC-B RX", port);
0f2ed4c6 381 request_irq(BVME_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
1da177e4
LT
382 "SCC-B special cond", port);
383
384 {
385 SCC_ACCESS_INIT(port); /* Either channel will do */
386
387 /* disable interrupts for this channel */
388 SCCwrite(INT_AND_DMA_REG, 0);
389 }
390
391 /* Initialise the tty driver structures and register */
392 scc_init_portstructs();
393 scc_init_drivers();
394
395 return 0;
396}
397#endif
398
399
400static int vme_scc_init(void)
401{
402 int res = -ENODEV;
403
404#ifdef CONFIG_MVME147_SCC
405 if (MACH_IS_MVME147)
406 res = mvme147_scc_init();
407#endif
408#ifdef CONFIG_MVME162_SCC
409 if (MACH_IS_MVME16x)
410 res = mvme162_scc_init();
411#endif
412#ifdef CONFIG_BVME6000_SCC
413 if (MACH_IS_BVME6000)
414 res = bvme6000_scc_init();
415#endif
416 return res;
417}
418
419module_init(vme_scc_init);
420
421
422/*---------------------------------------------------------------------------
423 * Interrupt handlers
424 *--------------------------------------------------------------------------*/
425
7d12e780 426static irqreturn_t scc_rx_int(int irq, void *data)
1da177e4
LT
427{
428 unsigned char ch;
429 struct scc_port *port = data;
732730d4 430 struct tty_struct *tty = port->gs.port.tty;
1da177e4
LT
431 SCC_ACCESS_INIT(port);
432
433 ch = SCCread_NB(RX_DATA_REG);
434 if (!tty) {
435 printk(KERN_WARNING "scc_rx_int with NULL tty!\n");
436 SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
437 return IRQ_HANDLED;
438 }
33f0f88f 439 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT
440
441 /* Check if another character is already ready; in that case, the
442 * spcond_int() function must be used, because this character may have an
443 * error condition that isn't signalled by the interrupt vector used!
444 */
445 if (SCCread(INT_PENDING_REG) &
446 (port->channel == CHANNEL_A ? IPR_A_RX : IPR_B_RX)) {
7d12e780 447 scc_spcond_int (irq, data);
1da177e4
LT
448 return IRQ_HANDLED;
449 }
450
451 SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
452
453 tty_flip_buffer_push(tty);
454 return IRQ_HANDLED;
455}
456
457
7d12e780 458static irqreturn_t scc_spcond_int(int irq, void *data)
1da177e4
LT
459{
460 struct scc_port *port = data;
732730d4 461 struct tty_struct *tty = port->gs.port.tty;
1da177e4
LT
462 unsigned char stat, ch, err;
463 int int_pending_mask = port->channel == CHANNEL_A ?
464 IPR_A_RX : IPR_B_RX;
465 SCC_ACCESS_INIT(port);
466
467 if (!tty) {
468 printk(KERN_WARNING "scc_spcond_int with NULL tty!\n");
469 SCCwrite(COMMAND_REG, CR_ERROR_RESET);
470 SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
471 return IRQ_HANDLED;
472 }
473 do {
474 stat = SCCread(SPCOND_STATUS_REG);
475 ch = SCCread_NB(RX_DATA_REG);
476
477 if (stat & SCSR_RX_OVERRUN)
478 err = TTY_OVERRUN;
479 else if (stat & SCSR_PARITY_ERR)
480 err = TTY_PARITY;
481 else if (stat & SCSR_CRC_FRAME_ERR)
482 err = TTY_FRAME;
483 else
484 err = 0;
485
33f0f88f 486 tty_insert_flip_char(tty, ch, err);
1da177e4
LT
487
488 /* ++TeSche: *All* errors have to be cleared manually,
489 * else the condition persists for the next chars
490 */
491 if (err)
492 SCCwrite(COMMAND_REG, CR_ERROR_RESET);
493
494 } while(SCCread(INT_PENDING_REG) & int_pending_mask);
495
496 SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
497
498 tty_flip_buffer_push(tty);
499 return IRQ_HANDLED;
500}
501
502
7d12e780 503static irqreturn_t scc_tx_int(int irq, void *data)
1da177e4
LT
504{
505 struct scc_port *port = data;
506 SCC_ACCESS_INIT(port);
507
732730d4 508 if (!port->gs.port.tty) {
1da177e4
LT
509 printk(KERN_WARNING "scc_tx_int with NULL tty!\n");
510 SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
511 SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET);
512 SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
513 return IRQ_HANDLED;
514 }
515 while ((SCCread_NB(STATUS_REG) & SR_TX_BUF_EMPTY)) {
516 if (port->x_char) {
517 SCCwrite(TX_DATA_REG, port->x_char);
518 port->x_char = 0;
519 }
732730d4
GU
520 else if ((port->gs.xmit_cnt <= 0) ||
521 port->gs.port.tty->stopped ||
522 port->gs.port.tty->hw_stopped)
1da177e4
LT
523 break;
524 else {
525 SCCwrite(TX_DATA_REG, port->gs.xmit_buf[port->gs.xmit_tail++]);
526 port->gs.xmit_tail = port->gs.xmit_tail & (SERIAL_XMIT_SIZE-1);
527 if (--port->gs.xmit_cnt <= 0)
528 break;
529 }
530 }
732730d4
GU
531 if ((port->gs.xmit_cnt <= 0) || port->gs.port.tty->stopped ||
532 port->gs.port.tty->hw_stopped) {
1da177e4
LT
533 /* disable tx interrupts */
534 SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
535 SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET); /* disable tx_int on next tx underrun? */
732730d4 536 port->gs.port.flags &= ~GS_TX_INTEN;
1da177e4 537 }
732730d4
GU
538 if (port->gs.port.tty && port->gs.xmit_cnt <= port->gs.wakeup_chars)
539 tty_wakeup(port->gs.port.tty);
1da177e4
LT
540
541 SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
542 return IRQ_HANDLED;
543}
544
545
7d12e780 546static irqreturn_t scc_stat_int(int irq, void *data)
1da177e4
LT
547{
548 struct scc_port *port = data;
549 unsigned channel = port->channel;
550 unsigned char last_sr, sr, changed;
551 SCC_ACCESS_INIT(port);
552
553 last_sr = scc_last_status_reg[channel];
554 sr = scc_last_status_reg[channel] = SCCread_NB(STATUS_REG);
555 changed = last_sr ^ sr;
556
557 if (changed & SR_DCD) {
558 port->c_dcd = !!(sr & SR_DCD);
732730d4 559 if (!(port->gs.port.flags & ASYNC_CHECK_CD))
1da177e4
LT
560 ; /* Don't report DCD changes */
561 else if (port->c_dcd) {
732730d4 562 wake_up_interruptible(&port->gs.port.open_wait);
1da177e4
LT
563 }
564 else {
732730d4
GU
565 if (port->gs.port.tty)
566 tty_hangup (port->gs.port.tty);
1da177e4
LT
567 }
568 }
569 SCCwrite(COMMAND_REG, CR_EXTSTAT_RESET);
570 SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
571 return IRQ_HANDLED;
572}
573
574
575/*---------------------------------------------------------------------------
576 * generic_serial.c callback funtions
577 *--------------------------------------------------------------------------*/
578
579static void scc_disable_tx_interrupts(void *ptr)
580{
581 struct scc_port *port = ptr;
582 unsigned long flags;
583 SCC_ACCESS_INIT(port);
584
585 local_irq_save(flags);
586 SCCmod(INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
732730d4 587 port->gs.port.flags &= ~GS_TX_INTEN;
1da177e4
LT
588 local_irq_restore(flags);
589}
590
591
592static void scc_enable_tx_interrupts(void *ptr)
593{
594 struct scc_port *port = ptr;
595 unsigned long flags;
596 SCC_ACCESS_INIT(port);
597
598 local_irq_save(flags);
599 SCCmod(INT_AND_DMA_REG, 0xff, IDR_TX_INT_ENAB);
600 /* restart the transmitter */
2850bc27 601 scc_tx_int (0, port);
1da177e4
LT
602 local_irq_restore(flags);
603}
604
605
606static void scc_disable_rx_interrupts(void *ptr)
607{
608 struct scc_port *port = ptr;
609 unsigned long flags;
610 SCC_ACCESS_INIT(port);
611
612 local_irq_save(flags);
613 SCCmod(INT_AND_DMA_REG,
614 ~(IDR_RX_INT_MASK|IDR_PARERR_AS_SPCOND|IDR_EXTSTAT_INT_ENAB), 0);
615 local_irq_restore(flags);
616}
617
618
619static void scc_enable_rx_interrupts(void *ptr)
620{
621 struct scc_port *port = ptr;
622 unsigned long flags;
623 SCC_ACCESS_INIT(port);
624
625 local_irq_save(flags);
626 SCCmod(INT_AND_DMA_REG, 0xff,
627 IDR_EXTSTAT_INT_ENAB|IDR_PARERR_AS_SPCOND|IDR_RX_INT_ALL);
628 local_irq_restore(flags);
629}
630
631
31f35939 632static int scc_carrier_raised(struct tty_port *port)
1da177e4 633{
36c621d8
AC
634 struct scc_port *sc = container_of(port, struct scc_port, gs.port);
635 unsigned channel = sc->channel;
1da177e4
LT
636
637 return !!(scc_last_status_reg[channel] & SR_DCD);
638}
639
640
641static void scc_shutdown_port(void *ptr)
642{
643 struct scc_port *port = ptr;
644
732730d4 645 port->gs.port.flags &= ~ GS_ACTIVE;
36c621d8 646 if (port->gs.port.tty && (port->gs.port.tty->termios->c_cflag & HUPCL)) {
1da177e4
LT
647 scc_setsignals (port, 0, 0);
648 }
649}
650
651
652static int scc_set_real_termios (void *ptr)
653{
654 /* the SCC has char sizes 5,7,6,8 in that order! */
655 static int chsize_map[4] = { 0, 2, 1, 3 };
656 unsigned cflag, baud, chsize, channel, brgval = 0;
657 unsigned long flags;
658 struct scc_port *port = ptr;
659 SCC_ACCESS_INIT(port);
660
732730d4 661 if (!port->gs.port.tty || !port->gs.port.tty->termios) return 0;
1da177e4
LT
662
663 channel = port->channel;
664
665 if (channel == CHANNEL_A)
666 return 0; /* Settings controlled by boot PROM */
667
732730d4 668 cflag = port->gs.port.tty->termios->c_cflag;
1da177e4
LT
669 baud = port->gs.baud;
670 chsize = (cflag & CSIZE) >> 4;
671
672 if (baud == 0) {
673 /* speed == 0 -> drop DTR */
674 local_irq_save(flags);
675 SCCmod(TX_CTRL_REG, ~TCR_DTR, 0);
676 local_irq_restore(flags);
677 return 0;
678 }
679 else if ((MACH_IS_MVME16x && (baud < 50 || baud > 38400)) ||
680 (MACH_IS_MVME147 && (baud < 50 || baud > 19200)) ||
681 (MACH_IS_BVME6000 &&(baud < 50 || baud > 76800))) {
682 printk(KERN_NOTICE "SCC: Bad speed requested, %d\n", baud);
683 return 0;
684 }
685
686 if (cflag & CLOCAL)
732730d4 687 port->gs.port.flags &= ~ASYNC_CHECK_CD;
1da177e4 688 else
732730d4 689 port->gs.port.flags |= ASYNC_CHECK_CD;
1da177e4
LT
690
691#ifdef CONFIG_MVME147_SCC
692 if (MACH_IS_MVME147)
693 brgval = (M147_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
694#endif
695#ifdef CONFIG_MVME162_SCC
696 if (MACH_IS_MVME16x)
697 brgval = (MVME_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
698#endif
699#ifdef CONFIG_BVME6000_SCC
700 if (MACH_IS_BVME6000)
701 brgval = (BVME_SCC_RTxC + baud/2) / (16 * 2 * baud) - 2;
702#endif
703 /* Now we have all parameters and can go to set them: */
704 local_irq_save(flags);
705
706 /* receiver's character size and auto-enables */
707 SCCmod(RX_CTRL_REG, ~(RCR_CHSIZE_MASK|RCR_AUTO_ENAB_MODE),
708 (chsize_map[chsize] << 6) |
709 ((cflag & CRTSCTS) ? RCR_AUTO_ENAB_MODE : 0));
710 /* parity and stop bits (both, Tx and Rx), clock mode never changes */
711 SCCmod (AUX1_CTRL_REG,
712 ~(A1CR_PARITY_MASK | A1CR_MODE_MASK),
713 ((cflag & PARENB
714 ? (cflag & PARODD ? A1CR_PARITY_ODD : A1CR_PARITY_EVEN)
715 : A1CR_PARITY_NONE)
716 | (cflag & CSTOPB ? A1CR_MODE_ASYNC_2 : A1CR_MODE_ASYNC_1)));
717 /* sender's character size, set DTR for valid baud rate */
718 SCCmod(TX_CTRL_REG, ~TCR_CHSIZE_MASK, chsize_map[chsize] << 5 | TCR_DTR);
719 /* clock sources never change */
720 /* disable BRG before changing the value */
721 SCCmod(DPLL_CTRL_REG, ~DCR_BRG_ENAB, 0);
722 /* BRG value */
723 SCCwrite(TIMER_LOW_REG, brgval & 0xff);
724 SCCwrite(TIMER_HIGH_REG, (brgval >> 8) & 0xff);
725 /* BRG enable, and clock source never changes */
726 SCCmod(DPLL_CTRL_REG, 0xff, DCR_BRG_ENAB);
727
728 local_irq_restore(flags);
729
730 return 0;
731}
732
733
734static int scc_chars_in_buffer (void *ptr)
735{
736 struct scc_port *port = ptr;
737 SCC_ACCESS_INIT(port);
738
739 return (SCCread (SPCOND_STATUS_REG) & SCSR_ALL_SENT) ? 0 : 1;
740}
741
742
743/* Comment taken from sx.c (2.4.0):
744 I haven't the foggiest why the decrement use count has to happen
745 here. The whole linux serial drivers stuff needs to be redesigned.
746 My guess is that this is a hack to minimize the impact of a bug
747 elsewhere. Thinking about it some more. (try it sometime) Try
748 running minicom on a serial port that is driven by a modularized
749 driver. Have the modem hangup. Then remove the driver module. Then
750 exit minicom. I expect an "oops". -- REW */
751
752static void scc_hungup(void *ptr)
753{
754 scc_disable_tx_interrupts(ptr);
755 scc_disable_rx_interrupts(ptr);
756}
757
758
759static void scc_close(void *ptr)
760{
761 scc_disable_tx_interrupts(ptr);
762 scc_disable_rx_interrupts(ptr);
763}
764
765
766/*---------------------------------------------------------------------------
767 * Internal support functions
768 *--------------------------------------------------------------------------*/
769
770static void scc_setsignals(struct scc_port *port, int dtr, int rts)
771{
772 unsigned long flags;
773 unsigned char t;
774 SCC_ACCESS_INIT(port);
775
776 local_irq_save(flags);
777 t = SCCread(TX_CTRL_REG);
778 if (dtr >= 0) t = dtr? (t | TCR_DTR): (t & ~TCR_DTR);
779 if (rts >= 0) t = rts? (t | TCR_RTS): (t & ~TCR_RTS);
780 SCCwrite(TX_CTRL_REG, t);
781 local_irq_restore(flags);
782}
783
784
785static void scc_send_xchar(struct tty_struct *tty, char ch)
786{
787 struct scc_port *port = (struct scc_port *)tty->driver_data;
788
789 port->x_char = ch;
790 if (ch)
791 scc_enable_tx_interrupts(port);
792}
793
794
795/*---------------------------------------------------------------------------
796 * Driver entrypoints referenced from above
797 *--------------------------------------------------------------------------*/
798
799static int scc_open (struct tty_struct * tty, struct file * filp)
800{
801 int line = tty->index;
802 int retval;
803 struct scc_port *port = &scc_ports[line];
804 int i, channel = port->channel;
805 unsigned long flags;
806 SCC_ACCESS_INIT(port);
807#if defined(CONFIG_MVME162_SCC) || defined(CONFIG_MVME147_SCC)
808 static const struct {
809 unsigned reg, val;
810 } mvme_init_tab[] = {
811 /* Values for MVME162 and MVME147 */
812 /* no parity, 1 stop bit, async, 1:16 */
813 { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
814 /* parity error is special cond, ints disabled, no DMA */
815 { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
816 /* Rx 8 bits/char, no auto enable, Rx off */
817 { RX_CTRL_REG, RCR_CHSIZE_8 },
818 /* DTR off, Tx 8 bits/char, RTS off, Tx off */
819 { TX_CTRL_REG, TCR_CHSIZE_8 },
820 /* special features off */
821 { AUX2_CTRL_REG, 0 },
822 { CLK_CTRL_REG, CCR_RXCLK_BRG | CCR_TXCLK_BRG },
823 { DPLL_CTRL_REG, DCR_BRG_ENAB | DCR_BRG_USE_PCLK },
824 /* Start Rx */
825 { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
826 /* Start Tx */
827 { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
828 /* Ext/Stat ints: DCD only */
829 { INT_CTRL_REG, ICR_ENAB_DCD_INT },
830 /* Reset Ext/Stat ints */
831 { COMMAND_REG, CR_EXTSTAT_RESET },
832 /* ...again */
833 { COMMAND_REG, CR_EXTSTAT_RESET },
834 };
835#endif
836#if defined(CONFIG_BVME6000_SCC)
837 static const struct {
838 unsigned reg, val;
839 } bvme_init_tab[] = {
840 /* Values for BVME6000 */
841 /* no parity, 1 stop bit, async, 1:16 */
842 { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
843 /* parity error is special cond, ints disabled, no DMA */
844 { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
845 /* Rx 8 bits/char, no auto enable, Rx off */
846 { RX_CTRL_REG, RCR_CHSIZE_8 },
847 /* DTR off, Tx 8 bits/char, RTS off, Tx off */
848 { TX_CTRL_REG, TCR_CHSIZE_8 },
849 /* special features off */
850 { AUX2_CTRL_REG, 0 },
851 { CLK_CTRL_REG, CCR_RTxC_XTAL | CCR_RXCLK_BRG | CCR_TXCLK_BRG },
852 { DPLL_CTRL_REG, DCR_BRG_ENAB },
853 /* Start Rx */
854 { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
855 /* Start Tx */
856 { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
857 /* Ext/Stat ints: DCD only */
858 { INT_CTRL_REG, ICR_ENAB_DCD_INT },
859 /* Reset Ext/Stat ints */
860 { COMMAND_REG, CR_EXTSTAT_RESET },
861 /* ...again */
862 { COMMAND_REG, CR_EXTSTAT_RESET },
863 };
864#endif
732730d4 865 if (!(port->gs.port.flags & ASYNC_INITIALIZED)) {
1da177e4
LT
866 local_irq_save(flags);
867#if defined(CONFIG_MVME147_SCC) || defined(CONFIG_MVME162_SCC)
868 if (MACH_IS_MVME147 || MACH_IS_MVME16x) {
fe971071 869 for (i = 0; i < ARRAY_SIZE(mvme_init_tab); ++i)
1da177e4
LT
870 SCCwrite(mvme_init_tab[i].reg, mvme_init_tab[i].val);
871 }
872#endif
873#if defined(CONFIG_BVME6000_SCC)
874 if (MACH_IS_BVME6000) {
fe971071 875 for (i = 0; i < ARRAY_SIZE(bvme_init_tab); ++i)
1da177e4
LT
876 SCCwrite(bvme_init_tab[i].reg, bvme_init_tab[i].val);
877 }
878#endif
879
880 /* remember status register for detection of DCD and CTS changes */
881 scc_last_status_reg[channel] = SCCread(STATUS_REG);
882
883 port->c_dcd = 0; /* Prevent initial 1->0 interrupt */
884 scc_setsignals (port, 1,1);
885 local_irq_restore(flags);
886 }
887
888 tty->driver_data = port;
732730d4
GU
889 port->gs.port.tty = tty;
890 port->gs.port.count++;
1da177e4
LT
891 retval = gs_init_port(&port->gs);
892 if (retval) {
732730d4 893 port->gs.port.count--;
1da177e4
LT
894 return retval;
895 }
732730d4 896 port->gs.port.flags |= GS_ACTIVE;
1da177e4
LT
897 retval = gs_block_til_ready(port, filp);
898
899 if (retval) {
732730d4 900 port->gs.port.count--;
1da177e4
LT
901 return retval;
902 }
903
31f35939 904 port->c_dcd = tty_port_carrier_raised(&port->gs.port);
1da177e4
LT
905
906 scc_enable_rx_interrupts(port);
907
908 return 0;
909}
910
911
912static void scc_throttle (struct tty_struct * tty)
913{
914 struct scc_port *port = (struct scc_port *)tty->driver_data;
915 unsigned long flags;
916 SCC_ACCESS_INIT(port);
917
918 if (tty->termios->c_cflag & CRTSCTS) {
919 local_irq_save(flags);
920 SCCmod(TX_CTRL_REG, ~TCR_RTS, 0);
921 local_irq_restore(flags);
922 }
923 if (I_IXOFF(tty))
924 scc_send_xchar(tty, STOP_CHAR(tty));
925}
926
927
928static void scc_unthrottle (struct tty_struct * tty)
929{
930 struct scc_port *port = (struct scc_port *)tty->driver_data;
931 unsigned long flags;
932 SCC_ACCESS_INIT(port);
933
934 if (tty->termios->c_cflag & CRTSCTS) {
935 local_irq_save(flags);
936 SCCmod(TX_CTRL_REG, 0xff, TCR_RTS);
937 local_irq_restore(flags);
938 }
939 if (I_IXOFF(tty))
940 scc_send_xchar(tty, START_CHAR(tty));
941}
942
943
944static int scc_ioctl(struct tty_struct *tty, struct file *file,
945 unsigned int cmd, unsigned long arg)
946{
947 return -ENOIOCTLCMD;
948}
949
950
9e98966c 951static int scc_break_ctl(struct tty_struct *tty, int break_state)
1da177e4
LT
952{
953 struct scc_port *port = (struct scc_port *)tty->driver_data;
954 unsigned long flags;
955 SCC_ACCESS_INIT(port);
956
957 local_irq_save(flags);
958 SCCmod(TX_CTRL_REG, ~TCR_SEND_BREAK,
959 break_state ? TCR_SEND_BREAK : 0);
960 local_irq_restore(flags);
9e98966c 961 return 0;
1da177e4
LT
962}
963
964
965/*---------------------------------------------------------------------------
966 * Serial console stuff...
967 *--------------------------------------------------------------------------*/
968
969#define scc_delay() do { __asm__ __volatile__ (" nop; nop"); } while (0)
970
971static void scc_ch_write (char ch)
972{
973 volatile char *p = NULL;
974
975#ifdef CONFIG_MVME147_SCC
976 if (MACH_IS_MVME147)
977 p = (volatile char *)M147_SCC_A_ADDR;
978#endif
979#ifdef CONFIG_MVME162_SCC
980 if (MACH_IS_MVME16x)
981 p = (volatile char *)MVME_SCC_A_ADDR;
982#endif
983#ifdef CONFIG_BVME6000_SCC
984 if (MACH_IS_BVME6000)
985 p = (volatile char *)BVME_SCC_A_ADDR;
986#endif
987
988 do {
989 scc_delay();
990 }
991 while (!(*p & 4));
992 scc_delay();
993 *p = 8;
994 scc_delay();
995 *p = ch;
996}
997
998/* The console must be locked when we get here. */
999
1000static void scc_console_write (struct console *co, const char *str, unsigned count)
1001{
1002 unsigned long flags;
1003
1004 local_irq_save(flags);
1005
1006 while (count--)
1007 {
1008 if (*str == '\n')
1009 scc_ch_write ('\r');
1010 scc_ch_write (*str++);
1011 }
1012 local_irq_restore(flags);
1013}
1014
1015static struct tty_driver *scc_console_device(struct console *c, int *index)
1016{
1017 *index = c->index;
1018 return scc_driver;
1019}
1020
1da177e4
LT
1021static struct console sercons = {
1022 .name = "ttyS",
1023 .write = scc_console_write,
1024 .device = scc_console_device,
1da177e4
LT
1025 .flags = CON_PRINTBUFFER,
1026 .index = -1,
1027};
1028
1029
1030static int __init vme_scc_console_init(void)
1031{
1032 if (vme_brdtype == VME_TYPE_MVME147 ||
1033 vme_brdtype == VME_TYPE_MVME162 ||
1034 vme_brdtype == VME_TYPE_MVME172 ||
1035 vme_brdtype == VME_TYPE_BVME4000 ||
1036 vme_brdtype == VME_TYPE_BVME6000)
1037 register_console(&sercons);
1038 return 0;
1039}
1040console_initcall(vme_scc_console_init);
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