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1da177e4 LT |
1 | /* |
2 | * sma cpu5 watchdog driver | |
3 | * | |
4 | * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/moduleparam.h> | |
24 | #include <linux/types.h> | |
25 | #include <linux/errno.h> | |
26 | #include <linux/miscdevice.h> | |
27 | #include <linux/fs.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/ioport.h> | |
30 | #include <linux/timer.h> | |
31 | #include <asm/io.h> | |
32 | #include <asm/uaccess.h> | |
33 | ||
34 | #include <linux/watchdog.h> | |
35 | ||
36 | /* adjustable parameters */ | |
37 | ||
38 | static int verbose = 0; | |
39 | static int port = 0x91; | |
40 | static int ticks = 10000; | |
41 | ||
42 | #define PFX "cpu5wdt: " | |
43 | ||
44 | #define CPU5WDT_EXTENT 0x0A | |
45 | ||
46 | #define CPU5WDT_STATUS_REG 0x00 | |
47 | #define CPU5WDT_TIME_A_REG 0x02 | |
48 | #define CPU5WDT_TIME_B_REG 0x03 | |
49 | #define CPU5WDT_MODE_REG 0x04 | |
50 | #define CPU5WDT_TRIGGER_REG 0x07 | |
51 | #define CPU5WDT_ENABLE_REG 0x08 | |
52 | #define CPU5WDT_RESET_REG 0x09 | |
53 | ||
54 | #define CPU5WDT_INTERVAL (HZ/10+1) | |
55 | ||
56 | /* some device data */ | |
57 | ||
58 | static struct { | |
59 | struct semaphore stop; | |
60 | volatile int running; | |
61 | struct timer_list timer; | |
62 | volatile int queue; | |
63 | int default_ticks; | |
64 | unsigned long inuse; | |
65 | } cpu5wdt_device; | |
66 | ||
67 | /* generic helper functions */ | |
68 | ||
69 | static void cpu5wdt_trigger(unsigned long unused) | |
70 | { | |
71 | if ( verbose > 2 ) | |
72 | printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks); | |
73 | ||
74 | if( cpu5wdt_device.running ) | |
75 | ticks--; | |
76 | ||
77 | /* keep watchdog alive */ | |
78 | outb(1, port + CPU5WDT_TRIGGER_REG); | |
79 | ||
80 | /* requeue?? */ | |
81 | if( cpu5wdt_device.queue && ticks ) { | |
82 | cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL; | |
83 | add_timer(&cpu5wdt_device.timer); | |
84 | } | |
85 | else { | |
86 | /* ticks doesn't matter anyway */ | |
87 | up(&cpu5wdt_device.stop); | |
88 | } | |
89 | ||
90 | } | |
91 | ||
92 | static void cpu5wdt_reset(void) | |
93 | { | |
94 | ticks = cpu5wdt_device.default_ticks; | |
95 | ||
96 | if ( verbose ) | |
97 | printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks); | |
98 | ||
99 | } | |
100 | ||
101 | static void cpu5wdt_start(void) | |
102 | { | |
103 | if ( !cpu5wdt_device.queue ) { | |
104 | cpu5wdt_device.queue = 1; | |
105 | outb(0, port + CPU5WDT_TIME_A_REG); | |
106 | outb(0, port + CPU5WDT_TIME_B_REG); | |
107 | outb(1, port + CPU5WDT_MODE_REG); | |
108 | outb(0, port + CPU5WDT_RESET_REG); | |
109 | outb(0, port + CPU5WDT_ENABLE_REG); | |
110 | cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL; | |
111 | add_timer(&cpu5wdt_device.timer); | |
112 | } | |
113 | /* if process dies, counter is not decremented */ | |
114 | cpu5wdt_device.running++; | |
115 | } | |
116 | ||
117 | static int cpu5wdt_stop(void) | |
118 | { | |
119 | if ( cpu5wdt_device.running ) | |
120 | cpu5wdt_device.running = 0; | |
121 | ||
122 | ticks = cpu5wdt_device.default_ticks; | |
123 | ||
124 | if ( verbose ) | |
125 | printk(KERN_CRIT PFX "stop not possible\n"); | |
126 | ||
127 | return -EIO; | |
128 | } | |
129 | ||
130 | /* filesystem operations */ | |
131 | ||
132 | static int cpu5wdt_open(struct inode *inode, struct file *file) | |
133 | { | |
134 | if ( test_and_set_bit(0, &cpu5wdt_device.inuse) ) | |
135 | return -EBUSY; | |
136 | ||
137 | return nonseekable_open(inode, file); | |
138 | } | |
139 | ||
140 | static int cpu5wdt_release(struct inode *inode, struct file *file) | |
141 | { | |
142 | clear_bit(0, &cpu5wdt_device.inuse); | |
143 | return 0; | |
144 | } | |
145 | ||
146 | static int cpu5wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) | |
147 | { | |
148 | void __user *argp = (void __user *)arg; | |
149 | unsigned int value; | |
150 | static struct watchdog_info ident = | |
151 | { | |
152 | .options = WDIOF_CARDRESET, | |
153 | .identity = "CPU5 WDT", | |
154 | }; | |
155 | ||
156 | switch(cmd) { | |
157 | case WDIOC_KEEPALIVE: | |
158 | cpu5wdt_reset(); | |
159 | break; | |
160 | case WDIOC_GETSTATUS: | |
161 | value = inb(port + CPU5WDT_STATUS_REG); | |
162 | value = (value >> 2) & 1; | |
163 | if ( copy_to_user(argp, &value, sizeof(int)) ) | |
164 | return -EFAULT; | |
165 | break; | |
166 | case WDIOC_GETSUPPORT: | |
167 | if ( copy_to_user(argp, &ident, sizeof(ident)) ) | |
168 | return -EFAULT; | |
169 | break; | |
170 | case WDIOC_SETOPTIONS: | |
171 | if ( copy_from_user(&value, argp, sizeof(int)) ) | |
172 | return -EFAULT; | |
173 | switch(value) { | |
174 | case WDIOS_ENABLECARD: | |
175 | cpu5wdt_start(); | |
176 | break; | |
177 | case WDIOS_DISABLECARD: | |
178 | return cpu5wdt_stop(); | |
179 | default: | |
180 | return -EINVAL; | |
181 | } | |
182 | break; | |
183 | default: | |
184 | return -ENOIOCTLCMD; | |
185 | } | |
186 | return 0; | |
187 | } | |
188 | ||
189 | static ssize_t cpu5wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) | |
190 | { | |
191 | if ( !count ) | |
192 | return -EIO; | |
193 | ||
194 | cpu5wdt_reset(); | |
195 | ||
196 | return count; | |
197 | } | |
198 | ||
199 | static struct file_operations cpu5wdt_fops = { | |
200 | .owner = THIS_MODULE, | |
201 | .llseek = no_llseek, | |
202 | .ioctl = cpu5wdt_ioctl, | |
203 | .open = cpu5wdt_open, | |
204 | .write = cpu5wdt_write, | |
205 | .release = cpu5wdt_release, | |
206 | }; | |
207 | ||
208 | static struct miscdevice cpu5wdt_misc = { | |
209 | .minor = WATCHDOG_MINOR, | |
210 | .name = "watchdog", | |
211 | .fops = &cpu5wdt_fops, | |
212 | }; | |
213 | ||
214 | /* init/exit function */ | |
215 | ||
216 | static int __devinit cpu5wdt_init(void) | |
217 | { | |
218 | unsigned int val; | |
219 | int err; | |
220 | ||
221 | if ( verbose ) | |
222 | printk(KERN_DEBUG PFX "port=0x%x, verbose=%i\n", port, verbose); | |
223 | ||
224 | if ( (err = misc_register(&cpu5wdt_misc)) < 0 ) { | |
225 | printk(KERN_ERR PFX "misc_register failed\n"); | |
226 | goto no_misc; | |
227 | } | |
228 | ||
229 | if ( !request_region(port, CPU5WDT_EXTENT, PFX) ) { | |
230 | printk(KERN_ERR PFX "request_region failed\n"); | |
231 | err = -EBUSY; | |
232 | goto no_port; | |
233 | } | |
234 | ||
235 | /* watchdog reboot? */ | |
236 | val = inb(port + CPU5WDT_STATUS_REG); | |
237 | val = (val >> 2) & 1; | |
238 | if ( !val ) | |
239 | printk(KERN_INFO PFX "sorry, was my fault\n"); | |
240 | ||
241 | init_MUTEX_LOCKED(&cpu5wdt_device.stop); | |
242 | cpu5wdt_device.queue = 0; | |
243 | ||
244 | clear_bit(0, &cpu5wdt_device.inuse); | |
245 | ||
246 | init_timer(&cpu5wdt_device.timer); | |
247 | cpu5wdt_device.timer.function = cpu5wdt_trigger; | |
248 | cpu5wdt_device.timer.data = 0; | |
249 | ||
250 | cpu5wdt_device.default_ticks = ticks; | |
251 | ||
252 | printk(KERN_INFO PFX "init success\n"); | |
253 | ||
254 | return 0; | |
255 | ||
256 | no_port: | |
257 | misc_deregister(&cpu5wdt_misc); | |
258 | no_misc: | |
259 | return err; | |
260 | } | |
261 | ||
262 | static int __devinit cpu5wdt_init_module(void) | |
263 | { | |
264 | return cpu5wdt_init(); | |
265 | } | |
266 | ||
267 | static void __devexit cpu5wdt_exit(void) | |
268 | { | |
269 | if ( cpu5wdt_device.queue ) { | |
270 | cpu5wdt_device.queue = 0; | |
271 | down(&cpu5wdt_device.stop); | |
272 | } | |
273 | ||
274 | misc_deregister(&cpu5wdt_misc); | |
275 | ||
276 | release_region(port, CPU5WDT_EXTENT); | |
277 | ||
278 | } | |
279 | ||
280 | static void __devexit cpu5wdt_exit_module(void) | |
281 | { | |
282 | cpu5wdt_exit(); | |
283 | } | |
284 | ||
285 | /* module entry points */ | |
286 | ||
287 | module_init(cpu5wdt_init_module); | |
288 | module_exit(cpu5wdt_exit_module); | |
289 | ||
290 | MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>"); | |
291 | MODULE_DESCRIPTION("sma cpu5 watchdog driver"); | |
292 | MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog"); | |
293 | MODULE_LICENSE("GPL"); | |
294 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
295 | ||
296 | module_param(port, int, 0); | |
297 | MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91"); | |
298 | ||
299 | module_param(verbose, int, 0); | |
300 | MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)"); | |
301 | ||
302 | module_param(ticks, int, 0); | |
303 | MODULE_PARM_DESC(ticks, "count down ticks, default is 10000"); |