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b9d36b85 RK |
1 | /* |
2 | * Watchdog driver for the mpcore watchdog timer | |
3 | * | |
4 | * (c) Copyright 2004 ARM Limited | |
5 | * | |
6 | * Based on the SoftDog driver: | |
7 | * (c) Copyright 1996 Alan Cox <alan@redhat.com>, All Rights Reserved. | |
8 | * http://www.redhat.com | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * as published by the Free Software Foundation; either version | |
13 | * 2 of the License, or (at your option) any later version. | |
14 | * | |
15 | * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide | |
16 | * warranty for any of this software. This material is provided | |
17 | * "AS-IS" and at no charge. | |
18 | * | |
19 | * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk> | |
20 | * | |
21 | */ | |
22 | #include <linux/module.h> | |
23 | #include <linux/moduleparam.h> | |
24 | #include <linux/config.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/miscdevice.h> | |
27 | #include <linux/watchdog.h> | |
28 | #include <linux/fs.h> | |
29 | #include <linux/reboot.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/interrupt.h> | |
d052d1be | 32 | #include <linux/platform_device.h> |
ad4162f3 RK |
33 | |
34 | #include <asm/hardware/arm_twd.h> | |
b9d36b85 RK |
35 | #include <asm/uaccess.h> |
36 | ||
37 | struct mpcore_wdt { | |
38 | unsigned long timer_alive; | |
39 | struct device *dev; | |
40 | void __iomem *base; | |
41 | int irq; | |
42 | unsigned int perturb; | |
43 | char expect_close; | |
44 | }; | |
45 | ||
46 | static struct platform_device *mpcore_wdt_dev; | |
47 | ||
48 | extern unsigned int mpcore_timer_rate; | |
49 | ||
50 | #define TIMER_MARGIN 60 | |
51 | static int mpcore_margin = TIMER_MARGIN; | |
52 | module_param(mpcore_margin, int, 0); | |
53 | MODULE_PARM_DESC(mpcore_margin, "MPcore timer margin in seconds. (0<mpcore_margin<65536, default=" __MODULE_STRING(TIMER_MARGIN) ")"); | |
54 | ||
55 | static int nowayout = WATCHDOG_NOWAYOUT; | |
56 | module_param(nowayout, int, 0); | |
57 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
58 | ||
59 | #define ONLY_TESTING 0 | |
60 | static int mpcore_noboot = ONLY_TESTING; | |
61 | module_param(mpcore_noboot, int, 0); | |
62 | MODULE_PARM_DESC(mpcore_noboot, "MPcore watchdog action, set to 1 to ignore reboots, 0 to reboot (default=" __MODULE_STRING(ONLY_TESTING) ")"); | |
63 | ||
64 | /* | |
65 | * This is the interrupt handler. Note that we only use this | |
66 | * in testing mode, so don't actually do a reboot here. | |
67 | */ | |
68 | static irqreturn_t mpcore_wdt_fire(int irq, void *arg, struct pt_regs *regs) | |
69 | { | |
70 | struct mpcore_wdt *wdt = arg; | |
71 | ||
72 | /* Check it really was our interrupt */ | |
73 | if (readl(wdt->base + TWD_WDOG_INTSTAT)) { | |
74 | dev_printk(KERN_CRIT, wdt->dev, "Triggered - Reboot ignored.\n"); | |
75 | ||
76 | /* Clear the interrupt on the watchdog */ | |
77 | writel(1, wdt->base + TWD_WDOG_INTSTAT); | |
78 | ||
79 | return IRQ_HANDLED; | |
80 | } | |
81 | ||
82 | return IRQ_NONE; | |
83 | } | |
84 | ||
85 | /* | |
86 | * mpcore_wdt_keepalive - reload the timer | |
87 | * | |
88 | * Note that the spec says a DIFFERENT value must be written to the reload | |
89 | * register each time. The "perturb" variable deals with this by adding 1 | |
90 | * to the count every other time the function is called. | |
91 | */ | |
92 | static void mpcore_wdt_keepalive(struct mpcore_wdt *wdt) | |
93 | { | |
94 | unsigned int count; | |
95 | ||
96 | /* Assume prescale is set to 256 */ | |
97 | count = (mpcore_timer_rate / 256) * mpcore_margin; | |
98 | ||
99 | /* Reload the counter */ | |
100 | writel(count + wdt->perturb, wdt->base + TWD_WDOG_LOAD); | |
101 | ||
102 | wdt->perturb = wdt->perturb ? 0 : 1; | |
103 | } | |
104 | ||
105 | static void mpcore_wdt_stop(struct mpcore_wdt *wdt) | |
106 | { | |
107 | writel(0x12345678, wdt->base + TWD_WDOG_DISABLE); | |
108 | writel(0x87654321, wdt->base + TWD_WDOG_DISABLE); | |
109 | writel(0x0, wdt->base + TWD_WDOG_CONTROL); | |
110 | } | |
111 | ||
112 | static void mpcore_wdt_start(struct mpcore_wdt *wdt) | |
113 | { | |
114 | dev_printk(KERN_INFO, wdt->dev, "enabling watchdog.\n"); | |
115 | ||
116 | /* This loads the count register but does NOT start the count yet */ | |
117 | mpcore_wdt_keepalive(wdt); | |
118 | ||
119 | if (mpcore_noboot) { | |
120 | /* Enable watchdog - prescale=256, watchdog mode=0, enable=1 */ | |
121 | writel(0x0000FF01, wdt->base + TWD_WDOG_CONTROL); | |
122 | } else { | |
123 | /* Enable watchdog - prescale=256, watchdog mode=1, enable=1 */ | |
124 | writel(0x0000FF09, wdt->base + TWD_WDOG_CONTROL); | |
125 | } | |
126 | } | |
127 | ||
128 | static int mpcore_wdt_set_heartbeat(int t) | |
129 | { | |
130 | if (t < 0x0001 || t > 0xFFFF) | |
131 | return -EINVAL; | |
132 | ||
133 | mpcore_margin = t; | |
134 | return 0; | |
135 | } | |
136 | ||
137 | /* | |
138 | * /dev/watchdog handling | |
139 | */ | |
140 | static int mpcore_wdt_open(struct inode *inode, struct file *file) | |
141 | { | |
3ae5eaec | 142 | struct mpcore_wdt *wdt = platform_get_drvdata(mpcore_wdt_dev); |
b9d36b85 RK |
143 | |
144 | if (test_and_set_bit(0, &wdt->timer_alive)) | |
145 | return -EBUSY; | |
146 | ||
147 | if (nowayout) | |
148 | __module_get(THIS_MODULE); | |
149 | ||
150 | file->private_data = wdt; | |
151 | ||
152 | /* | |
153 | * Activate timer | |
154 | */ | |
155 | mpcore_wdt_start(wdt); | |
156 | ||
157 | return nonseekable_open(inode, file); | |
158 | } | |
159 | ||
160 | static int mpcore_wdt_release(struct inode *inode, struct file *file) | |
161 | { | |
162 | struct mpcore_wdt *wdt = file->private_data; | |
163 | ||
164 | /* | |
165 | * Shut off the timer. | |
166 | * Lock it in if it's a module and we set nowayout | |
167 | */ | |
168 | if (wdt->expect_close == 42) { | |
169 | mpcore_wdt_stop(wdt); | |
170 | } else { | |
171 | dev_printk(KERN_CRIT, wdt->dev, "unexpected close, not stopping watchdog!\n"); | |
172 | mpcore_wdt_keepalive(wdt); | |
173 | } | |
174 | clear_bit(0, &wdt->timer_alive); | |
175 | wdt->expect_close = 0; | |
176 | return 0; | |
177 | } | |
178 | ||
179 | static ssize_t mpcore_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos) | |
180 | { | |
181 | struct mpcore_wdt *wdt = file->private_data; | |
182 | ||
b9d36b85 RK |
183 | /* |
184 | * Refresh the timer. | |
185 | */ | |
186 | if (len) { | |
187 | if (!nowayout) { | |
188 | size_t i; | |
189 | ||
190 | /* In case it was set long ago */ | |
191 | wdt->expect_close = 0; | |
192 | ||
193 | for (i = 0; i != len; i++) { | |
194 | char c; | |
195 | ||
196 | if (get_user(c, data + i)) | |
197 | return -EFAULT; | |
198 | if (c == 'V') | |
199 | wdt->expect_close = 42; | |
200 | } | |
201 | } | |
202 | mpcore_wdt_keepalive(wdt); | |
203 | } | |
204 | return len; | |
205 | } | |
206 | ||
207 | static struct watchdog_info ident = { | |
208 | .options = WDIOF_SETTIMEOUT | | |
209 | WDIOF_KEEPALIVEPING | | |
210 | WDIOF_MAGICCLOSE, | |
211 | .identity = "MPcore Watchdog", | |
212 | }; | |
213 | ||
214 | static int mpcore_wdt_ioctl(struct inode *inode, struct file *file, | |
215 | unsigned int cmd, unsigned long arg) | |
216 | { | |
217 | struct mpcore_wdt *wdt = file->private_data; | |
218 | int ret; | |
219 | union { | |
220 | struct watchdog_info ident; | |
221 | int i; | |
222 | } uarg; | |
223 | ||
224 | if (_IOC_DIR(cmd) && _IOC_SIZE(cmd) > sizeof(uarg)) | |
225 | return -ENOIOCTLCMD; | |
226 | ||
227 | if (_IOC_DIR(cmd) & _IOC_WRITE) { | |
228 | ret = copy_from_user(&uarg, (void __user *)arg, _IOC_SIZE(cmd)); | |
229 | if (ret) | |
230 | return -EFAULT; | |
231 | } | |
232 | ||
233 | switch (cmd) { | |
234 | case WDIOC_GETSUPPORT: | |
235 | uarg.ident = ident; | |
236 | ret = 0; | |
237 | break; | |
238 | ||
239 | case WDIOC_SETOPTIONS: | |
240 | ret = -EINVAL; | |
241 | if (uarg.i & WDIOS_DISABLECARD) { | |
242 | mpcore_wdt_stop(wdt); | |
243 | ret = 0; | |
244 | } | |
245 | if (uarg.i & WDIOS_ENABLECARD) { | |
246 | mpcore_wdt_start(wdt); | |
247 | ret = 0; | |
248 | } | |
249 | break; | |
250 | ||
251 | case WDIOC_GETSTATUS: | |
252 | case WDIOC_GETBOOTSTATUS: | |
253 | uarg.i = 0; | |
254 | ret = 0; | |
255 | break; | |
256 | ||
257 | case WDIOC_KEEPALIVE: | |
258 | mpcore_wdt_keepalive(wdt); | |
259 | ret = 0; | |
260 | break; | |
261 | ||
262 | case WDIOC_SETTIMEOUT: | |
263 | ret = mpcore_wdt_set_heartbeat(uarg.i); | |
264 | if (ret) | |
265 | break; | |
266 | ||
267 | mpcore_wdt_keepalive(wdt); | |
268 | /* Fall */ | |
269 | case WDIOC_GETTIMEOUT: | |
270 | uarg.i = mpcore_margin; | |
271 | ret = 0; | |
272 | break; | |
273 | ||
274 | default: | |
275 | return -ENOIOCTLCMD; | |
276 | } | |
277 | ||
278 | if (ret == 0 && _IOC_DIR(cmd) & _IOC_READ) { | |
279 | ret = copy_to_user((void __user *)arg, &uarg, _IOC_SIZE(cmd)); | |
280 | if (ret) | |
281 | ret = -EFAULT; | |
282 | } | |
283 | return ret; | |
284 | } | |
285 | ||
286 | /* | |
287 | * System shutdown handler. Turn off the watchdog if we're | |
288 | * restarting or halting the system. | |
289 | */ | |
3ae5eaec | 290 | static void mpcore_wdt_shutdown(struct platform_device *dev) |
b9d36b85 | 291 | { |
3ae5eaec | 292 | struct mpcore_wdt *wdt = platform_get_drvdata(dev); |
b9d36b85 RK |
293 | |
294 | if (system_state == SYSTEM_RESTART || system_state == SYSTEM_HALT) | |
295 | mpcore_wdt_stop(wdt); | |
296 | } | |
297 | ||
298 | /* | |
299 | * Kernel Interfaces | |
300 | */ | |
301 | static struct file_operations mpcore_wdt_fops = { | |
302 | .owner = THIS_MODULE, | |
303 | .llseek = no_llseek, | |
304 | .write = mpcore_wdt_write, | |
305 | .ioctl = mpcore_wdt_ioctl, | |
306 | .open = mpcore_wdt_open, | |
307 | .release = mpcore_wdt_release, | |
308 | }; | |
309 | ||
310 | static struct miscdevice mpcore_wdt_miscdev = { | |
311 | .minor = WATCHDOG_MINOR, | |
312 | .name = "watchdog", | |
313 | .fops = &mpcore_wdt_fops, | |
314 | }; | |
315 | ||
3ae5eaec | 316 | static int __devinit mpcore_wdt_probe(struct platform_device *dev) |
b9d36b85 | 317 | { |
b9d36b85 RK |
318 | struct mpcore_wdt *wdt; |
319 | struct resource *res; | |
320 | int ret; | |
321 | ||
322 | /* We only accept one device, and it must have an id of -1 */ | |
323 | if (dev->id != -1) | |
324 | return -ENODEV; | |
325 | ||
326 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
327 | if (!res) { | |
328 | ret = -ENODEV; | |
329 | goto err_out; | |
330 | } | |
331 | ||
332 | wdt = kmalloc(sizeof(struct mpcore_wdt), GFP_KERNEL); | |
333 | if (!wdt) { | |
334 | ret = -ENOMEM; | |
335 | goto err_out; | |
336 | } | |
337 | memset(wdt, 0, sizeof(struct mpcore_wdt)); | |
338 | ||
339 | wdt->dev = &dev->dev; | |
340 | wdt->irq = platform_get_irq(dev, 0); | |
48944738 DV |
341 | if (wdt->irq < 0) { |
342 | ret = -ENXIO; | |
343 | goto err_free; | |
344 | } | |
b9d36b85 RK |
345 | wdt->base = ioremap(res->start, res->end - res->start + 1); |
346 | if (!wdt->base) { | |
347 | ret = -ENOMEM; | |
348 | goto err_free; | |
349 | } | |
350 | ||
351 | mpcore_wdt_miscdev.dev = &dev->dev; | |
352 | ret = misc_register(&mpcore_wdt_miscdev); | |
353 | if (ret) { | |
354 | dev_printk(KERN_ERR, _dev, "cannot register miscdev on minor=%d (err=%d)\n", | |
355 | WATCHDOG_MINOR, ret); | |
356 | goto err_misc; | |
357 | } | |
358 | ||
359 | ret = request_irq(wdt->irq, mpcore_wdt_fire, SA_INTERRUPT, "mpcore_wdt", wdt); | |
360 | if (ret) { | |
361 | dev_printk(KERN_ERR, _dev, "cannot register IRQ%d for watchdog\n", wdt->irq); | |
362 | goto err_irq; | |
363 | } | |
364 | ||
365 | mpcore_wdt_stop(wdt); | |
3ae5eaec | 366 | platform_set_drvdata(&dev->dev, wdt); |
b9d36b85 RK |
367 | mpcore_wdt_dev = dev; |
368 | ||
369 | return 0; | |
370 | ||
371 | err_irq: | |
372 | misc_deregister(&mpcore_wdt_miscdev); | |
373 | err_misc: | |
374 | iounmap(wdt->base); | |
375 | err_free: | |
376 | kfree(wdt); | |
377 | err_out: | |
378 | return ret; | |
379 | } | |
380 | ||
3ae5eaec | 381 | static int __devexit mpcore_wdt_remove(struct platform_device *dev) |
b9d36b85 | 382 | { |
3ae5eaec | 383 | struct mpcore_wdt *wdt = platform_get_drvdata(dev); |
b9d36b85 | 384 | |
3ae5eaec | 385 | platform_set_drvdata(dev, NULL); |
b9d36b85 RK |
386 | |
387 | misc_deregister(&mpcore_wdt_miscdev); | |
388 | ||
389 | mpcore_wdt_dev = NULL; | |
390 | ||
391 | free_irq(wdt->irq, wdt); | |
392 | iounmap(wdt->base); | |
393 | kfree(wdt); | |
394 | return 0; | |
395 | } | |
396 | ||
3ae5eaec | 397 | static struct platform_driver mpcore_wdt_driver = { |
b9d36b85 RK |
398 | .probe = mpcore_wdt_probe, |
399 | .remove = __devexit_p(mpcore_wdt_remove), | |
400 | .shutdown = mpcore_wdt_shutdown, | |
3ae5eaec RK |
401 | .driver = { |
402 | .owner = THIS_MODULE, | |
403 | .name = "mpcore_wdt", | |
404 | }, | |
b9d36b85 RK |
405 | }; |
406 | ||
407 | static char banner[] __initdata = KERN_INFO "MPcore Watchdog Timer: 0.1. mpcore_noboot=%d mpcore_margin=%d sec (nowayout= %d)\n"; | |
408 | ||
409 | static int __init mpcore_wdt_init(void) | |
410 | { | |
411 | /* | |
412 | * Check that the margin value is within it's range; | |
413 | * if not reset to the default | |
414 | */ | |
415 | if (mpcore_wdt_set_heartbeat(mpcore_margin)) { | |
416 | mpcore_wdt_set_heartbeat(TIMER_MARGIN); | |
417 | printk(KERN_INFO "mpcore_margin value must be 0<mpcore_margin<65536, using %d\n", | |
418 | TIMER_MARGIN); | |
419 | } | |
420 | ||
421 | printk(banner, mpcore_noboot, mpcore_margin, nowayout); | |
422 | ||
3ae5eaec | 423 | return platform_driver_register(&mpcore_wdt_driver); |
b9d36b85 RK |
424 | } |
425 | ||
426 | static void __exit mpcore_wdt_exit(void) | |
427 | { | |
3ae5eaec | 428 | platform_driver_unregister(&mpcore_wdt_driver); |
b9d36b85 RK |
429 | } |
430 | ||
431 | module_init(mpcore_wdt_init); | |
432 | module_exit(mpcore_wdt_exit); | |
433 | ||
434 | MODULE_AUTHOR("ARM Limited"); | |
435 | MODULE_DESCRIPTION("MPcore Watchdog Device Driver"); | |
436 | MODULE_LICENSE("GPL"); | |
437 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |