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5fba62ea BB |
1 | /* |
2 | * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | */ | |
10 | ||
11 | #include <linux/clk-provider.h> | |
12 | #include <linux/clkdev.h> | |
13 | #include <linux/clk/at91_pmc.h> | |
14 | #include <linux/of.h> | |
15 | #include <linux/of_address.h> | |
16 | #include <linux/io.h> | |
cce6db80 JJH |
17 | #include <linux/irq.h> |
18 | #include <linux/of_irq.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/wait.h> | |
21 | #include <linux/sched.h> | |
1bdf0232 BB |
22 | #include <linux/mfd/syscon.h> |
23 | #include <linux/regmap.h> | |
5fba62ea BB |
24 | |
25 | #include "pmc.h" | |
26 | ||
27 | #define SYSTEM_MAX_ID 31 | |
28 | ||
29 | #define SYSTEM_MAX_NAME_SZ 32 | |
30 | ||
31 | #define to_clk_system(hw) container_of(hw, struct clk_system, hw) | |
32 | struct clk_system { | |
33 | struct clk_hw hw; | |
1bdf0232 | 34 | struct regmap *regmap; |
cce6db80 JJH |
35 | unsigned int irq; |
36 | wait_queue_head_t wait; | |
5fba62ea BB |
37 | u8 id; |
38 | }; | |
39 | ||
cce6db80 JJH |
40 | static inline int is_pck(int id) |
41 | { | |
42 | return (id >= 8) && (id <= 15); | |
43 | } | |
44 | static irqreturn_t clk_system_irq_handler(int irq, void *dev_id) | |
45 | { | |
46 | struct clk_system *sys = (struct clk_system *)dev_id; | |
47 | ||
48 | wake_up(&sys->wait); | |
49 | disable_irq_nosync(sys->irq); | |
50 | ||
51 | return IRQ_HANDLED; | |
52 | } | |
53 | ||
1bdf0232 BB |
54 | static inline bool clk_system_ready(struct regmap *regmap, int id) |
55 | { | |
56 | unsigned int status; | |
57 | ||
58 | regmap_read(regmap, AT91_PMC_SR, &status); | |
59 | ||
60 | return status & (1 << id) ? 1 : 0; | |
61 | } | |
62 | ||
cce6db80 | 63 | static int clk_system_prepare(struct clk_hw *hw) |
5fba62ea BB |
64 | { |
65 | struct clk_system *sys = to_clk_system(hw); | |
5fba62ea | 66 | |
1bdf0232 | 67 | regmap_write(sys->regmap, AT91_PMC_SCER, 1 << sys->id); |
cce6db80 JJH |
68 | |
69 | if (!is_pck(sys->id)) | |
70 | return 0; | |
71 | ||
1bdf0232 | 72 | while (!clk_system_ready(sys->regmap, sys->id)) { |
cce6db80 JJH |
73 | if (sys->irq) { |
74 | enable_irq(sys->irq); | |
75 | wait_event(sys->wait, | |
1bdf0232 BB |
76 | clk_system_ready(sys->regmap, sys->id)); |
77 | } else { | |
cce6db80 | 78 | cpu_relax(); |
1bdf0232 | 79 | } |
cce6db80 | 80 | } |
5fba62ea BB |
81 | return 0; |
82 | } | |
83 | ||
cce6db80 | 84 | static void clk_system_unprepare(struct clk_hw *hw) |
5fba62ea BB |
85 | { |
86 | struct clk_system *sys = to_clk_system(hw); | |
5fba62ea | 87 | |
1bdf0232 | 88 | regmap_write(sys->regmap, AT91_PMC_SCDR, 1 << sys->id); |
5fba62ea BB |
89 | } |
90 | ||
cce6db80 | 91 | static int clk_system_is_prepared(struct clk_hw *hw) |
5fba62ea BB |
92 | { |
93 | struct clk_system *sys = to_clk_system(hw); | |
1bdf0232 BB |
94 | unsigned int status; |
95 | ||
96 | regmap_read(sys->regmap, AT91_PMC_SCSR, &status); | |
5fba62ea | 97 | |
1bdf0232 | 98 | if (!(status & (1 << sys->id))) |
cce6db80 JJH |
99 | return 0; |
100 | ||
101 | if (!is_pck(sys->id)) | |
102 | return 1; | |
103 | ||
1bdf0232 BB |
104 | regmap_read(sys->regmap, AT91_PMC_SR, &status); |
105 | ||
106 | return status & (1 << sys->id) ? 1 : 0; | |
5fba62ea BB |
107 | } |
108 | ||
109 | static const struct clk_ops system_ops = { | |
cce6db80 JJH |
110 | .prepare = clk_system_prepare, |
111 | .unprepare = clk_system_unprepare, | |
112 | .is_prepared = clk_system_is_prepared, | |
5fba62ea BB |
113 | }; |
114 | ||
115 | static struct clk * __init | |
1bdf0232 | 116 | at91_clk_register_system(struct regmap *regmap, const char *name, |
cce6db80 | 117 | const char *parent_name, u8 id, int irq) |
5fba62ea BB |
118 | { |
119 | struct clk_system *sys; | |
120 | struct clk *clk = NULL; | |
121 | struct clk_init_data init; | |
cce6db80 | 122 | int ret; |
5fba62ea BB |
123 | |
124 | if (!parent_name || id > SYSTEM_MAX_ID) | |
125 | return ERR_PTR(-EINVAL); | |
126 | ||
127 | sys = kzalloc(sizeof(*sys), GFP_KERNEL); | |
128 | if (!sys) | |
129 | return ERR_PTR(-ENOMEM); | |
130 | ||
131 | init.name = name; | |
132 | init.ops = &system_ops; | |
133 | init.parent_names = &parent_name; | |
134 | init.num_parents = 1; | |
b736bcb3 | 135 | init.flags = CLK_SET_RATE_PARENT; |
5fba62ea BB |
136 | |
137 | sys->id = id; | |
138 | sys->hw.init = &init; | |
1bdf0232 | 139 | sys->regmap = regmap; |
cce6db80 JJH |
140 | sys->irq = irq; |
141 | if (irq) { | |
142 | init_waitqueue_head(&sys->wait); | |
143 | irq_set_status_flags(sys->irq, IRQ_NOAUTOEN); | |
144 | ret = request_irq(sys->irq, clk_system_irq_handler, | |
145 | IRQF_TRIGGER_HIGH, name, sys); | |
c76a024e DD |
146 | if (ret) { |
147 | kfree(sys); | |
cce6db80 | 148 | return ERR_PTR(ret); |
c76a024e | 149 | } |
cce6db80 | 150 | } |
5fba62ea BB |
151 | |
152 | clk = clk_register(NULL, &sys->hw); | |
c76a024e | 153 | if (IS_ERR(clk)) { |
a97cea2a AB |
154 | if (irq) |
155 | free_irq(sys->irq, sys); | |
5fba62ea | 156 | kfree(sys); |
c76a024e | 157 | } |
5fba62ea BB |
158 | |
159 | return clk; | |
160 | } | |
161 | ||
1bdf0232 | 162 | static void __init of_at91rm9200_clk_sys_setup(struct device_node *np) |
5fba62ea BB |
163 | { |
164 | int num; | |
cce6db80 | 165 | int irq = 0; |
5fba62ea BB |
166 | u32 id; |
167 | struct clk *clk; | |
168 | const char *name; | |
169 | struct device_node *sysclknp; | |
170 | const char *parent_name; | |
1bdf0232 | 171 | struct regmap *regmap; |
5fba62ea BB |
172 | |
173 | num = of_get_child_count(np); | |
174 | if (num > (SYSTEM_MAX_ID + 1)) | |
175 | return; | |
176 | ||
1bdf0232 BB |
177 | regmap = syscon_node_to_regmap(of_get_parent(np)); |
178 | if (IS_ERR(regmap)) | |
179 | return; | |
180 | ||
5fba62ea BB |
181 | for_each_child_of_node(np, sysclknp) { |
182 | if (of_property_read_u32(sysclknp, "reg", &id)) | |
183 | continue; | |
184 | ||
185 | if (of_property_read_string(np, "clock-output-names", &name)) | |
186 | name = sysclknp->name; | |
187 | ||
cce6db80 JJH |
188 | if (is_pck(id)) |
189 | irq = irq_of_parse_and_map(sysclknp, 0); | |
190 | ||
5fba62ea BB |
191 | parent_name = of_clk_get_parent_name(sysclknp, 0); |
192 | ||
1bdf0232 BB |
193 | clk = at91_clk_register_system(regmap, name, parent_name, id, |
194 | irq); | |
5fba62ea BB |
195 | if (IS_ERR(clk)) |
196 | continue; | |
197 | ||
198 | of_clk_add_provider(sysclknp, of_clk_src_simple_get, clk); | |
199 | } | |
200 | } | |
1bdf0232 BB |
201 | CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system", |
202 | of_at91rm9200_clk_sys_setup); |