Merge branch 'parisc-4.6-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller...
[deliverable/linux.git] / drivers / clk / clk-fixed-rate.c
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1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Fixed rate clock implementation
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/module.h>
14#include <linux/slab.h>
15#include <linux/io.h>
16#include <linux/err.h>
015ba402 17#include <linux/of.h>
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18
19/*
20 * DOC: basic fixed-rate clock that cannot gate
21 *
22 * Traits of this clock:
23 * prepare - clk_(un)prepare only ensures parents are prepared
24 * enable - clk_enable only ensures parents are enabled
25 * rate - rate is always a fixed value. No clk_set_rate support
26 * parent - fixed parent. No clk_set_parent support
27 */
28
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29static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
30 unsigned long parent_rate)
31{
32 return to_clk_fixed_rate(hw)->fixed_rate;
33}
9d9f78ed 34
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35static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw,
36 unsigned long parent_accuracy)
37{
38 return to_clk_fixed_rate(hw)->fixed_accuracy;
39}
40
822c250e 41const struct clk_ops clk_fixed_rate_ops = {
9d9f78ed 42 .recalc_rate = clk_fixed_rate_recalc_rate,
0903ea60 43 .recalc_accuracy = clk_fixed_rate_recalc_accuracy,
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44};
45EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
46
27d54591 47/**
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48 * clk_register_fixed_rate_with_accuracy - register fixed-rate clock with the
49 * clock framework
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50 * @dev: device that is registering this clock
51 * @name: name of this clock
52 * @parent_name: name of clock's parent
53 * @flags: framework-specific flags
54 * @fixed_rate: non-adjustable clock rate
0903ea60 55 * @fixed_accuracy: non-adjustable clock rate
27d54591 56 */
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57struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,
58 const char *name, const char *parent_name, unsigned long flags,
59 unsigned long fixed_rate, unsigned long fixed_accuracy)
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60{
61 struct clk_fixed_rate *fixed;
27d54591 62 struct clk *clk;
0197b3ea 63 struct clk_init_data init;
9d9f78ed 64
27d54591 65 /* allocate fixed-rate clock */
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66 fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
67 if (!fixed)
9d9f78ed 68 return ERR_PTR(-ENOMEM);
9d9f78ed 69
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70 init.name = name;
71 init.ops = &clk_fixed_rate_ops;
f7d8caad 72 init.flags = flags | CLK_IS_BASIC;
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73 init.parent_names = (parent_name ? &parent_name: NULL);
74 init.num_parents = (parent_name ? 1 : 0);
75
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76 /* struct clk_fixed_rate assignments */
77 fixed->fixed_rate = fixed_rate;
0903ea60 78 fixed->fixed_accuracy = fixed_accuracy;
0197b3ea 79 fixed->hw.init = &init;
9d9f78ed 80
27d54591 81 /* register the clock */
0197b3ea 82 clk = clk_register(dev, &fixed->hw);
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83 if (IS_ERR(clk))
84 kfree(fixed);
85
86 return clk;
9d9f78ed 87}
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88EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy);
89
90/**
91 * clk_register_fixed_rate - register fixed-rate clock with the clock framework
92 * @dev: device that is registering this clock
93 * @name: name of this clock
94 * @parent_name: name of clock's parent
95 * @flags: framework-specific flags
96 * @fixed_rate: non-adjustable clock rate
97 */
98struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
99 const char *parent_name, unsigned long flags,
100 unsigned long fixed_rate)
101{
102 return clk_register_fixed_rate_with_accuracy(dev, name, parent_name,
103 flags, fixed_rate, 0);
104}
389ae05f 105EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
015ba402 106
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107void clk_unregister_fixed_rate(struct clk *clk)
108{
109 struct clk_hw *hw;
110
111 hw = __clk_get_hw(clk);
112 if (!hw)
113 return;
114
115 clk_unregister(clk);
116 kfree(to_clk_fixed_rate(hw));
117}
118EXPORT_SYMBOL_GPL(clk_unregister_fixed_rate);
119
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120#ifdef CONFIG_OF
121/**
122 * of_fixed_clk_setup() - Setup function for simple fixed rate clock
123 */
e4eda8e0 124void of_fixed_clk_setup(struct device_node *node)
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125{
126 struct clk *clk;
127 const char *clk_name = node->name;
128 u32 rate;
0903ea60 129 u32 accuracy = 0;
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130
131 if (of_property_read_u32(node, "clock-frequency", &rate))
132 return;
133
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134 of_property_read_u32(node, "clock-accuracy", &accuracy);
135
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136 of_property_read_string(node, "clock-output-names", &clk_name);
137
0903ea60 138 clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
d3781a74 139 0, rate, accuracy);
cdfed3b2 140 if (!IS_ERR(clk))
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141 of_clk_add_provider(node, of_clk_src_simple_get, clk);
142}
143EXPORT_SYMBOL_GPL(of_fixed_clk_setup);
f2f6c255 144CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup);
015ba402 145#endif
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