Commit | Line | Data |
---|---|---|
b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
b09d6d99 | 12 | #include <linux/clk-provider.h> |
86be408b | 13 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
14 | #include <linux/module.h> |
15 | #include <linux/mutex.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/slab.h> | |
766e6a4e | 20 | #include <linux/of.h> |
46c8773a | 21 | #include <linux/device.h> |
f2f6c255 | 22 | #include <linux/init.h> |
533ddeb1 | 23 | #include <linux/sched.h> |
b2476490 | 24 | |
d6782c26 SN |
25 | #include "clk.h" |
26 | ||
b2476490 MT |
27 | static DEFINE_SPINLOCK(enable_lock); |
28 | static DEFINE_MUTEX(prepare_lock); | |
29 | ||
533ddeb1 MT |
30 | static struct task_struct *prepare_owner; |
31 | static struct task_struct *enable_owner; | |
32 | ||
33 | static int prepare_refcnt; | |
34 | static int enable_refcnt; | |
35 | ||
b2476490 MT |
36 | static HLIST_HEAD(clk_root_list); |
37 | static HLIST_HEAD(clk_orphan_list); | |
38 | static LIST_HEAD(clk_notifier_list); | |
39 | ||
035a61c3 TV |
40 | static long clk_core_get_accuracy(struct clk_core *clk); |
41 | static unsigned long clk_core_get_rate(struct clk_core *clk); | |
42 | static int clk_core_get_phase(struct clk_core *clk); | |
43 | static bool clk_core_is_prepared(struct clk_core *clk); | |
44 | static bool clk_core_is_enabled(struct clk_core *clk); | |
035a61c3 TV |
45 | static struct clk_core *clk_core_lookup(const char *name); |
46 | ||
b09d6d99 MT |
47 | /*** private data structures ***/ |
48 | ||
49 | struct clk_core { | |
50 | const char *name; | |
51 | const struct clk_ops *ops; | |
52 | struct clk_hw *hw; | |
53 | struct module *owner; | |
54 | struct clk_core *parent; | |
55 | const char **parent_names; | |
56 | struct clk_core **parents; | |
57 | u8 num_parents; | |
58 | u8 new_parent_index; | |
59 | unsigned long rate; | |
1c8e6004 | 60 | unsigned long req_rate; |
b09d6d99 MT |
61 | unsigned long new_rate; |
62 | struct clk_core *new_parent; | |
63 | struct clk_core *new_child; | |
64 | unsigned long flags; | |
65 | unsigned int enable_count; | |
66 | unsigned int prepare_count; | |
67 | unsigned long accuracy; | |
68 | int phase; | |
69 | struct hlist_head children; | |
70 | struct hlist_node child_node; | |
71 | struct hlist_node debug_node; | |
1c8e6004 | 72 | struct hlist_head clks; |
b09d6d99 MT |
73 | unsigned int notifier_count; |
74 | #ifdef CONFIG_DEBUG_FS | |
75 | struct dentry *dentry; | |
76 | #endif | |
77 | struct kref ref; | |
78 | }; | |
79 | ||
80 | struct clk { | |
81 | struct clk_core *core; | |
82 | const char *dev_id; | |
83 | const char *con_id; | |
1c8e6004 TV |
84 | unsigned long min_rate; |
85 | unsigned long max_rate; | |
86 | struct hlist_node child_node; | |
b09d6d99 MT |
87 | }; |
88 | ||
eab89f69 MT |
89 | /*** locking ***/ |
90 | static void clk_prepare_lock(void) | |
91 | { | |
533ddeb1 MT |
92 | if (!mutex_trylock(&prepare_lock)) { |
93 | if (prepare_owner == current) { | |
94 | prepare_refcnt++; | |
95 | return; | |
96 | } | |
97 | mutex_lock(&prepare_lock); | |
98 | } | |
99 | WARN_ON_ONCE(prepare_owner != NULL); | |
100 | WARN_ON_ONCE(prepare_refcnt != 0); | |
101 | prepare_owner = current; | |
102 | prepare_refcnt = 1; | |
eab89f69 MT |
103 | } |
104 | ||
105 | static void clk_prepare_unlock(void) | |
106 | { | |
533ddeb1 MT |
107 | WARN_ON_ONCE(prepare_owner != current); |
108 | WARN_ON_ONCE(prepare_refcnt == 0); | |
109 | ||
110 | if (--prepare_refcnt) | |
111 | return; | |
112 | prepare_owner = NULL; | |
eab89f69 MT |
113 | mutex_unlock(&prepare_lock); |
114 | } | |
115 | ||
116 | static unsigned long clk_enable_lock(void) | |
117 | { | |
118 | unsigned long flags; | |
533ddeb1 MT |
119 | |
120 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
121 | if (enable_owner == current) { | |
122 | enable_refcnt++; | |
123 | return flags; | |
124 | } | |
125 | spin_lock_irqsave(&enable_lock, flags); | |
126 | } | |
127 | WARN_ON_ONCE(enable_owner != NULL); | |
128 | WARN_ON_ONCE(enable_refcnt != 0); | |
129 | enable_owner = current; | |
130 | enable_refcnt = 1; | |
eab89f69 MT |
131 | return flags; |
132 | } | |
133 | ||
134 | static void clk_enable_unlock(unsigned long flags) | |
135 | { | |
533ddeb1 MT |
136 | WARN_ON_ONCE(enable_owner != current); |
137 | WARN_ON_ONCE(enable_refcnt == 0); | |
138 | ||
139 | if (--enable_refcnt) | |
140 | return; | |
141 | enable_owner = NULL; | |
eab89f69 MT |
142 | spin_unlock_irqrestore(&enable_lock, flags); |
143 | } | |
144 | ||
b2476490 MT |
145 | /*** debugfs support ***/ |
146 | ||
ea72dc2c | 147 | #ifdef CONFIG_DEBUG_FS |
b2476490 MT |
148 | #include <linux/debugfs.h> |
149 | ||
150 | static struct dentry *rootdir; | |
b2476490 | 151 | static int inited = 0; |
6314b679 SB |
152 | static DEFINE_MUTEX(clk_debug_lock); |
153 | static HLIST_HEAD(clk_debug_list); | |
b2476490 | 154 | |
6b44c854 SK |
155 | static struct hlist_head *all_lists[] = { |
156 | &clk_root_list, | |
157 | &clk_orphan_list, | |
158 | NULL, | |
159 | }; | |
160 | ||
161 | static struct hlist_head *orphan_list[] = { | |
162 | &clk_orphan_list, | |
163 | NULL, | |
164 | }; | |
165 | ||
035a61c3 TV |
166 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, |
167 | int level) | |
1af599df PG |
168 | { |
169 | if (!c) | |
170 | return; | |
171 | ||
e59c5371 | 172 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1af599df PG |
173 | level * 3 + 1, "", |
174 | 30 - level * 3, c->name, | |
035a61c3 TV |
175 | c->enable_count, c->prepare_count, clk_core_get_rate(c), |
176 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1af599df PG |
177 | } |
178 | ||
035a61c3 | 179 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1af599df PG |
180 | int level) |
181 | { | |
035a61c3 | 182 | struct clk_core *child; |
1af599df PG |
183 | |
184 | if (!c) | |
185 | return; | |
186 | ||
187 | clk_summary_show_one(s, c, level); | |
188 | ||
b67bfe0d | 189 | hlist_for_each_entry(child, &c->children, child_node) |
1af599df PG |
190 | clk_summary_show_subtree(s, child, level + 1); |
191 | } | |
192 | ||
193 | static int clk_summary_show(struct seq_file *s, void *data) | |
194 | { | |
035a61c3 | 195 | struct clk_core *c; |
27b8d5f7 | 196 | struct hlist_head **lists = (struct hlist_head **)s->private; |
1af599df | 197 | |
e59c5371 MT |
198 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
199 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
1af599df | 200 | |
eab89f69 | 201 | clk_prepare_lock(); |
1af599df | 202 | |
27b8d5f7 PDS |
203 | for (; *lists; lists++) |
204 | hlist_for_each_entry(c, *lists, child_node) | |
205 | clk_summary_show_subtree(s, c, 0); | |
1af599df | 206 | |
eab89f69 | 207 | clk_prepare_unlock(); |
1af599df PG |
208 | |
209 | return 0; | |
210 | } | |
211 | ||
212 | ||
213 | static int clk_summary_open(struct inode *inode, struct file *file) | |
214 | { | |
215 | return single_open(file, clk_summary_show, inode->i_private); | |
216 | } | |
217 | ||
218 | static const struct file_operations clk_summary_fops = { | |
219 | .open = clk_summary_open, | |
220 | .read = seq_read, | |
221 | .llseek = seq_lseek, | |
222 | .release = single_release, | |
223 | }; | |
224 | ||
035a61c3 | 225 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
bddca894 PG |
226 | { |
227 | if (!c) | |
228 | return; | |
229 | ||
230 | seq_printf(s, "\"%s\": { ", c->name); | |
231 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
232 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
035a61c3 TV |
233 | seq_printf(s, "\"rate\": %lu", clk_core_get_rate(c)); |
234 | seq_printf(s, "\"accuracy\": %lu", clk_core_get_accuracy(c)); | |
235 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); | |
bddca894 PG |
236 | } |
237 | ||
035a61c3 | 238 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
bddca894 | 239 | { |
035a61c3 | 240 | struct clk_core *child; |
bddca894 PG |
241 | |
242 | if (!c) | |
243 | return; | |
244 | ||
245 | clk_dump_one(s, c, level); | |
246 | ||
b67bfe0d | 247 | hlist_for_each_entry(child, &c->children, child_node) { |
bddca894 PG |
248 | seq_printf(s, ","); |
249 | clk_dump_subtree(s, child, level + 1); | |
250 | } | |
251 | ||
252 | seq_printf(s, "}"); | |
253 | } | |
254 | ||
255 | static int clk_dump(struct seq_file *s, void *data) | |
256 | { | |
035a61c3 | 257 | struct clk_core *c; |
bddca894 | 258 | bool first_node = true; |
27b8d5f7 | 259 | struct hlist_head **lists = (struct hlist_head **)s->private; |
bddca894 PG |
260 | |
261 | seq_printf(s, "{"); | |
262 | ||
eab89f69 | 263 | clk_prepare_lock(); |
bddca894 | 264 | |
27b8d5f7 PDS |
265 | for (; *lists; lists++) { |
266 | hlist_for_each_entry(c, *lists, child_node) { | |
267 | if (!first_node) | |
268 | seq_puts(s, ","); | |
269 | first_node = false; | |
270 | clk_dump_subtree(s, c, 0); | |
271 | } | |
bddca894 PG |
272 | } |
273 | ||
eab89f69 | 274 | clk_prepare_unlock(); |
bddca894 PG |
275 | |
276 | seq_printf(s, "}"); | |
277 | return 0; | |
278 | } | |
279 | ||
280 | ||
281 | static int clk_dump_open(struct inode *inode, struct file *file) | |
282 | { | |
283 | return single_open(file, clk_dump, inode->i_private); | |
284 | } | |
285 | ||
286 | static const struct file_operations clk_dump_fops = { | |
287 | .open = clk_dump_open, | |
288 | .read = seq_read, | |
289 | .llseek = seq_lseek, | |
290 | .release = single_release, | |
291 | }; | |
292 | ||
035a61c3 | 293 | static int clk_debug_create_one(struct clk_core *clk, struct dentry *pdentry) |
b2476490 MT |
294 | { |
295 | struct dentry *d; | |
296 | int ret = -ENOMEM; | |
297 | ||
298 | if (!clk || !pdentry) { | |
299 | ret = -EINVAL; | |
300 | goto out; | |
301 | } | |
302 | ||
303 | d = debugfs_create_dir(clk->name, pdentry); | |
304 | if (!d) | |
305 | goto out; | |
306 | ||
307 | clk->dentry = d; | |
308 | ||
309 | d = debugfs_create_u32("clk_rate", S_IRUGO, clk->dentry, | |
310 | (u32 *)&clk->rate); | |
311 | if (!d) | |
312 | goto err_out; | |
313 | ||
5279fc40 BB |
314 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, clk->dentry, |
315 | (u32 *)&clk->accuracy); | |
316 | if (!d) | |
317 | goto err_out; | |
318 | ||
e59c5371 MT |
319 | d = debugfs_create_u32("clk_phase", S_IRUGO, clk->dentry, |
320 | (u32 *)&clk->phase); | |
321 | if (!d) | |
322 | goto err_out; | |
323 | ||
b2476490 MT |
324 | d = debugfs_create_x32("clk_flags", S_IRUGO, clk->dentry, |
325 | (u32 *)&clk->flags); | |
326 | if (!d) | |
327 | goto err_out; | |
328 | ||
329 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, clk->dentry, | |
330 | (u32 *)&clk->prepare_count); | |
331 | if (!d) | |
332 | goto err_out; | |
333 | ||
334 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, clk->dentry, | |
335 | (u32 *)&clk->enable_count); | |
336 | if (!d) | |
337 | goto err_out; | |
338 | ||
339 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, clk->dentry, | |
340 | (u32 *)&clk->notifier_count); | |
341 | if (!d) | |
342 | goto err_out; | |
343 | ||
abeab450 CB |
344 | if (clk->ops->debug_init) { |
345 | ret = clk->ops->debug_init(clk->hw, clk->dentry); | |
346 | if (ret) | |
c646cbf1 | 347 | goto err_out; |
abeab450 | 348 | } |
c646cbf1 | 349 | |
b2476490 MT |
350 | ret = 0; |
351 | goto out; | |
352 | ||
353 | err_out: | |
b5f98e65 AE |
354 | debugfs_remove_recursive(clk->dentry); |
355 | clk->dentry = NULL; | |
b2476490 MT |
356 | out: |
357 | return ret; | |
358 | } | |
359 | ||
b2476490 MT |
360 | /** |
361 | * clk_debug_register - add a clk node to the debugfs clk tree | |
362 | * @clk: the clk being added to the debugfs clk tree | |
363 | * | |
364 | * Dynamically adds a clk to the debugfs clk tree if debugfs has been | |
365 | * initialized. Otherwise it bails out early since the debugfs clk tree | |
366 | * will be created lazily by clk_debug_init as part of a late_initcall. | |
b2476490 | 367 | */ |
035a61c3 | 368 | static int clk_debug_register(struct clk_core *clk) |
b2476490 | 369 | { |
b2476490 MT |
370 | int ret = 0; |
371 | ||
6314b679 SB |
372 | mutex_lock(&clk_debug_lock); |
373 | hlist_add_head(&clk->debug_node, &clk_debug_list); | |
374 | ||
b2476490 | 375 | if (!inited) |
6314b679 | 376 | goto unlock; |
b2476490 | 377 | |
6314b679 SB |
378 | ret = clk_debug_create_one(clk, rootdir); |
379 | unlock: | |
380 | mutex_unlock(&clk_debug_lock); | |
b2476490 | 381 | |
b2476490 MT |
382 | return ret; |
383 | } | |
384 | ||
fcb0ee6a SN |
385 | /** |
386 | * clk_debug_unregister - remove a clk node from the debugfs clk tree | |
387 | * @clk: the clk being removed from the debugfs clk tree | |
388 | * | |
389 | * Dynamically removes a clk and all it's children clk nodes from the | |
390 | * debugfs clk tree if clk->dentry points to debugfs created by | |
391 | * clk_debug_register in __clk_init. | |
fcb0ee6a | 392 | */ |
035a61c3 | 393 | static void clk_debug_unregister(struct clk_core *clk) |
fcb0ee6a | 394 | { |
6314b679 | 395 | mutex_lock(&clk_debug_lock); |
6314b679 | 396 | hlist_del_init(&clk->debug_node); |
fcb0ee6a | 397 | debugfs_remove_recursive(clk->dentry); |
6314b679 | 398 | clk->dentry = NULL; |
6314b679 | 399 | mutex_unlock(&clk_debug_lock); |
fcb0ee6a SN |
400 | } |
401 | ||
61c7cddf | 402 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
fb2b3c9f PDS |
403 | void *data, const struct file_operations *fops) |
404 | { | |
405 | struct dentry *d = NULL; | |
406 | ||
035a61c3 TV |
407 | if (hw->core->dentry) |
408 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
409 | fops); | |
fb2b3c9f PDS |
410 | |
411 | return d; | |
412 | } | |
413 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
414 | ||
b2476490 MT |
415 | /** |
416 | * clk_debug_init - lazily create the debugfs clk tree visualization | |
417 | * | |
418 | * clks are often initialized very early during boot before memory can | |
419 | * be dynamically allocated and well before debugfs is setup. | |
420 | * clk_debug_init walks the clk tree hierarchy while holding | |
421 | * prepare_lock and creates the topology as part of a late_initcall, | |
422 | * thus insuring that clks initialized very early will still be | |
423 | * represented in the debugfs clk tree. This function should only be | |
424 | * called once at boot-time, and all other clks added dynamically will | |
425 | * be done so with clk_debug_register. | |
426 | */ | |
427 | static int __init clk_debug_init(void) | |
428 | { | |
035a61c3 | 429 | struct clk_core *clk; |
1af599df | 430 | struct dentry *d; |
b2476490 MT |
431 | |
432 | rootdir = debugfs_create_dir("clk", NULL); | |
433 | ||
434 | if (!rootdir) | |
435 | return -ENOMEM; | |
436 | ||
27b8d5f7 | 437 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
1af599df PG |
438 | &clk_summary_fops); |
439 | if (!d) | |
440 | return -ENOMEM; | |
441 | ||
27b8d5f7 | 442 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
bddca894 PG |
443 | &clk_dump_fops); |
444 | if (!d) | |
445 | return -ENOMEM; | |
446 | ||
27b8d5f7 PDS |
447 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
448 | &orphan_list, &clk_summary_fops); | |
449 | if (!d) | |
450 | return -ENOMEM; | |
b2476490 | 451 | |
27b8d5f7 PDS |
452 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
453 | &orphan_list, &clk_dump_fops); | |
454 | if (!d) | |
b2476490 MT |
455 | return -ENOMEM; |
456 | ||
6314b679 SB |
457 | mutex_lock(&clk_debug_lock); |
458 | hlist_for_each_entry(clk, &clk_debug_list, debug_node) | |
459 | clk_debug_create_one(clk, rootdir); | |
b2476490 MT |
460 | |
461 | inited = 1; | |
6314b679 | 462 | mutex_unlock(&clk_debug_lock); |
b2476490 MT |
463 | |
464 | return 0; | |
465 | } | |
466 | late_initcall(clk_debug_init); | |
467 | #else | |
035a61c3 TV |
468 | static inline int clk_debug_register(struct clk_core *clk) { return 0; } |
469 | static inline void clk_debug_reparent(struct clk_core *clk, | |
470 | struct clk_core *new_parent) | |
b33d212f UH |
471 | { |
472 | } | |
035a61c3 | 473 | static inline void clk_debug_unregister(struct clk_core *clk) |
fcb0ee6a SN |
474 | { |
475 | } | |
70d347e6 | 476 | #endif |
b2476490 | 477 | |
1c155b3d | 478 | /* caller must hold prepare_lock */ |
035a61c3 | 479 | static void clk_unprepare_unused_subtree(struct clk_core *clk) |
1c155b3d | 480 | { |
035a61c3 | 481 | struct clk_core *child; |
1c155b3d | 482 | |
496eadf8 KK |
483 | lockdep_assert_held(&prepare_lock); |
484 | ||
1c155b3d UH |
485 | hlist_for_each_entry(child, &clk->children, child_node) |
486 | clk_unprepare_unused_subtree(child); | |
487 | ||
488 | if (clk->prepare_count) | |
489 | return; | |
490 | ||
491 | if (clk->flags & CLK_IGNORE_UNUSED) | |
492 | return; | |
493 | ||
035a61c3 | 494 | if (clk_core_is_prepared(clk)) { |
3cc8247f UH |
495 | if (clk->ops->unprepare_unused) |
496 | clk->ops->unprepare_unused(clk->hw); | |
497 | else if (clk->ops->unprepare) | |
1c155b3d | 498 | clk->ops->unprepare(clk->hw); |
3cc8247f | 499 | } |
1c155b3d UH |
500 | } |
501 | ||
b2476490 | 502 | /* caller must hold prepare_lock */ |
035a61c3 | 503 | static void clk_disable_unused_subtree(struct clk_core *clk) |
b2476490 | 504 | { |
035a61c3 | 505 | struct clk_core *child; |
b2476490 MT |
506 | unsigned long flags; |
507 | ||
496eadf8 KK |
508 | lockdep_assert_held(&prepare_lock); |
509 | ||
b67bfe0d | 510 | hlist_for_each_entry(child, &clk->children, child_node) |
b2476490 MT |
511 | clk_disable_unused_subtree(child); |
512 | ||
eab89f69 | 513 | flags = clk_enable_lock(); |
b2476490 MT |
514 | |
515 | if (clk->enable_count) | |
516 | goto unlock_out; | |
517 | ||
518 | if (clk->flags & CLK_IGNORE_UNUSED) | |
519 | goto unlock_out; | |
520 | ||
7c045a55 MT |
521 | /* |
522 | * some gate clocks have special needs during the disable-unused | |
523 | * sequence. call .disable_unused if available, otherwise fall | |
524 | * back to .disable | |
525 | */ | |
035a61c3 | 526 | if (clk_core_is_enabled(clk)) { |
7c045a55 MT |
527 | if (clk->ops->disable_unused) |
528 | clk->ops->disable_unused(clk->hw); | |
529 | else if (clk->ops->disable) | |
530 | clk->ops->disable(clk->hw); | |
531 | } | |
b2476490 MT |
532 | |
533 | unlock_out: | |
eab89f69 | 534 | clk_enable_unlock(flags); |
b2476490 MT |
535 | } |
536 | ||
1e435256 OJ |
537 | static bool clk_ignore_unused; |
538 | static int __init clk_ignore_unused_setup(char *__unused) | |
539 | { | |
540 | clk_ignore_unused = true; | |
541 | return 1; | |
542 | } | |
543 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
544 | ||
b2476490 MT |
545 | static int clk_disable_unused(void) |
546 | { | |
035a61c3 | 547 | struct clk_core *clk; |
b2476490 | 548 | |
1e435256 OJ |
549 | if (clk_ignore_unused) { |
550 | pr_warn("clk: Not disabling unused clocks\n"); | |
551 | return 0; | |
552 | } | |
553 | ||
eab89f69 | 554 | clk_prepare_lock(); |
b2476490 | 555 | |
b67bfe0d | 556 | hlist_for_each_entry(clk, &clk_root_list, child_node) |
b2476490 MT |
557 | clk_disable_unused_subtree(clk); |
558 | ||
b67bfe0d | 559 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) |
b2476490 MT |
560 | clk_disable_unused_subtree(clk); |
561 | ||
1c155b3d UH |
562 | hlist_for_each_entry(clk, &clk_root_list, child_node) |
563 | clk_unprepare_unused_subtree(clk); | |
564 | ||
565 | hlist_for_each_entry(clk, &clk_orphan_list, child_node) | |
566 | clk_unprepare_unused_subtree(clk); | |
567 | ||
eab89f69 | 568 | clk_prepare_unlock(); |
b2476490 MT |
569 | |
570 | return 0; | |
571 | } | |
d41d5805 | 572 | late_initcall_sync(clk_disable_unused); |
b2476490 MT |
573 | |
574 | /*** helper functions ***/ | |
575 | ||
65800b2c | 576 | const char *__clk_get_name(struct clk *clk) |
b2476490 | 577 | { |
035a61c3 | 578 | return !clk ? NULL : clk->core->name; |
b2476490 | 579 | } |
4895084c | 580 | EXPORT_SYMBOL_GPL(__clk_get_name); |
b2476490 | 581 | |
65800b2c | 582 | struct clk_hw *__clk_get_hw(struct clk *clk) |
b2476490 | 583 | { |
035a61c3 | 584 | return !clk ? NULL : clk->core->hw; |
b2476490 | 585 | } |
0b7f04b8 | 586 | EXPORT_SYMBOL_GPL(__clk_get_hw); |
b2476490 | 587 | |
65800b2c | 588 | u8 __clk_get_num_parents(struct clk *clk) |
b2476490 | 589 | { |
035a61c3 | 590 | return !clk ? 0 : clk->core->num_parents; |
b2476490 | 591 | } |
0b7f04b8 | 592 | EXPORT_SYMBOL_GPL(__clk_get_num_parents); |
b2476490 | 593 | |
65800b2c | 594 | struct clk *__clk_get_parent(struct clk *clk) |
b2476490 | 595 | { |
035a61c3 TV |
596 | if (!clk) |
597 | return NULL; | |
598 | ||
599 | /* TODO: Create a per-user clk and change callers to call clk_put */ | |
600 | return !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
b2476490 | 601 | } |
0b7f04b8 | 602 | EXPORT_SYMBOL_GPL(__clk_get_parent); |
b2476490 | 603 | |
035a61c3 TV |
604 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *clk, |
605 | u8 index) | |
7ef3dcc8 JH |
606 | { |
607 | if (!clk || index >= clk->num_parents) | |
608 | return NULL; | |
609 | else if (!clk->parents) | |
035a61c3 | 610 | return clk_core_lookup(clk->parent_names[index]); |
7ef3dcc8 JH |
611 | else if (!clk->parents[index]) |
612 | return clk->parents[index] = | |
035a61c3 | 613 | clk_core_lookup(clk->parent_names[index]); |
7ef3dcc8 JH |
614 | else |
615 | return clk->parents[index]; | |
616 | } | |
035a61c3 TV |
617 | |
618 | struct clk *clk_get_parent_by_index(struct clk *clk, u8 index) | |
619 | { | |
620 | struct clk_core *parent; | |
621 | ||
622 | if (!clk) | |
623 | return NULL; | |
624 | ||
625 | parent = clk_core_get_parent_by_index(clk->core, index); | |
626 | ||
627 | return !parent ? NULL : parent->hw->clk; | |
628 | } | |
0b7f04b8 | 629 | EXPORT_SYMBOL_GPL(clk_get_parent_by_index); |
7ef3dcc8 | 630 | |
65800b2c | 631 | unsigned int __clk_get_enable_count(struct clk *clk) |
b2476490 | 632 | { |
035a61c3 | 633 | return !clk ? 0 : clk->core->enable_count; |
b2476490 MT |
634 | } |
635 | ||
035a61c3 | 636 | static unsigned long clk_core_get_rate_nolock(struct clk_core *clk) |
b2476490 MT |
637 | { |
638 | unsigned long ret; | |
639 | ||
640 | if (!clk) { | |
34e44fe8 | 641 | ret = 0; |
b2476490 MT |
642 | goto out; |
643 | } | |
644 | ||
645 | ret = clk->rate; | |
646 | ||
647 | if (clk->flags & CLK_IS_ROOT) | |
648 | goto out; | |
649 | ||
650 | if (!clk->parent) | |
34e44fe8 | 651 | ret = 0; |
b2476490 MT |
652 | |
653 | out: | |
654 | return ret; | |
655 | } | |
035a61c3 TV |
656 | |
657 | unsigned long __clk_get_rate(struct clk *clk) | |
658 | { | |
659 | if (!clk) | |
660 | return 0; | |
661 | ||
662 | return clk_core_get_rate_nolock(clk->core); | |
663 | } | |
0b7f04b8 | 664 | EXPORT_SYMBOL_GPL(__clk_get_rate); |
b2476490 | 665 | |
035a61c3 | 666 | static unsigned long __clk_get_accuracy(struct clk_core *clk) |
5279fc40 BB |
667 | { |
668 | if (!clk) | |
669 | return 0; | |
670 | ||
671 | return clk->accuracy; | |
672 | } | |
673 | ||
65800b2c | 674 | unsigned long __clk_get_flags(struct clk *clk) |
b2476490 | 675 | { |
035a61c3 | 676 | return !clk ? 0 : clk->core->flags; |
b2476490 | 677 | } |
b05c6836 | 678 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
b2476490 | 679 | |
035a61c3 | 680 | static bool clk_core_is_prepared(struct clk_core *clk) |
3d6ee287 UH |
681 | { |
682 | int ret; | |
683 | ||
684 | if (!clk) | |
685 | return false; | |
686 | ||
687 | /* | |
688 | * .is_prepared is optional for clocks that can prepare | |
689 | * fall back to software usage counter if it is missing | |
690 | */ | |
691 | if (!clk->ops->is_prepared) { | |
692 | ret = clk->prepare_count ? 1 : 0; | |
693 | goto out; | |
694 | } | |
695 | ||
696 | ret = clk->ops->is_prepared(clk->hw); | |
697 | out: | |
698 | return !!ret; | |
699 | } | |
700 | ||
035a61c3 TV |
701 | bool __clk_is_prepared(struct clk *clk) |
702 | { | |
703 | if (!clk) | |
704 | return false; | |
705 | ||
706 | return clk_core_is_prepared(clk->core); | |
707 | } | |
708 | ||
709 | static bool clk_core_is_enabled(struct clk_core *clk) | |
b2476490 MT |
710 | { |
711 | int ret; | |
712 | ||
713 | if (!clk) | |
2ac6b1f5 | 714 | return false; |
b2476490 MT |
715 | |
716 | /* | |
717 | * .is_enabled is only mandatory for clocks that gate | |
718 | * fall back to software usage counter if .is_enabled is missing | |
719 | */ | |
720 | if (!clk->ops->is_enabled) { | |
721 | ret = clk->enable_count ? 1 : 0; | |
722 | goto out; | |
723 | } | |
724 | ||
725 | ret = clk->ops->is_enabled(clk->hw); | |
726 | out: | |
2ac6b1f5 | 727 | return !!ret; |
b2476490 | 728 | } |
035a61c3 TV |
729 | |
730 | bool __clk_is_enabled(struct clk *clk) | |
731 | { | |
732 | if (!clk) | |
733 | return false; | |
734 | ||
735 | return clk_core_is_enabled(clk->core); | |
736 | } | |
0b7f04b8 | 737 | EXPORT_SYMBOL_GPL(__clk_is_enabled); |
b2476490 | 738 | |
035a61c3 TV |
739 | static struct clk_core *__clk_lookup_subtree(const char *name, |
740 | struct clk_core *clk) | |
b2476490 | 741 | { |
035a61c3 TV |
742 | struct clk_core *child; |
743 | struct clk_core *ret; | |
b2476490 MT |
744 | |
745 | if (!strcmp(clk->name, name)) | |
746 | return clk; | |
747 | ||
b67bfe0d | 748 | hlist_for_each_entry(child, &clk->children, child_node) { |
b2476490 MT |
749 | ret = __clk_lookup_subtree(name, child); |
750 | if (ret) | |
751 | return ret; | |
752 | } | |
753 | ||
754 | return NULL; | |
755 | } | |
756 | ||
035a61c3 | 757 | static struct clk_core *clk_core_lookup(const char *name) |
b2476490 | 758 | { |
035a61c3 TV |
759 | struct clk_core *root_clk; |
760 | struct clk_core *ret; | |
b2476490 MT |
761 | |
762 | if (!name) | |
763 | return NULL; | |
764 | ||
765 | /* search the 'proper' clk tree first */ | |
b67bfe0d | 766 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { |
b2476490 MT |
767 | ret = __clk_lookup_subtree(name, root_clk); |
768 | if (ret) | |
769 | return ret; | |
770 | } | |
771 | ||
772 | /* if not found, then search the orphan tree */ | |
b67bfe0d | 773 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { |
b2476490 MT |
774 | ret = __clk_lookup_subtree(name, root_clk); |
775 | if (ret) | |
776 | return ret; | |
777 | } | |
778 | ||
779 | return NULL; | |
780 | } | |
781 | ||
15a02c1f SB |
782 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
783 | unsigned long best, unsigned long flags) | |
e366fdd7 | 784 | { |
15a02c1f SB |
785 | if (flags & CLK_MUX_ROUND_CLOSEST) |
786 | return abs(now - rate) < abs(best - rate); | |
787 | ||
788 | return now <= rate && now > best; | |
789 | } | |
790 | ||
791 | static long | |
792 | clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate, | |
1c8e6004 TV |
793 | unsigned long min_rate, |
794 | unsigned long max_rate, | |
15a02c1f SB |
795 | unsigned long *best_parent_rate, |
796 | struct clk_hw **best_parent_p, | |
797 | unsigned long flags) | |
e366fdd7 | 798 | { |
035a61c3 | 799 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; |
e366fdd7 JH |
800 | int i, num_parents; |
801 | unsigned long parent_rate, best = 0; | |
802 | ||
803 | /* if NO_REPARENT flag set, pass through to current parent */ | |
035a61c3 TV |
804 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { |
805 | parent = core->parent; | |
806 | if (core->flags & CLK_SET_RATE_PARENT) | |
9e0ad7d2 JMC |
807 | best = __clk_determine_rate(parent ? parent->hw : NULL, |
808 | rate, min_rate, max_rate); | |
e366fdd7 | 809 | else if (parent) |
035a61c3 | 810 | best = clk_core_get_rate_nolock(parent); |
e366fdd7 | 811 | else |
035a61c3 | 812 | best = clk_core_get_rate_nolock(core); |
e366fdd7 JH |
813 | goto out; |
814 | } | |
815 | ||
816 | /* find the parent that can provide the fastest rate <= rate */ | |
035a61c3 | 817 | num_parents = core->num_parents; |
e366fdd7 | 818 | for (i = 0; i < num_parents; i++) { |
035a61c3 | 819 | parent = clk_core_get_parent_by_index(core, i); |
e366fdd7 JH |
820 | if (!parent) |
821 | continue; | |
035a61c3 | 822 | if (core->flags & CLK_SET_RATE_PARENT) |
1c8e6004 TV |
823 | parent_rate = __clk_determine_rate(parent->hw, rate, |
824 | min_rate, | |
825 | max_rate); | |
e366fdd7 | 826 | else |
035a61c3 | 827 | parent_rate = clk_core_get_rate_nolock(parent); |
15a02c1f | 828 | if (mux_is_better_rate(rate, parent_rate, best, flags)) { |
e366fdd7 JH |
829 | best_parent = parent; |
830 | best = parent_rate; | |
831 | } | |
832 | } | |
833 | ||
834 | out: | |
835 | if (best_parent) | |
646cafc6 | 836 | *best_parent_p = best_parent->hw; |
e366fdd7 JH |
837 | *best_parent_rate = best; |
838 | ||
839 | return best; | |
840 | } | |
15a02c1f | 841 | |
035a61c3 TV |
842 | struct clk *__clk_lookup(const char *name) |
843 | { | |
844 | struct clk_core *core = clk_core_lookup(name); | |
845 | ||
846 | return !core ? NULL : core->hw->clk; | |
847 | } | |
848 | ||
1c8e6004 TV |
849 | static void clk_core_get_boundaries(struct clk_core *clk, |
850 | unsigned long *min_rate, | |
851 | unsigned long *max_rate) | |
852 | { | |
853 | struct clk *clk_user; | |
854 | ||
855 | *min_rate = 0; | |
856 | *max_rate = ULONG_MAX; | |
857 | ||
858 | hlist_for_each_entry(clk_user, &clk->clks, child_node) | |
859 | *min_rate = max(*min_rate, clk_user->min_rate); | |
860 | ||
861 | hlist_for_each_entry(clk_user, &clk->clks, child_node) | |
862 | *max_rate = min(*max_rate, clk_user->max_rate); | |
863 | } | |
864 | ||
15a02c1f SB |
865 | /* |
866 | * Helper for finding best parent to provide a given frequency. This can be used | |
867 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
868 | * complex clock that may combine a mux with other operations. | |
869 | */ | |
870 | long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, | |
1c8e6004 TV |
871 | unsigned long min_rate, |
872 | unsigned long max_rate, | |
15a02c1f SB |
873 | unsigned long *best_parent_rate, |
874 | struct clk_hw **best_parent_p) | |
875 | { | |
1c8e6004 TV |
876 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
877 | best_parent_rate, | |
15a02c1f SB |
878 | best_parent_p, 0); |
879 | } | |
0b7f04b8 | 880 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
e366fdd7 | 881 | |
15a02c1f | 882 | long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, |
1c8e6004 TV |
883 | unsigned long min_rate, |
884 | unsigned long max_rate, | |
15a02c1f SB |
885 | unsigned long *best_parent_rate, |
886 | struct clk_hw **best_parent_p) | |
887 | { | |
1c8e6004 TV |
888 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
889 | best_parent_rate, | |
15a02c1f SB |
890 | best_parent_p, |
891 | CLK_MUX_ROUND_CLOSEST); | |
892 | } | |
893 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
894 | ||
b2476490 MT |
895 | /*** clk api ***/ |
896 | ||
035a61c3 | 897 | static void clk_core_unprepare(struct clk_core *clk) |
b2476490 MT |
898 | { |
899 | if (!clk) | |
900 | return; | |
901 | ||
902 | if (WARN_ON(clk->prepare_count == 0)) | |
903 | return; | |
904 | ||
905 | if (--clk->prepare_count > 0) | |
906 | return; | |
907 | ||
908 | WARN_ON(clk->enable_count > 0); | |
909 | ||
910 | if (clk->ops->unprepare) | |
911 | clk->ops->unprepare(clk->hw); | |
912 | ||
035a61c3 | 913 | clk_core_unprepare(clk->parent); |
b2476490 MT |
914 | } |
915 | ||
916 | /** | |
917 | * clk_unprepare - undo preparation of a clock source | |
24ee1a08 | 918 | * @clk: the clk being unprepared |
b2476490 MT |
919 | * |
920 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
921 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
922 | * if the operation may sleep. One example is a clk which is accessed over | |
923 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
924 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
925 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
926 | */ | |
927 | void clk_unprepare(struct clk *clk) | |
928 | { | |
63589e92 SB |
929 | if (IS_ERR_OR_NULL(clk)) |
930 | return; | |
931 | ||
eab89f69 | 932 | clk_prepare_lock(); |
035a61c3 | 933 | clk_core_unprepare(clk->core); |
eab89f69 | 934 | clk_prepare_unlock(); |
b2476490 MT |
935 | } |
936 | EXPORT_SYMBOL_GPL(clk_unprepare); | |
937 | ||
035a61c3 | 938 | static int clk_core_prepare(struct clk_core *clk) |
b2476490 MT |
939 | { |
940 | int ret = 0; | |
941 | ||
942 | if (!clk) | |
943 | return 0; | |
944 | ||
945 | if (clk->prepare_count == 0) { | |
035a61c3 | 946 | ret = clk_core_prepare(clk->parent); |
b2476490 MT |
947 | if (ret) |
948 | return ret; | |
949 | ||
950 | if (clk->ops->prepare) { | |
951 | ret = clk->ops->prepare(clk->hw); | |
952 | if (ret) { | |
035a61c3 | 953 | clk_core_unprepare(clk->parent); |
b2476490 MT |
954 | return ret; |
955 | } | |
956 | } | |
957 | } | |
958 | ||
959 | clk->prepare_count++; | |
960 | ||
961 | return 0; | |
962 | } | |
963 | ||
964 | /** | |
965 | * clk_prepare - prepare a clock source | |
966 | * @clk: the clk being prepared | |
967 | * | |
968 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
969 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
970 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
971 | * the complex case a clk ungate operation may require a fast and a slow part. | |
972 | * It is this reason that clk_prepare and clk_enable are not mutually | |
973 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
974 | * Returns 0 on success, -EERROR otherwise. | |
975 | */ | |
976 | int clk_prepare(struct clk *clk) | |
977 | { | |
978 | int ret; | |
979 | ||
035a61c3 TV |
980 | if (!clk) |
981 | return 0; | |
982 | ||
eab89f69 | 983 | clk_prepare_lock(); |
035a61c3 | 984 | ret = clk_core_prepare(clk->core); |
eab89f69 | 985 | clk_prepare_unlock(); |
b2476490 MT |
986 | |
987 | return ret; | |
988 | } | |
989 | EXPORT_SYMBOL_GPL(clk_prepare); | |
990 | ||
035a61c3 | 991 | static void clk_core_disable(struct clk_core *clk) |
b2476490 MT |
992 | { |
993 | if (!clk) | |
994 | return; | |
995 | ||
996 | if (WARN_ON(clk->enable_count == 0)) | |
997 | return; | |
998 | ||
999 | if (--clk->enable_count > 0) | |
1000 | return; | |
1001 | ||
1002 | if (clk->ops->disable) | |
1003 | clk->ops->disable(clk->hw); | |
1004 | ||
035a61c3 TV |
1005 | clk_core_disable(clk->parent); |
1006 | } | |
1007 | ||
1008 | static void __clk_disable(struct clk *clk) | |
1009 | { | |
1010 | if (!clk) | |
1011 | return; | |
1012 | ||
1013 | clk_core_disable(clk->core); | |
b2476490 MT |
1014 | } |
1015 | ||
1016 | /** | |
1017 | * clk_disable - gate a clock | |
1018 | * @clk: the clk being gated | |
1019 | * | |
1020 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
1021 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
1022 | * clk if the operation is fast and will never sleep. One example is a | |
1023 | * SoC-internal clk which is controlled via simple register writes. In the | |
1024 | * complex case a clk gate operation may require a fast and a slow part. It is | |
1025 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
1026 | * In fact clk_disable must be called before clk_unprepare. | |
1027 | */ | |
1028 | void clk_disable(struct clk *clk) | |
1029 | { | |
1030 | unsigned long flags; | |
1031 | ||
63589e92 SB |
1032 | if (IS_ERR_OR_NULL(clk)) |
1033 | return; | |
1034 | ||
eab89f69 | 1035 | flags = clk_enable_lock(); |
b2476490 | 1036 | __clk_disable(clk); |
eab89f69 | 1037 | clk_enable_unlock(flags); |
b2476490 MT |
1038 | } |
1039 | EXPORT_SYMBOL_GPL(clk_disable); | |
1040 | ||
035a61c3 | 1041 | static int clk_core_enable(struct clk_core *clk) |
b2476490 MT |
1042 | { |
1043 | int ret = 0; | |
1044 | ||
1045 | if (!clk) | |
1046 | return 0; | |
1047 | ||
1048 | if (WARN_ON(clk->prepare_count == 0)) | |
1049 | return -ESHUTDOWN; | |
1050 | ||
1051 | if (clk->enable_count == 0) { | |
035a61c3 | 1052 | ret = clk_core_enable(clk->parent); |
b2476490 MT |
1053 | |
1054 | if (ret) | |
1055 | return ret; | |
1056 | ||
1057 | if (clk->ops->enable) { | |
1058 | ret = clk->ops->enable(clk->hw); | |
1059 | if (ret) { | |
035a61c3 | 1060 | clk_core_disable(clk->parent); |
b2476490 MT |
1061 | return ret; |
1062 | } | |
1063 | } | |
1064 | } | |
1065 | ||
1066 | clk->enable_count++; | |
1067 | return 0; | |
1068 | } | |
1069 | ||
035a61c3 TV |
1070 | static int __clk_enable(struct clk *clk) |
1071 | { | |
1072 | if (!clk) | |
1073 | return 0; | |
1074 | ||
1075 | return clk_core_enable(clk->core); | |
1076 | } | |
1077 | ||
b2476490 MT |
1078 | /** |
1079 | * clk_enable - ungate a clock | |
1080 | * @clk: the clk being ungated | |
1081 | * | |
1082 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
1083 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
1084 | * if the operation will never sleep. One example is a SoC-internal clk which | |
1085 | * is controlled via simple register writes. In the complex case a clk ungate | |
1086 | * operation may require a fast and a slow part. It is this reason that | |
1087 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
1088 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
1089 | * otherwise. | |
1090 | */ | |
1091 | int clk_enable(struct clk *clk) | |
1092 | { | |
1093 | unsigned long flags; | |
1094 | int ret; | |
1095 | ||
eab89f69 | 1096 | flags = clk_enable_lock(); |
b2476490 | 1097 | ret = __clk_enable(clk); |
eab89f69 | 1098 | clk_enable_unlock(flags); |
b2476490 MT |
1099 | |
1100 | return ret; | |
1101 | } | |
1102 | EXPORT_SYMBOL_GPL(clk_enable); | |
1103 | ||
035a61c3 | 1104 | static unsigned long clk_core_round_rate_nolock(struct clk_core *clk, |
1c8e6004 TV |
1105 | unsigned long rate, |
1106 | unsigned long min_rate, | |
1107 | unsigned long max_rate) | |
b2476490 | 1108 | { |
81536e07 | 1109 | unsigned long parent_rate = 0; |
035a61c3 | 1110 | struct clk_core *parent; |
646cafc6 | 1111 | struct clk_hw *parent_hw; |
b2476490 | 1112 | |
496eadf8 KK |
1113 | lockdep_assert_held(&prepare_lock); |
1114 | ||
b2476490 | 1115 | if (!clk) |
2ac6b1f5 | 1116 | return 0; |
b2476490 | 1117 | |
71472c0c JH |
1118 | parent = clk->parent; |
1119 | if (parent) | |
1120 | parent_rate = parent->rate; | |
1121 | ||
646cafc6 TV |
1122 | if (clk->ops->determine_rate) { |
1123 | parent_hw = parent ? parent->hw : NULL; | |
1c8e6004 TV |
1124 | return clk->ops->determine_rate(clk->hw, rate, |
1125 | min_rate, max_rate, | |
1126 | &parent_rate, &parent_hw); | |
646cafc6 | 1127 | } else if (clk->ops->round_rate) |
71472c0c JH |
1128 | return clk->ops->round_rate(clk->hw, rate, &parent_rate); |
1129 | else if (clk->flags & CLK_SET_RATE_PARENT) | |
1c8e6004 TV |
1130 | return clk_core_round_rate_nolock(clk->parent, rate, min_rate, |
1131 | max_rate); | |
71472c0c JH |
1132 | else |
1133 | return clk->rate; | |
b2476490 | 1134 | } |
035a61c3 | 1135 | |
1c8e6004 TV |
1136 | /** |
1137 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
1138 | * @hw: determine the rate of this clock | |
1139 | * @rate: target rate | |
1140 | * @min_rate: returned rate must be greater than this rate | |
1141 | * @max_rate: returned rate must be less than this rate | |
1142 | * | |
1143 | * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate and | |
1144 | * .determine_rate. | |
1145 | */ | |
1146 | unsigned long __clk_determine_rate(struct clk_hw *hw, | |
1147 | unsigned long rate, | |
1148 | unsigned long min_rate, | |
1149 | unsigned long max_rate) | |
1150 | { | |
1151 | if (!hw) | |
1152 | return 0; | |
1153 | ||
1154 | return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate); | |
1155 | } | |
1156 | EXPORT_SYMBOL_GPL(__clk_determine_rate); | |
1157 | ||
035a61c3 TV |
1158 | /** |
1159 | * __clk_round_rate - round the given rate for a clk | |
1160 | * @clk: round the rate of this clock | |
1161 | * @rate: the rate which is to be rounded | |
1162 | * | |
1163 | * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate | |
1164 | */ | |
1165 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) | |
1166 | { | |
1c8e6004 TV |
1167 | unsigned long min_rate; |
1168 | unsigned long max_rate; | |
1169 | ||
035a61c3 TV |
1170 | if (!clk) |
1171 | return 0; | |
1172 | ||
1c8e6004 TV |
1173 | clk_core_get_boundaries(clk->core, &min_rate, &max_rate); |
1174 | ||
1175 | return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate); | |
035a61c3 | 1176 | } |
1cdf8ee2 | 1177 | EXPORT_SYMBOL_GPL(__clk_round_rate); |
b2476490 MT |
1178 | |
1179 | /** | |
1180 | * clk_round_rate - round the given rate for a clk | |
1181 | * @clk: the clk for which we are rounding a rate | |
1182 | * @rate: the rate which is to be rounded | |
1183 | * | |
1184 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
1185 | * use which is then returned. If clk doesn't support round_rate operation | |
1186 | * then the parent rate is returned. | |
1187 | */ | |
1188 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
1189 | { | |
1190 | unsigned long ret; | |
1191 | ||
035a61c3 TV |
1192 | if (!clk) |
1193 | return 0; | |
1194 | ||
eab89f69 | 1195 | clk_prepare_lock(); |
b2476490 | 1196 | ret = __clk_round_rate(clk, rate); |
eab89f69 | 1197 | clk_prepare_unlock(); |
b2476490 MT |
1198 | |
1199 | return ret; | |
1200 | } | |
1201 | EXPORT_SYMBOL_GPL(clk_round_rate); | |
1202 | ||
1203 | /** | |
1204 | * __clk_notify - call clk notifier chain | |
1205 | * @clk: struct clk * that is changing rate | |
1206 | * @msg: clk notifier type (see include/linux/clk.h) | |
1207 | * @old_rate: old clk rate | |
1208 | * @new_rate: new clk rate | |
1209 | * | |
1210 | * Triggers a notifier call chain on the clk rate-change notification | |
1211 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
1212 | * and current rates to the notifier callback. Intended to be called by | |
1213 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
1214 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
1215 | * a driver returns that. | |
1216 | */ | |
035a61c3 | 1217 | static int __clk_notify(struct clk_core *clk, unsigned long msg, |
b2476490 MT |
1218 | unsigned long old_rate, unsigned long new_rate) |
1219 | { | |
1220 | struct clk_notifier *cn; | |
1221 | struct clk_notifier_data cnd; | |
1222 | int ret = NOTIFY_DONE; | |
1223 | ||
b2476490 MT |
1224 | cnd.old_rate = old_rate; |
1225 | cnd.new_rate = new_rate; | |
1226 | ||
1227 | list_for_each_entry(cn, &clk_notifier_list, node) { | |
035a61c3 TV |
1228 | if (cn->clk->core == clk) { |
1229 | cnd.clk = cn->clk; | |
b2476490 MT |
1230 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, |
1231 | &cnd); | |
b2476490 MT |
1232 | } |
1233 | } | |
1234 | ||
1235 | return ret; | |
1236 | } | |
1237 | ||
5279fc40 BB |
1238 | /** |
1239 | * __clk_recalc_accuracies | |
1240 | * @clk: first clk in the subtree | |
1241 | * | |
1242 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
1243 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
1244 | * callback then it is assumed that the clock will take on the accuracy of it's | |
1245 | * parent. | |
1246 | * | |
1247 | * Caller must hold prepare_lock. | |
1248 | */ | |
035a61c3 | 1249 | static void __clk_recalc_accuracies(struct clk_core *clk) |
5279fc40 BB |
1250 | { |
1251 | unsigned long parent_accuracy = 0; | |
035a61c3 | 1252 | struct clk_core *child; |
5279fc40 | 1253 | |
496eadf8 KK |
1254 | lockdep_assert_held(&prepare_lock); |
1255 | ||
5279fc40 BB |
1256 | if (clk->parent) |
1257 | parent_accuracy = clk->parent->accuracy; | |
1258 | ||
1259 | if (clk->ops->recalc_accuracy) | |
1260 | clk->accuracy = clk->ops->recalc_accuracy(clk->hw, | |
1261 | parent_accuracy); | |
1262 | else | |
1263 | clk->accuracy = parent_accuracy; | |
1264 | ||
1265 | hlist_for_each_entry(child, &clk->children, child_node) | |
1266 | __clk_recalc_accuracies(child); | |
1267 | } | |
1268 | ||
035a61c3 TV |
1269 | static long clk_core_get_accuracy(struct clk_core *clk) |
1270 | { | |
1271 | unsigned long accuracy; | |
1272 | ||
1273 | clk_prepare_lock(); | |
1274 | if (clk && (clk->flags & CLK_GET_ACCURACY_NOCACHE)) | |
1275 | __clk_recalc_accuracies(clk); | |
1276 | ||
1277 | accuracy = __clk_get_accuracy(clk); | |
1278 | clk_prepare_unlock(); | |
1279 | ||
1280 | return accuracy; | |
1281 | } | |
1282 | ||
5279fc40 BB |
1283 | /** |
1284 | * clk_get_accuracy - return the accuracy of clk | |
1285 | * @clk: the clk whose accuracy is being returned | |
1286 | * | |
1287 | * Simply returns the cached accuracy of the clk, unless | |
1288 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
1289 | * issued. | |
1290 | * If clk is NULL then returns 0. | |
1291 | */ | |
1292 | long clk_get_accuracy(struct clk *clk) | |
1293 | { | |
035a61c3 TV |
1294 | if (!clk) |
1295 | return 0; | |
5279fc40 | 1296 | |
035a61c3 | 1297 | return clk_core_get_accuracy(clk->core); |
5279fc40 BB |
1298 | } |
1299 | EXPORT_SYMBOL_GPL(clk_get_accuracy); | |
1300 | ||
035a61c3 TV |
1301 | static unsigned long clk_recalc(struct clk_core *clk, |
1302 | unsigned long parent_rate) | |
8f2c2db1 SB |
1303 | { |
1304 | if (clk->ops->recalc_rate) | |
1305 | return clk->ops->recalc_rate(clk->hw, parent_rate); | |
1306 | return parent_rate; | |
1307 | } | |
1308 | ||
b2476490 MT |
1309 | /** |
1310 | * __clk_recalc_rates | |
1311 | * @clk: first clk in the subtree | |
1312 | * @msg: notification type (see include/linux/clk.h) | |
1313 | * | |
1314 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
1315 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
24ee1a08 | 1316 | * it is assumed that the clock will take on the rate of its parent. |
b2476490 MT |
1317 | * |
1318 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
1319 | * if necessary. | |
1320 | * | |
1321 | * Caller must hold prepare_lock. | |
1322 | */ | |
035a61c3 | 1323 | static void __clk_recalc_rates(struct clk_core *clk, unsigned long msg) |
b2476490 MT |
1324 | { |
1325 | unsigned long old_rate; | |
1326 | unsigned long parent_rate = 0; | |
035a61c3 | 1327 | struct clk_core *child; |
b2476490 | 1328 | |
496eadf8 KK |
1329 | lockdep_assert_held(&prepare_lock); |
1330 | ||
b2476490 MT |
1331 | old_rate = clk->rate; |
1332 | ||
1333 | if (clk->parent) | |
1334 | parent_rate = clk->parent->rate; | |
1335 | ||
8f2c2db1 | 1336 | clk->rate = clk_recalc(clk, parent_rate); |
b2476490 MT |
1337 | |
1338 | /* | |
1339 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1340 | * & ABORT_RATE_CHANGE notifiers | |
1341 | */ | |
1342 | if (clk->notifier_count && msg) | |
1343 | __clk_notify(clk, msg, old_rate, clk->rate); | |
1344 | ||
b67bfe0d | 1345 | hlist_for_each_entry(child, &clk->children, child_node) |
b2476490 MT |
1346 | __clk_recalc_rates(child, msg); |
1347 | } | |
1348 | ||
035a61c3 | 1349 | static unsigned long clk_core_get_rate(struct clk_core *clk) |
a093bde2 UH |
1350 | { |
1351 | unsigned long rate; | |
1352 | ||
eab89f69 | 1353 | clk_prepare_lock(); |
a093bde2 UH |
1354 | |
1355 | if (clk && (clk->flags & CLK_GET_RATE_NOCACHE)) | |
1356 | __clk_recalc_rates(clk, 0); | |
1357 | ||
035a61c3 | 1358 | rate = clk_core_get_rate_nolock(clk); |
eab89f69 | 1359 | clk_prepare_unlock(); |
a093bde2 UH |
1360 | |
1361 | return rate; | |
1362 | } | |
035a61c3 TV |
1363 | EXPORT_SYMBOL_GPL(clk_core_get_rate); |
1364 | ||
1365 | /** | |
1366 | * clk_get_rate - return the rate of clk | |
1367 | * @clk: the clk whose rate is being returned | |
1368 | * | |
1369 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag | |
1370 | * is set, which means a recalc_rate will be issued. | |
1371 | * If clk is NULL then returns 0. | |
1372 | */ | |
1373 | unsigned long clk_get_rate(struct clk *clk) | |
1374 | { | |
1375 | if (!clk) | |
1376 | return 0; | |
1377 | ||
1378 | return clk_core_get_rate(clk->core); | |
1379 | } | |
a093bde2 UH |
1380 | EXPORT_SYMBOL_GPL(clk_get_rate); |
1381 | ||
035a61c3 TV |
1382 | static int clk_fetch_parent_index(struct clk_core *clk, |
1383 | struct clk_core *parent) | |
4935b22c | 1384 | { |
f1c8b2ed | 1385 | int i; |
4935b22c | 1386 | |
f1c8b2ed | 1387 | if (!clk->parents) { |
96a7ed90 TF |
1388 | clk->parents = kcalloc(clk->num_parents, |
1389 | sizeof(struct clk *), GFP_KERNEL); | |
f1c8b2ed TF |
1390 | if (!clk->parents) |
1391 | return -ENOMEM; | |
1392 | } | |
4935b22c JH |
1393 | |
1394 | /* | |
1395 | * find index of new parent clock using cached parent ptrs, | |
1396 | * or if not yet cached, use string name comparison and cache | |
035a61c3 | 1397 | * them now to avoid future calls to clk_core_lookup. |
4935b22c JH |
1398 | */ |
1399 | for (i = 0; i < clk->num_parents; i++) { | |
da0f0b2c | 1400 | if (clk->parents[i] == parent) |
f1c8b2ed | 1401 | return i; |
da0f0b2c TF |
1402 | |
1403 | if (clk->parents[i]) | |
1404 | continue; | |
1405 | ||
1406 | if (!strcmp(clk->parent_names[i], parent->name)) { | |
035a61c3 | 1407 | clk->parents[i] = clk_core_lookup(parent->name); |
f1c8b2ed | 1408 | return i; |
4935b22c JH |
1409 | } |
1410 | } | |
1411 | ||
f1c8b2ed | 1412 | return -EINVAL; |
4935b22c JH |
1413 | } |
1414 | ||
035a61c3 | 1415 | static void clk_reparent(struct clk_core *clk, struct clk_core *new_parent) |
4935b22c JH |
1416 | { |
1417 | hlist_del(&clk->child_node); | |
1418 | ||
903efc55 JH |
1419 | if (new_parent) { |
1420 | /* avoid duplicate POST_RATE_CHANGE notifications */ | |
1421 | if (new_parent->new_child == clk) | |
1422 | new_parent->new_child = NULL; | |
1423 | ||
4935b22c | 1424 | hlist_add_head(&clk->child_node, &new_parent->children); |
903efc55 | 1425 | } else { |
4935b22c | 1426 | hlist_add_head(&clk->child_node, &clk_orphan_list); |
903efc55 | 1427 | } |
4935b22c JH |
1428 | |
1429 | clk->parent = new_parent; | |
1430 | } | |
1431 | ||
035a61c3 TV |
1432 | static struct clk_core *__clk_set_parent_before(struct clk_core *clk, |
1433 | struct clk_core *parent) | |
4935b22c JH |
1434 | { |
1435 | unsigned long flags; | |
035a61c3 | 1436 | struct clk_core *old_parent = clk->parent; |
4935b22c JH |
1437 | |
1438 | /* | |
1439 | * Migrate prepare state between parents and prevent race with | |
1440 | * clk_enable(). | |
1441 | * | |
1442 | * If the clock is not prepared, then a race with | |
1443 | * clk_enable/disable() is impossible since we already have the | |
1444 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1445 | * a clk_prepare()). | |
1446 | * | |
1447 | * If the clock is prepared, migrate the prepared state to the new | |
1448 | * parent and also protect against a race with clk_enable() by | |
1449 | * forcing the clock and the new parent on. This ensures that all | |
1450 | * future calls to clk_enable() are practically NOPs with respect to | |
1451 | * hardware and software states. | |
1452 | * | |
1453 | * See also: Comment for clk_set_parent() below. | |
1454 | */ | |
1455 | if (clk->prepare_count) { | |
035a61c3 TV |
1456 | clk_core_prepare(parent); |
1457 | clk_core_enable(parent); | |
1458 | clk_core_enable(clk); | |
4935b22c JH |
1459 | } |
1460 | ||
1461 | /* update the clk tree topology */ | |
1462 | flags = clk_enable_lock(); | |
1463 | clk_reparent(clk, parent); | |
1464 | clk_enable_unlock(flags); | |
1465 | ||
3fa2252b SB |
1466 | return old_parent; |
1467 | } | |
1468 | ||
035a61c3 TV |
1469 | static void __clk_set_parent_after(struct clk_core *core, |
1470 | struct clk_core *parent, | |
1471 | struct clk_core *old_parent) | |
3fa2252b SB |
1472 | { |
1473 | /* | |
1474 | * Finish the migration of prepare state and undo the changes done | |
1475 | * for preventing a race with clk_enable(). | |
1476 | */ | |
035a61c3 TV |
1477 | if (core->prepare_count) { |
1478 | clk_core_disable(core); | |
1479 | clk_core_disable(old_parent); | |
1480 | clk_core_unprepare(old_parent); | |
3fa2252b | 1481 | } |
3fa2252b SB |
1482 | } |
1483 | ||
035a61c3 TV |
1484 | static int __clk_set_parent(struct clk_core *clk, struct clk_core *parent, |
1485 | u8 p_index) | |
3fa2252b SB |
1486 | { |
1487 | unsigned long flags; | |
1488 | int ret = 0; | |
035a61c3 | 1489 | struct clk_core *old_parent; |
3fa2252b SB |
1490 | |
1491 | old_parent = __clk_set_parent_before(clk, parent); | |
1492 | ||
4935b22c JH |
1493 | /* change clock input source */ |
1494 | if (parent && clk->ops->set_parent) | |
1495 | ret = clk->ops->set_parent(clk->hw, p_index); | |
1496 | ||
1497 | if (ret) { | |
1498 | flags = clk_enable_lock(); | |
1499 | clk_reparent(clk, old_parent); | |
1500 | clk_enable_unlock(flags); | |
1501 | ||
1502 | if (clk->prepare_count) { | |
035a61c3 TV |
1503 | clk_core_disable(clk); |
1504 | clk_core_disable(parent); | |
1505 | clk_core_unprepare(parent); | |
4935b22c JH |
1506 | } |
1507 | return ret; | |
1508 | } | |
1509 | ||
3fa2252b | 1510 | __clk_set_parent_after(clk, parent, old_parent); |
4935b22c | 1511 | |
4935b22c JH |
1512 | return 0; |
1513 | } | |
1514 | ||
b2476490 MT |
1515 | /** |
1516 | * __clk_speculate_rates | |
1517 | * @clk: first clk in the subtree | |
1518 | * @parent_rate: the "future" rate of clk's parent | |
1519 | * | |
1520 | * Walks the subtree of clks starting with clk, speculating rates as it | |
1521 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1522 | * | |
1523 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1524 | * pre-rate change notifications and returns early if no clks in the | |
1525 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1526 | * implement the .recalc_rate callback then it is assumed that the clock will | |
24ee1a08 | 1527 | * take on the rate of its parent. |
b2476490 MT |
1528 | * |
1529 | * Caller must hold prepare_lock. | |
1530 | */ | |
035a61c3 TV |
1531 | static int __clk_speculate_rates(struct clk_core *clk, |
1532 | unsigned long parent_rate) | |
b2476490 | 1533 | { |
035a61c3 | 1534 | struct clk_core *child; |
b2476490 MT |
1535 | unsigned long new_rate; |
1536 | int ret = NOTIFY_DONE; | |
1537 | ||
496eadf8 KK |
1538 | lockdep_assert_held(&prepare_lock); |
1539 | ||
8f2c2db1 | 1540 | new_rate = clk_recalc(clk, parent_rate); |
b2476490 | 1541 | |
fb72a059 | 1542 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ |
b2476490 MT |
1543 | if (clk->notifier_count) |
1544 | ret = __clk_notify(clk, PRE_RATE_CHANGE, clk->rate, new_rate); | |
1545 | ||
86bcfa2e MT |
1546 | if (ret & NOTIFY_STOP_MASK) { |
1547 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1548 | __func__, clk->name, ret); | |
b2476490 | 1549 | goto out; |
86bcfa2e | 1550 | } |
b2476490 | 1551 | |
b67bfe0d | 1552 | hlist_for_each_entry(child, &clk->children, child_node) { |
b2476490 | 1553 | ret = __clk_speculate_rates(child, new_rate); |
fb72a059 | 1554 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
1555 | break; |
1556 | } | |
1557 | ||
1558 | out: | |
1559 | return ret; | |
1560 | } | |
1561 | ||
035a61c3 TV |
1562 | static void clk_calc_subtree(struct clk_core *clk, unsigned long new_rate, |
1563 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1564 | { |
035a61c3 | 1565 | struct clk_core *child; |
b2476490 MT |
1566 | |
1567 | clk->new_rate = new_rate; | |
71472c0c JH |
1568 | clk->new_parent = new_parent; |
1569 | clk->new_parent_index = p_index; | |
1570 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1571 | clk->new_child = NULL; | |
1572 | if (new_parent && new_parent != clk->parent) | |
1573 | new_parent->new_child = clk; | |
b2476490 | 1574 | |
b67bfe0d | 1575 | hlist_for_each_entry(child, &clk->children, child_node) { |
8f2c2db1 | 1576 | child->new_rate = clk_recalc(child, new_rate); |
71472c0c | 1577 | clk_calc_subtree(child, child->new_rate, NULL, 0); |
b2476490 MT |
1578 | } |
1579 | } | |
1580 | ||
1581 | /* | |
1582 | * calculate the new rates returning the topmost clock that has to be | |
1583 | * changed. | |
1584 | */ | |
035a61c3 TV |
1585 | static struct clk_core *clk_calc_new_rates(struct clk_core *clk, |
1586 | unsigned long rate) | |
b2476490 | 1587 | { |
035a61c3 TV |
1588 | struct clk_core *top = clk; |
1589 | struct clk_core *old_parent, *parent; | |
646cafc6 | 1590 | struct clk_hw *parent_hw; |
81536e07 | 1591 | unsigned long best_parent_rate = 0; |
b2476490 | 1592 | unsigned long new_rate; |
1c8e6004 TV |
1593 | unsigned long min_rate; |
1594 | unsigned long max_rate; | |
f1c8b2ed | 1595 | int p_index = 0; |
b2476490 | 1596 | |
7452b219 MT |
1597 | /* sanity */ |
1598 | if (IS_ERR_OR_NULL(clk)) | |
1599 | return NULL; | |
1600 | ||
63f5c3b2 | 1601 | /* save parent rate, if it exists */ |
71472c0c JH |
1602 | parent = old_parent = clk->parent; |
1603 | if (parent) | |
1604 | best_parent_rate = parent->rate; | |
1605 | ||
1c8e6004 TV |
1606 | clk_core_get_boundaries(clk, &min_rate, &max_rate); |
1607 | ||
71472c0c JH |
1608 | /* find the closest rate and parent clk/rate */ |
1609 | if (clk->ops->determine_rate) { | |
646cafc6 | 1610 | parent_hw = parent ? parent->hw : NULL; |
71472c0c | 1611 | new_rate = clk->ops->determine_rate(clk->hw, rate, |
1c8e6004 TV |
1612 | min_rate, |
1613 | max_rate, | |
71472c0c | 1614 | &best_parent_rate, |
646cafc6 | 1615 | &parent_hw); |
035a61c3 | 1616 | parent = parent_hw ? parent_hw->core : NULL; |
71472c0c JH |
1617 | } else if (clk->ops->round_rate) { |
1618 | new_rate = clk->ops->round_rate(clk->hw, rate, | |
1619 | &best_parent_rate); | |
1c8e6004 TV |
1620 | if (new_rate < min_rate || new_rate > max_rate) |
1621 | return NULL; | |
71472c0c JH |
1622 | } else if (!parent || !(clk->flags & CLK_SET_RATE_PARENT)) { |
1623 | /* pass-through clock without adjustable parent */ | |
1624 | clk->new_rate = clk->rate; | |
1625 | return NULL; | |
1626 | } else { | |
1627 | /* pass-through clock with adjustable parent */ | |
1628 | top = clk_calc_new_rates(parent, rate); | |
1629 | new_rate = parent->new_rate; | |
63f5c3b2 | 1630 | goto out; |
7452b219 MT |
1631 | } |
1632 | ||
71472c0c JH |
1633 | /* some clocks must be gated to change parent */ |
1634 | if (parent != old_parent && | |
1635 | (clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) { | |
1636 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1637 | __func__, clk->name); | |
b2476490 MT |
1638 | return NULL; |
1639 | } | |
1640 | ||
71472c0c | 1641 | /* try finding the new parent index */ |
4526e7b8 | 1642 | if (parent && clk->num_parents > 1) { |
71472c0c | 1643 | p_index = clk_fetch_parent_index(clk, parent); |
f1c8b2ed | 1644 | if (p_index < 0) { |
71472c0c JH |
1645 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
1646 | __func__, parent->name, clk->name); | |
1647 | return NULL; | |
1648 | } | |
b2476490 MT |
1649 | } |
1650 | ||
71472c0c JH |
1651 | if ((clk->flags & CLK_SET_RATE_PARENT) && parent && |
1652 | best_parent_rate != parent->rate) | |
1653 | top = clk_calc_new_rates(parent, best_parent_rate); | |
b2476490 MT |
1654 | |
1655 | out: | |
71472c0c | 1656 | clk_calc_subtree(clk, new_rate, parent, p_index); |
b2476490 MT |
1657 | |
1658 | return top; | |
1659 | } | |
1660 | ||
1661 | /* | |
1662 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1663 | * so that in case of an error we can walk down the whole tree again and | |
1664 | * abort the change. | |
1665 | */ | |
035a61c3 TV |
1666 | static struct clk_core *clk_propagate_rate_change(struct clk_core *clk, |
1667 | unsigned long event) | |
b2476490 | 1668 | { |
035a61c3 | 1669 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1670 | int ret = NOTIFY_DONE; |
1671 | ||
1672 | if (clk->rate == clk->new_rate) | |
5fda6858 | 1673 | return NULL; |
b2476490 MT |
1674 | |
1675 | if (clk->notifier_count) { | |
1676 | ret = __clk_notify(clk, event, clk->rate, clk->new_rate); | |
fb72a059 | 1677 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
1678 | fail_clk = clk; |
1679 | } | |
1680 | ||
b67bfe0d | 1681 | hlist_for_each_entry(child, &clk->children, child_node) { |
71472c0c JH |
1682 | /* Skip children who will be reparented to another clock */ |
1683 | if (child->new_parent && child->new_parent != clk) | |
1684 | continue; | |
1685 | tmp_clk = clk_propagate_rate_change(child, event); | |
1686 | if (tmp_clk) | |
1687 | fail_clk = tmp_clk; | |
1688 | } | |
1689 | ||
1690 | /* handle the new child who might not be in clk->children yet */ | |
1691 | if (clk->new_child) { | |
1692 | tmp_clk = clk_propagate_rate_change(clk->new_child, event); | |
1693 | if (tmp_clk) | |
1694 | fail_clk = tmp_clk; | |
b2476490 MT |
1695 | } |
1696 | ||
1697 | return fail_clk; | |
1698 | } | |
1699 | ||
1700 | /* | |
1701 | * walk down a subtree and set the new rates notifying the rate | |
1702 | * change on the way | |
1703 | */ | |
035a61c3 | 1704 | static void clk_change_rate(struct clk_core *clk) |
b2476490 | 1705 | { |
035a61c3 | 1706 | struct clk_core *child; |
067bb174 | 1707 | struct hlist_node *tmp; |
b2476490 | 1708 | unsigned long old_rate; |
bf47b4fd | 1709 | unsigned long best_parent_rate = 0; |
3fa2252b | 1710 | bool skip_set_rate = false; |
035a61c3 | 1711 | struct clk_core *old_parent; |
b2476490 MT |
1712 | |
1713 | old_rate = clk->rate; | |
1714 | ||
3fa2252b SB |
1715 | if (clk->new_parent) |
1716 | best_parent_rate = clk->new_parent->rate; | |
1717 | else if (clk->parent) | |
bf47b4fd PM |
1718 | best_parent_rate = clk->parent->rate; |
1719 | ||
3fa2252b SB |
1720 | if (clk->new_parent && clk->new_parent != clk->parent) { |
1721 | old_parent = __clk_set_parent_before(clk, clk->new_parent); | |
1722 | ||
1723 | if (clk->ops->set_rate_and_parent) { | |
1724 | skip_set_rate = true; | |
1725 | clk->ops->set_rate_and_parent(clk->hw, clk->new_rate, | |
1726 | best_parent_rate, | |
1727 | clk->new_parent_index); | |
1728 | } else if (clk->ops->set_parent) { | |
1729 | clk->ops->set_parent(clk->hw, clk->new_parent_index); | |
1730 | } | |
1731 | ||
1732 | __clk_set_parent_after(clk, clk->new_parent, old_parent); | |
1733 | } | |
1734 | ||
1735 | if (!skip_set_rate && clk->ops->set_rate) | |
bf47b4fd | 1736 | clk->ops->set_rate(clk->hw, clk->new_rate, best_parent_rate); |
b2476490 | 1737 | |
8f2c2db1 | 1738 | clk->rate = clk_recalc(clk, best_parent_rate); |
b2476490 MT |
1739 | |
1740 | if (clk->notifier_count && old_rate != clk->rate) | |
1741 | __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate); | |
1742 | ||
067bb174 TK |
1743 | /* |
1744 | * Use safe iteration, as change_rate can actually swap parents | |
1745 | * for certain clock types. | |
1746 | */ | |
1747 | hlist_for_each_entry_safe(child, tmp, &clk->children, child_node) { | |
71472c0c JH |
1748 | /* Skip children who will be reparented to another clock */ |
1749 | if (child->new_parent && child->new_parent != clk) | |
1750 | continue; | |
b2476490 | 1751 | clk_change_rate(child); |
71472c0c JH |
1752 | } |
1753 | ||
1754 | /* handle the new child who might not be in clk->children yet */ | |
1755 | if (clk->new_child) | |
1756 | clk_change_rate(clk->new_child); | |
b2476490 MT |
1757 | } |
1758 | ||
1c8e6004 TV |
1759 | static int clk_core_set_rate_nolock(struct clk_core *clk, |
1760 | unsigned long req_rate) | |
1761 | { | |
1762 | struct clk_core *top, *fail_clk; | |
1763 | unsigned long rate = req_rate; | |
1764 | int ret = 0; | |
1765 | ||
1766 | if (!clk) | |
1767 | return 0; | |
1768 | ||
1769 | /* bail early if nothing to do */ | |
1770 | if (rate == clk_core_get_rate_nolock(clk)) | |
1771 | return 0; | |
1772 | ||
1773 | if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) | |
1774 | return -EBUSY; | |
1775 | ||
1776 | /* calculate new rates and get the topmost changed clock */ | |
1777 | top = clk_calc_new_rates(clk, rate); | |
1778 | if (!top) | |
1779 | return -EINVAL; | |
1780 | ||
1781 | /* notify that we are about to change rates */ | |
1782 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1783 | if (fail_clk) { | |
1784 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1785 | fail_clk->name); | |
1786 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1787 | return -EBUSY; | |
1788 | } | |
1789 | ||
1790 | /* change the rates */ | |
1791 | clk_change_rate(top); | |
1792 | ||
1793 | clk->req_rate = req_rate; | |
1794 | ||
1795 | return ret; | |
1796 | } | |
1797 | ||
b2476490 MT |
1798 | /** |
1799 | * clk_set_rate - specify a new rate for clk | |
1800 | * @clk: the clk whose rate is being changed | |
1801 | * @rate: the new rate for clk | |
1802 | * | |
5654dc94 | 1803 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
b2476490 | 1804 | * |
5654dc94 MT |
1805 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to |
1806 | * propagate up to clk's parent; whether or not this happens depends on the | |
1807 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1808 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1809 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
24ee1a08 | 1810 | * up to clk's parent and set its rate. Upward propagation will continue |
5654dc94 MT |
1811 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or |
1812 | * .round_rate stops requesting changes to clk's parent_rate. | |
b2476490 | 1813 | * |
5654dc94 MT |
1814 | * Rate changes are accomplished via tree traversal that also recalculates the |
1815 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
b2476490 MT |
1816 | * |
1817 | * Returns 0 on success, -EERROR otherwise. | |
1818 | */ | |
1819 | int clk_set_rate(struct clk *clk, unsigned long rate) | |
1820 | { | |
1c8e6004 | 1821 | int ret; |
b2476490 | 1822 | |
89ac8d7a MT |
1823 | if (!clk) |
1824 | return 0; | |
1825 | ||
b2476490 | 1826 | /* prevent racing with updates to the clock topology */ |
eab89f69 | 1827 | clk_prepare_lock(); |
b2476490 | 1828 | |
1c8e6004 | 1829 | ret = clk_core_set_rate_nolock(clk->core, rate); |
b2476490 | 1830 | |
1c8e6004 | 1831 | clk_prepare_unlock(); |
0e1c0301 | 1832 | |
1c8e6004 TV |
1833 | return ret; |
1834 | } | |
1835 | EXPORT_SYMBOL_GPL(clk_set_rate); | |
b2476490 | 1836 | |
1c8e6004 TV |
1837 | /** |
1838 | * clk_set_rate_range - set a rate range for a clock source | |
1839 | * @clk: clock source | |
1840 | * @min: desired minimum clock rate in Hz, inclusive | |
1841 | * @max: desired maximum clock rate in Hz, inclusive | |
1842 | * | |
1843 | * Returns success (0) or negative errno. | |
1844 | */ | |
1845 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
1846 | { | |
1847 | int ret = 0; | |
1848 | ||
1849 | if (!clk) | |
1850 | return 0; | |
1851 | ||
1852 | if (min > max) { | |
1853 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1854 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1855 | min, max); | |
1856 | return -EINVAL; | |
b2476490 MT |
1857 | } |
1858 | ||
1c8e6004 TV |
1859 | clk_prepare_lock(); |
1860 | ||
1861 | if (min != clk->min_rate || max != clk->max_rate) { | |
1862 | clk->min_rate = min; | |
1863 | clk->max_rate = max; | |
1864 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
1865 | } | |
b2476490 | 1866 | |
eab89f69 | 1867 | clk_prepare_unlock(); |
b2476490 MT |
1868 | |
1869 | return ret; | |
1870 | } | |
1c8e6004 TV |
1871 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
1872 | ||
1873 | /** | |
1874 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1875 | * @clk: clock source | |
1876 | * @rate: desired minimum clock rate in Hz, inclusive | |
1877 | * | |
1878 | * Returns success (0) or negative errno. | |
1879 | */ | |
1880 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
1881 | { | |
1882 | if (!clk) | |
1883 | return 0; | |
1884 | ||
1885 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
1886 | } | |
1887 | EXPORT_SYMBOL_GPL(clk_set_min_rate); | |
1888 | ||
1889 | /** | |
1890 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1891 | * @clk: clock source | |
1892 | * @rate: desired maximum clock rate in Hz, inclusive | |
1893 | * | |
1894 | * Returns success (0) or negative errno. | |
1895 | */ | |
1896 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
1897 | { | |
1898 | if (!clk) | |
1899 | return 0; | |
1900 | ||
1901 | return clk_set_rate_range(clk, clk->min_rate, rate); | |
1902 | } | |
1903 | EXPORT_SYMBOL_GPL(clk_set_max_rate); | |
b2476490 MT |
1904 | |
1905 | /** | |
1906 | * clk_get_parent - return the parent of a clk | |
1907 | * @clk: the clk whose parent gets returned | |
1908 | * | |
1909 | * Simply returns clk->parent. Returns NULL if clk is NULL. | |
1910 | */ | |
1911 | struct clk *clk_get_parent(struct clk *clk) | |
1912 | { | |
1913 | struct clk *parent; | |
1914 | ||
eab89f69 | 1915 | clk_prepare_lock(); |
b2476490 | 1916 | parent = __clk_get_parent(clk); |
eab89f69 | 1917 | clk_prepare_unlock(); |
b2476490 MT |
1918 | |
1919 | return parent; | |
1920 | } | |
1921 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
1922 | ||
1923 | /* | |
1924 | * .get_parent is mandatory for clocks with multiple possible parents. It is | |
1925 | * optional for single-parent clocks. Always call .get_parent if it is | |
1926 | * available and WARN if it is missing for multi-parent clocks. | |
1927 | * | |
1928 | * For single-parent clocks without .get_parent, first check to see if the | |
1929 | * .parents array exists, and if so use it to avoid an expensive tree | |
035a61c3 | 1930 | * traversal. If .parents does not exist then walk the tree. |
b2476490 | 1931 | */ |
035a61c3 | 1932 | static struct clk_core *__clk_init_parent(struct clk_core *clk) |
b2476490 | 1933 | { |
035a61c3 | 1934 | struct clk_core *ret = NULL; |
b2476490 MT |
1935 | u8 index; |
1936 | ||
1937 | /* handle the trivial cases */ | |
1938 | ||
1939 | if (!clk->num_parents) | |
1940 | goto out; | |
1941 | ||
1942 | if (clk->num_parents == 1) { | |
1943 | if (IS_ERR_OR_NULL(clk->parent)) | |
035a61c3 | 1944 | clk->parent = clk_core_lookup(clk->parent_names[0]); |
b2476490 MT |
1945 | ret = clk->parent; |
1946 | goto out; | |
1947 | } | |
1948 | ||
1949 | if (!clk->ops->get_parent) { | |
1950 | WARN(!clk->ops->get_parent, | |
1951 | "%s: multi-parent clocks must implement .get_parent\n", | |
1952 | __func__); | |
1953 | goto out; | |
1954 | }; | |
1955 | ||
1956 | /* | |
1957 | * Do our best to cache parent clocks in clk->parents. This prevents | |
035a61c3 TV |
1958 | * unnecessary and expensive lookups. We don't set clk->parent here; |
1959 | * that is done by the calling function. | |
b2476490 MT |
1960 | */ |
1961 | ||
1962 | index = clk->ops->get_parent(clk->hw); | |
1963 | ||
1964 | if (!clk->parents) | |
1965 | clk->parents = | |
96a7ed90 | 1966 | kcalloc(clk->num_parents, sizeof(struct clk *), |
b2476490 MT |
1967 | GFP_KERNEL); |
1968 | ||
035a61c3 | 1969 | ret = clk_core_get_parent_by_index(clk, index); |
b2476490 MT |
1970 | |
1971 | out: | |
1972 | return ret; | |
1973 | } | |
1974 | ||
035a61c3 TV |
1975 | static void clk_core_reparent(struct clk_core *clk, |
1976 | struct clk_core *new_parent) | |
b33d212f UH |
1977 | { |
1978 | clk_reparent(clk, new_parent); | |
5279fc40 | 1979 | __clk_recalc_accuracies(clk); |
b2476490 MT |
1980 | __clk_recalc_rates(clk, POST_RATE_CHANGE); |
1981 | } | |
1982 | ||
b2476490 | 1983 | /** |
4e88f3de TR |
1984 | * clk_has_parent - check if a clock is a possible parent for another |
1985 | * @clk: clock source | |
1986 | * @parent: parent clock source | |
b2476490 | 1987 | * |
4e88f3de TR |
1988 | * This function can be used in drivers that need to check that a clock can be |
1989 | * the parent of another without actually changing the parent. | |
f8aa0bd5 | 1990 | * |
4e88f3de | 1991 | * Returns true if @parent is a possible parent for @clk, false otherwise. |
b2476490 | 1992 | */ |
4e88f3de TR |
1993 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
1994 | { | |
035a61c3 | 1995 | struct clk_core *core, *parent_core; |
4e88f3de TR |
1996 | unsigned int i; |
1997 | ||
1998 | /* NULL clocks should be nops, so return success if either is NULL. */ | |
1999 | if (!clk || !parent) | |
2000 | return true; | |
2001 | ||
035a61c3 TV |
2002 | core = clk->core; |
2003 | parent_core = parent->core; | |
2004 | ||
4e88f3de | 2005 | /* Optimize for the case where the parent is already the parent. */ |
035a61c3 | 2006 | if (core->parent == parent_core) |
4e88f3de TR |
2007 | return true; |
2008 | ||
035a61c3 TV |
2009 | for (i = 0; i < core->num_parents; i++) |
2010 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
4e88f3de TR |
2011 | return true; |
2012 | ||
2013 | return false; | |
2014 | } | |
2015 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
2016 | ||
035a61c3 | 2017 | static int clk_core_set_parent(struct clk_core *clk, struct clk_core *parent) |
b2476490 MT |
2018 | { |
2019 | int ret = 0; | |
f1c8b2ed | 2020 | int p_index = 0; |
031dcc9b | 2021 | unsigned long p_rate = 0; |
b2476490 | 2022 | |
89ac8d7a MT |
2023 | if (!clk) |
2024 | return 0; | |
2025 | ||
031dcc9b UH |
2026 | /* verify ops for for multi-parent clks */ |
2027 | if ((clk->num_parents > 1) && (!clk->ops->set_parent)) | |
b2476490 MT |
2028 | return -ENOSYS; |
2029 | ||
2030 | /* prevent racing with updates to the clock topology */ | |
eab89f69 | 2031 | clk_prepare_lock(); |
b2476490 MT |
2032 | |
2033 | if (clk->parent == parent) | |
2034 | goto out; | |
2035 | ||
031dcc9b UH |
2036 | /* check that we are allowed to re-parent if the clock is in use */ |
2037 | if ((clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) { | |
2038 | ret = -EBUSY; | |
2039 | goto out; | |
2040 | } | |
2041 | ||
2042 | /* try finding the new parent index */ | |
2043 | if (parent) { | |
2044 | p_index = clk_fetch_parent_index(clk, parent); | |
2045 | p_rate = parent->rate; | |
f1c8b2ed | 2046 | if (p_index < 0) { |
031dcc9b UH |
2047 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
2048 | __func__, parent->name, clk->name); | |
f1c8b2ed | 2049 | ret = p_index; |
031dcc9b UH |
2050 | goto out; |
2051 | } | |
2052 | } | |
2053 | ||
b2476490 | 2054 | /* propagate PRE_RATE_CHANGE notifications */ |
f3aab5d6 | 2055 | ret = __clk_speculate_rates(clk, p_rate); |
b2476490 MT |
2056 | |
2057 | /* abort if a driver objects */ | |
fb72a059 | 2058 | if (ret & NOTIFY_STOP_MASK) |
b2476490 MT |
2059 | goto out; |
2060 | ||
031dcc9b UH |
2061 | /* do the re-parent */ |
2062 | ret = __clk_set_parent(clk, parent, p_index); | |
b2476490 | 2063 | |
5279fc40 BB |
2064 | /* propagate rate an accuracy recalculation accordingly */ |
2065 | if (ret) { | |
b2476490 | 2066 | __clk_recalc_rates(clk, ABORT_RATE_CHANGE); |
5279fc40 | 2067 | } else { |
a68de8e4 | 2068 | __clk_recalc_rates(clk, POST_RATE_CHANGE); |
5279fc40 BB |
2069 | __clk_recalc_accuracies(clk); |
2070 | } | |
b2476490 MT |
2071 | |
2072 | out: | |
eab89f69 | 2073 | clk_prepare_unlock(); |
b2476490 MT |
2074 | |
2075 | return ret; | |
2076 | } | |
035a61c3 TV |
2077 | |
2078 | /** | |
2079 | * clk_set_parent - switch the parent of a mux clk | |
2080 | * @clk: the mux clk whose input we are switching | |
2081 | * @parent: the new input to clk | |
2082 | * | |
2083 | * Re-parent clk to use parent as its new input source. If clk is in | |
2084 | * prepared state, the clk will get enabled for the duration of this call. If | |
2085 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
2086 | * that, the reparenting is glitchy in hardware, etc), use the | |
2087 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
2088 | * | |
2089 | * After successfully changing clk's parent clk_set_parent will update the | |
2090 | * clk topology, sysfs topology and propagate rate recalculation via | |
2091 | * __clk_recalc_rates. | |
2092 | * | |
2093 | * Returns 0 on success, -EERROR otherwise. | |
2094 | */ | |
2095 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
2096 | { | |
2097 | if (!clk) | |
2098 | return 0; | |
2099 | ||
2100 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
2101 | } | |
b2476490 MT |
2102 | EXPORT_SYMBOL_GPL(clk_set_parent); |
2103 | ||
e59c5371 MT |
2104 | /** |
2105 | * clk_set_phase - adjust the phase shift of a clock signal | |
2106 | * @clk: clock signal source | |
2107 | * @degrees: number of degrees the signal is shifted | |
2108 | * | |
2109 | * Shifts the phase of a clock signal by the specified | |
2110 | * degrees. Returns 0 on success, -EERROR otherwise. | |
2111 | * | |
2112 | * This function makes no distinction about the input or reference | |
2113 | * signal that we adjust the clock signal phase against. For example | |
2114 | * phase locked-loop clock signal generators we may shift phase with | |
2115 | * respect to feedback clock signal input, but for other cases the | |
2116 | * clock phase may be shifted with respect to some other, unspecified | |
2117 | * signal. | |
2118 | * | |
2119 | * Additionally the concept of phase shift does not propagate through | |
2120 | * the clock tree hierarchy, which sets it apart from clock rates and | |
2121 | * clock accuracy. A parent clock phase attribute does not have an | |
2122 | * impact on the phase attribute of a child clock. | |
2123 | */ | |
2124 | int clk_set_phase(struct clk *clk, int degrees) | |
2125 | { | |
08b95756 | 2126 | int ret = -EINVAL; |
e59c5371 MT |
2127 | |
2128 | if (!clk) | |
08b95756 | 2129 | return 0; |
e59c5371 MT |
2130 | |
2131 | /* sanity check degrees */ | |
2132 | degrees %= 360; | |
2133 | if (degrees < 0) | |
2134 | degrees += 360; | |
2135 | ||
2136 | clk_prepare_lock(); | |
2137 | ||
08b95756 SB |
2138 | if (clk->core->ops->set_phase) |
2139 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
e59c5371 MT |
2140 | |
2141 | if (!ret) | |
035a61c3 | 2142 | clk->core->phase = degrees; |
e59c5371 | 2143 | |
e59c5371 MT |
2144 | clk_prepare_unlock(); |
2145 | ||
e59c5371 MT |
2146 | return ret; |
2147 | } | |
9767b04f | 2148 | EXPORT_SYMBOL_GPL(clk_set_phase); |
e59c5371 | 2149 | |
035a61c3 | 2150 | static int clk_core_get_phase(struct clk_core *clk) |
e59c5371 MT |
2151 | { |
2152 | int ret = 0; | |
2153 | ||
2154 | if (!clk) | |
2155 | goto out; | |
2156 | ||
2157 | clk_prepare_lock(); | |
2158 | ret = clk->phase; | |
2159 | clk_prepare_unlock(); | |
2160 | ||
2161 | out: | |
2162 | return ret; | |
2163 | } | |
9767b04f | 2164 | EXPORT_SYMBOL_GPL(clk_get_phase); |
e59c5371 | 2165 | |
035a61c3 TV |
2166 | /** |
2167 | * clk_get_phase - return the phase shift of a clock signal | |
2168 | * @clk: clock signal source | |
2169 | * | |
2170 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
2171 | * -EERROR. | |
2172 | */ | |
2173 | int clk_get_phase(struct clk *clk) | |
2174 | { | |
2175 | if (!clk) | |
2176 | return 0; | |
2177 | ||
2178 | return clk_core_get_phase(clk->core); | |
2179 | } | |
e59c5371 | 2180 | |
b2476490 MT |
2181 | /** |
2182 | * __clk_init - initialize the data structures in a struct clk | |
2183 | * @dev: device initializing this clk, placeholder for now | |
2184 | * @clk: clk being initialized | |
2185 | * | |
035a61c3 | 2186 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2187 | * parent and rate and sets them both. |
b2476490 | 2188 | */ |
b09d6d99 | 2189 | static int __clk_init(struct device *dev, struct clk *clk_user) |
b2476490 | 2190 | { |
d1302a36 | 2191 | int i, ret = 0; |
035a61c3 | 2192 | struct clk_core *orphan; |
b67bfe0d | 2193 | struct hlist_node *tmp2; |
035a61c3 | 2194 | struct clk_core *clk; |
1c8e6004 | 2195 | unsigned long rate; |
b2476490 | 2196 | |
035a61c3 | 2197 | if (!clk_user) |
d1302a36 | 2198 | return -EINVAL; |
b2476490 | 2199 | |
035a61c3 TV |
2200 | clk = clk_user->core; |
2201 | ||
eab89f69 | 2202 | clk_prepare_lock(); |
b2476490 MT |
2203 | |
2204 | /* check to see if a clock with this name is already registered */ | |
035a61c3 | 2205 | if (clk_core_lookup(clk->name)) { |
d1302a36 MT |
2206 | pr_debug("%s: clk %s already initialized\n", |
2207 | __func__, clk->name); | |
2208 | ret = -EEXIST; | |
b2476490 | 2209 | goto out; |
d1302a36 | 2210 | } |
b2476490 | 2211 | |
d4d7e3dd MT |
2212 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
2213 | if (clk->ops->set_rate && | |
71472c0c JH |
2214 | !((clk->ops->round_rate || clk->ops->determine_rate) && |
2215 | clk->ops->recalc_rate)) { | |
2216 | pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", | |
d4d7e3dd | 2217 | __func__, clk->name); |
d1302a36 | 2218 | ret = -EINVAL; |
d4d7e3dd MT |
2219 | goto out; |
2220 | } | |
2221 | ||
2222 | if (clk->ops->set_parent && !clk->ops->get_parent) { | |
2223 | pr_warning("%s: %s must implement .get_parent & .set_parent\n", | |
2224 | __func__, clk->name); | |
d1302a36 | 2225 | ret = -EINVAL; |
d4d7e3dd MT |
2226 | goto out; |
2227 | } | |
2228 | ||
3fa2252b SB |
2229 | if (clk->ops->set_rate_and_parent && |
2230 | !(clk->ops->set_parent && clk->ops->set_rate)) { | |
2231 | pr_warn("%s: %s must implement .set_parent & .set_rate\n", | |
2232 | __func__, clk->name); | |
2233 | ret = -EINVAL; | |
2234 | goto out; | |
2235 | } | |
2236 | ||
b2476490 MT |
2237 | /* throw a WARN if any entries in parent_names are NULL */ |
2238 | for (i = 0; i < clk->num_parents; i++) | |
2239 | WARN(!clk->parent_names[i], | |
2240 | "%s: invalid NULL in %s's .parent_names\n", | |
2241 | __func__, clk->name); | |
2242 | ||
2243 | /* | |
2244 | * Allocate an array of struct clk *'s to avoid unnecessary string | |
2245 | * look-ups of clk's possible parents. This can fail for clocks passed | |
2246 | * in to clk_init during early boot; thus any access to clk->parents[] | |
2247 | * must always check for a NULL pointer and try to populate it if | |
2248 | * necessary. | |
2249 | * | |
2250 | * If clk->parents is not NULL we skip this entire block. This allows | |
2251 | * for clock drivers to statically initialize clk->parents. | |
2252 | */ | |
9ca1c5a4 | 2253 | if (clk->num_parents > 1 && !clk->parents) { |
96a7ed90 TF |
2254 | clk->parents = kcalloc(clk->num_parents, sizeof(struct clk *), |
2255 | GFP_KERNEL); | |
b2476490 | 2256 | /* |
035a61c3 | 2257 | * clk_core_lookup returns NULL for parents that have not been |
b2476490 MT |
2258 | * clk_init'd; thus any access to clk->parents[] must check |
2259 | * for a NULL pointer. We can always perform lazy lookups for | |
2260 | * missing parents later on. | |
2261 | */ | |
2262 | if (clk->parents) | |
2263 | for (i = 0; i < clk->num_parents; i++) | |
2264 | clk->parents[i] = | |
035a61c3 | 2265 | clk_core_lookup(clk->parent_names[i]); |
b2476490 MT |
2266 | } |
2267 | ||
2268 | clk->parent = __clk_init_parent(clk); | |
2269 | ||
2270 | /* | |
2271 | * Populate clk->parent if parent has already been __clk_init'd. If | |
2272 | * parent has not yet been __clk_init'd then place clk in the orphan | |
2273 | * list. If clk has set the CLK_IS_ROOT flag then place it in the root | |
2274 | * clk list. | |
2275 | * | |
2276 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2277 | * clocks and re-parent any that are children of the clock currently | |
2278 | * being clk_init'd. | |
2279 | */ | |
2280 | if (clk->parent) | |
2281 | hlist_add_head(&clk->child_node, | |
2282 | &clk->parent->children); | |
2283 | else if (clk->flags & CLK_IS_ROOT) | |
2284 | hlist_add_head(&clk->child_node, &clk_root_list); | |
2285 | else | |
2286 | hlist_add_head(&clk->child_node, &clk_orphan_list); | |
2287 | ||
5279fc40 BB |
2288 | /* |
2289 | * Set clk's accuracy. The preferred method is to use | |
2290 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2291 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2292 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2293 | * clock). | |
2294 | */ | |
2295 | if (clk->ops->recalc_accuracy) | |
2296 | clk->accuracy = clk->ops->recalc_accuracy(clk->hw, | |
2297 | __clk_get_accuracy(clk->parent)); | |
2298 | else if (clk->parent) | |
2299 | clk->accuracy = clk->parent->accuracy; | |
2300 | else | |
2301 | clk->accuracy = 0; | |
2302 | ||
9824cf73 MR |
2303 | /* |
2304 | * Set clk's phase. | |
2305 | * Since a phase is by definition relative to its parent, just | |
2306 | * query the current clock phase, or just assume it's in phase. | |
2307 | */ | |
2308 | if (clk->ops->get_phase) | |
2309 | clk->phase = clk->ops->get_phase(clk->hw); | |
2310 | else | |
2311 | clk->phase = 0; | |
2312 | ||
b2476490 MT |
2313 | /* |
2314 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2315 | * simple clocks and lazy developers the default fallback is to use the | |
2316 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2317 | * then rate is set to zero. | |
2318 | */ | |
2319 | if (clk->ops->recalc_rate) | |
1c8e6004 | 2320 | rate = clk->ops->recalc_rate(clk->hw, |
035a61c3 | 2321 | clk_core_get_rate_nolock(clk->parent)); |
b2476490 | 2322 | else if (clk->parent) |
1c8e6004 | 2323 | rate = clk->parent->rate; |
b2476490 | 2324 | else |
1c8e6004 TV |
2325 | rate = 0; |
2326 | clk->rate = clk->req_rate = rate; | |
b2476490 MT |
2327 | |
2328 | /* | |
2329 | * walk the list of orphan clocks and reparent any that are children of | |
2330 | * this clock | |
2331 | */ | |
b67bfe0d | 2332 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
12d29886 | 2333 | if (orphan->num_parents && orphan->ops->get_parent) { |
1f61e5f1 MF |
2334 | i = orphan->ops->get_parent(orphan->hw); |
2335 | if (!strcmp(clk->name, orphan->parent_names[i])) | |
035a61c3 | 2336 | clk_core_reparent(orphan, clk); |
1f61e5f1 MF |
2337 | continue; |
2338 | } | |
2339 | ||
b2476490 MT |
2340 | for (i = 0; i < orphan->num_parents; i++) |
2341 | if (!strcmp(clk->name, orphan->parent_names[i])) { | |
035a61c3 | 2342 | clk_core_reparent(orphan, clk); |
b2476490 MT |
2343 | break; |
2344 | } | |
1f61e5f1 | 2345 | } |
b2476490 MT |
2346 | |
2347 | /* | |
2348 | * optional platform-specific magic | |
2349 | * | |
2350 | * The .init callback is not used by any of the basic clock types, but | |
2351 | * exists for weird hardware that must perform initialization magic. | |
2352 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2353 | * using this callback, as its use is discouraged. |
b2476490 MT |
2354 | */ |
2355 | if (clk->ops->init) | |
2356 | clk->ops->init(clk->hw); | |
2357 | ||
fcb0ee6a | 2358 | kref_init(&clk->ref); |
b2476490 | 2359 | out: |
eab89f69 | 2360 | clk_prepare_unlock(); |
b2476490 | 2361 | |
89f7e9de SB |
2362 | if (!ret) |
2363 | clk_debug_register(clk); | |
2364 | ||
d1302a36 | 2365 | return ret; |
b2476490 MT |
2366 | } |
2367 | ||
035a61c3 TV |
2368 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2369 | const char *con_id) | |
0197b3ea | 2370 | { |
0197b3ea SK |
2371 | struct clk *clk; |
2372 | ||
035a61c3 TV |
2373 | /* This is to allow this function to be chained to others */ |
2374 | if (!hw || IS_ERR(hw)) | |
2375 | return (struct clk *) hw; | |
0197b3ea | 2376 | |
035a61c3 TV |
2377 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2378 | if (!clk) | |
2379 | return ERR_PTR(-ENOMEM); | |
2380 | ||
2381 | clk->core = hw->core; | |
2382 | clk->dev_id = dev_id; | |
2383 | clk->con_id = con_id; | |
1c8e6004 TV |
2384 | clk->max_rate = ULONG_MAX; |
2385 | ||
2386 | clk_prepare_lock(); | |
2387 | hlist_add_head(&clk->child_node, &hw->core->clks); | |
2388 | clk_prepare_unlock(); | |
0197b3ea SK |
2389 | |
2390 | return clk; | |
2391 | } | |
035a61c3 | 2392 | |
73e0e496 | 2393 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2394 | { |
2395 | clk_prepare_lock(); | |
2396 | hlist_del(&clk->child_node); | |
2397 | clk_prepare_unlock(); | |
2398 | ||
2399 | kfree(clk); | |
2400 | } | |
0197b3ea | 2401 | |
293ba3b4 SB |
2402 | /** |
2403 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2404 | * @dev: device that is registering this clock | |
2405 | * @hw: link to hardware-specific clock data | |
2406 | * | |
2407 | * clk_register is the primary interface for populating the clock tree with new | |
2408 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
2409 | * cannot be dereferenced by driver code but may be used in conjuction with the | |
2410 | * rest of the clock API. In the event of an error clk_register will return an | |
2411 | * error code; drivers must test for an error code after calling clk_register. | |
2412 | */ | |
2413 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2414 | { |
d1302a36 | 2415 | int i, ret; |
035a61c3 | 2416 | struct clk_core *clk; |
293ba3b4 SB |
2417 | |
2418 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); | |
2419 | if (!clk) { | |
2420 | pr_err("%s: could not allocate clk\n", __func__); | |
2421 | ret = -ENOMEM; | |
2422 | goto fail_out; | |
2423 | } | |
b2476490 | 2424 | |
612936f2 | 2425 | clk->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
0197b3ea SK |
2426 | if (!clk->name) { |
2427 | pr_err("%s: could not allocate clk->name\n", __func__); | |
2428 | ret = -ENOMEM; | |
2429 | goto fail_name; | |
2430 | } | |
2431 | clk->ops = hw->init->ops; | |
ac2df527 SN |
2432 | if (dev && dev->driver) |
2433 | clk->owner = dev->driver->owner; | |
b2476490 | 2434 | clk->hw = hw; |
0197b3ea SK |
2435 | clk->flags = hw->init->flags; |
2436 | clk->num_parents = hw->init->num_parents; | |
035a61c3 | 2437 | hw->core = clk; |
b2476490 | 2438 | |
d1302a36 | 2439 | /* allocate local copy in case parent_names is __initdata */ |
96a7ed90 TF |
2440 | clk->parent_names = kcalloc(clk->num_parents, sizeof(char *), |
2441 | GFP_KERNEL); | |
d1302a36 MT |
2442 | |
2443 | if (!clk->parent_names) { | |
2444 | pr_err("%s: could not allocate clk->parent_names\n", __func__); | |
2445 | ret = -ENOMEM; | |
2446 | goto fail_parent_names; | |
2447 | } | |
2448 | ||
2449 | ||
2450 | /* copy each string name in case parent_names is __initdata */ | |
0197b3ea | 2451 | for (i = 0; i < clk->num_parents; i++) { |
612936f2 | 2452 | clk->parent_names[i] = kstrdup_const(hw->init->parent_names[i], |
0197b3ea | 2453 | GFP_KERNEL); |
d1302a36 MT |
2454 | if (!clk->parent_names[i]) { |
2455 | pr_err("%s: could not copy parent_names\n", __func__); | |
2456 | ret = -ENOMEM; | |
2457 | goto fail_parent_names_copy; | |
2458 | } | |
2459 | } | |
2460 | ||
1c8e6004 TV |
2461 | INIT_HLIST_HEAD(&clk->clks); |
2462 | ||
035a61c3 TV |
2463 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2464 | if (IS_ERR(hw->clk)) { | |
2465 | pr_err("%s: could not allocate per-user clk\n", __func__); | |
2466 | ret = PTR_ERR(hw->clk); | |
2467 | goto fail_parent_names_copy; | |
2468 | } | |
2469 | ||
2470 | ret = __clk_init(dev, hw->clk); | |
d1302a36 | 2471 | if (!ret) |
035a61c3 | 2472 | return hw->clk; |
b2476490 | 2473 | |
1c8e6004 | 2474 | __clk_free_clk(hw->clk); |
035a61c3 | 2475 | hw->clk = NULL; |
b2476490 | 2476 | |
d1302a36 MT |
2477 | fail_parent_names_copy: |
2478 | while (--i >= 0) | |
612936f2 | 2479 | kfree_const(clk->parent_names[i]); |
d1302a36 MT |
2480 | kfree(clk->parent_names); |
2481 | fail_parent_names: | |
612936f2 | 2482 | kfree_const(clk->name); |
0197b3ea | 2483 | fail_name: |
d1302a36 MT |
2484 | kfree(clk); |
2485 | fail_out: | |
2486 | return ERR_PTR(ret); | |
b2476490 MT |
2487 | } |
2488 | EXPORT_SYMBOL_GPL(clk_register); | |
2489 | ||
fcb0ee6a SN |
2490 | /* |
2491 | * Free memory allocated for a clock. | |
2492 | * Caller must hold prepare_lock. | |
2493 | */ | |
2494 | static void __clk_release(struct kref *ref) | |
2495 | { | |
035a61c3 | 2496 | struct clk_core *clk = container_of(ref, struct clk_core, ref); |
fcb0ee6a SN |
2497 | int i = clk->num_parents; |
2498 | ||
496eadf8 KK |
2499 | lockdep_assert_held(&prepare_lock); |
2500 | ||
fcb0ee6a SN |
2501 | kfree(clk->parents); |
2502 | while (--i >= 0) | |
612936f2 | 2503 | kfree_const(clk->parent_names[i]); |
fcb0ee6a SN |
2504 | |
2505 | kfree(clk->parent_names); | |
612936f2 | 2506 | kfree_const(clk->name); |
fcb0ee6a SN |
2507 | kfree(clk); |
2508 | } | |
2509 | ||
2510 | /* | |
2511 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2512 | * after clk_unregister() was called on a clock and until last clock | |
2513 | * consumer calls clk_put() and the struct clk object is freed. | |
2514 | */ | |
2515 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2516 | { | |
2517 | return -ENXIO; | |
2518 | } | |
2519 | ||
2520 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2521 | { | |
2522 | WARN_ON_ONCE(1); | |
2523 | } | |
2524 | ||
2525 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2526 | unsigned long parent_rate) | |
2527 | { | |
2528 | return -ENXIO; | |
2529 | } | |
2530 | ||
2531 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2532 | { | |
2533 | return -ENXIO; | |
2534 | } | |
2535 | ||
2536 | static const struct clk_ops clk_nodrv_ops = { | |
2537 | .enable = clk_nodrv_prepare_enable, | |
2538 | .disable = clk_nodrv_disable_unprepare, | |
2539 | .prepare = clk_nodrv_prepare_enable, | |
2540 | .unprepare = clk_nodrv_disable_unprepare, | |
2541 | .set_rate = clk_nodrv_set_rate, | |
2542 | .set_parent = clk_nodrv_set_parent, | |
2543 | }; | |
2544 | ||
1df5c939 MB |
2545 | /** |
2546 | * clk_unregister - unregister a currently registered clock | |
2547 | * @clk: clock to unregister | |
1df5c939 | 2548 | */ |
fcb0ee6a SN |
2549 | void clk_unregister(struct clk *clk) |
2550 | { | |
2551 | unsigned long flags; | |
2552 | ||
6314b679 SB |
2553 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2554 | return; | |
2555 | ||
035a61c3 | 2556 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2557 | |
2558 | clk_prepare_lock(); | |
2559 | ||
035a61c3 TV |
2560 | if (clk->core->ops == &clk_nodrv_ops) { |
2561 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2562 | clk->core->name); | |
6314b679 | 2563 | return; |
fcb0ee6a SN |
2564 | } |
2565 | /* | |
2566 | * Assign empty clock ops for consumers that might still hold | |
2567 | * a reference to this clock. | |
2568 | */ | |
2569 | flags = clk_enable_lock(); | |
035a61c3 | 2570 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2571 | clk_enable_unlock(flags); |
2572 | ||
035a61c3 TV |
2573 | if (!hlist_empty(&clk->core->children)) { |
2574 | struct clk_core *child; | |
874f224c | 2575 | struct hlist_node *t; |
fcb0ee6a SN |
2576 | |
2577 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2578 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2579 | child_node) | |
2580 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2581 | } |
2582 | ||
035a61c3 | 2583 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2584 | |
035a61c3 | 2585 | if (clk->core->prepare_count) |
fcb0ee6a | 2586 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2587 | __func__, clk->core->name); |
2588 | kref_put(&clk->core->ref, __clk_release); | |
6314b679 | 2589 | |
fcb0ee6a SN |
2590 | clk_prepare_unlock(); |
2591 | } | |
1df5c939 MB |
2592 | EXPORT_SYMBOL_GPL(clk_unregister); |
2593 | ||
46c8773a SB |
2594 | static void devm_clk_release(struct device *dev, void *res) |
2595 | { | |
293ba3b4 | 2596 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2597 | } |
2598 | ||
2599 | /** | |
2600 | * devm_clk_register - resource managed clk_register() | |
2601 | * @dev: device that is registering this clock | |
2602 | * @hw: link to hardware-specific clock data | |
2603 | * | |
2604 | * Managed clk_register(). Clocks returned from this function are | |
2605 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2606 | * more information. | |
2607 | */ | |
2608 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2609 | { | |
2610 | struct clk *clk; | |
293ba3b4 | 2611 | struct clk **clkp; |
46c8773a | 2612 | |
293ba3b4 SB |
2613 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2614 | if (!clkp) | |
46c8773a SB |
2615 | return ERR_PTR(-ENOMEM); |
2616 | ||
293ba3b4 SB |
2617 | clk = clk_register(dev, hw); |
2618 | if (!IS_ERR(clk)) { | |
2619 | *clkp = clk; | |
2620 | devres_add(dev, clkp); | |
46c8773a | 2621 | } else { |
293ba3b4 | 2622 | devres_free(clkp); |
46c8773a SB |
2623 | } |
2624 | ||
2625 | return clk; | |
2626 | } | |
2627 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2628 | ||
2629 | static int devm_clk_match(struct device *dev, void *res, void *data) | |
2630 | { | |
2631 | struct clk *c = res; | |
2632 | if (WARN_ON(!c)) | |
2633 | return 0; | |
2634 | return c == data; | |
2635 | } | |
2636 | ||
2637 | /** | |
2638 | * devm_clk_unregister - resource managed clk_unregister() | |
2639 | * @clk: clock to unregister | |
2640 | * | |
2641 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2642 | * this function will not need to be called and the resource management | |
2643 | * code will ensure that the resource is freed. | |
2644 | */ | |
2645 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2646 | { | |
2647 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2648 | } | |
2649 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2650 | ||
ac2df527 SN |
2651 | /* |
2652 | * clkdev helpers | |
2653 | */ | |
2654 | int __clk_get(struct clk *clk) | |
2655 | { | |
035a61c3 TV |
2656 | struct clk_core *core = !clk ? NULL : clk->core; |
2657 | ||
2658 | if (core) { | |
2659 | if (!try_module_get(core->owner)) | |
00efcb1c | 2660 | return 0; |
ac2df527 | 2661 | |
035a61c3 | 2662 | kref_get(&core->ref); |
00efcb1c | 2663 | } |
ac2df527 SN |
2664 | return 1; |
2665 | } | |
2666 | ||
2667 | void __clk_put(struct clk *clk) | |
2668 | { | |
10cdfe54 TV |
2669 | struct module *owner; |
2670 | ||
00efcb1c | 2671 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2672 | return; |
2673 | ||
fcb0ee6a | 2674 | clk_prepare_lock(); |
1c8e6004 TV |
2675 | |
2676 | hlist_del(&clk->child_node); | |
ec02ace8 TV |
2677 | if (clk->min_rate > clk->core->req_rate || |
2678 | clk->max_rate < clk->core->req_rate) | |
2679 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2680 | ||
1c8e6004 TV |
2681 | owner = clk->core->owner; |
2682 | kref_put(&clk->core->ref, __clk_release); | |
2683 | ||
fcb0ee6a SN |
2684 | clk_prepare_unlock(); |
2685 | ||
10cdfe54 | 2686 | module_put(owner); |
035a61c3 | 2687 | |
035a61c3 | 2688 | kfree(clk); |
ac2df527 SN |
2689 | } |
2690 | ||
b2476490 MT |
2691 | /*** clk rate change notifiers ***/ |
2692 | ||
2693 | /** | |
2694 | * clk_notifier_register - add a clk rate change notifier | |
2695 | * @clk: struct clk * to watch | |
2696 | * @nb: struct notifier_block * with callback info | |
2697 | * | |
2698 | * Request notification when clk's rate changes. This uses an SRCU | |
2699 | * notifier because we want it to block and notifier unregistrations are | |
2700 | * uncommon. The callbacks associated with the notifier must not | |
2701 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2702 | * this will cause a nested prepare_lock mutex. | |
2703 | * | |
5324fda7 SB |
2704 | * In all notification cases cases (pre, post and abort rate change) the |
2705 | * original clock rate is passed to the callback via struct | |
2706 | * clk_notifier_data.old_rate and the new frequency is passed via struct | |
b2476490 MT |
2707 | * clk_notifier_data.new_rate. |
2708 | * | |
b2476490 MT |
2709 | * clk_notifier_register() must be called from non-atomic context. |
2710 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2711 | * allocation failure; otherwise, passes along the return value of | |
2712 | * srcu_notifier_chain_register(). | |
2713 | */ | |
2714 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2715 | { | |
2716 | struct clk_notifier *cn; | |
2717 | int ret = -ENOMEM; | |
2718 | ||
2719 | if (!clk || !nb) | |
2720 | return -EINVAL; | |
2721 | ||
eab89f69 | 2722 | clk_prepare_lock(); |
b2476490 MT |
2723 | |
2724 | /* search the list of notifiers for this clk */ | |
2725 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2726 | if (cn->clk == clk) | |
2727 | break; | |
2728 | ||
2729 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2730 | if (cn->clk != clk) { | |
2731 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2732 | if (!cn) | |
2733 | goto out; | |
2734 | ||
2735 | cn->clk = clk; | |
2736 | srcu_init_notifier_head(&cn->notifier_head); | |
2737 | ||
2738 | list_add(&cn->node, &clk_notifier_list); | |
2739 | } | |
2740 | ||
2741 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2742 | ||
035a61c3 | 2743 | clk->core->notifier_count++; |
b2476490 MT |
2744 | |
2745 | out: | |
eab89f69 | 2746 | clk_prepare_unlock(); |
b2476490 MT |
2747 | |
2748 | return ret; | |
2749 | } | |
2750 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2751 | ||
2752 | /** | |
2753 | * clk_notifier_unregister - remove a clk rate change notifier | |
2754 | * @clk: struct clk * | |
2755 | * @nb: struct notifier_block * with callback info | |
2756 | * | |
2757 | * Request no further notification for changes to 'clk' and frees memory | |
2758 | * allocated in clk_notifier_register. | |
2759 | * | |
2760 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2761 | * along the return value of srcu_notifier_chain_unregister(). | |
2762 | */ | |
2763 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2764 | { | |
2765 | struct clk_notifier *cn = NULL; | |
2766 | int ret = -EINVAL; | |
2767 | ||
2768 | if (!clk || !nb) | |
2769 | return -EINVAL; | |
2770 | ||
eab89f69 | 2771 | clk_prepare_lock(); |
b2476490 MT |
2772 | |
2773 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2774 | if (cn->clk == clk) | |
2775 | break; | |
2776 | ||
2777 | if (cn->clk == clk) { | |
2778 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2779 | ||
035a61c3 | 2780 | clk->core->notifier_count--; |
b2476490 MT |
2781 | |
2782 | /* XXX the notifier code should handle this better */ | |
2783 | if (!cn->notifier_head.head) { | |
2784 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2785 | list_del(&cn->node); |
b2476490 MT |
2786 | kfree(cn); |
2787 | } | |
2788 | ||
2789 | } else { | |
2790 | ret = -ENOENT; | |
2791 | } | |
2792 | ||
eab89f69 | 2793 | clk_prepare_unlock(); |
b2476490 MT |
2794 | |
2795 | return ret; | |
2796 | } | |
2797 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2798 | |
2799 | #ifdef CONFIG_OF | |
2800 | /** | |
2801 | * struct of_clk_provider - Clock provider registration structure | |
2802 | * @link: Entry in global list of clock providers | |
2803 | * @node: Pointer to device tree node of clock provider | |
2804 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2805 | * given clock specifier | |
2806 | * @data: context pointer to be passed into @get callback | |
2807 | */ | |
2808 | struct of_clk_provider { | |
2809 | struct list_head link; | |
2810 | ||
2811 | struct device_node *node; | |
2812 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
2813 | void *data; | |
2814 | }; | |
2815 | ||
f2f6c255 PG |
2816 | static const struct of_device_id __clk_of_table_sentinel |
2817 | __used __section(__clk_of_table_end); | |
2818 | ||
766e6a4e | 2819 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2820 | static DEFINE_MUTEX(of_clk_mutex); |
2821 | ||
2822 | /* of_clk_provider list locking helpers */ | |
2823 | void of_clk_lock(void) | |
2824 | { | |
2825 | mutex_lock(&of_clk_mutex); | |
2826 | } | |
2827 | ||
2828 | void of_clk_unlock(void) | |
2829 | { | |
2830 | mutex_unlock(&of_clk_mutex); | |
2831 | } | |
766e6a4e GL |
2832 | |
2833 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, | |
2834 | void *data) | |
2835 | { | |
2836 | return data; | |
2837 | } | |
2838 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2839 | ||
494bfec9 SG |
2840 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2841 | { | |
2842 | struct clk_onecell_data *clk_data = data; | |
2843 | unsigned int idx = clkspec->args[0]; | |
2844 | ||
2845 | if (idx >= clk_data->clk_num) { | |
2846 | pr_err("%s: invalid clock index %d\n", __func__, idx); | |
2847 | return ERR_PTR(-EINVAL); | |
2848 | } | |
2849 | ||
2850 | return clk_data->clks[idx]; | |
2851 | } | |
2852 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2853 | ||
766e6a4e GL |
2854 | /** |
2855 | * of_clk_add_provider() - Register a clock provider for a node | |
2856 | * @np: Device node pointer associated with clock provider | |
2857 | * @clk_src_get: callback for decoding clock | |
2858 | * @data: context pointer for @clk_src_get callback. | |
2859 | */ | |
2860 | int of_clk_add_provider(struct device_node *np, | |
2861 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
2862 | void *data), | |
2863 | void *data) | |
2864 | { | |
2865 | struct of_clk_provider *cp; | |
86be408b | 2866 | int ret; |
766e6a4e GL |
2867 | |
2868 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
2869 | if (!cp) | |
2870 | return -ENOMEM; | |
2871 | ||
2872 | cp->node = of_node_get(np); | |
2873 | cp->data = data; | |
2874 | cp->get = clk_src_get; | |
2875 | ||
d6782c26 | 2876 | mutex_lock(&of_clk_mutex); |
766e6a4e | 2877 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 2878 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2879 | pr_debug("Added clock from %s\n", np->full_name); |
2880 | ||
86be408b SN |
2881 | ret = of_clk_set_defaults(np, true); |
2882 | if (ret < 0) | |
2883 | of_clk_del_provider(np); | |
2884 | ||
2885 | return ret; | |
766e6a4e GL |
2886 | } |
2887 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
2888 | ||
2889 | /** | |
2890 | * of_clk_del_provider() - Remove a previously registered clock provider | |
2891 | * @np: Device node pointer associated with clock provider | |
2892 | */ | |
2893 | void of_clk_del_provider(struct device_node *np) | |
2894 | { | |
2895 | struct of_clk_provider *cp; | |
2896 | ||
d6782c26 | 2897 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2898 | list_for_each_entry(cp, &of_clk_providers, link) { |
2899 | if (cp->node == np) { | |
2900 | list_del(&cp->link); | |
2901 | of_node_put(cp->node); | |
2902 | kfree(cp); | |
2903 | break; | |
2904 | } | |
2905 | } | |
d6782c26 | 2906 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2907 | } |
2908 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
2909 | ||
73e0e496 SB |
2910 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
2911 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
2912 | { |
2913 | struct of_clk_provider *provider; | |
a34cd466 | 2914 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
766e6a4e GL |
2915 | |
2916 | /* Check if we have such a provider in our array */ | |
766e6a4e GL |
2917 | list_for_each_entry(provider, &of_clk_providers, link) { |
2918 | if (provider->node == clkspec->np) | |
2919 | clk = provider->get(clkspec, provider->data); | |
73e0e496 SB |
2920 | if (!IS_ERR(clk)) { |
2921 | clk = __clk_create_clk(__clk_get_hw(clk), dev_id, | |
2922 | con_id); | |
2923 | ||
2924 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
2925 | __clk_free_clk(clk); | |
2926 | clk = ERR_PTR(-ENOENT); | |
2927 | } | |
2928 | ||
766e6a4e | 2929 | break; |
73e0e496 | 2930 | } |
766e6a4e | 2931 | } |
d6782c26 SN |
2932 | |
2933 | return clk; | |
2934 | } | |
2935 | ||
2936 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) | |
2937 | { | |
2938 | struct clk *clk; | |
2939 | ||
2940 | mutex_lock(&of_clk_mutex); | |
73e0e496 | 2941 | clk = __of_clk_get_from_provider(clkspec, NULL, __func__); |
d6782c26 | 2942 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2943 | |
2944 | return clk; | |
2945 | } | |
2946 | ||
f6102742 MT |
2947 | int of_clk_get_parent_count(struct device_node *np) |
2948 | { | |
2949 | return of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
2950 | } | |
2951 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
2952 | ||
766e6a4e GL |
2953 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
2954 | { | |
2955 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 2956 | struct property *prop; |
766e6a4e | 2957 | const char *clk_name; |
7a0fc1a3 BD |
2958 | const __be32 *vp; |
2959 | u32 pv; | |
766e6a4e | 2960 | int rc; |
7a0fc1a3 | 2961 | int count; |
766e6a4e GL |
2962 | |
2963 | if (index < 0) | |
2964 | return NULL; | |
2965 | ||
2966 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, | |
2967 | &clkspec); | |
2968 | if (rc) | |
2969 | return NULL; | |
2970 | ||
7a0fc1a3 BD |
2971 | index = clkspec.args_count ? clkspec.args[0] : 0; |
2972 | count = 0; | |
2973 | ||
2974 | /* if there is an indices property, use it to transfer the index | |
2975 | * specified into an array offset for the clock-output-names property. | |
2976 | */ | |
2977 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
2978 | if (index == pv) { | |
2979 | index = count; | |
2980 | break; | |
2981 | } | |
2982 | count++; | |
2983 | } | |
2984 | ||
766e6a4e | 2985 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 2986 | index, |
766e6a4e GL |
2987 | &clk_name) < 0) |
2988 | clk_name = clkspec.np->name; | |
2989 | ||
2990 | of_node_put(clkspec.np); | |
2991 | return clk_name; | |
2992 | } | |
2993 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
2994 | ||
1771b10d GC |
2995 | struct clock_provider { |
2996 | of_clk_init_cb_t clk_init_cb; | |
2997 | struct device_node *np; | |
2998 | struct list_head node; | |
2999 | }; | |
3000 | ||
3001 | static LIST_HEAD(clk_provider_list); | |
3002 | ||
3003 | /* | |
3004 | * This function looks for a parent clock. If there is one, then it | |
3005 | * checks that the provider for this parent clock was initialized, in | |
3006 | * this case the parent clock will be ready. | |
3007 | */ | |
3008 | static int parent_ready(struct device_node *np) | |
3009 | { | |
3010 | int i = 0; | |
3011 | ||
3012 | while (true) { | |
3013 | struct clk *clk = of_clk_get(np, i); | |
3014 | ||
3015 | /* this parent is ready we can check the next one */ | |
3016 | if (!IS_ERR(clk)) { | |
3017 | clk_put(clk); | |
3018 | i++; | |
3019 | continue; | |
3020 | } | |
3021 | ||
3022 | /* at least one parent is not ready, we exit now */ | |
3023 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3024 | return 0; | |
3025 | ||
3026 | /* | |
3027 | * Here we make assumption that the device tree is | |
3028 | * written correctly. So an error means that there is | |
3029 | * no more parent. As we didn't exit yet, then the | |
3030 | * previous parent are ready. If there is no clock | |
3031 | * parent, no need to wait for them, then we can | |
3032 | * consider their absence as being ready | |
3033 | */ | |
3034 | return 1; | |
3035 | } | |
3036 | } | |
3037 | ||
766e6a4e GL |
3038 | /** |
3039 | * of_clk_init() - Scan and init clock providers from the DT | |
3040 | * @matches: array of compatible values and init functions for providers. | |
3041 | * | |
1771b10d | 3042 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3043 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3044 | * to follow the dependencies. |
766e6a4e GL |
3045 | */ |
3046 | void __init of_clk_init(const struct of_device_id *matches) | |
3047 | { | |
7f7ed584 | 3048 | const struct of_device_id *match; |
766e6a4e | 3049 | struct device_node *np; |
1771b10d GC |
3050 | struct clock_provider *clk_provider, *next; |
3051 | bool is_init_done; | |
3052 | bool force = false; | |
766e6a4e | 3053 | |
f2f6c255 | 3054 | if (!matches) |
819b4861 | 3055 | matches = &__clk_of_table; |
f2f6c255 | 3056 | |
1771b10d | 3057 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3058 | for_each_matching_node_and_match(np, matches, &match) { |
1771b10d GC |
3059 | struct clock_provider *parent = |
3060 | kzalloc(sizeof(struct clock_provider), GFP_KERNEL); | |
3061 | ||
3062 | parent->clk_init_cb = match->data; | |
3063 | parent->np = np; | |
3f6d439f | 3064 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3065 | } |
3066 | ||
3067 | while (!list_empty(&clk_provider_list)) { | |
3068 | is_init_done = false; | |
3069 | list_for_each_entry_safe(clk_provider, next, | |
3070 | &clk_provider_list, node) { | |
3071 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3072 | |
1771b10d | 3073 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3074 | of_clk_set_defaults(clk_provider->np, true); |
3075 | ||
1771b10d GC |
3076 | list_del(&clk_provider->node); |
3077 | kfree(clk_provider); | |
3078 | is_init_done = true; | |
3079 | } | |
3080 | } | |
3081 | ||
3082 | /* | |
e5ca8fb4 | 3083 | * We didn't manage to initialize any of the |
1771b10d GC |
3084 | * remaining providers during the last loop, so now we |
3085 | * initialize all the remaining ones unconditionally | |
3086 | * in case the clock parent was not mandatory | |
3087 | */ | |
3088 | if (!is_init_done) | |
3089 | force = true; | |
766e6a4e GL |
3090 | } |
3091 | } | |
3092 | #endif |