clk: move core->parents allocation to clk_register()
[deliverable/linux.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
3c373117 12#include <linux/clk.h>
b09d6d99 13#include <linux/clk-provider.h>
86be408b 14#include <linux/clk/clk-conf.h>
b2476490
MT
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spinlock.h>
18#include <linux/err.h>
19#include <linux/list.h>
20#include <linux/slab.h>
766e6a4e 21#include <linux/of.h>
46c8773a 22#include <linux/device.h>
f2f6c255 23#include <linux/init.h>
533ddeb1 24#include <linux/sched.h>
562ef0b0 25#include <linux/clkdev.h>
b2476490 26
d6782c26
SN
27#include "clk.h"
28
b2476490
MT
29static DEFINE_SPINLOCK(enable_lock);
30static DEFINE_MUTEX(prepare_lock);
31
533ddeb1
MT
32static struct task_struct *prepare_owner;
33static struct task_struct *enable_owner;
34
35static int prepare_refcnt;
36static int enable_refcnt;
37
b2476490
MT
38static HLIST_HEAD(clk_root_list);
39static HLIST_HEAD(clk_orphan_list);
40static LIST_HEAD(clk_notifier_list);
41
b09d6d99
MT
42/*** private data structures ***/
43
44struct clk_core {
45 const char *name;
46 const struct clk_ops *ops;
47 struct clk_hw *hw;
48 struct module *owner;
49 struct clk_core *parent;
50 const char **parent_names;
51 struct clk_core **parents;
52 u8 num_parents;
53 u8 new_parent_index;
54 unsigned long rate;
1c8e6004 55 unsigned long req_rate;
b09d6d99
MT
56 unsigned long new_rate;
57 struct clk_core *new_parent;
58 struct clk_core *new_child;
59 unsigned long flags;
e6500344 60 bool orphan;
b09d6d99
MT
61 unsigned int enable_count;
62 unsigned int prepare_count;
9783c0d9
SB
63 unsigned long min_rate;
64 unsigned long max_rate;
b09d6d99
MT
65 unsigned long accuracy;
66 int phase;
67 struct hlist_head children;
68 struct hlist_node child_node;
1c8e6004 69 struct hlist_head clks;
b09d6d99
MT
70 unsigned int notifier_count;
71#ifdef CONFIG_DEBUG_FS
72 struct dentry *dentry;
8c9a8a8f 73 struct hlist_node debug_node;
b09d6d99
MT
74#endif
75 struct kref ref;
76};
77
dfc202ea
SB
78#define CREATE_TRACE_POINTS
79#include <trace/events/clk.h>
80
b09d6d99
MT
81struct clk {
82 struct clk_core *core;
83 const char *dev_id;
84 const char *con_id;
1c8e6004
TV
85 unsigned long min_rate;
86 unsigned long max_rate;
50595f8b 87 struct hlist_node clks_node;
b09d6d99
MT
88};
89
eab89f69
MT
90/*** locking ***/
91static void clk_prepare_lock(void)
92{
533ddeb1
MT
93 if (!mutex_trylock(&prepare_lock)) {
94 if (prepare_owner == current) {
95 prepare_refcnt++;
96 return;
97 }
98 mutex_lock(&prepare_lock);
99 }
100 WARN_ON_ONCE(prepare_owner != NULL);
101 WARN_ON_ONCE(prepare_refcnt != 0);
102 prepare_owner = current;
103 prepare_refcnt = 1;
eab89f69
MT
104}
105
106static void clk_prepare_unlock(void)
107{
533ddeb1
MT
108 WARN_ON_ONCE(prepare_owner != current);
109 WARN_ON_ONCE(prepare_refcnt == 0);
110
111 if (--prepare_refcnt)
112 return;
113 prepare_owner = NULL;
eab89f69
MT
114 mutex_unlock(&prepare_lock);
115}
116
117static unsigned long clk_enable_lock(void)
a57aa185 118 __acquires(enable_lock)
eab89f69
MT
119{
120 unsigned long flags;
533ddeb1
MT
121
122 if (!spin_trylock_irqsave(&enable_lock, flags)) {
123 if (enable_owner == current) {
124 enable_refcnt++;
a57aa185 125 __acquire(enable_lock);
533ddeb1
MT
126 return flags;
127 }
128 spin_lock_irqsave(&enable_lock, flags);
129 }
130 WARN_ON_ONCE(enable_owner != NULL);
131 WARN_ON_ONCE(enable_refcnt != 0);
132 enable_owner = current;
133 enable_refcnt = 1;
eab89f69
MT
134 return flags;
135}
136
137static void clk_enable_unlock(unsigned long flags)
a57aa185 138 __releases(enable_lock)
eab89f69 139{
533ddeb1
MT
140 WARN_ON_ONCE(enable_owner != current);
141 WARN_ON_ONCE(enable_refcnt == 0);
142
a57aa185
SB
143 if (--enable_refcnt) {
144 __release(enable_lock);
533ddeb1 145 return;
a57aa185 146 }
533ddeb1 147 enable_owner = NULL;
eab89f69
MT
148 spin_unlock_irqrestore(&enable_lock, flags);
149}
150
4dff95dc
SB
151static bool clk_core_is_prepared(struct clk_core *core)
152{
153 /*
154 * .is_prepared is optional for clocks that can prepare
155 * fall back to software usage counter if it is missing
156 */
157 if (!core->ops->is_prepared)
158 return core->prepare_count;
b2476490 159
4dff95dc
SB
160 return core->ops->is_prepared(core->hw);
161}
b2476490 162
4dff95dc
SB
163static bool clk_core_is_enabled(struct clk_core *core)
164{
165 /*
166 * .is_enabled is only mandatory for clocks that gate
167 * fall back to software usage counter if .is_enabled is missing
168 */
169 if (!core->ops->is_enabled)
170 return core->enable_count;
6b44c854 171
4dff95dc
SB
172 return core->ops->is_enabled(core->hw);
173}
6b44c854 174
4dff95dc 175static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 176{
4dff95dc
SB
177 struct clk_core *child;
178
179 lockdep_assert_held(&prepare_lock);
180
181 hlist_for_each_entry(child, &core->children, child_node)
182 clk_unprepare_unused_subtree(child);
183
184 if (core->prepare_count)
1af599df
PG
185 return;
186
4dff95dc
SB
187 if (core->flags & CLK_IGNORE_UNUSED)
188 return;
189
190 if (clk_core_is_prepared(core)) {
191 trace_clk_unprepare(core);
192 if (core->ops->unprepare_unused)
193 core->ops->unprepare_unused(core->hw);
194 else if (core->ops->unprepare)
195 core->ops->unprepare(core->hw);
196 trace_clk_unprepare_complete(core);
197 }
1af599df
PG
198}
199
4dff95dc 200static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 201{
035a61c3 202 struct clk_core *child;
4dff95dc 203 unsigned long flags;
1af599df 204
4dff95dc 205 lockdep_assert_held(&prepare_lock);
1af599df 206
4dff95dc
SB
207 hlist_for_each_entry(child, &core->children, child_node)
208 clk_disable_unused_subtree(child);
1af599df 209
4dff95dc
SB
210 flags = clk_enable_lock();
211
212 if (core->enable_count)
213 goto unlock_out;
214
215 if (core->flags & CLK_IGNORE_UNUSED)
216 goto unlock_out;
217
218 /*
219 * some gate clocks have special needs during the disable-unused
220 * sequence. call .disable_unused if available, otherwise fall
221 * back to .disable
222 */
223 if (clk_core_is_enabled(core)) {
224 trace_clk_disable(core);
225 if (core->ops->disable_unused)
226 core->ops->disable_unused(core->hw);
227 else if (core->ops->disable)
228 core->ops->disable(core->hw);
229 trace_clk_disable_complete(core);
230 }
231
232unlock_out:
233 clk_enable_unlock(flags);
1af599df
PG
234}
235
4dff95dc
SB
236static bool clk_ignore_unused;
237static int __init clk_ignore_unused_setup(char *__unused)
1af599df 238{
4dff95dc
SB
239 clk_ignore_unused = true;
240 return 1;
241}
242__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 243
4dff95dc
SB
244static int clk_disable_unused(void)
245{
246 struct clk_core *core;
247
248 if (clk_ignore_unused) {
249 pr_warn("clk: Not disabling unused clocks\n");
250 return 0;
251 }
1af599df 252
eab89f69 253 clk_prepare_lock();
1af599df 254
4dff95dc
SB
255 hlist_for_each_entry(core, &clk_root_list, child_node)
256 clk_disable_unused_subtree(core);
257
258 hlist_for_each_entry(core, &clk_orphan_list, child_node)
259 clk_disable_unused_subtree(core);
260
261 hlist_for_each_entry(core, &clk_root_list, child_node)
262 clk_unprepare_unused_subtree(core);
263
264 hlist_for_each_entry(core, &clk_orphan_list, child_node)
265 clk_unprepare_unused_subtree(core);
1af599df 266
eab89f69 267 clk_prepare_unlock();
1af599df
PG
268
269 return 0;
270}
4dff95dc 271late_initcall_sync(clk_disable_unused);
1af599df 272
4dff95dc 273/*** helper functions ***/
1af599df 274
b76281cb 275const char *__clk_get_name(const struct clk *clk)
1af599df 276{
4dff95dc 277 return !clk ? NULL : clk->core->name;
1af599df 278}
4dff95dc 279EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 280
e7df6f6e 281const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
282{
283 return hw->core->name;
284}
285EXPORT_SYMBOL_GPL(clk_hw_get_name);
286
4dff95dc
SB
287struct clk_hw *__clk_get_hw(struct clk *clk)
288{
289 return !clk ? NULL : clk->core->hw;
290}
291EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 292
e7df6f6e 293unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
294{
295 return hw->core->num_parents;
296}
297EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
298
e7df6f6e 299struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
300{
301 return hw->core->parent ? hw->core->parent->hw : NULL;
302}
303EXPORT_SYMBOL_GPL(clk_hw_get_parent);
304
4dff95dc
SB
305static struct clk_core *__clk_lookup_subtree(const char *name,
306 struct clk_core *core)
bddca894 307{
035a61c3 308 struct clk_core *child;
4dff95dc 309 struct clk_core *ret;
bddca894 310
4dff95dc
SB
311 if (!strcmp(core->name, name))
312 return core;
bddca894 313
4dff95dc
SB
314 hlist_for_each_entry(child, &core->children, child_node) {
315 ret = __clk_lookup_subtree(name, child);
316 if (ret)
317 return ret;
bddca894
PG
318 }
319
4dff95dc 320 return NULL;
bddca894
PG
321}
322
4dff95dc 323static struct clk_core *clk_core_lookup(const char *name)
bddca894 324{
4dff95dc
SB
325 struct clk_core *root_clk;
326 struct clk_core *ret;
bddca894 327
4dff95dc
SB
328 if (!name)
329 return NULL;
bddca894 330
4dff95dc
SB
331 /* search the 'proper' clk tree first */
332 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
333 ret = __clk_lookup_subtree(name, root_clk);
334 if (ret)
335 return ret;
bddca894
PG
336 }
337
4dff95dc
SB
338 /* if not found, then search the orphan tree */
339 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
340 ret = __clk_lookup_subtree(name, root_clk);
341 if (ret)
342 return ret;
343 }
bddca894 344
4dff95dc 345 return NULL;
bddca894
PG
346}
347
4dff95dc
SB
348static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
349 u8 index)
bddca894 350{
4dff95dc
SB
351 if (!core || index >= core->num_parents)
352 return NULL;
353 else if (!core->parents)
354 return clk_core_lookup(core->parent_names[index]);
355 else if (!core->parents[index])
356 return core->parents[index] =
357 clk_core_lookup(core->parent_names[index]);
358 else
359 return core->parents[index];
bddca894
PG
360}
361
e7df6f6e
SB
362struct clk_hw *
363clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
364{
365 struct clk_core *parent;
366
367 parent = clk_core_get_parent_by_index(hw->core, index);
368
369 return !parent ? NULL : parent->hw;
370}
371EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
372
4dff95dc
SB
373unsigned int __clk_get_enable_count(struct clk *clk)
374{
375 return !clk ? 0 : clk->core->enable_count;
376}
b2476490 377
4dff95dc
SB
378static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
379{
380 unsigned long ret;
b2476490 381
4dff95dc
SB
382 if (!core) {
383 ret = 0;
384 goto out;
385 }
b2476490 386
4dff95dc 387 ret = core->rate;
b2476490 388
4dff95dc
SB
389 if (core->flags & CLK_IS_ROOT)
390 goto out;
c646cbf1 391
4dff95dc
SB
392 if (!core->parent)
393 ret = 0;
b2476490 394
b2476490
MT
395out:
396 return ret;
397}
398
e7df6f6e 399unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
400{
401 return clk_core_get_rate_nolock(hw->core);
402}
403EXPORT_SYMBOL_GPL(clk_hw_get_rate);
404
4dff95dc
SB
405static unsigned long __clk_get_accuracy(struct clk_core *core)
406{
407 if (!core)
408 return 0;
b2476490 409
4dff95dc 410 return core->accuracy;
b2476490
MT
411}
412
4dff95dc 413unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 414{
4dff95dc 415 return !clk ? 0 : clk->core->flags;
fcb0ee6a 416}
4dff95dc 417EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 418
e7df6f6e 419unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
420{
421 return hw->core->flags;
422}
423EXPORT_SYMBOL_GPL(clk_hw_get_flags);
424
e7df6f6e 425bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
426{
427 return clk_core_is_prepared(hw->core);
428}
429
be68bf88
JE
430bool clk_hw_is_enabled(const struct clk_hw *hw)
431{
432 return clk_core_is_enabled(hw->core);
433}
434
4dff95dc 435bool __clk_is_enabled(struct clk *clk)
b2476490 436{
4dff95dc
SB
437 if (!clk)
438 return false;
b2476490 439
4dff95dc
SB
440 return clk_core_is_enabled(clk->core);
441}
442EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 443
4dff95dc
SB
444static bool mux_is_better_rate(unsigned long rate, unsigned long now,
445 unsigned long best, unsigned long flags)
446{
447 if (flags & CLK_MUX_ROUND_CLOSEST)
448 return abs(now - rate) < abs(best - rate);
1af599df 449
4dff95dc
SB
450 return now <= rate && now > best;
451}
bddca894 452
0817b62c
BB
453static int
454clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req,
4dff95dc
SB
455 unsigned long flags)
456{
457 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
458 int i, num_parents, ret;
459 unsigned long best = 0;
460 struct clk_rate_request parent_req = *req;
b2476490 461
4dff95dc
SB
462 /* if NO_REPARENT flag set, pass through to current parent */
463 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
464 parent = core->parent;
0817b62c
BB
465 if (core->flags & CLK_SET_RATE_PARENT) {
466 ret = __clk_determine_rate(parent ? parent->hw : NULL,
467 &parent_req);
468 if (ret)
469 return ret;
470
471 best = parent_req.rate;
472 } else if (parent) {
4dff95dc 473 best = clk_core_get_rate_nolock(parent);
0817b62c 474 } else {
4dff95dc 475 best = clk_core_get_rate_nolock(core);
0817b62c
BB
476 }
477
4dff95dc
SB
478 goto out;
479 }
b2476490 480
4dff95dc
SB
481 /* find the parent that can provide the fastest rate <= rate */
482 num_parents = core->num_parents;
483 for (i = 0; i < num_parents; i++) {
484 parent = clk_core_get_parent_by_index(core, i);
485 if (!parent)
486 continue;
0817b62c
BB
487
488 if (core->flags & CLK_SET_RATE_PARENT) {
489 parent_req = *req;
490 ret = __clk_determine_rate(parent->hw, &parent_req);
491 if (ret)
492 continue;
493 } else {
494 parent_req.rate = clk_core_get_rate_nolock(parent);
495 }
496
497 if (mux_is_better_rate(req->rate, parent_req.rate,
498 best, flags)) {
4dff95dc 499 best_parent = parent;
0817b62c 500 best = parent_req.rate;
4dff95dc
SB
501 }
502 }
b2476490 503
57d866e6
BB
504 if (!best_parent)
505 return -EINVAL;
506
4dff95dc
SB
507out:
508 if (best_parent)
0817b62c
BB
509 req->best_parent_hw = best_parent->hw;
510 req->best_parent_rate = best;
511 req->rate = best;
b2476490 512
0817b62c 513 return 0;
b33d212f 514}
4dff95dc
SB
515
516struct clk *__clk_lookup(const char *name)
fcb0ee6a 517{
4dff95dc
SB
518 struct clk_core *core = clk_core_lookup(name);
519
520 return !core ? NULL : core->hw->clk;
fcb0ee6a 521}
b2476490 522
4dff95dc
SB
523static void clk_core_get_boundaries(struct clk_core *core,
524 unsigned long *min_rate,
525 unsigned long *max_rate)
1c155b3d 526{
4dff95dc 527 struct clk *clk_user;
1c155b3d 528
9783c0d9
SB
529 *min_rate = core->min_rate;
530 *max_rate = core->max_rate;
496eadf8 531
4dff95dc
SB
532 hlist_for_each_entry(clk_user, &core->clks, clks_node)
533 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 534
4dff95dc
SB
535 hlist_for_each_entry(clk_user, &core->clks, clks_node)
536 *max_rate = min(*max_rate, clk_user->max_rate);
537}
1c155b3d 538
9783c0d9
SB
539void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
540 unsigned long max_rate)
541{
542 hw->core->min_rate = min_rate;
543 hw->core->max_rate = max_rate;
544}
545EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
546
4dff95dc
SB
547/*
548 * Helper for finding best parent to provide a given frequency. This can be used
549 * directly as a determine_rate callback (e.g. for a mux), or from a more
550 * complex clock that may combine a mux with other operations.
551 */
0817b62c
BB
552int __clk_mux_determine_rate(struct clk_hw *hw,
553 struct clk_rate_request *req)
4dff95dc 554{
0817b62c 555 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 556}
4dff95dc 557EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 558
0817b62c
BB
559int __clk_mux_determine_rate_closest(struct clk_hw *hw,
560 struct clk_rate_request *req)
b2476490 561{
0817b62c 562 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
563}
564EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 565
4dff95dc 566/*** clk api ***/
496eadf8 567
4dff95dc
SB
568static void clk_core_unprepare(struct clk_core *core)
569{
a6334725
SB
570 lockdep_assert_held(&prepare_lock);
571
4dff95dc
SB
572 if (!core)
573 return;
b2476490 574
4dff95dc
SB
575 if (WARN_ON(core->prepare_count == 0))
576 return;
b2476490 577
4dff95dc
SB
578 if (--core->prepare_count > 0)
579 return;
b2476490 580
4dff95dc 581 WARN_ON(core->enable_count > 0);
b2476490 582
4dff95dc 583 trace_clk_unprepare(core);
b2476490 584
4dff95dc
SB
585 if (core->ops->unprepare)
586 core->ops->unprepare(core->hw);
587
588 trace_clk_unprepare_complete(core);
589 clk_core_unprepare(core->parent);
b2476490
MT
590}
591
4dff95dc
SB
592/**
593 * clk_unprepare - undo preparation of a clock source
594 * @clk: the clk being unprepared
595 *
596 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
597 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
598 * if the operation may sleep. One example is a clk which is accessed over
599 * I2c. In the complex case a clk gate operation may require a fast and a slow
600 * part. It is this reason that clk_unprepare and clk_disable are not mutually
601 * exclusive. In fact clk_disable must be called before clk_unprepare.
602 */
603void clk_unprepare(struct clk *clk)
1e435256 604{
4dff95dc
SB
605 if (IS_ERR_OR_NULL(clk))
606 return;
607
608 clk_prepare_lock();
609 clk_core_unprepare(clk->core);
610 clk_prepare_unlock();
1e435256 611}
4dff95dc 612EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 613
4dff95dc 614static int clk_core_prepare(struct clk_core *core)
b2476490 615{
4dff95dc 616 int ret = 0;
b2476490 617
a6334725
SB
618 lockdep_assert_held(&prepare_lock);
619
4dff95dc 620 if (!core)
1e435256 621 return 0;
1e435256 622
4dff95dc
SB
623 if (core->prepare_count == 0) {
624 ret = clk_core_prepare(core->parent);
625 if (ret)
626 return ret;
b2476490 627
4dff95dc 628 trace_clk_prepare(core);
b2476490 629
4dff95dc
SB
630 if (core->ops->prepare)
631 ret = core->ops->prepare(core->hw);
b2476490 632
4dff95dc 633 trace_clk_prepare_complete(core);
1c155b3d 634
4dff95dc
SB
635 if (ret) {
636 clk_core_unprepare(core->parent);
637 return ret;
638 }
639 }
1c155b3d 640
4dff95dc 641 core->prepare_count++;
b2476490
MT
642
643 return 0;
644}
b2476490 645
4dff95dc
SB
646/**
647 * clk_prepare - prepare a clock source
648 * @clk: the clk being prepared
649 *
650 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
651 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
652 * operation may sleep. One example is a clk which is accessed over I2c. In
653 * the complex case a clk ungate operation may require a fast and a slow part.
654 * It is this reason that clk_prepare and clk_enable are not mutually
655 * exclusive. In fact clk_prepare must be called before clk_enable.
656 * Returns 0 on success, -EERROR otherwise.
657 */
658int clk_prepare(struct clk *clk)
b2476490 659{
4dff95dc 660 int ret;
b2476490 661
4dff95dc
SB
662 if (!clk)
663 return 0;
b2476490 664
4dff95dc
SB
665 clk_prepare_lock();
666 ret = clk_core_prepare(clk->core);
667 clk_prepare_unlock();
668
669 return ret;
b2476490 670}
4dff95dc 671EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 672
4dff95dc 673static void clk_core_disable(struct clk_core *core)
b2476490 674{
a6334725
SB
675 lockdep_assert_held(&enable_lock);
676
4dff95dc
SB
677 if (!core)
678 return;
035a61c3 679
4dff95dc
SB
680 if (WARN_ON(core->enable_count == 0))
681 return;
b2476490 682
4dff95dc
SB
683 if (--core->enable_count > 0)
684 return;
035a61c3 685
4dff95dc 686 trace_clk_disable(core);
035a61c3 687
4dff95dc
SB
688 if (core->ops->disable)
689 core->ops->disable(core->hw);
035a61c3 690
4dff95dc 691 trace_clk_disable_complete(core);
035a61c3 692
4dff95dc 693 clk_core_disable(core->parent);
035a61c3 694}
7ef3dcc8 695
4dff95dc
SB
696/**
697 * clk_disable - gate a clock
698 * @clk: the clk being gated
699 *
700 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
701 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
702 * clk if the operation is fast and will never sleep. One example is a
703 * SoC-internal clk which is controlled via simple register writes. In the
704 * complex case a clk gate operation may require a fast and a slow part. It is
705 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
706 * In fact clk_disable must be called before clk_unprepare.
707 */
708void clk_disable(struct clk *clk)
b2476490 709{
4dff95dc
SB
710 unsigned long flags;
711
712 if (IS_ERR_OR_NULL(clk))
713 return;
714
715 flags = clk_enable_lock();
716 clk_core_disable(clk->core);
717 clk_enable_unlock(flags);
b2476490 718}
4dff95dc 719EXPORT_SYMBOL_GPL(clk_disable);
b2476490 720
4dff95dc 721static int clk_core_enable(struct clk_core *core)
b2476490 722{
4dff95dc 723 int ret = 0;
b2476490 724
a6334725
SB
725 lockdep_assert_held(&enable_lock);
726
4dff95dc
SB
727 if (!core)
728 return 0;
b2476490 729
4dff95dc
SB
730 if (WARN_ON(core->prepare_count == 0))
731 return -ESHUTDOWN;
b2476490 732
4dff95dc
SB
733 if (core->enable_count == 0) {
734 ret = clk_core_enable(core->parent);
b2476490 735
4dff95dc
SB
736 if (ret)
737 return ret;
b2476490 738
4dff95dc 739 trace_clk_enable(core);
035a61c3 740
4dff95dc
SB
741 if (core->ops->enable)
742 ret = core->ops->enable(core->hw);
035a61c3 743
4dff95dc
SB
744 trace_clk_enable_complete(core);
745
746 if (ret) {
747 clk_core_disable(core->parent);
748 return ret;
749 }
750 }
751
752 core->enable_count++;
753 return 0;
035a61c3 754}
b2476490 755
4dff95dc
SB
756/**
757 * clk_enable - ungate a clock
758 * @clk: the clk being ungated
759 *
760 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
761 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
762 * if the operation will never sleep. One example is a SoC-internal clk which
763 * is controlled via simple register writes. In the complex case a clk ungate
764 * operation may require a fast and a slow part. It is this reason that
765 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
766 * must be called before clk_enable. Returns 0 on success, -EERROR
767 * otherwise.
768 */
769int clk_enable(struct clk *clk)
5279fc40 770{
4dff95dc
SB
771 unsigned long flags;
772 int ret;
773
774 if (!clk)
5279fc40
BB
775 return 0;
776
4dff95dc
SB
777 flags = clk_enable_lock();
778 ret = clk_core_enable(clk->core);
779 clk_enable_unlock(flags);
5279fc40 780
4dff95dc 781 return ret;
b2476490 782}
4dff95dc 783EXPORT_SYMBOL_GPL(clk_enable);
b2476490 784
0817b62c
BB
785static int clk_core_round_rate_nolock(struct clk_core *core,
786 struct clk_rate_request *req)
3d6ee287 787{
4dff95dc 788 struct clk_core *parent;
0817b62c 789 long rate;
4dff95dc
SB
790
791 lockdep_assert_held(&prepare_lock);
3d6ee287 792
d6968fca 793 if (!core)
4dff95dc 794 return 0;
3d6ee287 795
4dff95dc 796 parent = core->parent;
0817b62c
BB
797 if (parent) {
798 req->best_parent_hw = parent->hw;
799 req->best_parent_rate = parent->rate;
800 } else {
801 req->best_parent_hw = NULL;
802 req->best_parent_rate = 0;
803 }
3d6ee287 804
4dff95dc 805 if (core->ops->determine_rate) {
0817b62c
BB
806 return core->ops->determine_rate(core->hw, req);
807 } else if (core->ops->round_rate) {
808 rate = core->ops->round_rate(core->hw, req->rate,
809 &req->best_parent_rate);
810 if (rate < 0)
811 return rate;
812
813 req->rate = rate;
814 } else if (core->flags & CLK_SET_RATE_PARENT) {
815 return clk_core_round_rate_nolock(parent, req);
816 } else {
817 req->rate = core->rate;
818 }
819
820 return 0;
3d6ee287
UH
821}
822
4dff95dc
SB
823/**
824 * __clk_determine_rate - get the closest rate actually supported by a clock
825 * @hw: determine the rate of this clock
826 * @rate: target rate
827 * @min_rate: returned rate must be greater than this rate
828 * @max_rate: returned rate must be less than this rate
829 *
6e5ab41b 830 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 831 */
0817b62c 832int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 833{
0817b62c
BB
834 if (!hw) {
835 req->rate = 0;
4dff95dc 836 return 0;
0817b62c 837 }
035a61c3 838
0817b62c 839 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 840}
4dff95dc 841EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 842
1a9c069c
SB
843unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
844{
845 int ret;
846 struct clk_rate_request req;
847
848 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
849 req.rate = rate;
850
851 ret = clk_core_round_rate_nolock(hw->core, &req);
852 if (ret)
853 return 0;
854
855 return req.rate;
856}
857EXPORT_SYMBOL_GPL(clk_hw_round_rate);
858
4dff95dc
SB
859/**
860 * clk_round_rate - round the given rate for a clk
861 * @clk: the clk for which we are rounding a rate
862 * @rate: the rate which is to be rounded
863 *
864 * Takes in a rate as input and rounds it to a rate that the clk can actually
865 * use which is then returned. If clk doesn't support round_rate operation
866 * then the parent rate is returned.
867 */
868long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 869{
fc4a05d4
SB
870 struct clk_rate_request req;
871 int ret;
4dff95dc 872
035a61c3 873 if (!clk)
4dff95dc 874 return 0;
035a61c3 875
4dff95dc 876 clk_prepare_lock();
fc4a05d4
SB
877
878 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
879 req.rate = rate;
880
881 ret = clk_core_round_rate_nolock(clk->core, &req);
4dff95dc
SB
882 clk_prepare_unlock();
883
fc4a05d4
SB
884 if (ret)
885 return ret;
886
887 return req.rate;
035a61c3 888}
4dff95dc 889EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 890
4dff95dc
SB
891/**
892 * __clk_notify - call clk notifier chain
893 * @core: clk that is changing rate
894 * @msg: clk notifier type (see include/linux/clk.h)
895 * @old_rate: old clk rate
896 * @new_rate: new clk rate
897 *
898 * Triggers a notifier call chain on the clk rate-change notification
899 * for 'clk'. Passes a pointer to the struct clk and the previous
900 * and current rates to the notifier callback. Intended to be called by
901 * internal clock code only. Returns NOTIFY_DONE from the last driver
902 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
903 * a driver returns that.
904 */
905static int __clk_notify(struct clk_core *core, unsigned long msg,
906 unsigned long old_rate, unsigned long new_rate)
b2476490 907{
4dff95dc
SB
908 struct clk_notifier *cn;
909 struct clk_notifier_data cnd;
910 int ret = NOTIFY_DONE;
b2476490 911
4dff95dc
SB
912 cnd.old_rate = old_rate;
913 cnd.new_rate = new_rate;
b2476490 914
4dff95dc
SB
915 list_for_each_entry(cn, &clk_notifier_list, node) {
916 if (cn->clk->core == core) {
917 cnd.clk = cn->clk;
918 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
919 &cnd);
920 }
b2476490
MT
921 }
922
4dff95dc 923 return ret;
b2476490
MT
924}
925
4dff95dc
SB
926/**
927 * __clk_recalc_accuracies
928 * @core: first clk in the subtree
929 *
930 * Walks the subtree of clks starting with clk and recalculates accuracies as
931 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 932 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 933 * parent.
4dff95dc
SB
934 */
935static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 936{
4dff95dc
SB
937 unsigned long parent_accuracy = 0;
938 struct clk_core *child;
b2476490 939
4dff95dc 940 lockdep_assert_held(&prepare_lock);
b2476490 941
4dff95dc
SB
942 if (core->parent)
943 parent_accuracy = core->parent->accuracy;
b2476490 944
4dff95dc
SB
945 if (core->ops->recalc_accuracy)
946 core->accuracy = core->ops->recalc_accuracy(core->hw,
947 parent_accuracy);
948 else
949 core->accuracy = parent_accuracy;
b2476490 950
4dff95dc
SB
951 hlist_for_each_entry(child, &core->children, child_node)
952 __clk_recalc_accuracies(child);
b2476490
MT
953}
954
4dff95dc 955static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 956{
4dff95dc 957 unsigned long accuracy;
15a02c1f 958
4dff95dc
SB
959 clk_prepare_lock();
960 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
961 __clk_recalc_accuracies(core);
15a02c1f 962
4dff95dc
SB
963 accuracy = __clk_get_accuracy(core);
964 clk_prepare_unlock();
e366fdd7 965
4dff95dc 966 return accuracy;
e366fdd7 967}
15a02c1f 968
4dff95dc
SB
969/**
970 * clk_get_accuracy - return the accuracy of clk
971 * @clk: the clk whose accuracy is being returned
972 *
973 * Simply returns the cached accuracy of the clk, unless
974 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
975 * issued.
976 * If clk is NULL then returns 0.
977 */
978long clk_get_accuracy(struct clk *clk)
035a61c3 979{
4dff95dc
SB
980 if (!clk)
981 return 0;
035a61c3 982
4dff95dc 983 return clk_core_get_accuracy(clk->core);
035a61c3 984}
4dff95dc 985EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 986
4dff95dc
SB
987static unsigned long clk_recalc(struct clk_core *core,
988 unsigned long parent_rate)
1c8e6004 989{
4dff95dc
SB
990 if (core->ops->recalc_rate)
991 return core->ops->recalc_rate(core->hw, parent_rate);
992 return parent_rate;
1c8e6004
TV
993}
994
4dff95dc
SB
995/**
996 * __clk_recalc_rates
997 * @core: first clk in the subtree
998 * @msg: notification type (see include/linux/clk.h)
999 *
1000 * Walks the subtree of clks starting with clk and recalculates rates as it
1001 * goes. Note that if a clk does not implement the .recalc_rate callback then
1002 * it is assumed that the clock will take on the rate of its parent.
1003 *
1004 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1005 * if necessary.
15a02c1f 1006 */
4dff95dc 1007static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1008{
4dff95dc
SB
1009 unsigned long old_rate;
1010 unsigned long parent_rate = 0;
1011 struct clk_core *child;
e366fdd7 1012
4dff95dc 1013 lockdep_assert_held(&prepare_lock);
15a02c1f 1014
4dff95dc 1015 old_rate = core->rate;
b2476490 1016
4dff95dc
SB
1017 if (core->parent)
1018 parent_rate = core->parent->rate;
b2476490 1019
4dff95dc 1020 core->rate = clk_recalc(core, parent_rate);
b2476490 1021
4dff95dc
SB
1022 /*
1023 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1024 * & ABORT_RATE_CHANGE notifiers
1025 */
1026 if (core->notifier_count && msg)
1027 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1028
4dff95dc
SB
1029 hlist_for_each_entry(child, &core->children, child_node)
1030 __clk_recalc_rates(child, msg);
1031}
b2476490 1032
4dff95dc
SB
1033static unsigned long clk_core_get_rate(struct clk_core *core)
1034{
1035 unsigned long rate;
dfc202ea 1036
4dff95dc 1037 clk_prepare_lock();
b2476490 1038
4dff95dc
SB
1039 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1040 __clk_recalc_rates(core, 0);
1041
1042 rate = clk_core_get_rate_nolock(core);
1043 clk_prepare_unlock();
1044
1045 return rate;
b2476490
MT
1046}
1047
1048/**
4dff95dc
SB
1049 * clk_get_rate - return the rate of clk
1050 * @clk: the clk whose rate is being returned
b2476490 1051 *
4dff95dc
SB
1052 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1053 * is set, which means a recalc_rate will be issued.
1054 * If clk is NULL then returns 0.
b2476490 1055 */
4dff95dc 1056unsigned long clk_get_rate(struct clk *clk)
b2476490 1057{
4dff95dc
SB
1058 if (!clk)
1059 return 0;
63589e92 1060
4dff95dc 1061 return clk_core_get_rate(clk->core);
b2476490 1062}
4dff95dc 1063EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1064
4dff95dc
SB
1065static int clk_fetch_parent_index(struct clk_core *core,
1066 struct clk_core *parent)
b2476490 1067{
4dff95dc 1068 int i;
b2476490 1069
4dff95dc
SB
1070 /*
1071 * find index of new parent clock using cached parent ptrs,
1072 * or if not yet cached, use string name comparison and cache
1073 * them now to avoid future calls to clk_core_lookup.
1074 */
1075 for (i = 0; i < core->num_parents; i++) {
1076 if (core->parents[i] == parent)
1077 return i;
dfc202ea 1078
4dff95dc
SB
1079 if (core->parents[i])
1080 continue;
dfc202ea 1081
4dff95dc
SB
1082 if (!strcmp(core->parent_names[i], parent->name)) {
1083 core->parents[i] = clk_core_lookup(parent->name);
1084 return i;
b2476490
MT
1085 }
1086 }
1087
4dff95dc 1088 return -EINVAL;
b2476490
MT
1089}
1090
e6500344
HS
1091/*
1092 * Update the orphan status of @core and all its children.
1093 */
1094static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1095{
1096 struct clk_core *child;
1097
1098 core->orphan = is_orphan;
1099
1100 hlist_for_each_entry(child, &core->children, child_node)
1101 clk_core_update_orphan_status(child, is_orphan);
1102}
1103
4dff95dc 1104static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1105{
e6500344
HS
1106 bool was_orphan = core->orphan;
1107
4dff95dc 1108 hlist_del(&core->child_node);
035a61c3 1109
4dff95dc 1110 if (new_parent) {
e6500344
HS
1111 bool becomes_orphan = new_parent->orphan;
1112
4dff95dc
SB
1113 /* avoid duplicate POST_RATE_CHANGE notifications */
1114 if (new_parent->new_child == core)
1115 new_parent->new_child = NULL;
b2476490 1116
4dff95dc 1117 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1118
1119 if (was_orphan != becomes_orphan)
1120 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1121 } else {
1122 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1123 if (!was_orphan)
1124 clk_core_update_orphan_status(core, true);
4dff95dc 1125 }
dfc202ea 1126
4dff95dc 1127 core->parent = new_parent;
035a61c3
TV
1128}
1129
4dff95dc
SB
1130static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1131 struct clk_core *parent)
b2476490
MT
1132{
1133 unsigned long flags;
4dff95dc 1134 struct clk_core *old_parent = core->parent;
b2476490 1135
4dff95dc
SB
1136 /*
1137 * Migrate prepare state between parents and prevent race with
1138 * clk_enable().
1139 *
1140 * If the clock is not prepared, then a race with
1141 * clk_enable/disable() is impossible since we already have the
1142 * prepare lock (future calls to clk_enable() need to be preceded by
1143 * a clk_prepare()).
1144 *
1145 * If the clock is prepared, migrate the prepared state to the new
1146 * parent and also protect against a race with clk_enable() by
1147 * forcing the clock and the new parent on. This ensures that all
1148 * future calls to clk_enable() are practically NOPs with respect to
1149 * hardware and software states.
1150 *
1151 * See also: Comment for clk_set_parent() below.
1152 */
1153 if (core->prepare_count) {
1154 clk_core_prepare(parent);
d2a5d46b 1155 flags = clk_enable_lock();
4dff95dc
SB
1156 clk_core_enable(parent);
1157 clk_core_enable(core);
d2a5d46b 1158 clk_enable_unlock(flags);
4dff95dc 1159 }
63589e92 1160
4dff95dc 1161 /* update the clk tree topology */
eab89f69 1162 flags = clk_enable_lock();
4dff95dc 1163 clk_reparent(core, parent);
eab89f69 1164 clk_enable_unlock(flags);
4dff95dc
SB
1165
1166 return old_parent;
b2476490 1167}
b2476490 1168
4dff95dc
SB
1169static void __clk_set_parent_after(struct clk_core *core,
1170 struct clk_core *parent,
1171 struct clk_core *old_parent)
b2476490 1172{
d2a5d46b
DA
1173 unsigned long flags;
1174
4dff95dc
SB
1175 /*
1176 * Finish the migration of prepare state and undo the changes done
1177 * for preventing a race with clk_enable().
1178 */
1179 if (core->prepare_count) {
d2a5d46b 1180 flags = clk_enable_lock();
4dff95dc
SB
1181 clk_core_disable(core);
1182 clk_core_disable(old_parent);
d2a5d46b 1183 clk_enable_unlock(flags);
4dff95dc
SB
1184 clk_core_unprepare(old_parent);
1185 }
1186}
b2476490 1187
4dff95dc
SB
1188static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1189 u8 p_index)
1190{
1191 unsigned long flags;
1192 int ret = 0;
1193 struct clk_core *old_parent;
b2476490 1194
4dff95dc 1195 old_parent = __clk_set_parent_before(core, parent);
b2476490 1196
4dff95dc 1197 trace_clk_set_parent(core, parent);
b2476490 1198
4dff95dc
SB
1199 /* change clock input source */
1200 if (parent && core->ops->set_parent)
1201 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1202
4dff95dc 1203 trace_clk_set_parent_complete(core, parent);
dfc202ea 1204
4dff95dc
SB
1205 if (ret) {
1206 flags = clk_enable_lock();
1207 clk_reparent(core, old_parent);
1208 clk_enable_unlock(flags);
c660b2eb 1209 __clk_set_parent_after(core, old_parent, parent);
dfc202ea 1210
4dff95dc 1211 return ret;
b2476490
MT
1212 }
1213
4dff95dc
SB
1214 __clk_set_parent_after(core, parent, old_parent);
1215
b2476490
MT
1216 return 0;
1217}
1218
1219/**
4dff95dc
SB
1220 * __clk_speculate_rates
1221 * @core: first clk in the subtree
1222 * @parent_rate: the "future" rate of clk's parent
b2476490 1223 *
4dff95dc
SB
1224 * Walks the subtree of clks starting with clk, speculating rates as it
1225 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1226 *
1227 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1228 * pre-rate change notifications and returns early if no clks in the
1229 * subtree have subscribed to the notifications. Note that if a clk does not
1230 * implement the .recalc_rate callback then it is assumed that the clock will
1231 * take on the rate of its parent.
b2476490 1232 */
4dff95dc
SB
1233static int __clk_speculate_rates(struct clk_core *core,
1234 unsigned long parent_rate)
b2476490 1235{
4dff95dc
SB
1236 struct clk_core *child;
1237 unsigned long new_rate;
1238 int ret = NOTIFY_DONE;
b2476490 1239
4dff95dc 1240 lockdep_assert_held(&prepare_lock);
864e160a 1241
4dff95dc
SB
1242 new_rate = clk_recalc(core, parent_rate);
1243
1244 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1245 if (core->notifier_count)
1246 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1247
1248 if (ret & NOTIFY_STOP_MASK) {
1249 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1250 __func__, core->name, ret);
1251 goto out;
1252 }
1253
1254 hlist_for_each_entry(child, &core->children, child_node) {
1255 ret = __clk_speculate_rates(child, new_rate);
1256 if (ret & NOTIFY_STOP_MASK)
1257 break;
1258 }
b2476490 1259
4dff95dc 1260out:
b2476490
MT
1261 return ret;
1262}
b2476490 1263
4dff95dc
SB
1264static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1265 struct clk_core *new_parent, u8 p_index)
b2476490 1266{
4dff95dc 1267 struct clk_core *child;
b2476490 1268
4dff95dc
SB
1269 core->new_rate = new_rate;
1270 core->new_parent = new_parent;
1271 core->new_parent_index = p_index;
1272 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1273 core->new_child = NULL;
1274 if (new_parent && new_parent != core->parent)
1275 new_parent->new_child = core;
496eadf8 1276
4dff95dc
SB
1277 hlist_for_each_entry(child, &core->children, child_node) {
1278 child->new_rate = clk_recalc(child, new_rate);
1279 clk_calc_subtree(child, child->new_rate, NULL, 0);
1280 }
1281}
b2476490 1282
4dff95dc
SB
1283/*
1284 * calculate the new rates returning the topmost clock that has to be
1285 * changed.
1286 */
1287static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1288 unsigned long rate)
1289{
1290 struct clk_core *top = core;
1291 struct clk_core *old_parent, *parent;
4dff95dc
SB
1292 unsigned long best_parent_rate = 0;
1293 unsigned long new_rate;
1294 unsigned long min_rate;
1295 unsigned long max_rate;
1296 int p_index = 0;
1297 long ret;
1298
1299 /* sanity */
1300 if (IS_ERR_OR_NULL(core))
1301 return NULL;
1302
1303 /* save parent rate, if it exists */
1304 parent = old_parent = core->parent;
71472c0c 1305 if (parent)
4dff95dc 1306 best_parent_rate = parent->rate;
71472c0c 1307
4dff95dc
SB
1308 clk_core_get_boundaries(core, &min_rate, &max_rate);
1309
1310 /* find the closest rate and parent clk/rate */
d6968fca 1311 if (core->ops->determine_rate) {
0817b62c
BB
1312 struct clk_rate_request req;
1313
1314 req.rate = rate;
1315 req.min_rate = min_rate;
1316 req.max_rate = max_rate;
1317 if (parent) {
1318 req.best_parent_hw = parent->hw;
1319 req.best_parent_rate = parent->rate;
1320 } else {
1321 req.best_parent_hw = NULL;
1322 req.best_parent_rate = 0;
1323 }
1324
1325 ret = core->ops->determine_rate(core->hw, &req);
4dff95dc
SB
1326 if (ret < 0)
1327 return NULL;
1c8e6004 1328
0817b62c
BB
1329 best_parent_rate = req.best_parent_rate;
1330 new_rate = req.rate;
1331 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
4dff95dc
SB
1332 } else if (core->ops->round_rate) {
1333 ret = core->ops->round_rate(core->hw, rate,
0817b62c 1334 &best_parent_rate);
4dff95dc
SB
1335 if (ret < 0)
1336 return NULL;
035a61c3 1337
4dff95dc
SB
1338 new_rate = ret;
1339 if (new_rate < min_rate || new_rate > max_rate)
1340 return NULL;
1341 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1342 /* pass-through clock without adjustable parent */
1343 core->new_rate = core->rate;
1344 return NULL;
1345 } else {
1346 /* pass-through clock with adjustable parent */
1347 top = clk_calc_new_rates(parent, rate);
1348 new_rate = parent->new_rate;
1349 goto out;
1350 }
1c8e6004 1351
4dff95dc
SB
1352 /* some clocks must be gated to change parent */
1353 if (parent != old_parent &&
1354 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1355 pr_debug("%s: %s not gated but wants to reparent\n",
1356 __func__, core->name);
1357 return NULL;
1358 }
b2476490 1359
4dff95dc
SB
1360 /* try finding the new parent index */
1361 if (parent && core->num_parents > 1) {
1362 p_index = clk_fetch_parent_index(core, parent);
1363 if (p_index < 0) {
1364 pr_debug("%s: clk %s can not be parent of clk %s\n",
1365 __func__, parent->name, core->name);
1366 return NULL;
1367 }
1368 }
b2476490 1369
4dff95dc
SB
1370 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1371 best_parent_rate != parent->rate)
1372 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1373
4dff95dc
SB
1374out:
1375 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1376
4dff95dc 1377 return top;
b2476490 1378}
b2476490 1379
4dff95dc
SB
1380/*
1381 * Notify about rate changes in a subtree. Always walk down the whole tree
1382 * so that in case of an error we can walk down the whole tree again and
1383 * abort the change.
b2476490 1384 */
4dff95dc
SB
1385static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1386 unsigned long event)
b2476490 1387{
4dff95dc 1388 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1389 int ret = NOTIFY_DONE;
1390
4dff95dc
SB
1391 if (core->rate == core->new_rate)
1392 return NULL;
b2476490 1393
4dff95dc
SB
1394 if (core->notifier_count) {
1395 ret = __clk_notify(core, event, core->rate, core->new_rate);
1396 if (ret & NOTIFY_STOP_MASK)
1397 fail_clk = core;
b2476490
MT
1398 }
1399
4dff95dc
SB
1400 hlist_for_each_entry(child, &core->children, child_node) {
1401 /* Skip children who will be reparented to another clock */
1402 if (child->new_parent && child->new_parent != core)
1403 continue;
1404 tmp_clk = clk_propagate_rate_change(child, event);
1405 if (tmp_clk)
1406 fail_clk = tmp_clk;
1407 }
5279fc40 1408
4dff95dc
SB
1409 /* handle the new child who might not be in core->children yet */
1410 if (core->new_child) {
1411 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1412 if (tmp_clk)
1413 fail_clk = tmp_clk;
1414 }
5279fc40 1415
4dff95dc 1416 return fail_clk;
5279fc40
BB
1417}
1418
4dff95dc
SB
1419/*
1420 * walk down a subtree and set the new rates notifying the rate
1421 * change on the way
1422 */
1423static void clk_change_rate(struct clk_core *core)
035a61c3 1424{
4dff95dc
SB
1425 struct clk_core *child;
1426 struct hlist_node *tmp;
1427 unsigned long old_rate;
1428 unsigned long best_parent_rate = 0;
1429 bool skip_set_rate = false;
1430 struct clk_core *old_parent;
035a61c3 1431
4dff95dc 1432 old_rate = core->rate;
035a61c3 1433
4dff95dc
SB
1434 if (core->new_parent)
1435 best_parent_rate = core->new_parent->rate;
1436 else if (core->parent)
1437 best_parent_rate = core->parent->rate;
035a61c3 1438
2eb8c710
HS
1439 if (core->flags & CLK_SET_RATE_UNGATE) {
1440 unsigned long flags;
1441
1442 clk_core_prepare(core);
1443 flags = clk_enable_lock();
1444 clk_core_enable(core);
1445 clk_enable_unlock(flags);
1446 }
1447
4dff95dc
SB
1448 if (core->new_parent && core->new_parent != core->parent) {
1449 old_parent = __clk_set_parent_before(core, core->new_parent);
1450 trace_clk_set_parent(core, core->new_parent);
5279fc40 1451
4dff95dc
SB
1452 if (core->ops->set_rate_and_parent) {
1453 skip_set_rate = true;
1454 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1455 best_parent_rate,
1456 core->new_parent_index);
1457 } else if (core->ops->set_parent) {
1458 core->ops->set_parent(core->hw, core->new_parent_index);
1459 }
5279fc40 1460
4dff95dc
SB
1461 trace_clk_set_parent_complete(core, core->new_parent);
1462 __clk_set_parent_after(core, core->new_parent, old_parent);
1463 }
8f2c2db1 1464
4dff95dc 1465 trace_clk_set_rate(core, core->new_rate);
b2476490 1466
4dff95dc
SB
1467 if (!skip_set_rate && core->ops->set_rate)
1468 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1469
4dff95dc 1470 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1471
4dff95dc 1472 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1473
2eb8c710
HS
1474 if (core->flags & CLK_SET_RATE_UNGATE) {
1475 unsigned long flags;
1476
1477 flags = clk_enable_lock();
1478 clk_core_disable(core);
1479 clk_enable_unlock(flags);
1480 clk_core_unprepare(core);
1481 }
1482
4dff95dc
SB
1483 if (core->notifier_count && old_rate != core->rate)
1484 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 1485
85e88fab
MT
1486 if (core->flags & CLK_RECALC_NEW_RATES)
1487 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 1488
b2476490 1489 /*
4dff95dc
SB
1490 * Use safe iteration, as change_rate can actually swap parents
1491 * for certain clock types.
b2476490 1492 */
4dff95dc
SB
1493 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1494 /* Skip children who will be reparented to another clock */
1495 if (child->new_parent && child->new_parent != core)
1496 continue;
1497 clk_change_rate(child);
1498 }
b2476490 1499
4dff95dc
SB
1500 /* handle the new child who might not be in core->children yet */
1501 if (core->new_child)
1502 clk_change_rate(core->new_child);
b2476490
MT
1503}
1504
4dff95dc
SB
1505static int clk_core_set_rate_nolock(struct clk_core *core,
1506 unsigned long req_rate)
a093bde2 1507{
4dff95dc
SB
1508 struct clk_core *top, *fail_clk;
1509 unsigned long rate = req_rate;
1510 int ret = 0;
a093bde2 1511
4dff95dc
SB
1512 if (!core)
1513 return 0;
a093bde2 1514
4dff95dc
SB
1515 /* bail early if nothing to do */
1516 if (rate == clk_core_get_rate_nolock(core))
1517 return 0;
a093bde2 1518
4dff95dc
SB
1519 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1520 return -EBUSY;
a093bde2 1521
4dff95dc
SB
1522 /* calculate new rates and get the topmost changed clock */
1523 top = clk_calc_new_rates(core, rate);
1524 if (!top)
1525 return -EINVAL;
1526
1527 /* notify that we are about to change rates */
1528 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1529 if (fail_clk) {
1530 pr_debug("%s: failed to set %s rate\n", __func__,
1531 fail_clk->name);
1532 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1533 return -EBUSY;
1534 }
1535
1536 /* change the rates */
1537 clk_change_rate(top);
1538
1539 core->req_rate = req_rate;
1540
1541 return ret;
a093bde2 1542}
035a61c3
TV
1543
1544/**
4dff95dc
SB
1545 * clk_set_rate - specify a new rate for clk
1546 * @clk: the clk whose rate is being changed
1547 * @rate: the new rate for clk
035a61c3 1548 *
4dff95dc
SB
1549 * In the simplest case clk_set_rate will only adjust the rate of clk.
1550 *
1551 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1552 * propagate up to clk's parent; whether or not this happens depends on the
1553 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1554 * after calling .round_rate then upstream parent propagation is ignored. If
1555 * *parent_rate comes back with a new rate for clk's parent then we propagate
1556 * up to clk's parent and set its rate. Upward propagation will continue
1557 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1558 * .round_rate stops requesting changes to clk's parent_rate.
1559 *
1560 * Rate changes are accomplished via tree traversal that also recalculates the
1561 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1562 *
1563 * Returns 0 on success, -EERROR otherwise.
035a61c3 1564 */
4dff95dc 1565int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1566{
4dff95dc
SB
1567 int ret;
1568
035a61c3
TV
1569 if (!clk)
1570 return 0;
1571
4dff95dc
SB
1572 /* prevent racing with updates to the clock topology */
1573 clk_prepare_lock();
da0f0b2c 1574
4dff95dc 1575 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1576
4dff95dc 1577 clk_prepare_unlock();
4935b22c 1578
4dff95dc 1579 return ret;
4935b22c 1580}
4dff95dc 1581EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1582
4dff95dc
SB
1583/**
1584 * clk_set_rate_range - set a rate range for a clock source
1585 * @clk: clock source
1586 * @min: desired minimum clock rate in Hz, inclusive
1587 * @max: desired maximum clock rate in Hz, inclusive
1588 *
1589 * Returns success (0) or negative errno.
1590 */
1591int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1592{
4dff95dc 1593 int ret = 0;
4935b22c 1594
4dff95dc
SB
1595 if (!clk)
1596 return 0;
903efc55 1597
4dff95dc
SB
1598 if (min > max) {
1599 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1600 __func__, clk->core->name, clk->dev_id, clk->con_id,
1601 min, max);
1602 return -EINVAL;
903efc55 1603 }
4935b22c 1604
4dff95dc 1605 clk_prepare_lock();
4935b22c 1606
4dff95dc
SB
1607 if (min != clk->min_rate || max != clk->max_rate) {
1608 clk->min_rate = min;
1609 clk->max_rate = max;
1610 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1611 }
1612
4dff95dc 1613 clk_prepare_unlock();
4935b22c 1614
4dff95dc 1615 return ret;
3fa2252b 1616}
4dff95dc 1617EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1618
4dff95dc
SB
1619/**
1620 * clk_set_min_rate - set a minimum clock rate for a clock source
1621 * @clk: clock source
1622 * @rate: desired minimum clock rate in Hz, inclusive
1623 *
1624 * Returns success (0) or negative errno.
1625 */
1626int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1627{
4dff95dc
SB
1628 if (!clk)
1629 return 0;
1630
1631 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1632}
4dff95dc 1633EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1634
4dff95dc
SB
1635/**
1636 * clk_set_max_rate - set a maximum clock rate for a clock source
1637 * @clk: clock source
1638 * @rate: desired maximum clock rate in Hz, inclusive
1639 *
1640 * Returns success (0) or negative errno.
1641 */
1642int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1643{
4dff95dc
SB
1644 if (!clk)
1645 return 0;
4935b22c 1646
4dff95dc 1647 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1648}
4dff95dc 1649EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1650
b2476490 1651/**
4dff95dc
SB
1652 * clk_get_parent - return the parent of a clk
1653 * @clk: the clk whose parent gets returned
b2476490 1654 *
4dff95dc 1655 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1656 */
4dff95dc 1657struct clk *clk_get_parent(struct clk *clk)
b2476490 1658{
4dff95dc 1659 struct clk *parent;
b2476490 1660
fc4a05d4
SB
1661 if (!clk)
1662 return NULL;
1663
4dff95dc 1664 clk_prepare_lock();
fc4a05d4
SB
1665 /* TODO: Create a per-user clk and change callers to call clk_put */
1666 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 1667 clk_prepare_unlock();
496eadf8 1668
4dff95dc
SB
1669 return parent;
1670}
1671EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1672
4dff95dc
SB
1673/*
1674 * .get_parent is mandatory for clocks with multiple possible parents. It is
1675 * optional for single-parent clocks. Always call .get_parent if it is
1676 * available and WARN if it is missing for multi-parent clocks.
1677 *
1678 * For single-parent clocks without .get_parent, first check to see if the
1679 * .parents array exists, and if so use it to avoid an expensive tree
1680 * traversal. If .parents does not exist then walk the tree.
1681 */
1682static struct clk_core *__clk_init_parent(struct clk_core *core)
1683{
1684 struct clk_core *ret = NULL;
1685 u8 index;
b2476490 1686
4dff95dc
SB
1687 /* handle the trivial cases */
1688
1689 if (!core->num_parents)
b2476490
MT
1690 goto out;
1691
4dff95dc
SB
1692 if (core->num_parents == 1) {
1693 if (IS_ERR_OR_NULL(core->parent))
1694 core->parent = clk_core_lookup(core->parent_names[0]);
1695 ret = core->parent;
1696 goto out;
b2476490
MT
1697 }
1698
4dff95dc
SB
1699 if (!core->ops->get_parent) {
1700 WARN(!core->ops->get_parent,
1701 "%s: multi-parent clocks must implement .get_parent\n",
1702 __func__);
1703 goto out;
90c53547 1704 }
4dff95dc
SB
1705
1706 /*
1707 * Do our best to cache parent clocks in core->parents. This prevents
1708 * unnecessary and expensive lookups. We don't set core->parent here;
1709 * that is done by the calling function.
1710 */
1711
1712 index = core->ops->get_parent(core->hw);
1713
4dff95dc
SB
1714 ret = clk_core_get_parent_by_index(core, index);
1715
b2476490
MT
1716out:
1717 return ret;
1718}
1719
4dff95dc
SB
1720static void clk_core_reparent(struct clk_core *core,
1721 struct clk_core *new_parent)
b2476490 1722{
4dff95dc
SB
1723 clk_reparent(core, new_parent);
1724 __clk_recalc_accuracies(core);
1725 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1726}
1727
42c86547
TV
1728void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
1729{
1730 if (!hw)
1731 return;
1732
1733 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
1734}
1735
4dff95dc
SB
1736/**
1737 * clk_has_parent - check if a clock is a possible parent for another
1738 * @clk: clock source
1739 * @parent: parent clock source
1740 *
1741 * This function can be used in drivers that need to check that a clock can be
1742 * the parent of another without actually changing the parent.
1743 *
1744 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1745 */
4dff95dc 1746bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1747{
4dff95dc
SB
1748 struct clk_core *core, *parent_core;
1749 unsigned int i;
b2476490 1750
4dff95dc
SB
1751 /* NULL clocks should be nops, so return success if either is NULL. */
1752 if (!clk || !parent)
1753 return true;
7452b219 1754
4dff95dc
SB
1755 core = clk->core;
1756 parent_core = parent->core;
71472c0c 1757
4dff95dc
SB
1758 /* Optimize for the case where the parent is already the parent. */
1759 if (core->parent == parent_core)
1760 return true;
1c8e6004 1761
4dff95dc
SB
1762 for (i = 0; i < core->num_parents; i++)
1763 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1764 return true;
03bc10ab 1765
4dff95dc
SB
1766 return false;
1767}
1768EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1769
4dff95dc
SB
1770static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1771{
1772 int ret = 0;
1773 int p_index = 0;
1774 unsigned long p_rate = 0;
1775
1776 if (!core)
1777 return 0;
1778
1779 /* prevent racing with updates to the clock topology */
1780 clk_prepare_lock();
1781
1782 if (core->parent == parent)
1783 goto out;
1784
1785 /* verify ops for for multi-parent clks */
1786 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1787 ret = -ENOSYS;
63f5c3b2 1788 goto out;
7452b219
MT
1789 }
1790
4dff95dc
SB
1791 /* check that we are allowed to re-parent if the clock is in use */
1792 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1793 ret = -EBUSY;
1794 goto out;
b2476490
MT
1795 }
1796
71472c0c 1797 /* try finding the new parent index */
4dff95dc 1798 if (parent) {
d6968fca 1799 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1800 p_rate = parent->rate;
f1c8b2ed 1801 if (p_index < 0) {
71472c0c 1802 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1803 __func__, parent->name, core->name);
1804 ret = p_index;
1805 goto out;
71472c0c 1806 }
b2476490
MT
1807 }
1808
4dff95dc
SB
1809 /* propagate PRE_RATE_CHANGE notifications */
1810 ret = __clk_speculate_rates(core, p_rate);
b2476490 1811
4dff95dc
SB
1812 /* abort if a driver objects */
1813 if (ret & NOTIFY_STOP_MASK)
1814 goto out;
b2476490 1815
4dff95dc
SB
1816 /* do the re-parent */
1817 ret = __clk_set_parent(core, parent, p_index);
b2476490 1818
4dff95dc
SB
1819 /* propagate rate an accuracy recalculation accordingly */
1820 if (ret) {
1821 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1822 } else {
1823 __clk_recalc_rates(core, POST_RATE_CHANGE);
1824 __clk_recalc_accuracies(core);
b2476490
MT
1825 }
1826
4dff95dc
SB
1827out:
1828 clk_prepare_unlock();
71472c0c 1829
4dff95dc
SB
1830 return ret;
1831}
b2476490 1832
4dff95dc
SB
1833/**
1834 * clk_set_parent - switch the parent of a mux clk
1835 * @clk: the mux clk whose input we are switching
1836 * @parent: the new input to clk
1837 *
1838 * Re-parent clk to use parent as its new input source. If clk is in
1839 * prepared state, the clk will get enabled for the duration of this call. If
1840 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1841 * that, the reparenting is glitchy in hardware, etc), use the
1842 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1843 *
1844 * After successfully changing clk's parent clk_set_parent will update the
1845 * clk topology, sysfs topology and propagate rate recalculation via
1846 * __clk_recalc_rates.
1847 *
1848 * Returns 0 on success, -EERROR otherwise.
1849 */
1850int clk_set_parent(struct clk *clk, struct clk *parent)
1851{
1852 if (!clk)
1853 return 0;
1854
1855 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1856}
4dff95dc 1857EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1858
4dff95dc
SB
1859/**
1860 * clk_set_phase - adjust the phase shift of a clock signal
1861 * @clk: clock signal source
1862 * @degrees: number of degrees the signal is shifted
1863 *
1864 * Shifts the phase of a clock signal by the specified
1865 * degrees. Returns 0 on success, -EERROR otherwise.
1866 *
1867 * This function makes no distinction about the input or reference
1868 * signal that we adjust the clock signal phase against. For example
1869 * phase locked-loop clock signal generators we may shift phase with
1870 * respect to feedback clock signal input, but for other cases the
1871 * clock phase may be shifted with respect to some other, unspecified
1872 * signal.
1873 *
1874 * Additionally the concept of phase shift does not propagate through
1875 * the clock tree hierarchy, which sets it apart from clock rates and
1876 * clock accuracy. A parent clock phase attribute does not have an
1877 * impact on the phase attribute of a child clock.
b2476490 1878 */
4dff95dc 1879int clk_set_phase(struct clk *clk, int degrees)
b2476490 1880{
4dff95dc 1881 int ret = -EINVAL;
b2476490 1882
4dff95dc
SB
1883 if (!clk)
1884 return 0;
b2476490 1885
4dff95dc
SB
1886 /* sanity check degrees */
1887 degrees %= 360;
1888 if (degrees < 0)
1889 degrees += 360;
bf47b4fd 1890
4dff95dc 1891 clk_prepare_lock();
3fa2252b 1892
4dff95dc 1893 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1894
4dff95dc
SB
1895 if (clk->core->ops->set_phase)
1896 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1897
4dff95dc 1898 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1899
4dff95dc
SB
1900 if (!ret)
1901 clk->core->phase = degrees;
b2476490 1902
4dff95dc 1903 clk_prepare_unlock();
dfc202ea 1904
4dff95dc
SB
1905 return ret;
1906}
1907EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1908
4dff95dc
SB
1909static int clk_core_get_phase(struct clk_core *core)
1910{
1911 int ret;
b2476490 1912
4dff95dc
SB
1913 clk_prepare_lock();
1914 ret = core->phase;
1915 clk_prepare_unlock();
71472c0c 1916
4dff95dc 1917 return ret;
b2476490
MT
1918}
1919
4dff95dc
SB
1920/**
1921 * clk_get_phase - return the phase shift of a clock signal
1922 * @clk: clock signal source
1923 *
1924 * Returns the phase shift of a clock node in degrees, otherwise returns
1925 * -EERROR.
1926 */
1927int clk_get_phase(struct clk *clk)
1c8e6004 1928{
4dff95dc 1929 if (!clk)
1c8e6004
TV
1930 return 0;
1931
4dff95dc
SB
1932 return clk_core_get_phase(clk->core);
1933}
1934EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1935
4dff95dc
SB
1936/**
1937 * clk_is_match - check if two clk's point to the same hardware clock
1938 * @p: clk compared against q
1939 * @q: clk compared against p
1940 *
1941 * Returns true if the two struct clk pointers both point to the same hardware
1942 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1943 * share the same struct clk_core object.
1944 *
1945 * Returns false otherwise. Note that two NULL clks are treated as matching.
1946 */
1947bool clk_is_match(const struct clk *p, const struct clk *q)
1948{
1949 /* trivial case: identical struct clk's or both NULL */
1950 if (p == q)
1951 return true;
1c8e6004 1952
3fe003f9 1953 /* true if clk->core pointers match. Avoid dereferencing garbage */
4dff95dc
SB
1954 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1955 if (p->core == q->core)
1956 return true;
1c8e6004 1957
4dff95dc
SB
1958 return false;
1959}
1960EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1961
4dff95dc 1962/*** debugfs support ***/
1c8e6004 1963
4dff95dc
SB
1964#ifdef CONFIG_DEBUG_FS
1965#include <linux/debugfs.h>
1c8e6004 1966
4dff95dc
SB
1967static struct dentry *rootdir;
1968static int inited = 0;
1969static DEFINE_MUTEX(clk_debug_lock);
1970static HLIST_HEAD(clk_debug_list);
1c8e6004 1971
4dff95dc
SB
1972static struct hlist_head *all_lists[] = {
1973 &clk_root_list,
1974 &clk_orphan_list,
1975 NULL,
1976};
1977
1978static struct hlist_head *orphan_list[] = {
1979 &clk_orphan_list,
1980 NULL,
1981};
1982
1983static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1984 int level)
b2476490 1985{
4dff95dc
SB
1986 if (!c)
1987 return;
b2476490 1988
4dff95dc
SB
1989 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1990 level * 3 + 1, "",
1991 30 - level * 3, c->name,
1992 c->enable_count, c->prepare_count, clk_core_get_rate(c),
1993 clk_core_get_accuracy(c), clk_core_get_phase(c));
1994}
89ac8d7a 1995
4dff95dc
SB
1996static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1997 int level)
1998{
1999 struct clk_core *child;
b2476490 2000
4dff95dc
SB
2001 if (!c)
2002 return;
b2476490 2003
4dff95dc 2004 clk_summary_show_one(s, c, level);
0e1c0301 2005
4dff95dc
SB
2006 hlist_for_each_entry(child, &c->children, child_node)
2007 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2008}
b2476490 2009
4dff95dc 2010static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2011{
4dff95dc
SB
2012 struct clk_core *c;
2013 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2014
4dff95dc
SB
2015 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
2016 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 2017
1c8e6004
TV
2018 clk_prepare_lock();
2019
4dff95dc
SB
2020 for (; *lists; lists++)
2021 hlist_for_each_entry(c, *lists, child_node)
2022 clk_summary_show_subtree(s, c, 0);
b2476490 2023
eab89f69 2024 clk_prepare_unlock();
b2476490 2025
4dff95dc 2026 return 0;
b2476490 2027}
1c8e6004 2028
1c8e6004 2029
4dff95dc 2030static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 2031{
4dff95dc 2032 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 2033}
b2476490 2034
4dff95dc
SB
2035static const struct file_operations clk_summary_fops = {
2036 .open = clk_summary_open,
2037 .read = seq_read,
2038 .llseek = seq_lseek,
2039 .release = single_release,
2040};
b2476490 2041
4dff95dc
SB
2042static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2043{
2044 if (!c)
2045 return;
b2476490 2046
7cb81136 2047 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
2048 seq_printf(s, "\"%s\": { ", c->name);
2049 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2050 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
7cb81136
SW
2051 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2052 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
4dff95dc 2053 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 2054}
b2476490 2055
4dff95dc 2056static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 2057{
4dff95dc 2058 struct clk_core *child;
b2476490 2059
4dff95dc
SB
2060 if (!c)
2061 return;
b2476490 2062
4dff95dc 2063 clk_dump_one(s, c, level);
b2476490 2064
4dff95dc
SB
2065 hlist_for_each_entry(child, &c->children, child_node) {
2066 seq_printf(s, ",");
2067 clk_dump_subtree(s, child, level + 1);
b2476490
MT
2068 }
2069
4dff95dc 2070 seq_printf(s, "}");
b2476490
MT
2071}
2072
4dff95dc 2073static int clk_dump(struct seq_file *s, void *data)
4e88f3de 2074{
4dff95dc
SB
2075 struct clk_core *c;
2076 bool first_node = true;
2077 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 2078
4dff95dc 2079 seq_printf(s, "{");
4e88f3de 2080
4dff95dc 2081 clk_prepare_lock();
035a61c3 2082
4dff95dc
SB
2083 for (; *lists; lists++) {
2084 hlist_for_each_entry(c, *lists, child_node) {
2085 if (!first_node)
2086 seq_puts(s, ",");
2087 first_node = false;
2088 clk_dump_subtree(s, c, 0);
2089 }
2090 }
4e88f3de 2091
4dff95dc 2092 clk_prepare_unlock();
4e88f3de 2093
70e9f4dd 2094 seq_puts(s, "}\n");
4dff95dc 2095 return 0;
4e88f3de 2096}
4e88f3de 2097
4dff95dc
SB
2098
2099static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2100{
4dff95dc
SB
2101 return single_open(file, clk_dump, inode->i_private);
2102}
b2476490 2103
4dff95dc
SB
2104static const struct file_operations clk_dump_fops = {
2105 .open = clk_dump_open,
2106 .read = seq_read,
2107 .llseek = seq_lseek,
2108 .release = single_release,
2109};
89ac8d7a 2110
4dff95dc
SB
2111static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2112{
2113 struct dentry *d;
2114 int ret = -ENOMEM;
b2476490 2115
4dff95dc
SB
2116 if (!core || !pdentry) {
2117 ret = -EINVAL;
b2476490 2118 goto out;
4dff95dc 2119 }
b2476490 2120
4dff95dc
SB
2121 d = debugfs_create_dir(core->name, pdentry);
2122 if (!d)
b61c43c0 2123 goto out;
b61c43c0 2124
4dff95dc
SB
2125 core->dentry = d;
2126
2127 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2128 (u32 *)&core->rate);
2129 if (!d)
2130 goto err_out;
2131
2132 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2133 (u32 *)&core->accuracy);
2134 if (!d)
2135 goto err_out;
2136
2137 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2138 (u32 *)&core->phase);
2139 if (!d)
2140 goto err_out;
031dcc9b 2141
4dff95dc
SB
2142 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2143 (u32 *)&core->flags);
2144 if (!d)
2145 goto err_out;
031dcc9b 2146
4dff95dc
SB
2147 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2148 (u32 *)&core->prepare_count);
2149 if (!d)
2150 goto err_out;
b2476490 2151
4dff95dc
SB
2152 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2153 (u32 *)&core->enable_count);
2154 if (!d)
2155 goto err_out;
b2476490 2156
4dff95dc
SB
2157 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2158 (u32 *)&core->notifier_count);
2159 if (!d)
2160 goto err_out;
b2476490 2161
4dff95dc
SB
2162 if (core->ops->debug_init) {
2163 ret = core->ops->debug_init(core->hw, core->dentry);
2164 if (ret)
2165 goto err_out;
5279fc40 2166 }
b2476490 2167
4dff95dc
SB
2168 ret = 0;
2169 goto out;
b2476490 2170
4dff95dc
SB
2171err_out:
2172 debugfs_remove_recursive(core->dentry);
2173 core->dentry = NULL;
2174out:
b2476490
MT
2175 return ret;
2176}
035a61c3
TV
2177
2178/**
6e5ab41b
SB
2179 * clk_debug_register - add a clk node to the debugfs clk directory
2180 * @core: the clk being added to the debugfs clk directory
035a61c3 2181 *
6e5ab41b
SB
2182 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2183 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2184 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2185 */
4dff95dc 2186static int clk_debug_register(struct clk_core *core)
035a61c3 2187{
4dff95dc 2188 int ret = 0;
035a61c3 2189
4dff95dc
SB
2190 mutex_lock(&clk_debug_lock);
2191 hlist_add_head(&core->debug_node, &clk_debug_list);
2192
2193 if (!inited)
2194 goto unlock;
2195
2196 ret = clk_debug_create_one(core, rootdir);
2197unlock:
2198 mutex_unlock(&clk_debug_lock);
2199
2200 return ret;
035a61c3 2201}
b2476490 2202
4dff95dc 2203 /**
6e5ab41b
SB
2204 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2205 * @core: the clk being removed from the debugfs clk directory
e59c5371 2206 *
6e5ab41b
SB
2207 * Dynamically removes a clk and all its child nodes from the
2208 * debugfs clk directory if clk->dentry points to debugfs created by
4dff95dc 2209 * clk_debug_register in __clk_init.
e59c5371 2210 */
4dff95dc 2211static void clk_debug_unregister(struct clk_core *core)
e59c5371 2212{
4dff95dc
SB
2213 mutex_lock(&clk_debug_lock);
2214 hlist_del_init(&core->debug_node);
2215 debugfs_remove_recursive(core->dentry);
2216 core->dentry = NULL;
2217 mutex_unlock(&clk_debug_lock);
2218}
e59c5371 2219
4dff95dc
SB
2220struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2221 void *data, const struct file_operations *fops)
2222{
2223 struct dentry *d = NULL;
e59c5371 2224
4dff95dc
SB
2225 if (hw->core->dentry)
2226 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2227 fops);
e59c5371 2228
4dff95dc
SB
2229 return d;
2230}
2231EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2232
4dff95dc 2233/**
6e5ab41b 2234 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2235 *
6e5ab41b
SB
2236 * clks are often initialized very early during boot before memory can be
2237 * dynamically allocated and well before debugfs is setup. This function
2238 * populates the debugfs clk directory once at boot-time when we know that
2239 * debugfs is setup. It should only be called once at boot-time, all other clks
2240 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2241 */
2242static int __init clk_debug_init(void)
2243{
2244 struct clk_core *core;
2245 struct dentry *d;
dfc202ea 2246
4dff95dc 2247 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2248
4dff95dc
SB
2249 if (!rootdir)
2250 return -ENOMEM;
dfc202ea 2251
4dff95dc
SB
2252 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2253 &clk_summary_fops);
2254 if (!d)
2255 return -ENOMEM;
e59c5371 2256
4dff95dc
SB
2257 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2258 &clk_dump_fops);
2259 if (!d)
2260 return -ENOMEM;
e59c5371 2261
4dff95dc
SB
2262 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2263 &orphan_list, &clk_summary_fops);
2264 if (!d)
2265 return -ENOMEM;
e59c5371 2266
4dff95dc
SB
2267 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2268 &orphan_list, &clk_dump_fops);
2269 if (!d)
2270 return -ENOMEM;
e59c5371 2271
4dff95dc
SB
2272 mutex_lock(&clk_debug_lock);
2273 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2274 clk_debug_create_one(core, rootdir);
e59c5371 2275
4dff95dc
SB
2276 inited = 1;
2277 mutex_unlock(&clk_debug_lock);
e59c5371 2278
4dff95dc
SB
2279 return 0;
2280}
2281late_initcall(clk_debug_init);
2282#else
2283static inline int clk_debug_register(struct clk_core *core) { return 0; }
2284static inline void clk_debug_reparent(struct clk_core *core,
2285 struct clk_core *new_parent)
035a61c3 2286{
035a61c3 2287}
4dff95dc 2288static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2289{
3d3801ef 2290}
4dff95dc 2291#endif
3d3801ef 2292
b2476490 2293/**
be45ebf2 2294 * __clk_core_init - initialize the data structures in a struct clk_core
d35c80c2 2295 * @core: clk_core being initialized
b2476490 2296 *
035a61c3 2297 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2298 * parent and rate and sets them both.
b2476490 2299 */
be45ebf2 2300static int __clk_core_init(struct clk_core *core)
b2476490 2301{
d1302a36 2302 int i, ret = 0;
035a61c3 2303 struct clk_core *orphan;
b67bfe0d 2304 struct hlist_node *tmp2;
1c8e6004 2305 unsigned long rate;
b2476490 2306
d35c80c2 2307 if (!core)
d1302a36 2308 return -EINVAL;
b2476490 2309
eab89f69 2310 clk_prepare_lock();
b2476490
MT
2311
2312 /* check to see if a clock with this name is already registered */
d6968fca 2313 if (clk_core_lookup(core->name)) {
d1302a36 2314 pr_debug("%s: clk %s already initialized\n",
d6968fca 2315 __func__, core->name);
d1302a36 2316 ret = -EEXIST;
b2476490 2317 goto out;
d1302a36 2318 }
b2476490 2319
d4d7e3dd 2320 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2321 if (core->ops->set_rate &&
2322 !((core->ops->round_rate || core->ops->determine_rate) &&
2323 core->ops->recalc_rate)) {
71472c0c 2324 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d6968fca 2325 __func__, core->name);
d1302a36 2326 ret = -EINVAL;
d4d7e3dd
MT
2327 goto out;
2328 }
2329
d6968fca 2330 if (core->ops->set_parent && !core->ops->get_parent) {
d4d7e3dd 2331 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
d6968fca 2332 __func__, core->name);
d1302a36 2333 ret = -EINVAL;
d4d7e3dd
MT
2334 goto out;
2335 }
2336
d6968fca
SB
2337 if (core->ops->set_rate_and_parent &&
2338 !(core->ops->set_parent && core->ops->set_rate)) {
3fa2252b 2339 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2340 __func__, core->name);
3fa2252b
SB
2341 ret = -EINVAL;
2342 goto out;
2343 }
2344
b2476490 2345 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2346 for (i = 0; i < core->num_parents; i++)
2347 WARN(!core->parent_names[i],
b2476490 2348 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2349 __func__, core->name);
b2476490
MT
2350
2351 /*
176d1169
MY
2352 * clk_core_lookup returns NULL for parents that have not been
2353 * clk_init'd; thus any access to clk->parents[] must check
2354 * for a NULL pointer. We can always perform lazy lookups for
2355 * missing parents later on.
b2476490 2356 */
176d1169
MY
2357 if (core->parents)
2358 for (i = 0; i < core->num_parents; i++)
2359 core->parents[i] =
2360 clk_core_lookup(core->parent_names[i]);
b2476490 2361
d6968fca 2362 core->parent = __clk_init_parent(core);
b2476490
MT
2363
2364 /*
d6968fca 2365 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2366 * parent has not yet been __clk_init'd then place clk in the orphan
2367 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2368 * clk list.
2369 *
2370 * Every time a new clk is clk_init'd then we walk the list of orphan
2371 * clocks and re-parent any that are children of the clock currently
2372 * being clk_init'd.
2373 */
e6500344 2374 if (core->parent) {
d6968fca
SB
2375 hlist_add_head(&core->child_node,
2376 &core->parent->children);
e6500344
HS
2377 core->orphan = core->parent->orphan;
2378 } else if (core->flags & CLK_IS_ROOT) {
d6968fca 2379 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
2380 core->orphan = false;
2381 } else {
d6968fca 2382 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
2383 core->orphan = true;
2384 }
b2476490 2385
5279fc40
BB
2386 /*
2387 * Set clk's accuracy. The preferred method is to use
2388 * .recalc_accuracy. For simple clocks and lazy developers the default
2389 * fallback is to use the parent's accuracy. If a clock doesn't have a
2390 * parent (or is orphaned) then accuracy is set to zero (perfect
2391 * clock).
2392 */
d6968fca
SB
2393 if (core->ops->recalc_accuracy)
2394 core->accuracy = core->ops->recalc_accuracy(core->hw,
2395 __clk_get_accuracy(core->parent));
2396 else if (core->parent)
2397 core->accuracy = core->parent->accuracy;
5279fc40 2398 else
d6968fca 2399 core->accuracy = 0;
5279fc40 2400
9824cf73
MR
2401 /*
2402 * Set clk's phase.
2403 * Since a phase is by definition relative to its parent, just
2404 * query the current clock phase, or just assume it's in phase.
2405 */
d6968fca
SB
2406 if (core->ops->get_phase)
2407 core->phase = core->ops->get_phase(core->hw);
9824cf73 2408 else
d6968fca 2409 core->phase = 0;
9824cf73 2410
b2476490
MT
2411 /*
2412 * Set clk's rate. The preferred method is to use .recalc_rate. For
2413 * simple clocks and lazy developers the default fallback is to use the
2414 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2415 * then rate is set to zero.
2416 */
d6968fca
SB
2417 if (core->ops->recalc_rate)
2418 rate = core->ops->recalc_rate(core->hw,
2419 clk_core_get_rate_nolock(core->parent));
2420 else if (core->parent)
2421 rate = core->parent->rate;
b2476490 2422 else
1c8e6004 2423 rate = 0;
d6968fca 2424 core->rate = core->req_rate = rate;
b2476490
MT
2425
2426 /*
2427 * walk the list of orphan clocks and reparent any that are children of
2428 * this clock
2429 */
b67bfe0d 2430 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2431 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2432 i = orphan->ops->get_parent(orphan->hw);
9054a31d
MR
2433 if (i >= 0 && i < orphan->num_parents &&
2434 !strcmp(core->name, orphan->parent_names[i]))
d6968fca 2435 clk_core_reparent(orphan, core);
1f61e5f1
MF
2436 continue;
2437 }
2438
b2476490 2439 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2440 if (!strcmp(core->name, orphan->parent_names[i])) {
2441 clk_core_reparent(orphan, core);
b2476490
MT
2442 break;
2443 }
1f61e5f1 2444 }
b2476490
MT
2445
2446 /*
2447 * optional platform-specific magic
2448 *
2449 * The .init callback is not used by any of the basic clock types, but
2450 * exists for weird hardware that must perform initialization magic.
2451 * Please consider other ways of solving initialization problems before
24ee1a08 2452 * using this callback, as its use is discouraged.
b2476490 2453 */
d6968fca
SB
2454 if (core->ops->init)
2455 core->ops->init(core->hw);
b2476490 2456
d6968fca 2457 kref_init(&core->ref);
b2476490 2458out:
eab89f69 2459 clk_prepare_unlock();
b2476490 2460
89f7e9de 2461 if (!ret)
d6968fca 2462 clk_debug_register(core);
89f7e9de 2463
d1302a36 2464 return ret;
b2476490
MT
2465}
2466
035a61c3
TV
2467struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2468 const char *con_id)
0197b3ea 2469{
0197b3ea
SK
2470 struct clk *clk;
2471
035a61c3 2472 /* This is to allow this function to be chained to others */
c1de1357 2473 if (IS_ERR_OR_NULL(hw))
035a61c3 2474 return (struct clk *) hw;
0197b3ea 2475
035a61c3
TV
2476 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2477 if (!clk)
2478 return ERR_PTR(-ENOMEM);
2479
2480 clk->core = hw->core;
2481 clk->dev_id = dev_id;
2482 clk->con_id = con_id;
1c8e6004
TV
2483 clk->max_rate = ULONG_MAX;
2484
2485 clk_prepare_lock();
50595f8b 2486 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2487 clk_prepare_unlock();
0197b3ea
SK
2488
2489 return clk;
2490}
035a61c3 2491
73e0e496 2492void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2493{
2494 clk_prepare_lock();
50595f8b 2495 hlist_del(&clk->clks_node);
1c8e6004
TV
2496 clk_prepare_unlock();
2497
2498 kfree(clk);
2499}
0197b3ea 2500
293ba3b4
SB
2501/**
2502 * clk_register - allocate a new clock, register it and return an opaque cookie
2503 * @dev: device that is registering this clock
2504 * @hw: link to hardware-specific clock data
2505 *
2506 * clk_register is the primary interface for populating the clock tree with new
2507 * clock nodes. It returns a pointer to the newly allocated struct clk which
a59a5163 2508 * cannot be dereferenced by driver code but may be used in conjunction with the
293ba3b4
SB
2509 * rest of the clock API. In the event of an error clk_register will return an
2510 * error code; drivers must test for an error code after calling clk_register.
2511 */
2512struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2513{
d1302a36 2514 int i, ret;
d6968fca 2515 struct clk_core *core;
293ba3b4 2516
d6968fca
SB
2517 core = kzalloc(sizeof(*core), GFP_KERNEL);
2518 if (!core) {
293ba3b4
SB
2519 ret = -ENOMEM;
2520 goto fail_out;
2521 }
b2476490 2522
d6968fca
SB
2523 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2524 if (!core->name) {
0197b3ea
SK
2525 ret = -ENOMEM;
2526 goto fail_name;
2527 }
d6968fca 2528 core->ops = hw->init->ops;
ac2df527 2529 if (dev && dev->driver)
d6968fca
SB
2530 core->owner = dev->driver->owner;
2531 core->hw = hw;
2532 core->flags = hw->init->flags;
2533 core->num_parents = hw->init->num_parents;
9783c0d9
SB
2534 core->min_rate = 0;
2535 core->max_rate = ULONG_MAX;
d6968fca 2536 hw->core = core;
b2476490 2537
d1302a36 2538 /* allocate local copy in case parent_names is __initdata */
d6968fca 2539 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2540 GFP_KERNEL);
d1302a36 2541
d6968fca 2542 if (!core->parent_names) {
d1302a36
MT
2543 ret = -ENOMEM;
2544 goto fail_parent_names;
2545 }
2546
2547
2548 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2549 for (i = 0; i < core->num_parents; i++) {
2550 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2551 GFP_KERNEL);
d6968fca 2552 if (!core->parent_names[i]) {
d1302a36
MT
2553 ret = -ENOMEM;
2554 goto fail_parent_names_copy;
2555 }
2556 }
2557
176d1169
MY
2558 /* avoid unnecessary string look-ups of clk_core's possible parents. */
2559 core->parents = kcalloc(core->num_parents, sizeof(*core->parents),
2560 GFP_KERNEL);
2561 if (!core->parents) {
2562 ret = -ENOMEM;
2563 goto fail_parents;
2564 };
2565
d6968fca 2566 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2567
035a61c3
TV
2568 hw->clk = __clk_create_clk(hw, NULL, NULL);
2569 if (IS_ERR(hw->clk)) {
035a61c3 2570 ret = PTR_ERR(hw->clk);
176d1169 2571 goto fail_parents;
035a61c3
TV
2572 }
2573
be45ebf2 2574 ret = __clk_core_init(core);
d1302a36 2575 if (!ret)
035a61c3 2576 return hw->clk;
b2476490 2577
1c8e6004 2578 __clk_free_clk(hw->clk);
035a61c3 2579 hw->clk = NULL;
b2476490 2580
176d1169
MY
2581fail_parents:
2582 kfree(core->parents);
d1302a36
MT
2583fail_parent_names_copy:
2584 while (--i >= 0)
d6968fca
SB
2585 kfree_const(core->parent_names[i]);
2586 kfree(core->parent_names);
d1302a36 2587fail_parent_names:
d6968fca 2588 kfree_const(core->name);
0197b3ea 2589fail_name:
d6968fca 2590 kfree(core);
d1302a36
MT
2591fail_out:
2592 return ERR_PTR(ret);
b2476490
MT
2593}
2594EXPORT_SYMBOL_GPL(clk_register);
2595
6e5ab41b 2596/* Free memory allocated for a clock. */
fcb0ee6a
SN
2597static void __clk_release(struct kref *ref)
2598{
d6968fca
SB
2599 struct clk_core *core = container_of(ref, struct clk_core, ref);
2600 int i = core->num_parents;
fcb0ee6a 2601
496eadf8
KK
2602 lockdep_assert_held(&prepare_lock);
2603
d6968fca 2604 kfree(core->parents);
fcb0ee6a 2605 while (--i >= 0)
d6968fca 2606 kfree_const(core->parent_names[i]);
fcb0ee6a 2607
d6968fca
SB
2608 kfree(core->parent_names);
2609 kfree_const(core->name);
2610 kfree(core);
fcb0ee6a
SN
2611}
2612
2613/*
2614 * Empty clk_ops for unregistered clocks. These are used temporarily
2615 * after clk_unregister() was called on a clock and until last clock
2616 * consumer calls clk_put() and the struct clk object is freed.
2617 */
2618static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2619{
2620 return -ENXIO;
2621}
2622
2623static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2624{
2625 WARN_ON_ONCE(1);
2626}
2627
2628static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2629 unsigned long parent_rate)
2630{
2631 return -ENXIO;
2632}
2633
2634static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2635{
2636 return -ENXIO;
2637}
2638
2639static const struct clk_ops clk_nodrv_ops = {
2640 .enable = clk_nodrv_prepare_enable,
2641 .disable = clk_nodrv_disable_unprepare,
2642 .prepare = clk_nodrv_prepare_enable,
2643 .unprepare = clk_nodrv_disable_unprepare,
2644 .set_rate = clk_nodrv_set_rate,
2645 .set_parent = clk_nodrv_set_parent,
2646};
2647
1df5c939
MB
2648/**
2649 * clk_unregister - unregister a currently registered clock
2650 * @clk: clock to unregister
1df5c939 2651 */
fcb0ee6a
SN
2652void clk_unregister(struct clk *clk)
2653{
2654 unsigned long flags;
2655
6314b679
SB
2656 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2657 return;
2658
035a61c3 2659 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2660
2661 clk_prepare_lock();
2662
035a61c3
TV
2663 if (clk->core->ops == &clk_nodrv_ops) {
2664 pr_err("%s: unregistered clock: %s\n", __func__,
2665 clk->core->name);
6314b679 2666 return;
fcb0ee6a
SN
2667 }
2668 /*
2669 * Assign empty clock ops for consumers that might still hold
2670 * a reference to this clock.
2671 */
2672 flags = clk_enable_lock();
035a61c3 2673 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2674 clk_enable_unlock(flags);
2675
035a61c3
TV
2676 if (!hlist_empty(&clk->core->children)) {
2677 struct clk_core *child;
874f224c 2678 struct hlist_node *t;
fcb0ee6a
SN
2679
2680 /* Reparent all children to the orphan list. */
035a61c3
TV
2681 hlist_for_each_entry_safe(child, t, &clk->core->children,
2682 child_node)
2683 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2684 }
2685
035a61c3 2686 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2687
035a61c3 2688 if (clk->core->prepare_count)
fcb0ee6a 2689 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2690 __func__, clk->core->name);
2691 kref_put(&clk->core->ref, __clk_release);
6314b679 2692
fcb0ee6a
SN
2693 clk_prepare_unlock();
2694}
1df5c939
MB
2695EXPORT_SYMBOL_GPL(clk_unregister);
2696
46c8773a
SB
2697static void devm_clk_release(struct device *dev, void *res)
2698{
293ba3b4 2699 clk_unregister(*(struct clk **)res);
46c8773a
SB
2700}
2701
2702/**
2703 * devm_clk_register - resource managed clk_register()
2704 * @dev: device that is registering this clock
2705 * @hw: link to hardware-specific clock data
2706 *
2707 * Managed clk_register(). Clocks returned from this function are
2708 * automatically clk_unregister()ed on driver detach. See clk_register() for
2709 * more information.
2710 */
2711struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2712{
2713 struct clk *clk;
293ba3b4 2714 struct clk **clkp;
46c8773a 2715
293ba3b4
SB
2716 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2717 if (!clkp)
46c8773a
SB
2718 return ERR_PTR(-ENOMEM);
2719
293ba3b4
SB
2720 clk = clk_register(dev, hw);
2721 if (!IS_ERR(clk)) {
2722 *clkp = clk;
2723 devres_add(dev, clkp);
46c8773a 2724 } else {
293ba3b4 2725 devres_free(clkp);
46c8773a
SB
2726 }
2727
2728 return clk;
2729}
2730EXPORT_SYMBOL_GPL(devm_clk_register);
2731
2732static int devm_clk_match(struct device *dev, void *res, void *data)
2733{
2734 struct clk *c = res;
2735 if (WARN_ON(!c))
2736 return 0;
2737 return c == data;
2738}
2739
2740/**
2741 * devm_clk_unregister - resource managed clk_unregister()
2742 * @clk: clock to unregister
2743 *
2744 * Deallocate a clock allocated with devm_clk_register(). Normally
2745 * this function will not need to be called and the resource management
2746 * code will ensure that the resource is freed.
2747 */
2748void devm_clk_unregister(struct device *dev, struct clk *clk)
2749{
2750 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2751}
2752EXPORT_SYMBOL_GPL(devm_clk_unregister);
2753
ac2df527
SN
2754/*
2755 * clkdev helpers
2756 */
2757int __clk_get(struct clk *clk)
2758{
035a61c3
TV
2759 struct clk_core *core = !clk ? NULL : clk->core;
2760
2761 if (core) {
2762 if (!try_module_get(core->owner))
00efcb1c 2763 return 0;
ac2df527 2764
035a61c3 2765 kref_get(&core->ref);
00efcb1c 2766 }
ac2df527
SN
2767 return 1;
2768}
2769
2770void __clk_put(struct clk *clk)
2771{
10cdfe54
TV
2772 struct module *owner;
2773
00efcb1c 2774 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2775 return;
2776
fcb0ee6a 2777 clk_prepare_lock();
1c8e6004 2778
50595f8b 2779 hlist_del(&clk->clks_node);
ec02ace8
TV
2780 if (clk->min_rate > clk->core->req_rate ||
2781 clk->max_rate < clk->core->req_rate)
2782 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2783
1c8e6004
TV
2784 owner = clk->core->owner;
2785 kref_put(&clk->core->ref, __clk_release);
2786
fcb0ee6a
SN
2787 clk_prepare_unlock();
2788
10cdfe54 2789 module_put(owner);
035a61c3 2790
035a61c3 2791 kfree(clk);
ac2df527
SN
2792}
2793
b2476490
MT
2794/*** clk rate change notifiers ***/
2795
2796/**
2797 * clk_notifier_register - add a clk rate change notifier
2798 * @clk: struct clk * to watch
2799 * @nb: struct notifier_block * with callback info
2800 *
2801 * Request notification when clk's rate changes. This uses an SRCU
2802 * notifier because we want it to block and notifier unregistrations are
2803 * uncommon. The callbacks associated with the notifier must not
2804 * re-enter into the clk framework by calling any top-level clk APIs;
2805 * this will cause a nested prepare_lock mutex.
2806 *
198bb594
MY
2807 * In all notification cases (pre, post and abort rate change) the original
2808 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
2809 * and the new frequency is passed via struct clk_notifier_data.new_rate.
b2476490 2810 *
b2476490
MT
2811 * clk_notifier_register() must be called from non-atomic context.
2812 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2813 * allocation failure; otherwise, passes along the return value of
2814 * srcu_notifier_chain_register().
2815 */
2816int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2817{
2818 struct clk_notifier *cn;
2819 int ret = -ENOMEM;
2820
2821 if (!clk || !nb)
2822 return -EINVAL;
2823
eab89f69 2824 clk_prepare_lock();
b2476490
MT
2825
2826 /* search the list of notifiers for this clk */
2827 list_for_each_entry(cn, &clk_notifier_list, node)
2828 if (cn->clk == clk)
2829 break;
2830
2831 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2832 if (cn->clk != clk) {
2833 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2834 if (!cn)
2835 goto out;
2836
2837 cn->clk = clk;
2838 srcu_init_notifier_head(&cn->notifier_head);
2839
2840 list_add(&cn->node, &clk_notifier_list);
2841 }
2842
2843 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2844
035a61c3 2845 clk->core->notifier_count++;
b2476490
MT
2846
2847out:
eab89f69 2848 clk_prepare_unlock();
b2476490
MT
2849
2850 return ret;
2851}
2852EXPORT_SYMBOL_GPL(clk_notifier_register);
2853
2854/**
2855 * clk_notifier_unregister - remove a clk rate change notifier
2856 * @clk: struct clk *
2857 * @nb: struct notifier_block * with callback info
2858 *
2859 * Request no further notification for changes to 'clk' and frees memory
2860 * allocated in clk_notifier_register.
2861 *
2862 * Returns -EINVAL if called with null arguments; otherwise, passes
2863 * along the return value of srcu_notifier_chain_unregister().
2864 */
2865int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2866{
2867 struct clk_notifier *cn = NULL;
2868 int ret = -EINVAL;
2869
2870 if (!clk || !nb)
2871 return -EINVAL;
2872
eab89f69 2873 clk_prepare_lock();
b2476490
MT
2874
2875 list_for_each_entry(cn, &clk_notifier_list, node)
2876 if (cn->clk == clk)
2877 break;
2878
2879 if (cn->clk == clk) {
2880 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2881
035a61c3 2882 clk->core->notifier_count--;
b2476490
MT
2883
2884 /* XXX the notifier code should handle this better */
2885 if (!cn->notifier_head.head) {
2886 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2887 list_del(&cn->node);
b2476490
MT
2888 kfree(cn);
2889 }
2890
2891 } else {
2892 ret = -ENOENT;
2893 }
2894
eab89f69 2895 clk_prepare_unlock();
b2476490
MT
2896
2897 return ret;
2898}
2899EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2900
2901#ifdef CONFIG_OF
2902/**
2903 * struct of_clk_provider - Clock provider registration structure
2904 * @link: Entry in global list of clock providers
2905 * @node: Pointer to device tree node of clock provider
2906 * @get: Get clock callback. Returns NULL or a struct clk for the
2907 * given clock specifier
2908 * @data: context pointer to be passed into @get callback
2909 */
2910struct of_clk_provider {
2911 struct list_head link;
2912
2913 struct device_node *node;
2914 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2915 void *data;
2916};
2917
f2f6c255
PG
2918static const struct of_device_id __clk_of_table_sentinel
2919 __used __section(__clk_of_table_end);
2920
766e6a4e 2921static LIST_HEAD(of_clk_providers);
d6782c26
SN
2922static DEFINE_MUTEX(of_clk_mutex);
2923
766e6a4e
GL
2924struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2925 void *data)
2926{
2927 return data;
2928}
2929EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2930
494bfec9
SG
2931struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2932{
2933 struct clk_onecell_data *clk_data = data;
2934 unsigned int idx = clkspec->args[0];
2935
2936 if (idx >= clk_data->clk_num) {
7e96353c 2937 pr_err("%s: invalid clock index %u\n", __func__, idx);
494bfec9
SG
2938 return ERR_PTR(-EINVAL);
2939 }
2940
2941 return clk_data->clks[idx];
2942}
2943EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2944
766e6a4e
GL
2945/**
2946 * of_clk_add_provider() - Register a clock provider for a node
2947 * @np: Device node pointer associated with clock provider
2948 * @clk_src_get: callback for decoding clock
2949 * @data: context pointer for @clk_src_get callback.
2950 */
2951int of_clk_add_provider(struct device_node *np,
2952 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2953 void *data),
2954 void *data)
2955{
2956 struct of_clk_provider *cp;
86be408b 2957 int ret;
766e6a4e
GL
2958
2959 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2960 if (!cp)
2961 return -ENOMEM;
2962
2963 cp->node = of_node_get(np);
2964 cp->data = data;
2965 cp->get = clk_src_get;
2966
d6782c26 2967 mutex_lock(&of_clk_mutex);
766e6a4e 2968 list_add(&cp->link, &of_clk_providers);
d6782c26 2969 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2970 pr_debug("Added clock from %s\n", np->full_name);
2971
86be408b
SN
2972 ret = of_clk_set_defaults(np, true);
2973 if (ret < 0)
2974 of_clk_del_provider(np);
2975
2976 return ret;
766e6a4e
GL
2977}
2978EXPORT_SYMBOL_GPL(of_clk_add_provider);
2979
2980/**
2981 * of_clk_del_provider() - Remove a previously registered clock provider
2982 * @np: Device node pointer associated with clock provider
2983 */
2984void of_clk_del_provider(struct device_node *np)
2985{
2986 struct of_clk_provider *cp;
2987
d6782c26 2988 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2989 list_for_each_entry(cp, &of_clk_providers, link) {
2990 if (cp->node == np) {
2991 list_del(&cp->link);
2992 of_node_put(cp->node);
2993 kfree(cp);
2994 break;
2995 }
2996 }
d6782c26 2997 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2998}
2999EXPORT_SYMBOL_GPL(of_clk_del_provider);
3000
73e0e496
SB
3001struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3002 const char *dev_id, const char *con_id)
766e6a4e
GL
3003{
3004 struct of_clk_provider *provider;
a34cd466 3005 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 3006
306c342f
SB
3007 if (!clkspec)
3008 return ERR_PTR(-EINVAL);
3009
766e6a4e 3010 /* Check if we have such a provider in our array */
306c342f 3011 mutex_lock(&of_clk_mutex);
766e6a4e
GL
3012 list_for_each_entry(provider, &of_clk_providers, link) {
3013 if (provider->node == clkspec->np)
3014 clk = provider->get(clkspec, provider->data);
73e0e496
SB
3015 if (!IS_ERR(clk)) {
3016 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
3017 con_id);
3018
3019 if (!IS_ERR(clk) && !__clk_get(clk)) {
3020 __clk_free_clk(clk);
3021 clk = ERR_PTR(-ENOENT);
3022 }
3023
766e6a4e 3024 break;
73e0e496 3025 }
766e6a4e 3026 }
306c342f 3027 mutex_unlock(&of_clk_mutex);
d6782c26
SN
3028
3029 return clk;
3030}
3031
306c342f
SB
3032/**
3033 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3034 * @clkspec: pointer to a clock specifier data structure
3035 *
3036 * This function looks up a struct clk from the registered list of clock
3037 * providers, an input is a clock specifier data structure as returned
3038 * from the of_parse_phandle_with_args() function call.
3039 */
d6782c26
SN
3040struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
3041{
306c342f 3042 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
3043}
3044
f6102742
MT
3045int of_clk_get_parent_count(struct device_node *np)
3046{
3047 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
3048}
3049EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
3050
766e6a4e
GL
3051const char *of_clk_get_parent_name(struct device_node *np, int index)
3052{
3053 struct of_phandle_args clkspec;
7a0fc1a3 3054 struct property *prop;
766e6a4e 3055 const char *clk_name;
7a0fc1a3
BD
3056 const __be32 *vp;
3057 u32 pv;
766e6a4e 3058 int rc;
7a0fc1a3 3059 int count;
0a4807c2 3060 struct clk *clk;
766e6a4e 3061
766e6a4e
GL
3062 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
3063 &clkspec);
3064 if (rc)
3065 return NULL;
3066
7a0fc1a3
BD
3067 index = clkspec.args_count ? clkspec.args[0] : 0;
3068 count = 0;
3069
3070 /* if there is an indices property, use it to transfer the index
3071 * specified into an array offset for the clock-output-names property.
3072 */
3073 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
3074 if (index == pv) {
3075 index = count;
3076 break;
3077 }
3078 count++;
3079 }
8da411cc
MY
3080 /* We went off the end of 'clock-indices' without finding it */
3081 if (prop && !vp)
3082 return NULL;
7a0fc1a3 3083
766e6a4e 3084 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 3085 index,
0a4807c2
SB
3086 &clk_name) < 0) {
3087 /*
3088 * Best effort to get the name if the clock has been
3089 * registered with the framework. If the clock isn't
3090 * registered, we return the node name as the name of
3091 * the clock as long as #clock-cells = 0.
3092 */
3093 clk = of_clk_get_from_provider(&clkspec);
3094 if (IS_ERR(clk)) {
3095 if (clkspec.args_count == 0)
3096 clk_name = clkspec.np->name;
3097 else
3098 clk_name = NULL;
3099 } else {
3100 clk_name = __clk_get_name(clk);
3101 clk_put(clk);
3102 }
3103 }
3104
766e6a4e
GL
3105
3106 of_node_put(clkspec.np);
3107 return clk_name;
3108}
3109EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3110
2e61dfb3
DN
3111/**
3112 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
3113 * number of parents
3114 * @np: Device node pointer associated with clock provider
3115 * @parents: pointer to char array that hold the parents' names
3116 * @size: size of the @parents array
3117 *
3118 * Return: number of parents for the clock node.
3119 */
3120int of_clk_parent_fill(struct device_node *np, const char **parents,
3121 unsigned int size)
3122{
3123 unsigned int i = 0;
3124
3125 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
3126 i++;
3127
3128 return i;
3129}
3130EXPORT_SYMBOL_GPL(of_clk_parent_fill);
3131
1771b10d
GC
3132struct clock_provider {
3133 of_clk_init_cb_t clk_init_cb;
3134 struct device_node *np;
3135 struct list_head node;
3136};
3137
1771b10d
GC
3138/*
3139 * This function looks for a parent clock. If there is one, then it
3140 * checks that the provider for this parent clock was initialized, in
3141 * this case the parent clock will be ready.
3142 */
3143static int parent_ready(struct device_node *np)
3144{
3145 int i = 0;
3146
3147 while (true) {
3148 struct clk *clk = of_clk_get(np, i);
3149
3150 /* this parent is ready we can check the next one */
3151 if (!IS_ERR(clk)) {
3152 clk_put(clk);
3153 i++;
3154 continue;
3155 }
3156
3157 /* at least one parent is not ready, we exit now */
3158 if (PTR_ERR(clk) == -EPROBE_DEFER)
3159 return 0;
3160
3161 /*
3162 * Here we make assumption that the device tree is
3163 * written correctly. So an error means that there is
3164 * no more parent. As we didn't exit yet, then the
3165 * previous parent are ready. If there is no clock
3166 * parent, no need to wait for them, then we can
3167 * consider their absence as being ready
3168 */
3169 return 1;
3170 }
3171}
3172
766e6a4e
GL
3173/**
3174 * of_clk_init() - Scan and init clock providers from the DT
3175 * @matches: array of compatible values and init functions for providers.
3176 *
1771b10d 3177 * This function scans the device tree for matching clock providers
e5ca8fb4 3178 * and calls their initialization functions. It also does it by trying
1771b10d 3179 * to follow the dependencies.
766e6a4e
GL
3180 */
3181void __init of_clk_init(const struct of_device_id *matches)
3182{
7f7ed584 3183 const struct of_device_id *match;
766e6a4e 3184 struct device_node *np;
1771b10d
GC
3185 struct clock_provider *clk_provider, *next;
3186 bool is_init_done;
3187 bool force = false;
2573a02a 3188 LIST_HEAD(clk_provider_list);
766e6a4e 3189
f2f6c255 3190 if (!matches)
819b4861 3191 matches = &__clk_of_table;
f2f6c255 3192
1771b10d 3193 /* First prepare the list of the clocks providers */
7f7ed584 3194 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
3195 struct clock_provider *parent;
3196
3197 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
3198 if (!parent) {
3199 list_for_each_entry_safe(clk_provider, next,
3200 &clk_provider_list, node) {
3201 list_del(&clk_provider->node);
6bc9d9d6 3202 of_node_put(clk_provider->np);
2e3b19f1
SB
3203 kfree(clk_provider);
3204 }
6bc9d9d6 3205 of_node_put(np);
2e3b19f1
SB
3206 return;
3207 }
1771b10d
GC
3208
3209 parent->clk_init_cb = match->data;
6bc9d9d6 3210 parent->np = of_node_get(np);
3f6d439f 3211 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3212 }
3213
3214 while (!list_empty(&clk_provider_list)) {
3215 is_init_done = false;
3216 list_for_each_entry_safe(clk_provider, next,
3217 &clk_provider_list, node) {
3218 if (force || parent_ready(clk_provider->np)) {
86be408b 3219
1771b10d 3220 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3221 of_clk_set_defaults(clk_provider->np, true);
3222
1771b10d 3223 list_del(&clk_provider->node);
6bc9d9d6 3224 of_node_put(clk_provider->np);
1771b10d
GC
3225 kfree(clk_provider);
3226 is_init_done = true;
3227 }
3228 }
3229
3230 /*
e5ca8fb4 3231 * We didn't manage to initialize any of the
1771b10d
GC
3232 * remaining providers during the last loop, so now we
3233 * initialize all the remaining ones unconditionally
3234 * in case the clock parent was not mandatory
3235 */
3236 if (!is_init_done)
3237 force = true;
766e6a4e
GL
3238 }
3239}
3240#endif
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