Commit | Line | Data |
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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
b09d6d99 | 12 | #include <linux/clk-provider.h> |
86be408b | 13 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
14 | #include <linux/module.h> |
15 | #include <linux/mutex.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/slab.h> | |
766e6a4e | 20 | #include <linux/of.h> |
46c8773a | 21 | #include <linux/device.h> |
f2f6c255 | 22 | #include <linux/init.h> |
533ddeb1 | 23 | #include <linux/sched.h> |
b2476490 | 24 | |
d6782c26 SN |
25 | #include "clk.h" |
26 | ||
b2476490 MT |
27 | static DEFINE_SPINLOCK(enable_lock); |
28 | static DEFINE_MUTEX(prepare_lock); | |
29 | ||
533ddeb1 MT |
30 | static struct task_struct *prepare_owner; |
31 | static struct task_struct *enable_owner; | |
32 | ||
33 | static int prepare_refcnt; | |
34 | static int enable_refcnt; | |
35 | ||
b2476490 MT |
36 | static HLIST_HEAD(clk_root_list); |
37 | static HLIST_HEAD(clk_orphan_list); | |
38 | static LIST_HEAD(clk_notifier_list); | |
39 | ||
b09d6d99 MT |
40 | /*** private data structures ***/ |
41 | ||
42 | struct clk_core { | |
43 | const char *name; | |
44 | const struct clk_ops *ops; | |
45 | struct clk_hw *hw; | |
46 | struct module *owner; | |
47 | struct clk_core *parent; | |
48 | const char **parent_names; | |
49 | struct clk_core **parents; | |
50 | u8 num_parents; | |
51 | u8 new_parent_index; | |
52 | unsigned long rate; | |
1c8e6004 | 53 | unsigned long req_rate; |
b09d6d99 MT |
54 | unsigned long new_rate; |
55 | struct clk_core *new_parent; | |
56 | struct clk_core *new_child; | |
57 | unsigned long flags; | |
58 | unsigned int enable_count; | |
59 | unsigned int prepare_count; | |
60 | unsigned long accuracy; | |
61 | int phase; | |
62 | struct hlist_head children; | |
63 | struct hlist_node child_node; | |
64 | struct hlist_node debug_node; | |
1c8e6004 | 65 | struct hlist_head clks; |
b09d6d99 MT |
66 | unsigned int notifier_count; |
67 | #ifdef CONFIG_DEBUG_FS | |
68 | struct dentry *dentry; | |
69 | #endif | |
70 | struct kref ref; | |
71 | }; | |
72 | ||
dfc202ea SB |
73 | #define CREATE_TRACE_POINTS |
74 | #include <trace/events/clk.h> | |
75 | ||
b09d6d99 MT |
76 | struct clk { |
77 | struct clk_core *core; | |
78 | const char *dev_id; | |
79 | const char *con_id; | |
1c8e6004 TV |
80 | unsigned long min_rate; |
81 | unsigned long max_rate; | |
50595f8b | 82 | struct hlist_node clks_node; |
b09d6d99 MT |
83 | }; |
84 | ||
eab89f69 MT |
85 | /*** locking ***/ |
86 | static void clk_prepare_lock(void) | |
87 | { | |
533ddeb1 MT |
88 | if (!mutex_trylock(&prepare_lock)) { |
89 | if (prepare_owner == current) { | |
90 | prepare_refcnt++; | |
91 | return; | |
92 | } | |
93 | mutex_lock(&prepare_lock); | |
94 | } | |
95 | WARN_ON_ONCE(prepare_owner != NULL); | |
96 | WARN_ON_ONCE(prepare_refcnt != 0); | |
97 | prepare_owner = current; | |
98 | prepare_refcnt = 1; | |
eab89f69 MT |
99 | } |
100 | ||
101 | static void clk_prepare_unlock(void) | |
102 | { | |
533ddeb1 MT |
103 | WARN_ON_ONCE(prepare_owner != current); |
104 | WARN_ON_ONCE(prepare_refcnt == 0); | |
105 | ||
106 | if (--prepare_refcnt) | |
107 | return; | |
108 | prepare_owner = NULL; | |
eab89f69 MT |
109 | mutex_unlock(&prepare_lock); |
110 | } | |
111 | ||
112 | static unsigned long clk_enable_lock(void) | |
113 | { | |
114 | unsigned long flags; | |
533ddeb1 MT |
115 | |
116 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
117 | if (enable_owner == current) { | |
118 | enable_refcnt++; | |
119 | return flags; | |
120 | } | |
121 | spin_lock_irqsave(&enable_lock, flags); | |
122 | } | |
123 | WARN_ON_ONCE(enable_owner != NULL); | |
124 | WARN_ON_ONCE(enable_refcnt != 0); | |
125 | enable_owner = current; | |
126 | enable_refcnt = 1; | |
eab89f69 MT |
127 | return flags; |
128 | } | |
129 | ||
130 | static void clk_enable_unlock(unsigned long flags) | |
131 | { | |
533ddeb1 MT |
132 | WARN_ON_ONCE(enable_owner != current); |
133 | WARN_ON_ONCE(enable_refcnt == 0); | |
134 | ||
135 | if (--enable_refcnt) | |
136 | return; | |
137 | enable_owner = NULL; | |
eab89f69 MT |
138 | spin_unlock_irqrestore(&enable_lock, flags); |
139 | } | |
140 | ||
4dff95dc SB |
141 | static bool clk_core_is_prepared(struct clk_core *core) |
142 | { | |
143 | /* | |
144 | * .is_prepared is optional for clocks that can prepare | |
145 | * fall back to software usage counter if it is missing | |
146 | */ | |
147 | if (!core->ops->is_prepared) | |
148 | return core->prepare_count; | |
b2476490 | 149 | |
4dff95dc SB |
150 | return core->ops->is_prepared(core->hw); |
151 | } | |
b2476490 | 152 | |
4dff95dc SB |
153 | static bool clk_core_is_enabled(struct clk_core *core) |
154 | { | |
155 | /* | |
156 | * .is_enabled is only mandatory for clocks that gate | |
157 | * fall back to software usage counter if .is_enabled is missing | |
158 | */ | |
159 | if (!core->ops->is_enabled) | |
160 | return core->enable_count; | |
6b44c854 | 161 | |
4dff95dc SB |
162 | return core->ops->is_enabled(core->hw); |
163 | } | |
6b44c854 | 164 | |
4dff95dc | 165 | static void clk_unprepare_unused_subtree(struct clk_core *core) |
1af599df | 166 | { |
4dff95dc SB |
167 | struct clk_core *child; |
168 | ||
169 | lockdep_assert_held(&prepare_lock); | |
170 | ||
171 | hlist_for_each_entry(child, &core->children, child_node) | |
172 | clk_unprepare_unused_subtree(child); | |
173 | ||
174 | if (core->prepare_count) | |
1af599df PG |
175 | return; |
176 | ||
4dff95dc SB |
177 | if (core->flags & CLK_IGNORE_UNUSED) |
178 | return; | |
179 | ||
180 | if (clk_core_is_prepared(core)) { | |
181 | trace_clk_unprepare(core); | |
182 | if (core->ops->unprepare_unused) | |
183 | core->ops->unprepare_unused(core->hw); | |
184 | else if (core->ops->unprepare) | |
185 | core->ops->unprepare(core->hw); | |
186 | trace_clk_unprepare_complete(core); | |
187 | } | |
1af599df PG |
188 | } |
189 | ||
4dff95dc | 190 | static void clk_disable_unused_subtree(struct clk_core *core) |
1af599df | 191 | { |
035a61c3 | 192 | struct clk_core *child; |
4dff95dc | 193 | unsigned long flags; |
1af599df | 194 | |
4dff95dc | 195 | lockdep_assert_held(&prepare_lock); |
1af599df | 196 | |
4dff95dc SB |
197 | hlist_for_each_entry(child, &core->children, child_node) |
198 | clk_disable_unused_subtree(child); | |
1af599df | 199 | |
4dff95dc SB |
200 | flags = clk_enable_lock(); |
201 | ||
202 | if (core->enable_count) | |
203 | goto unlock_out; | |
204 | ||
205 | if (core->flags & CLK_IGNORE_UNUSED) | |
206 | goto unlock_out; | |
207 | ||
208 | /* | |
209 | * some gate clocks have special needs during the disable-unused | |
210 | * sequence. call .disable_unused if available, otherwise fall | |
211 | * back to .disable | |
212 | */ | |
213 | if (clk_core_is_enabled(core)) { | |
214 | trace_clk_disable(core); | |
215 | if (core->ops->disable_unused) | |
216 | core->ops->disable_unused(core->hw); | |
217 | else if (core->ops->disable) | |
218 | core->ops->disable(core->hw); | |
219 | trace_clk_disable_complete(core); | |
220 | } | |
221 | ||
222 | unlock_out: | |
223 | clk_enable_unlock(flags); | |
1af599df PG |
224 | } |
225 | ||
4dff95dc SB |
226 | static bool clk_ignore_unused; |
227 | static int __init clk_ignore_unused_setup(char *__unused) | |
1af599df | 228 | { |
4dff95dc SB |
229 | clk_ignore_unused = true; |
230 | return 1; | |
231 | } | |
232 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
1af599df | 233 | |
4dff95dc SB |
234 | static int clk_disable_unused(void) |
235 | { | |
236 | struct clk_core *core; | |
237 | ||
238 | if (clk_ignore_unused) { | |
239 | pr_warn("clk: Not disabling unused clocks\n"); | |
240 | return 0; | |
241 | } | |
1af599df | 242 | |
eab89f69 | 243 | clk_prepare_lock(); |
1af599df | 244 | |
4dff95dc SB |
245 | hlist_for_each_entry(core, &clk_root_list, child_node) |
246 | clk_disable_unused_subtree(core); | |
247 | ||
248 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
249 | clk_disable_unused_subtree(core); | |
250 | ||
251 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
252 | clk_unprepare_unused_subtree(core); | |
253 | ||
254 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
255 | clk_unprepare_unused_subtree(core); | |
1af599df | 256 | |
eab89f69 | 257 | clk_prepare_unlock(); |
1af599df PG |
258 | |
259 | return 0; | |
260 | } | |
4dff95dc | 261 | late_initcall_sync(clk_disable_unused); |
1af599df | 262 | |
4dff95dc | 263 | /*** helper functions ***/ |
1af599df | 264 | |
4dff95dc | 265 | const char *__clk_get_name(struct clk *clk) |
1af599df | 266 | { |
4dff95dc | 267 | return !clk ? NULL : clk->core->name; |
1af599df | 268 | } |
4dff95dc | 269 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 270 | |
4dff95dc SB |
271 | struct clk_hw *__clk_get_hw(struct clk *clk) |
272 | { | |
273 | return !clk ? NULL : clk->core->hw; | |
274 | } | |
275 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 276 | |
4dff95dc | 277 | u8 __clk_get_num_parents(struct clk *clk) |
bddca894 | 278 | { |
4dff95dc SB |
279 | return !clk ? 0 : clk->core->num_parents; |
280 | } | |
281 | EXPORT_SYMBOL_GPL(__clk_get_num_parents); | |
bddca894 | 282 | |
4dff95dc SB |
283 | struct clk *__clk_get_parent(struct clk *clk) |
284 | { | |
285 | if (!clk) | |
286 | return NULL; | |
287 | ||
288 | /* TODO: Create a per-user clk and change callers to call clk_put */ | |
289 | return !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
bddca894 | 290 | } |
4dff95dc | 291 | EXPORT_SYMBOL_GPL(__clk_get_parent); |
bddca894 | 292 | |
4dff95dc SB |
293 | static struct clk_core *__clk_lookup_subtree(const char *name, |
294 | struct clk_core *core) | |
bddca894 | 295 | { |
035a61c3 | 296 | struct clk_core *child; |
4dff95dc | 297 | struct clk_core *ret; |
bddca894 | 298 | |
4dff95dc SB |
299 | if (!strcmp(core->name, name)) |
300 | return core; | |
bddca894 | 301 | |
4dff95dc SB |
302 | hlist_for_each_entry(child, &core->children, child_node) { |
303 | ret = __clk_lookup_subtree(name, child); | |
304 | if (ret) | |
305 | return ret; | |
bddca894 PG |
306 | } |
307 | ||
4dff95dc | 308 | return NULL; |
bddca894 PG |
309 | } |
310 | ||
4dff95dc | 311 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 312 | { |
4dff95dc SB |
313 | struct clk_core *root_clk; |
314 | struct clk_core *ret; | |
bddca894 | 315 | |
4dff95dc SB |
316 | if (!name) |
317 | return NULL; | |
bddca894 | 318 | |
4dff95dc SB |
319 | /* search the 'proper' clk tree first */ |
320 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
321 | ret = __clk_lookup_subtree(name, root_clk); | |
322 | if (ret) | |
323 | return ret; | |
bddca894 PG |
324 | } |
325 | ||
4dff95dc SB |
326 | /* if not found, then search the orphan tree */ |
327 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
328 | ret = __clk_lookup_subtree(name, root_clk); | |
329 | if (ret) | |
330 | return ret; | |
331 | } | |
bddca894 | 332 | |
4dff95dc | 333 | return NULL; |
bddca894 PG |
334 | } |
335 | ||
4dff95dc SB |
336 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
337 | u8 index) | |
bddca894 | 338 | { |
4dff95dc SB |
339 | if (!core || index >= core->num_parents) |
340 | return NULL; | |
341 | else if (!core->parents) | |
342 | return clk_core_lookup(core->parent_names[index]); | |
343 | else if (!core->parents[index]) | |
344 | return core->parents[index] = | |
345 | clk_core_lookup(core->parent_names[index]); | |
346 | else | |
347 | return core->parents[index]; | |
bddca894 PG |
348 | } |
349 | ||
4dff95dc | 350 | struct clk *clk_get_parent_by_index(struct clk *clk, u8 index) |
b2476490 | 351 | { |
4dff95dc | 352 | struct clk_core *parent; |
b2476490 | 353 | |
4dff95dc SB |
354 | if (!clk) |
355 | return NULL; | |
b2476490 | 356 | |
4dff95dc | 357 | parent = clk_core_get_parent_by_index(clk->core, index); |
5279fc40 | 358 | |
4dff95dc SB |
359 | return !parent ? NULL : parent->hw->clk; |
360 | } | |
361 | EXPORT_SYMBOL_GPL(clk_get_parent_by_index); | |
e59c5371 | 362 | |
4dff95dc SB |
363 | unsigned int __clk_get_enable_count(struct clk *clk) |
364 | { | |
365 | return !clk ? 0 : clk->core->enable_count; | |
366 | } | |
b2476490 | 367 | |
4dff95dc SB |
368 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
369 | { | |
370 | unsigned long ret; | |
b2476490 | 371 | |
4dff95dc SB |
372 | if (!core) { |
373 | ret = 0; | |
374 | goto out; | |
375 | } | |
b2476490 | 376 | |
4dff95dc | 377 | ret = core->rate; |
b2476490 | 378 | |
4dff95dc SB |
379 | if (core->flags & CLK_IS_ROOT) |
380 | goto out; | |
c646cbf1 | 381 | |
4dff95dc SB |
382 | if (!core->parent) |
383 | ret = 0; | |
b2476490 | 384 | |
b2476490 MT |
385 | out: |
386 | return ret; | |
387 | } | |
388 | ||
4dff95dc | 389 | unsigned long __clk_get_rate(struct clk *clk) |
b2476490 | 390 | { |
4dff95dc SB |
391 | if (!clk) |
392 | return 0; | |
6314b679 | 393 | |
4dff95dc SB |
394 | return clk_core_get_rate_nolock(clk->core); |
395 | } | |
396 | EXPORT_SYMBOL_GPL(__clk_get_rate); | |
b2476490 | 397 | |
4dff95dc SB |
398 | static unsigned long __clk_get_accuracy(struct clk_core *core) |
399 | { | |
400 | if (!core) | |
401 | return 0; | |
b2476490 | 402 | |
4dff95dc | 403 | return core->accuracy; |
b2476490 MT |
404 | } |
405 | ||
4dff95dc | 406 | unsigned long __clk_get_flags(struct clk *clk) |
fcb0ee6a | 407 | { |
4dff95dc | 408 | return !clk ? 0 : clk->core->flags; |
fcb0ee6a | 409 | } |
4dff95dc | 410 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
fcb0ee6a | 411 | |
4dff95dc | 412 | bool __clk_is_prepared(struct clk *clk) |
fb2b3c9f | 413 | { |
4dff95dc SB |
414 | if (!clk) |
415 | return false; | |
fb2b3c9f | 416 | |
4dff95dc | 417 | return clk_core_is_prepared(clk->core); |
fb2b3c9f | 418 | } |
fb2b3c9f | 419 | |
4dff95dc | 420 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 421 | { |
4dff95dc SB |
422 | if (!clk) |
423 | return false; | |
b2476490 | 424 | |
4dff95dc SB |
425 | return clk_core_is_enabled(clk->core); |
426 | } | |
427 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 428 | |
4dff95dc SB |
429 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
430 | unsigned long best, unsigned long flags) | |
431 | { | |
432 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
433 | return abs(now - rate) < abs(best - rate); | |
1af599df | 434 | |
4dff95dc SB |
435 | return now <= rate && now > best; |
436 | } | |
bddca894 | 437 | |
4dff95dc SB |
438 | static long |
439 | clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate, | |
440 | unsigned long min_rate, | |
441 | unsigned long max_rate, | |
442 | unsigned long *best_parent_rate, | |
443 | struct clk_hw **best_parent_p, | |
444 | unsigned long flags) | |
445 | { | |
446 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
447 | int i, num_parents; | |
448 | unsigned long parent_rate, best = 0; | |
b2476490 | 449 | |
4dff95dc SB |
450 | /* if NO_REPARENT flag set, pass through to current parent */ |
451 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
452 | parent = core->parent; | |
453 | if (core->flags & CLK_SET_RATE_PARENT) | |
454 | best = __clk_determine_rate(parent ? parent->hw : NULL, | |
455 | rate, min_rate, max_rate); | |
456 | else if (parent) | |
457 | best = clk_core_get_rate_nolock(parent); | |
458 | else | |
459 | best = clk_core_get_rate_nolock(core); | |
460 | goto out; | |
461 | } | |
b2476490 | 462 | |
4dff95dc SB |
463 | /* find the parent that can provide the fastest rate <= rate */ |
464 | num_parents = core->num_parents; | |
465 | for (i = 0; i < num_parents; i++) { | |
466 | parent = clk_core_get_parent_by_index(core, i); | |
467 | if (!parent) | |
468 | continue; | |
469 | if (core->flags & CLK_SET_RATE_PARENT) | |
470 | parent_rate = __clk_determine_rate(parent->hw, rate, | |
471 | min_rate, | |
472 | max_rate); | |
473 | else | |
474 | parent_rate = clk_core_get_rate_nolock(parent); | |
475 | if (mux_is_better_rate(rate, parent_rate, best, flags)) { | |
476 | best_parent = parent; | |
477 | best = parent_rate; | |
478 | } | |
479 | } | |
b2476490 | 480 | |
4dff95dc SB |
481 | out: |
482 | if (best_parent) | |
483 | *best_parent_p = best_parent->hw; | |
484 | *best_parent_rate = best; | |
b2476490 | 485 | |
4dff95dc | 486 | return best; |
b33d212f | 487 | } |
4dff95dc SB |
488 | |
489 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 490 | { |
4dff95dc SB |
491 | struct clk_core *core = clk_core_lookup(name); |
492 | ||
493 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 494 | } |
b2476490 | 495 | |
4dff95dc SB |
496 | static void clk_core_get_boundaries(struct clk_core *core, |
497 | unsigned long *min_rate, | |
498 | unsigned long *max_rate) | |
1c155b3d | 499 | { |
4dff95dc | 500 | struct clk *clk_user; |
1c155b3d | 501 | |
4dff95dc SB |
502 | *min_rate = 0; |
503 | *max_rate = ULONG_MAX; | |
496eadf8 | 504 | |
4dff95dc SB |
505 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
506 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 507 | |
4dff95dc SB |
508 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
509 | *max_rate = min(*max_rate, clk_user->max_rate); | |
510 | } | |
1c155b3d | 511 | |
4dff95dc SB |
512 | /* |
513 | * Helper for finding best parent to provide a given frequency. This can be used | |
514 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
515 | * complex clock that may combine a mux with other operations. | |
516 | */ | |
517 | long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, | |
518 | unsigned long min_rate, | |
519 | unsigned long max_rate, | |
520 | unsigned long *best_parent_rate, | |
521 | struct clk_hw **best_parent_p) | |
522 | { | |
523 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, | |
524 | best_parent_rate, | |
525 | best_parent_p, 0); | |
1c155b3d | 526 | } |
4dff95dc | 527 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 528 | |
4dff95dc SB |
529 | long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate, |
530 | unsigned long min_rate, | |
531 | unsigned long max_rate, | |
532 | unsigned long *best_parent_rate, | |
533 | struct clk_hw **best_parent_p) | |
b2476490 | 534 | { |
4dff95dc SB |
535 | return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate, |
536 | best_parent_rate, | |
537 | best_parent_p, | |
538 | CLK_MUX_ROUND_CLOSEST); | |
539 | } | |
540 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 541 | |
4dff95dc | 542 | /*** clk api ***/ |
496eadf8 | 543 | |
4dff95dc SB |
544 | static void clk_core_unprepare(struct clk_core *core) |
545 | { | |
a6334725 SB |
546 | lockdep_assert_held(&prepare_lock); |
547 | ||
4dff95dc SB |
548 | if (!core) |
549 | return; | |
b2476490 | 550 | |
4dff95dc SB |
551 | if (WARN_ON(core->prepare_count == 0)) |
552 | return; | |
b2476490 | 553 | |
4dff95dc SB |
554 | if (--core->prepare_count > 0) |
555 | return; | |
b2476490 | 556 | |
4dff95dc | 557 | WARN_ON(core->enable_count > 0); |
b2476490 | 558 | |
4dff95dc | 559 | trace_clk_unprepare(core); |
b2476490 | 560 | |
4dff95dc SB |
561 | if (core->ops->unprepare) |
562 | core->ops->unprepare(core->hw); | |
563 | ||
564 | trace_clk_unprepare_complete(core); | |
565 | clk_core_unprepare(core->parent); | |
b2476490 MT |
566 | } |
567 | ||
4dff95dc SB |
568 | /** |
569 | * clk_unprepare - undo preparation of a clock source | |
570 | * @clk: the clk being unprepared | |
571 | * | |
572 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
573 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
574 | * if the operation may sleep. One example is a clk which is accessed over | |
575 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
576 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
577 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
578 | */ | |
579 | void clk_unprepare(struct clk *clk) | |
1e435256 | 580 | { |
4dff95dc SB |
581 | if (IS_ERR_OR_NULL(clk)) |
582 | return; | |
583 | ||
584 | clk_prepare_lock(); | |
585 | clk_core_unprepare(clk->core); | |
586 | clk_prepare_unlock(); | |
1e435256 | 587 | } |
4dff95dc | 588 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 589 | |
4dff95dc | 590 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 591 | { |
4dff95dc | 592 | int ret = 0; |
b2476490 | 593 | |
a6334725 SB |
594 | lockdep_assert_held(&prepare_lock); |
595 | ||
4dff95dc | 596 | if (!core) |
1e435256 | 597 | return 0; |
1e435256 | 598 | |
4dff95dc SB |
599 | if (core->prepare_count == 0) { |
600 | ret = clk_core_prepare(core->parent); | |
601 | if (ret) | |
602 | return ret; | |
b2476490 | 603 | |
4dff95dc | 604 | trace_clk_prepare(core); |
b2476490 | 605 | |
4dff95dc SB |
606 | if (core->ops->prepare) |
607 | ret = core->ops->prepare(core->hw); | |
b2476490 | 608 | |
4dff95dc | 609 | trace_clk_prepare_complete(core); |
1c155b3d | 610 | |
4dff95dc SB |
611 | if (ret) { |
612 | clk_core_unprepare(core->parent); | |
613 | return ret; | |
614 | } | |
615 | } | |
1c155b3d | 616 | |
4dff95dc | 617 | core->prepare_count++; |
b2476490 MT |
618 | |
619 | return 0; | |
620 | } | |
b2476490 | 621 | |
4dff95dc SB |
622 | /** |
623 | * clk_prepare - prepare a clock source | |
624 | * @clk: the clk being prepared | |
625 | * | |
626 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
627 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
628 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
629 | * the complex case a clk ungate operation may require a fast and a slow part. | |
630 | * It is this reason that clk_prepare and clk_enable are not mutually | |
631 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
632 | * Returns 0 on success, -EERROR otherwise. | |
633 | */ | |
634 | int clk_prepare(struct clk *clk) | |
b2476490 | 635 | { |
4dff95dc | 636 | int ret; |
b2476490 | 637 | |
4dff95dc SB |
638 | if (!clk) |
639 | return 0; | |
b2476490 | 640 | |
4dff95dc SB |
641 | clk_prepare_lock(); |
642 | ret = clk_core_prepare(clk->core); | |
643 | clk_prepare_unlock(); | |
644 | ||
645 | return ret; | |
b2476490 | 646 | } |
4dff95dc | 647 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 648 | |
4dff95dc | 649 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 650 | { |
a6334725 SB |
651 | lockdep_assert_held(&enable_lock); |
652 | ||
4dff95dc SB |
653 | if (!core) |
654 | return; | |
035a61c3 | 655 | |
4dff95dc SB |
656 | if (WARN_ON(core->enable_count == 0)) |
657 | return; | |
b2476490 | 658 | |
4dff95dc SB |
659 | if (--core->enable_count > 0) |
660 | return; | |
035a61c3 | 661 | |
4dff95dc | 662 | trace_clk_disable(core); |
035a61c3 | 663 | |
4dff95dc SB |
664 | if (core->ops->disable) |
665 | core->ops->disable(core->hw); | |
035a61c3 | 666 | |
4dff95dc | 667 | trace_clk_disable_complete(core); |
035a61c3 | 668 | |
4dff95dc | 669 | clk_core_disable(core->parent); |
035a61c3 | 670 | } |
7ef3dcc8 | 671 | |
4dff95dc SB |
672 | /** |
673 | * clk_disable - gate a clock | |
674 | * @clk: the clk being gated | |
675 | * | |
676 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
677 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
678 | * clk if the operation is fast and will never sleep. One example is a | |
679 | * SoC-internal clk which is controlled via simple register writes. In the | |
680 | * complex case a clk gate operation may require a fast and a slow part. It is | |
681 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
682 | * In fact clk_disable must be called before clk_unprepare. | |
683 | */ | |
684 | void clk_disable(struct clk *clk) | |
b2476490 | 685 | { |
4dff95dc SB |
686 | unsigned long flags; |
687 | ||
688 | if (IS_ERR_OR_NULL(clk)) | |
689 | return; | |
690 | ||
691 | flags = clk_enable_lock(); | |
692 | clk_core_disable(clk->core); | |
693 | clk_enable_unlock(flags); | |
b2476490 | 694 | } |
4dff95dc | 695 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 696 | |
4dff95dc | 697 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 698 | { |
4dff95dc | 699 | int ret = 0; |
b2476490 | 700 | |
a6334725 SB |
701 | lockdep_assert_held(&enable_lock); |
702 | ||
4dff95dc SB |
703 | if (!core) |
704 | return 0; | |
b2476490 | 705 | |
4dff95dc SB |
706 | if (WARN_ON(core->prepare_count == 0)) |
707 | return -ESHUTDOWN; | |
b2476490 | 708 | |
4dff95dc SB |
709 | if (core->enable_count == 0) { |
710 | ret = clk_core_enable(core->parent); | |
b2476490 | 711 | |
4dff95dc SB |
712 | if (ret) |
713 | return ret; | |
b2476490 | 714 | |
4dff95dc | 715 | trace_clk_enable(core); |
035a61c3 | 716 | |
4dff95dc SB |
717 | if (core->ops->enable) |
718 | ret = core->ops->enable(core->hw); | |
035a61c3 | 719 | |
4dff95dc SB |
720 | trace_clk_enable_complete(core); |
721 | ||
722 | if (ret) { | |
723 | clk_core_disable(core->parent); | |
724 | return ret; | |
725 | } | |
726 | } | |
727 | ||
728 | core->enable_count++; | |
729 | return 0; | |
035a61c3 | 730 | } |
b2476490 | 731 | |
4dff95dc SB |
732 | /** |
733 | * clk_enable - ungate a clock | |
734 | * @clk: the clk being ungated | |
735 | * | |
736 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
737 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
738 | * if the operation will never sleep. One example is a SoC-internal clk which | |
739 | * is controlled via simple register writes. In the complex case a clk ungate | |
740 | * operation may require a fast and a slow part. It is this reason that | |
741 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
742 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
743 | * otherwise. | |
744 | */ | |
745 | int clk_enable(struct clk *clk) | |
5279fc40 | 746 | { |
4dff95dc SB |
747 | unsigned long flags; |
748 | int ret; | |
749 | ||
750 | if (!clk) | |
5279fc40 BB |
751 | return 0; |
752 | ||
4dff95dc SB |
753 | flags = clk_enable_lock(); |
754 | ret = clk_core_enable(clk->core); | |
755 | clk_enable_unlock(flags); | |
5279fc40 | 756 | |
4dff95dc | 757 | return ret; |
b2476490 | 758 | } |
4dff95dc | 759 | EXPORT_SYMBOL_GPL(clk_enable); |
b2476490 | 760 | |
4dff95dc SB |
761 | static unsigned long clk_core_round_rate_nolock(struct clk_core *core, |
762 | unsigned long rate, | |
763 | unsigned long min_rate, | |
764 | unsigned long max_rate) | |
3d6ee287 | 765 | { |
4dff95dc SB |
766 | unsigned long parent_rate = 0; |
767 | struct clk_core *parent; | |
768 | struct clk_hw *parent_hw; | |
769 | ||
770 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 771 | |
d6968fca | 772 | if (!core) |
4dff95dc | 773 | return 0; |
3d6ee287 | 774 | |
4dff95dc SB |
775 | parent = core->parent; |
776 | if (parent) | |
777 | parent_rate = parent->rate; | |
3d6ee287 | 778 | |
4dff95dc SB |
779 | if (core->ops->determine_rate) { |
780 | parent_hw = parent ? parent->hw : NULL; | |
781 | return core->ops->determine_rate(core->hw, rate, | |
782 | min_rate, max_rate, | |
783 | &parent_rate, &parent_hw); | |
784 | } else if (core->ops->round_rate) | |
785 | return core->ops->round_rate(core->hw, rate, &parent_rate); | |
786 | else if (core->flags & CLK_SET_RATE_PARENT) | |
787 | return clk_core_round_rate_nolock(core->parent, rate, min_rate, | |
788 | max_rate); | |
789 | else | |
790 | return core->rate; | |
3d6ee287 UH |
791 | } |
792 | ||
4dff95dc SB |
793 | /** |
794 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
795 | * @hw: determine the rate of this clock | |
796 | * @rate: target rate | |
797 | * @min_rate: returned rate must be greater than this rate | |
798 | * @max_rate: returned rate must be less than this rate | |
799 | * | |
6e5ab41b | 800 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc SB |
801 | */ |
802 | unsigned long __clk_determine_rate(struct clk_hw *hw, | |
803 | unsigned long rate, | |
804 | unsigned long min_rate, | |
805 | unsigned long max_rate) | |
035a61c3 | 806 | { |
4dff95dc SB |
807 | if (!hw) |
808 | return 0; | |
035a61c3 | 809 | |
4dff95dc | 810 | return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate); |
035a61c3 | 811 | } |
4dff95dc | 812 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 813 | |
4dff95dc SB |
814 | /** |
815 | * __clk_round_rate - round the given rate for a clk | |
816 | * @clk: round the rate of this clock | |
817 | * @rate: the rate which is to be rounded | |
818 | * | |
6e5ab41b | 819 | * Useful for clk_ops such as .set_rate |
4dff95dc SB |
820 | */ |
821 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) | |
b2476490 | 822 | { |
4dff95dc SB |
823 | unsigned long min_rate; |
824 | unsigned long max_rate; | |
b2476490 | 825 | |
4dff95dc SB |
826 | if (!clk) |
827 | return 0; | |
b2476490 | 828 | |
4dff95dc | 829 | clk_core_get_boundaries(clk->core, &min_rate, &max_rate); |
b2476490 | 830 | |
4dff95dc | 831 | return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate); |
b2476490 | 832 | } |
4dff95dc | 833 | EXPORT_SYMBOL_GPL(__clk_round_rate); |
035a61c3 | 834 | |
4dff95dc SB |
835 | /** |
836 | * clk_round_rate - round the given rate for a clk | |
837 | * @clk: the clk for which we are rounding a rate | |
838 | * @rate: the rate which is to be rounded | |
839 | * | |
840 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
841 | * use which is then returned. If clk doesn't support round_rate operation | |
842 | * then the parent rate is returned. | |
843 | */ | |
844 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 845 | { |
4dff95dc SB |
846 | unsigned long ret; |
847 | ||
035a61c3 | 848 | if (!clk) |
4dff95dc | 849 | return 0; |
035a61c3 | 850 | |
4dff95dc SB |
851 | clk_prepare_lock(); |
852 | ret = __clk_round_rate(clk, rate); | |
853 | clk_prepare_unlock(); | |
854 | ||
855 | return ret; | |
035a61c3 | 856 | } |
4dff95dc | 857 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 858 | |
4dff95dc SB |
859 | /** |
860 | * __clk_notify - call clk notifier chain | |
861 | * @core: clk that is changing rate | |
862 | * @msg: clk notifier type (see include/linux/clk.h) | |
863 | * @old_rate: old clk rate | |
864 | * @new_rate: new clk rate | |
865 | * | |
866 | * Triggers a notifier call chain on the clk rate-change notification | |
867 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
868 | * and current rates to the notifier callback. Intended to be called by | |
869 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
870 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
871 | * a driver returns that. | |
872 | */ | |
873 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
874 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 875 | { |
4dff95dc SB |
876 | struct clk_notifier *cn; |
877 | struct clk_notifier_data cnd; | |
878 | int ret = NOTIFY_DONE; | |
b2476490 | 879 | |
4dff95dc SB |
880 | cnd.old_rate = old_rate; |
881 | cnd.new_rate = new_rate; | |
b2476490 | 882 | |
4dff95dc SB |
883 | list_for_each_entry(cn, &clk_notifier_list, node) { |
884 | if (cn->clk->core == core) { | |
885 | cnd.clk = cn->clk; | |
886 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
887 | &cnd); | |
888 | } | |
b2476490 MT |
889 | } |
890 | ||
4dff95dc | 891 | return ret; |
b2476490 MT |
892 | } |
893 | ||
4dff95dc SB |
894 | /** |
895 | * __clk_recalc_accuracies | |
896 | * @core: first clk in the subtree | |
897 | * | |
898 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
899 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 900 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 901 | * parent. |
4dff95dc SB |
902 | */ |
903 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 904 | { |
4dff95dc SB |
905 | unsigned long parent_accuracy = 0; |
906 | struct clk_core *child; | |
b2476490 | 907 | |
4dff95dc | 908 | lockdep_assert_held(&prepare_lock); |
b2476490 | 909 | |
4dff95dc SB |
910 | if (core->parent) |
911 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 912 | |
4dff95dc SB |
913 | if (core->ops->recalc_accuracy) |
914 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
915 | parent_accuracy); | |
916 | else | |
917 | core->accuracy = parent_accuracy; | |
b2476490 | 918 | |
4dff95dc SB |
919 | hlist_for_each_entry(child, &core->children, child_node) |
920 | __clk_recalc_accuracies(child); | |
b2476490 MT |
921 | } |
922 | ||
4dff95dc | 923 | static long clk_core_get_accuracy(struct clk_core *core) |
e366fdd7 | 924 | { |
4dff95dc | 925 | unsigned long accuracy; |
15a02c1f | 926 | |
4dff95dc SB |
927 | clk_prepare_lock(); |
928 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) | |
929 | __clk_recalc_accuracies(core); | |
15a02c1f | 930 | |
4dff95dc SB |
931 | accuracy = __clk_get_accuracy(core); |
932 | clk_prepare_unlock(); | |
e366fdd7 | 933 | |
4dff95dc | 934 | return accuracy; |
e366fdd7 | 935 | } |
15a02c1f | 936 | |
4dff95dc SB |
937 | /** |
938 | * clk_get_accuracy - return the accuracy of clk | |
939 | * @clk: the clk whose accuracy is being returned | |
940 | * | |
941 | * Simply returns the cached accuracy of the clk, unless | |
942 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
943 | * issued. | |
944 | * If clk is NULL then returns 0. | |
945 | */ | |
946 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 947 | { |
4dff95dc SB |
948 | if (!clk) |
949 | return 0; | |
035a61c3 | 950 | |
4dff95dc | 951 | return clk_core_get_accuracy(clk->core); |
035a61c3 | 952 | } |
4dff95dc | 953 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 954 | |
4dff95dc SB |
955 | static unsigned long clk_recalc(struct clk_core *core, |
956 | unsigned long parent_rate) | |
1c8e6004 | 957 | { |
4dff95dc SB |
958 | if (core->ops->recalc_rate) |
959 | return core->ops->recalc_rate(core->hw, parent_rate); | |
960 | return parent_rate; | |
1c8e6004 TV |
961 | } |
962 | ||
4dff95dc SB |
963 | /** |
964 | * __clk_recalc_rates | |
965 | * @core: first clk in the subtree | |
966 | * @msg: notification type (see include/linux/clk.h) | |
967 | * | |
968 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
969 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
970 | * it is assumed that the clock will take on the rate of its parent. | |
971 | * | |
972 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
973 | * if necessary. | |
15a02c1f | 974 | */ |
4dff95dc | 975 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 976 | { |
4dff95dc SB |
977 | unsigned long old_rate; |
978 | unsigned long parent_rate = 0; | |
979 | struct clk_core *child; | |
e366fdd7 | 980 | |
4dff95dc | 981 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 982 | |
4dff95dc | 983 | old_rate = core->rate; |
b2476490 | 984 | |
4dff95dc SB |
985 | if (core->parent) |
986 | parent_rate = core->parent->rate; | |
b2476490 | 987 | |
4dff95dc | 988 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 989 | |
4dff95dc SB |
990 | /* |
991 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
992 | * & ABORT_RATE_CHANGE notifiers | |
993 | */ | |
994 | if (core->notifier_count && msg) | |
995 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 996 | |
4dff95dc SB |
997 | hlist_for_each_entry(child, &core->children, child_node) |
998 | __clk_recalc_rates(child, msg); | |
999 | } | |
b2476490 | 1000 | |
4dff95dc SB |
1001 | static unsigned long clk_core_get_rate(struct clk_core *core) |
1002 | { | |
1003 | unsigned long rate; | |
dfc202ea | 1004 | |
4dff95dc | 1005 | clk_prepare_lock(); |
b2476490 | 1006 | |
4dff95dc SB |
1007 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1008 | __clk_recalc_rates(core, 0); | |
1009 | ||
1010 | rate = clk_core_get_rate_nolock(core); | |
1011 | clk_prepare_unlock(); | |
1012 | ||
1013 | return rate; | |
b2476490 MT |
1014 | } |
1015 | ||
1016 | /** | |
4dff95dc SB |
1017 | * clk_get_rate - return the rate of clk |
1018 | * @clk: the clk whose rate is being returned | |
b2476490 | 1019 | * |
4dff95dc SB |
1020 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1021 | * is set, which means a recalc_rate will be issued. | |
1022 | * If clk is NULL then returns 0. | |
b2476490 | 1023 | */ |
4dff95dc | 1024 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1025 | { |
4dff95dc SB |
1026 | if (!clk) |
1027 | return 0; | |
63589e92 | 1028 | |
4dff95dc | 1029 | return clk_core_get_rate(clk->core); |
b2476490 | 1030 | } |
4dff95dc | 1031 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1032 | |
4dff95dc SB |
1033 | static int clk_fetch_parent_index(struct clk_core *core, |
1034 | struct clk_core *parent) | |
b2476490 | 1035 | { |
4dff95dc | 1036 | int i; |
b2476490 | 1037 | |
4dff95dc SB |
1038 | if (!core->parents) { |
1039 | core->parents = kcalloc(core->num_parents, | |
1040 | sizeof(struct clk *), GFP_KERNEL); | |
1041 | if (!core->parents) | |
1042 | return -ENOMEM; | |
1043 | } | |
dfc202ea | 1044 | |
4dff95dc SB |
1045 | /* |
1046 | * find index of new parent clock using cached parent ptrs, | |
1047 | * or if not yet cached, use string name comparison and cache | |
1048 | * them now to avoid future calls to clk_core_lookup. | |
1049 | */ | |
1050 | for (i = 0; i < core->num_parents; i++) { | |
1051 | if (core->parents[i] == parent) | |
1052 | return i; | |
dfc202ea | 1053 | |
4dff95dc SB |
1054 | if (core->parents[i]) |
1055 | continue; | |
dfc202ea | 1056 | |
4dff95dc SB |
1057 | if (!strcmp(core->parent_names[i], parent->name)) { |
1058 | core->parents[i] = clk_core_lookup(parent->name); | |
1059 | return i; | |
b2476490 MT |
1060 | } |
1061 | } | |
1062 | ||
4dff95dc | 1063 | return -EINVAL; |
b2476490 MT |
1064 | } |
1065 | ||
4dff95dc | 1066 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1067 | { |
4dff95dc | 1068 | hlist_del(&core->child_node); |
035a61c3 | 1069 | |
4dff95dc SB |
1070 | if (new_parent) { |
1071 | /* avoid duplicate POST_RATE_CHANGE notifications */ | |
1072 | if (new_parent->new_child == core) | |
1073 | new_parent->new_child = NULL; | |
b2476490 | 1074 | |
4dff95dc SB |
1075 | hlist_add_head(&core->child_node, &new_parent->children); |
1076 | } else { | |
1077 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
1078 | } | |
dfc202ea | 1079 | |
4dff95dc | 1080 | core->parent = new_parent; |
035a61c3 TV |
1081 | } |
1082 | ||
4dff95dc SB |
1083 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1084 | struct clk_core *parent) | |
b2476490 MT |
1085 | { |
1086 | unsigned long flags; | |
4dff95dc | 1087 | struct clk_core *old_parent = core->parent; |
b2476490 | 1088 | |
4dff95dc SB |
1089 | /* |
1090 | * Migrate prepare state between parents and prevent race with | |
1091 | * clk_enable(). | |
1092 | * | |
1093 | * If the clock is not prepared, then a race with | |
1094 | * clk_enable/disable() is impossible since we already have the | |
1095 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1096 | * a clk_prepare()). | |
1097 | * | |
1098 | * If the clock is prepared, migrate the prepared state to the new | |
1099 | * parent and also protect against a race with clk_enable() by | |
1100 | * forcing the clock and the new parent on. This ensures that all | |
1101 | * future calls to clk_enable() are practically NOPs with respect to | |
1102 | * hardware and software states. | |
1103 | * | |
1104 | * See also: Comment for clk_set_parent() below. | |
1105 | */ | |
1106 | if (core->prepare_count) { | |
1107 | clk_core_prepare(parent); | |
d2a5d46b | 1108 | flags = clk_enable_lock(); |
4dff95dc SB |
1109 | clk_core_enable(parent); |
1110 | clk_core_enable(core); | |
d2a5d46b | 1111 | clk_enable_unlock(flags); |
4dff95dc | 1112 | } |
63589e92 | 1113 | |
4dff95dc | 1114 | /* update the clk tree topology */ |
eab89f69 | 1115 | flags = clk_enable_lock(); |
4dff95dc | 1116 | clk_reparent(core, parent); |
eab89f69 | 1117 | clk_enable_unlock(flags); |
4dff95dc SB |
1118 | |
1119 | return old_parent; | |
b2476490 | 1120 | } |
b2476490 | 1121 | |
4dff95dc SB |
1122 | static void __clk_set_parent_after(struct clk_core *core, |
1123 | struct clk_core *parent, | |
1124 | struct clk_core *old_parent) | |
b2476490 | 1125 | { |
d2a5d46b DA |
1126 | unsigned long flags; |
1127 | ||
4dff95dc SB |
1128 | /* |
1129 | * Finish the migration of prepare state and undo the changes done | |
1130 | * for preventing a race with clk_enable(). | |
1131 | */ | |
1132 | if (core->prepare_count) { | |
d2a5d46b | 1133 | flags = clk_enable_lock(); |
4dff95dc SB |
1134 | clk_core_disable(core); |
1135 | clk_core_disable(old_parent); | |
d2a5d46b | 1136 | clk_enable_unlock(flags); |
4dff95dc SB |
1137 | clk_core_unprepare(old_parent); |
1138 | } | |
1139 | } | |
b2476490 | 1140 | |
4dff95dc SB |
1141 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1142 | u8 p_index) | |
1143 | { | |
1144 | unsigned long flags; | |
1145 | int ret = 0; | |
1146 | struct clk_core *old_parent; | |
b2476490 | 1147 | |
4dff95dc | 1148 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1149 | |
4dff95dc | 1150 | trace_clk_set_parent(core, parent); |
b2476490 | 1151 | |
4dff95dc SB |
1152 | /* change clock input source */ |
1153 | if (parent && core->ops->set_parent) | |
1154 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1155 | |
4dff95dc | 1156 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1157 | |
4dff95dc SB |
1158 | if (ret) { |
1159 | flags = clk_enable_lock(); | |
1160 | clk_reparent(core, old_parent); | |
1161 | clk_enable_unlock(flags); | |
dfc202ea | 1162 | |
4dff95dc | 1163 | if (core->prepare_count) { |
d2a5d46b | 1164 | flags = clk_enable_lock(); |
4dff95dc SB |
1165 | clk_core_disable(core); |
1166 | clk_core_disable(parent); | |
d2a5d46b | 1167 | clk_enable_unlock(flags); |
4dff95dc | 1168 | clk_core_unprepare(parent); |
b2476490 | 1169 | } |
4dff95dc | 1170 | return ret; |
b2476490 MT |
1171 | } |
1172 | ||
4dff95dc SB |
1173 | __clk_set_parent_after(core, parent, old_parent); |
1174 | ||
b2476490 MT |
1175 | return 0; |
1176 | } | |
1177 | ||
1178 | /** | |
4dff95dc SB |
1179 | * __clk_speculate_rates |
1180 | * @core: first clk in the subtree | |
1181 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1182 | * |
4dff95dc SB |
1183 | * Walks the subtree of clks starting with clk, speculating rates as it |
1184 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1185 | * | |
1186 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1187 | * pre-rate change notifications and returns early if no clks in the | |
1188 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1189 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1190 | * take on the rate of its parent. | |
b2476490 | 1191 | */ |
4dff95dc SB |
1192 | static int __clk_speculate_rates(struct clk_core *core, |
1193 | unsigned long parent_rate) | |
b2476490 | 1194 | { |
4dff95dc SB |
1195 | struct clk_core *child; |
1196 | unsigned long new_rate; | |
1197 | int ret = NOTIFY_DONE; | |
b2476490 | 1198 | |
4dff95dc | 1199 | lockdep_assert_held(&prepare_lock); |
864e160a | 1200 | |
4dff95dc SB |
1201 | new_rate = clk_recalc(core, parent_rate); |
1202 | ||
1203 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1204 | if (core->notifier_count) | |
1205 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1206 | ||
1207 | if (ret & NOTIFY_STOP_MASK) { | |
1208 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1209 | __func__, core->name, ret); | |
1210 | goto out; | |
1211 | } | |
1212 | ||
1213 | hlist_for_each_entry(child, &core->children, child_node) { | |
1214 | ret = __clk_speculate_rates(child, new_rate); | |
1215 | if (ret & NOTIFY_STOP_MASK) | |
1216 | break; | |
1217 | } | |
b2476490 | 1218 | |
4dff95dc | 1219 | out: |
b2476490 MT |
1220 | return ret; |
1221 | } | |
b2476490 | 1222 | |
4dff95dc SB |
1223 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1224 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1225 | { |
4dff95dc | 1226 | struct clk_core *child; |
b2476490 | 1227 | |
4dff95dc SB |
1228 | core->new_rate = new_rate; |
1229 | core->new_parent = new_parent; | |
1230 | core->new_parent_index = p_index; | |
1231 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1232 | core->new_child = NULL; | |
1233 | if (new_parent && new_parent != core->parent) | |
1234 | new_parent->new_child = core; | |
496eadf8 | 1235 | |
4dff95dc SB |
1236 | hlist_for_each_entry(child, &core->children, child_node) { |
1237 | child->new_rate = clk_recalc(child, new_rate); | |
1238 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1239 | } | |
1240 | } | |
b2476490 | 1241 | |
4dff95dc SB |
1242 | /* |
1243 | * calculate the new rates returning the topmost clock that has to be | |
1244 | * changed. | |
1245 | */ | |
1246 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1247 | unsigned long rate) | |
1248 | { | |
1249 | struct clk_core *top = core; | |
1250 | struct clk_core *old_parent, *parent; | |
1251 | struct clk_hw *parent_hw; | |
1252 | unsigned long best_parent_rate = 0; | |
1253 | unsigned long new_rate; | |
1254 | unsigned long min_rate; | |
1255 | unsigned long max_rate; | |
1256 | int p_index = 0; | |
1257 | long ret; | |
1258 | ||
1259 | /* sanity */ | |
1260 | if (IS_ERR_OR_NULL(core)) | |
1261 | return NULL; | |
1262 | ||
1263 | /* save parent rate, if it exists */ | |
1264 | parent = old_parent = core->parent; | |
71472c0c | 1265 | if (parent) |
4dff95dc | 1266 | best_parent_rate = parent->rate; |
71472c0c | 1267 | |
4dff95dc SB |
1268 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1269 | ||
1270 | /* find the closest rate and parent clk/rate */ | |
d6968fca | 1271 | if (core->ops->determine_rate) { |
646cafc6 | 1272 | parent_hw = parent ? parent->hw : NULL; |
4dff95dc SB |
1273 | ret = core->ops->determine_rate(core->hw, rate, |
1274 | min_rate, | |
1275 | max_rate, | |
1276 | &best_parent_rate, | |
1277 | &parent_hw); | |
1278 | if (ret < 0) | |
1279 | return NULL; | |
1c8e6004 | 1280 | |
4dff95dc SB |
1281 | new_rate = ret; |
1282 | parent = parent_hw ? parent_hw->core : NULL; | |
1283 | } else if (core->ops->round_rate) { | |
1284 | ret = core->ops->round_rate(core->hw, rate, | |
1285 | &best_parent_rate); | |
1286 | if (ret < 0) | |
1287 | return NULL; | |
035a61c3 | 1288 | |
4dff95dc SB |
1289 | new_rate = ret; |
1290 | if (new_rate < min_rate || new_rate > max_rate) | |
1291 | return NULL; | |
1292 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1293 | /* pass-through clock without adjustable parent */ | |
1294 | core->new_rate = core->rate; | |
1295 | return NULL; | |
1296 | } else { | |
1297 | /* pass-through clock with adjustable parent */ | |
1298 | top = clk_calc_new_rates(parent, rate); | |
1299 | new_rate = parent->new_rate; | |
1300 | goto out; | |
1301 | } | |
1c8e6004 | 1302 | |
4dff95dc SB |
1303 | /* some clocks must be gated to change parent */ |
1304 | if (parent != old_parent && | |
1305 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1306 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1307 | __func__, core->name); | |
1308 | return NULL; | |
1309 | } | |
b2476490 | 1310 | |
4dff95dc SB |
1311 | /* try finding the new parent index */ |
1312 | if (parent && core->num_parents > 1) { | |
1313 | p_index = clk_fetch_parent_index(core, parent); | |
1314 | if (p_index < 0) { | |
1315 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1316 | __func__, parent->name, core->name); | |
1317 | return NULL; | |
1318 | } | |
1319 | } | |
b2476490 | 1320 | |
4dff95dc SB |
1321 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1322 | best_parent_rate != parent->rate) | |
1323 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1324 | |
4dff95dc SB |
1325 | out: |
1326 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1327 | |
4dff95dc | 1328 | return top; |
b2476490 | 1329 | } |
b2476490 | 1330 | |
4dff95dc SB |
1331 | /* |
1332 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1333 | * so that in case of an error we can walk down the whole tree again and | |
1334 | * abort the change. | |
b2476490 | 1335 | */ |
4dff95dc SB |
1336 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1337 | unsigned long event) | |
b2476490 | 1338 | { |
4dff95dc | 1339 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1340 | int ret = NOTIFY_DONE; |
1341 | ||
4dff95dc SB |
1342 | if (core->rate == core->new_rate) |
1343 | return NULL; | |
b2476490 | 1344 | |
4dff95dc SB |
1345 | if (core->notifier_count) { |
1346 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
1347 | if (ret & NOTIFY_STOP_MASK) | |
1348 | fail_clk = core; | |
b2476490 MT |
1349 | } |
1350 | ||
4dff95dc SB |
1351 | hlist_for_each_entry(child, &core->children, child_node) { |
1352 | /* Skip children who will be reparented to another clock */ | |
1353 | if (child->new_parent && child->new_parent != core) | |
1354 | continue; | |
1355 | tmp_clk = clk_propagate_rate_change(child, event); | |
1356 | if (tmp_clk) | |
1357 | fail_clk = tmp_clk; | |
1358 | } | |
5279fc40 | 1359 | |
4dff95dc SB |
1360 | /* handle the new child who might not be in core->children yet */ |
1361 | if (core->new_child) { | |
1362 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
1363 | if (tmp_clk) | |
1364 | fail_clk = tmp_clk; | |
1365 | } | |
5279fc40 | 1366 | |
4dff95dc | 1367 | return fail_clk; |
5279fc40 BB |
1368 | } |
1369 | ||
4dff95dc SB |
1370 | /* |
1371 | * walk down a subtree and set the new rates notifying the rate | |
1372 | * change on the way | |
1373 | */ | |
1374 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 1375 | { |
4dff95dc SB |
1376 | struct clk_core *child; |
1377 | struct hlist_node *tmp; | |
1378 | unsigned long old_rate; | |
1379 | unsigned long best_parent_rate = 0; | |
1380 | bool skip_set_rate = false; | |
1381 | struct clk_core *old_parent; | |
035a61c3 | 1382 | |
4dff95dc | 1383 | old_rate = core->rate; |
035a61c3 | 1384 | |
4dff95dc SB |
1385 | if (core->new_parent) |
1386 | best_parent_rate = core->new_parent->rate; | |
1387 | else if (core->parent) | |
1388 | best_parent_rate = core->parent->rate; | |
035a61c3 | 1389 | |
4dff95dc SB |
1390 | if (core->new_parent && core->new_parent != core->parent) { |
1391 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
1392 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 1393 | |
4dff95dc SB |
1394 | if (core->ops->set_rate_and_parent) { |
1395 | skip_set_rate = true; | |
1396 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
1397 | best_parent_rate, | |
1398 | core->new_parent_index); | |
1399 | } else if (core->ops->set_parent) { | |
1400 | core->ops->set_parent(core->hw, core->new_parent_index); | |
1401 | } | |
5279fc40 | 1402 | |
4dff95dc SB |
1403 | trace_clk_set_parent_complete(core, core->new_parent); |
1404 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
1405 | } | |
8f2c2db1 | 1406 | |
4dff95dc | 1407 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 1408 | |
4dff95dc SB |
1409 | if (!skip_set_rate && core->ops->set_rate) |
1410 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 1411 | |
4dff95dc | 1412 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 1413 | |
4dff95dc | 1414 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 1415 | |
4dff95dc SB |
1416 | if (core->notifier_count && old_rate != core->rate) |
1417 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 MT |
1418 | |
1419 | /* | |
4dff95dc SB |
1420 | * Use safe iteration, as change_rate can actually swap parents |
1421 | * for certain clock types. | |
b2476490 | 1422 | */ |
4dff95dc SB |
1423 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
1424 | /* Skip children who will be reparented to another clock */ | |
1425 | if (child->new_parent && child->new_parent != core) | |
1426 | continue; | |
1427 | clk_change_rate(child); | |
1428 | } | |
b2476490 | 1429 | |
4dff95dc SB |
1430 | /* handle the new child who might not be in core->children yet */ |
1431 | if (core->new_child) | |
1432 | clk_change_rate(core->new_child); | |
b2476490 MT |
1433 | } |
1434 | ||
4dff95dc SB |
1435 | static int clk_core_set_rate_nolock(struct clk_core *core, |
1436 | unsigned long req_rate) | |
a093bde2 | 1437 | { |
4dff95dc SB |
1438 | struct clk_core *top, *fail_clk; |
1439 | unsigned long rate = req_rate; | |
1440 | int ret = 0; | |
a093bde2 | 1441 | |
4dff95dc SB |
1442 | if (!core) |
1443 | return 0; | |
a093bde2 | 1444 | |
4dff95dc SB |
1445 | /* bail early if nothing to do */ |
1446 | if (rate == clk_core_get_rate_nolock(core)) | |
1447 | return 0; | |
a093bde2 | 1448 | |
4dff95dc SB |
1449 | if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count) |
1450 | return -EBUSY; | |
a093bde2 | 1451 | |
4dff95dc SB |
1452 | /* calculate new rates and get the topmost changed clock */ |
1453 | top = clk_calc_new_rates(core, rate); | |
1454 | if (!top) | |
1455 | return -EINVAL; | |
1456 | ||
1457 | /* notify that we are about to change rates */ | |
1458 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1459 | if (fail_clk) { | |
1460 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1461 | fail_clk->name); | |
1462 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1463 | return -EBUSY; | |
1464 | } | |
1465 | ||
1466 | /* change the rates */ | |
1467 | clk_change_rate(top); | |
1468 | ||
1469 | core->req_rate = req_rate; | |
1470 | ||
1471 | return ret; | |
a093bde2 | 1472 | } |
035a61c3 TV |
1473 | |
1474 | /** | |
4dff95dc SB |
1475 | * clk_set_rate - specify a new rate for clk |
1476 | * @clk: the clk whose rate is being changed | |
1477 | * @rate: the new rate for clk | |
035a61c3 | 1478 | * |
4dff95dc SB |
1479 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
1480 | * | |
1481 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
1482 | * propagate up to clk's parent; whether or not this happens depends on the | |
1483 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1484 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1485 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
1486 | * up to clk's parent and set its rate. Upward propagation will continue | |
1487 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
1488 | * .round_rate stops requesting changes to clk's parent_rate. | |
1489 | * | |
1490 | * Rate changes are accomplished via tree traversal that also recalculates the | |
1491 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
1492 | * | |
1493 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 1494 | */ |
4dff95dc | 1495 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 1496 | { |
4dff95dc SB |
1497 | int ret; |
1498 | ||
035a61c3 TV |
1499 | if (!clk) |
1500 | return 0; | |
1501 | ||
4dff95dc SB |
1502 | /* prevent racing with updates to the clock topology */ |
1503 | clk_prepare_lock(); | |
da0f0b2c | 1504 | |
4dff95dc | 1505 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 1506 | |
4dff95dc | 1507 | clk_prepare_unlock(); |
4935b22c | 1508 | |
4dff95dc | 1509 | return ret; |
4935b22c | 1510 | } |
4dff95dc | 1511 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 1512 | |
4dff95dc SB |
1513 | /** |
1514 | * clk_set_rate_range - set a rate range for a clock source | |
1515 | * @clk: clock source | |
1516 | * @min: desired minimum clock rate in Hz, inclusive | |
1517 | * @max: desired maximum clock rate in Hz, inclusive | |
1518 | * | |
1519 | * Returns success (0) or negative errno. | |
1520 | */ | |
1521 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 1522 | { |
4dff95dc | 1523 | int ret = 0; |
4935b22c | 1524 | |
4dff95dc SB |
1525 | if (!clk) |
1526 | return 0; | |
903efc55 | 1527 | |
4dff95dc SB |
1528 | if (min > max) { |
1529 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1530 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1531 | min, max); | |
1532 | return -EINVAL; | |
903efc55 | 1533 | } |
4935b22c | 1534 | |
4dff95dc | 1535 | clk_prepare_lock(); |
4935b22c | 1536 | |
4dff95dc SB |
1537 | if (min != clk->min_rate || max != clk->max_rate) { |
1538 | clk->min_rate = min; | |
1539 | clk->max_rate = max; | |
1540 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4935b22c JH |
1541 | } |
1542 | ||
4dff95dc | 1543 | clk_prepare_unlock(); |
4935b22c | 1544 | |
4dff95dc | 1545 | return ret; |
3fa2252b | 1546 | } |
4dff95dc | 1547 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 1548 | |
4dff95dc SB |
1549 | /** |
1550 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1551 | * @clk: clock source | |
1552 | * @rate: desired minimum clock rate in Hz, inclusive | |
1553 | * | |
1554 | * Returns success (0) or negative errno. | |
1555 | */ | |
1556 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1557 | { |
4dff95dc SB |
1558 | if (!clk) |
1559 | return 0; | |
1560 | ||
1561 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 1562 | } |
4dff95dc | 1563 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 1564 | |
4dff95dc SB |
1565 | /** |
1566 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1567 | * @clk: clock source | |
1568 | * @rate: desired maximum clock rate in Hz, inclusive | |
1569 | * | |
1570 | * Returns success (0) or negative errno. | |
1571 | */ | |
1572 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1573 | { |
4dff95dc SB |
1574 | if (!clk) |
1575 | return 0; | |
4935b22c | 1576 | |
4dff95dc | 1577 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 1578 | } |
4dff95dc | 1579 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 1580 | |
b2476490 | 1581 | /** |
4dff95dc SB |
1582 | * clk_get_parent - return the parent of a clk |
1583 | * @clk: the clk whose parent gets returned | |
b2476490 | 1584 | * |
4dff95dc | 1585 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 1586 | */ |
4dff95dc | 1587 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 1588 | { |
4dff95dc | 1589 | struct clk *parent; |
b2476490 | 1590 | |
4dff95dc SB |
1591 | clk_prepare_lock(); |
1592 | parent = __clk_get_parent(clk); | |
1593 | clk_prepare_unlock(); | |
496eadf8 | 1594 | |
4dff95dc SB |
1595 | return parent; |
1596 | } | |
1597 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 1598 | |
4dff95dc SB |
1599 | /* |
1600 | * .get_parent is mandatory for clocks with multiple possible parents. It is | |
1601 | * optional for single-parent clocks. Always call .get_parent if it is | |
1602 | * available and WARN if it is missing for multi-parent clocks. | |
1603 | * | |
1604 | * For single-parent clocks without .get_parent, first check to see if the | |
1605 | * .parents array exists, and if so use it to avoid an expensive tree | |
1606 | * traversal. If .parents does not exist then walk the tree. | |
1607 | */ | |
1608 | static struct clk_core *__clk_init_parent(struct clk_core *core) | |
1609 | { | |
1610 | struct clk_core *ret = NULL; | |
1611 | u8 index; | |
b2476490 | 1612 | |
4dff95dc SB |
1613 | /* handle the trivial cases */ |
1614 | ||
1615 | if (!core->num_parents) | |
b2476490 MT |
1616 | goto out; |
1617 | ||
4dff95dc SB |
1618 | if (core->num_parents == 1) { |
1619 | if (IS_ERR_OR_NULL(core->parent)) | |
1620 | core->parent = clk_core_lookup(core->parent_names[0]); | |
1621 | ret = core->parent; | |
1622 | goto out; | |
b2476490 MT |
1623 | } |
1624 | ||
4dff95dc SB |
1625 | if (!core->ops->get_parent) { |
1626 | WARN(!core->ops->get_parent, | |
1627 | "%s: multi-parent clocks must implement .get_parent\n", | |
1628 | __func__); | |
1629 | goto out; | |
1630 | }; | |
1631 | ||
1632 | /* | |
1633 | * Do our best to cache parent clocks in core->parents. This prevents | |
1634 | * unnecessary and expensive lookups. We don't set core->parent here; | |
1635 | * that is done by the calling function. | |
1636 | */ | |
1637 | ||
1638 | index = core->ops->get_parent(core->hw); | |
1639 | ||
1640 | if (!core->parents) | |
1641 | core->parents = | |
1642 | kcalloc(core->num_parents, sizeof(struct clk *), | |
1643 | GFP_KERNEL); | |
1644 | ||
1645 | ret = clk_core_get_parent_by_index(core, index); | |
1646 | ||
b2476490 MT |
1647 | out: |
1648 | return ret; | |
1649 | } | |
1650 | ||
4dff95dc SB |
1651 | static void clk_core_reparent(struct clk_core *core, |
1652 | struct clk_core *new_parent) | |
b2476490 | 1653 | { |
4dff95dc SB |
1654 | clk_reparent(core, new_parent); |
1655 | __clk_recalc_accuracies(core); | |
1656 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
1657 | } |
1658 | ||
4dff95dc SB |
1659 | /** |
1660 | * clk_has_parent - check if a clock is a possible parent for another | |
1661 | * @clk: clock source | |
1662 | * @parent: parent clock source | |
1663 | * | |
1664 | * This function can be used in drivers that need to check that a clock can be | |
1665 | * the parent of another without actually changing the parent. | |
1666 | * | |
1667 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 1668 | */ |
4dff95dc | 1669 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 1670 | { |
4dff95dc SB |
1671 | struct clk_core *core, *parent_core; |
1672 | unsigned int i; | |
b2476490 | 1673 | |
4dff95dc SB |
1674 | /* NULL clocks should be nops, so return success if either is NULL. */ |
1675 | if (!clk || !parent) | |
1676 | return true; | |
7452b219 | 1677 | |
4dff95dc SB |
1678 | core = clk->core; |
1679 | parent_core = parent->core; | |
71472c0c | 1680 | |
4dff95dc SB |
1681 | /* Optimize for the case where the parent is already the parent. */ |
1682 | if (core->parent == parent_core) | |
1683 | return true; | |
1c8e6004 | 1684 | |
4dff95dc SB |
1685 | for (i = 0; i < core->num_parents; i++) |
1686 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
1687 | return true; | |
03bc10ab | 1688 | |
4dff95dc SB |
1689 | return false; |
1690 | } | |
1691 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 1692 | |
4dff95dc SB |
1693 | static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent) |
1694 | { | |
1695 | int ret = 0; | |
1696 | int p_index = 0; | |
1697 | unsigned long p_rate = 0; | |
1698 | ||
1699 | if (!core) | |
1700 | return 0; | |
1701 | ||
1702 | /* prevent racing with updates to the clock topology */ | |
1703 | clk_prepare_lock(); | |
1704 | ||
1705 | if (core->parent == parent) | |
1706 | goto out; | |
1707 | ||
1708 | /* verify ops for for multi-parent clks */ | |
1709 | if ((core->num_parents > 1) && (!core->ops->set_parent)) { | |
1710 | ret = -ENOSYS; | |
63f5c3b2 | 1711 | goto out; |
7452b219 MT |
1712 | } |
1713 | ||
4dff95dc SB |
1714 | /* check that we are allowed to re-parent if the clock is in use */ |
1715 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1716 | ret = -EBUSY; | |
1717 | goto out; | |
b2476490 MT |
1718 | } |
1719 | ||
71472c0c | 1720 | /* try finding the new parent index */ |
4dff95dc | 1721 | if (parent) { |
d6968fca | 1722 | p_index = clk_fetch_parent_index(core, parent); |
4dff95dc | 1723 | p_rate = parent->rate; |
f1c8b2ed | 1724 | if (p_index < 0) { |
71472c0c | 1725 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc SB |
1726 | __func__, parent->name, core->name); |
1727 | ret = p_index; | |
1728 | goto out; | |
71472c0c | 1729 | } |
b2476490 MT |
1730 | } |
1731 | ||
4dff95dc SB |
1732 | /* propagate PRE_RATE_CHANGE notifications */ |
1733 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 1734 | |
4dff95dc SB |
1735 | /* abort if a driver objects */ |
1736 | if (ret & NOTIFY_STOP_MASK) | |
1737 | goto out; | |
b2476490 | 1738 | |
4dff95dc SB |
1739 | /* do the re-parent */ |
1740 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 1741 | |
4dff95dc SB |
1742 | /* propagate rate an accuracy recalculation accordingly */ |
1743 | if (ret) { | |
1744 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
1745 | } else { | |
1746 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
1747 | __clk_recalc_accuracies(core); | |
b2476490 MT |
1748 | } |
1749 | ||
4dff95dc SB |
1750 | out: |
1751 | clk_prepare_unlock(); | |
71472c0c | 1752 | |
4dff95dc SB |
1753 | return ret; |
1754 | } | |
b2476490 | 1755 | |
4dff95dc SB |
1756 | /** |
1757 | * clk_set_parent - switch the parent of a mux clk | |
1758 | * @clk: the mux clk whose input we are switching | |
1759 | * @parent: the new input to clk | |
1760 | * | |
1761 | * Re-parent clk to use parent as its new input source. If clk is in | |
1762 | * prepared state, the clk will get enabled for the duration of this call. If | |
1763 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
1764 | * that, the reparenting is glitchy in hardware, etc), use the | |
1765 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
1766 | * | |
1767 | * After successfully changing clk's parent clk_set_parent will update the | |
1768 | * clk topology, sysfs topology and propagate rate recalculation via | |
1769 | * __clk_recalc_rates. | |
1770 | * | |
1771 | * Returns 0 on success, -EERROR otherwise. | |
1772 | */ | |
1773 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
1774 | { | |
1775 | if (!clk) | |
1776 | return 0; | |
1777 | ||
1778 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
b2476490 | 1779 | } |
4dff95dc | 1780 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 1781 | |
4dff95dc SB |
1782 | /** |
1783 | * clk_set_phase - adjust the phase shift of a clock signal | |
1784 | * @clk: clock signal source | |
1785 | * @degrees: number of degrees the signal is shifted | |
1786 | * | |
1787 | * Shifts the phase of a clock signal by the specified | |
1788 | * degrees. Returns 0 on success, -EERROR otherwise. | |
1789 | * | |
1790 | * This function makes no distinction about the input or reference | |
1791 | * signal that we adjust the clock signal phase against. For example | |
1792 | * phase locked-loop clock signal generators we may shift phase with | |
1793 | * respect to feedback clock signal input, but for other cases the | |
1794 | * clock phase may be shifted with respect to some other, unspecified | |
1795 | * signal. | |
1796 | * | |
1797 | * Additionally the concept of phase shift does not propagate through | |
1798 | * the clock tree hierarchy, which sets it apart from clock rates and | |
1799 | * clock accuracy. A parent clock phase attribute does not have an | |
1800 | * impact on the phase attribute of a child clock. | |
b2476490 | 1801 | */ |
4dff95dc | 1802 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 1803 | { |
4dff95dc | 1804 | int ret = -EINVAL; |
b2476490 | 1805 | |
4dff95dc SB |
1806 | if (!clk) |
1807 | return 0; | |
b2476490 | 1808 | |
4dff95dc SB |
1809 | /* sanity check degrees */ |
1810 | degrees %= 360; | |
1811 | if (degrees < 0) | |
1812 | degrees += 360; | |
bf47b4fd | 1813 | |
4dff95dc | 1814 | clk_prepare_lock(); |
3fa2252b | 1815 | |
4dff95dc | 1816 | trace_clk_set_phase(clk->core, degrees); |
3fa2252b | 1817 | |
4dff95dc SB |
1818 | if (clk->core->ops->set_phase) |
1819 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
3fa2252b | 1820 | |
4dff95dc | 1821 | trace_clk_set_phase_complete(clk->core, degrees); |
dfc202ea | 1822 | |
4dff95dc SB |
1823 | if (!ret) |
1824 | clk->core->phase = degrees; | |
b2476490 | 1825 | |
4dff95dc | 1826 | clk_prepare_unlock(); |
dfc202ea | 1827 | |
4dff95dc SB |
1828 | return ret; |
1829 | } | |
1830 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 1831 | |
4dff95dc SB |
1832 | static int clk_core_get_phase(struct clk_core *core) |
1833 | { | |
1834 | int ret; | |
b2476490 | 1835 | |
4dff95dc SB |
1836 | clk_prepare_lock(); |
1837 | ret = core->phase; | |
1838 | clk_prepare_unlock(); | |
71472c0c | 1839 | |
4dff95dc | 1840 | return ret; |
b2476490 MT |
1841 | } |
1842 | ||
4dff95dc SB |
1843 | /** |
1844 | * clk_get_phase - return the phase shift of a clock signal | |
1845 | * @clk: clock signal source | |
1846 | * | |
1847 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
1848 | * -EERROR. | |
1849 | */ | |
1850 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 1851 | { |
4dff95dc | 1852 | if (!clk) |
1c8e6004 TV |
1853 | return 0; |
1854 | ||
4dff95dc SB |
1855 | return clk_core_get_phase(clk->core); |
1856 | } | |
1857 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 1858 | |
4dff95dc SB |
1859 | /** |
1860 | * clk_is_match - check if two clk's point to the same hardware clock | |
1861 | * @p: clk compared against q | |
1862 | * @q: clk compared against p | |
1863 | * | |
1864 | * Returns true if the two struct clk pointers both point to the same hardware | |
1865 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
1866 | * share the same struct clk_core object. | |
1867 | * | |
1868 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
1869 | */ | |
1870 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
1871 | { | |
1872 | /* trivial case: identical struct clk's or both NULL */ | |
1873 | if (p == q) | |
1874 | return true; | |
1c8e6004 | 1875 | |
4dff95dc SB |
1876 | /* true if clk->core pointers match. Avoid derefing garbage */ |
1877 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) | |
1878 | if (p->core == q->core) | |
1879 | return true; | |
1c8e6004 | 1880 | |
4dff95dc SB |
1881 | return false; |
1882 | } | |
1883 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 1884 | |
4dff95dc | 1885 | /*** debugfs support ***/ |
1c8e6004 | 1886 | |
4dff95dc SB |
1887 | #ifdef CONFIG_DEBUG_FS |
1888 | #include <linux/debugfs.h> | |
1c8e6004 | 1889 | |
4dff95dc SB |
1890 | static struct dentry *rootdir; |
1891 | static int inited = 0; | |
1892 | static DEFINE_MUTEX(clk_debug_lock); | |
1893 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 1894 | |
4dff95dc SB |
1895 | static struct hlist_head *all_lists[] = { |
1896 | &clk_root_list, | |
1897 | &clk_orphan_list, | |
1898 | NULL, | |
1899 | }; | |
1900 | ||
1901 | static struct hlist_head *orphan_list[] = { | |
1902 | &clk_orphan_list, | |
1903 | NULL, | |
1904 | }; | |
1905 | ||
1906 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
1907 | int level) | |
b2476490 | 1908 | { |
4dff95dc SB |
1909 | if (!c) |
1910 | return; | |
b2476490 | 1911 | |
4dff95dc SB |
1912 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1913 | level * 3 + 1, "", | |
1914 | 30 - level * 3, c->name, | |
1915 | c->enable_count, c->prepare_count, clk_core_get_rate(c), | |
1916 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1917 | } | |
89ac8d7a | 1918 | |
4dff95dc SB |
1919 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1920 | int level) | |
1921 | { | |
1922 | struct clk_core *child; | |
b2476490 | 1923 | |
4dff95dc SB |
1924 | if (!c) |
1925 | return; | |
b2476490 | 1926 | |
4dff95dc | 1927 | clk_summary_show_one(s, c, level); |
0e1c0301 | 1928 | |
4dff95dc SB |
1929 | hlist_for_each_entry(child, &c->children, child_node) |
1930 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 1931 | } |
b2476490 | 1932 | |
4dff95dc | 1933 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 1934 | { |
4dff95dc SB |
1935 | struct clk_core *c; |
1936 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 1937 | |
4dff95dc SB |
1938 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
1939 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
b2476490 | 1940 | |
1c8e6004 TV |
1941 | clk_prepare_lock(); |
1942 | ||
4dff95dc SB |
1943 | for (; *lists; lists++) |
1944 | hlist_for_each_entry(c, *lists, child_node) | |
1945 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 1946 | |
eab89f69 | 1947 | clk_prepare_unlock(); |
b2476490 | 1948 | |
4dff95dc | 1949 | return 0; |
b2476490 | 1950 | } |
1c8e6004 | 1951 | |
1c8e6004 | 1952 | |
4dff95dc | 1953 | static int clk_summary_open(struct inode *inode, struct file *file) |
1c8e6004 | 1954 | { |
4dff95dc | 1955 | return single_open(file, clk_summary_show, inode->i_private); |
1c8e6004 | 1956 | } |
b2476490 | 1957 | |
4dff95dc SB |
1958 | static const struct file_operations clk_summary_fops = { |
1959 | .open = clk_summary_open, | |
1960 | .read = seq_read, | |
1961 | .llseek = seq_lseek, | |
1962 | .release = single_release, | |
1963 | }; | |
b2476490 | 1964 | |
4dff95dc SB |
1965 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
1966 | { | |
1967 | if (!c) | |
1968 | return; | |
b2476490 | 1969 | |
7cb81136 | 1970 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
1971 | seq_printf(s, "\"%s\": { ", c->name); |
1972 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
1973 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
7cb81136 SW |
1974 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); |
1975 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); | |
4dff95dc | 1976 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); |
b2476490 | 1977 | } |
b2476490 | 1978 | |
4dff95dc | 1979 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 1980 | { |
4dff95dc | 1981 | struct clk_core *child; |
b2476490 | 1982 | |
4dff95dc SB |
1983 | if (!c) |
1984 | return; | |
b2476490 | 1985 | |
4dff95dc | 1986 | clk_dump_one(s, c, level); |
b2476490 | 1987 | |
4dff95dc SB |
1988 | hlist_for_each_entry(child, &c->children, child_node) { |
1989 | seq_printf(s, ","); | |
1990 | clk_dump_subtree(s, child, level + 1); | |
b2476490 MT |
1991 | } |
1992 | ||
4dff95dc | 1993 | seq_printf(s, "}"); |
b2476490 MT |
1994 | } |
1995 | ||
4dff95dc | 1996 | static int clk_dump(struct seq_file *s, void *data) |
4e88f3de | 1997 | { |
4dff95dc SB |
1998 | struct clk_core *c; |
1999 | bool first_node = true; | |
2000 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 2001 | |
4dff95dc | 2002 | seq_printf(s, "{"); |
4e88f3de | 2003 | |
4dff95dc | 2004 | clk_prepare_lock(); |
035a61c3 | 2005 | |
4dff95dc SB |
2006 | for (; *lists; lists++) { |
2007 | hlist_for_each_entry(c, *lists, child_node) { | |
2008 | if (!first_node) | |
2009 | seq_puts(s, ","); | |
2010 | first_node = false; | |
2011 | clk_dump_subtree(s, c, 0); | |
2012 | } | |
2013 | } | |
4e88f3de | 2014 | |
4dff95dc | 2015 | clk_prepare_unlock(); |
4e88f3de | 2016 | |
70e9f4dd | 2017 | seq_puts(s, "}\n"); |
4dff95dc | 2018 | return 0; |
4e88f3de | 2019 | } |
4e88f3de | 2020 | |
4dff95dc SB |
2021 | |
2022 | static int clk_dump_open(struct inode *inode, struct file *file) | |
b2476490 | 2023 | { |
4dff95dc SB |
2024 | return single_open(file, clk_dump, inode->i_private); |
2025 | } | |
b2476490 | 2026 | |
4dff95dc SB |
2027 | static const struct file_operations clk_dump_fops = { |
2028 | .open = clk_dump_open, | |
2029 | .read = seq_read, | |
2030 | .llseek = seq_lseek, | |
2031 | .release = single_release, | |
2032 | }; | |
89ac8d7a | 2033 | |
4dff95dc SB |
2034 | static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
2035 | { | |
2036 | struct dentry *d; | |
2037 | int ret = -ENOMEM; | |
b2476490 | 2038 | |
4dff95dc SB |
2039 | if (!core || !pdentry) { |
2040 | ret = -EINVAL; | |
b2476490 | 2041 | goto out; |
4dff95dc | 2042 | } |
b2476490 | 2043 | |
4dff95dc SB |
2044 | d = debugfs_create_dir(core->name, pdentry); |
2045 | if (!d) | |
b61c43c0 | 2046 | goto out; |
b61c43c0 | 2047 | |
4dff95dc SB |
2048 | core->dentry = d; |
2049 | ||
2050 | d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry, | |
2051 | (u32 *)&core->rate); | |
2052 | if (!d) | |
2053 | goto err_out; | |
2054 | ||
2055 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry, | |
2056 | (u32 *)&core->accuracy); | |
2057 | if (!d) | |
2058 | goto err_out; | |
2059 | ||
2060 | d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, | |
2061 | (u32 *)&core->phase); | |
2062 | if (!d) | |
2063 | goto err_out; | |
031dcc9b | 2064 | |
4dff95dc SB |
2065 | d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry, |
2066 | (u32 *)&core->flags); | |
2067 | if (!d) | |
2068 | goto err_out; | |
031dcc9b | 2069 | |
4dff95dc SB |
2070 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry, |
2071 | (u32 *)&core->prepare_count); | |
2072 | if (!d) | |
2073 | goto err_out; | |
b2476490 | 2074 | |
4dff95dc SB |
2075 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry, |
2076 | (u32 *)&core->enable_count); | |
2077 | if (!d) | |
2078 | goto err_out; | |
b2476490 | 2079 | |
4dff95dc SB |
2080 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry, |
2081 | (u32 *)&core->notifier_count); | |
2082 | if (!d) | |
2083 | goto err_out; | |
b2476490 | 2084 | |
4dff95dc SB |
2085 | if (core->ops->debug_init) { |
2086 | ret = core->ops->debug_init(core->hw, core->dentry); | |
2087 | if (ret) | |
2088 | goto err_out; | |
5279fc40 | 2089 | } |
b2476490 | 2090 | |
4dff95dc SB |
2091 | ret = 0; |
2092 | goto out; | |
b2476490 | 2093 | |
4dff95dc SB |
2094 | err_out: |
2095 | debugfs_remove_recursive(core->dentry); | |
2096 | core->dentry = NULL; | |
2097 | out: | |
b2476490 MT |
2098 | return ret; |
2099 | } | |
035a61c3 TV |
2100 | |
2101 | /** | |
6e5ab41b SB |
2102 | * clk_debug_register - add a clk node to the debugfs clk directory |
2103 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 2104 | * |
6e5ab41b SB |
2105 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
2106 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 2107 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 2108 | */ |
4dff95dc | 2109 | static int clk_debug_register(struct clk_core *core) |
035a61c3 | 2110 | { |
4dff95dc | 2111 | int ret = 0; |
035a61c3 | 2112 | |
4dff95dc SB |
2113 | mutex_lock(&clk_debug_lock); |
2114 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
2115 | ||
2116 | if (!inited) | |
2117 | goto unlock; | |
2118 | ||
2119 | ret = clk_debug_create_one(core, rootdir); | |
2120 | unlock: | |
2121 | mutex_unlock(&clk_debug_lock); | |
2122 | ||
2123 | return ret; | |
035a61c3 | 2124 | } |
b2476490 | 2125 | |
4dff95dc | 2126 | /** |
6e5ab41b SB |
2127 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
2128 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 2129 | * |
6e5ab41b SB |
2130 | * Dynamically removes a clk and all its child nodes from the |
2131 | * debugfs clk directory if clk->dentry points to debugfs created by | |
4dff95dc | 2132 | * clk_debug_register in __clk_init. |
e59c5371 | 2133 | */ |
4dff95dc | 2134 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 2135 | { |
4dff95dc SB |
2136 | mutex_lock(&clk_debug_lock); |
2137 | hlist_del_init(&core->debug_node); | |
2138 | debugfs_remove_recursive(core->dentry); | |
2139 | core->dentry = NULL; | |
2140 | mutex_unlock(&clk_debug_lock); | |
2141 | } | |
e59c5371 | 2142 | |
4dff95dc SB |
2143 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
2144 | void *data, const struct file_operations *fops) | |
2145 | { | |
2146 | struct dentry *d = NULL; | |
e59c5371 | 2147 | |
4dff95dc SB |
2148 | if (hw->core->dentry) |
2149 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
2150 | fops); | |
e59c5371 | 2151 | |
4dff95dc SB |
2152 | return d; |
2153 | } | |
2154 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
e59c5371 | 2155 | |
4dff95dc | 2156 | /** |
6e5ab41b | 2157 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 2158 | * |
6e5ab41b SB |
2159 | * clks are often initialized very early during boot before memory can be |
2160 | * dynamically allocated and well before debugfs is setup. This function | |
2161 | * populates the debugfs clk directory once at boot-time when we know that | |
2162 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
2163 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
2164 | */ |
2165 | static int __init clk_debug_init(void) | |
2166 | { | |
2167 | struct clk_core *core; | |
2168 | struct dentry *d; | |
dfc202ea | 2169 | |
4dff95dc | 2170 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 2171 | |
4dff95dc SB |
2172 | if (!rootdir) |
2173 | return -ENOMEM; | |
dfc202ea | 2174 | |
4dff95dc SB |
2175 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
2176 | &clk_summary_fops); | |
2177 | if (!d) | |
2178 | return -ENOMEM; | |
e59c5371 | 2179 | |
4dff95dc SB |
2180 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
2181 | &clk_dump_fops); | |
2182 | if (!d) | |
2183 | return -ENOMEM; | |
e59c5371 | 2184 | |
4dff95dc SB |
2185 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
2186 | &orphan_list, &clk_summary_fops); | |
2187 | if (!d) | |
2188 | return -ENOMEM; | |
e59c5371 | 2189 | |
4dff95dc SB |
2190 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
2191 | &orphan_list, &clk_dump_fops); | |
2192 | if (!d) | |
2193 | return -ENOMEM; | |
e59c5371 | 2194 | |
4dff95dc SB |
2195 | mutex_lock(&clk_debug_lock); |
2196 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
2197 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 2198 | |
4dff95dc SB |
2199 | inited = 1; |
2200 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 2201 | |
4dff95dc SB |
2202 | return 0; |
2203 | } | |
2204 | late_initcall(clk_debug_init); | |
2205 | #else | |
2206 | static inline int clk_debug_register(struct clk_core *core) { return 0; } | |
2207 | static inline void clk_debug_reparent(struct clk_core *core, | |
2208 | struct clk_core *new_parent) | |
035a61c3 | 2209 | { |
035a61c3 | 2210 | } |
4dff95dc | 2211 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 2212 | { |
3d3801ef | 2213 | } |
4dff95dc | 2214 | #endif |
3d3801ef | 2215 | |
b2476490 MT |
2216 | /** |
2217 | * __clk_init - initialize the data structures in a struct clk | |
2218 | * @dev: device initializing this clk, placeholder for now | |
2219 | * @clk: clk being initialized | |
2220 | * | |
035a61c3 | 2221 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2222 | * parent and rate and sets them both. |
b2476490 | 2223 | */ |
b09d6d99 | 2224 | static int __clk_init(struct device *dev, struct clk *clk_user) |
b2476490 | 2225 | { |
d1302a36 | 2226 | int i, ret = 0; |
035a61c3 | 2227 | struct clk_core *orphan; |
b67bfe0d | 2228 | struct hlist_node *tmp2; |
d6968fca | 2229 | struct clk_core *core; |
1c8e6004 | 2230 | unsigned long rate; |
b2476490 | 2231 | |
035a61c3 | 2232 | if (!clk_user) |
d1302a36 | 2233 | return -EINVAL; |
b2476490 | 2234 | |
d6968fca | 2235 | core = clk_user->core; |
035a61c3 | 2236 | |
eab89f69 | 2237 | clk_prepare_lock(); |
b2476490 MT |
2238 | |
2239 | /* check to see if a clock with this name is already registered */ | |
d6968fca | 2240 | if (clk_core_lookup(core->name)) { |
d1302a36 | 2241 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 2242 | __func__, core->name); |
d1302a36 | 2243 | ret = -EEXIST; |
b2476490 | 2244 | goto out; |
d1302a36 | 2245 | } |
b2476490 | 2246 | |
d4d7e3dd | 2247 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
d6968fca SB |
2248 | if (core->ops->set_rate && |
2249 | !((core->ops->round_rate || core->ops->determine_rate) && | |
2250 | core->ops->recalc_rate)) { | |
71472c0c | 2251 | pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
d6968fca | 2252 | __func__, core->name); |
d1302a36 | 2253 | ret = -EINVAL; |
d4d7e3dd MT |
2254 | goto out; |
2255 | } | |
2256 | ||
d6968fca | 2257 | if (core->ops->set_parent && !core->ops->get_parent) { |
d4d7e3dd | 2258 | pr_warning("%s: %s must implement .get_parent & .set_parent\n", |
d6968fca | 2259 | __func__, core->name); |
d1302a36 | 2260 | ret = -EINVAL; |
d4d7e3dd MT |
2261 | goto out; |
2262 | } | |
2263 | ||
d6968fca SB |
2264 | if (core->ops->set_rate_and_parent && |
2265 | !(core->ops->set_parent && core->ops->set_rate)) { | |
3fa2252b | 2266 | pr_warn("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 2267 | __func__, core->name); |
3fa2252b SB |
2268 | ret = -EINVAL; |
2269 | goto out; | |
2270 | } | |
2271 | ||
b2476490 | 2272 | /* throw a WARN if any entries in parent_names are NULL */ |
d6968fca SB |
2273 | for (i = 0; i < core->num_parents; i++) |
2274 | WARN(!core->parent_names[i], | |
b2476490 | 2275 | "%s: invalid NULL in %s's .parent_names\n", |
d6968fca | 2276 | __func__, core->name); |
b2476490 MT |
2277 | |
2278 | /* | |
2279 | * Allocate an array of struct clk *'s to avoid unnecessary string | |
2280 | * look-ups of clk's possible parents. This can fail for clocks passed | |
d6968fca | 2281 | * in to clk_init during early boot; thus any access to core->parents[] |
b2476490 MT |
2282 | * must always check for a NULL pointer and try to populate it if |
2283 | * necessary. | |
2284 | * | |
d6968fca SB |
2285 | * If core->parents is not NULL we skip this entire block. This allows |
2286 | * for clock drivers to statically initialize core->parents. | |
b2476490 | 2287 | */ |
d6968fca SB |
2288 | if (core->num_parents > 1 && !core->parents) { |
2289 | core->parents = kcalloc(core->num_parents, sizeof(struct clk *), | |
96a7ed90 | 2290 | GFP_KERNEL); |
b2476490 | 2291 | /* |
035a61c3 | 2292 | * clk_core_lookup returns NULL for parents that have not been |
b2476490 MT |
2293 | * clk_init'd; thus any access to clk->parents[] must check |
2294 | * for a NULL pointer. We can always perform lazy lookups for | |
2295 | * missing parents later on. | |
2296 | */ | |
d6968fca SB |
2297 | if (core->parents) |
2298 | for (i = 0; i < core->num_parents; i++) | |
2299 | core->parents[i] = | |
2300 | clk_core_lookup(core->parent_names[i]); | |
b2476490 MT |
2301 | } |
2302 | ||
d6968fca | 2303 | core->parent = __clk_init_parent(core); |
b2476490 MT |
2304 | |
2305 | /* | |
d6968fca | 2306 | * Populate core->parent if parent has already been __clk_init'd. If |
b2476490 MT |
2307 | * parent has not yet been __clk_init'd then place clk in the orphan |
2308 | * list. If clk has set the CLK_IS_ROOT flag then place it in the root | |
2309 | * clk list. | |
2310 | * | |
2311 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2312 | * clocks and re-parent any that are children of the clock currently | |
2313 | * being clk_init'd. | |
2314 | */ | |
d6968fca SB |
2315 | if (core->parent) |
2316 | hlist_add_head(&core->child_node, | |
2317 | &core->parent->children); | |
2318 | else if (core->flags & CLK_IS_ROOT) | |
2319 | hlist_add_head(&core->child_node, &clk_root_list); | |
b2476490 | 2320 | else |
d6968fca | 2321 | hlist_add_head(&core->child_node, &clk_orphan_list); |
b2476490 | 2322 | |
5279fc40 BB |
2323 | /* |
2324 | * Set clk's accuracy. The preferred method is to use | |
2325 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2326 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2327 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2328 | * clock). | |
2329 | */ | |
d6968fca SB |
2330 | if (core->ops->recalc_accuracy) |
2331 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
2332 | __clk_get_accuracy(core->parent)); | |
2333 | else if (core->parent) | |
2334 | core->accuracy = core->parent->accuracy; | |
5279fc40 | 2335 | else |
d6968fca | 2336 | core->accuracy = 0; |
5279fc40 | 2337 | |
9824cf73 MR |
2338 | /* |
2339 | * Set clk's phase. | |
2340 | * Since a phase is by definition relative to its parent, just | |
2341 | * query the current clock phase, or just assume it's in phase. | |
2342 | */ | |
d6968fca SB |
2343 | if (core->ops->get_phase) |
2344 | core->phase = core->ops->get_phase(core->hw); | |
9824cf73 | 2345 | else |
d6968fca | 2346 | core->phase = 0; |
9824cf73 | 2347 | |
b2476490 MT |
2348 | /* |
2349 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2350 | * simple clocks and lazy developers the default fallback is to use the | |
2351 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2352 | * then rate is set to zero. | |
2353 | */ | |
d6968fca SB |
2354 | if (core->ops->recalc_rate) |
2355 | rate = core->ops->recalc_rate(core->hw, | |
2356 | clk_core_get_rate_nolock(core->parent)); | |
2357 | else if (core->parent) | |
2358 | rate = core->parent->rate; | |
b2476490 | 2359 | else |
1c8e6004 | 2360 | rate = 0; |
d6968fca | 2361 | core->rate = core->req_rate = rate; |
b2476490 MT |
2362 | |
2363 | /* | |
2364 | * walk the list of orphan clocks and reparent any that are children of | |
2365 | * this clock | |
2366 | */ | |
b67bfe0d | 2367 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
12d29886 | 2368 | if (orphan->num_parents && orphan->ops->get_parent) { |
1f61e5f1 | 2369 | i = orphan->ops->get_parent(orphan->hw); |
d6968fca SB |
2370 | if (!strcmp(core->name, orphan->parent_names[i])) |
2371 | clk_core_reparent(orphan, core); | |
1f61e5f1 MF |
2372 | continue; |
2373 | } | |
2374 | ||
b2476490 | 2375 | for (i = 0; i < orphan->num_parents; i++) |
d6968fca SB |
2376 | if (!strcmp(core->name, orphan->parent_names[i])) { |
2377 | clk_core_reparent(orphan, core); | |
b2476490 MT |
2378 | break; |
2379 | } | |
1f61e5f1 | 2380 | } |
b2476490 MT |
2381 | |
2382 | /* | |
2383 | * optional platform-specific magic | |
2384 | * | |
2385 | * The .init callback is not used by any of the basic clock types, but | |
2386 | * exists for weird hardware that must perform initialization magic. | |
2387 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2388 | * using this callback, as its use is discouraged. |
b2476490 | 2389 | */ |
d6968fca SB |
2390 | if (core->ops->init) |
2391 | core->ops->init(core->hw); | |
b2476490 | 2392 | |
d6968fca | 2393 | kref_init(&core->ref); |
b2476490 | 2394 | out: |
eab89f69 | 2395 | clk_prepare_unlock(); |
b2476490 | 2396 | |
89f7e9de | 2397 | if (!ret) |
d6968fca | 2398 | clk_debug_register(core); |
89f7e9de | 2399 | |
d1302a36 | 2400 | return ret; |
b2476490 MT |
2401 | } |
2402 | ||
035a61c3 TV |
2403 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2404 | const char *con_id) | |
0197b3ea | 2405 | { |
0197b3ea SK |
2406 | struct clk *clk; |
2407 | ||
035a61c3 TV |
2408 | /* This is to allow this function to be chained to others */ |
2409 | if (!hw || IS_ERR(hw)) | |
2410 | return (struct clk *) hw; | |
0197b3ea | 2411 | |
035a61c3 TV |
2412 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2413 | if (!clk) | |
2414 | return ERR_PTR(-ENOMEM); | |
2415 | ||
2416 | clk->core = hw->core; | |
2417 | clk->dev_id = dev_id; | |
2418 | clk->con_id = con_id; | |
1c8e6004 TV |
2419 | clk->max_rate = ULONG_MAX; |
2420 | ||
2421 | clk_prepare_lock(); | |
50595f8b | 2422 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2423 | clk_prepare_unlock(); |
0197b3ea SK |
2424 | |
2425 | return clk; | |
2426 | } | |
035a61c3 | 2427 | |
73e0e496 | 2428 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2429 | { |
2430 | clk_prepare_lock(); | |
50595f8b | 2431 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2432 | clk_prepare_unlock(); |
2433 | ||
2434 | kfree(clk); | |
2435 | } | |
0197b3ea | 2436 | |
293ba3b4 SB |
2437 | /** |
2438 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2439 | * @dev: device that is registering this clock | |
2440 | * @hw: link to hardware-specific clock data | |
2441 | * | |
2442 | * clk_register is the primary interface for populating the clock tree with new | |
2443 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
2444 | * cannot be dereferenced by driver code but may be used in conjuction with the | |
2445 | * rest of the clock API. In the event of an error clk_register will return an | |
2446 | * error code; drivers must test for an error code after calling clk_register. | |
2447 | */ | |
2448 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2449 | { |
d1302a36 | 2450 | int i, ret; |
d6968fca | 2451 | struct clk_core *core; |
293ba3b4 | 2452 | |
d6968fca SB |
2453 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
2454 | if (!core) { | |
293ba3b4 SB |
2455 | ret = -ENOMEM; |
2456 | goto fail_out; | |
2457 | } | |
b2476490 | 2458 | |
d6968fca SB |
2459 | core->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
2460 | if (!core->name) { | |
0197b3ea SK |
2461 | ret = -ENOMEM; |
2462 | goto fail_name; | |
2463 | } | |
d6968fca | 2464 | core->ops = hw->init->ops; |
ac2df527 | 2465 | if (dev && dev->driver) |
d6968fca SB |
2466 | core->owner = dev->driver->owner; |
2467 | core->hw = hw; | |
2468 | core->flags = hw->init->flags; | |
2469 | core->num_parents = hw->init->num_parents; | |
2470 | hw->core = core; | |
b2476490 | 2471 | |
d1302a36 | 2472 | /* allocate local copy in case parent_names is __initdata */ |
d6968fca | 2473 | core->parent_names = kcalloc(core->num_parents, sizeof(char *), |
96a7ed90 | 2474 | GFP_KERNEL); |
d1302a36 | 2475 | |
d6968fca | 2476 | if (!core->parent_names) { |
d1302a36 MT |
2477 | ret = -ENOMEM; |
2478 | goto fail_parent_names; | |
2479 | } | |
2480 | ||
2481 | ||
2482 | /* copy each string name in case parent_names is __initdata */ | |
d6968fca SB |
2483 | for (i = 0; i < core->num_parents; i++) { |
2484 | core->parent_names[i] = kstrdup_const(hw->init->parent_names[i], | |
0197b3ea | 2485 | GFP_KERNEL); |
d6968fca | 2486 | if (!core->parent_names[i]) { |
d1302a36 MT |
2487 | ret = -ENOMEM; |
2488 | goto fail_parent_names_copy; | |
2489 | } | |
2490 | } | |
2491 | ||
d6968fca | 2492 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 2493 | |
035a61c3 TV |
2494 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2495 | if (IS_ERR(hw->clk)) { | |
035a61c3 TV |
2496 | ret = PTR_ERR(hw->clk); |
2497 | goto fail_parent_names_copy; | |
2498 | } | |
2499 | ||
2500 | ret = __clk_init(dev, hw->clk); | |
d1302a36 | 2501 | if (!ret) |
035a61c3 | 2502 | return hw->clk; |
b2476490 | 2503 | |
1c8e6004 | 2504 | __clk_free_clk(hw->clk); |
035a61c3 | 2505 | hw->clk = NULL; |
b2476490 | 2506 | |
d1302a36 MT |
2507 | fail_parent_names_copy: |
2508 | while (--i >= 0) | |
d6968fca SB |
2509 | kfree_const(core->parent_names[i]); |
2510 | kfree(core->parent_names); | |
d1302a36 | 2511 | fail_parent_names: |
d6968fca | 2512 | kfree_const(core->name); |
0197b3ea | 2513 | fail_name: |
d6968fca | 2514 | kfree(core); |
d1302a36 MT |
2515 | fail_out: |
2516 | return ERR_PTR(ret); | |
b2476490 MT |
2517 | } |
2518 | EXPORT_SYMBOL_GPL(clk_register); | |
2519 | ||
6e5ab41b | 2520 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
2521 | static void __clk_release(struct kref *ref) |
2522 | { | |
d6968fca SB |
2523 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
2524 | int i = core->num_parents; | |
fcb0ee6a | 2525 | |
496eadf8 KK |
2526 | lockdep_assert_held(&prepare_lock); |
2527 | ||
d6968fca | 2528 | kfree(core->parents); |
fcb0ee6a | 2529 | while (--i >= 0) |
d6968fca | 2530 | kfree_const(core->parent_names[i]); |
fcb0ee6a | 2531 | |
d6968fca SB |
2532 | kfree(core->parent_names); |
2533 | kfree_const(core->name); | |
2534 | kfree(core); | |
fcb0ee6a SN |
2535 | } |
2536 | ||
2537 | /* | |
2538 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2539 | * after clk_unregister() was called on a clock and until last clock | |
2540 | * consumer calls clk_put() and the struct clk object is freed. | |
2541 | */ | |
2542 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2543 | { | |
2544 | return -ENXIO; | |
2545 | } | |
2546 | ||
2547 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2548 | { | |
2549 | WARN_ON_ONCE(1); | |
2550 | } | |
2551 | ||
2552 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2553 | unsigned long parent_rate) | |
2554 | { | |
2555 | return -ENXIO; | |
2556 | } | |
2557 | ||
2558 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2559 | { | |
2560 | return -ENXIO; | |
2561 | } | |
2562 | ||
2563 | static const struct clk_ops clk_nodrv_ops = { | |
2564 | .enable = clk_nodrv_prepare_enable, | |
2565 | .disable = clk_nodrv_disable_unprepare, | |
2566 | .prepare = clk_nodrv_prepare_enable, | |
2567 | .unprepare = clk_nodrv_disable_unprepare, | |
2568 | .set_rate = clk_nodrv_set_rate, | |
2569 | .set_parent = clk_nodrv_set_parent, | |
2570 | }; | |
2571 | ||
1df5c939 MB |
2572 | /** |
2573 | * clk_unregister - unregister a currently registered clock | |
2574 | * @clk: clock to unregister | |
1df5c939 | 2575 | */ |
fcb0ee6a SN |
2576 | void clk_unregister(struct clk *clk) |
2577 | { | |
2578 | unsigned long flags; | |
2579 | ||
6314b679 SB |
2580 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2581 | return; | |
2582 | ||
035a61c3 | 2583 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2584 | |
2585 | clk_prepare_lock(); | |
2586 | ||
035a61c3 TV |
2587 | if (clk->core->ops == &clk_nodrv_ops) { |
2588 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2589 | clk->core->name); | |
6314b679 | 2590 | return; |
fcb0ee6a SN |
2591 | } |
2592 | /* | |
2593 | * Assign empty clock ops for consumers that might still hold | |
2594 | * a reference to this clock. | |
2595 | */ | |
2596 | flags = clk_enable_lock(); | |
035a61c3 | 2597 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2598 | clk_enable_unlock(flags); |
2599 | ||
035a61c3 TV |
2600 | if (!hlist_empty(&clk->core->children)) { |
2601 | struct clk_core *child; | |
874f224c | 2602 | struct hlist_node *t; |
fcb0ee6a SN |
2603 | |
2604 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2605 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2606 | child_node) | |
2607 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2608 | } |
2609 | ||
035a61c3 | 2610 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2611 | |
035a61c3 | 2612 | if (clk->core->prepare_count) |
fcb0ee6a | 2613 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2614 | __func__, clk->core->name); |
2615 | kref_put(&clk->core->ref, __clk_release); | |
6314b679 | 2616 | |
fcb0ee6a SN |
2617 | clk_prepare_unlock(); |
2618 | } | |
1df5c939 MB |
2619 | EXPORT_SYMBOL_GPL(clk_unregister); |
2620 | ||
46c8773a SB |
2621 | static void devm_clk_release(struct device *dev, void *res) |
2622 | { | |
293ba3b4 | 2623 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2624 | } |
2625 | ||
2626 | /** | |
2627 | * devm_clk_register - resource managed clk_register() | |
2628 | * @dev: device that is registering this clock | |
2629 | * @hw: link to hardware-specific clock data | |
2630 | * | |
2631 | * Managed clk_register(). Clocks returned from this function are | |
2632 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2633 | * more information. | |
2634 | */ | |
2635 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2636 | { | |
2637 | struct clk *clk; | |
293ba3b4 | 2638 | struct clk **clkp; |
46c8773a | 2639 | |
293ba3b4 SB |
2640 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2641 | if (!clkp) | |
46c8773a SB |
2642 | return ERR_PTR(-ENOMEM); |
2643 | ||
293ba3b4 SB |
2644 | clk = clk_register(dev, hw); |
2645 | if (!IS_ERR(clk)) { | |
2646 | *clkp = clk; | |
2647 | devres_add(dev, clkp); | |
46c8773a | 2648 | } else { |
293ba3b4 | 2649 | devres_free(clkp); |
46c8773a SB |
2650 | } |
2651 | ||
2652 | return clk; | |
2653 | } | |
2654 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2655 | ||
2656 | static int devm_clk_match(struct device *dev, void *res, void *data) | |
2657 | { | |
2658 | struct clk *c = res; | |
2659 | if (WARN_ON(!c)) | |
2660 | return 0; | |
2661 | return c == data; | |
2662 | } | |
2663 | ||
2664 | /** | |
2665 | * devm_clk_unregister - resource managed clk_unregister() | |
2666 | * @clk: clock to unregister | |
2667 | * | |
2668 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2669 | * this function will not need to be called and the resource management | |
2670 | * code will ensure that the resource is freed. | |
2671 | */ | |
2672 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2673 | { | |
2674 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2675 | } | |
2676 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2677 | ||
ac2df527 SN |
2678 | /* |
2679 | * clkdev helpers | |
2680 | */ | |
2681 | int __clk_get(struct clk *clk) | |
2682 | { | |
035a61c3 TV |
2683 | struct clk_core *core = !clk ? NULL : clk->core; |
2684 | ||
2685 | if (core) { | |
2686 | if (!try_module_get(core->owner)) | |
00efcb1c | 2687 | return 0; |
ac2df527 | 2688 | |
035a61c3 | 2689 | kref_get(&core->ref); |
00efcb1c | 2690 | } |
ac2df527 SN |
2691 | return 1; |
2692 | } | |
2693 | ||
2694 | void __clk_put(struct clk *clk) | |
2695 | { | |
10cdfe54 TV |
2696 | struct module *owner; |
2697 | ||
00efcb1c | 2698 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2699 | return; |
2700 | ||
fcb0ee6a | 2701 | clk_prepare_lock(); |
1c8e6004 | 2702 | |
50595f8b | 2703 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
2704 | if (clk->min_rate > clk->core->req_rate || |
2705 | clk->max_rate < clk->core->req_rate) | |
2706 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2707 | ||
1c8e6004 TV |
2708 | owner = clk->core->owner; |
2709 | kref_put(&clk->core->ref, __clk_release); | |
2710 | ||
fcb0ee6a SN |
2711 | clk_prepare_unlock(); |
2712 | ||
10cdfe54 | 2713 | module_put(owner); |
035a61c3 | 2714 | |
035a61c3 | 2715 | kfree(clk); |
ac2df527 SN |
2716 | } |
2717 | ||
b2476490 MT |
2718 | /*** clk rate change notifiers ***/ |
2719 | ||
2720 | /** | |
2721 | * clk_notifier_register - add a clk rate change notifier | |
2722 | * @clk: struct clk * to watch | |
2723 | * @nb: struct notifier_block * with callback info | |
2724 | * | |
2725 | * Request notification when clk's rate changes. This uses an SRCU | |
2726 | * notifier because we want it to block and notifier unregistrations are | |
2727 | * uncommon. The callbacks associated with the notifier must not | |
2728 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2729 | * this will cause a nested prepare_lock mutex. | |
2730 | * | |
5324fda7 SB |
2731 | * In all notification cases cases (pre, post and abort rate change) the |
2732 | * original clock rate is passed to the callback via struct | |
2733 | * clk_notifier_data.old_rate and the new frequency is passed via struct | |
b2476490 MT |
2734 | * clk_notifier_data.new_rate. |
2735 | * | |
b2476490 MT |
2736 | * clk_notifier_register() must be called from non-atomic context. |
2737 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2738 | * allocation failure; otherwise, passes along the return value of | |
2739 | * srcu_notifier_chain_register(). | |
2740 | */ | |
2741 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2742 | { | |
2743 | struct clk_notifier *cn; | |
2744 | int ret = -ENOMEM; | |
2745 | ||
2746 | if (!clk || !nb) | |
2747 | return -EINVAL; | |
2748 | ||
eab89f69 | 2749 | clk_prepare_lock(); |
b2476490 MT |
2750 | |
2751 | /* search the list of notifiers for this clk */ | |
2752 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2753 | if (cn->clk == clk) | |
2754 | break; | |
2755 | ||
2756 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2757 | if (cn->clk != clk) { | |
2758 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2759 | if (!cn) | |
2760 | goto out; | |
2761 | ||
2762 | cn->clk = clk; | |
2763 | srcu_init_notifier_head(&cn->notifier_head); | |
2764 | ||
2765 | list_add(&cn->node, &clk_notifier_list); | |
2766 | } | |
2767 | ||
2768 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2769 | ||
035a61c3 | 2770 | clk->core->notifier_count++; |
b2476490 MT |
2771 | |
2772 | out: | |
eab89f69 | 2773 | clk_prepare_unlock(); |
b2476490 MT |
2774 | |
2775 | return ret; | |
2776 | } | |
2777 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2778 | ||
2779 | /** | |
2780 | * clk_notifier_unregister - remove a clk rate change notifier | |
2781 | * @clk: struct clk * | |
2782 | * @nb: struct notifier_block * with callback info | |
2783 | * | |
2784 | * Request no further notification for changes to 'clk' and frees memory | |
2785 | * allocated in clk_notifier_register. | |
2786 | * | |
2787 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2788 | * along the return value of srcu_notifier_chain_unregister(). | |
2789 | */ | |
2790 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2791 | { | |
2792 | struct clk_notifier *cn = NULL; | |
2793 | int ret = -EINVAL; | |
2794 | ||
2795 | if (!clk || !nb) | |
2796 | return -EINVAL; | |
2797 | ||
eab89f69 | 2798 | clk_prepare_lock(); |
b2476490 MT |
2799 | |
2800 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2801 | if (cn->clk == clk) | |
2802 | break; | |
2803 | ||
2804 | if (cn->clk == clk) { | |
2805 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2806 | ||
035a61c3 | 2807 | clk->core->notifier_count--; |
b2476490 MT |
2808 | |
2809 | /* XXX the notifier code should handle this better */ | |
2810 | if (!cn->notifier_head.head) { | |
2811 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2812 | list_del(&cn->node); |
b2476490 MT |
2813 | kfree(cn); |
2814 | } | |
2815 | ||
2816 | } else { | |
2817 | ret = -ENOENT; | |
2818 | } | |
2819 | ||
eab89f69 | 2820 | clk_prepare_unlock(); |
b2476490 MT |
2821 | |
2822 | return ret; | |
2823 | } | |
2824 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2825 | |
2826 | #ifdef CONFIG_OF | |
2827 | /** | |
2828 | * struct of_clk_provider - Clock provider registration structure | |
2829 | * @link: Entry in global list of clock providers | |
2830 | * @node: Pointer to device tree node of clock provider | |
2831 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2832 | * given clock specifier | |
2833 | * @data: context pointer to be passed into @get callback | |
2834 | */ | |
2835 | struct of_clk_provider { | |
2836 | struct list_head link; | |
2837 | ||
2838 | struct device_node *node; | |
2839 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
2840 | void *data; | |
2841 | }; | |
2842 | ||
f2f6c255 PG |
2843 | static const struct of_device_id __clk_of_table_sentinel |
2844 | __used __section(__clk_of_table_end); | |
2845 | ||
766e6a4e | 2846 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2847 | static DEFINE_MUTEX(of_clk_mutex); |
2848 | ||
766e6a4e GL |
2849 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
2850 | void *data) | |
2851 | { | |
2852 | return data; | |
2853 | } | |
2854 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2855 | ||
494bfec9 SG |
2856 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2857 | { | |
2858 | struct clk_onecell_data *clk_data = data; | |
2859 | unsigned int idx = clkspec->args[0]; | |
2860 | ||
2861 | if (idx >= clk_data->clk_num) { | |
2862 | pr_err("%s: invalid clock index %d\n", __func__, idx); | |
2863 | return ERR_PTR(-EINVAL); | |
2864 | } | |
2865 | ||
2866 | return clk_data->clks[idx]; | |
2867 | } | |
2868 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2869 | ||
766e6a4e GL |
2870 | /** |
2871 | * of_clk_add_provider() - Register a clock provider for a node | |
2872 | * @np: Device node pointer associated with clock provider | |
2873 | * @clk_src_get: callback for decoding clock | |
2874 | * @data: context pointer for @clk_src_get callback. | |
2875 | */ | |
2876 | int of_clk_add_provider(struct device_node *np, | |
2877 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
2878 | void *data), | |
2879 | void *data) | |
2880 | { | |
2881 | struct of_clk_provider *cp; | |
86be408b | 2882 | int ret; |
766e6a4e GL |
2883 | |
2884 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
2885 | if (!cp) | |
2886 | return -ENOMEM; | |
2887 | ||
2888 | cp->node = of_node_get(np); | |
2889 | cp->data = data; | |
2890 | cp->get = clk_src_get; | |
2891 | ||
d6782c26 | 2892 | mutex_lock(&of_clk_mutex); |
766e6a4e | 2893 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 2894 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2895 | pr_debug("Added clock from %s\n", np->full_name); |
2896 | ||
86be408b SN |
2897 | ret = of_clk_set_defaults(np, true); |
2898 | if (ret < 0) | |
2899 | of_clk_del_provider(np); | |
2900 | ||
2901 | return ret; | |
766e6a4e GL |
2902 | } |
2903 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
2904 | ||
2905 | /** | |
2906 | * of_clk_del_provider() - Remove a previously registered clock provider | |
2907 | * @np: Device node pointer associated with clock provider | |
2908 | */ | |
2909 | void of_clk_del_provider(struct device_node *np) | |
2910 | { | |
2911 | struct of_clk_provider *cp; | |
2912 | ||
d6782c26 | 2913 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2914 | list_for_each_entry(cp, &of_clk_providers, link) { |
2915 | if (cp->node == np) { | |
2916 | list_del(&cp->link); | |
2917 | of_node_put(cp->node); | |
2918 | kfree(cp); | |
2919 | break; | |
2920 | } | |
2921 | } | |
d6782c26 | 2922 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2923 | } |
2924 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
2925 | ||
73e0e496 SB |
2926 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
2927 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
2928 | { |
2929 | struct of_clk_provider *provider; | |
a34cd466 | 2930 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 2931 | |
306c342f SB |
2932 | if (!clkspec) |
2933 | return ERR_PTR(-EINVAL); | |
2934 | ||
766e6a4e | 2935 | /* Check if we have such a provider in our array */ |
306c342f | 2936 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2937 | list_for_each_entry(provider, &of_clk_providers, link) { |
2938 | if (provider->node == clkspec->np) | |
2939 | clk = provider->get(clkspec, provider->data); | |
73e0e496 SB |
2940 | if (!IS_ERR(clk)) { |
2941 | clk = __clk_create_clk(__clk_get_hw(clk), dev_id, | |
2942 | con_id); | |
2943 | ||
2944 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
2945 | __clk_free_clk(clk); | |
2946 | clk = ERR_PTR(-ENOENT); | |
2947 | } | |
2948 | ||
766e6a4e | 2949 | break; |
73e0e496 | 2950 | } |
766e6a4e | 2951 | } |
306c342f | 2952 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
2953 | |
2954 | return clk; | |
2955 | } | |
2956 | ||
306c342f SB |
2957 | /** |
2958 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
2959 | * @clkspec: pointer to a clock specifier data structure | |
2960 | * | |
2961 | * This function looks up a struct clk from the registered list of clock | |
2962 | * providers, an input is a clock specifier data structure as returned | |
2963 | * from the of_parse_phandle_with_args() function call. | |
2964 | */ | |
d6782c26 SN |
2965 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
2966 | { | |
306c342f | 2967 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e GL |
2968 | } |
2969 | ||
f6102742 MT |
2970 | int of_clk_get_parent_count(struct device_node *np) |
2971 | { | |
2972 | return of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
2973 | } | |
2974 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
2975 | ||
766e6a4e GL |
2976 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
2977 | { | |
2978 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 2979 | struct property *prop; |
766e6a4e | 2980 | const char *clk_name; |
7a0fc1a3 BD |
2981 | const __be32 *vp; |
2982 | u32 pv; | |
766e6a4e | 2983 | int rc; |
7a0fc1a3 | 2984 | int count; |
766e6a4e GL |
2985 | |
2986 | if (index < 0) | |
2987 | return NULL; | |
2988 | ||
2989 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, | |
2990 | &clkspec); | |
2991 | if (rc) | |
2992 | return NULL; | |
2993 | ||
7a0fc1a3 BD |
2994 | index = clkspec.args_count ? clkspec.args[0] : 0; |
2995 | count = 0; | |
2996 | ||
2997 | /* if there is an indices property, use it to transfer the index | |
2998 | * specified into an array offset for the clock-output-names property. | |
2999 | */ | |
3000 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
3001 | if (index == pv) { | |
3002 | index = count; | |
3003 | break; | |
3004 | } | |
3005 | count++; | |
3006 | } | |
3007 | ||
766e6a4e | 3008 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3009 | index, |
766e6a4e GL |
3010 | &clk_name) < 0) |
3011 | clk_name = clkspec.np->name; | |
3012 | ||
3013 | of_node_put(clkspec.np); | |
3014 | return clk_name; | |
3015 | } | |
3016 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3017 | ||
1771b10d GC |
3018 | struct clock_provider { |
3019 | of_clk_init_cb_t clk_init_cb; | |
3020 | struct device_node *np; | |
3021 | struct list_head node; | |
3022 | }; | |
3023 | ||
3024 | static LIST_HEAD(clk_provider_list); | |
3025 | ||
3026 | /* | |
3027 | * This function looks for a parent clock. If there is one, then it | |
3028 | * checks that the provider for this parent clock was initialized, in | |
3029 | * this case the parent clock will be ready. | |
3030 | */ | |
3031 | static int parent_ready(struct device_node *np) | |
3032 | { | |
3033 | int i = 0; | |
3034 | ||
3035 | while (true) { | |
3036 | struct clk *clk = of_clk_get(np, i); | |
3037 | ||
3038 | /* this parent is ready we can check the next one */ | |
3039 | if (!IS_ERR(clk)) { | |
3040 | clk_put(clk); | |
3041 | i++; | |
3042 | continue; | |
3043 | } | |
3044 | ||
3045 | /* at least one parent is not ready, we exit now */ | |
3046 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3047 | return 0; | |
3048 | ||
3049 | /* | |
3050 | * Here we make assumption that the device tree is | |
3051 | * written correctly. So an error means that there is | |
3052 | * no more parent. As we didn't exit yet, then the | |
3053 | * previous parent are ready. If there is no clock | |
3054 | * parent, no need to wait for them, then we can | |
3055 | * consider their absence as being ready | |
3056 | */ | |
3057 | return 1; | |
3058 | } | |
3059 | } | |
3060 | ||
766e6a4e GL |
3061 | /** |
3062 | * of_clk_init() - Scan and init clock providers from the DT | |
3063 | * @matches: array of compatible values and init functions for providers. | |
3064 | * | |
1771b10d | 3065 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3066 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3067 | * to follow the dependencies. |
766e6a4e GL |
3068 | */ |
3069 | void __init of_clk_init(const struct of_device_id *matches) | |
3070 | { | |
7f7ed584 | 3071 | const struct of_device_id *match; |
766e6a4e | 3072 | struct device_node *np; |
1771b10d GC |
3073 | struct clock_provider *clk_provider, *next; |
3074 | bool is_init_done; | |
3075 | bool force = false; | |
766e6a4e | 3076 | |
f2f6c255 | 3077 | if (!matches) |
819b4861 | 3078 | matches = &__clk_of_table; |
f2f6c255 | 3079 | |
1771b10d | 3080 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3081 | for_each_matching_node_and_match(np, matches, &match) { |
1771b10d GC |
3082 | struct clock_provider *parent = |
3083 | kzalloc(sizeof(struct clock_provider), GFP_KERNEL); | |
3084 | ||
3085 | parent->clk_init_cb = match->data; | |
3086 | parent->np = np; | |
3f6d439f | 3087 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3088 | } |
3089 | ||
3090 | while (!list_empty(&clk_provider_list)) { | |
3091 | is_init_done = false; | |
3092 | list_for_each_entry_safe(clk_provider, next, | |
3093 | &clk_provider_list, node) { | |
3094 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3095 | |
1771b10d | 3096 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3097 | of_clk_set_defaults(clk_provider->np, true); |
3098 | ||
1771b10d GC |
3099 | list_del(&clk_provider->node); |
3100 | kfree(clk_provider); | |
3101 | is_init_done = true; | |
3102 | } | |
3103 | } | |
3104 | ||
3105 | /* | |
e5ca8fb4 | 3106 | * We didn't manage to initialize any of the |
1771b10d GC |
3107 | * remaining providers during the last loop, so now we |
3108 | * initialize all the remaining ones unconditionally | |
3109 | * in case the clock parent was not mandatory | |
3110 | */ | |
3111 | if (!is_init_done) | |
3112 | force = true; | |
766e6a4e GL |
3113 | } |
3114 | } | |
3115 | #endif |