clk: move checking .get_parent to __clk_core_init()
[deliverable/linux.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
3c373117 12#include <linux/clk.h>
b09d6d99 13#include <linux/clk-provider.h>
86be408b 14#include <linux/clk/clk-conf.h>
b2476490
MT
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spinlock.h>
18#include <linux/err.h>
19#include <linux/list.h>
20#include <linux/slab.h>
766e6a4e 21#include <linux/of.h>
46c8773a 22#include <linux/device.h>
f2f6c255 23#include <linux/init.h>
533ddeb1 24#include <linux/sched.h>
562ef0b0 25#include <linux/clkdev.h>
b2476490 26
d6782c26
SN
27#include "clk.h"
28
b2476490
MT
29static DEFINE_SPINLOCK(enable_lock);
30static DEFINE_MUTEX(prepare_lock);
31
533ddeb1
MT
32static struct task_struct *prepare_owner;
33static struct task_struct *enable_owner;
34
35static int prepare_refcnt;
36static int enable_refcnt;
37
b2476490
MT
38static HLIST_HEAD(clk_root_list);
39static HLIST_HEAD(clk_orphan_list);
40static LIST_HEAD(clk_notifier_list);
41
b09d6d99
MT
42/*** private data structures ***/
43
44struct clk_core {
45 const char *name;
46 const struct clk_ops *ops;
47 struct clk_hw *hw;
48 struct module *owner;
49 struct clk_core *parent;
50 const char **parent_names;
51 struct clk_core **parents;
52 u8 num_parents;
53 u8 new_parent_index;
54 unsigned long rate;
1c8e6004 55 unsigned long req_rate;
b09d6d99
MT
56 unsigned long new_rate;
57 struct clk_core *new_parent;
58 struct clk_core *new_child;
59 unsigned long flags;
e6500344 60 bool orphan;
b09d6d99
MT
61 unsigned int enable_count;
62 unsigned int prepare_count;
9783c0d9
SB
63 unsigned long min_rate;
64 unsigned long max_rate;
b09d6d99
MT
65 unsigned long accuracy;
66 int phase;
67 struct hlist_head children;
68 struct hlist_node child_node;
1c8e6004 69 struct hlist_head clks;
b09d6d99
MT
70 unsigned int notifier_count;
71#ifdef CONFIG_DEBUG_FS
72 struct dentry *dentry;
8c9a8a8f 73 struct hlist_node debug_node;
b09d6d99
MT
74#endif
75 struct kref ref;
76};
77
dfc202ea
SB
78#define CREATE_TRACE_POINTS
79#include <trace/events/clk.h>
80
b09d6d99
MT
81struct clk {
82 struct clk_core *core;
83 const char *dev_id;
84 const char *con_id;
1c8e6004
TV
85 unsigned long min_rate;
86 unsigned long max_rate;
50595f8b 87 struct hlist_node clks_node;
b09d6d99
MT
88};
89
eab89f69
MT
90/*** locking ***/
91static void clk_prepare_lock(void)
92{
533ddeb1
MT
93 if (!mutex_trylock(&prepare_lock)) {
94 if (prepare_owner == current) {
95 prepare_refcnt++;
96 return;
97 }
98 mutex_lock(&prepare_lock);
99 }
100 WARN_ON_ONCE(prepare_owner != NULL);
101 WARN_ON_ONCE(prepare_refcnt != 0);
102 prepare_owner = current;
103 prepare_refcnt = 1;
eab89f69
MT
104}
105
106static void clk_prepare_unlock(void)
107{
533ddeb1
MT
108 WARN_ON_ONCE(prepare_owner != current);
109 WARN_ON_ONCE(prepare_refcnt == 0);
110
111 if (--prepare_refcnt)
112 return;
113 prepare_owner = NULL;
eab89f69
MT
114 mutex_unlock(&prepare_lock);
115}
116
117static unsigned long clk_enable_lock(void)
a57aa185 118 __acquires(enable_lock)
eab89f69
MT
119{
120 unsigned long flags;
533ddeb1
MT
121
122 if (!spin_trylock_irqsave(&enable_lock, flags)) {
123 if (enable_owner == current) {
124 enable_refcnt++;
a57aa185 125 __acquire(enable_lock);
533ddeb1
MT
126 return flags;
127 }
128 spin_lock_irqsave(&enable_lock, flags);
129 }
130 WARN_ON_ONCE(enable_owner != NULL);
131 WARN_ON_ONCE(enable_refcnt != 0);
132 enable_owner = current;
133 enable_refcnt = 1;
eab89f69
MT
134 return flags;
135}
136
137static void clk_enable_unlock(unsigned long flags)
a57aa185 138 __releases(enable_lock)
eab89f69 139{
533ddeb1
MT
140 WARN_ON_ONCE(enable_owner != current);
141 WARN_ON_ONCE(enable_refcnt == 0);
142
a57aa185
SB
143 if (--enable_refcnt) {
144 __release(enable_lock);
533ddeb1 145 return;
a57aa185 146 }
533ddeb1 147 enable_owner = NULL;
eab89f69
MT
148 spin_unlock_irqrestore(&enable_lock, flags);
149}
150
4dff95dc
SB
151static bool clk_core_is_prepared(struct clk_core *core)
152{
153 /*
154 * .is_prepared is optional for clocks that can prepare
155 * fall back to software usage counter if it is missing
156 */
157 if (!core->ops->is_prepared)
158 return core->prepare_count;
b2476490 159
4dff95dc
SB
160 return core->ops->is_prepared(core->hw);
161}
b2476490 162
4dff95dc
SB
163static bool clk_core_is_enabled(struct clk_core *core)
164{
165 /*
166 * .is_enabled is only mandatory for clocks that gate
167 * fall back to software usage counter if .is_enabled is missing
168 */
169 if (!core->ops->is_enabled)
170 return core->enable_count;
6b44c854 171
4dff95dc
SB
172 return core->ops->is_enabled(core->hw);
173}
6b44c854 174
4dff95dc 175static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 176{
4dff95dc
SB
177 struct clk_core *child;
178
179 lockdep_assert_held(&prepare_lock);
180
181 hlist_for_each_entry(child, &core->children, child_node)
182 clk_unprepare_unused_subtree(child);
183
184 if (core->prepare_count)
1af599df
PG
185 return;
186
4dff95dc
SB
187 if (core->flags & CLK_IGNORE_UNUSED)
188 return;
189
190 if (clk_core_is_prepared(core)) {
191 trace_clk_unprepare(core);
192 if (core->ops->unprepare_unused)
193 core->ops->unprepare_unused(core->hw);
194 else if (core->ops->unprepare)
195 core->ops->unprepare(core->hw);
196 trace_clk_unprepare_complete(core);
197 }
1af599df
PG
198}
199
4dff95dc 200static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 201{
035a61c3 202 struct clk_core *child;
4dff95dc 203 unsigned long flags;
1af599df 204
4dff95dc 205 lockdep_assert_held(&prepare_lock);
1af599df 206
4dff95dc
SB
207 hlist_for_each_entry(child, &core->children, child_node)
208 clk_disable_unused_subtree(child);
1af599df 209
4dff95dc
SB
210 flags = clk_enable_lock();
211
212 if (core->enable_count)
213 goto unlock_out;
214
215 if (core->flags & CLK_IGNORE_UNUSED)
216 goto unlock_out;
217
218 /*
219 * some gate clocks have special needs during the disable-unused
220 * sequence. call .disable_unused if available, otherwise fall
221 * back to .disable
222 */
223 if (clk_core_is_enabled(core)) {
224 trace_clk_disable(core);
225 if (core->ops->disable_unused)
226 core->ops->disable_unused(core->hw);
227 else if (core->ops->disable)
228 core->ops->disable(core->hw);
229 trace_clk_disable_complete(core);
230 }
231
232unlock_out:
233 clk_enable_unlock(flags);
1af599df
PG
234}
235
4dff95dc
SB
236static bool clk_ignore_unused;
237static int __init clk_ignore_unused_setup(char *__unused)
1af599df 238{
4dff95dc
SB
239 clk_ignore_unused = true;
240 return 1;
241}
242__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 243
4dff95dc
SB
244static int clk_disable_unused(void)
245{
246 struct clk_core *core;
247
248 if (clk_ignore_unused) {
249 pr_warn("clk: Not disabling unused clocks\n");
250 return 0;
251 }
1af599df 252
eab89f69 253 clk_prepare_lock();
1af599df 254
4dff95dc
SB
255 hlist_for_each_entry(core, &clk_root_list, child_node)
256 clk_disable_unused_subtree(core);
257
258 hlist_for_each_entry(core, &clk_orphan_list, child_node)
259 clk_disable_unused_subtree(core);
260
261 hlist_for_each_entry(core, &clk_root_list, child_node)
262 clk_unprepare_unused_subtree(core);
263
264 hlist_for_each_entry(core, &clk_orphan_list, child_node)
265 clk_unprepare_unused_subtree(core);
1af599df 266
eab89f69 267 clk_prepare_unlock();
1af599df
PG
268
269 return 0;
270}
4dff95dc 271late_initcall_sync(clk_disable_unused);
1af599df 272
4dff95dc 273/*** helper functions ***/
1af599df 274
b76281cb 275const char *__clk_get_name(const struct clk *clk)
1af599df 276{
4dff95dc 277 return !clk ? NULL : clk->core->name;
1af599df 278}
4dff95dc 279EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 280
e7df6f6e 281const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
282{
283 return hw->core->name;
284}
285EXPORT_SYMBOL_GPL(clk_hw_get_name);
286
4dff95dc
SB
287struct clk_hw *__clk_get_hw(struct clk *clk)
288{
289 return !clk ? NULL : clk->core->hw;
290}
291EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 292
e7df6f6e 293unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
294{
295 return hw->core->num_parents;
296}
297EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
298
e7df6f6e 299struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
300{
301 return hw->core->parent ? hw->core->parent->hw : NULL;
302}
303EXPORT_SYMBOL_GPL(clk_hw_get_parent);
304
4dff95dc
SB
305static struct clk_core *__clk_lookup_subtree(const char *name,
306 struct clk_core *core)
bddca894 307{
035a61c3 308 struct clk_core *child;
4dff95dc 309 struct clk_core *ret;
bddca894 310
4dff95dc
SB
311 if (!strcmp(core->name, name))
312 return core;
bddca894 313
4dff95dc
SB
314 hlist_for_each_entry(child, &core->children, child_node) {
315 ret = __clk_lookup_subtree(name, child);
316 if (ret)
317 return ret;
bddca894
PG
318 }
319
4dff95dc 320 return NULL;
bddca894
PG
321}
322
4dff95dc 323static struct clk_core *clk_core_lookup(const char *name)
bddca894 324{
4dff95dc
SB
325 struct clk_core *root_clk;
326 struct clk_core *ret;
bddca894 327
4dff95dc
SB
328 if (!name)
329 return NULL;
bddca894 330
4dff95dc
SB
331 /* search the 'proper' clk tree first */
332 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
333 ret = __clk_lookup_subtree(name, root_clk);
334 if (ret)
335 return ret;
bddca894
PG
336 }
337
4dff95dc
SB
338 /* if not found, then search the orphan tree */
339 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
340 ret = __clk_lookup_subtree(name, root_clk);
341 if (ret)
342 return ret;
343 }
bddca894 344
4dff95dc 345 return NULL;
bddca894
PG
346}
347
4dff95dc
SB
348static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
349 u8 index)
bddca894 350{
4dff95dc
SB
351 if (!core || index >= core->num_parents)
352 return NULL;
88cfbef2
MY
353
354 if (!core->parents[index])
355 core->parents[index] =
356 clk_core_lookup(core->parent_names[index]);
357
358 return core->parents[index];
bddca894
PG
359}
360
e7df6f6e
SB
361struct clk_hw *
362clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
363{
364 struct clk_core *parent;
365
366 parent = clk_core_get_parent_by_index(hw->core, index);
367
368 return !parent ? NULL : parent->hw;
369}
370EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
371
4dff95dc
SB
372unsigned int __clk_get_enable_count(struct clk *clk)
373{
374 return !clk ? 0 : clk->core->enable_count;
375}
b2476490 376
4dff95dc
SB
377static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
378{
379 unsigned long ret;
b2476490 380
4dff95dc
SB
381 if (!core) {
382 ret = 0;
383 goto out;
384 }
b2476490 385
4dff95dc 386 ret = core->rate;
b2476490 387
4dff95dc
SB
388 if (core->flags & CLK_IS_ROOT)
389 goto out;
c646cbf1 390
4dff95dc
SB
391 if (!core->parent)
392 ret = 0;
b2476490 393
b2476490
MT
394out:
395 return ret;
396}
397
e7df6f6e 398unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
399{
400 return clk_core_get_rate_nolock(hw->core);
401}
402EXPORT_SYMBOL_GPL(clk_hw_get_rate);
403
4dff95dc
SB
404static unsigned long __clk_get_accuracy(struct clk_core *core)
405{
406 if (!core)
407 return 0;
b2476490 408
4dff95dc 409 return core->accuracy;
b2476490
MT
410}
411
4dff95dc 412unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 413{
4dff95dc 414 return !clk ? 0 : clk->core->flags;
fcb0ee6a 415}
4dff95dc 416EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 417
e7df6f6e 418unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
419{
420 return hw->core->flags;
421}
422EXPORT_SYMBOL_GPL(clk_hw_get_flags);
423
e7df6f6e 424bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
425{
426 return clk_core_is_prepared(hw->core);
427}
428
be68bf88
JE
429bool clk_hw_is_enabled(const struct clk_hw *hw)
430{
431 return clk_core_is_enabled(hw->core);
432}
433
4dff95dc 434bool __clk_is_enabled(struct clk *clk)
b2476490 435{
4dff95dc
SB
436 if (!clk)
437 return false;
b2476490 438
4dff95dc
SB
439 return clk_core_is_enabled(clk->core);
440}
441EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 442
4dff95dc
SB
443static bool mux_is_better_rate(unsigned long rate, unsigned long now,
444 unsigned long best, unsigned long flags)
445{
446 if (flags & CLK_MUX_ROUND_CLOSEST)
447 return abs(now - rate) < abs(best - rate);
1af599df 448
4dff95dc
SB
449 return now <= rate && now > best;
450}
bddca894 451
0817b62c
BB
452static int
453clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req,
4dff95dc
SB
454 unsigned long flags)
455{
456 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
457 int i, num_parents, ret;
458 unsigned long best = 0;
459 struct clk_rate_request parent_req = *req;
b2476490 460
4dff95dc
SB
461 /* if NO_REPARENT flag set, pass through to current parent */
462 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
463 parent = core->parent;
0817b62c
BB
464 if (core->flags & CLK_SET_RATE_PARENT) {
465 ret = __clk_determine_rate(parent ? parent->hw : NULL,
466 &parent_req);
467 if (ret)
468 return ret;
469
470 best = parent_req.rate;
471 } else if (parent) {
4dff95dc 472 best = clk_core_get_rate_nolock(parent);
0817b62c 473 } else {
4dff95dc 474 best = clk_core_get_rate_nolock(core);
0817b62c
BB
475 }
476
4dff95dc
SB
477 goto out;
478 }
b2476490 479
4dff95dc
SB
480 /* find the parent that can provide the fastest rate <= rate */
481 num_parents = core->num_parents;
482 for (i = 0; i < num_parents; i++) {
483 parent = clk_core_get_parent_by_index(core, i);
484 if (!parent)
485 continue;
0817b62c
BB
486
487 if (core->flags & CLK_SET_RATE_PARENT) {
488 parent_req = *req;
489 ret = __clk_determine_rate(parent->hw, &parent_req);
490 if (ret)
491 continue;
492 } else {
493 parent_req.rate = clk_core_get_rate_nolock(parent);
494 }
495
496 if (mux_is_better_rate(req->rate, parent_req.rate,
497 best, flags)) {
4dff95dc 498 best_parent = parent;
0817b62c 499 best = parent_req.rate;
4dff95dc
SB
500 }
501 }
b2476490 502
57d866e6
BB
503 if (!best_parent)
504 return -EINVAL;
505
4dff95dc
SB
506out:
507 if (best_parent)
0817b62c
BB
508 req->best_parent_hw = best_parent->hw;
509 req->best_parent_rate = best;
510 req->rate = best;
b2476490 511
0817b62c 512 return 0;
b33d212f 513}
4dff95dc
SB
514
515struct clk *__clk_lookup(const char *name)
fcb0ee6a 516{
4dff95dc
SB
517 struct clk_core *core = clk_core_lookup(name);
518
519 return !core ? NULL : core->hw->clk;
fcb0ee6a 520}
b2476490 521
4dff95dc
SB
522static void clk_core_get_boundaries(struct clk_core *core,
523 unsigned long *min_rate,
524 unsigned long *max_rate)
1c155b3d 525{
4dff95dc 526 struct clk *clk_user;
1c155b3d 527
9783c0d9
SB
528 *min_rate = core->min_rate;
529 *max_rate = core->max_rate;
496eadf8 530
4dff95dc
SB
531 hlist_for_each_entry(clk_user, &core->clks, clks_node)
532 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 533
4dff95dc
SB
534 hlist_for_each_entry(clk_user, &core->clks, clks_node)
535 *max_rate = min(*max_rate, clk_user->max_rate);
536}
1c155b3d 537
9783c0d9
SB
538void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
539 unsigned long max_rate)
540{
541 hw->core->min_rate = min_rate;
542 hw->core->max_rate = max_rate;
543}
544EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
545
4dff95dc
SB
546/*
547 * Helper for finding best parent to provide a given frequency. This can be used
548 * directly as a determine_rate callback (e.g. for a mux), or from a more
549 * complex clock that may combine a mux with other operations.
550 */
0817b62c
BB
551int __clk_mux_determine_rate(struct clk_hw *hw,
552 struct clk_rate_request *req)
4dff95dc 553{
0817b62c 554 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 555}
4dff95dc 556EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 557
0817b62c
BB
558int __clk_mux_determine_rate_closest(struct clk_hw *hw,
559 struct clk_rate_request *req)
b2476490 560{
0817b62c 561 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
562}
563EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 564
4dff95dc 565/*** clk api ***/
496eadf8 566
4dff95dc
SB
567static void clk_core_unprepare(struct clk_core *core)
568{
a6334725
SB
569 lockdep_assert_held(&prepare_lock);
570
4dff95dc
SB
571 if (!core)
572 return;
b2476490 573
4dff95dc
SB
574 if (WARN_ON(core->prepare_count == 0))
575 return;
b2476490 576
4dff95dc
SB
577 if (--core->prepare_count > 0)
578 return;
b2476490 579
4dff95dc 580 WARN_ON(core->enable_count > 0);
b2476490 581
4dff95dc 582 trace_clk_unprepare(core);
b2476490 583
4dff95dc
SB
584 if (core->ops->unprepare)
585 core->ops->unprepare(core->hw);
586
587 trace_clk_unprepare_complete(core);
588 clk_core_unprepare(core->parent);
b2476490
MT
589}
590
4dff95dc
SB
591/**
592 * clk_unprepare - undo preparation of a clock source
593 * @clk: the clk being unprepared
594 *
595 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
596 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
597 * if the operation may sleep. One example is a clk which is accessed over
598 * I2c. In the complex case a clk gate operation may require a fast and a slow
599 * part. It is this reason that clk_unprepare and clk_disable are not mutually
600 * exclusive. In fact clk_disable must be called before clk_unprepare.
601 */
602void clk_unprepare(struct clk *clk)
1e435256 603{
4dff95dc
SB
604 if (IS_ERR_OR_NULL(clk))
605 return;
606
607 clk_prepare_lock();
608 clk_core_unprepare(clk->core);
609 clk_prepare_unlock();
1e435256 610}
4dff95dc 611EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 612
4dff95dc 613static int clk_core_prepare(struct clk_core *core)
b2476490 614{
4dff95dc 615 int ret = 0;
b2476490 616
a6334725
SB
617 lockdep_assert_held(&prepare_lock);
618
4dff95dc 619 if (!core)
1e435256 620 return 0;
1e435256 621
4dff95dc
SB
622 if (core->prepare_count == 0) {
623 ret = clk_core_prepare(core->parent);
624 if (ret)
625 return ret;
b2476490 626
4dff95dc 627 trace_clk_prepare(core);
b2476490 628
4dff95dc
SB
629 if (core->ops->prepare)
630 ret = core->ops->prepare(core->hw);
b2476490 631
4dff95dc 632 trace_clk_prepare_complete(core);
1c155b3d 633
4dff95dc
SB
634 if (ret) {
635 clk_core_unprepare(core->parent);
636 return ret;
637 }
638 }
1c155b3d 639
4dff95dc 640 core->prepare_count++;
b2476490
MT
641
642 return 0;
643}
b2476490 644
4dff95dc
SB
645/**
646 * clk_prepare - prepare a clock source
647 * @clk: the clk being prepared
648 *
649 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
650 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
651 * operation may sleep. One example is a clk which is accessed over I2c. In
652 * the complex case a clk ungate operation may require a fast and a slow part.
653 * It is this reason that clk_prepare and clk_enable are not mutually
654 * exclusive. In fact clk_prepare must be called before clk_enable.
655 * Returns 0 on success, -EERROR otherwise.
656 */
657int clk_prepare(struct clk *clk)
b2476490 658{
4dff95dc 659 int ret;
b2476490 660
4dff95dc
SB
661 if (!clk)
662 return 0;
b2476490 663
4dff95dc
SB
664 clk_prepare_lock();
665 ret = clk_core_prepare(clk->core);
666 clk_prepare_unlock();
667
668 return ret;
b2476490 669}
4dff95dc 670EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 671
4dff95dc 672static void clk_core_disable(struct clk_core *core)
b2476490 673{
a6334725
SB
674 lockdep_assert_held(&enable_lock);
675
4dff95dc
SB
676 if (!core)
677 return;
035a61c3 678
4dff95dc
SB
679 if (WARN_ON(core->enable_count == 0))
680 return;
b2476490 681
4dff95dc
SB
682 if (--core->enable_count > 0)
683 return;
035a61c3 684
4dff95dc 685 trace_clk_disable(core);
035a61c3 686
4dff95dc
SB
687 if (core->ops->disable)
688 core->ops->disable(core->hw);
035a61c3 689
4dff95dc 690 trace_clk_disable_complete(core);
035a61c3 691
4dff95dc 692 clk_core_disable(core->parent);
035a61c3 693}
7ef3dcc8 694
4dff95dc
SB
695/**
696 * clk_disable - gate a clock
697 * @clk: the clk being gated
698 *
699 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
700 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
701 * clk if the operation is fast and will never sleep. One example is a
702 * SoC-internal clk which is controlled via simple register writes. In the
703 * complex case a clk gate operation may require a fast and a slow part. It is
704 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
705 * In fact clk_disable must be called before clk_unprepare.
706 */
707void clk_disable(struct clk *clk)
b2476490 708{
4dff95dc
SB
709 unsigned long flags;
710
711 if (IS_ERR_OR_NULL(clk))
712 return;
713
714 flags = clk_enable_lock();
715 clk_core_disable(clk->core);
716 clk_enable_unlock(flags);
b2476490 717}
4dff95dc 718EXPORT_SYMBOL_GPL(clk_disable);
b2476490 719
4dff95dc 720static int clk_core_enable(struct clk_core *core)
b2476490 721{
4dff95dc 722 int ret = 0;
b2476490 723
a6334725
SB
724 lockdep_assert_held(&enable_lock);
725
4dff95dc
SB
726 if (!core)
727 return 0;
b2476490 728
4dff95dc
SB
729 if (WARN_ON(core->prepare_count == 0))
730 return -ESHUTDOWN;
b2476490 731
4dff95dc
SB
732 if (core->enable_count == 0) {
733 ret = clk_core_enable(core->parent);
b2476490 734
4dff95dc
SB
735 if (ret)
736 return ret;
b2476490 737
4dff95dc 738 trace_clk_enable(core);
035a61c3 739
4dff95dc
SB
740 if (core->ops->enable)
741 ret = core->ops->enable(core->hw);
035a61c3 742
4dff95dc
SB
743 trace_clk_enable_complete(core);
744
745 if (ret) {
746 clk_core_disable(core->parent);
747 return ret;
748 }
749 }
750
751 core->enable_count++;
752 return 0;
035a61c3 753}
b2476490 754
4dff95dc
SB
755/**
756 * clk_enable - ungate a clock
757 * @clk: the clk being ungated
758 *
759 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
760 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
761 * if the operation will never sleep. One example is a SoC-internal clk which
762 * is controlled via simple register writes. In the complex case a clk ungate
763 * operation may require a fast and a slow part. It is this reason that
764 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
765 * must be called before clk_enable. Returns 0 on success, -EERROR
766 * otherwise.
767 */
768int clk_enable(struct clk *clk)
5279fc40 769{
4dff95dc
SB
770 unsigned long flags;
771 int ret;
772
773 if (!clk)
5279fc40
BB
774 return 0;
775
4dff95dc
SB
776 flags = clk_enable_lock();
777 ret = clk_core_enable(clk->core);
778 clk_enable_unlock(flags);
5279fc40 779
4dff95dc 780 return ret;
b2476490 781}
4dff95dc 782EXPORT_SYMBOL_GPL(clk_enable);
b2476490 783
0817b62c
BB
784static int clk_core_round_rate_nolock(struct clk_core *core,
785 struct clk_rate_request *req)
3d6ee287 786{
4dff95dc 787 struct clk_core *parent;
0817b62c 788 long rate;
4dff95dc
SB
789
790 lockdep_assert_held(&prepare_lock);
3d6ee287 791
d6968fca 792 if (!core)
4dff95dc 793 return 0;
3d6ee287 794
4dff95dc 795 parent = core->parent;
0817b62c
BB
796 if (parent) {
797 req->best_parent_hw = parent->hw;
798 req->best_parent_rate = parent->rate;
799 } else {
800 req->best_parent_hw = NULL;
801 req->best_parent_rate = 0;
802 }
3d6ee287 803
4dff95dc 804 if (core->ops->determine_rate) {
0817b62c
BB
805 return core->ops->determine_rate(core->hw, req);
806 } else if (core->ops->round_rate) {
807 rate = core->ops->round_rate(core->hw, req->rate,
808 &req->best_parent_rate);
809 if (rate < 0)
810 return rate;
811
812 req->rate = rate;
813 } else if (core->flags & CLK_SET_RATE_PARENT) {
814 return clk_core_round_rate_nolock(parent, req);
815 } else {
816 req->rate = core->rate;
817 }
818
819 return 0;
3d6ee287
UH
820}
821
4dff95dc
SB
822/**
823 * __clk_determine_rate - get the closest rate actually supported by a clock
824 * @hw: determine the rate of this clock
825 * @rate: target rate
826 * @min_rate: returned rate must be greater than this rate
827 * @max_rate: returned rate must be less than this rate
828 *
6e5ab41b 829 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 830 */
0817b62c 831int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 832{
0817b62c
BB
833 if (!hw) {
834 req->rate = 0;
4dff95dc 835 return 0;
0817b62c 836 }
035a61c3 837
0817b62c 838 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 839}
4dff95dc 840EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 841
1a9c069c
SB
842unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
843{
844 int ret;
845 struct clk_rate_request req;
846
847 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
848 req.rate = rate;
849
850 ret = clk_core_round_rate_nolock(hw->core, &req);
851 if (ret)
852 return 0;
853
854 return req.rate;
855}
856EXPORT_SYMBOL_GPL(clk_hw_round_rate);
857
4dff95dc
SB
858/**
859 * clk_round_rate - round the given rate for a clk
860 * @clk: the clk for which we are rounding a rate
861 * @rate: the rate which is to be rounded
862 *
863 * Takes in a rate as input and rounds it to a rate that the clk can actually
864 * use which is then returned. If clk doesn't support round_rate operation
865 * then the parent rate is returned.
866 */
867long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 868{
fc4a05d4
SB
869 struct clk_rate_request req;
870 int ret;
4dff95dc 871
035a61c3 872 if (!clk)
4dff95dc 873 return 0;
035a61c3 874
4dff95dc 875 clk_prepare_lock();
fc4a05d4
SB
876
877 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
878 req.rate = rate;
879
880 ret = clk_core_round_rate_nolock(clk->core, &req);
4dff95dc
SB
881 clk_prepare_unlock();
882
fc4a05d4
SB
883 if (ret)
884 return ret;
885
886 return req.rate;
035a61c3 887}
4dff95dc 888EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 889
4dff95dc
SB
890/**
891 * __clk_notify - call clk notifier chain
892 * @core: clk that is changing rate
893 * @msg: clk notifier type (see include/linux/clk.h)
894 * @old_rate: old clk rate
895 * @new_rate: new clk rate
896 *
897 * Triggers a notifier call chain on the clk rate-change notification
898 * for 'clk'. Passes a pointer to the struct clk and the previous
899 * and current rates to the notifier callback. Intended to be called by
900 * internal clock code only. Returns NOTIFY_DONE from the last driver
901 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
902 * a driver returns that.
903 */
904static int __clk_notify(struct clk_core *core, unsigned long msg,
905 unsigned long old_rate, unsigned long new_rate)
b2476490 906{
4dff95dc
SB
907 struct clk_notifier *cn;
908 struct clk_notifier_data cnd;
909 int ret = NOTIFY_DONE;
b2476490 910
4dff95dc
SB
911 cnd.old_rate = old_rate;
912 cnd.new_rate = new_rate;
b2476490 913
4dff95dc
SB
914 list_for_each_entry(cn, &clk_notifier_list, node) {
915 if (cn->clk->core == core) {
916 cnd.clk = cn->clk;
917 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
918 &cnd);
919 }
b2476490
MT
920 }
921
4dff95dc 922 return ret;
b2476490
MT
923}
924
4dff95dc
SB
925/**
926 * __clk_recalc_accuracies
927 * @core: first clk in the subtree
928 *
929 * Walks the subtree of clks starting with clk and recalculates accuracies as
930 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 931 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 932 * parent.
4dff95dc
SB
933 */
934static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 935{
4dff95dc
SB
936 unsigned long parent_accuracy = 0;
937 struct clk_core *child;
b2476490 938
4dff95dc 939 lockdep_assert_held(&prepare_lock);
b2476490 940
4dff95dc
SB
941 if (core->parent)
942 parent_accuracy = core->parent->accuracy;
b2476490 943
4dff95dc
SB
944 if (core->ops->recalc_accuracy)
945 core->accuracy = core->ops->recalc_accuracy(core->hw,
946 parent_accuracy);
947 else
948 core->accuracy = parent_accuracy;
b2476490 949
4dff95dc
SB
950 hlist_for_each_entry(child, &core->children, child_node)
951 __clk_recalc_accuracies(child);
b2476490
MT
952}
953
4dff95dc 954static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 955{
4dff95dc 956 unsigned long accuracy;
15a02c1f 957
4dff95dc
SB
958 clk_prepare_lock();
959 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
960 __clk_recalc_accuracies(core);
15a02c1f 961
4dff95dc
SB
962 accuracy = __clk_get_accuracy(core);
963 clk_prepare_unlock();
e366fdd7 964
4dff95dc 965 return accuracy;
e366fdd7 966}
15a02c1f 967
4dff95dc
SB
968/**
969 * clk_get_accuracy - return the accuracy of clk
970 * @clk: the clk whose accuracy is being returned
971 *
972 * Simply returns the cached accuracy of the clk, unless
973 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
974 * issued.
975 * If clk is NULL then returns 0.
976 */
977long clk_get_accuracy(struct clk *clk)
035a61c3 978{
4dff95dc
SB
979 if (!clk)
980 return 0;
035a61c3 981
4dff95dc 982 return clk_core_get_accuracy(clk->core);
035a61c3 983}
4dff95dc 984EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 985
4dff95dc
SB
986static unsigned long clk_recalc(struct clk_core *core,
987 unsigned long parent_rate)
1c8e6004 988{
4dff95dc
SB
989 if (core->ops->recalc_rate)
990 return core->ops->recalc_rate(core->hw, parent_rate);
991 return parent_rate;
1c8e6004
TV
992}
993
4dff95dc
SB
994/**
995 * __clk_recalc_rates
996 * @core: first clk in the subtree
997 * @msg: notification type (see include/linux/clk.h)
998 *
999 * Walks the subtree of clks starting with clk and recalculates rates as it
1000 * goes. Note that if a clk does not implement the .recalc_rate callback then
1001 * it is assumed that the clock will take on the rate of its parent.
1002 *
1003 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1004 * if necessary.
15a02c1f 1005 */
4dff95dc 1006static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1007{
4dff95dc
SB
1008 unsigned long old_rate;
1009 unsigned long parent_rate = 0;
1010 struct clk_core *child;
e366fdd7 1011
4dff95dc 1012 lockdep_assert_held(&prepare_lock);
15a02c1f 1013
4dff95dc 1014 old_rate = core->rate;
b2476490 1015
4dff95dc
SB
1016 if (core->parent)
1017 parent_rate = core->parent->rate;
b2476490 1018
4dff95dc 1019 core->rate = clk_recalc(core, parent_rate);
b2476490 1020
4dff95dc
SB
1021 /*
1022 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1023 * & ABORT_RATE_CHANGE notifiers
1024 */
1025 if (core->notifier_count && msg)
1026 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1027
4dff95dc
SB
1028 hlist_for_each_entry(child, &core->children, child_node)
1029 __clk_recalc_rates(child, msg);
1030}
b2476490 1031
4dff95dc
SB
1032static unsigned long clk_core_get_rate(struct clk_core *core)
1033{
1034 unsigned long rate;
dfc202ea 1035
4dff95dc 1036 clk_prepare_lock();
b2476490 1037
4dff95dc
SB
1038 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1039 __clk_recalc_rates(core, 0);
1040
1041 rate = clk_core_get_rate_nolock(core);
1042 clk_prepare_unlock();
1043
1044 return rate;
b2476490
MT
1045}
1046
1047/**
4dff95dc
SB
1048 * clk_get_rate - return the rate of clk
1049 * @clk: the clk whose rate is being returned
b2476490 1050 *
4dff95dc
SB
1051 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1052 * is set, which means a recalc_rate will be issued.
1053 * If clk is NULL then returns 0.
b2476490 1054 */
4dff95dc 1055unsigned long clk_get_rate(struct clk *clk)
b2476490 1056{
4dff95dc
SB
1057 if (!clk)
1058 return 0;
63589e92 1059
4dff95dc 1060 return clk_core_get_rate(clk->core);
b2476490 1061}
4dff95dc 1062EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1063
4dff95dc
SB
1064static int clk_fetch_parent_index(struct clk_core *core,
1065 struct clk_core *parent)
b2476490 1066{
4dff95dc 1067 int i;
b2476490 1068
4dff95dc
SB
1069 /*
1070 * find index of new parent clock using cached parent ptrs,
1071 * or if not yet cached, use string name comparison and cache
1072 * them now to avoid future calls to clk_core_lookup.
1073 */
1074 for (i = 0; i < core->num_parents; i++) {
1075 if (core->parents[i] == parent)
1076 return i;
dfc202ea 1077
4dff95dc
SB
1078 if (core->parents[i])
1079 continue;
dfc202ea 1080
4dff95dc
SB
1081 if (!strcmp(core->parent_names[i], parent->name)) {
1082 core->parents[i] = clk_core_lookup(parent->name);
1083 return i;
b2476490
MT
1084 }
1085 }
1086
4dff95dc 1087 return -EINVAL;
b2476490
MT
1088}
1089
e6500344
HS
1090/*
1091 * Update the orphan status of @core and all its children.
1092 */
1093static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1094{
1095 struct clk_core *child;
1096
1097 core->orphan = is_orphan;
1098
1099 hlist_for_each_entry(child, &core->children, child_node)
1100 clk_core_update_orphan_status(child, is_orphan);
1101}
1102
4dff95dc 1103static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1104{
e6500344
HS
1105 bool was_orphan = core->orphan;
1106
4dff95dc 1107 hlist_del(&core->child_node);
035a61c3 1108
4dff95dc 1109 if (new_parent) {
e6500344
HS
1110 bool becomes_orphan = new_parent->orphan;
1111
4dff95dc
SB
1112 /* avoid duplicate POST_RATE_CHANGE notifications */
1113 if (new_parent->new_child == core)
1114 new_parent->new_child = NULL;
b2476490 1115
4dff95dc 1116 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1117
1118 if (was_orphan != becomes_orphan)
1119 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1120 } else {
1121 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1122 if (!was_orphan)
1123 clk_core_update_orphan_status(core, true);
4dff95dc 1124 }
dfc202ea 1125
4dff95dc 1126 core->parent = new_parent;
035a61c3
TV
1127}
1128
4dff95dc
SB
1129static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1130 struct clk_core *parent)
b2476490
MT
1131{
1132 unsigned long flags;
4dff95dc 1133 struct clk_core *old_parent = core->parent;
b2476490 1134
4dff95dc
SB
1135 /*
1136 * Migrate prepare state between parents and prevent race with
1137 * clk_enable().
1138 *
1139 * If the clock is not prepared, then a race with
1140 * clk_enable/disable() is impossible since we already have the
1141 * prepare lock (future calls to clk_enable() need to be preceded by
1142 * a clk_prepare()).
1143 *
1144 * If the clock is prepared, migrate the prepared state to the new
1145 * parent and also protect against a race with clk_enable() by
1146 * forcing the clock and the new parent on. This ensures that all
1147 * future calls to clk_enable() are practically NOPs with respect to
1148 * hardware and software states.
1149 *
1150 * See also: Comment for clk_set_parent() below.
1151 */
1152 if (core->prepare_count) {
1153 clk_core_prepare(parent);
d2a5d46b 1154 flags = clk_enable_lock();
4dff95dc
SB
1155 clk_core_enable(parent);
1156 clk_core_enable(core);
d2a5d46b 1157 clk_enable_unlock(flags);
4dff95dc 1158 }
63589e92 1159
4dff95dc 1160 /* update the clk tree topology */
eab89f69 1161 flags = clk_enable_lock();
4dff95dc 1162 clk_reparent(core, parent);
eab89f69 1163 clk_enable_unlock(flags);
4dff95dc
SB
1164
1165 return old_parent;
b2476490 1166}
b2476490 1167
4dff95dc
SB
1168static void __clk_set_parent_after(struct clk_core *core,
1169 struct clk_core *parent,
1170 struct clk_core *old_parent)
b2476490 1171{
d2a5d46b
DA
1172 unsigned long flags;
1173
4dff95dc
SB
1174 /*
1175 * Finish the migration of prepare state and undo the changes done
1176 * for preventing a race with clk_enable().
1177 */
1178 if (core->prepare_count) {
d2a5d46b 1179 flags = clk_enable_lock();
4dff95dc
SB
1180 clk_core_disable(core);
1181 clk_core_disable(old_parent);
d2a5d46b 1182 clk_enable_unlock(flags);
4dff95dc
SB
1183 clk_core_unprepare(old_parent);
1184 }
1185}
b2476490 1186
4dff95dc
SB
1187static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1188 u8 p_index)
1189{
1190 unsigned long flags;
1191 int ret = 0;
1192 struct clk_core *old_parent;
b2476490 1193
4dff95dc 1194 old_parent = __clk_set_parent_before(core, parent);
b2476490 1195
4dff95dc 1196 trace_clk_set_parent(core, parent);
b2476490 1197
4dff95dc
SB
1198 /* change clock input source */
1199 if (parent && core->ops->set_parent)
1200 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1201
4dff95dc 1202 trace_clk_set_parent_complete(core, parent);
dfc202ea 1203
4dff95dc
SB
1204 if (ret) {
1205 flags = clk_enable_lock();
1206 clk_reparent(core, old_parent);
1207 clk_enable_unlock(flags);
c660b2eb 1208 __clk_set_parent_after(core, old_parent, parent);
dfc202ea 1209
4dff95dc 1210 return ret;
b2476490
MT
1211 }
1212
4dff95dc
SB
1213 __clk_set_parent_after(core, parent, old_parent);
1214
b2476490
MT
1215 return 0;
1216}
1217
1218/**
4dff95dc
SB
1219 * __clk_speculate_rates
1220 * @core: first clk in the subtree
1221 * @parent_rate: the "future" rate of clk's parent
b2476490 1222 *
4dff95dc
SB
1223 * Walks the subtree of clks starting with clk, speculating rates as it
1224 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1225 *
1226 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1227 * pre-rate change notifications and returns early if no clks in the
1228 * subtree have subscribed to the notifications. Note that if a clk does not
1229 * implement the .recalc_rate callback then it is assumed that the clock will
1230 * take on the rate of its parent.
b2476490 1231 */
4dff95dc
SB
1232static int __clk_speculate_rates(struct clk_core *core,
1233 unsigned long parent_rate)
b2476490 1234{
4dff95dc
SB
1235 struct clk_core *child;
1236 unsigned long new_rate;
1237 int ret = NOTIFY_DONE;
b2476490 1238
4dff95dc 1239 lockdep_assert_held(&prepare_lock);
864e160a 1240
4dff95dc
SB
1241 new_rate = clk_recalc(core, parent_rate);
1242
1243 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1244 if (core->notifier_count)
1245 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1246
1247 if (ret & NOTIFY_STOP_MASK) {
1248 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1249 __func__, core->name, ret);
1250 goto out;
1251 }
1252
1253 hlist_for_each_entry(child, &core->children, child_node) {
1254 ret = __clk_speculate_rates(child, new_rate);
1255 if (ret & NOTIFY_STOP_MASK)
1256 break;
1257 }
b2476490 1258
4dff95dc 1259out:
b2476490
MT
1260 return ret;
1261}
b2476490 1262
4dff95dc
SB
1263static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1264 struct clk_core *new_parent, u8 p_index)
b2476490 1265{
4dff95dc 1266 struct clk_core *child;
b2476490 1267
4dff95dc
SB
1268 core->new_rate = new_rate;
1269 core->new_parent = new_parent;
1270 core->new_parent_index = p_index;
1271 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1272 core->new_child = NULL;
1273 if (new_parent && new_parent != core->parent)
1274 new_parent->new_child = core;
496eadf8 1275
4dff95dc
SB
1276 hlist_for_each_entry(child, &core->children, child_node) {
1277 child->new_rate = clk_recalc(child, new_rate);
1278 clk_calc_subtree(child, child->new_rate, NULL, 0);
1279 }
1280}
b2476490 1281
4dff95dc
SB
1282/*
1283 * calculate the new rates returning the topmost clock that has to be
1284 * changed.
1285 */
1286static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1287 unsigned long rate)
1288{
1289 struct clk_core *top = core;
1290 struct clk_core *old_parent, *parent;
4dff95dc
SB
1291 unsigned long best_parent_rate = 0;
1292 unsigned long new_rate;
1293 unsigned long min_rate;
1294 unsigned long max_rate;
1295 int p_index = 0;
1296 long ret;
1297
1298 /* sanity */
1299 if (IS_ERR_OR_NULL(core))
1300 return NULL;
1301
1302 /* save parent rate, if it exists */
1303 parent = old_parent = core->parent;
71472c0c 1304 if (parent)
4dff95dc 1305 best_parent_rate = parent->rate;
71472c0c 1306
4dff95dc
SB
1307 clk_core_get_boundaries(core, &min_rate, &max_rate);
1308
1309 /* find the closest rate and parent clk/rate */
d6968fca 1310 if (core->ops->determine_rate) {
0817b62c
BB
1311 struct clk_rate_request req;
1312
1313 req.rate = rate;
1314 req.min_rate = min_rate;
1315 req.max_rate = max_rate;
1316 if (parent) {
1317 req.best_parent_hw = parent->hw;
1318 req.best_parent_rate = parent->rate;
1319 } else {
1320 req.best_parent_hw = NULL;
1321 req.best_parent_rate = 0;
1322 }
1323
1324 ret = core->ops->determine_rate(core->hw, &req);
4dff95dc
SB
1325 if (ret < 0)
1326 return NULL;
1c8e6004 1327
0817b62c
BB
1328 best_parent_rate = req.best_parent_rate;
1329 new_rate = req.rate;
1330 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
4dff95dc
SB
1331 } else if (core->ops->round_rate) {
1332 ret = core->ops->round_rate(core->hw, rate,
0817b62c 1333 &best_parent_rate);
4dff95dc
SB
1334 if (ret < 0)
1335 return NULL;
035a61c3 1336
4dff95dc
SB
1337 new_rate = ret;
1338 if (new_rate < min_rate || new_rate > max_rate)
1339 return NULL;
1340 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1341 /* pass-through clock without adjustable parent */
1342 core->new_rate = core->rate;
1343 return NULL;
1344 } else {
1345 /* pass-through clock with adjustable parent */
1346 top = clk_calc_new_rates(parent, rate);
1347 new_rate = parent->new_rate;
1348 goto out;
1349 }
1c8e6004 1350
4dff95dc
SB
1351 /* some clocks must be gated to change parent */
1352 if (parent != old_parent &&
1353 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1354 pr_debug("%s: %s not gated but wants to reparent\n",
1355 __func__, core->name);
1356 return NULL;
1357 }
b2476490 1358
4dff95dc
SB
1359 /* try finding the new parent index */
1360 if (parent && core->num_parents > 1) {
1361 p_index = clk_fetch_parent_index(core, parent);
1362 if (p_index < 0) {
1363 pr_debug("%s: clk %s can not be parent of clk %s\n",
1364 __func__, parent->name, core->name);
1365 return NULL;
1366 }
1367 }
b2476490 1368
4dff95dc
SB
1369 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1370 best_parent_rate != parent->rate)
1371 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1372
4dff95dc
SB
1373out:
1374 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1375
4dff95dc 1376 return top;
b2476490 1377}
b2476490 1378
4dff95dc
SB
1379/*
1380 * Notify about rate changes in a subtree. Always walk down the whole tree
1381 * so that in case of an error we can walk down the whole tree again and
1382 * abort the change.
b2476490 1383 */
4dff95dc
SB
1384static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1385 unsigned long event)
b2476490 1386{
4dff95dc 1387 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1388 int ret = NOTIFY_DONE;
1389
4dff95dc
SB
1390 if (core->rate == core->new_rate)
1391 return NULL;
b2476490 1392
4dff95dc
SB
1393 if (core->notifier_count) {
1394 ret = __clk_notify(core, event, core->rate, core->new_rate);
1395 if (ret & NOTIFY_STOP_MASK)
1396 fail_clk = core;
b2476490
MT
1397 }
1398
4dff95dc
SB
1399 hlist_for_each_entry(child, &core->children, child_node) {
1400 /* Skip children who will be reparented to another clock */
1401 if (child->new_parent && child->new_parent != core)
1402 continue;
1403 tmp_clk = clk_propagate_rate_change(child, event);
1404 if (tmp_clk)
1405 fail_clk = tmp_clk;
1406 }
5279fc40 1407
4dff95dc
SB
1408 /* handle the new child who might not be in core->children yet */
1409 if (core->new_child) {
1410 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1411 if (tmp_clk)
1412 fail_clk = tmp_clk;
1413 }
5279fc40 1414
4dff95dc 1415 return fail_clk;
5279fc40
BB
1416}
1417
4dff95dc
SB
1418/*
1419 * walk down a subtree and set the new rates notifying the rate
1420 * change on the way
1421 */
1422static void clk_change_rate(struct clk_core *core)
035a61c3 1423{
4dff95dc
SB
1424 struct clk_core *child;
1425 struct hlist_node *tmp;
1426 unsigned long old_rate;
1427 unsigned long best_parent_rate = 0;
1428 bool skip_set_rate = false;
1429 struct clk_core *old_parent;
035a61c3 1430
4dff95dc 1431 old_rate = core->rate;
035a61c3 1432
4dff95dc
SB
1433 if (core->new_parent)
1434 best_parent_rate = core->new_parent->rate;
1435 else if (core->parent)
1436 best_parent_rate = core->parent->rate;
035a61c3 1437
2eb8c710
HS
1438 if (core->flags & CLK_SET_RATE_UNGATE) {
1439 unsigned long flags;
1440
1441 clk_core_prepare(core);
1442 flags = clk_enable_lock();
1443 clk_core_enable(core);
1444 clk_enable_unlock(flags);
1445 }
1446
4dff95dc
SB
1447 if (core->new_parent && core->new_parent != core->parent) {
1448 old_parent = __clk_set_parent_before(core, core->new_parent);
1449 trace_clk_set_parent(core, core->new_parent);
5279fc40 1450
4dff95dc
SB
1451 if (core->ops->set_rate_and_parent) {
1452 skip_set_rate = true;
1453 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1454 best_parent_rate,
1455 core->new_parent_index);
1456 } else if (core->ops->set_parent) {
1457 core->ops->set_parent(core->hw, core->new_parent_index);
1458 }
5279fc40 1459
4dff95dc
SB
1460 trace_clk_set_parent_complete(core, core->new_parent);
1461 __clk_set_parent_after(core, core->new_parent, old_parent);
1462 }
8f2c2db1 1463
4dff95dc 1464 trace_clk_set_rate(core, core->new_rate);
b2476490 1465
4dff95dc
SB
1466 if (!skip_set_rate && core->ops->set_rate)
1467 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1468
4dff95dc 1469 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1470
4dff95dc 1471 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1472
2eb8c710
HS
1473 if (core->flags & CLK_SET_RATE_UNGATE) {
1474 unsigned long flags;
1475
1476 flags = clk_enable_lock();
1477 clk_core_disable(core);
1478 clk_enable_unlock(flags);
1479 clk_core_unprepare(core);
1480 }
1481
4dff95dc
SB
1482 if (core->notifier_count && old_rate != core->rate)
1483 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 1484
85e88fab
MT
1485 if (core->flags & CLK_RECALC_NEW_RATES)
1486 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 1487
b2476490 1488 /*
4dff95dc
SB
1489 * Use safe iteration, as change_rate can actually swap parents
1490 * for certain clock types.
b2476490 1491 */
4dff95dc
SB
1492 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1493 /* Skip children who will be reparented to another clock */
1494 if (child->new_parent && child->new_parent != core)
1495 continue;
1496 clk_change_rate(child);
1497 }
b2476490 1498
4dff95dc
SB
1499 /* handle the new child who might not be in core->children yet */
1500 if (core->new_child)
1501 clk_change_rate(core->new_child);
b2476490
MT
1502}
1503
4dff95dc
SB
1504static int clk_core_set_rate_nolock(struct clk_core *core,
1505 unsigned long req_rate)
a093bde2 1506{
4dff95dc
SB
1507 struct clk_core *top, *fail_clk;
1508 unsigned long rate = req_rate;
1509 int ret = 0;
a093bde2 1510
4dff95dc
SB
1511 if (!core)
1512 return 0;
a093bde2 1513
4dff95dc
SB
1514 /* bail early if nothing to do */
1515 if (rate == clk_core_get_rate_nolock(core))
1516 return 0;
a093bde2 1517
4dff95dc
SB
1518 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1519 return -EBUSY;
a093bde2 1520
4dff95dc
SB
1521 /* calculate new rates and get the topmost changed clock */
1522 top = clk_calc_new_rates(core, rate);
1523 if (!top)
1524 return -EINVAL;
1525
1526 /* notify that we are about to change rates */
1527 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1528 if (fail_clk) {
1529 pr_debug("%s: failed to set %s rate\n", __func__,
1530 fail_clk->name);
1531 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1532 return -EBUSY;
1533 }
1534
1535 /* change the rates */
1536 clk_change_rate(top);
1537
1538 core->req_rate = req_rate;
1539
1540 return ret;
a093bde2 1541}
035a61c3
TV
1542
1543/**
4dff95dc
SB
1544 * clk_set_rate - specify a new rate for clk
1545 * @clk: the clk whose rate is being changed
1546 * @rate: the new rate for clk
035a61c3 1547 *
4dff95dc
SB
1548 * In the simplest case clk_set_rate will only adjust the rate of clk.
1549 *
1550 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1551 * propagate up to clk's parent; whether or not this happens depends on the
1552 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1553 * after calling .round_rate then upstream parent propagation is ignored. If
1554 * *parent_rate comes back with a new rate for clk's parent then we propagate
1555 * up to clk's parent and set its rate. Upward propagation will continue
1556 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1557 * .round_rate stops requesting changes to clk's parent_rate.
1558 *
1559 * Rate changes are accomplished via tree traversal that also recalculates the
1560 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1561 *
1562 * Returns 0 on success, -EERROR otherwise.
035a61c3 1563 */
4dff95dc 1564int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1565{
4dff95dc
SB
1566 int ret;
1567
035a61c3
TV
1568 if (!clk)
1569 return 0;
1570
4dff95dc
SB
1571 /* prevent racing with updates to the clock topology */
1572 clk_prepare_lock();
da0f0b2c 1573
4dff95dc 1574 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1575
4dff95dc 1576 clk_prepare_unlock();
4935b22c 1577
4dff95dc 1578 return ret;
4935b22c 1579}
4dff95dc 1580EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1581
4dff95dc
SB
1582/**
1583 * clk_set_rate_range - set a rate range for a clock source
1584 * @clk: clock source
1585 * @min: desired minimum clock rate in Hz, inclusive
1586 * @max: desired maximum clock rate in Hz, inclusive
1587 *
1588 * Returns success (0) or negative errno.
1589 */
1590int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1591{
4dff95dc 1592 int ret = 0;
4935b22c 1593
4dff95dc
SB
1594 if (!clk)
1595 return 0;
903efc55 1596
4dff95dc
SB
1597 if (min > max) {
1598 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1599 __func__, clk->core->name, clk->dev_id, clk->con_id,
1600 min, max);
1601 return -EINVAL;
903efc55 1602 }
4935b22c 1603
4dff95dc 1604 clk_prepare_lock();
4935b22c 1605
4dff95dc
SB
1606 if (min != clk->min_rate || max != clk->max_rate) {
1607 clk->min_rate = min;
1608 clk->max_rate = max;
1609 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1610 }
1611
4dff95dc 1612 clk_prepare_unlock();
4935b22c 1613
4dff95dc 1614 return ret;
3fa2252b 1615}
4dff95dc 1616EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1617
4dff95dc
SB
1618/**
1619 * clk_set_min_rate - set a minimum clock rate for a clock source
1620 * @clk: clock source
1621 * @rate: desired minimum clock rate in Hz, inclusive
1622 *
1623 * Returns success (0) or negative errno.
1624 */
1625int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1626{
4dff95dc
SB
1627 if (!clk)
1628 return 0;
1629
1630 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1631}
4dff95dc 1632EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1633
4dff95dc
SB
1634/**
1635 * clk_set_max_rate - set a maximum clock rate for a clock source
1636 * @clk: clock source
1637 * @rate: desired maximum clock rate in Hz, inclusive
1638 *
1639 * Returns success (0) or negative errno.
1640 */
1641int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1642{
4dff95dc
SB
1643 if (!clk)
1644 return 0;
4935b22c 1645
4dff95dc 1646 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1647}
4dff95dc 1648EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1649
b2476490 1650/**
4dff95dc
SB
1651 * clk_get_parent - return the parent of a clk
1652 * @clk: the clk whose parent gets returned
b2476490 1653 *
4dff95dc 1654 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1655 */
4dff95dc 1656struct clk *clk_get_parent(struct clk *clk)
b2476490 1657{
4dff95dc 1658 struct clk *parent;
b2476490 1659
fc4a05d4
SB
1660 if (!clk)
1661 return NULL;
1662
4dff95dc 1663 clk_prepare_lock();
fc4a05d4
SB
1664 /* TODO: Create a per-user clk and change callers to call clk_put */
1665 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 1666 clk_prepare_unlock();
496eadf8 1667
4dff95dc
SB
1668 return parent;
1669}
1670EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1671
4dff95dc
SB
1672/*
1673 * .get_parent is mandatory for clocks with multiple possible parents. It is
1674 * optional for single-parent clocks. Always call .get_parent if it is
1675 * available and WARN if it is missing for multi-parent clocks.
1676 *
1677 * For single-parent clocks without .get_parent, first check to see if the
1678 * .parents array exists, and if so use it to avoid an expensive tree
1679 * traversal. If .parents does not exist then walk the tree.
1680 */
1681static struct clk_core *__clk_init_parent(struct clk_core *core)
1682{
1683 struct clk_core *ret = NULL;
1684 u8 index;
b2476490 1685
4dff95dc
SB
1686 /* handle the trivial cases */
1687
1688 if (!core->num_parents)
b2476490
MT
1689 goto out;
1690
4dff95dc
SB
1691 if (core->num_parents == 1) {
1692 if (IS_ERR_OR_NULL(core->parent))
1693 core->parent = clk_core_lookup(core->parent_names[0]);
1694 ret = core->parent;
1695 goto out;
b2476490
MT
1696 }
1697
4dff95dc
SB
1698 /*
1699 * Do our best to cache parent clocks in core->parents. This prevents
1700 * unnecessary and expensive lookups. We don't set core->parent here;
1701 * that is done by the calling function.
1702 */
1703
1704 index = core->ops->get_parent(core->hw);
1705
4dff95dc
SB
1706 ret = clk_core_get_parent_by_index(core, index);
1707
b2476490
MT
1708out:
1709 return ret;
1710}
1711
4dff95dc
SB
1712static void clk_core_reparent(struct clk_core *core,
1713 struct clk_core *new_parent)
b2476490 1714{
4dff95dc
SB
1715 clk_reparent(core, new_parent);
1716 __clk_recalc_accuracies(core);
1717 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1718}
1719
42c86547
TV
1720void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
1721{
1722 if (!hw)
1723 return;
1724
1725 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
1726}
1727
4dff95dc
SB
1728/**
1729 * clk_has_parent - check if a clock is a possible parent for another
1730 * @clk: clock source
1731 * @parent: parent clock source
1732 *
1733 * This function can be used in drivers that need to check that a clock can be
1734 * the parent of another without actually changing the parent.
1735 *
1736 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1737 */
4dff95dc 1738bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1739{
4dff95dc
SB
1740 struct clk_core *core, *parent_core;
1741 unsigned int i;
b2476490 1742
4dff95dc
SB
1743 /* NULL clocks should be nops, so return success if either is NULL. */
1744 if (!clk || !parent)
1745 return true;
7452b219 1746
4dff95dc
SB
1747 core = clk->core;
1748 parent_core = parent->core;
71472c0c 1749
4dff95dc
SB
1750 /* Optimize for the case where the parent is already the parent. */
1751 if (core->parent == parent_core)
1752 return true;
1c8e6004 1753
4dff95dc
SB
1754 for (i = 0; i < core->num_parents; i++)
1755 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1756 return true;
03bc10ab 1757
4dff95dc
SB
1758 return false;
1759}
1760EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1761
4dff95dc
SB
1762static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1763{
1764 int ret = 0;
1765 int p_index = 0;
1766 unsigned long p_rate = 0;
1767
1768 if (!core)
1769 return 0;
1770
1771 /* prevent racing with updates to the clock topology */
1772 clk_prepare_lock();
1773
1774 if (core->parent == parent)
1775 goto out;
1776
1777 /* verify ops for for multi-parent clks */
1778 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1779 ret = -ENOSYS;
63f5c3b2 1780 goto out;
7452b219
MT
1781 }
1782
4dff95dc
SB
1783 /* check that we are allowed to re-parent if the clock is in use */
1784 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1785 ret = -EBUSY;
1786 goto out;
b2476490
MT
1787 }
1788
71472c0c 1789 /* try finding the new parent index */
4dff95dc 1790 if (parent) {
d6968fca 1791 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1792 p_rate = parent->rate;
f1c8b2ed 1793 if (p_index < 0) {
71472c0c 1794 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1795 __func__, parent->name, core->name);
1796 ret = p_index;
1797 goto out;
71472c0c 1798 }
b2476490
MT
1799 }
1800
4dff95dc
SB
1801 /* propagate PRE_RATE_CHANGE notifications */
1802 ret = __clk_speculate_rates(core, p_rate);
b2476490 1803
4dff95dc
SB
1804 /* abort if a driver objects */
1805 if (ret & NOTIFY_STOP_MASK)
1806 goto out;
b2476490 1807
4dff95dc
SB
1808 /* do the re-parent */
1809 ret = __clk_set_parent(core, parent, p_index);
b2476490 1810
4dff95dc
SB
1811 /* propagate rate an accuracy recalculation accordingly */
1812 if (ret) {
1813 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1814 } else {
1815 __clk_recalc_rates(core, POST_RATE_CHANGE);
1816 __clk_recalc_accuracies(core);
b2476490
MT
1817 }
1818
4dff95dc
SB
1819out:
1820 clk_prepare_unlock();
71472c0c 1821
4dff95dc
SB
1822 return ret;
1823}
b2476490 1824
4dff95dc
SB
1825/**
1826 * clk_set_parent - switch the parent of a mux clk
1827 * @clk: the mux clk whose input we are switching
1828 * @parent: the new input to clk
1829 *
1830 * Re-parent clk to use parent as its new input source. If clk is in
1831 * prepared state, the clk will get enabled for the duration of this call. If
1832 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1833 * that, the reparenting is glitchy in hardware, etc), use the
1834 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1835 *
1836 * After successfully changing clk's parent clk_set_parent will update the
1837 * clk topology, sysfs topology and propagate rate recalculation via
1838 * __clk_recalc_rates.
1839 *
1840 * Returns 0 on success, -EERROR otherwise.
1841 */
1842int clk_set_parent(struct clk *clk, struct clk *parent)
1843{
1844 if (!clk)
1845 return 0;
1846
1847 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1848}
4dff95dc 1849EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1850
4dff95dc
SB
1851/**
1852 * clk_set_phase - adjust the phase shift of a clock signal
1853 * @clk: clock signal source
1854 * @degrees: number of degrees the signal is shifted
1855 *
1856 * Shifts the phase of a clock signal by the specified
1857 * degrees. Returns 0 on success, -EERROR otherwise.
1858 *
1859 * This function makes no distinction about the input or reference
1860 * signal that we adjust the clock signal phase against. For example
1861 * phase locked-loop clock signal generators we may shift phase with
1862 * respect to feedback clock signal input, but for other cases the
1863 * clock phase may be shifted with respect to some other, unspecified
1864 * signal.
1865 *
1866 * Additionally the concept of phase shift does not propagate through
1867 * the clock tree hierarchy, which sets it apart from clock rates and
1868 * clock accuracy. A parent clock phase attribute does not have an
1869 * impact on the phase attribute of a child clock.
b2476490 1870 */
4dff95dc 1871int clk_set_phase(struct clk *clk, int degrees)
b2476490 1872{
4dff95dc 1873 int ret = -EINVAL;
b2476490 1874
4dff95dc
SB
1875 if (!clk)
1876 return 0;
b2476490 1877
4dff95dc
SB
1878 /* sanity check degrees */
1879 degrees %= 360;
1880 if (degrees < 0)
1881 degrees += 360;
bf47b4fd 1882
4dff95dc 1883 clk_prepare_lock();
3fa2252b 1884
4dff95dc 1885 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1886
4dff95dc
SB
1887 if (clk->core->ops->set_phase)
1888 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1889
4dff95dc 1890 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1891
4dff95dc
SB
1892 if (!ret)
1893 clk->core->phase = degrees;
b2476490 1894
4dff95dc 1895 clk_prepare_unlock();
dfc202ea 1896
4dff95dc
SB
1897 return ret;
1898}
1899EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1900
4dff95dc
SB
1901static int clk_core_get_phase(struct clk_core *core)
1902{
1903 int ret;
b2476490 1904
4dff95dc
SB
1905 clk_prepare_lock();
1906 ret = core->phase;
1907 clk_prepare_unlock();
71472c0c 1908
4dff95dc 1909 return ret;
b2476490
MT
1910}
1911
4dff95dc
SB
1912/**
1913 * clk_get_phase - return the phase shift of a clock signal
1914 * @clk: clock signal source
1915 *
1916 * Returns the phase shift of a clock node in degrees, otherwise returns
1917 * -EERROR.
1918 */
1919int clk_get_phase(struct clk *clk)
1c8e6004 1920{
4dff95dc 1921 if (!clk)
1c8e6004
TV
1922 return 0;
1923
4dff95dc
SB
1924 return clk_core_get_phase(clk->core);
1925}
1926EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1927
4dff95dc
SB
1928/**
1929 * clk_is_match - check if two clk's point to the same hardware clock
1930 * @p: clk compared against q
1931 * @q: clk compared against p
1932 *
1933 * Returns true if the two struct clk pointers both point to the same hardware
1934 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1935 * share the same struct clk_core object.
1936 *
1937 * Returns false otherwise. Note that two NULL clks are treated as matching.
1938 */
1939bool clk_is_match(const struct clk *p, const struct clk *q)
1940{
1941 /* trivial case: identical struct clk's or both NULL */
1942 if (p == q)
1943 return true;
1c8e6004 1944
3fe003f9 1945 /* true if clk->core pointers match. Avoid dereferencing garbage */
4dff95dc
SB
1946 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1947 if (p->core == q->core)
1948 return true;
1c8e6004 1949
4dff95dc
SB
1950 return false;
1951}
1952EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1953
4dff95dc 1954/*** debugfs support ***/
1c8e6004 1955
4dff95dc
SB
1956#ifdef CONFIG_DEBUG_FS
1957#include <linux/debugfs.h>
1c8e6004 1958
4dff95dc
SB
1959static struct dentry *rootdir;
1960static int inited = 0;
1961static DEFINE_MUTEX(clk_debug_lock);
1962static HLIST_HEAD(clk_debug_list);
1c8e6004 1963
4dff95dc
SB
1964static struct hlist_head *all_lists[] = {
1965 &clk_root_list,
1966 &clk_orphan_list,
1967 NULL,
1968};
1969
1970static struct hlist_head *orphan_list[] = {
1971 &clk_orphan_list,
1972 NULL,
1973};
1974
1975static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1976 int level)
b2476490 1977{
4dff95dc
SB
1978 if (!c)
1979 return;
b2476490 1980
4dff95dc
SB
1981 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1982 level * 3 + 1, "",
1983 30 - level * 3, c->name,
1984 c->enable_count, c->prepare_count, clk_core_get_rate(c),
1985 clk_core_get_accuracy(c), clk_core_get_phase(c));
1986}
89ac8d7a 1987
4dff95dc
SB
1988static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1989 int level)
1990{
1991 struct clk_core *child;
b2476490 1992
4dff95dc
SB
1993 if (!c)
1994 return;
b2476490 1995
4dff95dc 1996 clk_summary_show_one(s, c, level);
0e1c0301 1997
4dff95dc
SB
1998 hlist_for_each_entry(child, &c->children, child_node)
1999 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2000}
b2476490 2001
4dff95dc 2002static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2003{
4dff95dc
SB
2004 struct clk_core *c;
2005 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2006
4dff95dc
SB
2007 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
2008 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 2009
1c8e6004
TV
2010 clk_prepare_lock();
2011
4dff95dc
SB
2012 for (; *lists; lists++)
2013 hlist_for_each_entry(c, *lists, child_node)
2014 clk_summary_show_subtree(s, c, 0);
b2476490 2015
eab89f69 2016 clk_prepare_unlock();
b2476490 2017
4dff95dc 2018 return 0;
b2476490 2019}
1c8e6004 2020
1c8e6004 2021
4dff95dc 2022static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 2023{
4dff95dc 2024 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 2025}
b2476490 2026
4dff95dc
SB
2027static const struct file_operations clk_summary_fops = {
2028 .open = clk_summary_open,
2029 .read = seq_read,
2030 .llseek = seq_lseek,
2031 .release = single_release,
2032};
b2476490 2033
4dff95dc
SB
2034static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2035{
2036 if (!c)
2037 return;
b2476490 2038
7cb81136 2039 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
2040 seq_printf(s, "\"%s\": { ", c->name);
2041 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2042 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
7cb81136
SW
2043 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2044 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
4dff95dc 2045 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 2046}
b2476490 2047
4dff95dc 2048static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 2049{
4dff95dc 2050 struct clk_core *child;
b2476490 2051
4dff95dc
SB
2052 if (!c)
2053 return;
b2476490 2054
4dff95dc 2055 clk_dump_one(s, c, level);
b2476490 2056
4dff95dc
SB
2057 hlist_for_each_entry(child, &c->children, child_node) {
2058 seq_printf(s, ",");
2059 clk_dump_subtree(s, child, level + 1);
b2476490
MT
2060 }
2061
4dff95dc 2062 seq_printf(s, "}");
b2476490
MT
2063}
2064
4dff95dc 2065static int clk_dump(struct seq_file *s, void *data)
4e88f3de 2066{
4dff95dc
SB
2067 struct clk_core *c;
2068 bool first_node = true;
2069 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 2070
4dff95dc 2071 seq_printf(s, "{");
4e88f3de 2072
4dff95dc 2073 clk_prepare_lock();
035a61c3 2074
4dff95dc
SB
2075 for (; *lists; lists++) {
2076 hlist_for_each_entry(c, *lists, child_node) {
2077 if (!first_node)
2078 seq_puts(s, ",");
2079 first_node = false;
2080 clk_dump_subtree(s, c, 0);
2081 }
2082 }
4e88f3de 2083
4dff95dc 2084 clk_prepare_unlock();
4e88f3de 2085
70e9f4dd 2086 seq_puts(s, "}\n");
4dff95dc 2087 return 0;
4e88f3de 2088}
4e88f3de 2089
4dff95dc
SB
2090
2091static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2092{
4dff95dc
SB
2093 return single_open(file, clk_dump, inode->i_private);
2094}
b2476490 2095
4dff95dc
SB
2096static const struct file_operations clk_dump_fops = {
2097 .open = clk_dump_open,
2098 .read = seq_read,
2099 .llseek = seq_lseek,
2100 .release = single_release,
2101};
89ac8d7a 2102
4dff95dc
SB
2103static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2104{
2105 struct dentry *d;
2106 int ret = -ENOMEM;
b2476490 2107
4dff95dc
SB
2108 if (!core || !pdentry) {
2109 ret = -EINVAL;
b2476490 2110 goto out;
4dff95dc 2111 }
b2476490 2112
4dff95dc
SB
2113 d = debugfs_create_dir(core->name, pdentry);
2114 if (!d)
b61c43c0 2115 goto out;
b61c43c0 2116
4dff95dc
SB
2117 core->dentry = d;
2118
2119 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2120 (u32 *)&core->rate);
2121 if (!d)
2122 goto err_out;
2123
2124 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2125 (u32 *)&core->accuracy);
2126 if (!d)
2127 goto err_out;
2128
2129 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2130 (u32 *)&core->phase);
2131 if (!d)
2132 goto err_out;
031dcc9b 2133
4dff95dc
SB
2134 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2135 (u32 *)&core->flags);
2136 if (!d)
2137 goto err_out;
031dcc9b 2138
4dff95dc
SB
2139 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2140 (u32 *)&core->prepare_count);
2141 if (!d)
2142 goto err_out;
b2476490 2143
4dff95dc
SB
2144 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2145 (u32 *)&core->enable_count);
2146 if (!d)
2147 goto err_out;
b2476490 2148
4dff95dc
SB
2149 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2150 (u32 *)&core->notifier_count);
2151 if (!d)
2152 goto err_out;
b2476490 2153
4dff95dc
SB
2154 if (core->ops->debug_init) {
2155 ret = core->ops->debug_init(core->hw, core->dentry);
2156 if (ret)
2157 goto err_out;
5279fc40 2158 }
b2476490 2159
4dff95dc
SB
2160 ret = 0;
2161 goto out;
b2476490 2162
4dff95dc
SB
2163err_out:
2164 debugfs_remove_recursive(core->dentry);
2165 core->dentry = NULL;
2166out:
b2476490
MT
2167 return ret;
2168}
035a61c3
TV
2169
2170/**
6e5ab41b
SB
2171 * clk_debug_register - add a clk node to the debugfs clk directory
2172 * @core: the clk being added to the debugfs clk directory
035a61c3 2173 *
6e5ab41b
SB
2174 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2175 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2176 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2177 */
4dff95dc 2178static int clk_debug_register(struct clk_core *core)
035a61c3 2179{
4dff95dc 2180 int ret = 0;
035a61c3 2181
4dff95dc
SB
2182 mutex_lock(&clk_debug_lock);
2183 hlist_add_head(&core->debug_node, &clk_debug_list);
2184
2185 if (!inited)
2186 goto unlock;
2187
2188 ret = clk_debug_create_one(core, rootdir);
2189unlock:
2190 mutex_unlock(&clk_debug_lock);
2191
2192 return ret;
035a61c3 2193}
b2476490 2194
4dff95dc 2195 /**
6e5ab41b
SB
2196 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2197 * @core: the clk being removed from the debugfs clk directory
e59c5371 2198 *
6e5ab41b
SB
2199 * Dynamically removes a clk and all its child nodes from the
2200 * debugfs clk directory if clk->dentry points to debugfs created by
4dff95dc 2201 * clk_debug_register in __clk_init.
e59c5371 2202 */
4dff95dc 2203static void clk_debug_unregister(struct clk_core *core)
e59c5371 2204{
4dff95dc
SB
2205 mutex_lock(&clk_debug_lock);
2206 hlist_del_init(&core->debug_node);
2207 debugfs_remove_recursive(core->dentry);
2208 core->dentry = NULL;
2209 mutex_unlock(&clk_debug_lock);
2210}
e59c5371 2211
4dff95dc
SB
2212struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2213 void *data, const struct file_operations *fops)
2214{
2215 struct dentry *d = NULL;
e59c5371 2216
4dff95dc
SB
2217 if (hw->core->dentry)
2218 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2219 fops);
e59c5371 2220
4dff95dc
SB
2221 return d;
2222}
2223EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2224
4dff95dc 2225/**
6e5ab41b 2226 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2227 *
6e5ab41b
SB
2228 * clks are often initialized very early during boot before memory can be
2229 * dynamically allocated and well before debugfs is setup. This function
2230 * populates the debugfs clk directory once at boot-time when we know that
2231 * debugfs is setup. It should only be called once at boot-time, all other clks
2232 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2233 */
2234static int __init clk_debug_init(void)
2235{
2236 struct clk_core *core;
2237 struct dentry *d;
dfc202ea 2238
4dff95dc 2239 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2240
4dff95dc
SB
2241 if (!rootdir)
2242 return -ENOMEM;
dfc202ea 2243
4dff95dc
SB
2244 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2245 &clk_summary_fops);
2246 if (!d)
2247 return -ENOMEM;
e59c5371 2248
4dff95dc
SB
2249 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2250 &clk_dump_fops);
2251 if (!d)
2252 return -ENOMEM;
e59c5371 2253
4dff95dc
SB
2254 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2255 &orphan_list, &clk_summary_fops);
2256 if (!d)
2257 return -ENOMEM;
e59c5371 2258
4dff95dc
SB
2259 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2260 &orphan_list, &clk_dump_fops);
2261 if (!d)
2262 return -ENOMEM;
e59c5371 2263
4dff95dc
SB
2264 mutex_lock(&clk_debug_lock);
2265 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2266 clk_debug_create_one(core, rootdir);
e59c5371 2267
4dff95dc
SB
2268 inited = 1;
2269 mutex_unlock(&clk_debug_lock);
e59c5371 2270
4dff95dc
SB
2271 return 0;
2272}
2273late_initcall(clk_debug_init);
2274#else
2275static inline int clk_debug_register(struct clk_core *core) { return 0; }
2276static inline void clk_debug_reparent(struct clk_core *core,
2277 struct clk_core *new_parent)
035a61c3 2278{
035a61c3 2279}
4dff95dc 2280static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2281{
3d3801ef 2282}
4dff95dc 2283#endif
3d3801ef 2284
b2476490 2285/**
be45ebf2 2286 * __clk_core_init - initialize the data structures in a struct clk_core
d35c80c2 2287 * @core: clk_core being initialized
b2476490 2288 *
035a61c3 2289 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2290 * parent and rate and sets them both.
b2476490 2291 */
be45ebf2 2292static int __clk_core_init(struct clk_core *core)
b2476490 2293{
d1302a36 2294 int i, ret = 0;
035a61c3 2295 struct clk_core *orphan;
b67bfe0d 2296 struct hlist_node *tmp2;
1c8e6004 2297 unsigned long rate;
b2476490 2298
d35c80c2 2299 if (!core)
d1302a36 2300 return -EINVAL;
b2476490 2301
eab89f69 2302 clk_prepare_lock();
b2476490
MT
2303
2304 /* check to see if a clock with this name is already registered */
d6968fca 2305 if (clk_core_lookup(core->name)) {
d1302a36 2306 pr_debug("%s: clk %s already initialized\n",
d6968fca 2307 __func__, core->name);
d1302a36 2308 ret = -EEXIST;
b2476490 2309 goto out;
d1302a36 2310 }
b2476490 2311
d4d7e3dd 2312 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2313 if (core->ops->set_rate &&
2314 !((core->ops->round_rate || core->ops->determine_rate) &&
2315 core->ops->recalc_rate)) {
c44fccb5
MY
2316 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
2317 __func__, core->name);
d1302a36 2318 ret = -EINVAL;
d4d7e3dd
MT
2319 goto out;
2320 }
2321
d6968fca 2322 if (core->ops->set_parent && !core->ops->get_parent) {
c44fccb5
MY
2323 pr_err("%s: %s must implement .get_parent & .set_parent\n",
2324 __func__, core->name);
d1302a36 2325 ret = -EINVAL;
d4d7e3dd
MT
2326 goto out;
2327 }
2328
3c8e77dd
MY
2329 if (core->num_parents > 1 && !core->ops->get_parent) {
2330 pr_err("%s: %s must implement .get_parent as it has multi parents\n",
2331 __func__, core->name);
2332 ret = -EINVAL;
2333 goto out;
2334 }
2335
d6968fca
SB
2336 if (core->ops->set_rate_and_parent &&
2337 !(core->ops->set_parent && core->ops->set_rate)) {
c44fccb5 2338 pr_err("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2339 __func__, core->name);
3fa2252b
SB
2340 ret = -EINVAL;
2341 goto out;
2342 }
2343
b2476490 2344 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2345 for (i = 0; i < core->num_parents; i++)
2346 WARN(!core->parent_names[i],
b2476490 2347 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2348 __func__, core->name);
b2476490 2349
d6968fca 2350 core->parent = __clk_init_parent(core);
b2476490
MT
2351
2352 /*
d6968fca 2353 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2354 * parent has not yet been __clk_init'd then place clk in the orphan
2355 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2356 * clk list.
2357 *
2358 * Every time a new clk is clk_init'd then we walk the list of orphan
2359 * clocks and re-parent any that are children of the clock currently
2360 * being clk_init'd.
2361 */
e6500344 2362 if (core->parent) {
d6968fca
SB
2363 hlist_add_head(&core->child_node,
2364 &core->parent->children);
e6500344
HS
2365 core->orphan = core->parent->orphan;
2366 } else if (core->flags & CLK_IS_ROOT) {
d6968fca 2367 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
2368 core->orphan = false;
2369 } else {
d6968fca 2370 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
2371 core->orphan = true;
2372 }
b2476490 2373
5279fc40
BB
2374 /*
2375 * Set clk's accuracy. The preferred method is to use
2376 * .recalc_accuracy. For simple clocks and lazy developers the default
2377 * fallback is to use the parent's accuracy. If a clock doesn't have a
2378 * parent (or is orphaned) then accuracy is set to zero (perfect
2379 * clock).
2380 */
d6968fca
SB
2381 if (core->ops->recalc_accuracy)
2382 core->accuracy = core->ops->recalc_accuracy(core->hw,
2383 __clk_get_accuracy(core->parent));
2384 else if (core->parent)
2385 core->accuracy = core->parent->accuracy;
5279fc40 2386 else
d6968fca 2387 core->accuracy = 0;
5279fc40 2388
9824cf73
MR
2389 /*
2390 * Set clk's phase.
2391 * Since a phase is by definition relative to its parent, just
2392 * query the current clock phase, or just assume it's in phase.
2393 */
d6968fca
SB
2394 if (core->ops->get_phase)
2395 core->phase = core->ops->get_phase(core->hw);
9824cf73 2396 else
d6968fca 2397 core->phase = 0;
9824cf73 2398
b2476490
MT
2399 /*
2400 * Set clk's rate. The preferred method is to use .recalc_rate. For
2401 * simple clocks and lazy developers the default fallback is to use the
2402 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2403 * then rate is set to zero.
2404 */
d6968fca
SB
2405 if (core->ops->recalc_rate)
2406 rate = core->ops->recalc_rate(core->hw,
2407 clk_core_get_rate_nolock(core->parent));
2408 else if (core->parent)
2409 rate = core->parent->rate;
b2476490 2410 else
1c8e6004 2411 rate = 0;
d6968fca 2412 core->rate = core->req_rate = rate;
b2476490
MT
2413
2414 /*
2415 * walk the list of orphan clocks and reparent any that are children of
2416 * this clock
2417 */
b67bfe0d 2418 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2419 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2420 i = orphan->ops->get_parent(orphan->hw);
9054a31d
MR
2421 if (i >= 0 && i < orphan->num_parents &&
2422 !strcmp(core->name, orphan->parent_names[i]))
d6968fca 2423 clk_core_reparent(orphan, core);
1f61e5f1
MF
2424 continue;
2425 }
2426
b2476490 2427 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2428 if (!strcmp(core->name, orphan->parent_names[i])) {
2429 clk_core_reparent(orphan, core);
b2476490
MT
2430 break;
2431 }
1f61e5f1 2432 }
b2476490
MT
2433
2434 /*
2435 * optional platform-specific magic
2436 *
2437 * The .init callback is not used by any of the basic clock types, but
2438 * exists for weird hardware that must perform initialization magic.
2439 * Please consider other ways of solving initialization problems before
24ee1a08 2440 * using this callback, as its use is discouraged.
b2476490 2441 */
d6968fca
SB
2442 if (core->ops->init)
2443 core->ops->init(core->hw);
b2476490 2444
d6968fca 2445 kref_init(&core->ref);
b2476490 2446out:
eab89f69 2447 clk_prepare_unlock();
b2476490 2448
89f7e9de 2449 if (!ret)
d6968fca 2450 clk_debug_register(core);
89f7e9de 2451
d1302a36 2452 return ret;
b2476490
MT
2453}
2454
035a61c3
TV
2455struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2456 const char *con_id)
0197b3ea 2457{
0197b3ea
SK
2458 struct clk *clk;
2459
035a61c3 2460 /* This is to allow this function to be chained to others */
c1de1357 2461 if (IS_ERR_OR_NULL(hw))
035a61c3 2462 return (struct clk *) hw;
0197b3ea 2463
035a61c3
TV
2464 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2465 if (!clk)
2466 return ERR_PTR(-ENOMEM);
2467
2468 clk->core = hw->core;
2469 clk->dev_id = dev_id;
2470 clk->con_id = con_id;
1c8e6004
TV
2471 clk->max_rate = ULONG_MAX;
2472
2473 clk_prepare_lock();
50595f8b 2474 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2475 clk_prepare_unlock();
0197b3ea
SK
2476
2477 return clk;
2478}
035a61c3 2479
73e0e496 2480void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2481{
2482 clk_prepare_lock();
50595f8b 2483 hlist_del(&clk->clks_node);
1c8e6004
TV
2484 clk_prepare_unlock();
2485
2486 kfree(clk);
2487}
0197b3ea 2488
293ba3b4
SB
2489/**
2490 * clk_register - allocate a new clock, register it and return an opaque cookie
2491 * @dev: device that is registering this clock
2492 * @hw: link to hardware-specific clock data
2493 *
2494 * clk_register is the primary interface for populating the clock tree with new
2495 * clock nodes. It returns a pointer to the newly allocated struct clk which
a59a5163 2496 * cannot be dereferenced by driver code but may be used in conjunction with the
293ba3b4
SB
2497 * rest of the clock API. In the event of an error clk_register will return an
2498 * error code; drivers must test for an error code after calling clk_register.
2499 */
2500struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2501{
d1302a36 2502 int i, ret;
d6968fca 2503 struct clk_core *core;
293ba3b4 2504
d6968fca
SB
2505 core = kzalloc(sizeof(*core), GFP_KERNEL);
2506 if (!core) {
293ba3b4
SB
2507 ret = -ENOMEM;
2508 goto fail_out;
2509 }
b2476490 2510
d6968fca
SB
2511 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2512 if (!core->name) {
0197b3ea
SK
2513 ret = -ENOMEM;
2514 goto fail_name;
2515 }
d6968fca 2516 core->ops = hw->init->ops;
ac2df527 2517 if (dev && dev->driver)
d6968fca
SB
2518 core->owner = dev->driver->owner;
2519 core->hw = hw;
2520 core->flags = hw->init->flags;
2521 core->num_parents = hw->init->num_parents;
9783c0d9
SB
2522 core->min_rate = 0;
2523 core->max_rate = ULONG_MAX;
d6968fca 2524 hw->core = core;
b2476490 2525
d1302a36 2526 /* allocate local copy in case parent_names is __initdata */
d6968fca 2527 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2528 GFP_KERNEL);
d1302a36 2529
d6968fca 2530 if (!core->parent_names) {
d1302a36
MT
2531 ret = -ENOMEM;
2532 goto fail_parent_names;
2533 }
2534
2535
2536 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2537 for (i = 0; i < core->num_parents; i++) {
2538 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2539 GFP_KERNEL);
d6968fca 2540 if (!core->parent_names[i]) {
d1302a36
MT
2541 ret = -ENOMEM;
2542 goto fail_parent_names_copy;
2543 }
2544 }
2545
176d1169
MY
2546 /* avoid unnecessary string look-ups of clk_core's possible parents. */
2547 core->parents = kcalloc(core->num_parents, sizeof(*core->parents),
2548 GFP_KERNEL);
2549 if (!core->parents) {
2550 ret = -ENOMEM;
2551 goto fail_parents;
2552 };
2553
d6968fca 2554 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2555
035a61c3
TV
2556 hw->clk = __clk_create_clk(hw, NULL, NULL);
2557 if (IS_ERR(hw->clk)) {
035a61c3 2558 ret = PTR_ERR(hw->clk);
176d1169 2559 goto fail_parents;
035a61c3
TV
2560 }
2561
be45ebf2 2562 ret = __clk_core_init(core);
d1302a36 2563 if (!ret)
035a61c3 2564 return hw->clk;
b2476490 2565
1c8e6004 2566 __clk_free_clk(hw->clk);
035a61c3 2567 hw->clk = NULL;
b2476490 2568
176d1169
MY
2569fail_parents:
2570 kfree(core->parents);
d1302a36
MT
2571fail_parent_names_copy:
2572 while (--i >= 0)
d6968fca
SB
2573 kfree_const(core->parent_names[i]);
2574 kfree(core->parent_names);
d1302a36 2575fail_parent_names:
d6968fca 2576 kfree_const(core->name);
0197b3ea 2577fail_name:
d6968fca 2578 kfree(core);
d1302a36
MT
2579fail_out:
2580 return ERR_PTR(ret);
b2476490
MT
2581}
2582EXPORT_SYMBOL_GPL(clk_register);
2583
6e5ab41b 2584/* Free memory allocated for a clock. */
fcb0ee6a
SN
2585static void __clk_release(struct kref *ref)
2586{
d6968fca
SB
2587 struct clk_core *core = container_of(ref, struct clk_core, ref);
2588 int i = core->num_parents;
fcb0ee6a 2589
496eadf8
KK
2590 lockdep_assert_held(&prepare_lock);
2591
d6968fca 2592 kfree(core->parents);
fcb0ee6a 2593 while (--i >= 0)
d6968fca 2594 kfree_const(core->parent_names[i]);
fcb0ee6a 2595
d6968fca
SB
2596 kfree(core->parent_names);
2597 kfree_const(core->name);
2598 kfree(core);
fcb0ee6a
SN
2599}
2600
2601/*
2602 * Empty clk_ops for unregistered clocks. These are used temporarily
2603 * after clk_unregister() was called on a clock and until last clock
2604 * consumer calls clk_put() and the struct clk object is freed.
2605 */
2606static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2607{
2608 return -ENXIO;
2609}
2610
2611static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2612{
2613 WARN_ON_ONCE(1);
2614}
2615
2616static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2617 unsigned long parent_rate)
2618{
2619 return -ENXIO;
2620}
2621
2622static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2623{
2624 return -ENXIO;
2625}
2626
2627static const struct clk_ops clk_nodrv_ops = {
2628 .enable = clk_nodrv_prepare_enable,
2629 .disable = clk_nodrv_disable_unprepare,
2630 .prepare = clk_nodrv_prepare_enable,
2631 .unprepare = clk_nodrv_disable_unprepare,
2632 .set_rate = clk_nodrv_set_rate,
2633 .set_parent = clk_nodrv_set_parent,
2634};
2635
1df5c939
MB
2636/**
2637 * clk_unregister - unregister a currently registered clock
2638 * @clk: clock to unregister
1df5c939 2639 */
fcb0ee6a
SN
2640void clk_unregister(struct clk *clk)
2641{
2642 unsigned long flags;
2643
6314b679
SB
2644 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2645 return;
2646
035a61c3 2647 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2648
2649 clk_prepare_lock();
2650
035a61c3
TV
2651 if (clk->core->ops == &clk_nodrv_ops) {
2652 pr_err("%s: unregistered clock: %s\n", __func__,
2653 clk->core->name);
6314b679 2654 return;
fcb0ee6a
SN
2655 }
2656 /*
2657 * Assign empty clock ops for consumers that might still hold
2658 * a reference to this clock.
2659 */
2660 flags = clk_enable_lock();
035a61c3 2661 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2662 clk_enable_unlock(flags);
2663
035a61c3
TV
2664 if (!hlist_empty(&clk->core->children)) {
2665 struct clk_core *child;
874f224c 2666 struct hlist_node *t;
fcb0ee6a
SN
2667
2668 /* Reparent all children to the orphan list. */
035a61c3
TV
2669 hlist_for_each_entry_safe(child, t, &clk->core->children,
2670 child_node)
2671 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2672 }
2673
035a61c3 2674 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2675
035a61c3 2676 if (clk->core->prepare_count)
fcb0ee6a 2677 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2678 __func__, clk->core->name);
2679 kref_put(&clk->core->ref, __clk_release);
6314b679 2680
fcb0ee6a
SN
2681 clk_prepare_unlock();
2682}
1df5c939
MB
2683EXPORT_SYMBOL_GPL(clk_unregister);
2684
46c8773a
SB
2685static void devm_clk_release(struct device *dev, void *res)
2686{
293ba3b4 2687 clk_unregister(*(struct clk **)res);
46c8773a
SB
2688}
2689
2690/**
2691 * devm_clk_register - resource managed clk_register()
2692 * @dev: device that is registering this clock
2693 * @hw: link to hardware-specific clock data
2694 *
2695 * Managed clk_register(). Clocks returned from this function are
2696 * automatically clk_unregister()ed on driver detach. See clk_register() for
2697 * more information.
2698 */
2699struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2700{
2701 struct clk *clk;
293ba3b4 2702 struct clk **clkp;
46c8773a 2703
293ba3b4
SB
2704 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2705 if (!clkp)
46c8773a
SB
2706 return ERR_PTR(-ENOMEM);
2707
293ba3b4
SB
2708 clk = clk_register(dev, hw);
2709 if (!IS_ERR(clk)) {
2710 *clkp = clk;
2711 devres_add(dev, clkp);
46c8773a 2712 } else {
293ba3b4 2713 devres_free(clkp);
46c8773a
SB
2714 }
2715
2716 return clk;
2717}
2718EXPORT_SYMBOL_GPL(devm_clk_register);
2719
2720static int devm_clk_match(struct device *dev, void *res, void *data)
2721{
2722 struct clk *c = res;
2723 if (WARN_ON(!c))
2724 return 0;
2725 return c == data;
2726}
2727
2728/**
2729 * devm_clk_unregister - resource managed clk_unregister()
2730 * @clk: clock to unregister
2731 *
2732 * Deallocate a clock allocated with devm_clk_register(). Normally
2733 * this function will not need to be called and the resource management
2734 * code will ensure that the resource is freed.
2735 */
2736void devm_clk_unregister(struct device *dev, struct clk *clk)
2737{
2738 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2739}
2740EXPORT_SYMBOL_GPL(devm_clk_unregister);
2741
ac2df527
SN
2742/*
2743 * clkdev helpers
2744 */
2745int __clk_get(struct clk *clk)
2746{
035a61c3
TV
2747 struct clk_core *core = !clk ? NULL : clk->core;
2748
2749 if (core) {
2750 if (!try_module_get(core->owner))
00efcb1c 2751 return 0;
ac2df527 2752
035a61c3 2753 kref_get(&core->ref);
00efcb1c 2754 }
ac2df527
SN
2755 return 1;
2756}
2757
2758void __clk_put(struct clk *clk)
2759{
10cdfe54
TV
2760 struct module *owner;
2761
00efcb1c 2762 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2763 return;
2764
fcb0ee6a 2765 clk_prepare_lock();
1c8e6004 2766
50595f8b 2767 hlist_del(&clk->clks_node);
ec02ace8
TV
2768 if (clk->min_rate > clk->core->req_rate ||
2769 clk->max_rate < clk->core->req_rate)
2770 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2771
1c8e6004
TV
2772 owner = clk->core->owner;
2773 kref_put(&clk->core->ref, __clk_release);
2774
fcb0ee6a
SN
2775 clk_prepare_unlock();
2776
10cdfe54 2777 module_put(owner);
035a61c3 2778
035a61c3 2779 kfree(clk);
ac2df527
SN
2780}
2781
b2476490
MT
2782/*** clk rate change notifiers ***/
2783
2784/**
2785 * clk_notifier_register - add a clk rate change notifier
2786 * @clk: struct clk * to watch
2787 * @nb: struct notifier_block * with callback info
2788 *
2789 * Request notification when clk's rate changes. This uses an SRCU
2790 * notifier because we want it to block and notifier unregistrations are
2791 * uncommon. The callbacks associated with the notifier must not
2792 * re-enter into the clk framework by calling any top-level clk APIs;
2793 * this will cause a nested prepare_lock mutex.
2794 *
198bb594
MY
2795 * In all notification cases (pre, post and abort rate change) the original
2796 * clock rate is passed to the callback via struct clk_notifier_data.old_rate
2797 * and the new frequency is passed via struct clk_notifier_data.new_rate.
b2476490 2798 *
b2476490
MT
2799 * clk_notifier_register() must be called from non-atomic context.
2800 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2801 * allocation failure; otherwise, passes along the return value of
2802 * srcu_notifier_chain_register().
2803 */
2804int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2805{
2806 struct clk_notifier *cn;
2807 int ret = -ENOMEM;
2808
2809 if (!clk || !nb)
2810 return -EINVAL;
2811
eab89f69 2812 clk_prepare_lock();
b2476490
MT
2813
2814 /* search the list of notifiers for this clk */
2815 list_for_each_entry(cn, &clk_notifier_list, node)
2816 if (cn->clk == clk)
2817 break;
2818
2819 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2820 if (cn->clk != clk) {
2821 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2822 if (!cn)
2823 goto out;
2824
2825 cn->clk = clk;
2826 srcu_init_notifier_head(&cn->notifier_head);
2827
2828 list_add(&cn->node, &clk_notifier_list);
2829 }
2830
2831 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2832
035a61c3 2833 clk->core->notifier_count++;
b2476490
MT
2834
2835out:
eab89f69 2836 clk_prepare_unlock();
b2476490
MT
2837
2838 return ret;
2839}
2840EXPORT_SYMBOL_GPL(clk_notifier_register);
2841
2842/**
2843 * clk_notifier_unregister - remove a clk rate change notifier
2844 * @clk: struct clk *
2845 * @nb: struct notifier_block * with callback info
2846 *
2847 * Request no further notification for changes to 'clk' and frees memory
2848 * allocated in clk_notifier_register.
2849 *
2850 * Returns -EINVAL if called with null arguments; otherwise, passes
2851 * along the return value of srcu_notifier_chain_unregister().
2852 */
2853int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2854{
2855 struct clk_notifier *cn = NULL;
2856 int ret = -EINVAL;
2857
2858 if (!clk || !nb)
2859 return -EINVAL;
2860
eab89f69 2861 clk_prepare_lock();
b2476490
MT
2862
2863 list_for_each_entry(cn, &clk_notifier_list, node)
2864 if (cn->clk == clk)
2865 break;
2866
2867 if (cn->clk == clk) {
2868 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2869
035a61c3 2870 clk->core->notifier_count--;
b2476490
MT
2871
2872 /* XXX the notifier code should handle this better */
2873 if (!cn->notifier_head.head) {
2874 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2875 list_del(&cn->node);
b2476490
MT
2876 kfree(cn);
2877 }
2878
2879 } else {
2880 ret = -ENOENT;
2881 }
2882
eab89f69 2883 clk_prepare_unlock();
b2476490
MT
2884
2885 return ret;
2886}
2887EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2888
2889#ifdef CONFIG_OF
2890/**
2891 * struct of_clk_provider - Clock provider registration structure
2892 * @link: Entry in global list of clock providers
2893 * @node: Pointer to device tree node of clock provider
2894 * @get: Get clock callback. Returns NULL or a struct clk for the
2895 * given clock specifier
2896 * @data: context pointer to be passed into @get callback
2897 */
2898struct of_clk_provider {
2899 struct list_head link;
2900
2901 struct device_node *node;
2902 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2903 void *data;
2904};
2905
f2f6c255
PG
2906static const struct of_device_id __clk_of_table_sentinel
2907 __used __section(__clk_of_table_end);
2908
766e6a4e 2909static LIST_HEAD(of_clk_providers);
d6782c26
SN
2910static DEFINE_MUTEX(of_clk_mutex);
2911
766e6a4e
GL
2912struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2913 void *data)
2914{
2915 return data;
2916}
2917EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2918
494bfec9
SG
2919struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2920{
2921 struct clk_onecell_data *clk_data = data;
2922 unsigned int idx = clkspec->args[0];
2923
2924 if (idx >= clk_data->clk_num) {
7e96353c 2925 pr_err("%s: invalid clock index %u\n", __func__, idx);
494bfec9
SG
2926 return ERR_PTR(-EINVAL);
2927 }
2928
2929 return clk_data->clks[idx];
2930}
2931EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2932
766e6a4e
GL
2933/**
2934 * of_clk_add_provider() - Register a clock provider for a node
2935 * @np: Device node pointer associated with clock provider
2936 * @clk_src_get: callback for decoding clock
2937 * @data: context pointer for @clk_src_get callback.
2938 */
2939int of_clk_add_provider(struct device_node *np,
2940 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2941 void *data),
2942 void *data)
2943{
2944 struct of_clk_provider *cp;
86be408b 2945 int ret;
766e6a4e
GL
2946
2947 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2948 if (!cp)
2949 return -ENOMEM;
2950
2951 cp->node = of_node_get(np);
2952 cp->data = data;
2953 cp->get = clk_src_get;
2954
d6782c26 2955 mutex_lock(&of_clk_mutex);
766e6a4e 2956 list_add(&cp->link, &of_clk_providers);
d6782c26 2957 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2958 pr_debug("Added clock from %s\n", np->full_name);
2959
86be408b
SN
2960 ret = of_clk_set_defaults(np, true);
2961 if (ret < 0)
2962 of_clk_del_provider(np);
2963
2964 return ret;
766e6a4e
GL
2965}
2966EXPORT_SYMBOL_GPL(of_clk_add_provider);
2967
2968/**
2969 * of_clk_del_provider() - Remove a previously registered clock provider
2970 * @np: Device node pointer associated with clock provider
2971 */
2972void of_clk_del_provider(struct device_node *np)
2973{
2974 struct of_clk_provider *cp;
2975
d6782c26 2976 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2977 list_for_each_entry(cp, &of_clk_providers, link) {
2978 if (cp->node == np) {
2979 list_del(&cp->link);
2980 of_node_put(cp->node);
2981 kfree(cp);
2982 break;
2983 }
2984 }
d6782c26 2985 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2986}
2987EXPORT_SYMBOL_GPL(of_clk_del_provider);
2988
73e0e496
SB
2989struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
2990 const char *dev_id, const char *con_id)
766e6a4e
GL
2991{
2992 struct of_clk_provider *provider;
a34cd466 2993 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 2994
306c342f
SB
2995 if (!clkspec)
2996 return ERR_PTR(-EINVAL);
2997
766e6a4e 2998 /* Check if we have such a provider in our array */
306c342f 2999 mutex_lock(&of_clk_mutex);
766e6a4e
GL
3000 list_for_each_entry(provider, &of_clk_providers, link) {
3001 if (provider->node == clkspec->np)
3002 clk = provider->get(clkspec, provider->data);
73e0e496
SB
3003 if (!IS_ERR(clk)) {
3004 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
3005 con_id);
3006
3007 if (!IS_ERR(clk) && !__clk_get(clk)) {
3008 __clk_free_clk(clk);
3009 clk = ERR_PTR(-ENOENT);
3010 }
3011
766e6a4e 3012 break;
73e0e496 3013 }
766e6a4e 3014 }
306c342f 3015 mutex_unlock(&of_clk_mutex);
d6782c26
SN
3016
3017 return clk;
3018}
3019
306c342f
SB
3020/**
3021 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3022 * @clkspec: pointer to a clock specifier data structure
3023 *
3024 * This function looks up a struct clk from the registered list of clock
3025 * providers, an input is a clock specifier data structure as returned
3026 * from the of_parse_phandle_with_args() function call.
3027 */
d6782c26
SN
3028struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
3029{
306c342f 3030 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
3031}
3032
f6102742
MT
3033int of_clk_get_parent_count(struct device_node *np)
3034{
3035 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
3036}
3037EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
3038
766e6a4e
GL
3039const char *of_clk_get_parent_name(struct device_node *np, int index)
3040{
3041 struct of_phandle_args clkspec;
7a0fc1a3 3042 struct property *prop;
766e6a4e 3043 const char *clk_name;
7a0fc1a3
BD
3044 const __be32 *vp;
3045 u32 pv;
766e6a4e 3046 int rc;
7a0fc1a3 3047 int count;
0a4807c2 3048 struct clk *clk;
766e6a4e 3049
766e6a4e
GL
3050 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
3051 &clkspec);
3052 if (rc)
3053 return NULL;
3054
7a0fc1a3
BD
3055 index = clkspec.args_count ? clkspec.args[0] : 0;
3056 count = 0;
3057
3058 /* if there is an indices property, use it to transfer the index
3059 * specified into an array offset for the clock-output-names property.
3060 */
3061 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
3062 if (index == pv) {
3063 index = count;
3064 break;
3065 }
3066 count++;
3067 }
8da411cc
MY
3068 /* We went off the end of 'clock-indices' without finding it */
3069 if (prop && !vp)
3070 return NULL;
7a0fc1a3 3071
766e6a4e 3072 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 3073 index,
0a4807c2
SB
3074 &clk_name) < 0) {
3075 /*
3076 * Best effort to get the name if the clock has been
3077 * registered with the framework. If the clock isn't
3078 * registered, we return the node name as the name of
3079 * the clock as long as #clock-cells = 0.
3080 */
3081 clk = of_clk_get_from_provider(&clkspec);
3082 if (IS_ERR(clk)) {
3083 if (clkspec.args_count == 0)
3084 clk_name = clkspec.np->name;
3085 else
3086 clk_name = NULL;
3087 } else {
3088 clk_name = __clk_get_name(clk);
3089 clk_put(clk);
3090 }
3091 }
3092
766e6a4e
GL
3093
3094 of_node_put(clkspec.np);
3095 return clk_name;
3096}
3097EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3098
2e61dfb3
DN
3099/**
3100 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
3101 * number of parents
3102 * @np: Device node pointer associated with clock provider
3103 * @parents: pointer to char array that hold the parents' names
3104 * @size: size of the @parents array
3105 *
3106 * Return: number of parents for the clock node.
3107 */
3108int of_clk_parent_fill(struct device_node *np, const char **parents,
3109 unsigned int size)
3110{
3111 unsigned int i = 0;
3112
3113 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
3114 i++;
3115
3116 return i;
3117}
3118EXPORT_SYMBOL_GPL(of_clk_parent_fill);
3119
1771b10d
GC
3120struct clock_provider {
3121 of_clk_init_cb_t clk_init_cb;
3122 struct device_node *np;
3123 struct list_head node;
3124};
3125
1771b10d
GC
3126/*
3127 * This function looks for a parent clock. If there is one, then it
3128 * checks that the provider for this parent clock was initialized, in
3129 * this case the parent clock will be ready.
3130 */
3131static int parent_ready(struct device_node *np)
3132{
3133 int i = 0;
3134
3135 while (true) {
3136 struct clk *clk = of_clk_get(np, i);
3137
3138 /* this parent is ready we can check the next one */
3139 if (!IS_ERR(clk)) {
3140 clk_put(clk);
3141 i++;
3142 continue;
3143 }
3144
3145 /* at least one parent is not ready, we exit now */
3146 if (PTR_ERR(clk) == -EPROBE_DEFER)
3147 return 0;
3148
3149 /*
3150 * Here we make assumption that the device tree is
3151 * written correctly. So an error means that there is
3152 * no more parent. As we didn't exit yet, then the
3153 * previous parent are ready. If there is no clock
3154 * parent, no need to wait for them, then we can
3155 * consider their absence as being ready
3156 */
3157 return 1;
3158 }
3159}
3160
766e6a4e
GL
3161/**
3162 * of_clk_init() - Scan and init clock providers from the DT
3163 * @matches: array of compatible values and init functions for providers.
3164 *
1771b10d 3165 * This function scans the device tree for matching clock providers
e5ca8fb4 3166 * and calls their initialization functions. It also does it by trying
1771b10d 3167 * to follow the dependencies.
766e6a4e
GL
3168 */
3169void __init of_clk_init(const struct of_device_id *matches)
3170{
7f7ed584 3171 const struct of_device_id *match;
766e6a4e 3172 struct device_node *np;
1771b10d
GC
3173 struct clock_provider *clk_provider, *next;
3174 bool is_init_done;
3175 bool force = false;
2573a02a 3176 LIST_HEAD(clk_provider_list);
766e6a4e 3177
f2f6c255 3178 if (!matches)
819b4861 3179 matches = &__clk_of_table;
f2f6c255 3180
1771b10d 3181 /* First prepare the list of the clocks providers */
7f7ed584 3182 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
3183 struct clock_provider *parent;
3184
3185 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
3186 if (!parent) {
3187 list_for_each_entry_safe(clk_provider, next,
3188 &clk_provider_list, node) {
3189 list_del(&clk_provider->node);
6bc9d9d6 3190 of_node_put(clk_provider->np);
2e3b19f1
SB
3191 kfree(clk_provider);
3192 }
6bc9d9d6 3193 of_node_put(np);
2e3b19f1
SB
3194 return;
3195 }
1771b10d
GC
3196
3197 parent->clk_init_cb = match->data;
6bc9d9d6 3198 parent->np = of_node_get(np);
3f6d439f 3199 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3200 }
3201
3202 while (!list_empty(&clk_provider_list)) {
3203 is_init_done = false;
3204 list_for_each_entry_safe(clk_provider, next,
3205 &clk_provider_list, node) {
3206 if (force || parent_ready(clk_provider->np)) {
86be408b 3207
1771b10d 3208 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3209 of_clk_set_defaults(clk_provider->np, true);
3210
1771b10d 3211 list_del(&clk_provider->node);
6bc9d9d6 3212 of_node_put(clk_provider->np);
1771b10d
GC
3213 kfree(clk_provider);
3214 is_init_done = true;
3215 }
3216 }
3217
3218 /*
e5ca8fb4 3219 * We didn't manage to initialize any of the
1771b10d
GC
3220 * remaining providers during the last loop, so now we
3221 * initialize all the remaining ones unconditionally
3222 * in case the clock parent was not mandatory
3223 */
3224 if (!is_init_done)
3225 force = true;
766e6a4e
GL
3226 }
3227}
3228#endif
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