clk: Remove forward declared function prototypes
[deliverable/linux.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
b09d6d99 12#include <linux/clk-provider.h>
86be408b 13#include <linux/clk/clk-conf.h>
b2476490
MT
14#include <linux/module.h>
15#include <linux/mutex.h>
16#include <linux/spinlock.h>
17#include <linux/err.h>
18#include <linux/list.h>
19#include <linux/slab.h>
766e6a4e 20#include <linux/of.h>
46c8773a 21#include <linux/device.h>
f2f6c255 22#include <linux/init.h>
533ddeb1 23#include <linux/sched.h>
b2476490 24
d6782c26
SN
25#include "clk.h"
26
b2476490
MT
27static DEFINE_SPINLOCK(enable_lock);
28static DEFINE_MUTEX(prepare_lock);
29
533ddeb1
MT
30static struct task_struct *prepare_owner;
31static struct task_struct *enable_owner;
32
33static int prepare_refcnt;
34static int enable_refcnt;
35
b2476490
MT
36static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list);
39
b09d6d99
MT
40/*** private data structures ***/
41
42struct clk_core {
43 const char *name;
44 const struct clk_ops *ops;
45 struct clk_hw *hw;
46 struct module *owner;
47 struct clk_core *parent;
48 const char **parent_names;
49 struct clk_core **parents;
50 u8 num_parents;
51 u8 new_parent_index;
52 unsigned long rate;
1c8e6004 53 unsigned long req_rate;
b09d6d99
MT
54 unsigned long new_rate;
55 struct clk_core *new_parent;
56 struct clk_core *new_child;
57 unsigned long flags;
58 unsigned int enable_count;
59 unsigned int prepare_count;
60 unsigned long accuracy;
61 int phase;
62 struct hlist_head children;
63 struct hlist_node child_node;
64 struct hlist_node debug_node;
1c8e6004 65 struct hlist_head clks;
b09d6d99
MT
66 unsigned int notifier_count;
67#ifdef CONFIG_DEBUG_FS
68 struct dentry *dentry;
69#endif
70 struct kref ref;
71};
72
dfc202ea
SB
73#define CREATE_TRACE_POINTS
74#include <trace/events/clk.h>
75
b09d6d99
MT
76struct clk {
77 struct clk_core *core;
78 const char *dev_id;
79 const char *con_id;
1c8e6004
TV
80 unsigned long min_rate;
81 unsigned long max_rate;
50595f8b 82 struct hlist_node clks_node;
b09d6d99
MT
83};
84
eab89f69
MT
85/*** locking ***/
86static void clk_prepare_lock(void)
87{
533ddeb1
MT
88 if (!mutex_trylock(&prepare_lock)) {
89 if (prepare_owner == current) {
90 prepare_refcnt++;
91 return;
92 }
93 mutex_lock(&prepare_lock);
94 }
95 WARN_ON_ONCE(prepare_owner != NULL);
96 WARN_ON_ONCE(prepare_refcnt != 0);
97 prepare_owner = current;
98 prepare_refcnt = 1;
eab89f69
MT
99}
100
101static void clk_prepare_unlock(void)
102{
533ddeb1
MT
103 WARN_ON_ONCE(prepare_owner != current);
104 WARN_ON_ONCE(prepare_refcnt == 0);
105
106 if (--prepare_refcnt)
107 return;
108 prepare_owner = NULL;
eab89f69
MT
109 mutex_unlock(&prepare_lock);
110}
111
112static unsigned long clk_enable_lock(void)
113{
114 unsigned long flags;
533ddeb1
MT
115
116 if (!spin_trylock_irqsave(&enable_lock, flags)) {
117 if (enable_owner == current) {
118 enable_refcnt++;
119 return flags;
120 }
121 spin_lock_irqsave(&enable_lock, flags);
122 }
123 WARN_ON_ONCE(enable_owner != NULL);
124 WARN_ON_ONCE(enable_refcnt != 0);
125 enable_owner = current;
126 enable_refcnt = 1;
eab89f69
MT
127 return flags;
128}
129
130static void clk_enable_unlock(unsigned long flags)
131{
533ddeb1
MT
132 WARN_ON_ONCE(enable_owner != current);
133 WARN_ON_ONCE(enable_refcnt == 0);
134
135 if (--enable_refcnt)
136 return;
137 enable_owner = NULL;
eab89f69
MT
138 spin_unlock_irqrestore(&enable_lock, flags);
139}
140
4dff95dc
SB
141static bool clk_core_is_prepared(struct clk_core *core)
142{
143 /*
144 * .is_prepared is optional for clocks that can prepare
145 * fall back to software usage counter if it is missing
146 */
147 if (!core->ops->is_prepared)
148 return core->prepare_count;
b2476490 149
4dff95dc
SB
150 return core->ops->is_prepared(core->hw);
151}
b2476490 152
4dff95dc
SB
153static bool clk_core_is_enabled(struct clk_core *core)
154{
155 /*
156 * .is_enabled is only mandatory for clocks that gate
157 * fall back to software usage counter if .is_enabled is missing
158 */
159 if (!core->ops->is_enabled)
160 return core->enable_count;
6b44c854 161
4dff95dc
SB
162 return core->ops->is_enabled(core->hw);
163}
6b44c854 164
4dff95dc
SB
165/* caller must hold prepare_lock */
166static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 167{
4dff95dc
SB
168 struct clk_core *child;
169
170 lockdep_assert_held(&prepare_lock);
171
172 hlist_for_each_entry(child, &core->children, child_node)
173 clk_unprepare_unused_subtree(child);
174
175 if (core->prepare_count)
1af599df
PG
176 return;
177
4dff95dc
SB
178 if (core->flags & CLK_IGNORE_UNUSED)
179 return;
180
181 if (clk_core_is_prepared(core)) {
182 trace_clk_unprepare(core);
183 if (core->ops->unprepare_unused)
184 core->ops->unprepare_unused(core->hw);
185 else if (core->ops->unprepare)
186 core->ops->unprepare(core->hw);
187 trace_clk_unprepare_complete(core);
188 }
1af599df
PG
189}
190
4dff95dc
SB
191/* caller must hold prepare_lock */
192static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 193{
035a61c3 194 struct clk_core *child;
4dff95dc 195 unsigned long flags;
1af599df 196
4dff95dc 197 lockdep_assert_held(&prepare_lock);
1af599df 198
4dff95dc
SB
199 hlist_for_each_entry(child, &core->children, child_node)
200 clk_disable_unused_subtree(child);
1af599df 201
4dff95dc
SB
202 flags = clk_enable_lock();
203
204 if (core->enable_count)
205 goto unlock_out;
206
207 if (core->flags & CLK_IGNORE_UNUSED)
208 goto unlock_out;
209
210 /*
211 * some gate clocks have special needs during the disable-unused
212 * sequence. call .disable_unused if available, otherwise fall
213 * back to .disable
214 */
215 if (clk_core_is_enabled(core)) {
216 trace_clk_disable(core);
217 if (core->ops->disable_unused)
218 core->ops->disable_unused(core->hw);
219 else if (core->ops->disable)
220 core->ops->disable(core->hw);
221 trace_clk_disable_complete(core);
222 }
223
224unlock_out:
225 clk_enable_unlock(flags);
1af599df
PG
226}
227
4dff95dc
SB
228static bool clk_ignore_unused;
229static int __init clk_ignore_unused_setup(char *__unused)
1af599df 230{
4dff95dc
SB
231 clk_ignore_unused = true;
232 return 1;
233}
234__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 235
4dff95dc
SB
236static int clk_disable_unused(void)
237{
238 struct clk_core *core;
239
240 if (clk_ignore_unused) {
241 pr_warn("clk: Not disabling unused clocks\n");
242 return 0;
243 }
1af599df 244
eab89f69 245 clk_prepare_lock();
1af599df 246
4dff95dc
SB
247 hlist_for_each_entry(core, &clk_root_list, child_node)
248 clk_disable_unused_subtree(core);
249
250 hlist_for_each_entry(core, &clk_orphan_list, child_node)
251 clk_disable_unused_subtree(core);
252
253 hlist_for_each_entry(core, &clk_root_list, child_node)
254 clk_unprepare_unused_subtree(core);
255
256 hlist_for_each_entry(core, &clk_orphan_list, child_node)
257 clk_unprepare_unused_subtree(core);
1af599df 258
eab89f69 259 clk_prepare_unlock();
1af599df
PG
260
261 return 0;
262}
4dff95dc 263late_initcall_sync(clk_disable_unused);
1af599df 264
4dff95dc 265/*** helper functions ***/
1af599df 266
4dff95dc 267const char *__clk_get_name(struct clk *clk)
1af599df 268{
4dff95dc 269 return !clk ? NULL : clk->core->name;
1af599df 270}
4dff95dc 271EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 272
4dff95dc
SB
273struct clk_hw *__clk_get_hw(struct clk *clk)
274{
275 return !clk ? NULL : clk->core->hw;
276}
277EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 278
4dff95dc 279u8 __clk_get_num_parents(struct clk *clk)
bddca894 280{
4dff95dc
SB
281 return !clk ? 0 : clk->core->num_parents;
282}
283EXPORT_SYMBOL_GPL(__clk_get_num_parents);
bddca894 284
4dff95dc
SB
285struct clk *__clk_get_parent(struct clk *clk)
286{
287 if (!clk)
288 return NULL;
289
290 /* TODO: Create a per-user clk and change callers to call clk_put */
291 return !clk->core->parent ? NULL : clk->core->parent->hw->clk;
bddca894 292}
4dff95dc 293EXPORT_SYMBOL_GPL(__clk_get_parent);
bddca894 294
4dff95dc
SB
295static struct clk_core *__clk_lookup_subtree(const char *name,
296 struct clk_core *core)
bddca894 297{
035a61c3 298 struct clk_core *child;
4dff95dc 299 struct clk_core *ret;
bddca894 300
4dff95dc
SB
301 if (!strcmp(core->name, name))
302 return core;
bddca894 303
4dff95dc
SB
304 hlist_for_each_entry(child, &core->children, child_node) {
305 ret = __clk_lookup_subtree(name, child);
306 if (ret)
307 return ret;
bddca894
PG
308 }
309
4dff95dc 310 return NULL;
bddca894
PG
311}
312
4dff95dc 313static struct clk_core *clk_core_lookup(const char *name)
bddca894 314{
4dff95dc
SB
315 struct clk_core *root_clk;
316 struct clk_core *ret;
bddca894 317
4dff95dc
SB
318 if (!name)
319 return NULL;
bddca894 320
4dff95dc
SB
321 /* search the 'proper' clk tree first */
322 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
323 ret = __clk_lookup_subtree(name, root_clk);
324 if (ret)
325 return ret;
bddca894
PG
326 }
327
4dff95dc
SB
328 /* if not found, then search the orphan tree */
329 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
330 ret = __clk_lookup_subtree(name, root_clk);
331 if (ret)
332 return ret;
333 }
bddca894 334
4dff95dc 335 return NULL;
bddca894
PG
336}
337
4dff95dc
SB
338static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
339 u8 index)
bddca894 340{
4dff95dc
SB
341 if (!core || index >= core->num_parents)
342 return NULL;
343 else if (!core->parents)
344 return clk_core_lookup(core->parent_names[index]);
345 else if (!core->parents[index])
346 return core->parents[index] =
347 clk_core_lookup(core->parent_names[index]);
348 else
349 return core->parents[index];
bddca894
PG
350}
351
4dff95dc 352struct clk *clk_get_parent_by_index(struct clk *clk, u8 index)
b2476490 353{
4dff95dc 354 struct clk_core *parent;
b2476490 355
4dff95dc
SB
356 if (!clk)
357 return NULL;
b2476490 358
4dff95dc 359 parent = clk_core_get_parent_by_index(clk->core, index);
5279fc40 360
4dff95dc
SB
361 return !parent ? NULL : parent->hw->clk;
362}
363EXPORT_SYMBOL_GPL(clk_get_parent_by_index);
e59c5371 364
4dff95dc
SB
365unsigned int __clk_get_enable_count(struct clk *clk)
366{
367 return !clk ? 0 : clk->core->enable_count;
368}
b2476490 369
4dff95dc
SB
370static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
371{
372 unsigned long ret;
b2476490 373
4dff95dc
SB
374 if (!core) {
375 ret = 0;
376 goto out;
377 }
b2476490 378
4dff95dc 379 ret = core->rate;
b2476490 380
4dff95dc
SB
381 if (core->flags & CLK_IS_ROOT)
382 goto out;
c646cbf1 383
4dff95dc
SB
384 if (!core->parent)
385 ret = 0;
b2476490 386
b2476490
MT
387out:
388 return ret;
389}
390
4dff95dc 391unsigned long __clk_get_rate(struct clk *clk)
b2476490 392{
4dff95dc
SB
393 if (!clk)
394 return 0;
6314b679 395
4dff95dc
SB
396 return clk_core_get_rate_nolock(clk->core);
397}
398EXPORT_SYMBOL_GPL(__clk_get_rate);
b2476490 399
4dff95dc
SB
400static unsigned long __clk_get_accuracy(struct clk_core *core)
401{
402 if (!core)
403 return 0;
b2476490 404
4dff95dc 405 return core->accuracy;
b2476490
MT
406}
407
4dff95dc 408unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 409{
4dff95dc 410 return !clk ? 0 : clk->core->flags;
fcb0ee6a 411}
4dff95dc 412EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 413
4dff95dc 414bool __clk_is_prepared(struct clk *clk)
fb2b3c9f 415{
4dff95dc
SB
416 if (!clk)
417 return false;
fb2b3c9f 418
4dff95dc 419 return clk_core_is_prepared(clk->core);
fb2b3c9f 420}
fb2b3c9f 421
4dff95dc 422bool __clk_is_enabled(struct clk *clk)
b2476490 423{
4dff95dc
SB
424 if (!clk)
425 return false;
b2476490 426
4dff95dc
SB
427 return clk_core_is_enabled(clk->core);
428}
429EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 430
4dff95dc
SB
431static bool mux_is_better_rate(unsigned long rate, unsigned long now,
432 unsigned long best, unsigned long flags)
433{
434 if (flags & CLK_MUX_ROUND_CLOSEST)
435 return abs(now - rate) < abs(best - rate);
1af599df 436
4dff95dc
SB
437 return now <= rate && now > best;
438}
bddca894 439
4dff95dc
SB
440static long
441clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate,
442 unsigned long min_rate,
443 unsigned long max_rate,
444 unsigned long *best_parent_rate,
445 struct clk_hw **best_parent_p,
446 unsigned long flags)
447{
448 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
449 int i, num_parents;
450 unsigned long parent_rate, best = 0;
b2476490 451
4dff95dc
SB
452 /* if NO_REPARENT flag set, pass through to current parent */
453 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
454 parent = core->parent;
455 if (core->flags & CLK_SET_RATE_PARENT)
456 best = __clk_determine_rate(parent ? parent->hw : NULL,
457 rate, min_rate, max_rate);
458 else if (parent)
459 best = clk_core_get_rate_nolock(parent);
460 else
461 best = clk_core_get_rate_nolock(core);
462 goto out;
463 }
b2476490 464
4dff95dc
SB
465 /* find the parent that can provide the fastest rate <= rate */
466 num_parents = core->num_parents;
467 for (i = 0; i < num_parents; i++) {
468 parent = clk_core_get_parent_by_index(core, i);
469 if (!parent)
470 continue;
471 if (core->flags & CLK_SET_RATE_PARENT)
472 parent_rate = __clk_determine_rate(parent->hw, rate,
473 min_rate,
474 max_rate);
475 else
476 parent_rate = clk_core_get_rate_nolock(parent);
477 if (mux_is_better_rate(rate, parent_rate, best, flags)) {
478 best_parent = parent;
479 best = parent_rate;
480 }
481 }
b2476490 482
4dff95dc
SB
483out:
484 if (best_parent)
485 *best_parent_p = best_parent->hw;
486 *best_parent_rate = best;
b2476490 487
4dff95dc 488 return best;
b33d212f 489}
4dff95dc
SB
490
491struct clk *__clk_lookup(const char *name)
fcb0ee6a 492{
4dff95dc
SB
493 struct clk_core *core = clk_core_lookup(name);
494
495 return !core ? NULL : core->hw->clk;
fcb0ee6a 496}
b2476490 497
4dff95dc
SB
498static void clk_core_get_boundaries(struct clk_core *core,
499 unsigned long *min_rate,
500 unsigned long *max_rate)
1c155b3d 501{
4dff95dc 502 struct clk *clk_user;
1c155b3d 503
4dff95dc
SB
504 *min_rate = 0;
505 *max_rate = ULONG_MAX;
496eadf8 506
4dff95dc
SB
507 hlist_for_each_entry(clk_user, &core->clks, clks_node)
508 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 509
4dff95dc
SB
510 hlist_for_each_entry(clk_user, &core->clks, clks_node)
511 *max_rate = min(*max_rate, clk_user->max_rate);
512}
1c155b3d 513
4dff95dc
SB
514/*
515 * Helper for finding best parent to provide a given frequency. This can be used
516 * directly as a determine_rate callback (e.g. for a mux), or from a more
517 * complex clock that may combine a mux with other operations.
518 */
519long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
520 unsigned long min_rate,
521 unsigned long max_rate,
522 unsigned long *best_parent_rate,
523 struct clk_hw **best_parent_p)
524{
525 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
526 best_parent_rate,
527 best_parent_p, 0);
1c155b3d 528}
4dff95dc 529EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 530
4dff95dc
SB
531long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
532 unsigned long min_rate,
533 unsigned long max_rate,
534 unsigned long *best_parent_rate,
535 struct clk_hw **best_parent_p)
b2476490 536{
4dff95dc
SB
537 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
538 best_parent_rate,
539 best_parent_p,
540 CLK_MUX_ROUND_CLOSEST);
541}
542EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 543
4dff95dc 544/*** clk api ***/
496eadf8 545
4dff95dc
SB
546static void clk_core_unprepare(struct clk_core *core)
547{
548 if (!core)
549 return;
b2476490 550
4dff95dc
SB
551 if (WARN_ON(core->prepare_count == 0))
552 return;
b2476490 553
4dff95dc
SB
554 if (--core->prepare_count > 0)
555 return;
b2476490 556
4dff95dc 557 WARN_ON(core->enable_count > 0);
b2476490 558
4dff95dc 559 trace_clk_unprepare(core);
b2476490 560
4dff95dc
SB
561 if (core->ops->unprepare)
562 core->ops->unprepare(core->hw);
563
564 trace_clk_unprepare_complete(core);
565 clk_core_unprepare(core->parent);
b2476490
MT
566}
567
4dff95dc
SB
568/**
569 * clk_unprepare - undo preparation of a clock source
570 * @clk: the clk being unprepared
571 *
572 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
573 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
574 * if the operation may sleep. One example is a clk which is accessed over
575 * I2c. In the complex case a clk gate operation may require a fast and a slow
576 * part. It is this reason that clk_unprepare and clk_disable are not mutually
577 * exclusive. In fact clk_disable must be called before clk_unprepare.
578 */
579void clk_unprepare(struct clk *clk)
1e435256 580{
4dff95dc
SB
581 if (IS_ERR_OR_NULL(clk))
582 return;
583
584 clk_prepare_lock();
585 clk_core_unprepare(clk->core);
586 clk_prepare_unlock();
1e435256 587}
4dff95dc 588EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 589
4dff95dc 590static int clk_core_prepare(struct clk_core *core)
b2476490 591{
4dff95dc 592 int ret = 0;
b2476490 593
4dff95dc 594 if (!core)
1e435256 595 return 0;
1e435256 596
4dff95dc
SB
597 if (core->prepare_count == 0) {
598 ret = clk_core_prepare(core->parent);
599 if (ret)
600 return ret;
b2476490 601
4dff95dc 602 trace_clk_prepare(core);
b2476490 603
4dff95dc
SB
604 if (core->ops->prepare)
605 ret = core->ops->prepare(core->hw);
b2476490 606
4dff95dc 607 trace_clk_prepare_complete(core);
1c155b3d 608
4dff95dc
SB
609 if (ret) {
610 clk_core_unprepare(core->parent);
611 return ret;
612 }
613 }
1c155b3d 614
4dff95dc 615 core->prepare_count++;
b2476490
MT
616
617 return 0;
618}
b2476490 619
4dff95dc
SB
620/**
621 * clk_prepare - prepare a clock source
622 * @clk: the clk being prepared
623 *
624 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
625 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
626 * operation may sleep. One example is a clk which is accessed over I2c. In
627 * the complex case a clk ungate operation may require a fast and a slow part.
628 * It is this reason that clk_prepare and clk_enable are not mutually
629 * exclusive. In fact clk_prepare must be called before clk_enable.
630 * Returns 0 on success, -EERROR otherwise.
631 */
632int clk_prepare(struct clk *clk)
b2476490 633{
4dff95dc 634 int ret;
b2476490 635
4dff95dc
SB
636 if (!clk)
637 return 0;
b2476490 638
4dff95dc
SB
639 clk_prepare_lock();
640 ret = clk_core_prepare(clk->core);
641 clk_prepare_unlock();
642
643 return ret;
b2476490 644}
4dff95dc 645EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 646
4dff95dc 647static void clk_core_disable(struct clk_core *core)
b2476490 648{
4dff95dc
SB
649 if (!core)
650 return;
035a61c3 651
4dff95dc
SB
652 if (WARN_ON(core->enable_count == 0))
653 return;
b2476490 654
4dff95dc
SB
655 if (--core->enable_count > 0)
656 return;
035a61c3 657
4dff95dc 658 trace_clk_disable(core);
035a61c3 659
4dff95dc
SB
660 if (core->ops->disable)
661 core->ops->disable(core->hw);
035a61c3 662
4dff95dc 663 trace_clk_disable_complete(core);
035a61c3 664
4dff95dc 665 clk_core_disable(core->parent);
035a61c3 666}
7ef3dcc8 667
4dff95dc
SB
668/**
669 * clk_disable - gate a clock
670 * @clk: the clk being gated
671 *
672 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
673 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
674 * clk if the operation is fast and will never sleep. One example is a
675 * SoC-internal clk which is controlled via simple register writes. In the
676 * complex case a clk gate operation may require a fast and a slow part. It is
677 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
678 * In fact clk_disable must be called before clk_unprepare.
679 */
680void clk_disable(struct clk *clk)
b2476490 681{
4dff95dc
SB
682 unsigned long flags;
683
684 if (IS_ERR_OR_NULL(clk))
685 return;
686
687 flags = clk_enable_lock();
688 clk_core_disable(clk->core);
689 clk_enable_unlock(flags);
b2476490 690}
4dff95dc 691EXPORT_SYMBOL_GPL(clk_disable);
b2476490 692
4dff95dc 693static int clk_core_enable(struct clk_core *core)
b2476490 694{
4dff95dc 695 int ret = 0;
b2476490 696
4dff95dc
SB
697 if (!core)
698 return 0;
b2476490 699
4dff95dc
SB
700 if (WARN_ON(core->prepare_count == 0))
701 return -ESHUTDOWN;
b2476490 702
4dff95dc
SB
703 if (core->enable_count == 0) {
704 ret = clk_core_enable(core->parent);
b2476490 705
4dff95dc
SB
706 if (ret)
707 return ret;
b2476490 708
4dff95dc 709 trace_clk_enable(core);
035a61c3 710
4dff95dc
SB
711 if (core->ops->enable)
712 ret = core->ops->enable(core->hw);
035a61c3 713
4dff95dc
SB
714 trace_clk_enable_complete(core);
715
716 if (ret) {
717 clk_core_disable(core->parent);
718 return ret;
719 }
720 }
721
722 core->enable_count++;
723 return 0;
035a61c3 724}
b2476490 725
4dff95dc
SB
726/**
727 * clk_enable - ungate a clock
728 * @clk: the clk being ungated
729 *
730 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
731 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
732 * if the operation will never sleep. One example is a SoC-internal clk which
733 * is controlled via simple register writes. In the complex case a clk ungate
734 * operation may require a fast and a slow part. It is this reason that
735 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
736 * must be called before clk_enable. Returns 0 on success, -EERROR
737 * otherwise.
738 */
739int clk_enable(struct clk *clk)
5279fc40 740{
4dff95dc
SB
741 unsigned long flags;
742 int ret;
743
744 if (!clk)
5279fc40
BB
745 return 0;
746
4dff95dc
SB
747 flags = clk_enable_lock();
748 ret = clk_core_enable(clk->core);
749 clk_enable_unlock(flags);
5279fc40 750
4dff95dc 751 return ret;
b2476490 752}
4dff95dc 753EXPORT_SYMBOL_GPL(clk_enable);
b2476490 754
4dff95dc
SB
755static unsigned long clk_core_round_rate_nolock(struct clk_core *core,
756 unsigned long rate,
757 unsigned long min_rate,
758 unsigned long max_rate)
3d6ee287 759{
4dff95dc
SB
760 unsigned long parent_rate = 0;
761 struct clk_core *parent;
762 struct clk_hw *parent_hw;
763
764 lockdep_assert_held(&prepare_lock);
3d6ee287 765
d6968fca 766 if (!core)
4dff95dc 767 return 0;
3d6ee287 768
4dff95dc
SB
769 parent = core->parent;
770 if (parent)
771 parent_rate = parent->rate;
3d6ee287 772
4dff95dc
SB
773 if (core->ops->determine_rate) {
774 parent_hw = parent ? parent->hw : NULL;
775 return core->ops->determine_rate(core->hw, rate,
776 min_rate, max_rate,
777 &parent_rate, &parent_hw);
778 } else if (core->ops->round_rate)
779 return core->ops->round_rate(core->hw, rate, &parent_rate);
780 else if (core->flags & CLK_SET_RATE_PARENT)
781 return clk_core_round_rate_nolock(core->parent, rate, min_rate,
782 max_rate);
783 else
784 return core->rate;
3d6ee287
UH
785}
786
4dff95dc
SB
787/**
788 * __clk_determine_rate - get the closest rate actually supported by a clock
789 * @hw: determine the rate of this clock
790 * @rate: target rate
791 * @min_rate: returned rate must be greater than this rate
792 * @max_rate: returned rate must be less than this rate
793 *
794 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate and
795 * .determine_rate.
796 */
797unsigned long __clk_determine_rate(struct clk_hw *hw,
798 unsigned long rate,
799 unsigned long min_rate,
800 unsigned long max_rate)
035a61c3 801{
4dff95dc
SB
802 if (!hw)
803 return 0;
035a61c3 804
4dff95dc 805 return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate);
035a61c3 806}
4dff95dc 807EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 808
4dff95dc
SB
809/**
810 * __clk_round_rate - round the given rate for a clk
811 * @clk: round the rate of this clock
812 * @rate: the rate which is to be rounded
813 *
814 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate
815 */
816unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)
b2476490 817{
4dff95dc
SB
818 unsigned long min_rate;
819 unsigned long max_rate;
b2476490 820
4dff95dc
SB
821 if (!clk)
822 return 0;
b2476490 823
4dff95dc 824 clk_core_get_boundaries(clk->core, &min_rate, &max_rate);
b2476490 825
4dff95dc 826 return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate);
b2476490 827}
4dff95dc 828EXPORT_SYMBOL_GPL(__clk_round_rate);
035a61c3 829
4dff95dc
SB
830/**
831 * clk_round_rate - round the given rate for a clk
832 * @clk: the clk for which we are rounding a rate
833 * @rate: the rate which is to be rounded
834 *
835 * Takes in a rate as input and rounds it to a rate that the clk can actually
836 * use which is then returned. If clk doesn't support round_rate operation
837 * then the parent rate is returned.
838 */
839long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 840{
4dff95dc
SB
841 unsigned long ret;
842
035a61c3 843 if (!clk)
4dff95dc 844 return 0;
035a61c3 845
4dff95dc
SB
846 clk_prepare_lock();
847 ret = __clk_round_rate(clk, rate);
848 clk_prepare_unlock();
849
850 return ret;
035a61c3 851}
4dff95dc 852EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 853
4dff95dc
SB
854/**
855 * __clk_notify - call clk notifier chain
856 * @core: clk that is changing rate
857 * @msg: clk notifier type (see include/linux/clk.h)
858 * @old_rate: old clk rate
859 * @new_rate: new clk rate
860 *
861 * Triggers a notifier call chain on the clk rate-change notification
862 * for 'clk'. Passes a pointer to the struct clk and the previous
863 * and current rates to the notifier callback. Intended to be called by
864 * internal clock code only. Returns NOTIFY_DONE from the last driver
865 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
866 * a driver returns that.
867 */
868static int __clk_notify(struct clk_core *core, unsigned long msg,
869 unsigned long old_rate, unsigned long new_rate)
b2476490 870{
4dff95dc
SB
871 struct clk_notifier *cn;
872 struct clk_notifier_data cnd;
873 int ret = NOTIFY_DONE;
b2476490 874
4dff95dc
SB
875 cnd.old_rate = old_rate;
876 cnd.new_rate = new_rate;
b2476490 877
4dff95dc
SB
878 list_for_each_entry(cn, &clk_notifier_list, node) {
879 if (cn->clk->core == core) {
880 cnd.clk = cn->clk;
881 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
882 &cnd);
883 }
b2476490
MT
884 }
885
4dff95dc 886 return ret;
b2476490
MT
887}
888
4dff95dc
SB
889/**
890 * __clk_recalc_accuracies
891 * @core: first clk in the subtree
892 *
893 * Walks the subtree of clks starting with clk and recalculates accuracies as
894 * it goes. Note that if a clk does not implement the .recalc_accuracy
895 * callback then it is assumed that the clock will take on the accuracy of it's
896 * parent.
897 *
898 * Caller must hold prepare_lock.
899 */
900static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 901{
4dff95dc
SB
902 unsigned long parent_accuracy = 0;
903 struct clk_core *child;
b2476490 904
4dff95dc 905 lockdep_assert_held(&prepare_lock);
b2476490 906
4dff95dc
SB
907 if (core->parent)
908 parent_accuracy = core->parent->accuracy;
b2476490 909
4dff95dc
SB
910 if (core->ops->recalc_accuracy)
911 core->accuracy = core->ops->recalc_accuracy(core->hw,
912 parent_accuracy);
913 else
914 core->accuracy = parent_accuracy;
b2476490 915
4dff95dc
SB
916 hlist_for_each_entry(child, &core->children, child_node)
917 __clk_recalc_accuracies(child);
b2476490
MT
918}
919
4dff95dc 920static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 921{
4dff95dc 922 unsigned long accuracy;
15a02c1f 923
4dff95dc
SB
924 clk_prepare_lock();
925 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
926 __clk_recalc_accuracies(core);
15a02c1f 927
4dff95dc
SB
928 accuracy = __clk_get_accuracy(core);
929 clk_prepare_unlock();
e366fdd7 930
4dff95dc 931 return accuracy;
e366fdd7 932}
15a02c1f 933
4dff95dc
SB
934/**
935 * clk_get_accuracy - return the accuracy of clk
936 * @clk: the clk whose accuracy is being returned
937 *
938 * Simply returns the cached accuracy of the clk, unless
939 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
940 * issued.
941 * If clk is NULL then returns 0.
942 */
943long clk_get_accuracy(struct clk *clk)
035a61c3 944{
4dff95dc
SB
945 if (!clk)
946 return 0;
035a61c3 947
4dff95dc 948 return clk_core_get_accuracy(clk->core);
035a61c3 949}
4dff95dc 950EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 951
4dff95dc
SB
952static unsigned long clk_recalc(struct clk_core *core,
953 unsigned long parent_rate)
1c8e6004 954{
4dff95dc
SB
955 if (core->ops->recalc_rate)
956 return core->ops->recalc_rate(core->hw, parent_rate);
957 return parent_rate;
1c8e6004
TV
958}
959
4dff95dc
SB
960/**
961 * __clk_recalc_rates
962 * @core: first clk in the subtree
963 * @msg: notification type (see include/linux/clk.h)
964 *
965 * Walks the subtree of clks starting with clk and recalculates rates as it
966 * goes. Note that if a clk does not implement the .recalc_rate callback then
967 * it is assumed that the clock will take on the rate of its parent.
968 *
969 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
970 * if necessary.
971 *
972 * Caller must hold prepare_lock.
15a02c1f 973 */
4dff95dc 974static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 975{
4dff95dc
SB
976 unsigned long old_rate;
977 unsigned long parent_rate = 0;
978 struct clk_core *child;
e366fdd7 979
4dff95dc 980 lockdep_assert_held(&prepare_lock);
15a02c1f 981
4dff95dc 982 old_rate = core->rate;
b2476490 983
4dff95dc
SB
984 if (core->parent)
985 parent_rate = core->parent->rate;
b2476490 986
4dff95dc 987 core->rate = clk_recalc(core, parent_rate);
b2476490 988
4dff95dc
SB
989 /*
990 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
991 * & ABORT_RATE_CHANGE notifiers
992 */
993 if (core->notifier_count && msg)
994 __clk_notify(core, msg, old_rate, core->rate);
b2476490 995
4dff95dc
SB
996 hlist_for_each_entry(child, &core->children, child_node)
997 __clk_recalc_rates(child, msg);
998}
b2476490 999
4dff95dc
SB
1000static unsigned long clk_core_get_rate(struct clk_core *core)
1001{
1002 unsigned long rate;
dfc202ea 1003
4dff95dc 1004 clk_prepare_lock();
b2476490 1005
4dff95dc
SB
1006 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1007 __clk_recalc_rates(core, 0);
1008
1009 rate = clk_core_get_rate_nolock(core);
1010 clk_prepare_unlock();
1011
1012 return rate;
b2476490
MT
1013}
1014
1015/**
4dff95dc
SB
1016 * clk_get_rate - return the rate of clk
1017 * @clk: the clk whose rate is being returned
b2476490 1018 *
4dff95dc
SB
1019 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1020 * is set, which means a recalc_rate will be issued.
1021 * If clk is NULL then returns 0.
b2476490 1022 */
4dff95dc 1023unsigned long clk_get_rate(struct clk *clk)
b2476490 1024{
4dff95dc
SB
1025 if (!clk)
1026 return 0;
63589e92 1027
4dff95dc 1028 return clk_core_get_rate(clk->core);
b2476490 1029}
4dff95dc 1030EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1031
4dff95dc
SB
1032static int clk_fetch_parent_index(struct clk_core *core,
1033 struct clk_core *parent)
b2476490 1034{
4dff95dc 1035 int i;
b2476490 1036
4dff95dc
SB
1037 if (!core->parents) {
1038 core->parents = kcalloc(core->num_parents,
1039 sizeof(struct clk *), GFP_KERNEL);
1040 if (!core->parents)
1041 return -ENOMEM;
1042 }
dfc202ea 1043
4dff95dc
SB
1044 /*
1045 * find index of new parent clock using cached parent ptrs,
1046 * or if not yet cached, use string name comparison and cache
1047 * them now to avoid future calls to clk_core_lookup.
1048 */
1049 for (i = 0; i < core->num_parents; i++) {
1050 if (core->parents[i] == parent)
1051 return i;
dfc202ea 1052
4dff95dc
SB
1053 if (core->parents[i])
1054 continue;
dfc202ea 1055
4dff95dc
SB
1056 if (!strcmp(core->parent_names[i], parent->name)) {
1057 core->parents[i] = clk_core_lookup(parent->name);
1058 return i;
b2476490
MT
1059 }
1060 }
1061
4dff95dc 1062 return -EINVAL;
b2476490
MT
1063}
1064
4dff95dc 1065static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1066{
4dff95dc 1067 hlist_del(&core->child_node);
035a61c3 1068
4dff95dc
SB
1069 if (new_parent) {
1070 /* avoid duplicate POST_RATE_CHANGE notifications */
1071 if (new_parent->new_child == core)
1072 new_parent->new_child = NULL;
b2476490 1073
4dff95dc
SB
1074 hlist_add_head(&core->child_node, &new_parent->children);
1075 } else {
1076 hlist_add_head(&core->child_node, &clk_orphan_list);
1077 }
dfc202ea 1078
4dff95dc 1079 core->parent = new_parent;
035a61c3
TV
1080}
1081
4dff95dc
SB
1082static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1083 struct clk_core *parent)
b2476490
MT
1084{
1085 unsigned long flags;
4dff95dc 1086 struct clk_core *old_parent = core->parent;
b2476490 1087
4dff95dc
SB
1088 /*
1089 * Migrate prepare state between parents and prevent race with
1090 * clk_enable().
1091 *
1092 * If the clock is not prepared, then a race with
1093 * clk_enable/disable() is impossible since we already have the
1094 * prepare lock (future calls to clk_enable() need to be preceded by
1095 * a clk_prepare()).
1096 *
1097 * If the clock is prepared, migrate the prepared state to the new
1098 * parent and also protect against a race with clk_enable() by
1099 * forcing the clock and the new parent on. This ensures that all
1100 * future calls to clk_enable() are practically NOPs with respect to
1101 * hardware and software states.
1102 *
1103 * See also: Comment for clk_set_parent() below.
1104 */
1105 if (core->prepare_count) {
1106 clk_core_prepare(parent);
1107 clk_core_enable(parent);
1108 clk_core_enable(core);
1109 }
63589e92 1110
4dff95dc 1111 /* update the clk tree topology */
eab89f69 1112 flags = clk_enable_lock();
4dff95dc 1113 clk_reparent(core, parent);
eab89f69 1114 clk_enable_unlock(flags);
4dff95dc
SB
1115
1116 return old_parent;
b2476490 1117}
b2476490 1118
4dff95dc
SB
1119static void __clk_set_parent_after(struct clk_core *core,
1120 struct clk_core *parent,
1121 struct clk_core *old_parent)
b2476490 1122{
4dff95dc
SB
1123 /*
1124 * Finish the migration of prepare state and undo the changes done
1125 * for preventing a race with clk_enable().
1126 */
1127 if (core->prepare_count) {
1128 clk_core_disable(core);
1129 clk_core_disable(old_parent);
1130 clk_core_unprepare(old_parent);
1131 }
1132}
b2476490 1133
4dff95dc
SB
1134static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1135 u8 p_index)
1136{
1137 unsigned long flags;
1138 int ret = 0;
1139 struct clk_core *old_parent;
b2476490 1140
4dff95dc 1141 old_parent = __clk_set_parent_before(core, parent);
b2476490 1142
4dff95dc 1143 trace_clk_set_parent(core, parent);
b2476490 1144
4dff95dc
SB
1145 /* change clock input source */
1146 if (parent && core->ops->set_parent)
1147 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1148
4dff95dc 1149 trace_clk_set_parent_complete(core, parent);
dfc202ea 1150
4dff95dc
SB
1151 if (ret) {
1152 flags = clk_enable_lock();
1153 clk_reparent(core, old_parent);
1154 clk_enable_unlock(flags);
dfc202ea 1155
4dff95dc
SB
1156 if (core->prepare_count) {
1157 clk_core_disable(core);
1158 clk_core_disable(parent);
1159 clk_core_unprepare(parent);
b2476490 1160 }
4dff95dc 1161 return ret;
b2476490
MT
1162 }
1163
4dff95dc
SB
1164 __clk_set_parent_after(core, parent, old_parent);
1165
b2476490
MT
1166 return 0;
1167}
1168
1169/**
4dff95dc
SB
1170 * __clk_speculate_rates
1171 * @core: first clk in the subtree
1172 * @parent_rate: the "future" rate of clk's parent
b2476490 1173 *
4dff95dc
SB
1174 * Walks the subtree of clks starting with clk, speculating rates as it
1175 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1176 *
1177 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1178 * pre-rate change notifications and returns early if no clks in the
1179 * subtree have subscribed to the notifications. Note that if a clk does not
1180 * implement the .recalc_rate callback then it is assumed that the clock will
1181 * take on the rate of its parent.
1182 *
1183 * Caller must hold prepare_lock.
b2476490 1184 */
4dff95dc
SB
1185static int __clk_speculate_rates(struct clk_core *core,
1186 unsigned long parent_rate)
b2476490 1187{
4dff95dc
SB
1188 struct clk_core *child;
1189 unsigned long new_rate;
1190 int ret = NOTIFY_DONE;
b2476490 1191
4dff95dc 1192 lockdep_assert_held(&prepare_lock);
864e160a 1193
4dff95dc
SB
1194 new_rate = clk_recalc(core, parent_rate);
1195
1196 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1197 if (core->notifier_count)
1198 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1199
1200 if (ret & NOTIFY_STOP_MASK) {
1201 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1202 __func__, core->name, ret);
1203 goto out;
1204 }
1205
1206 hlist_for_each_entry(child, &core->children, child_node) {
1207 ret = __clk_speculate_rates(child, new_rate);
1208 if (ret & NOTIFY_STOP_MASK)
1209 break;
1210 }
b2476490 1211
4dff95dc 1212out:
b2476490
MT
1213 return ret;
1214}
b2476490 1215
4dff95dc
SB
1216static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1217 struct clk_core *new_parent, u8 p_index)
b2476490 1218{
4dff95dc 1219 struct clk_core *child;
b2476490 1220
4dff95dc
SB
1221 core->new_rate = new_rate;
1222 core->new_parent = new_parent;
1223 core->new_parent_index = p_index;
1224 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1225 core->new_child = NULL;
1226 if (new_parent && new_parent != core->parent)
1227 new_parent->new_child = core;
496eadf8 1228
4dff95dc
SB
1229 hlist_for_each_entry(child, &core->children, child_node) {
1230 child->new_rate = clk_recalc(child, new_rate);
1231 clk_calc_subtree(child, child->new_rate, NULL, 0);
1232 }
1233}
b2476490 1234
4dff95dc
SB
1235/*
1236 * calculate the new rates returning the topmost clock that has to be
1237 * changed.
1238 */
1239static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1240 unsigned long rate)
1241{
1242 struct clk_core *top = core;
1243 struct clk_core *old_parent, *parent;
1244 struct clk_hw *parent_hw;
1245 unsigned long best_parent_rate = 0;
1246 unsigned long new_rate;
1247 unsigned long min_rate;
1248 unsigned long max_rate;
1249 int p_index = 0;
1250 long ret;
1251
1252 /* sanity */
1253 if (IS_ERR_OR_NULL(core))
1254 return NULL;
1255
1256 /* save parent rate, if it exists */
1257 parent = old_parent = core->parent;
71472c0c 1258 if (parent)
4dff95dc 1259 best_parent_rate = parent->rate;
71472c0c 1260
4dff95dc
SB
1261 clk_core_get_boundaries(core, &min_rate, &max_rate);
1262
1263 /* find the closest rate and parent clk/rate */
d6968fca 1264 if (core->ops->determine_rate) {
646cafc6 1265 parent_hw = parent ? parent->hw : NULL;
4dff95dc
SB
1266 ret = core->ops->determine_rate(core->hw, rate,
1267 min_rate,
1268 max_rate,
1269 &best_parent_rate,
1270 &parent_hw);
1271 if (ret < 0)
1272 return NULL;
1c8e6004 1273
4dff95dc
SB
1274 new_rate = ret;
1275 parent = parent_hw ? parent_hw->core : NULL;
1276 } else if (core->ops->round_rate) {
1277 ret = core->ops->round_rate(core->hw, rate,
1278 &best_parent_rate);
1279 if (ret < 0)
1280 return NULL;
035a61c3 1281
4dff95dc
SB
1282 new_rate = ret;
1283 if (new_rate < min_rate || new_rate > max_rate)
1284 return NULL;
1285 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1286 /* pass-through clock without adjustable parent */
1287 core->new_rate = core->rate;
1288 return NULL;
1289 } else {
1290 /* pass-through clock with adjustable parent */
1291 top = clk_calc_new_rates(parent, rate);
1292 new_rate = parent->new_rate;
1293 goto out;
1294 }
1c8e6004 1295
4dff95dc
SB
1296 /* some clocks must be gated to change parent */
1297 if (parent != old_parent &&
1298 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1299 pr_debug("%s: %s not gated but wants to reparent\n",
1300 __func__, core->name);
1301 return NULL;
1302 }
b2476490 1303
4dff95dc
SB
1304 /* try finding the new parent index */
1305 if (parent && core->num_parents > 1) {
1306 p_index = clk_fetch_parent_index(core, parent);
1307 if (p_index < 0) {
1308 pr_debug("%s: clk %s can not be parent of clk %s\n",
1309 __func__, parent->name, core->name);
1310 return NULL;
1311 }
1312 }
b2476490 1313
4dff95dc
SB
1314 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1315 best_parent_rate != parent->rate)
1316 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1317
4dff95dc
SB
1318out:
1319 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1320
4dff95dc 1321 return top;
b2476490 1322}
b2476490 1323
4dff95dc
SB
1324/*
1325 * Notify about rate changes in a subtree. Always walk down the whole tree
1326 * so that in case of an error we can walk down the whole tree again and
1327 * abort the change.
b2476490 1328 */
4dff95dc
SB
1329static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1330 unsigned long event)
b2476490 1331{
4dff95dc 1332 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1333 int ret = NOTIFY_DONE;
1334
4dff95dc
SB
1335 if (core->rate == core->new_rate)
1336 return NULL;
b2476490 1337
4dff95dc
SB
1338 if (core->notifier_count) {
1339 ret = __clk_notify(core, event, core->rate, core->new_rate);
1340 if (ret & NOTIFY_STOP_MASK)
1341 fail_clk = core;
b2476490
MT
1342 }
1343
4dff95dc
SB
1344 hlist_for_each_entry(child, &core->children, child_node) {
1345 /* Skip children who will be reparented to another clock */
1346 if (child->new_parent && child->new_parent != core)
1347 continue;
1348 tmp_clk = clk_propagate_rate_change(child, event);
1349 if (tmp_clk)
1350 fail_clk = tmp_clk;
1351 }
5279fc40 1352
4dff95dc
SB
1353 /* handle the new child who might not be in core->children yet */
1354 if (core->new_child) {
1355 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1356 if (tmp_clk)
1357 fail_clk = tmp_clk;
1358 }
5279fc40 1359
4dff95dc 1360 return fail_clk;
5279fc40
BB
1361}
1362
4dff95dc
SB
1363/*
1364 * walk down a subtree and set the new rates notifying the rate
1365 * change on the way
1366 */
1367static void clk_change_rate(struct clk_core *core)
035a61c3 1368{
4dff95dc
SB
1369 struct clk_core *child;
1370 struct hlist_node *tmp;
1371 unsigned long old_rate;
1372 unsigned long best_parent_rate = 0;
1373 bool skip_set_rate = false;
1374 struct clk_core *old_parent;
035a61c3 1375
4dff95dc 1376 old_rate = core->rate;
035a61c3 1377
4dff95dc
SB
1378 if (core->new_parent)
1379 best_parent_rate = core->new_parent->rate;
1380 else if (core->parent)
1381 best_parent_rate = core->parent->rate;
035a61c3 1382
4dff95dc
SB
1383 if (core->new_parent && core->new_parent != core->parent) {
1384 old_parent = __clk_set_parent_before(core, core->new_parent);
1385 trace_clk_set_parent(core, core->new_parent);
5279fc40 1386
4dff95dc
SB
1387 if (core->ops->set_rate_and_parent) {
1388 skip_set_rate = true;
1389 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1390 best_parent_rate,
1391 core->new_parent_index);
1392 } else if (core->ops->set_parent) {
1393 core->ops->set_parent(core->hw, core->new_parent_index);
1394 }
5279fc40 1395
4dff95dc
SB
1396 trace_clk_set_parent_complete(core, core->new_parent);
1397 __clk_set_parent_after(core, core->new_parent, old_parent);
1398 }
8f2c2db1 1399
4dff95dc 1400 trace_clk_set_rate(core, core->new_rate);
b2476490 1401
4dff95dc
SB
1402 if (!skip_set_rate && core->ops->set_rate)
1403 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1404
4dff95dc 1405 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1406
4dff95dc 1407 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1408
4dff95dc
SB
1409 if (core->notifier_count && old_rate != core->rate)
1410 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490
MT
1411
1412 /*
4dff95dc
SB
1413 * Use safe iteration, as change_rate can actually swap parents
1414 * for certain clock types.
b2476490 1415 */
4dff95dc
SB
1416 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1417 /* Skip children who will be reparented to another clock */
1418 if (child->new_parent && child->new_parent != core)
1419 continue;
1420 clk_change_rate(child);
1421 }
b2476490 1422
4dff95dc
SB
1423 /* handle the new child who might not be in core->children yet */
1424 if (core->new_child)
1425 clk_change_rate(core->new_child);
b2476490
MT
1426}
1427
4dff95dc
SB
1428static int clk_core_set_rate_nolock(struct clk_core *core,
1429 unsigned long req_rate)
a093bde2 1430{
4dff95dc
SB
1431 struct clk_core *top, *fail_clk;
1432 unsigned long rate = req_rate;
1433 int ret = 0;
a093bde2 1434
4dff95dc
SB
1435 if (!core)
1436 return 0;
a093bde2 1437
4dff95dc
SB
1438 /* bail early if nothing to do */
1439 if (rate == clk_core_get_rate_nolock(core))
1440 return 0;
a093bde2 1441
4dff95dc
SB
1442 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1443 return -EBUSY;
a093bde2 1444
4dff95dc
SB
1445 /* calculate new rates and get the topmost changed clock */
1446 top = clk_calc_new_rates(core, rate);
1447 if (!top)
1448 return -EINVAL;
1449
1450 /* notify that we are about to change rates */
1451 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1452 if (fail_clk) {
1453 pr_debug("%s: failed to set %s rate\n", __func__,
1454 fail_clk->name);
1455 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1456 return -EBUSY;
1457 }
1458
1459 /* change the rates */
1460 clk_change_rate(top);
1461
1462 core->req_rate = req_rate;
1463
1464 return ret;
a093bde2 1465}
035a61c3
TV
1466
1467/**
4dff95dc
SB
1468 * clk_set_rate - specify a new rate for clk
1469 * @clk: the clk whose rate is being changed
1470 * @rate: the new rate for clk
035a61c3 1471 *
4dff95dc
SB
1472 * In the simplest case clk_set_rate will only adjust the rate of clk.
1473 *
1474 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1475 * propagate up to clk's parent; whether or not this happens depends on the
1476 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1477 * after calling .round_rate then upstream parent propagation is ignored. If
1478 * *parent_rate comes back with a new rate for clk's parent then we propagate
1479 * up to clk's parent and set its rate. Upward propagation will continue
1480 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1481 * .round_rate stops requesting changes to clk's parent_rate.
1482 *
1483 * Rate changes are accomplished via tree traversal that also recalculates the
1484 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1485 *
1486 * Returns 0 on success, -EERROR otherwise.
035a61c3 1487 */
4dff95dc 1488int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1489{
4dff95dc
SB
1490 int ret;
1491
035a61c3
TV
1492 if (!clk)
1493 return 0;
1494
4dff95dc
SB
1495 /* prevent racing with updates to the clock topology */
1496 clk_prepare_lock();
da0f0b2c 1497
4dff95dc 1498 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1499
4dff95dc 1500 clk_prepare_unlock();
4935b22c 1501
4dff95dc 1502 return ret;
4935b22c 1503}
4dff95dc 1504EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1505
4dff95dc
SB
1506/**
1507 * clk_set_rate_range - set a rate range for a clock source
1508 * @clk: clock source
1509 * @min: desired minimum clock rate in Hz, inclusive
1510 * @max: desired maximum clock rate in Hz, inclusive
1511 *
1512 * Returns success (0) or negative errno.
1513 */
1514int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1515{
4dff95dc 1516 int ret = 0;
4935b22c 1517
4dff95dc
SB
1518 if (!clk)
1519 return 0;
903efc55 1520
4dff95dc
SB
1521 if (min > max) {
1522 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1523 __func__, clk->core->name, clk->dev_id, clk->con_id,
1524 min, max);
1525 return -EINVAL;
903efc55 1526 }
4935b22c 1527
4dff95dc 1528 clk_prepare_lock();
4935b22c 1529
4dff95dc
SB
1530 if (min != clk->min_rate || max != clk->max_rate) {
1531 clk->min_rate = min;
1532 clk->max_rate = max;
1533 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1534 }
1535
4dff95dc 1536 clk_prepare_unlock();
4935b22c 1537
4dff95dc 1538 return ret;
3fa2252b 1539}
4dff95dc 1540EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1541
4dff95dc
SB
1542/**
1543 * clk_set_min_rate - set a minimum clock rate for a clock source
1544 * @clk: clock source
1545 * @rate: desired minimum clock rate in Hz, inclusive
1546 *
1547 * Returns success (0) or negative errno.
1548 */
1549int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1550{
4dff95dc
SB
1551 if (!clk)
1552 return 0;
1553
1554 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1555}
4dff95dc 1556EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1557
4dff95dc
SB
1558/**
1559 * clk_set_max_rate - set a maximum clock rate for a clock source
1560 * @clk: clock source
1561 * @rate: desired maximum clock rate in Hz, inclusive
1562 *
1563 * Returns success (0) or negative errno.
1564 */
1565int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1566{
4dff95dc
SB
1567 if (!clk)
1568 return 0;
4935b22c 1569
4dff95dc 1570 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1571}
4dff95dc 1572EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1573
b2476490 1574/**
4dff95dc
SB
1575 * clk_get_parent - return the parent of a clk
1576 * @clk: the clk whose parent gets returned
b2476490 1577 *
4dff95dc 1578 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1579 */
4dff95dc 1580struct clk *clk_get_parent(struct clk *clk)
b2476490 1581{
4dff95dc 1582 struct clk *parent;
b2476490 1583
4dff95dc
SB
1584 clk_prepare_lock();
1585 parent = __clk_get_parent(clk);
1586 clk_prepare_unlock();
496eadf8 1587
4dff95dc
SB
1588 return parent;
1589}
1590EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1591
4dff95dc
SB
1592/*
1593 * .get_parent is mandatory for clocks with multiple possible parents. It is
1594 * optional for single-parent clocks. Always call .get_parent if it is
1595 * available and WARN if it is missing for multi-parent clocks.
1596 *
1597 * For single-parent clocks without .get_parent, first check to see if the
1598 * .parents array exists, and if so use it to avoid an expensive tree
1599 * traversal. If .parents does not exist then walk the tree.
1600 */
1601static struct clk_core *__clk_init_parent(struct clk_core *core)
1602{
1603 struct clk_core *ret = NULL;
1604 u8 index;
b2476490 1605
4dff95dc
SB
1606 /* handle the trivial cases */
1607
1608 if (!core->num_parents)
b2476490
MT
1609 goto out;
1610
4dff95dc
SB
1611 if (core->num_parents == 1) {
1612 if (IS_ERR_OR_NULL(core->parent))
1613 core->parent = clk_core_lookup(core->parent_names[0]);
1614 ret = core->parent;
1615 goto out;
b2476490
MT
1616 }
1617
4dff95dc
SB
1618 if (!core->ops->get_parent) {
1619 WARN(!core->ops->get_parent,
1620 "%s: multi-parent clocks must implement .get_parent\n",
1621 __func__);
1622 goto out;
1623 };
1624
1625 /*
1626 * Do our best to cache parent clocks in core->parents. This prevents
1627 * unnecessary and expensive lookups. We don't set core->parent here;
1628 * that is done by the calling function.
1629 */
1630
1631 index = core->ops->get_parent(core->hw);
1632
1633 if (!core->parents)
1634 core->parents =
1635 kcalloc(core->num_parents, sizeof(struct clk *),
1636 GFP_KERNEL);
1637
1638 ret = clk_core_get_parent_by_index(core, index);
1639
b2476490
MT
1640out:
1641 return ret;
1642}
1643
4dff95dc
SB
1644static void clk_core_reparent(struct clk_core *core,
1645 struct clk_core *new_parent)
b2476490 1646{
4dff95dc
SB
1647 clk_reparent(core, new_parent);
1648 __clk_recalc_accuracies(core);
1649 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1650}
1651
4dff95dc
SB
1652/**
1653 * clk_has_parent - check if a clock is a possible parent for another
1654 * @clk: clock source
1655 * @parent: parent clock source
1656 *
1657 * This function can be used in drivers that need to check that a clock can be
1658 * the parent of another without actually changing the parent.
1659 *
1660 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1661 */
4dff95dc 1662bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1663{
4dff95dc
SB
1664 struct clk_core *core, *parent_core;
1665 unsigned int i;
b2476490 1666
4dff95dc
SB
1667 /* NULL clocks should be nops, so return success if either is NULL. */
1668 if (!clk || !parent)
1669 return true;
7452b219 1670
4dff95dc
SB
1671 core = clk->core;
1672 parent_core = parent->core;
71472c0c 1673
4dff95dc
SB
1674 /* Optimize for the case where the parent is already the parent. */
1675 if (core->parent == parent_core)
1676 return true;
1c8e6004 1677
4dff95dc
SB
1678 for (i = 0; i < core->num_parents; i++)
1679 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1680 return true;
03bc10ab 1681
4dff95dc
SB
1682 return false;
1683}
1684EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1685
4dff95dc
SB
1686static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1687{
1688 int ret = 0;
1689 int p_index = 0;
1690 unsigned long p_rate = 0;
1691
1692 if (!core)
1693 return 0;
1694
1695 /* prevent racing with updates to the clock topology */
1696 clk_prepare_lock();
1697
1698 if (core->parent == parent)
1699 goto out;
1700
1701 /* verify ops for for multi-parent clks */
1702 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1703 ret = -ENOSYS;
63f5c3b2 1704 goto out;
7452b219
MT
1705 }
1706
4dff95dc
SB
1707 /* check that we are allowed to re-parent if the clock is in use */
1708 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1709 ret = -EBUSY;
1710 goto out;
b2476490
MT
1711 }
1712
71472c0c 1713 /* try finding the new parent index */
4dff95dc 1714 if (parent) {
d6968fca 1715 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1716 p_rate = parent->rate;
f1c8b2ed 1717 if (p_index < 0) {
71472c0c 1718 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1719 __func__, parent->name, core->name);
1720 ret = p_index;
1721 goto out;
71472c0c 1722 }
b2476490
MT
1723 }
1724
4dff95dc
SB
1725 /* propagate PRE_RATE_CHANGE notifications */
1726 ret = __clk_speculate_rates(core, p_rate);
b2476490 1727
4dff95dc
SB
1728 /* abort if a driver objects */
1729 if (ret & NOTIFY_STOP_MASK)
1730 goto out;
b2476490 1731
4dff95dc
SB
1732 /* do the re-parent */
1733 ret = __clk_set_parent(core, parent, p_index);
b2476490 1734
4dff95dc
SB
1735 /* propagate rate an accuracy recalculation accordingly */
1736 if (ret) {
1737 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1738 } else {
1739 __clk_recalc_rates(core, POST_RATE_CHANGE);
1740 __clk_recalc_accuracies(core);
b2476490
MT
1741 }
1742
4dff95dc
SB
1743out:
1744 clk_prepare_unlock();
71472c0c 1745
4dff95dc
SB
1746 return ret;
1747}
b2476490 1748
4dff95dc
SB
1749/**
1750 * clk_set_parent - switch the parent of a mux clk
1751 * @clk: the mux clk whose input we are switching
1752 * @parent: the new input to clk
1753 *
1754 * Re-parent clk to use parent as its new input source. If clk is in
1755 * prepared state, the clk will get enabled for the duration of this call. If
1756 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1757 * that, the reparenting is glitchy in hardware, etc), use the
1758 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1759 *
1760 * After successfully changing clk's parent clk_set_parent will update the
1761 * clk topology, sysfs topology and propagate rate recalculation via
1762 * __clk_recalc_rates.
1763 *
1764 * Returns 0 on success, -EERROR otherwise.
1765 */
1766int clk_set_parent(struct clk *clk, struct clk *parent)
1767{
1768 if (!clk)
1769 return 0;
1770
1771 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1772}
4dff95dc 1773EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1774
4dff95dc
SB
1775/**
1776 * clk_set_phase - adjust the phase shift of a clock signal
1777 * @clk: clock signal source
1778 * @degrees: number of degrees the signal is shifted
1779 *
1780 * Shifts the phase of a clock signal by the specified
1781 * degrees. Returns 0 on success, -EERROR otherwise.
1782 *
1783 * This function makes no distinction about the input or reference
1784 * signal that we adjust the clock signal phase against. For example
1785 * phase locked-loop clock signal generators we may shift phase with
1786 * respect to feedback clock signal input, but for other cases the
1787 * clock phase may be shifted with respect to some other, unspecified
1788 * signal.
1789 *
1790 * Additionally the concept of phase shift does not propagate through
1791 * the clock tree hierarchy, which sets it apart from clock rates and
1792 * clock accuracy. A parent clock phase attribute does not have an
1793 * impact on the phase attribute of a child clock.
b2476490 1794 */
4dff95dc 1795int clk_set_phase(struct clk *clk, int degrees)
b2476490 1796{
4dff95dc 1797 int ret = -EINVAL;
b2476490 1798
4dff95dc
SB
1799 if (!clk)
1800 return 0;
b2476490 1801
4dff95dc
SB
1802 /* sanity check degrees */
1803 degrees %= 360;
1804 if (degrees < 0)
1805 degrees += 360;
bf47b4fd 1806
4dff95dc 1807 clk_prepare_lock();
3fa2252b 1808
4dff95dc 1809 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1810
4dff95dc
SB
1811 if (clk->core->ops->set_phase)
1812 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1813
4dff95dc 1814 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1815
4dff95dc
SB
1816 if (!ret)
1817 clk->core->phase = degrees;
b2476490 1818
4dff95dc 1819 clk_prepare_unlock();
dfc202ea 1820
4dff95dc
SB
1821 return ret;
1822}
1823EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1824
4dff95dc
SB
1825static int clk_core_get_phase(struct clk_core *core)
1826{
1827 int ret;
b2476490 1828
4dff95dc
SB
1829 clk_prepare_lock();
1830 ret = core->phase;
1831 clk_prepare_unlock();
71472c0c 1832
4dff95dc 1833 return ret;
b2476490
MT
1834}
1835
4dff95dc
SB
1836/**
1837 * clk_get_phase - return the phase shift of a clock signal
1838 * @clk: clock signal source
1839 *
1840 * Returns the phase shift of a clock node in degrees, otherwise returns
1841 * -EERROR.
1842 */
1843int clk_get_phase(struct clk *clk)
1c8e6004 1844{
4dff95dc 1845 if (!clk)
1c8e6004
TV
1846 return 0;
1847
4dff95dc
SB
1848 return clk_core_get_phase(clk->core);
1849}
1850EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1851
4dff95dc
SB
1852/**
1853 * clk_is_match - check if two clk's point to the same hardware clock
1854 * @p: clk compared against q
1855 * @q: clk compared against p
1856 *
1857 * Returns true if the two struct clk pointers both point to the same hardware
1858 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1859 * share the same struct clk_core object.
1860 *
1861 * Returns false otherwise. Note that two NULL clks are treated as matching.
1862 */
1863bool clk_is_match(const struct clk *p, const struct clk *q)
1864{
1865 /* trivial case: identical struct clk's or both NULL */
1866 if (p == q)
1867 return true;
1c8e6004 1868
4dff95dc
SB
1869 /* true if clk->core pointers match. Avoid derefing garbage */
1870 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1871 if (p->core == q->core)
1872 return true;
1c8e6004 1873
4dff95dc
SB
1874 return false;
1875}
1876EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1877
4dff95dc 1878/*** debugfs support ***/
1c8e6004 1879
4dff95dc
SB
1880#ifdef CONFIG_DEBUG_FS
1881#include <linux/debugfs.h>
1c8e6004 1882
4dff95dc
SB
1883static struct dentry *rootdir;
1884static int inited = 0;
1885static DEFINE_MUTEX(clk_debug_lock);
1886static HLIST_HEAD(clk_debug_list);
1c8e6004 1887
4dff95dc
SB
1888static struct hlist_head *all_lists[] = {
1889 &clk_root_list,
1890 &clk_orphan_list,
1891 NULL,
1892};
1893
1894static struct hlist_head *orphan_list[] = {
1895 &clk_orphan_list,
1896 NULL,
1897};
1898
1899static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1900 int level)
b2476490 1901{
4dff95dc
SB
1902 if (!c)
1903 return;
b2476490 1904
4dff95dc
SB
1905 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1906 level * 3 + 1, "",
1907 30 - level * 3, c->name,
1908 c->enable_count, c->prepare_count, clk_core_get_rate(c),
1909 clk_core_get_accuracy(c), clk_core_get_phase(c));
1910}
89ac8d7a 1911
4dff95dc
SB
1912static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1913 int level)
1914{
1915 struct clk_core *child;
b2476490 1916
4dff95dc
SB
1917 if (!c)
1918 return;
b2476490 1919
4dff95dc 1920 clk_summary_show_one(s, c, level);
0e1c0301 1921
4dff95dc
SB
1922 hlist_for_each_entry(child, &c->children, child_node)
1923 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 1924}
b2476490 1925
4dff95dc 1926static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 1927{
4dff95dc
SB
1928 struct clk_core *c;
1929 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 1930
4dff95dc
SB
1931 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
1932 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 1933
1c8e6004
TV
1934 clk_prepare_lock();
1935
4dff95dc
SB
1936 for (; *lists; lists++)
1937 hlist_for_each_entry(c, *lists, child_node)
1938 clk_summary_show_subtree(s, c, 0);
b2476490 1939
eab89f69 1940 clk_prepare_unlock();
b2476490 1941
4dff95dc 1942 return 0;
b2476490 1943}
1c8e6004 1944
1c8e6004 1945
4dff95dc 1946static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 1947{
4dff95dc 1948 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 1949}
b2476490 1950
4dff95dc
SB
1951static const struct file_operations clk_summary_fops = {
1952 .open = clk_summary_open,
1953 .read = seq_read,
1954 .llseek = seq_lseek,
1955 .release = single_release,
1956};
b2476490 1957
4dff95dc
SB
1958static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
1959{
1960 if (!c)
1961 return;
b2476490 1962
4dff95dc
SB
1963 seq_printf(s, "\"%s\": { ", c->name);
1964 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
1965 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
1966 seq_printf(s, "\"rate\": %lu", clk_core_get_rate(c));
1967 seq_printf(s, "\"accuracy\": %lu", clk_core_get_accuracy(c));
1968 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 1969}
b2476490 1970
4dff95dc 1971static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 1972{
4dff95dc 1973 struct clk_core *child;
b2476490 1974
4dff95dc
SB
1975 if (!c)
1976 return;
b2476490 1977
4dff95dc 1978 clk_dump_one(s, c, level);
b2476490 1979
4dff95dc
SB
1980 hlist_for_each_entry(child, &c->children, child_node) {
1981 seq_printf(s, ",");
1982 clk_dump_subtree(s, child, level + 1);
b2476490
MT
1983 }
1984
4dff95dc 1985 seq_printf(s, "}");
b2476490
MT
1986}
1987
4dff95dc 1988static int clk_dump(struct seq_file *s, void *data)
4e88f3de 1989{
4dff95dc
SB
1990 struct clk_core *c;
1991 bool first_node = true;
1992 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 1993
4dff95dc 1994 seq_printf(s, "{");
4e88f3de 1995
4dff95dc 1996 clk_prepare_lock();
035a61c3 1997
4dff95dc
SB
1998 for (; *lists; lists++) {
1999 hlist_for_each_entry(c, *lists, child_node) {
2000 if (!first_node)
2001 seq_puts(s, ",");
2002 first_node = false;
2003 clk_dump_subtree(s, c, 0);
2004 }
2005 }
4e88f3de 2006
4dff95dc 2007 clk_prepare_unlock();
4e88f3de 2008
4dff95dc
SB
2009 seq_printf(s, "}");
2010 return 0;
4e88f3de 2011}
4e88f3de 2012
4dff95dc
SB
2013
2014static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2015{
4dff95dc
SB
2016 return single_open(file, clk_dump, inode->i_private);
2017}
b2476490 2018
4dff95dc
SB
2019static const struct file_operations clk_dump_fops = {
2020 .open = clk_dump_open,
2021 .read = seq_read,
2022 .llseek = seq_lseek,
2023 .release = single_release,
2024};
89ac8d7a 2025
4dff95dc
SB
2026static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2027{
2028 struct dentry *d;
2029 int ret = -ENOMEM;
b2476490 2030
4dff95dc
SB
2031 if (!core || !pdentry) {
2032 ret = -EINVAL;
b2476490 2033 goto out;
4dff95dc 2034 }
b2476490 2035
4dff95dc
SB
2036 d = debugfs_create_dir(core->name, pdentry);
2037 if (!d)
b61c43c0 2038 goto out;
b61c43c0 2039
4dff95dc
SB
2040 core->dentry = d;
2041
2042 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2043 (u32 *)&core->rate);
2044 if (!d)
2045 goto err_out;
2046
2047 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2048 (u32 *)&core->accuracy);
2049 if (!d)
2050 goto err_out;
2051
2052 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2053 (u32 *)&core->phase);
2054 if (!d)
2055 goto err_out;
031dcc9b 2056
4dff95dc
SB
2057 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2058 (u32 *)&core->flags);
2059 if (!d)
2060 goto err_out;
031dcc9b 2061
4dff95dc
SB
2062 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2063 (u32 *)&core->prepare_count);
2064 if (!d)
2065 goto err_out;
b2476490 2066
4dff95dc
SB
2067 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2068 (u32 *)&core->enable_count);
2069 if (!d)
2070 goto err_out;
b2476490 2071
4dff95dc
SB
2072 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2073 (u32 *)&core->notifier_count);
2074 if (!d)
2075 goto err_out;
b2476490 2076
4dff95dc
SB
2077 if (core->ops->debug_init) {
2078 ret = core->ops->debug_init(core->hw, core->dentry);
2079 if (ret)
2080 goto err_out;
5279fc40 2081 }
b2476490 2082
4dff95dc
SB
2083 ret = 0;
2084 goto out;
b2476490 2085
4dff95dc
SB
2086err_out:
2087 debugfs_remove_recursive(core->dentry);
2088 core->dentry = NULL;
2089out:
b2476490
MT
2090 return ret;
2091}
035a61c3
TV
2092
2093/**
4dff95dc
SB
2094 * clk_debug_register - add a clk node to the debugfs clk tree
2095 * @core: the clk being added to the debugfs clk tree
035a61c3 2096 *
4dff95dc
SB
2097 * Dynamically adds a clk to the debugfs clk tree if debugfs has been
2098 * initialized. Otherwise it bails out early since the debugfs clk tree
2099 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2100 */
4dff95dc 2101static int clk_debug_register(struct clk_core *core)
035a61c3 2102{
4dff95dc 2103 int ret = 0;
035a61c3 2104
4dff95dc
SB
2105 mutex_lock(&clk_debug_lock);
2106 hlist_add_head(&core->debug_node, &clk_debug_list);
2107
2108 if (!inited)
2109 goto unlock;
2110
2111 ret = clk_debug_create_one(core, rootdir);
2112unlock:
2113 mutex_unlock(&clk_debug_lock);
2114
2115 return ret;
035a61c3 2116}
b2476490 2117
4dff95dc
SB
2118 /**
2119 * clk_debug_unregister - remove a clk node from the debugfs clk tree
2120 * @core: the clk being removed from the debugfs clk tree
e59c5371 2121 *
4dff95dc
SB
2122 * Dynamically removes a clk and all it's children clk nodes from the
2123 * debugfs clk tree if clk->dentry points to debugfs created by
2124 * clk_debug_register in __clk_init.
e59c5371 2125 */
4dff95dc 2126static void clk_debug_unregister(struct clk_core *core)
e59c5371 2127{
4dff95dc
SB
2128 mutex_lock(&clk_debug_lock);
2129 hlist_del_init(&core->debug_node);
2130 debugfs_remove_recursive(core->dentry);
2131 core->dentry = NULL;
2132 mutex_unlock(&clk_debug_lock);
2133}
e59c5371 2134
4dff95dc
SB
2135struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2136 void *data, const struct file_operations *fops)
2137{
2138 struct dentry *d = NULL;
e59c5371 2139
4dff95dc
SB
2140 if (hw->core->dentry)
2141 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2142 fops);
e59c5371 2143
4dff95dc
SB
2144 return d;
2145}
2146EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2147
4dff95dc
SB
2148/**
2149 * clk_debug_init - lazily create the debugfs clk tree visualization
2150 *
2151 * clks are often initialized very early during boot before memory can
2152 * be dynamically allocated and well before debugfs is setup.
2153 * clk_debug_init walks the clk tree hierarchy while holding
2154 * prepare_lock and creates the topology as part of a late_initcall,
2155 * thus insuring that clks initialized very early will still be
2156 * represented in the debugfs clk tree. This function should only be
2157 * called once at boot-time, and all other clks added dynamically will
2158 * be done so with clk_debug_register.
2159 */
2160static int __init clk_debug_init(void)
2161{
2162 struct clk_core *core;
2163 struct dentry *d;
dfc202ea 2164
4dff95dc 2165 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2166
4dff95dc
SB
2167 if (!rootdir)
2168 return -ENOMEM;
dfc202ea 2169
4dff95dc
SB
2170 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2171 &clk_summary_fops);
2172 if (!d)
2173 return -ENOMEM;
e59c5371 2174
4dff95dc
SB
2175 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2176 &clk_dump_fops);
2177 if (!d)
2178 return -ENOMEM;
e59c5371 2179
4dff95dc
SB
2180 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2181 &orphan_list, &clk_summary_fops);
2182 if (!d)
2183 return -ENOMEM;
e59c5371 2184
4dff95dc
SB
2185 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2186 &orphan_list, &clk_dump_fops);
2187 if (!d)
2188 return -ENOMEM;
e59c5371 2189
4dff95dc
SB
2190 mutex_lock(&clk_debug_lock);
2191 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2192 clk_debug_create_one(core, rootdir);
e59c5371 2193
4dff95dc
SB
2194 inited = 1;
2195 mutex_unlock(&clk_debug_lock);
e59c5371 2196
4dff95dc
SB
2197 return 0;
2198}
2199late_initcall(clk_debug_init);
2200#else
2201static inline int clk_debug_register(struct clk_core *core) { return 0; }
2202static inline void clk_debug_reparent(struct clk_core *core,
2203 struct clk_core *new_parent)
035a61c3 2204{
035a61c3 2205}
4dff95dc 2206static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2207{
3d3801ef 2208}
4dff95dc 2209#endif
3d3801ef 2210
b2476490
MT
2211/**
2212 * __clk_init - initialize the data structures in a struct clk
2213 * @dev: device initializing this clk, placeholder for now
2214 * @clk: clk being initialized
2215 *
035a61c3 2216 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2217 * parent and rate and sets them both.
b2476490 2218 */
b09d6d99 2219static int __clk_init(struct device *dev, struct clk *clk_user)
b2476490 2220{
d1302a36 2221 int i, ret = 0;
035a61c3 2222 struct clk_core *orphan;
b67bfe0d 2223 struct hlist_node *tmp2;
d6968fca 2224 struct clk_core *core;
1c8e6004 2225 unsigned long rate;
b2476490 2226
035a61c3 2227 if (!clk_user)
d1302a36 2228 return -EINVAL;
b2476490 2229
d6968fca 2230 core = clk_user->core;
035a61c3 2231
eab89f69 2232 clk_prepare_lock();
b2476490
MT
2233
2234 /* check to see if a clock with this name is already registered */
d6968fca 2235 if (clk_core_lookup(core->name)) {
d1302a36 2236 pr_debug("%s: clk %s already initialized\n",
d6968fca 2237 __func__, core->name);
d1302a36 2238 ret = -EEXIST;
b2476490 2239 goto out;
d1302a36 2240 }
b2476490 2241
d4d7e3dd 2242 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2243 if (core->ops->set_rate &&
2244 !((core->ops->round_rate || core->ops->determine_rate) &&
2245 core->ops->recalc_rate)) {
71472c0c 2246 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d6968fca 2247 __func__, core->name);
d1302a36 2248 ret = -EINVAL;
d4d7e3dd
MT
2249 goto out;
2250 }
2251
d6968fca 2252 if (core->ops->set_parent && !core->ops->get_parent) {
d4d7e3dd 2253 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
d6968fca 2254 __func__, core->name);
d1302a36 2255 ret = -EINVAL;
d4d7e3dd
MT
2256 goto out;
2257 }
2258
d6968fca
SB
2259 if (core->ops->set_rate_and_parent &&
2260 !(core->ops->set_parent && core->ops->set_rate)) {
3fa2252b 2261 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2262 __func__, core->name);
3fa2252b
SB
2263 ret = -EINVAL;
2264 goto out;
2265 }
2266
b2476490 2267 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2268 for (i = 0; i < core->num_parents; i++)
2269 WARN(!core->parent_names[i],
b2476490 2270 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2271 __func__, core->name);
b2476490
MT
2272
2273 /*
2274 * Allocate an array of struct clk *'s to avoid unnecessary string
2275 * look-ups of clk's possible parents. This can fail for clocks passed
d6968fca 2276 * in to clk_init during early boot; thus any access to core->parents[]
b2476490
MT
2277 * must always check for a NULL pointer and try to populate it if
2278 * necessary.
2279 *
d6968fca
SB
2280 * If core->parents is not NULL we skip this entire block. This allows
2281 * for clock drivers to statically initialize core->parents.
b2476490 2282 */
d6968fca
SB
2283 if (core->num_parents > 1 && !core->parents) {
2284 core->parents = kcalloc(core->num_parents, sizeof(struct clk *),
96a7ed90 2285 GFP_KERNEL);
b2476490 2286 /*
035a61c3 2287 * clk_core_lookup returns NULL for parents that have not been
b2476490
MT
2288 * clk_init'd; thus any access to clk->parents[] must check
2289 * for a NULL pointer. We can always perform lazy lookups for
2290 * missing parents later on.
2291 */
d6968fca
SB
2292 if (core->parents)
2293 for (i = 0; i < core->num_parents; i++)
2294 core->parents[i] =
2295 clk_core_lookup(core->parent_names[i]);
b2476490
MT
2296 }
2297
d6968fca 2298 core->parent = __clk_init_parent(core);
b2476490
MT
2299
2300 /*
d6968fca 2301 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2302 * parent has not yet been __clk_init'd then place clk in the orphan
2303 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2304 * clk list.
2305 *
2306 * Every time a new clk is clk_init'd then we walk the list of orphan
2307 * clocks and re-parent any that are children of the clock currently
2308 * being clk_init'd.
2309 */
d6968fca
SB
2310 if (core->parent)
2311 hlist_add_head(&core->child_node,
2312 &core->parent->children);
2313 else if (core->flags & CLK_IS_ROOT)
2314 hlist_add_head(&core->child_node, &clk_root_list);
b2476490 2315 else
d6968fca 2316 hlist_add_head(&core->child_node, &clk_orphan_list);
b2476490 2317
5279fc40
BB
2318 /*
2319 * Set clk's accuracy. The preferred method is to use
2320 * .recalc_accuracy. For simple clocks and lazy developers the default
2321 * fallback is to use the parent's accuracy. If a clock doesn't have a
2322 * parent (or is orphaned) then accuracy is set to zero (perfect
2323 * clock).
2324 */
d6968fca
SB
2325 if (core->ops->recalc_accuracy)
2326 core->accuracy = core->ops->recalc_accuracy(core->hw,
2327 __clk_get_accuracy(core->parent));
2328 else if (core->parent)
2329 core->accuracy = core->parent->accuracy;
5279fc40 2330 else
d6968fca 2331 core->accuracy = 0;
5279fc40 2332
9824cf73
MR
2333 /*
2334 * Set clk's phase.
2335 * Since a phase is by definition relative to its parent, just
2336 * query the current clock phase, or just assume it's in phase.
2337 */
d6968fca
SB
2338 if (core->ops->get_phase)
2339 core->phase = core->ops->get_phase(core->hw);
9824cf73 2340 else
d6968fca 2341 core->phase = 0;
9824cf73 2342
b2476490
MT
2343 /*
2344 * Set clk's rate. The preferred method is to use .recalc_rate. For
2345 * simple clocks and lazy developers the default fallback is to use the
2346 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2347 * then rate is set to zero.
2348 */
d6968fca
SB
2349 if (core->ops->recalc_rate)
2350 rate = core->ops->recalc_rate(core->hw,
2351 clk_core_get_rate_nolock(core->parent));
2352 else if (core->parent)
2353 rate = core->parent->rate;
b2476490 2354 else
1c8e6004 2355 rate = 0;
d6968fca 2356 core->rate = core->req_rate = rate;
b2476490
MT
2357
2358 /*
2359 * walk the list of orphan clocks and reparent any that are children of
2360 * this clock
2361 */
b67bfe0d 2362 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2363 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2364 i = orphan->ops->get_parent(orphan->hw);
d6968fca
SB
2365 if (!strcmp(core->name, orphan->parent_names[i]))
2366 clk_core_reparent(orphan, core);
1f61e5f1
MF
2367 continue;
2368 }
2369
b2476490 2370 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2371 if (!strcmp(core->name, orphan->parent_names[i])) {
2372 clk_core_reparent(orphan, core);
b2476490
MT
2373 break;
2374 }
1f61e5f1 2375 }
b2476490
MT
2376
2377 /*
2378 * optional platform-specific magic
2379 *
2380 * The .init callback is not used by any of the basic clock types, but
2381 * exists for weird hardware that must perform initialization magic.
2382 * Please consider other ways of solving initialization problems before
24ee1a08 2383 * using this callback, as its use is discouraged.
b2476490 2384 */
d6968fca
SB
2385 if (core->ops->init)
2386 core->ops->init(core->hw);
b2476490 2387
d6968fca 2388 kref_init(&core->ref);
b2476490 2389out:
eab89f69 2390 clk_prepare_unlock();
b2476490 2391
89f7e9de 2392 if (!ret)
d6968fca 2393 clk_debug_register(core);
89f7e9de 2394
d1302a36 2395 return ret;
b2476490
MT
2396}
2397
035a61c3
TV
2398struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2399 const char *con_id)
0197b3ea 2400{
0197b3ea
SK
2401 struct clk *clk;
2402
035a61c3
TV
2403 /* This is to allow this function to be chained to others */
2404 if (!hw || IS_ERR(hw))
2405 return (struct clk *) hw;
0197b3ea 2406
035a61c3
TV
2407 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2408 if (!clk)
2409 return ERR_PTR(-ENOMEM);
2410
2411 clk->core = hw->core;
2412 clk->dev_id = dev_id;
2413 clk->con_id = con_id;
1c8e6004
TV
2414 clk->max_rate = ULONG_MAX;
2415
2416 clk_prepare_lock();
50595f8b 2417 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2418 clk_prepare_unlock();
0197b3ea
SK
2419
2420 return clk;
2421}
035a61c3 2422
73e0e496 2423void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2424{
2425 clk_prepare_lock();
50595f8b 2426 hlist_del(&clk->clks_node);
1c8e6004
TV
2427 clk_prepare_unlock();
2428
2429 kfree(clk);
2430}
0197b3ea 2431
293ba3b4
SB
2432/**
2433 * clk_register - allocate a new clock, register it and return an opaque cookie
2434 * @dev: device that is registering this clock
2435 * @hw: link to hardware-specific clock data
2436 *
2437 * clk_register is the primary interface for populating the clock tree with new
2438 * clock nodes. It returns a pointer to the newly allocated struct clk which
2439 * cannot be dereferenced by driver code but may be used in conjuction with the
2440 * rest of the clock API. In the event of an error clk_register will return an
2441 * error code; drivers must test for an error code after calling clk_register.
2442 */
2443struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2444{
d1302a36 2445 int i, ret;
d6968fca 2446 struct clk_core *core;
293ba3b4 2447
d6968fca
SB
2448 core = kzalloc(sizeof(*core), GFP_KERNEL);
2449 if (!core) {
293ba3b4
SB
2450 ret = -ENOMEM;
2451 goto fail_out;
2452 }
b2476490 2453
d6968fca
SB
2454 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2455 if (!core->name) {
0197b3ea
SK
2456 ret = -ENOMEM;
2457 goto fail_name;
2458 }
d6968fca 2459 core->ops = hw->init->ops;
ac2df527 2460 if (dev && dev->driver)
d6968fca
SB
2461 core->owner = dev->driver->owner;
2462 core->hw = hw;
2463 core->flags = hw->init->flags;
2464 core->num_parents = hw->init->num_parents;
2465 hw->core = core;
b2476490 2466
d1302a36 2467 /* allocate local copy in case parent_names is __initdata */
d6968fca 2468 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2469 GFP_KERNEL);
d1302a36 2470
d6968fca 2471 if (!core->parent_names) {
d1302a36
MT
2472 ret = -ENOMEM;
2473 goto fail_parent_names;
2474 }
2475
2476
2477 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2478 for (i = 0; i < core->num_parents; i++) {
2479 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2480 GFP_KERNEL);
d6968fca 2481 if (!core->parent_names[i]) {
d1302a36
MT
2482 ret = -ENOMEM;
2483 goto fail_parent_names_copy;
2484 }
2485 }
2486
d6968fca 2487 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2488
035a61c3
TV
2489 hw->clk = __clk_create_clk(hw, NULL, NULL);
2490 if (IS_ERR(hw->clk)) {
035a61c3
TV
2491 ret = PTR_ERR(hw->clk);
2492 goto fail_parent_names_copy;
2493 }
2494
2495 ret = __clk_init(dev, hw->clk);
d1302a36 2496 if (!ret)
035a61c3 2497 return hw->clk;
b2476490 2498
1c8e6004 2499 __clk_free_clk(hw->clk);
035a61c3 2500 hw->clk = NULL;
b2476490 2501
d1302a36
MT
2502fail_parent_names_copy:
2503 while (--i >= 0)
d6968fca
SB
2504 kfree_const(core->parent_names[i]);
2505 kfree(core->parent_names);
d1302a36 2506fail_parent_names:
d6968fca 2507 kfree_const(core->name);
0197b3ea 2508fail_name:
d6968fca 2509 kfree(core);
d1302a36
MT
2510fail_out:
2511 return ERR_PTR(ret);
b2476490
MT
2512}
2513EXPORT_SYMBOL_GPL(clk_register);
2514
fcb0ee6a
SN
2515/*
2516 * Free memory allocated for a clock.
2517 * Caller must hold prepare_lock.
2518 */
2519static void __clk_release(struct kref *ref)
2520{
d6968fca
SB
2521 struct clk_core *core = container_of(ref, struct clk_core, ref);
2522 int i = core->num_parents;
fcb0ee6a 2523
496eadf8
KK
2524 lockdep_assert_held(&prepare_lock);
2525
d6968fca 2526 kfree(core->parents);
fcb0ee6a 2527 while (--i >= 0)
d6968fca 2528 kfree_const(core->parent_names[i]);
fcb0ee6a 2529
d6968fca
SB
2530 kfree(core->parent_names);
2531 kfree_const(core->name);
2532 kfree(core);
fcb0ee6a
SN
2533}
2534
2535/*
2536 * Empty clk_ops for unregistered clocks. These are used temporarily
2537 * after clk_unregister() was called on a clock and until last clock
2538 * consumer calls clk_put() and the struct clk object is freed.
2539 */
2540static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2541{
2542 return -ENXIO;
2543}
2544
2545static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2546{
2547 WARN_ON_ONCE(1);
2548}
2549
2550static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2551 unsigned long parent_rate)
2552{
2553 return -ENXIO;
2554}
2555
2556static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2557{
2558 return -ENXIO;
2559}
2560
2561static const struct clk_ops clk_nodrv_ops = {
2562 .enable = clk_nodrv_prepare_enable,
2563 .disable = clk_nodrv_disable_unprepare,
2564 .prepare = clk_nodrv_prepare_enable,
2565 .unprepare = clk_nodrv_disable_unprepare,
2566 .set_rate = clk_nodrv_set_rate,
2567 .set_parent = clk_nodrv_set_parent,
2568};
2569
1df5c939
MB
2570/**
2571 * clk_unregister - unregister a currently registered clock
2572 * @clk: clock to unregister
1df5c939 2573 */
fcb0ee6a
SN
2574void clk_unregister(struct clk *clk)
2575{
2576 unsigned long flags;
2577
6314b679
SB
2578 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2579 return;
2580
035a61c3 2581 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2582
2583 clk_prepare_lock();
2584
035a61c3
TV
2585 if (clk->core->ops == &clk_nodrv_ops) {
2586 pr_err("%s: unregistered clock: %s\n", __func__,
2587 clk->core->name);
6314b679 2588 return;
fcb0ee6a
SN
2589 }
2590 /*
2591 * Assign empty clock ops for consumers that might still hold
2592 * a reference to this clock.
2593 */
2594 flags = clk_enable_lock();
035a61c3 2595 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2596 clk_enable_unlock(flags);
2597
035a61c3
TV
2598 if (!hlist_empty(&clk->core->children)) {
2599 struct clk_core *child;
874f224c 2600 struct hlist_node *t;
fcb0ee6a
SN
2601
2602 /* Reparent all children to the orphan list. */
035a61c3
TV
2603 hlist_for_each_entry_safe(child, t, &clk->core->children,
2604 child_node)
2605 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2606 }
2607
035a61c3 2608 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2609
035a61c3 2610 if (clk->core->prepare_count)
fcb0ee6a 2611 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2612 __func__, clk->core->name);
2613 kref_put(&clk->core->ref, __clk_release);
6314b679 2614
fcb0ee6a
SN
2615 clk_prepare_unlock();
2616}
1df5c939
MB
2617EXPORT_SYMBOL_GPL(clk_unregister);
2618
46c8773a
SB
2619static void devm_clk_release(struct device *dev, void *res)
2620{
293ba3b4 2621 clk_unregister(*(struct clk **)res);
46c8773a
SB
2622}
2623
2624/**
2625 * devm_clk_register - resource managed clk_register()
2626 * @dev: device that is registering this clock
2627 * @hw: link to hardware-specific clock data
2628 *
2629 * Managed clk_register(). Clocks returned from this function are
2630 * automatically clk_unregister()ed on driver detach. See clk_register() for
2631 * more information.
2632 */
2633struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2634{
2635 struct clk *clk;
293ba3b4 2636 struct clk **clkp;
46c8773a 2637
293ba3b4
SB
2638 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2639 if (!clkp)
46c8773a
SB
2640 return ERR_PTR(-ENOMEM);
2641
293ba3b4
SB
2642 clk = clk_register(dev, hw);
2643 if (!IS_ERR(clk)) {
2644 *clkp = clk;
2645 devres_add(dev, clkp);
46c8773a 2646 } else {
293ba3b4 2647 devres_free(clkp);
46c8773a
SB
2648 }
2649
2650 return clk;
2651}
2652EXPORT_SYMBOL_GPL(devm_clk_register);
2653
2654static int devm_clk_match(struct device *dev, void *res, void *data)
2655{
2656 struct clk *c = res;
2657 if (WARN_ON(!c))
2658 return 0;
2659 return c == data;
2660}
2661
2662/**
2663 * devm_clk_unregister - resource managed clk_unregister()
2664 * @clk: clock to unregister
2665 *
2666 * Deallocate a clock allocated with devm_clk_register(). Normally
2667 * this function will not need to be called and the resource management
2668 * code will ensure that the resource is freed.
2669 */
2670void devm_clk_unregister(struct device *dev, struct clk *clk)
2671{
2672 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2673}
2674EXPORT_SYMBOL_GPL(devm_clk_unregister);
2675
ac2df527
SN
2676/*
2677 * clkdev helpers
2678 */
2679int __clk_get(struct clk *clk)
2680{
035a61c3
TV
2681 struct clk_core *core = !clk ? NULL : clk->core;
2682
2683 if (core) {
2684 if (!try_module_get(core->owner))
00efcb1c 2685 return 0;
ac2df527 2686
035a61c3 2687 kref_get(&core->ref);
00efcb1c 2688 }
ac2df527
SN
2689 return 1;
2690}
2691
2692void __clk_put(struct clk *clk)
2693{
10cdfe54
TV
2694 struct module *owner;
2695
00efcb1c 2696 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2697 return;
2698
fcb0ee6a 2699 clk_prepare_lock();
1c8e6004 2700
50595f8b 2701 hlist_del(&clk->clks_node);
ec02ace8
TV
2702 if (clk->min_rate > clk->core->req_rate ||
2703 clk->max_rate < clk->core->req_rate)
2704 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2705
1c8e6004
TV
2706 owner = clk->core->owner;
2707 kref_put(&clk->core->ref, __clk_release);
2708
fcb0ee6a
SN
2709 clk_prepare_unlock();
2710
10cdfe54 2711 module_put(owner);
035a61c3 2712
035a61c3 2713 kfree(clk);
ac2df527
SN
2714}
2715
b2476490
MT
2716/*** clk rate change notifiers ***/
2717
2718/**
2719 * clk_notifier_register - add a clk rate change notifier
2720 * @clk: struct clk * to watch
2721 * @nb: struct notifier_block * with callback info
2722 *
2723 * Request notification when clk's rate changes. This uses an SRCU
2724 * notifier because we want it to block and notifier unregistrations are
2725 * uncommon. The callbacks associated with the notifier must not
2726 * re-enter into the clk framework by calling any top-level clk APIs;
2727 * this will cause a nested prepare_lock mutex.
2728 *
5324fda7
SB
2729 * In all notification cases cases (pre, post and abort rate change) the
2730 * original clock rate is passed to the callback via struct
2731 * clk_notifier_data.old_rate and the new frequency is passed via struct
b2476490
MT
2732 * clk_notifier_data.new_rate.
2733 *
b2476490
MT
2734 * clk_notifier_register() must be called from non-atomic context.
2735 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2736 * allocation failure; otherwise, passes along the return value of
2737 * srcu_notifier_chain_register().
2738 */
2739int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2740{
2741 struct clk_notifier *cn;
2742 int ret = -ENOMEM;
2743
2744 if (!clk || !nb)
2745 return -EINVAL;
2746
eab89f69 2747 clk_prepare_lock();
b2476490
MT
2748
2749 /* search the list of notifiers for this clk */
2750 list_for_each_entry(cn, &clk_notifier_list, node)
2751 if (cn->clk == clk)
2752 break;
2753
2754 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2755 if (cn->clk != clk) {
2756 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2757 if (!cn)
2758 goto out;
2759
2760 cn->clk = clk;
2761 srcu_init_notifier_head(&cn->notifier_head);
2762
2763 list_add(&cn->node, &clk_notifier_list);
2764 }
2765
2766 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2767
035a61c3 2768 clk->core->notifier_count++;
b2476490
MT
2769
2770out:
eab89f69 2771 clk_prepare_unlock();
b2476490
MT
2772
2773 return ret;
2774}
2775EXPORT_SYMBOL_GPL(clk_notifier_register);
2776
2777/**
2778 * clk_notifier_unregister - remove a clk rate change notifier
2779 * @clk: struct clk *
2780 * @nb: struct notifier_block * with callback info
2781 *
2782 * Request no further notification for changes to 'clk' and frees memory
2783 * allocated in clk_notifier_register.
2784 *
2785 * Returns -EINVAL if called with null arguments; otherwise, passes
2786 * along the return value of srcu_notifier_chain_unregister().
2787 */
2788int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2789{
2790 struct clk_notifier *cn = NULL;
2791 int ret = -EINVAL;
2792
2793 if (!clk || !nb)
2794 return -EINVAL;
2795
eab89f69 2796 clk_prepare_lock();
b2476490
MT
2797
2798 list_for_each_entry(cn, &clk_notifier_list, node)
2799 if (cn->clk == clk)
2800 break;
2801
2802 if (cn->clk == clk) {
2803 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2804
035a61c3 2805 clk->core->notifier_count--;
b2476490
MT
2806
2807 /* XXX the notifier code should handle this better */
2808 if (!cn->notifier_head.head) {
2809 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2810 list_del(&cn->node);
b2476490
MT
2811 kfree(cn);
2812 }
2813
2814 } else {
2815 ret = -ENOENT;
2816 }
2817
eab89f69 2818 clk_prepare_unlock();
b2476490
MT
2819
2820 return ret;
2821}
2822EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2823
2824#ifdef CONFIG_OF
2825/**
2826 * struct of_clk_provider - Clock provider registration structure
2827 * @link: Entry in global list of clock providers
2828 * @node: Pointer to device tree node of clock provider
2829 * @get: Get clock callback. Returns NULL or a struct clk for the
2830 * given clock specifier
2831 * @data: context pointer to be passed into @get callback
2832 */
2833struct of_clk_provider {
2834 struct list_head link;
2835
2836 struct device_node *node;
2837 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2838 void *data;
2839};
2840
f2f6c255
PG
2841static const struct of_device_id __clk_of_table_sentinel
2842 __used __section(__clk_of_table_end);
2843
766e6a4e 2844static LIST_HEAD(of_clk_providers);
d6782c26
SN
2845static DEFINE_MUTEX(of_clk_mutex);
2846
766e6a4e
GL
2847struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2848 void *data)
2849{
2850 return data;
2851}
2852EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2853
494bfec9
SG
2854struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2855{
2856 struct clk_onecell_data *clk_data = data;
2857 unsigned int idx = clkspec->args[0];
2858
2859 if (idx >= clk_data->clk_num) {
2860 pr_err("%s: invalid clock index %d\n", __func__, idx);
2861 return ERR_PTR(-EINVAL);
2862 }
2863
2864 return clk_data->clks[idx];
2865}
2866EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2867
766e6a4e
GL
2868/**
2869 * of_clk_add_provider() - Register a clock provider for a node
2870 * @np: Device node pointer associated with clock provider
2871 * @clk_src_get: callback for decoding clock
2872 * @data: context pointer for @clk_src_get callback.
2873 */
2874int of_clk_add_provider(struct device_node *np,
2875 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2876 void *data),
2877 void *data)
2878{
2879 struct of_clk_provider *cp;
86be408b 2880 int ret;
766e6a4e
GL
2881
2882 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2883 if (!cp)
2884 return -ENOMEM;
2885
2886 cp->node = of_node_get(np);
2887 cp->data = data;
2888 cp->get = clk_src_get;
2889
d6782c26 2890 mutex_lock(&of_clk_mutex);
766e6a4e 2891 list_add(&cp->link, &of_clk_providers);
d6782c26 2892 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2893 pr_debug("Added clock from %s\n", np->full_name);
2894
86be408b
SN
2895 ret = of_clk_set_defaults(np, true);
2896 if (ret < 0)
2897 of_clk_del_provider(np);
2898
2899 return ret;
766e6a4e
GL
2900}
2901EXPORT_SYMBOL_GPL(of_clk_add_provider);
2902
2903/**
2904 * of_clk_del_provider() - Remove a previously registered clock provider
2905 * @np: Device node pointer associated with clock provider
2906 */
2907void of_clk_del_provider(struct device_node *np)
2908{
2909 struct of_clk_provider *cp;
2910
d6782c26 2911 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2912 list_for_each_entry(cp, &of_clk_providers, link) {
2913 if (cp->node == np) {
2914 list_del(&cp->link);
2915 of_node_put(cp->node);
2916 kfree(cp);
2917 break;
2918 }
2919 }
d6782c26 2920 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2921}
2922EXPORT_SYMBOL_GPL(of_clk_del_provider);
2923
73e0e496
SB
2924struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
2925 const char *dev_id, const char *con_id)
766e6a4e
GL
2926{
2927 struct of_clk_provider *provider;
a34cd466 2928 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 2929
306c342f
SB
2930 if (!clkspec)
2931 return ERR_PTR(-EINVAL);
2932
766e6a4e 2933 /* Check if we have such a provider in our array */
306c342f 2934 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2935 list_for_each_entry(provider, &of_clk_providers, link) {
2936 if (provider->node == clkspec->np)
2937 clk = provider->get(clkspec, provider->data);
73e0e496
SB
2938 if (!IS_ERR(clk)) {
2939 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
2940 con_id);
2941
2942 if (!IS_ERR(clk) && !__clk_get(clk)) {
2943 __clk_free_clk(clk);
2944 clk = ERR_PTR(-ENOENT);
2945 }
2946
766e6a4e 2947 break;
73e0e496 2948 }
766e6a4e 2949 }
306c342f 2950 mutex_unlock(&of_clk_mutex);
d6782c26
SN
2951
2952 return clk;
2953}
2954
306c342f
SB
2955/**
2956 * of_clk_get_from_provider() - Lookup a clock from a clock provider
2957 * @clkspec: pointer to a clock specifier data structure
2958 *
2959 * This function looks up a struct clk from the registered list of clock
2960 * providers, an input is a clock specifier data structure as returned
2961 * from the of_parse_phandle_with_args() function call.
2962 */
d6782c26
SN
2963struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
2964{
306c342f 2965 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
2966}
2967
f6102742
MT
2968int of_clk_get_parent_count(struct device_node *np)
2969{
2970 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
2971}
2972EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
2973
766e6a4e
GL
2974const char *of_clk_get_parent_name(struct device_node *np, int index)
2975{
2976 struct of_phandle_args clkspec;
7a0fc1a3 2977 struct property *prop;
766e6a4e 2978 const char *clk_name;
7a0fc1a3
BD
2979 const __be32 *vp;
2980 u32 pv;
766e6a4e 2981 int rc;
7a0fc1a3 2982 int count;
766e6a4e
GL
2983
2984 if (index < 0)
2985 return NULL;
2986
2987 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
2988 &clkspec);
2989 if (rc)
2990 return NULL;
2991
7a0fc1a3
BD
2992 index = clkspec.args_count ? clkspec.args[0] : 0;
2993 count = 0;
2994
2995 /* if there is an indices property, use it to transfer the index
2996 * specified into an array offset for the clock-output-names property.
2997 */
2998 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
2999 if (index == pv) {
3000 index = count;
3001 break;
3002 }
3003 count++;
3004 }
3005
766e6a4e 3006 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 3007 index,
766e6a4e
GL
3008 &clk_name) < 0)
3009 clk_name = clkspec.np->name;
3010
3011 of_node_put(clkspec.np);
3012 return clk_name;
3013}
3014EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3015
1771b10d
GC
3016struct clock_provider {
3017 of_clk_init_cb_t clk_init_cb;
3018 struct device_node *np;
3019 struct list_head node;
3020};
3021
3022static LIST_HEAD(clk_provider_list);
3023
3024/*
3025 * This function looks for a parent clock. If there is one, then it
3026 * checks that the provider for this parent clock was initialized, in
3027 * this case the parent clock will be ready.
3028 */
3029static int parent_ready(struct device_node *np)
3030{
3031 int i = 0;
3032
3033 while (true) {
3034 struct clk *clk = of_clk_get(np, i);
3035
3036 /* this parent is ready we can check the next one */
3037 if (!IS_ERR(clk)) {
3038 clk_put(clk);
3039 i++;
3040 continue;
3041 }
3042
3043 /* at least one parent is not ready, we exit now */
3044 if (PTR_ERR(clk) == -EPROBE_DEFER)
3045 return 0;
3046
3047 /*
3048 * Here we make assumption that the device tree is
3049 * written correctly. So an error means that there is
3050 * no more parent. As we didn't exit yet, then the
3051 * previous parent are ready. If there is no clock
3052 * parent, no need to wait for them, then we can
3053 * consider their absence as being ready
3054 */
3055 return 1;
3056 }
3057}
3058
766e6a4e
GL
3059/**
3060 * of_clk_init() - Scan and init clock providers from the DT
3061 * @matches: array of compatible values and init functions for providers.
3062 *
1771b10d 3063 * This function scans the device tree for matching clock providers
e5ca8fb4 3064 * and calls their initialization functions. It also does it by trying
1771b10d 3065 * to follow the dependencies.
766e6a4e
GL
3066 */
3067void __init of_clk_init(const struct of_device_id *matches)
3068{
7f7ed584 3069 const struct of_device_id *match;
766e6a4e 3070 struct device_node *np;
1771b10d
GC
3071 struct clock_provider *clk_provider, *next;
3072 bool is_init_done;
3073 bool force = false;
766e6a4e 3074
f2f6c255 3075 if (!matches)
819b4861 3076 matches = &__clk_of_table;
f2f6c255 3077
1771b10d 3078 /* First prepare the list of the clocks providers */
7f7ed584 3079 for_each_matching_node_and_match(np, matches, &match) {
1771b10d
GC
3080 struct clock_provider *parent =
3081 kzalloc(sizeof(struct clock_provider), GFP_KERNEL);
3082
3083 parent->clk_init_cb = match->data;
3084 parent->np = np;
3f6d439f 3085 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3086 }
3087
3088 while (!list_empty(&clk_provider_list)) {
3089 is_init_done = false;
3090 list_for_each_entry_safe(clk_provider, next,
3091 &clk_provider_list, node) {
3092 if (force || parent_ready(clk_provider->np)) {
86be408b 3093
1771b10d 3094 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3095 of_clk_set_defaults(clk_provider->np, true);
3096
1771b10d
GC
3097 list_del(&clk_provider->node);
3098 kfree(clk_provider);
3099 is_init_done = true;
3100 }
3101 }
3102
3103 /*
e5ca8fb4 3104 * We didn't manage to initialize any of the
1771b10d
GC
3105 * remaining providers during the last loop, so now we
3106 * initialize all the remaining ones unconditionally
3107 * in case the clock parent was not mandatory
3108 */
3109 if (!is_init_done)
3110 force = true;
766e6a4e
GL
3111 }
3112}
3113#endif
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