Commit | Line | Data |
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b2476490 MT |
1 | /* |
2 | * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> | |
3 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * Standard functionality for the common clock API. See Documentation/clk.txt | |
10 | */ | |
11 | ||
3c373117 | 12 | #include <linux/clk.h> |
b09d6d99 | 13 | #include <linux/clk-provider.h> |
86be408b | 14 | #include <linux/clk/clk-conf.h> |
b2476490 MT |
15 | #include <linux/module.h> |
16 | #include <linux/mutex.h> | |
17 | #include <linux/spinlock.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/slab.h> | |
766e6a4e | 21 | #include <linux/of.h> |
46c8773a | 22 | #include <linux/device.h> |
f2f6c255 | 23 | #include <linux/init.h> |
533ddeb1 | 24 | #include <linux/sched.h> |
562ef0b0 | 25 | #include <linux/clkdev.h> |
b2476490 | 26 | |
d6782c26 SN |
27 | #include "clk.h" |
28 | ||
b2476490 MT |
29 | static DEFINE_SPINLOCK(enable_lock); |
30 | static DEFINE_MUTEX(prepare_lock); | |
31 | ||
533ddeb1 MT |
32 | static struct task_struct *prepare_owner; |
33 | static struct task_struct *enable_owner; | |
34 | ||
35 | static int prepare_refcnt; | |
36 | static int enable_refcnt; | |
37 | ||
b2476490 MT |
38 | static HLIST_HEAD(clk_root_list); |
39 | static HLIST_HEAD(clk_orphan_list); | |
40 | static LIST_HEAD(clk_notifier_list); | |
41 | ||
b09d6d99 MT |
42 | /*** private data structures ***/ |
43 | ||
44 | struct clk_core { | |
45 | const char *name; | |
46 | const struct clk_ops *ops; | |
47 | struct clk_hw *hw; | |
48 | struct module *owner; | |
49 | struct clk_core *parent; | |
50 | const char **parent_names; | |
51 | struct clk_core **parents; | |
52 | u8 num_parents; | |
53 | u8 new_parent_index; | |
54 | unsigned long rate; | |
1c8e6004 | 55 | unsigned long req_rate; |
b09d6d99 MT |
56 | unsigned long new_rate; |
57 | struct clk_core *new_parent; | |
58 | struct clk_core *new_child; | |
59 | unsigned long flags; | |
60 | unsigned int enable_count; | |
61 | unsigned int prepare_count; | |
9783c0d9 SB |
62 | unsigned long min_rate; |
63 | unsigned long max_rate; | |
b09d6d99 MT |
64 | unsigned long accuracy; |
65 | int phase; | |
66 | struct hlist_head children; | |
67 | struct hlist_node child_node; | |
1c8e6004 | 68 | struct hlist_head clks; |
b09d6d99 MT |
69 | unsigned int notifier_count; |
70 | #ifdef CONFIG_DEBUG_FS | |
71 | struct dentry *dentry; | |
8c9a8a8f | 72 | struct hlist_node debug_node; |
b09d6d99 MT |
73 | #endif |
74 | struct kref ref; | |
75 | }; | |
76 | ||
dfc202ea SB |
77 | #define CREATE_TRACE_POINTS |
78 | #include <trace/events/clk.h> | |
79 | ||
b09d6d99 MT |
80 | struct clk { |
81 | struct clk_core *core; | |
82 | const char *dev_id; | |
83 | const char *con_id; | |
1c8e6004 TV |
84 | unsigned long min_rate; |
85 | unsigned long max_rate; | |
50595f8b | 86 | struct hlist_node clks_node; |
b09d6d99 MT |
87 | }; |
88 | ||
eab89f69 MT |
89 | /*** locking ***/ |
90 | static void clk_prepare_lock(void) | |
91 | { | |
533ddeb1 MT |
92 | if (!mutex_trylock(&prepare_lock)) { |
93 | if (prepare_owner == current) { | |
94 | prepare_refcnt++; | |
95 | return; | |
96 | } | |
97 | mutex_lock(&prepare_lock); | |
98 | } | |
99 | WARN_ON_ONCE(prepare_owner != NULL); | |
100 | WARN_ON_ONCE(prepare_refcnt != 0); | |
101 | prepare_owner = current; | |
102 | prepare_refcnt = 1; | |
eab89f69 MT |
103 | } |
104 | ||
105 | static void clk_prepare_unlock(void) | |
106 | { | |
533ddeb1 MT |
107 | WARN_ON_ONCE(prepare_owner != current); |
108 | WARN_ON_ONCE(prepare_refcnt == 0); | |
109 | ||
110 | if (--prepare_refcnt) | |
111 | return; | |
112 | prepare_owner = NULL; | |
eab89f69 MT |
113 | mutex_unlock(&prepare_lock); |
114 | } | |
115 | ||
116 | static unsigned long clk_enable_lock(void) | |
117 | { | |
118 | unsigned long flags; | |
533ddeb1 MT |
119 | |
120 | if (!spin_trylock_irqsave(&enable_lock, flags)) { | |
121 | if (enable_owner == current) { | |
122 | enable_refcnt++; | |
123 | return flags; | |
124 | } | |
125 | spin_lock_irqsave(&enable_lock, flags); | |
126 | } | |
127 | WARN_ON_ONCE(enable_owner != NULL); | |
128 | WARN_ON_ONCE(enable_refcnt != 0); | |
129 | enable_owner = current; | |
130 | enable_refcnt = 1; | |
eab89f69 MT |
131 | return flags; |
132 | } | |
133 | ||
134 | static void clk_enable_unlock(unsigned long flags) | |
135 | { | |
533ddeb1 MT |
136 | WARN_ON_ONCE(enable_owner != current); |
137 | WARN_ON_ONCE(enable_refcnt == 0); | |
138 | ||
139 | if (--enable_refcnt) | |
140 | return; | |
141 | enable_owner = NULL; | |
eab89f69 MT |
142 | spin_unlock_irqrestore(&enable_lock, flags); |
143 | } | |
144 | ||
4dff95dc SB |
145 | static bool clk_core_is_prepared(struct clk_core *core) |
146 | { | |
147 | /* | |
148 | * .is_prepared is optional for clocks that can prepare | |
149 | * fall back to software usage counter if it is missing | |
150 | */ | |
151 | if (!core->ops->is_prepared) | |
152 | return core->prepare_count; | |
b2476490 | 153 | |
4dff95dc SB |
154 | return core->ops->is_prepared(core->hw); |
155 | } | |
b2476490 | 156 | |
4dff95dc SB |
157 | static bool clk_core_is_enabled(struct clk_core *core) |
158 | { | |
159 | /* | |
160 | * .is_enabled is only mandatory for clocks that gate | |
161 | * fall back to software usage counter if .is_enabled is missing | |
162 | */ | |
163 | if (!core->ops->is_enabled) | |
164 | return core->enable_count; | |
6b44c854 | 165 | |
4dff95dc SB |
166 | return core->ops->is_enabled(core->hw); |
167 | } | |
6b44c854 | 168 | |
4dff95dc | 169 | static void clk_unprepare_unused_subtree(struct clk_core *core) |
1af599df | 170 | { |
4dff95dc SB |
171 | struct clk_core *child; |
172 | ||
173 | lockdep_assert_held(&prepare_lock); | |
174 | ||
175 | hlist_for_each_entry(child, &core->children, child_node) | |
176 | clk_unprepare_unused_subtree(child); | |
177 | ||
178 | if (core->prepare_count) | |
1af599df PG |
179 | return; |
180 | ||
4dff95dc SB |
181 | if (core->flags & CLK_IGNORE_UNUSED) |
182 | return; | |
183 | ||
184 | if (clk_core_is_prepared(core)) { | |
185 | trace_clk_unprepare(core); | |
186 | if (core->ops->unprepare_unused) | |
187 | core->ops->unprepare_unused(core->hw); | |
188 | else if (core->ops->unprepare) | |
189 | core->ops->unprepare(core->hw); | |
190 | trace_clk_unprepare_complete(core); | |
191 | } | |
1af599df PG |
192 | } |
193 | ||
4dff95dc | 194 | static void clk_disable_unused_subtree(struct clk_core *core) |
1af599df | 195 | { |
035a61c3 | 196 | struct clk_core *child; |
4dff95dc | 197 | unsigned long flags; |
1af599df | 198 | |
4dff95dc | 199 | lockdep_assert_held(&prepare_lock); |
1af599df | 200 | |
4dff95dc SB |
201 | hlist_for_each_entry(child, &core->children, child_node) |
202 | clk_disable_unused_subtree(child); | |
1af599df | 203 | |
4dff95dc SB |
204 | flags = clk_enable_lock(); |
205 | ||
206 | if (core->enable_count) | |
207 | goto unlock_out; | |
208 | ||
209 | if (core->flags & CLK_IGNORE_UNUSED) | |
210 | goto unlock_out; | |
211 | ||
212 | /* | |
213 | * some gate clocks have special needs during the disable-unused | |
214 | * sequence. call .disable_unused if available, otherwise fall | |
215 | * back to .disable | |
216 | */ | |
217 | if (clk_core_is_enabled(core)) { | |
218 | trace_clk_disable(core); | |
219 | if (core->ops->disable_unused) | |
220 | core->ops->disable_unused(core->hw); | |
221 | else if (core->ops->disable) | |
222 | core->ops->disable(core->hw); | |
223 | trace_clk_disable_complete(core); | |
224 | } | |
225 | ||
226 | unlock_out: | |
227 | clk_enable_unlock(flags); | |
1af599df PG |
228 | } |
229 | ||
4dff95dc SB |
230 | static bool clk_ignore_unused; |
231 | static int __init clk_ignore_unused_setup(char *__unused) | |
1af599df | 232 | { |
4dff95dc SB |
233 | clk_ignore_unused = true; |
234 | return 1; | |
235 | } | |
236 | __setup("clk_ignore_unused", clk_ignore_unused_setup); | |
1af599df | 237 | |
4dff95dc SB |
238 | static int clk_disable_unused(void) |
239 | { | |
240 | struct clk_core *core; | |
241 | ||
242 | if (clk_ignore_unused) { | |
243 | pr_warn("clk: Not disabling unused clocks\n"); | |
244 | return 0; | |
245 | } | |
1af599df | 246 | |
eab89f69 | 247 | clk_prepare_lock(); |
1af599df | 248 | |
4dff95dc SB |
249 | hlist_for_each_entry(core, &clk_root_list, child_node) |
250 | clk_disable_unused_subtree(core); | |
251 | ||
252 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
253 | clk_disable_unused_subtree(core); | |
254 | ||
255 | hlist_for_each_entry(core, &clk_root_list, child_node) | |
256 | clk_unprepare_unused_subtree(core); | |
257 | ||
258 | hlist_for_each_entry(core, &clk_orphan_list, child_node) | |
259 | clk_unprepare_unused_subtree(core); | |
1af599df | 260 | |
eab89f69 | 261 | clk_prepare_unlock(); |
1af599df PG |
262 | |
263 | return 0; | |
264 | } | |
4dff95dc | 265 | late_initcall_sync(clk_disable_unused); |
1af599df | 266 | |
4dff95dc | 267 | /*** helper functions ***/ |
1af599df | 268 | |
4dff95dc | 269 | const char *__clk_get_name(struct clk *clk) |
1af599df | 270 | { |
4dff95dc | 271 | return !clk ? NULL : clk->core->name; |
1af599df | 272 | } |
4dff95dc | 273 | EXPORT_SYMBOL_GPL(__clk_get_name); |
1af599df | 274 | |
4dff95dc SB |
275 | struct clk_hw *__clk_get_hw(struct clk *clk) |
276 | { | |
277 | return !clk ? NULL : clk->core->hw; | |
278 | } | |
279 | EXPORT_SYMBOL_GPL(__clk_get_hw); | |
1af599df | 280 | |
4dff95dc | 281 | u8 __clk_get_num_parents(struct clk *clk) |
bddca894 | 282 | { |
4dff95dc SB |
283 | return !clk ? 0 : clk->core->num_parents; |
284 | } | |
285 | EXPORT_SYMBOL_GPL(__clk_get_num_parents); | |
bddca894 | 286 | |
4dff95dc SB |
287 | struct clk *__clk_get_parent(struct clk *clk) |
288 | { | |
289 | if (!clk) | |
290 | return NULL; | |
291 | ||
292 | /* TODO: Create a per-user clk and change callers to call clk_put */ | |
293 | return !clk->core->parent ? NULL : clk->core->parent->hw->clk; | |
bddca894 | 294 | } |
4dff95dc | 295 | EXPORT_SYMBOL_GPL(__clk_get_parent); |
bddca894 | 296 | |
4dff95dc SB |
297 | static struct clk_core *__clk_lookup_subtree(const char *name, |
298 | struct clk_core *core) | |
bddca894 | 299 | { |
035a61c3 | 300 | struct clk_core *child; |
4dff95dc | 301 | struct clk_core *ret; |
bddca894 | 302 | |
4dff95dc SB |
303 | if (!strcmp(core->name, name)) |
304 | return core; | |
bddca894 | 305 | |
4dff95dc SB |
306 | hlist_for_each_entry(child, &core->children, child_node) { |
307 | ret = __clk_lookup_subtree(name, child); | |
308 | if (ret) | |
309 | return ret; | |
bddca894 PG |
310 | } |
311 | ||
4dff95dc | 312 | return NULL; |
bddca894 PG |
313 | } |
314 | ||
4dff95dc | 315 | static struct clk_core *clk_core_lookup(const char *name) |
bddca894 | 316 | { |
4dff95dc SB |
317 | struct clk_core *root_clk; |
318 | struct clk_core *ret; | |
bddca894 | 319 | |
4dff95dc SB |
320 | if (!name) |
321 | return NULL; | |
bddca894 | 322 | |
4dff95dc SB |
323 | /* search the 'proper' clk tree first */ |
324 | hlist_for_each_entry(root_clk, &clk_root_list, child_node) { | |
325 | ret = __clk_lookup_subtree(name, root_clk); | |
326 | if (ret) | |
327 | return ret; | |
bddca894 PG |
328 | } |
329 | ||
4dff95dc SB |
330 | /* if not found, then search the orphan tree */ |
331 | hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { | |
332 | ret = __clk_lookup_subtree(name, root_clk); | |
333 | if (ret) | |
334 | return ret; | |
335 | } | |
bddca894 | 336 | |
4dff95dc | 337 | return NULL; |
bddca894 PG |
338 | } |
339 | ||
4dff95dc SB |
340 | static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, |
341 | u8 index) | |
bddca894 | 342 | { |
4dff95dc SB |
343 | if (!core || index >= core->num_parents) |
344 | return NULL; | |
345 | else if (!core->parents) | |
346 | return clk_core_lookup(core->parent_names[index]); | |
347 | else if (!core->parents[index]) | |
348 | return core->parents[index] = | |
349 | clk_core_lookup(core->parent_names[index]); | |
350 | else | |
351 | return core->parents[index]; | |
bddca894 PG |
352 | } |
353 | ||
4dff95dc | 354 | struct clk *clk_get_parent_by_index(struct clk *clk, u8 index) |
b2476490 | 355 | { |
4dff95dc | 356 | struct clk_core *parent; |
b2476490 | 357 | |
4dff95dc SB |
358 | if (!clk) |
359 | return NULL; | |
b2476490 | 360 | |
4dff95dc | 361 | parent = clk_core_get_parent_by_index(clk->core, index); |
5279fc40 | 362 | |
4dff95dc SB |
363 | return !parent ? NULL : parent->hw->clk; |
364 | } | |
365 | EXPORT_SYMBOL_GPL(clk_get_parent_by_index); | |
e59c5371 | 366 | |
4dff95dc SB |
367 | unsigned int __clk_get_enable_count(struct clk *clk) |
368 | { | |
369 | return !clk ? 0 : clk->core->enable_count; | |
370 | } | |
b2476490 | 371 | |
4dff95dc SB |
372 | static unsigned long clk_core_get_rate_nolock(struct clk_core *core) |
373 | { | |
374 | unsigned long ret; | |
b2476490 | 375 | |
4dff95dc SB |
376 | if (!core) { |
377 | ret = 0; | |
378 | goto out; | |
379 | } | |
b2476490 | 380 | |
4dff95dc | 381 | ret = core->rate; |
b2476490 | 382 | |
4dff95dc SB |
383 | if (core->flags & CLK_IS_ROOT) |
384 | goto out; | |
c646cbf1 | 385 | |
4dff95dc SB |
386 | if (!core->parent) |
387 | ret = 0; | |
b2476490 | 388 | |
b2476490 MT |
389 | out: |
390 | return ret; | |
391 | } | |
392 | ||
4dff95dc | 393 | unsigned long __clk_get_rate(struct clk *clk) |
b2476490 | 394 | { |
4dff95dc SB |
395 | if (!clk) |
396 | return 0; | |
6314b679 | 397 | |
4dff95dc SB |
398 | return clk_core_get_rate_nolock(clk->core); |
399 | } | |
400 | EXPORT_SYMBOL_GPL(__clk_get_rate); | |
b2476490 | 401 | |
4dff95dc SB |
402 | static unsigned long __clk_get_accuracy(struct clk_core *core) |
403 | { | |
404 | if (!core) | |
405 | return 0; | |
b2476490 | 406 | |
4dff95dc | 407 | return core->accuracy; |
b2476490 MT |
408 | } |
409 | ||
4dff95dc | 410 | unsigned long __clk_get_flags(struct clk *clk) |
fcb0ee6a | 411 | { |
4dff95dc | 412 | return !clk ? 0 : clk->core->flags; |
fcb0ee6a | 413 | } |
4dff95dc | 414 | EXPORT_SYMBOL_GPL(__clk_get_flags); |
fcb0ee6a | 415 | |
4dff95dc | 416 | bool __clk_is_prepared(struct clk *clk) |
fb2b3c9f | 417 | { |
4dff95dc SB |
418 | if (!clk) |
419 | return false; | |
fb2b3c9f | 420 | |
4dff95dc | 421 | return clk_core_is_prepared(clk->core); |
fb2b3c9f | 422 | } |
fb2b3c9f | 423 | |
4dff95dc | 424 | bool __clk_is_enabled(struct clk *clk) |
b2476490 | 425 | { |
4dff95dc SB |
426 | if (!clk) |
427 | return false; | |
b2476490 | 428 | |
4dff95dc SB |
429 | return clk_core_is_enabled(clk->core); |
430 | } | |
431 | EXPORT_SYMBOL_GPL(__clk_is_enabled); | |
b2476490 | 432 | |
4dff95dc SB |
433 | static bool mux_is_better_rate(unsigned long rate, unsigned long now, |
434 | unsigned long best, unsigned long flags) | |
435 | { | |
436 | if (flags & CLK_MUX_ROUND_CLOSEST) | |
437 | return abs(now - rate) < abs(best - rate); | |
1af599df | 438 | |
4dff95dc SB |
439 | return now <= rate && now > best; |
440 | } | |
bddca894 | 441 | |
0817b62c BB |
442 | static int |
443 | clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req, | |
4dff95dc SB |
444 | unsigned long flags) |
445 | { | |
446 | struct clk_core *core = hw->core, *parent, *best_parent = NULL; | |
0817b62c BB |
447 | int i, num_parents, ret; |
448 | unsigned long best = 0; | |
449 | struct clk_rate_request parent_req = *req; | |
b2476490 | 450 | |
4dff95dc SB |
451 | /* if NO_REPARENT flag set, pass through to current parent */ |
452 | if (core->flags & CLK_SET_RATE_NO_REPARENT) { | |
453 | parent = core->parent; | |
0817b62c BB |
454 | if (core->flags & CLK_SET_RATE_PARENT) { |
455 | ret = __clk_determine_rate(parent ? parent->hw : NULL, | |
456 | &parent_req); | |
457 | if (ret) | |
458 | return ret; | |
459 | ||
460 | best = parent_req.rate; | |
461 | } else if (parent) { | |
4dff95dc | 462 | best = clk_core_get_rate_nolock(parent); |
0817b62c | 463 | } else { |
4dff95dc | 464 | best = clk_core_get_rate_nolock(core); |
0817b62c BB |
465 | } |
466 | ||
4dff95dc SB |
467 | goto out; |
468 | } | |
b2476490 | 469 | |
4dff95dc SB |
470 | /* find the parent that can provide the fastest rate <= rate */ |
471 | num_parents = core->num_parents; | |
472 | for (i = 0; i < num_parents; i++) { | |
473 | parent = clk_core_get_parent_by_index(core, i); | |
474 | if (!parent) | |
475 | continue; | |
0817b62c BB |
476 | |
477 | if (core->flags & CLK_SET_RATE_PARENT) { | |
478 | parent_req = *req; | |
479 | ret = __clk_determine_rate(parent->hw, &parent_req); | |
480 | if (ret) | |
481 | continue; | |
482 | } else { | |
483 | parent_req.rate = clk_core_get_rate_nolock(parent); | |
484 | } | |
485 | ||
486 | if (mux_is_better_rate(req->rate, parent_req.rate, | |
487 | best, flags)) { | |
4dff95dc | 488 | best_parent = parent; |
0817b62c | 489 | best = parent_req.rate; |
4dff95dc SB |
490 | } |
491 | } | |
b2476490 | 492 | |
57d866e6 BB |
493 | if (!best_parent) |
494 | return -EINVAL; | |
495 | ||
4dff95dc SB |
496 | out: |
497 | if (best_parent) | |
0817b62c BB |
498 | req->best_parent_hw = best_parent->hw; |
499 | req->best_parent_rate = best; | |
500 | req->rate = best; | |
b2476490 | 501 | |
0817b62c | 502 | return 0; |
b33d212f | 503 | } |
4dff95dc SB |
504 | |
505 | struct clk *__clk_lookup(const char *name) | |
fcb0ee6a | 506 | { |
4dff95dc SB |
507 | struct clk_core *core = clk_core_lookup(name); |
508 | ||
509 | return !core ? NULL : core->hw->clk; | |
fcb0ee6a | 510 | } |
b2476490 | 511 | |
4dff95dc SB |
512 | static void clk_core_get_boundaries(struct clk_core *core, |
513 | unsigned long *min_rate, | |
514 | unsigned long *max_rate) | |
1c155b3d | 515 | { |
4dff95dc | 516 | struct clk *clk_user; |
1c155b3d | 517 | |
9783c0d9 SB |
518 | *min_rate = core->min_rate; |
519 | *max_rate = core->max_rate; | |
496eadf8 | 520 | |
4dff95dc SB |
521 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
522 | *min_rate = max(*min_rate, clk_user->min_rate); | |
1c155b3d | 523 | |
4dff95dc SB |
524 | hlist_for_each_entry(clk_user, &core->clks, clks_node) |
525 | *max_rate = min(*max_rate, clk_user->max_rate); | |
526 | } | |
1c155b3d | 527 | |
9783c0d9 SB |
528 | void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, |
529 | unsigned long max_rate) | |
530 | { | |
531 | hw->core->min_rate = min_rate; | |
532 | hw->core->max_rate = max_rate; | |
533 | } | |
534 | EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); | |
535 | ||
4dff95dc SB |
536 | /* |
537 | * Helper for finding best parent to provide a given frequency. This can be used | |
538 | * directly as a determine_rate callback (e.g. for a mux), or from a more | |
539 | * complex clock that may combine a mux with other operations. | |
540 | */ | |
0817b62c BB |
541 | int __clk_mux_determine_rate(struct clk_hw *hw, |
542 | struct clk_rate_request *req) | |
4dff95dc | 543 | { |
0817b62c | 544 | return clk_mux_determine_rate_flags(hw, req, 0); |
1c155b3d | 545 | } |
4dff95dc | 546 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); |
1c155b3d | 547 | |
0817b62c BB |
548 | int __clk_mux_determine_rate_closest(struct clk_hw *hw, |
549 | struct clk_rate_request *req) | |
b2476490 | 550 | { |
0817b62c | 551 | return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); |
4dff95dc SB |
552 | } |
553 | EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); | |
b2476490 | 554 | |
4dff95dc | 555 | /*** clk api ***/ |
496eadf8 | 556 | |
4dff95dc SB |
557 | static void clk_core_unprepare(struct clk_core *core) |
558 | { | |
a6334725 SB |
559 | lockdep_assert_held(&prepare_lock); |
560 | ||
4dff95dc SB |
561 | if (!core) |
562 | return; | |
b2476490 | 563 | |
4dff95dc SB |
564 | if (WARN_ON(core->prepare_count == 0)) |
565 | return; | |
b2476490 | 566 | |
4dff95dc SB |
567 | if (--core->prepare_count > 0) |
568 | return; | |
b2476490 | 569 | |
4dff95dc | 570 | WARN_ON(core->enable_count > 0); |
b2476490 | 571 | |
4dff95dc | 572 | trace_clk_unprepare(core); |
b2476490 | 573 | |
4dff95dc SB |
574 | if (core->ops->unprepare) |
575 | core->ops->unprepare(core->hw); | |
576 | ||
577 | trace_clk_unprepare_complete(core); | |
578 | clk_core_unprepare(core->parent); | |
b2476490 MT |
579 | } |
580 | ||
4dff95dc SB |
581 | /** |
582 | * clk_unprepare - undo preparation of a clock source | |
583 | * @clk: the clk being unprepared | |
584 | * | |
585 | * clk_unprepare may sleep, which differentiates it from clk_disable. In a | |
586 | * simple case, clk_unprepare can be used instead of clk_disable to gate a clk | |
587 | * if the operation may sleep. One example is a clk which is accessed over | |
588 | * I2c. In the complex case a clk gate operation may require a fast and a slow | |
589 | * part. It is this reason that clk_unprepare and clk_disable are not mutually | |
590 | * exclusive. In fact clk_disable must be called before clk_unprepare. | |
591 | */ | |
592 | void clk_unprepare(struct clk *clk) | |
1e435256 | 593 | { |
4dff95dc SB |
594 | if (IS_ERR_OR_NULL(clk)) |
595 | return; | |
596 | ||
597 | clk_prepare_lock(); | |
598 | clk_core_unprepare(clk->core); | |
599 | clk_prepare_unlock(); | |
1e435256 | 600 | } |
4dff95dc | 601 | EXPORT_SYMBOL_GPL(clk_unprepare); |
1e435256 | 602 | |
4dff95dc | 603 | static int clk_core_prepare(struct clk_core *core) |
b2476490 | 604 | { |
4dff95dc | 605 | int ret = 0; |
b2476490 | 606 | |
a6334725 SB |
607 | lockdep_assert_held(&prepare_lock); |
608 | ||
4dff95dc | 609 | if (!core) |
1e435256 | 610 | return 0; |
1e435256 | 611 | |
4dff95dc SB |
612 | if (core->prepare_count == 0) { |
613 | ret = clk_core_prepare(core->parent); | |
614 | if (ret) | |
615 | return ret; | |
b2476490 | 616 | |
4dff95dc | 617 | trace_clk_prepare(core); |
b2476490 | 618 | |
4dff95dc SB |
619 | if (core->ops->prepare) |
620 | ret = core->ops->prepare(core->hw); | |
b2476490 | 621 | |
4dff95dc | 622 | trace_clk_prepare_complete(core); |
1c155b3d | 623 | |
4dff95dc SB |
624 | if (ret) { |
625 | clk_core_unprepare(core->parent); | |
626 | return ret; | |
627 | } | |
628 | } | |
1c155b3d | 629 | |
4dff95dc | 630 | core->prepare_count++; |
b2476490 MT |
631 | |
632 | return 0; | |
633 | } | |
b2476490 | 634 | |
4dff95dc SB |
635 | /** |
636 | * clk_prepare - prepare a clock source | |
637 | * @clk: the clk being prepared | |
638 | * | |
639 | * clk_prepare may sleep, which differentiates it from clk_enable. In a simple | |
640 | * case, clk_prepare can be used instead of clk_enable to ungate a clk if the | |
641 | * operation may sleep. One example is a clk which is accessed over I2c. In | |
642 | * the complex case a clk ungate operation may require a fast and a slow part. | |
643 | * It is this reason that clk_prepare and clk_enable are not mutually | |
644 | * exclusive. In fact clk_prepare must be called before clk_enable. | |
645 | * Returns 0 on success, -EERROR otherwise. | |
646 | */ | |
647 | int clk_prepare(struct clk *clk) | |
b2476490 | 648 | { |
4dff95dc | 649 | int ret; |
b2476490 | 650 | |
4dff95dc SB |
651 | if (!clk) |
652 | return 0; | |
b2476490 | 653 | |
4dff95dc SB |
654 | clk_prepare_lock(); |
655 | ret = clk_core_prepare(clk->core); | |
656 | clk_prepare_unlock(); | |
657 | ||
658 | return ret; | |
b2476490 | 659 | } |
4dff95dc | 660 | EXPORT_SYMBOL_GPL(clk_prepare); |
b2476490 | 661 | |
4dff95dc | 662 | static void clk_core_disable(struct clk_core *core) |
b2476490 | 663 | { |
a6334725 SB |
664 | lockdep_assert_held(&enable_lock); |
665 | ||
4dff95dc SB |
666 | if (!core) |
667 | return; | |
035a61c3 | 668 | |
4dff95dc SB |
669 | if (WARN_ON(core->enable_count == 0)) |
670 | return; | |
b2476490 | 671 | |
4dff95dc SB |
672 | if (--core->enable_count > 0) |
673 | return; | |
035a61c3 | 674 | |
4dff95dc | 675 | trace_clk_disable(core); |
035a61c3 | 676 | |
4dff95dc SB |
677 | if (core->ops->disable) |
678 | core->ops->disable(core->hw); | |
035a61c3 | 679 | |
4dff95dc | 680 | trace_clk_disable_complete(core); |
035a61c3 | 681 | |
4dff95dc | 682 | clk_core_disable(core->parent); |
035a61c3 | 683 | } |
7ef3dcc8 | 684 | |
4dff95dc SB |
685 | /** |
686 | * clk_disable - gate a clock | |
687 | * @clk: the clk being gated | |
688 | * | |
689 | * clk_disable must not sleep, which differentiates it from clk_unprepare. In | |
690 | * a simple case, clk_disable can be used instead of clk_unprepare to gate a | |
691 | * clk if the operation is fast and will never sleep. One example is a | |
692 | * SoC-internal clk which is controlled via simple register writes. In the | |
693 | * complex case a clk gate operation may require a fast and a slow part. It is | |
694 | * this reason that clk_unprepare and clk_disable are not mutually exclusive. | |
695 | * In fact clk_disable must be called before clk_unprepare. | |
696 | */ | |
697 | void clk_disable(struct clk *clk) | |
b2476490 | 698 | { |
4dff95dc SB |
699 | unsigned long flags; |
700 | ||
701 | if (IS_ERR_OR_NULL(clk)) | |
702 | return; | |
703 | ||
704 | flags = clk_enable_lock(); | |
705 | clk_core_disable(clk->core); | |
706 | clk_enable_unlock(flags); | |
b2476490 | 707 | } |
4dff95dc | 708 | EXPORT_SYMBOL_GPL(clk_disable); |
b2476490 | 709 | |
4dff95dc | 710 | static int clk_core_enable(struct clk_core *core) |
b2476490 | 711 | { |
4dff95dc | 712 | int ret = 0; |
b2476490 | 713 | |
a6334725 SB |
714 | lockdep_assert_held(&enable_lock); |
715 | ||
4dff95dc SB |
716 | if (!core) |
717 | return 0; | |
b2476490 | 718 | |
4dff95dc SB |
719 | if (WARN_ON(core->prepare_count == 0)) |
720 | return -ESHUTDOWN; | |
b2476490 | 721 | |
4dff95dc SB |
722 | if (core->enable_count == 0) { |
723 | ret = clk_core_enable(core->parent); | |
b2476490 | 724 | |
4dff95dc SB |
725 | if (ret) |
726 | return ret; | |
b2476490 | 727 | |
4dff95dc | 728 | trace_clk_enable(core); |
035a61c3 | 729 | |
4dff95dc SB |
730 | if (core->ops->enable) |
731 | ret = core->ops->enable(core->hw); | |
035a61c3 | 732 | |
4dff95dc SB |
733 | trace_clk_enable_complete(core); |
734 | ||
735 | if (ret) { | |
736 | clk_core_disable(core->parent); | |
737 | return ret; | |
738 | } | |
739 | } | |
740 | ||
741 | core->enable_count++; | |
742 | return 0; | |
035a61c3 | 743 | } |
b2476490 | 744 | |
4dff95dc SB |
745 | /** |
746 | * clk_enable - ungate a clock | |
747 | * @clk: the clk being ungated | |
748 | * | |
749 | * clk_enable must not sleep, which differentiates it from clk_prepare. In a | |
750 | * simple case, clk_enable can be used instead of clk_prepare to ungate a clk | |
751 | * if the operation will never sleep. One example is a SoC-internal clk which | |
752 | * is controlled via simple register writes. In the complex case a clk ungate | |
753 | * operation may require a fast and a slow part. It is this reason that | |
754 | * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare | |
755 | * must be called before clk_enable. Returns 0 on success, -EERROR | |
756 | * otherwise. | |
757 | */ | |
758 | int clk_enable(struct clk *clk) | |
5279fc40 | 759 | { |
4dff95dc SB |
760 | unsigned long flags; |
761 | int ret; | |
762 | ||
763 | if (!clk) | |
5279fc40 BB |
764 | return 0; |
765 | ||
4dff95dc SB |
766 | flags = clk_enable_lock(); |
767 | ret = clk_core_enable(clk->core); | |
768 | clk_enable_unlock(flags); | |
5279fc40 | 769 | |
4dff95dc | 770 | return ret; |
b2476490 | 771 | } |
4dff95dc | 772 | EXPORT_SYMBOL_GPL(clk_enable); |
b2476490 | 773 | |
0817b62c BB |
774 | static int clk_core_round_rate_nolock(struct clk_core *core, |
775 | struct clk_rate_request *req) | |
3d6ee287 | 776 | { |
4dff95dc | 777 | struct clk_core *parent; |
0817b62c | 778 | long rate; |
4dff95dc SB |
779 | |
780 | lockdep_assert_held(&prepare_lock); | |
3d6ee287 | 781 | |
d6968fca | 782 | if (!core) |
4dff95dc | 783 | return 0; |
3d6ee287 | 784 | |
4dff95dc | 785 | parent = core->parent; |
0817b62c BB |
786 | if (parent) { |
787 | req->best_parent_hw = parent->hw; | |
788 | req->best_parent_rate = parent->rate; | |
789 | } else { | |
790 | req->best_parent_hw = NULL; | |
791 | req->best_parent_rate = 0; | |
792 | } | |
3d6ee287 | 793 | |
4dff95dc | 794 | if (core->ops->determine_rate) { |
0817b62c BB |
795 | return core->ops->determine_rate(core->hw, req); |
796 | } else if (core->ops->round_rate) { | |
797 | rate = core->ops->round_rate(core->hw, req->rate, | |
798 | &req->best_parent_rate); | |
799 | if (rate < 0) | |
800 | return rate; | |
801 | ||
802 | req->rate = rate; | |
803 | } else if (core->flags & CLK_SET_RATE_PARENT) { | |
804 | return clk_core_round_rate_nolock(parent, req); | |
805 | } else { | |
806 | req->rate = core->rate; | |
807 | } | |
808 | ||
809 | return 0; | |
3d6ee287 UH |
810 | } |
811 | ||
4dff95dc SB |
812 | /** |
813 | * __clk_determine_rate - get the closest rate actually supported by a clock | |
814 | * @hw: determine the rate of this clock | |
815 | * @rate: target rate | |
816 | * @min_rate: returned rate must be greater than this rate | |
817 | * @max_rate: returned rate must be less than this rate | |
818 | * | |
6e5ab41b | 819 | * Useful for clk_ops such as .set_rate and .determine_rate. |
4dff95dc | 820 | */ |
0817b62c | 821 | int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) |
035a61c3 | 822 | { |
0817b62c BB |
823 | if (!hw) { |
824 | req->rate = 0; | |
4dff95dc | 825 | return 0; |
0817b62c | 826 | } |
035a61c3 | 827 | |
0817b62c | 828 | return clk_core_round_rate_nolock(hw->core, req); |
035a61c3 | 829 | } |
4dff95dc | 830 | EXPORT_SYMBOL_GPL(__clk_determine_rate); |
035a61c3 | 831 | |
4dff95dc SB |
832 | /** |
833 | * __clk_round_rate - round the given rate for a clk | |
834 | * @clk: round the rate of this clock | |
835 | * @rate: the rate which is to be rounded | |
836 | * | |
6e5ab41b | 837 | * Useful for clk_ops such as .set_rate |
4dff95dc SB |
838 | */ |
839 | unsigned long __clk_round_rate(struct clk *clk, unsigned long rate) | |
b2476490 | 840 | { |
0817b62c BB |
841 | struct clk_rate_request req; |
842 | int ret; | |
b2476490 | 843 | |
4dff95dc SB |
844 | if (!clk) |
845 | return 0; | |
b2476490 | 846 | |
0817b62c BB |
847 | clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate); |
848 | req.rate = rate; | |
849 | ||
850 | ret = clk_core_round_rate_nolock(clk->core, &req); | |
851 | if (ret) | |
852 | return 0; | |
b2476490 | 853 | |
0817b62c | 854 | return req.rate; |
b2476490 | 855 | } |
4dff95dc | 856 | EXPORT_SYMBOL_GPL(__clk_round_rate); |
035a61c3 | 857 | |
4dff95dc SB |
858 | /** |
859 | * clk_round_rate - round the given rate for a clk | |
860 | * @clk: the clk for which we are rounding a rate | |
861 | * @rate: the rate which is to be rounded | |
862 | * | |
863 | * Takes in a rate as input and rounds it to a rate that the clk can actually | |
864 | * use which is then returned. If clk doesn't support round_rate operation | |
865 | * then the parent rate is returned. | |
866 | */ | |
867 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
035a61c3 | 868 | { |
4dff95dc SB |
869 | unsigned long ret; |
870 | ||
035a61c3 | 871 | if (!clk) |
4dff95dc | 872 | return 0; |
035a61c3 | 873 | |
4dff95dc SB |
874 | clk_prepare_lock(); |
875 | ret = __clk_round_rate(clk, rate); | |
876 | clk_prepare_unlock(); | |
877 | ||
878 | return ret; | |
035a61c3 | 879 | } |
4dff95dc | 880 | EXPORT_SYMBOL_GPL(clk_round_rate); |
b2476490 | 881 | |
4dff95dc SB |
882 | /** |
883 | * __clk_notify - call clk notifier chain | |
884 | * @core: clk that is changing rate | |
885 | * @msg: clk notifier type (see include/linux/clk.h) | |
886 | * @old_rate: old clk rate | |
887 | * @new_rate: new clk rate | |
888 | * | |
889 | * Triggers a notifier call chain on the clk rate-change notification | |
890 | * for 'clk'. Passes a pointer to the struct clk and the previous | |
891 | * and current rates to the notifier callback. Intended to be called by | |
892 | * internal clock code only. Returns NOTIFY_DONE from the last driver | |
893 | * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if | |
894 | * a driver returns that. | |
895 | */ | |
896 | static int __clk_notify(struct clk_core *core, unsigned long msg, | |
897 | unsigned long old_rate, unsigned long new_rate) | |
b2476490 | 898 | { |
4dff95dc SB |
899 | struct clk_notifier *cn; |
900 | struct clk_notifier_data cnd; | |
901 | int ret = NOTIFY_DONE; | |
b2476490 | 902 | |
4dff95dc SB |
903 | cnd.old_rate = old_rate; |
904 | cnd.new_rate = new_rate; | |
b2476490 | 905 | |
4dff95dc SB |
906 | list_for_each_entry(cn, &clk_notifier_list, node) { |
907 | if (cn->clk->core == core) { | |
908 | cnd.clk = cn->clk; | |
909 | ret = srcu_notifier_call_chain(&cn->notifier_head, msg, | |
910 | &cnd); | |
911 | } | |
b2476490 MT |
912 | } |
913 | ||
4dff95dc | 914 | return ret; |
b2476490 MT |
915 | } |
916 | ||
4dff95dc SB |
917 | /** |
918 | * __clk_recalc_accuracies | |
919 | * @core: first clk in the subtree | |
920 | * | |
921 | * Walks the subtree of clks starting with clk and recalculates accuracies as | |
922 | * it goes. Note that if a clk does not implement the .recalc_accuracy | |
6e5ab41b | 923 | * callback then it is assumed that the clock will take on the accuracy of its |
4dff95dc | 924 | * parent. |
4dff95dc SB |
925 | */ |
926 | static void __clk_recalc_accuracies(struct clk_core *core) | |
b2476490 | 927 | { |
4dff95dc SB |
928 | unsigned long parent_accuracy = 0; |
929 | struct clk_core *child; | |
b2476490 | 930 | |
4dff95dc | 931 | lockdep_assert_held(&prepare_lock); |
b2476490 | 932 | |
4dff95dc SB |
933 | if (core->parent) |
934 | parent_accuracy = core->parent->accuracy; | |
b2476490 | 935 | |
4dff95dc SB |
936 | if (core->ops->recalc_accuracy) |
937 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
938 | parent_accuracy); | |
939 | else | |
940 | core->accuracy = parent_accuracy; | |
b2476490 | 941 | |
4dff95dc SB |
942 | hlist_for_each_entry(child, &core->children, child_node) |
943 | __clk_recalc_accuracies(child); | |
b2476490 MT |
944 | } |
945 | ||
4dff95dc | 946 | static long clk_core_get_accuracy(struct clk_core *core) |
e366fdd7 | 947 | { |
4dff95dc | 948 | unsigned long accuracy; |
15a02c1f | 949 | |
4dff95dc SB |
950 | clk_prepare_lock(); |
951 | if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) | |
952 | __clk_recalc_accuracies(core); | |
15a02c1f | 953 | |
4dff95dc SB |
954 | accuracy = __clk_get_accuracy(core); |
955 | clk_prepare_unlock(); | |
e366fdd7 | 956 | |
4dff95dc | 957 | return accuracy; |
e366fdd7 | 958 | } |
15a02c1f | 959 | |
4dff95dc SB |
960 | /** |
961 | * clk_get_accuracy - return the accuracy of clk | |
962 | * @clk: the clk whose accuracy is being returned | |
963 | * | |
964 | * Simply returns the cached accuracy of the clk, unless | |
965 | * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be | |
966 | * issued. | |
967 | * If clk is NULL then returns 0. | |
968 | */ | |
969 | long clk_get_accuracy(struct clk *clk) | |
035a61c3 | 970 | { |
4dff95dc SB |
971 | if (!clk) |
972 | return 0; | |
035a61c3 | 973 | |
4dff95dc | 974 | return clk_core_get_accuracy(clk->core); |
035a61c3 | 975 | } |
4dff95dc | 976 | EXPORT_SYMBOL_GPL(clk_get_accuracy); |
035a61c3 | 977 | |
4dff95dc SB |
978 | static unsigned long clk_recalc(struct clk_core *core, |
979 | unsigned long parent_rate) | |
1c8e6004 | 980 | { |
4dff95dc SB |
981 | if (core->ops->recalc_rate) |
982 | return core->ops->recalc_rate(core->hw, parent_rate); | |
983 | return parent_rate; | |
1c8e6004 TV |
984 | } |
985 | ||
4dff95dc SB |
986 | /** |
987 | * __clk_recalc_rates | |
988 | * @core: first clk in the subtree | |
989 | * @msg: notification type (see include/linux/clk.h) | |
990 | * | |
991 | * Walks the subtree of clks starting with clk and recalculates rates as it | |
992 | * goes. Note that if a clk does not implement the .recalc_rate callback then | |
993 | * it is assumed that the clock will take on the rate of its parent. | |
994 | * | |
995 | * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, | |
996 | * if necessary. | |
15a02c1f | 997 | */ |
4dff95dc | 998 | static void __clk_recalc_rates(struct clk_core *core, unsigned long msg) |
15a02c1f | 999 | { |
4dff95dc SB |
1000 | unsigned long old_rate; |
1001 | unsigned long parent_rate = 0; | |
1002 | struct clk_core *child; | |
e366fdd7 | 1003 | |
4dff95dc | 1004 | lockdep_assert_held(&prepare_lock); |
15a02c1f | 1005 | |
4dff95dc | 1006 | old_rate = core->rate; |
b2476490 | 1007 | |
4dff95dc SB |
1008 | if (core->parent) |
1009 | parent_rate = core->parent->rate; | |
b2476490 | 1010 | |
4dff95dc | 1011 | core->rate = clk_recalc(core, parent_rate); |
b2476490 | 1012 | |
4dff95dc SB |
1013 | /* |
1014 | * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE | |
1015 | * & ABORT_RATE_CHANGE notifiers | |
1016 | */ | |
1017 | if (core->notifier_count && msg) | |
1018 | __clk_notify(core, msg, old_rate, core->rate); | |
b2476490 | 1019 | |
4dff95dc SB |
1020 | hlist_for_each_entry(child, &core->children, child_node) |
1021 | __clk_recalc_rates(child, msg); | |
1022 | } | |
b2476490 | 1023 | |
4dff95dc SB |
1024 | static unsigned long clk_core_get_rate(struct clk_core *core) |
1025 | { | |
1026 | unsigned long rate; | |
dfc202ea | 1027 | |
4dff95dc | 1028 | clk_prepare_lock(); |
b2476490 | 1029 | |
4dff95dc SB |
1030 | if (core && (core->flags & CLK_GET_RATE_NOCACHE)) |
1031 | __clk_recalc_rates(core, 0); | |
1032 | ||
1033 | rate = clk_core_get_rate_nolock(core); | |
1034 | clk_prepare_unlock(); | |
1035 | ||
1036 | return rate; | |
b2476490 MT |
1037 | } |
1038 | ||
1039 | /** | |
4dff95dc SB |
1040 | * clk_get_rate - return the rate of clk |
1041 | * @clk: the clk whose rate is being returned | |
b2476490 | 1042 | * |
4dff95dc SB |
1043 | * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag |
1044 | * is set, which means a recalc_rate will be issued. | |
1045 | * If clk is NULL then returns 0. | |
b2476490 | 1046 | */ |
4dff95dc | 1047 | unsigned long clk_get_rate(struct clk *clk) |
b2476490 | 1048 | { |
4dff95dc SB |
1049 | if (!clk) |
1050 | return 0; | |
63589e92 | 1051 | |
4dff95dc | 1052 | return clk_core_get_rate(clk->core); |
b2476490 | 1053 | } |
4dff95dc | 1054 | EXPORT_SYMBOL_GPL(clk_get_rate); |
b2476490 | 1055 | |
4dff95dc SB |
1056 | static int clk_fetch_parent_index(struct clk_core *core, |
1057 | struct clk_core *parent) | |
b2476490 | 1058 | { |
4dff95dc | 1059 | int i; |
b2476490 | 1060 | |
4dff95dc SB |
1061 | if (!core->parents) { |
1062 | core->parents = kcalloc(core->num_parents, | |
1063 | sizeof(struct clk *), GFP_KERNEL); | |
1064 | if (!core->parents) | |
1065 | return -ENOMEM; | |
1066 | } | |
dfc202ea | 1067 | |
4dff95dc SB |
1068 | /* |
1069 | * find index of new parent clock using cached parent ptrs, | |
1070 | * or if not yet cached, use string name comparison and cache | |
1071 | * them now to avoid future calls to clk_core_lookup. | |
1072 | */ | |
1073 | for (i = 0; i < core->num_parents; i++) { | |
1074 | if (core->parents[i] == parent) | |
1075 | return i; | |
dfc202ea | 1076 | |
4dff95dc SB |
1077 | if (core->parents[i]) |
1078 | continue; | |
dfc202ea | 1079 | |
4dff95dc SB |
1080 | if (!strcmp(core->parent_names[i], parent->name)) { |
1081 | core->parents[i] = clk_core_lookup(parent->name); | |
1082 | return i; | |
b2476490 MT |
1083 | } |
1084 | } | |
1085 | ||
4dff95dc | 1086 | return -EINVAL; |
b2476490 MT |
1087 | } |
1088 | ||
4dff95dc | 1089 | static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) |
b2476490 | 1090 | { |
4dff95dc | 1091 | hlist_del(&core->child_node); |
035a61c3 | 1092 | |
4dff95dc SB |
1093 | if (new_parent) { |
1094 | /* avoid duplicate POST_RATE_CHANGE notifications */ | |
1095 | if (new_parent->new_child == core) | |
1096 | new_parent->new_child = NULL; | |
b2476490 | 1097 | |
4dff95dc SB |
1098 | hlist_add_head(&core->child_node, &new_parent->children); |
1099 | } else { | |
1100 | hlist_add_head(&core->child_node, &clk_orphan_list); | |
1101 | } | |
dfc202ea | 1102 | |
4dff95dc | 1103 | core->parent = new_parent; |
035a61c3 TV |
1104 | } |
1105 | ||
4dff95dc SB |
1106 | static struct clk_core *__clk_set_parent_before(struct clk_core *core, |
1107 | struct clk_core *parent) | |
b2476490 MT |
1108 | { |
1109 | unsigned long flags; | |
4dff95dc | 1110 | struct clk_core *old_parent = core->parent; |
b2476490 | 1111 | |
4dff95dc SB |
1112 | /* |
1113 | * Migrate prepare state between parents and prevent race with | |
1114 | * clk_enable(). | |
1115 | * | |
1116 | * If the clock is not prepared, then a race with | |
1117 | * clk_enable/disable() is impossible since we already have the | |
1118 | * prepare lock (future calls to clk_enable() need to be preceded by | |
1119 | * a clk_prepare()). | |
1120 | * | |
1121 | * If the clock is prepared, migrate the prepared state to the new | |
1122 | * parent and also protect against a race with clk_enable() by | |
1123 | * forcing the clock and the new parent on. This ensures that all | |
1124 | * future calls to clk_enable() are practically NOPs with respect to | |
1125 | * hardware and software states. | |
1126 | * | |
1127 | * See also: Comment for clk_set_parent() below. | |
1128 | */ | |
1129 | if (core->prepare_count) { | |
1130 | clk_core_prepare(parent); | |
d2a5d46b | 1131 | flags = clk_enable_lock(); |
4dff95dc SB |
1132 | clk_core_enable(parent); |
1133 | clk_core_enable(core); | |
d2a5d46b | 1134 | clk_enable_unlock(flags); |
4dff95dc | 1135 | } |
63589e92 | 1136 | |
4dff95dc | 1137 | /* update the clk tree topology */ |
eab89f69 | 1138 | flags = clk_enable_lock(); |
4dff95dc | 1139 | clk_reparent(core, parent); |
eab89f69 | 1140 | clk_enable_unlock(flags); |
4dff95dc SB |
1141 | |
1142 | return old_parent; | |
b2476490 | 1143 | } |
b2476490 | 1144 | |
4dff95dc SB |
1145 | static void __clk_set_parent_after(struct clk_core *core, |
1146 | struct clk_core *parent, | |
1147 | struct clk_core *old_parent) | |
b2476490 | 1148 | { |
d2a5d46b DA |
1149 | unsigned long flags; |
1150 | ||
4dff95dc SB |
1151 | /* |
1152 | * Finish the migration of prepare state and undo the changes done | |
1153 | * for preventing a race with clk_enable(). | |
1154 | */ | |
1155 | if (core->prepare_count) { | |
d2a5d46b | 1156 | flags = clk_enable_lock(); |
4dff95dc SB |
1157 | clk_core_disable(core); |
1158 | clk_core_disable(old_parent); | |
d2a5d46b | 1159 | clk_enable_unlock(flags); |
4dff95dc SB |
1160 | clk_core_unprepare(old_parent); |
1161 | } | |
1162 | } | |
b2476490 | 1163 | |
4dff95dc SB |
1164 | static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, |
1165 | u8 p_index) | |
1166 | { | |
1167 | unsigned long flags; | |
1168 | int ret = 0; | |
1169 | struct clk_core *old_parent; | |
b2476490 | 1170 | |
4dff95dc | 1171 | old_parent = __clk_set_parent_before(core, parent); |
b2476490 | 1172 | |
4dff95dc | 1173 | trace_clk_set_parent(core, parent); |
b2476490 | 1174 | |
4dff95dc SB |
1175 | /* change clock input source */ |
1176 | if (parent && core->ops->set_parent) | |
1177 | ret = core->ops->set_parent(core->hw, p_index); | |
dfc202ea | 1178 | |
4dff95dc | 1179 | trace_clk_set_parent_complete(core, parent); |
dfc202ea | 1180 | |
4dff95dc SB |
1181 | if (ret) { |
1182 | flags = clk_enable_lock(); | |
1183 | clk_reparent(core, old_parent); | |
1184 | clk_enable_unlock(flags); | |
dfc202ea | 1185 | |
4dff95dc | 1186 | if (core->prepare_count) { |
d2a5d46b | 1187 | flags = clk_enable_lock(); |
4dff95dc SB |
1188 | clk_core_disable(core); |
1189 | clk_core_disable(parent); | |
d2a5d46b | 1190 | clk_enable_unlock(flags); |
4dff95dc | 1191 | clk_core_unprepare(parent); |
b2476490 | 1192 | } |
4dff95dc | 1193 | return ret; |
b2476490 MT |
1194 | } |
1195 | ||
4dff95dc SB |
1196 | __clk_set_parent_after(core, parent, old_parent); |
1197 | ||
b2476490 MT |
1198 | return 0; |
1199 | } | |
1200 | ||
1201 | /** | |
4dff95dc SB |
1202 | * __clk_speculate_rates |
1203 | * @core: first clk in the subtree | |
1204 | * @parent_rate: the "future" rate of clk's parent | |
b2476490 | 1205 | * |
4dff95dc SB |
1206 | * Walks the subtree of clks starting with clk, speculating rates as it |
1207 | * goes and firing off PRE_RATE_CHANGE notifications as necessary. | |
1208 | * | |
1209 | * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending | |
1210 | * pre-rate change notifications and returns early if no clks in the | |
1211 | * subtree have subscribed to the notifications. Note that if a clk does not | |
1212 | * implement the .recalc_rate callback then it is assumed that the clock will | |
1213 | * take on the rate of its parent. | |
b2476490 | 1214 | */ |
4dff95dc SB |
1215 | static int __clk_speculate_rates(struct clk_core *core, |
1216 | unsigned long parent_rate) | |
b2476490 | 1217 | { |
4dff95dc SB |
1218 | struct clk_core *child; |
1219 | unsigned long new_rate; | |
1220 | int ret = NOTIFY_DONE; | |
b2476490 | 1221 | |
4dff95dc | 1222 | lockdep_assert_held(&prepare_lock); |
864e160a | 1223 | |
4dff95dc SB |
1224 | new_rate = clk_recalc(core, parent_rate); |
1225 | ||
1226 | /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ | |
1227 | if (core->notifier_count) | |
1228 | ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); | |
1229 | ||
1230 | if (ret & NOTIFY_STOP_MASK) { | |
1231 | pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", | |
1232 | __func__, core->name, ret); | |
1233 | goto out; | |
1234 | } | |
1235 | ||
1236 | hlist_for_each_entry(child, &core->children, child_node) { | |
1237 | ret = __clk_speculate_rates(child, new_rate); | |
1238 | if (ret & NOTIFY_STOP_MASK) | |
1239 | break; | |
1240 | } | |
b2476490 | 1241 | |
4dff95dc | 1242 | out: |
b2476490 MT |
1243 | return ret; |
1244 | } | |
b2476490 | 1245 | |
4dff95dc SB |
1246 | static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, |
1247 | struct clk_core *new_parent, u8 p_index) | |
b2476490 | 1248 | { |
4dff95dc | 1249 | struct clk_core *child; |
b2476490 | 1250 | |
4dff95dc SB |
1251 | core->new_rate = new_rate; |
1252 | core->new_parent = new_parent; | |
1253 | core->new_parent_index = p_index; | |
1254 | /* include clk in new parent's PRE_RATE_CHANGE notifications */ | |
1255 | core->new_child = NULL; | |
1256 | if (new_parent && new_parent != core->parent) | |
1257 | new_parent->new_child = core; | |
496eadf8 | 1258 | |
4dff95dc SB |
1259 | hlist_for_each_entry(child, &core->children, child_node) { |
1260 | child->new_rate = clk_recalc(child, new_rate); | |
1261 | clk_calc_subtree(child, child->new_rate, NULL, 0); | |
1262 | } | |
1263 | } | |
b2476490 | 1264 | |
4dff95dc SB |
1265 | /* |
1266 | * calculate the new rates returning the topmost clock that has to be | |
1267 | * changed. | |
1268 | */ | |
1269 | static struct clk_core *clk_calc_new_rates(struct clk_core *core, | |
1270 | unsigned long rate) | |
1271 | { | |
1272 | struct clk_core *top = core; | |
1273 | struct clk_core *old_parent, *parent; | |
4dff95dc SB |
1274 | unsigned long best_parent_rate = 0; |
1275 | unsigned long new_rate; | |
1276 | unsigned long min_rate; | |
1277 | unsigned long max_rate; | |
1278 | int p_index = 0; | |
1279 | long ret; | |
1280 | ||
1281 | /* sanity */ | |
1282 | if (IS_ERR_OR_NULL(core)) | |
1283 | return NULL; | |
1284 | ||
1285 | /* save parent rate, if it exists */ | |
1286 | parent = old_parent = core->parent; | |
71472c0c | 1287 | if (parent) |
4dff95dc | 1288 | best_parent_rate = parent->rate; |
71472c0c | 1289 | |
4dff95dc SB |
1290 | clk_core_get_boundaries(core, &min_rate, &max_rate); |
1291 | ||
1292 | /* find the closest rate and parent clk/rate */ | |
d6968fca | 1293 | if (core->ops->determine_rate) { |
0817b62c BB |
1294 | struct clk_rate_request req; |
1295 | ||
1296 | req.rate = rate; | |
1297 | req.min_rate = min_rate; | |
1298 | req.max_rate = max_rate; | |
1299 | if (parent) { | |
1300 | req.best_parent_hw = parent->hw; | |
1301 | req.best_parent_rate = parent->rate; | |
1302 | } else { | |
1303 | req.best_parent_hw = NULL; | |
1304 | req.best_parent_rate = 0; | |
1305 | } | |
1306 | ||
1307 | ret = core->ops->determine_rate(core->hw, &req); | |
4dff95dc SB |
1308 | if (ret < 0) |
1309 | return NULL; | |
1c8e6004 | 1310 | |
0817b62c BB |
1311 | best_parent_rate = req.best_parent_rate; |
1312 | new_rate = req.rate; | |
1313 | parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; | |
4dff95dc SB |
1314 | } else if (core->ops->round_rate) { |
1315 | ret = core->ops->round_rate(core->hw, rate, | |
0817b62c | 1316 | &best_parent_rate); |
4dff95dc SB |
1317 | if (ret < 0) |
1318 | return NULL; | |
035a61c3 | 1319 | |
4dff95dc SB |
1320 | new_rate = ret; |
1321 | if (new_rate < min_rate || new_rate > max_rate) | |
1322 | return NULL; | |
1323 | } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { | |
1324 | /* pass-through clock without adjustable parent */ | |
1325 | core->new_rate = core->rate; | |
1326 | return NULL; | |
1327 | } else { | |
1328 | /* pass-through clock with adjustable parent */ | |
1329 | top = clk_calc_new_rates(parent, rate); | |
1330 | new_rate = parent->new_rate; | |
1331 | goto out; | |
1332 | } | |
1c8e6004 | 1333 | |
4dff95dc SB |
1334 | /* some clocks must be gated to change parent */ |
1335 | if (parent != old_parent && | |
1336 | (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1337 | pr_debug("%s: %s not gated but wants to reparent\n", | |
1338 | __func__, core->name); | |
1339 | return NULL; | |
1340 | } | |
b2476490 | 1341 | |
4dff95dc SB |
1342 | /* try finding the new parent index */ |
1343 | if (parent && core->num_parents > 1) { | |
1344 | p_index = clk_fetch_parent_index(core, parent); | |
1345 | if (p_index < 0) { | |
1346 | pr_debug("%s: clk %s can not be parent of clk %s\n", | |
1347 | __func__, parent->name, core->name); | |
1348 | return NULL; | |
1349 | } | |
1350 | } | |
b2476490 | 1351 | |
4dff95dc SB |
1352 | if ((core->flags & CLK_SET_RATE_PARENT) && parent && |
1353 | best_parent_rate != parent->rate) | |
1354 | top = clk_calc_new_rates(parent, best_parent_rate); | |
035a61c3 | 1355 | |
4dff95dc SB |
1356 | out: |
1357 | clk_calc_subtree(core, new_rate, parent, p_index); | |
b2476490 | 1358 | |
4dff95dc | 1359 | return top; |
b2476490 | 1360 | } |
b2476490 | 1361 | |
4dff95dc SB |
1362 | /* |
1363 | * Notify about rate changes in a subtree. Always walk down the whole tree | |
1364 | * so that in case of an error we can walk down the whole tree again and | |
1365 | * abort the change. | |
b2476490 | 1366 | */ |
4dff95dc SB |
1367 | static struct clk_core *clk_propagate_rate_change(struct clk_core *core, |
1368 | unsigned long event) | |
b2476490 | 1369 | { |
4dff95dc | 1370 | struct clk_core *child, *tmp_clk, *fail_clk = NULL; |
b2476490 MT |
1371 | int ret = NOTIFY_DONE; |
1372 | ||
4dff95dc SB |
1373 | if (core->rate == core->new_rate) |
1374 | return NULL; | |
b2476490 | 1375 | |
4dff95dc SB |
1376 | if (core->notifier_count) { |
1377 | ret = __clk_notify(core, event, core->rate, core->new_rate); | |
1378 | if (ret & NOTIFY_STOP_MASK) | |
1379 | fail_clk = core; | |
b2476490 MT |
1380 | } |
1381 | ||
4dff95dc SB |
1382 | hlist_for_each_entry(child, &core->children, child_node) { |
1383 | /* Skip children who will be reparented to another clock */ | |
1384 | if (child->new_parent && child->new_parent != core) | |
1385 | continue; | |
1386 | tmp_clk = clk_propagate_rate_change(child, event); | |
1387 | if (tmp_clk) | |
1388 | fail_clk = tmp_clk; | |
1389 | } | |
5279fc40 | 1390 | |
4dff95dc SB |
1391 | /* handle the new child who might not be in core->children yet */ |
1392 | if (core->new_child) { | |
1393 | tmp_clk = clk_propagate_rate_change(core->new_child, event); | |
1394 | if (tmp_clk) | |
1395 | fail_clk = tmp_clk; | |
1396 | } | |
5279fc40 | 1397 | |
4dff95dc | 1398 | return fail_clk; |
5279fc40 BB |
1399 | } |
1400 | ||
4dff95dc SB |
1401 | /* |
1402 | * walk down a subtree and set the new rates notifying the rate | |
1403 | * change on the way | |
1404 | */ | |
1405 | static void clk_change_rate(struct clk_core *core) | |
035a61c3 | 1406 | { |
4dff95dc SB |
1407 | struct clk_core *child; |
1408 | struct hlist_node *tmp; | |
1409 | unsigned long old_rate; | |
1410 | unsigned long best_parent_rate = 0; | |
1411 | bool skip_set_rate = false; | |
1412 | struct clk_core *old_parent; | |
035a61c3 | 1413 | |
4dff95dc | 1414 | old_rate = core->rate; |
035a61c3 | 1415 | |
4dff95dc SB |
1416 | if (core->new_parent) |
1417 | best_parent_rate = core->new_parent->rate; | |
1418 | else if (core->parent) | |
1419 | best_parent_rate = core->parent->rate; | |
035a61c3 | 1420 | |
4dff95dc SB |
1421 | if (core->new_parent && core->new_parent != core->parent) { |
1422 | old_parent = __clk_set_parent_before(core, core->new_parent); | |
1423 | trace_clk_set_parent(core, core->new_parent); | |
5279fc40 | 1424 | |
4dff95dc SB |
1425 | if (core->ops->set_rate_and_parent) { |
1426 | skip_set_rate = true; | |
1427 | core->ops->set_rate_and_parent(core->hw, core->new_rate, | |
1428 | best_parent_rate, | |
1429 | core->new_parent_index); | |
1430 | } else if (core->ops->set_parent) { | |
1431 | core->ops->set_parent(core->hw, core->new_parent_index); | |
1432 | } | |
5279fc40 | 1433 | |
4dff95dc SB |
1434 | trace_clk_set_parent_complete(core, core->new_parent); |
1435 | __clk_set_parent_after(core, core->new_parent, old_parent); | |
1436 | } | |
8f2c2db1 | 1437 | |
4dff95dc | 1438 | trace_clk_set_rate(core, core->new_rate); |
b2476490 | 1439 | |
4dff95dc SB |
1440 | if (!skip_set_rate && core->ops->set_rate) |
1441 | core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); | |
496eadf8 | 1442 | |
4dff95dc | 1443 | trace_clk_set_rate_complete(core, core->new_rate); |
b2476490 | 1444 | |
4dff95dc | 1445 | core->rate = clk_recalc(core, best_parent_rate); |
b2476490 | 1446 | |
4dff95dc SB |
1447 | if (core->notifier_count && old_rate != core->rate) |
1448 | __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); | |
b2476490 | 1449 | |
85e88fab MT |
1450 | if (core->flags & CLK_RECALC_NEW_RATES) |
1451 | (void)clk_calc_new_rates(core, core->new_rate); | |
d8d91987 | 1452 | |
b2476490 | 1453 | /* |
4dff95dc SB |
1454 | * Use safe iteration, as change_rate can actually swap parents |
1455 | * for certain clock types. | |
b2476490 | 1456 | */ |
4dff95dc SB |
1457 | hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { |
1458 | /* Skip children who will be reparented to another clock */ | |
1459 | if (child->new_parent && child->new_parent != core) | |
1460 | continue; | |
1461 | clk_change_rate(child); | |
1462 | } | |
b2476490 | 1463 | |
4dff95dc SB |
1464 | /* handle the new child who might not be in core->children yet */ |
1465 | if (core->new_child) | |
1466 | clk_change_rate(core->new_child); | |
b2476490 MT |
1467 | } |
1468 | ||
4dff95dc SB |
1469 | static int clk_core_set_rate_nolock(struct clk_core *core, |
1470 | unsigned long req_rate) | |
a093bde2 | 1471 | { |
4dff95dc SB |
1472 | struct clk_core *top, *fail_clk; |
1473 | unsigned long rate = req_rate; | |
1474 | int ret = 0; | |
a093bde2 | 1475 | |
4dff95dc SB |
1476 | if (!core) |
1477 | return 0; | |
a093bde2 | 1478 | |
4dff95dc SB |
1479 | /* bail early if nothing to do */ |
1480 | if (rate == clk_core_get_rate_nolock(core)) | |
1481 | return 0; | |
a093bde2 | 1482 | |
4dff95dc SB |
1483 | if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count) |
1484 | return -EBUSY; | |
a093bde2 | 1485 | |
4dff95dc SB |
1486 | /* calculate new rates and get the topmost changed clock */ |
1487 | top = clk_calc_new_rates(core, rate); | |
1488 | if (!top) | |
1489 | return -EINVAL; | |
1490 | ||
1491 | /* notify that we are about to change rates */ | |
1492 | fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); | |
1493 | if (fail_clk) { | |
1494 | pr_debug("%s: failed to set %s rate\n", __func__, | |
1495 | fail_clk->name); | |
1496 | clk_propagate_rate_change(top, ABORT_RATE_CHANGE); | |
1497 | return -EBUSY; | |
1498 | } | |
1499 | ||
1500 | /* change the rates */ | |
1501 | clk_change_rate(top); | |
1502 | ||
1503 | core->req_rate = req_rate; | |
1504 | ||
1505 | return ret; | |
a093bde2 | 1506 | } |
035a61c3 TV |
1507 | |
1508 | /** | |
4dff95dc SB |
1509 | * clk_set_rate - specify a new rate for clk |
1510 | * @clk: the clk whose rate is being changed | |
1511 | * @rate: the new rate for clk | |
035a61c3 | 1512 | * |
4dff95dc SB |
1513 | * In the simplest case clk_set_rate will only adjust the rate of clk. |
1514 | * | |
1515 | * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to | |
1516 | * propagate up to clk's parent; whether or not this happens depends on the | |
1517 | * outcome of clk's .round_rate implementation. If *parent_rate is unchanged | |
1518 | * after calling .round_rate then upstream parent propagation is ignored. If | |
1519 | * *parent_rate comes back with a new rate for clk's parent then we propagate | |
1520 | * up to clk's parent and set its rate. Upward propagation will continue | |
1521 | * until either a clk does not support the CLK_SET_RATE_PARENT flag or | |
1522 | * .round_rate stops requesting changes to clk's parent_rate. | |
1523 | * | |
1524 | * Rate changes are accomplished via tree traversal that also recalculates the | |
1525 | * rates for the clocks and fires off POST_RATE_CHANGE notifiers. | |
1526 | * | |
1527 | * Returns 0 on success, -EERROR otherwise. | |
035a61c3 | 1528 | */ |
4dff95dc | 1529 | int clk_set_rate(struct clk *clk, unsigned long rate) |
035a61c3 | 1530 | { |
4dff95dc SB |
1531 | int ret; |
1532 | ||
035a61c3 TV |
1533 | if (!clk) |
1534 | return 0; | |
1535 | ||
4dff95dc SB |
1536 | /* prevent racing with updates to the clock topology */ |
1537 | clk_prepare_lock(); | |
da0f0b2c | 1538 | |
4dff95dc | 1539 | ret = clk_core_set_rate_nolock(clk->core, rate); |
da0f0b2c | 1540 | |
4dff95dc | 1541 | clk_prepare_unlock(); |
4935b22c | 1542 | |
4dff95dc | 1543 | return ret; |
4935b22c | 1544 | } |
4dff95dc | 1545 | EXPORT_SYMBOL_GPL(clk_set_rate); |
4935b22c | 1546 | |
4dff95dc SB |
1547 | /** |
1548 | * clk_set_rate_range - set a rate range for a clock source | |
1549 | * @clk: clock source | |
1550 | * @min: desired minimum clock rate in Hz, inclusive | |
1551 | * @max: desired maximum clock rate in Hz, inclusive | |
1552 | * | |
1553 | * Returns success (0) or negative errno. | |
1554 | */ | |
1555 | int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) | |
4935b22c | 1556 | { |
4dff95dc | 1557 | int ret = 0; |
4935b22c | 1558 | |
4dff95dc SB |
1559 | if (!clk) |
1560 | return 0; | |
903efc55 | 1561 | |
4dff95dc SB |
1562 | if (min > max) { |
1563 | pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", | |
1564 | __func__, clk->core->name, clk->dev_id, clk->con_id, | |
1565 | min, max); | |
1566 | return -EINVAL; | |
903efc55 | 1567 | } |
4935b22c | 1568 | |
4dff95dc | 1569 | clk_prepare_lock(); |
4935b22c | 1570 | |
4dff95dc SB |
1571 | if (min != clk->min_rate || max != clk->max_rate) { |
1572 | clk->min_rate = min; | |
1573 | clk->max_rate = max; | |
1574 | ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
4935b22c JH |
1575 | } |
1576 | ||
4dff95dc | 1577 | clk_prepare_unlock(); |
4935b22c | 1578 | |
4dff95dc | 1579 | return ret; |
3fa2252b | 1580 | } |
4dff95dc | 1581 | EXPORT_SYMBOL_GPL(clk_set_rate_range); |
3fa2252b | 1582 | |
4dff95dc SB |
1583 | /** |
1584 | * clk_set_min_rate - set a minimum clock rate for a clock source | |
1585 | * @clk: clock source | |
1586 | * @rate: desired minimum clock rate in Hz, inclusive | |
1587 | * | |
1588 | * Returns success (0) or negative errno. | |
1589 | */ | |
1590 | int clk_set_min_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1591 | { |
4dff95dc SB |
1592 | if (!clk) |
1593 | return 0; | |
1594 | ||
1595 | return clk_set_rate_range(clk, rate, clk->max_rate); | |
3fa2252b | 1596 | } |
4dff95dc | 1597 | EXPORT_SYMBOL_GPL(clk_set_min_rate); |
3fa2252b | 1598 | |
4dff95dc SB |
1599 | /** |
1600 | * clk_set_max_rate - set a maximum clock rate for a clock source | |
1601 | * @clk: clock source | |
1602 | * @rate: desired maximum clock rate in Hz, inclusive | |
1603 | * | |
1604 | * Returns success (0) or negative errno. | |
1605 | */ | |
1606 | int clk_set_max_rate(struct clk *clk, unsigned long rate) | |
3fa2252b | 1607 | { |
4dff95dc SB |
1608 | if (!clk) |
1609 | return 0; | |
4935b22c | 1610 | |
4dff95dc | 1611 | return clk_set_rate_range(clk, clk->min_rate, rate); |
4935b22c | 1612 | } |
4dff95dc | 1613 | EXPORT_SYMBOL_GPL(clk_set_max_rate); |
4935b22c | 1614 | |
b2476490 | 1615 | /** |
4dff95dc SB |
1616 | * clk_get_parent - return the parent of a clk |
1617 | * @clk: the clk whose parent gets returned | |
b2476490 | 1618 | * |
4dff95dc | 1619 | * Simply returns clk->parent. Returns NULL if clk is NULL. |
b2476490 | 1620 | */ |
4dff95dc | 1621 | struct clk *clk_get_parent(struct clk *clk) |
b2476490 | 1622 | { |
4dff95dc | 1623 | struct clk *parent; |
b2476490 | 1624 | |
4dff95dc SB |
1625 | clk_prepare_lock(); |
1626 | parent = __clk_get_parent(clk); | |
1627 | clk_prepare_unlock(); | |
496eadf8 | 1628 | |
4dff95dc SB |
1629 | return parent; |
1630 | } | |
1631 | EXPORT_SYMBOL_GPL(clk_get_parent); | |
b2476490 | 1632 | |
4dff95dc SB |
1633 | /* |
1634 | * .get_parent is mandatory for clocks with multiple possible parents. It is | |
1635 | * optional for single-parent clocks. Always call .get_parent if it is | |
1636 | * available and WARN if it is missing for multi-parent clocks. | |
1637 | * | |
1638 | * For single-parent clocks without .get_parent, first check to see if the | |
1639 | * .parents array exists, and if so use it to avoid an expensive tree | |
1640 | * traversal. If .parents does not exist then walk the tree. | |
1641 | */ | |
1642 | static struct clk_core *__clk_init_parent(struct clk_core *core) | |
1643 | { | |
1644 | struct clk_core *ret = NULL; | |
1645 | u8 index; | |
b2476490 | 1646 | |
4dff95dc SB |
1647 | /* handle the trivial cases */ |
1648 | ||
1649 | if (!core->num_parents) | |
b2476490 MT |
1650 | goto out; |
1651 | ||
4dff95dc SB |
1652 | if (core->num_parents == 1) { |
1653 | if (IS_ERR_OR_NULL(core->parent)) | |
1654 | core->parent = clk_core_lookup(core->parent_names[0]); | |
1655 | ret = core->parent; | |
1656 | goto out; | |
b2476490 MT |
1657 | } |
1658 | ||
4dff95dc SB |
1659 | if (!core->ops->get_parent) { |
1660 | WARN(!core->ops->get_parent, | |
1661 | "%s: multi-parent clocks must implement .get_parent\n", | |
1662 | __func__); | |
1663 | goto out; | |
1664 | }; | |
1665 | ||
1666 | /* | |
1667 | * Do our best to cache parent clocks in core->parents. This prevents | |
1668 | * unnecessary and expensive lookups. We don't set core->parent here; | |
1669 | * that is done by the calling function. | |
1670 | */ | |
1671 | ||
1672 | index = core->ops->get_parent(core->hw); | |
1673 | ||
1674 | if (!core->parents) | |
1675 | core->parents = | |
1676 | kcalloc(core->num_parents, sizeof(struct clk *), | |
1677 | GFP_KERNEL); | |
1678 | ||
1679 | ret = clk_core_get_parent_by_index(core, index); | |
1680 | ||
b2476490 MT |
1681 | out: |
1682 | return ret; | |
1683 | } | |
1684 | ||
4dff95dc SB |
1685 | static void clk_core_reparent(struct clk_core *core, |
1686 | struct clk_core *new_parent) | |
b2476490 | 1687 | { |
4dff95dc SB |
1688 | clk_reparent(core, new_parent); |
1689 | __clk_recalc_accuracies(core); | |
1690 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
b2476490 MT |
1691 | } |
1692 | ||
42c86547 TV |
1693 | void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) |
1694 | { | |
1695 | if (!hw) | |
1696 | return; | |
1697 | ||
1698 | clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); | |
1699 | } | |
1700 | ||
4dff95dc SB |
1701 | /** |
1702 | * clk_has_parent - check if a clock is a possible parent for another | |
1703 | * @clk: clock source | |
1704 | * @parent: parent clock source | |
1705 | * | |
1706 | * This function can be used in drivers that need to check that a clock can be | |
1707 | * the parent of another without actually changing the parent. | |
1708 | * | |
1709 | * Returns true if @parent is a possible parent for @clk, false otherwise. | |
b2476490 | 1710 | */ |
4dff95dc | 1711 | bool clk_has_parent(struct clk *clk, struct clk *parent) |
b2476490 | 1712 | { |
4dff95dc SB |
1713 | struct clk_core *core, *parent_core; |
1714 | unsigned int i; | |
b2476490 | 1715 | |
4dff95dc SB |
1716 | /* NULL clocks should be nops, so return success if either is NULL. */ |
1717 | if (!clk || !parent) | |
1718 | return true; | |
7452b219 | 1719 | |
4dff95dc SB |
1720 | core = clk->core; |
1721 | parent_core = parent->core; | |
71472c0c | 1722 | |
4dff95dc SB |
1723 | /* Optimize for the case where the parent is already the parent. */ |
1724 | if (core->parent == parent_core) | |
1725 | return true; | |
1c8e6004 | 1726 | |
4dff95dc SB |
1727 | for (i = 0; i < core->num_parents; i++) |
1728 | if (strcmp(core->parent_names[i], parent_core->name) == 0) | |
1729 | return true; | |
03bc10ab | 1730 | |
4dff95dc SB |
1731 | return false; |
1732 | } | |
1733 | EXPORT_SYMBOL_GPL(clk_has_parent); | |
03bc10ab | 1734 | |
4dff95dc SB |
1735 | static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent) |
1736 | { | |
1737 | int ret = 0; | |
1738 | int p_index = 0; | |
1739 | unsigned long p_rate = 0; | |
1740 | ||
1741 | if (!core) | |
1742 | return 0; | |
1743 | ||
1744 | /* prevent racing with updates to the clock topology */ | |
1745 | clk_prepare_lock(); | |
1746 | ||
1747 | if (core->parent == parent) | |
1748 | goto out; | |
1749 | ||
1750 | /* verify ops for for multi-parent clks */ | |
1751 | if ((core->num_parents > 1) && (!core->ops->set_parent)) { | |
1752 | ret = -ENOSYS; | |
63f5c3b2 | 1753 | goto out; |
7452b219 MT |
1754 | } |
1755 | ||
4dff95dc SB |
1756 | /* check that we are allowed to re-parent if the clock is in use */ |
1757 | if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { | |
1758 | ret = -EBUSY; | |
1759 | goto out; | |
b2476490 MT |
1760 | } |
1761 | ||
71472c0c | 1762 | /* try finding the new parent index */ |
4dff95dc | 1763 | if (parent) { |
d6968fca | 1764 | p_index = clk_fetch_parent_index(core, parent); |
4dff95dc | 1765 | p_rate = parent->rate; |
f1c8b2ed | 1766 | if (p_index < 0) { |
71472c0c | 1767 | pr_debug("%s: clk %s can not be parent of clk %s\n", |
4dff95dc SB |
1768 | __func__, parent->name, core->name); |
1769 | ret = p_index; | |
1770 | goto out; | |
71472c0c | 1771 | } |
b2476490 MT |
1772 | } |
1773 | ||
4dff95dc SB |
1774 | /* propagate PRE_RATE_CHANGE notifications */ |
1775 | ret = __clk_speculate_rates(core, p_rate); | |
b2476490 | 1776 | |
4dff95dc SB |
1777 | /* abort if a driver objects */ |
1778 | if (ret & NOTIFY_STOP_MASK) | |
1779 | goto out; | |
b2476490 | 1780 | |
4dff95dc SB |
1781 | /* do the re-parent */ |
1782 | ret = __clk_set_parent(core, parent, p_index); | |
b2476490 | 1783 | |
4dff95dc SB |
1784 | /* propagate rate an accuracy recalculation accordingly */ |
1785 | if (ret) { | |
1786 | __clk_recalc_rates(core, ABORT_RATE_CHANGE); | |
1787 | } else { | |
1788 | __clk_recalc_rates(core, POST_RATE_CHANGE); | |
1789 | __clk_recalc_accuracies(core); | |
b2476490 MT |
1790 | } |
1791 | ||
4dff95dc SB |
1792 | out: |
1793 | clk_prepare_unlock(); | |
71472c0c | 1794 | |
4dff95dc SB |
1795 | return ret; |
1796 | } | |
b2476490 | 1797 | |
4dff95dc SB |
1798 | /** |
1799 | * clk_set_parent - switch the parent of a mux clk | |
1800 | * @clk: the mux clk whose input we are switching | |
1801 | * @parent: the new input to clk | |
1802 | * | |
1803 | * Re-parent clk to use parent as its new input source. If clk is in | |
1804 | * prepared state, the clk will get enabled for the duration of this call. If | |
1805 | * that's not acceptable for a specific clk (Eg: the consumer can't handle | |
1806 | * that, the reparenting is glitchy in hardware, etc), use the | |
1807 | * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. | |
1808 | * | |
1809 | * After successfully changing clk's parent clk_set_parent will update the | |
1810 | * clk topology, sysfs topology and propagate rate recalculation via | |
1811 | * __clk_recalc_rates. | |
1812 | * | |
1813 | * Returns 0 on success, -EERROR otherwise. | |
1814 | */ | |
1815 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
1816 | { | |
1817 | if (!clk) | |
1818 | return 0; | |
1819 | ||
1820 | return clk_core_set_parent(clk->core, parent ? parent->core : NULL); | |
b2476490 | 1821 | } |
4dff95dc | 1822 | EXPORT_SYMBOL_GPL(clk_set_parent); |
b2476490 | 1823 | |
4dff95dc SB |
1824 | /** |
1825 | * clk_set_phase - adjust the phase shift of a clock signal | |
1826 | * @clk: clock signal source | |
1827 | * @degrees: number of degrees the signal is shifted | |
1828 | * | |
1829 | * Shifts the phase of a clock signal by the specified | |
1830 | * degrees. Returns 0 on success, -EERROR otherwise. | |
1831 | * | |
1832 | * This function makes no distinction about the input or reference | |
1833 | * signal that we adjust the clock signal phase against. For example | |
1834 | * phase locked-loop clock signal generators we may shift phase with | |
1835 | * respect to feedback clock signal input, but for other cases the | |
1836 | * clock phase may be shifted with respect to some other, unspecified | |
1837 | * signal. | |
1838 | * | |
1839 | * Additionally the concept of phase shift does not propagate through | |
1840 | * the clock tree hierarchy, which sets it apart from clock rates and | |
1841 | * clock accuracy. A parent clock phase attribute does not have an | |
1842 | * impact on the phase attribute of a child clock. | |
b2476490 | 1843 | */ |
4dff95dc | 1844 | int clk_set_phase(struct clk *clk, int degrees) |
b2476490 | 1845 | { |
4dff95dc | 1846 | int ret = -EINVAL; |
b2476490 | 1847 | |
4dff95dc SB |
1848 | if (!clk) |
1849 | return 0; | |
b2476490 | 1850 | |
4dff95dc SB |
1851 | /* sanity check degrees */ |
1852 | degrees %= 360; | |
1853 | if (degrees < 0) | |
1854 | degrees += 360; | |
bf47b4fd | 1855 | |
4dff95dc | 1856 | clk_prepare_lock(); |
3fa2252b | 1857 | |
4dff95dc | 1858 | trace_clk_set_phase(clk->core, degrees); |
3fa2252b | 1859 | |
4dff95dc SB |
1860 | if (clk->core->ops->set_phase) |
1861 | ret = clk->core->ops->set_phase(clk->core->hw, degrees); | |
3fa2252b | 1862 | |
4dff95dc | 1863 | trace_clk_set_phase_complete(clk->core, degrees); |
dfc202ea | 1864 | |
4dff95dc SB |
1865 | if (!ret) |
1866 | clk->core->phase = degrees; | |
b2476490 | 1867 | |
4dff95dc | 1868 | clk_prepare_unlock(); |
dfc202ea | 1869 | |
4dff95dc SB |
1870 | return ret; |
1871 | } | |
1872 | EXPORT_SYMBOL_GPL(clk_set_phase); | |
b2476490 | 1873 | |
4dff95dc SB |
1874 | static int clk_core_get_phase(struct clk_core *core) |
1875 | { | |
1876 | int ret; | |
b2476490 | 1877 | |
4dff95dc SB |
1878 | clk_prepare_lock(); |
1879 | ret = core->phase; | |
1880 | clk_prepare_unlock(); | |
71472c0c | 1881 | |
4dff95dc | 1882 | return ret; |
b2476490 MT |
1883 | } |
1884 | ||
4dff95dc SB |
1885 | /** |
1886 | * clk_get_phase - return the phase shift of a clock signal | |
1887 | * @clk: clock signal source | |
1888 | * | |
1889 | * Returns the phase shift of a clock node in degrees, otherwise returns | |
1890 | * -EERROR. | |
1891 | */ | |
1892 | int clk_get_phase(struct clk *clk) | |
1c8e6004 | 1893 | { |
4dff95dc | 1894 | if (!clk) |
1c8e6004 TV |
1895 | return 0; |
1896 | ||
4dff95dc SB |
1897 | return clk_core_get_phase(clk->core); |
1898 | } | |
1899 | EXPORT_SYMBOL_GPL(clk_get_phase); | |
1c8e6004 | 1900 | |
4dff95dc SB |
1901 | /** |
1902 | * clk_is_match - check if two clk's point to the same hardware clock | |
1903 | * @p: clk compared against q | |
1904 | * @q: clk compared against p | |
1905 | * | |
1906 | * Returns true if the two struct clk pointers both point to the same hardware | |
1907 | * clock node. Put differently, returns true if struct clk *p and struct clk *q | |
1908 | * share the same struct clk_core object. | |
1909 | * | |
1910 | * Returns false otherwise. Note that two NULL clks are treated as matching. | |
1911 | */ | |
1912 | bool clk_is_match(const struct clk *p, const struct clk *q) | |
1913 | { | |
1914 | /* trivial case: identical struct clk's or both NULL */ | |
1915 | if (p == q) | |
1916 | return true; | |
1c8e6004 | 1917 | |
4dff95dc SB |
1918 | /* true if clk->core pointers match. Avoid derefing garbage */ |
1919 | if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) | |
1920 | if (p->core == q->core) | |
1921 | return true; | |
1c8e6004 | 1922 | |
4dff95dc SB |
1923 | return false; |
1924 | } | |
1925 | EXPORT_SYMBOL_GPL(clk_is_match); | |
1c8e6004 | 1926 | |
4dff95dc | 1927 | /*** debugfs support ***/ |
1c8e6004 | 1928 | |
4dff95dc SB |
1929 | #ifdef CONFIG_DEBUG_FS |
1930 | #include <linux/debugfs.h> | |
1c8e6004 | 1931 | |
4dff95dc SB |
1932 | static struct dentry *rootdir; |
1933 | static int inited = 0; | |
1934 | static DEFINE_MUTEX(clk_debug_lock); | |
1935 | static HLIST_HEAD(clk_debug_list); | |
1c8e6004 | 1936 | |
4dff95dc SB |
1937 | static struct hlist_head *all_lists[] = { |
1938 | &clk_root_list, | |
1939 | &clk_orphan_list, | |
1940 | NULL, | |
1941 | }; | |
1942 | ||
1943 | static struct hlist_head *orphan_list[] = { | |
1944 | &clk_orphan_list, | |
1945 | NULL, | |
1946 | }; | |
1947 | ||
1948 | static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, | |
1949 | int level) | |
b2476490 | 1950 | { |
4dff95dc SB |
1951 | if (!c) |
1952 | return; | |
b2476490 | 1953 | |
4dff95dc SB |
1954 | seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", |
1955 | level * 3 + 1, "", | |
1956 | 30 - level * 3, c->name, | |
1957 | c->enable_count, c->prepare_count, clk_core_get_rate(c), | |
1958 | clk_core_get_accuracy(c), clk_core_get_phase(c)); | |
1959 | } | |
89ac8d7a | 1960 | |
4dff95dc SB |
1961 | static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, |
1962 | int level) | |
1963 | { | |
1964 | struct clk_core *child; | |
b2476490 | 1965 | |
4dff95dc SB |
1966 | if (!c) |
1967 | return; | |
b2476490 | 1968 | |
4dff95dc | 1969 | clk_summary_show_one(s, c, level); |
0e1c0301 | 1970 | |
4dff95dc SB |
1971 | hlist_for_each_entry(child, &c->children, child_node) |
1972 | clk_summary_show_subtree(s, child, level + 1); | |
1c8e6004 | 1973 | } |
b2476490 | 1974 | |
4dff95dc | 1975 | static int clk_summary_show(struct seq_file *s, void *data) |
1c8e6004 | 1976 | { |
4dff95dc SB |
1977 | struct clk_core *c; |
1978 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
1c8e6004 | 1979 | |
4dff95dc SB |
1980 | seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); |
1981 | seq_puts(s, "----------------------------------------------------------------------------------------\n"); | |
b2476490 | 1982 | |
1c8e6004 TV |
1983 | clk_prepare_lock(); |
1984 | ||
4dff95dc SB |
1985 | for (; *lists; lists++) |
1986 | hlist_for_each_entry(c, *lists, child_node) | |
1987 | clk_summary_show_subtree(s, c, 0); | |
b2476490 | 1988 | |
eab89f69 | 1989 | clk_prepare_unlock(); |
b2476490 | 1990 | |
4dff95dc | 1991 | return 0; |
b2476490 | 1992 | } |
1c8e6004 | 1993 | |
1c8e6004 | 1994 | |
4dff95dc | 1995 | static int clk_summary_open(struct inode *inode, struct file *file) |
1c8e6004 | 1996 | { |
4dff95dc | 1997 | return single_open(file, clk_summary_show, inode->i_private); |
1c8e6004 | 1998 | } |
b2476490 | 1999 | |
4dff95dc SB |
2000 | static const struct file_operations clk_summary_fops = { |
2001 | .open = clk_summary_open, | |
2002 | .read = seq_read, | |
2003 | .llseek = seq_lseek, | |
2004 | .release = single_release, | |
2005 | }; | |
b2476490 | 2006 | |
4dff95dc SB |
2007 | static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) |
2008 | { | |
2009 | if (!c) | |
2010 | return; | |
b2476490 | 2011 | |
7cb81136 | 2012 | /* This should be JSON format, i.e. elements separated with a comma */ |
4dff95dc SB |
2013 | seq_printf(s, "\"%s\": { ", c->name); |
2014 | seq_printf(s, "\"enable_count\": %d,", c->enable_count); | |
2015 | seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); | |
7cb81136 SW |
2016 | seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); |
2017 | seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); | |
4dff95dc | 2018 | seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); |
b2476490 | 2019 | } |
b2476490 | 2020 | |
4dff95dc | 2021 | static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) |
b2476490 | 2022 | { |
4dff95dc | 2023 | struct clk_core *child; |
b2476490 | 2024 | |
4dff95dc SB |
2025 | if (!c) |
2026 | return; | |
b2476490 | 2027 | |
4dff95dc | 2028 | clk_dump_one(s, c, level); |
b2476490 | 2029 | |
4dff95dc SB |
2030 | hlist_for_each_entry(child, &c->children, child_node) { |
2031 | seq_printf(s, ","); | |
2032 | clk_dump_subtree(s, child, level + 1); | |
b2476490 MT |
2033 | } |
2034 | ||
4dff95dc | 2035 | seq_printf(s, "}"); |
b2476490 MT |
2036 | } |
2037 | ||
4dff95dc | 2038 | static int clk_dump(struct seq_file *s, void *data) |
4e88f3de | 2039 | { |
4dff95dc SB |
2040 | struct clk_core *c; |
2041 | bool first_node = true; | |
2042 | struct hlist_head **lists = (struct hlist_head **)s->private; | |
4e88f3de | 2043 | |
4dff95dc | 2044 | seq_printf(s, "{"); |
4e88f3de | 2045 | |
4dff95dc | 2046 | clk_prepare_lock(); |
035a61c3 | 2047 | |
4dff95dc SB |
2048 | for (; *lists; lists++) { |
2049 | hlist_for_each_entry(c, *lists, child_node) { | |
2050 | if (!first_node) | |
2051 | seq_puts(s, ","); | |
2052 | first_node = false; | |
2053 | clk_dump_subtree(s, c, 0); | |
2054 | } | |
2055 | } | |
4e88f3de | 2056 | |
4dff95dc | 2057 | clk_prepare_unlock(); |
4e88f3de | 2058 | |
70e9f4dd | 2059 | seq_puts(s, "}\n"); |
4dff95dc | 2060 | return 0; |
4e88f3de | 2061 | } |
4e88f3de | 2062 | |
4dff95dc SB |
2063 | |
2064 | static int clk_dump_open(struct inode *inode, struct file *file) | |
b2476490 | 2065 | { |
4dff95dc SB |
2066 | return single_open(file, clk_dump, inode->i_private); |
2067 | } | |
b2476490 | 2068 | |
4dff95dc SB |
2069 | static const struct file_operations clk_dump_fops = { |
2070 | .open = clk_dump_open, | |
2071 | .read = seq_read, | |
2072 | .llseek = seq_lseek, | |
2073 | .release = single_release, | |
2074 | }; | |
89ac8d7a | 2075 | |
4dff95dc SB |
2076 | static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) |
2077 | { | |
2078 | struct dentry *d; | |
2079 | int ret = -ENOMEM; | |
b2476490 | 2080 | |
4dff95dc SB |
2081 | if (!core || !pdentry) { |
2082 | ret = -EINVAL; | |
b2476490 | 2083 | goto out; |
4dff95dc | 2084 | } |
b2476490 | 2085 | |
4dff95dc SB |
2086 | d = debugfs_create_dir(core->name, pdentry); |
2087 | if (!d) | |
b61c43c0 | 2088 | goto out; |
b61c43c0 | 2089 | |
4dff95dc SB |
2090 | core->dentry = d; |
2091 | ||
2092 | d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry, | |
2093 | (u32 *)&core->rate); | |
2094 | if (!d) | |
2095 | goto err_out; | |
2096 | ||
2097 | d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry, | |
2098 | (u32 *)&core->accuracy); | |
2099 | if (!d) | |
2100 | goto err_out; | |
2101 | ||
2102 | d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry, | |
2103 | (u32 *)&core->phase); | |
2104 | if (!d) | |
2105 | goto err_out; | |
031dcc9b | 2106 | |
4dff95dc SB |
2107 | d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry, |
2108 | (u32 *)&core->flags); | |
2109 | if (!d) | |
2110 | goto err_out; | |
031dcc9b | 2111 | |
4dff95dc SB |
2112 | d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry, |
2113 | (u32 *)&core->prepare_count); | |
2114 | if (!d) | |
2115 | goto err_out; | |
b2476490 | 2116 | |
4dff95dc SB |
2117 | d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry, |
2118 | (u32 *)&core->enable_count); | |
2119 | if (!d) | |
2120 | goto err_out; | |
b2476490 | 2121 | |
4dff95dc SB |
2122 | d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry, |
2123 | (u32 *)&core->notifier_count); | |
2124 | if (!d) | |
2125 | goto err_out; | |
b2476490 | 2126 | |
4dff95dc SB |
2127 | if (core->ops->debug_init) { |
2128 | ret = core->ops->debug_init(core->hw, core->dentry); | |
2129 | if (ret) | |
2130 | goto err_out; | |
5279fc40 | 2131 | } |
b2476490 | 2132 | |
4dff95dc SB |
2133 | ret = 0; |
2134 | goto out; | |
b2476490 | 2135 | |
4dff95dc SB |
2136 | err_out: |
2137 | debugfs_remove_recursive(core->dentry); | |
2138 | core->dentry = NULL; | |
2139 | out: | |
b2476490 MT |
2140 | return ret; |
2141 | } | |
035a61c3 TV |
2142 | |
2143 | /** | |
6e5ab41b SB |
2144 | * clk_debug_register - add a clk node to the debugfs clk directory |
2145 | * @core: the clk being added to the debugfs clk directory | |
035a61c3 | 2146 | * |
6e5ab41b SB |
2147 | * Dynamically adds a clk to the debugfs clk directory if debugfs has been |
2148 | * initialized. Otherwise it bails out early since the debugfs clk directory | |
4dff95dc | 2149 | * will be created lazily by clk_debug_init as part of a late_initcall. |
035a61c3 | 2150 | */ |
4dff95dc | 2151 | static int clk_debug_register(struct clk_core *core) |
035a61c3 | 2152 | { |
4dff95dc | 2153 | int ret = 0; |
035a61c3 | 2154 | |
4dff95dc SB |
2155 | mutex_lock(&clk_debug_lock); |
2156 | hlist_add_head(&core->debug_node, &clk_debug_list); | |
2157 | ||
2158 | if (!inited) | |
2159 | goto unlock; | |
2160 | ||
2161 | ret = clk_debug_create_one(core, rootdir); | |
2162 | unlock: | |
2163 | mutex_unlock(&clk_debug_lock); | |
2164 | ||
2165 | return ret; | |
035a61c3 | 2166 | } |
b2476490 | 2167 | |
4dff95dc | 2168 | /** |
6e5ab41b SB |
2169 | * clk_debug_unregister - remove a clk node from the debugfs clk directory |
2170 | * @core: the clk being removed from the debugfs clk directory | |
e59c5371 | 2171 | * |
6e5ab41b SB |
2172 | * Dynamically removes a clk and all its child nodes from the |
2173 | * debugfs clk directory if clk->dentry points to debugfs created by | |
4dff95dc | 2174 | * clk_debug_register in __clk_init. |
e59c5371 | 2175 | */ |
4dff95dc | 2176 | static void clk_debug_unregister(struct clk_core *core) |
e59c5371 | 2177 | { |
4dff95dc SB |
2178 | mutex_lock(&clk_debug_lock); |
2179 | hlist_del_init(&core->debug_node); | |
2180 | debugfs_remove_recursive(core->dentry); | |
2181 | core->dentry = NULL; | |
2182 | mutex_unlock(&clk_debug_lock); | |
2183 | } | |
e59c5371 | 2184 | |
4dff95dc SB |
2185 | struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode, |
2186 | void *data, const struct file_operations *fops) | |
2187 | { | |
2188 | struct dentry *d = NULL; | |
e59c5371 | 2189 | |
4dff95dc SB |
2190 | if (hw->core->dentry) |
2191 | d = debugfs_create_file(name, mode, hw->core->dentry, data, | |
2192 | fops); | |
e59c5371 | 2193 | |
4dff95dc SB |
2194 | return d; |
2195 | } | |
2196 | EXPORT_SYMBOL_GPL(clk_debugfs_add_file); | |
e59c5371 | 2197 | |
4dff95dc | 2198 | /** |
6e5ab41b | 2199 | * clk_debug_init - lazily populate the debugfs clk directory |
4dff95dc | 2200 | * |
6e5ab41b SB |
2201 | * clks are often initialized very early during boot before memory can be |
2202 | * dynamically allocated and well before debugfs is setup. This function | |
2203 | * populates the debugfs clk directory once at boot-time when we know that | |
2204 | * debugfs is setup. It should only be called once at boot-time, all other clks | |
2205 | * added dynamically will be done so with clk_debug_register. | |
4dff95dc SB |
2206 | */ |
2207 | static int __init clk_debug_init(void) | |
2208 | { | |
2209 | struct clk_core *core; | |
2210 | struct dentry *d; | |
dfc202ea | 2211 | |
4dff95dc | 2212 | rootdir = debugfs_create_dir("clk", NULL); |
e59c5371 | 2213 | |
4dff95dc SB |
2214 | if (!rootdir) |
2215 | return -ENOMEM; | |
dfc202ea | 2216 | |
4dff95dc SB |
2217 | d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists, |
2218 | &clk_summary_fops); | |
2219 | if (!d) | |
2220 | return -ENOMEM; | |
e59c5371 | 2221 | |
4dff95dc SB |
2222 | d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists, |
2223 | &clk_dump_fops); | |
2224 | if (!d) | |
2225 | return -ENOMEM; | |
e59c5371 | 2226 | |
4dff95dc SB |
2227 | d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir, |
2228 | &orphan_list, &clk_summary_fops); | |
2229 | if (!d) | |
2230 | return -ENOMEM; | |
e59c5371 | 2231 | |
4dff95dc SB |
2232 | d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir, |
2233 | &orphan_list, &clk_dump_fops); | |
2234 | if (!d) | |
2235 | return -ENOMEM; | |
e59c5371 | 2236 | |
4dff95dc SB |
2237 | mutex_lock(&clk_debug_lock); |
2238 | hlist_for_each_entry(core, &clk_debug_list, debug_node) | |
2239 | clk_debug_create_one(core, rootdir); | |
e59c5371 | 2240 | |
4dff95dc SB |
2241 | inited = 1; |
2242 | mutex_unlock(&clk_debug_lock); | |
e59c5371 | 2243 | |
4dff95dc SB |
2244 | return 0; |
2245 | } | |
2246 | late_initcall(clk_debug_init); | |
2247 | #else | |
2248 | static inline int clk_debug_register(struct clk_core *core) { return 0; } | |
2249 | static inline void clk_debug_reparent(struct clk_core *core, | |
2250 | struct clk_core *new_parent) | |
035a61c3 | 2251 | { |
035a61c3 | 2252 | } |
4dff95dc | 2253 | static inline void clk_debug_unregister(struct clk_core *core) |
3d3801ef | 2254 | { |
3d3801ef | 2255 | } |
4dff95dc | 2256 | #endif |
3d3801ef | 2257 | |
b2476490 MT |
2258 | /** |
2259 | * __clk_init - initialize the data structures in a struct clk | |
2260 | * @dev: device initializing this clk, placeholder for now | |
2261 | * @clk: clk being initialized | |
2262 | * | |
035a61c3 | 2263 | * Initializes the lists in struct clk_core, queries the hardware for the |
b2476490 | 2264 | * parent and rate and sets them both. |
b2476490 | 2265 | */ |
b09d6d99 | 2266 | static int __clk_init(struct device *dev, struct clk *clk_user) |
b2476490 | 2267 | { |
d1302a36 | 2268 | int i, ret = 0; |
035a61c3 | 2269 | struct clk_core *orphan; |
b67bfe0d | 2270 | struct hlist_node *tmp2; |
d6968fca | 2271 | struct clk_core *core; |
1c8e6004 | 2272 | unsigned long rate; |
b2476490 | 2273 | |
035a61c3 | 2274 | if (!clk_user) |
d1302a36 | 2275 | return -EINVAL; |
b2476490 | 2276 | |
d6968fca | 2277 | core = clk_user->core; |
035a61c3 | 2278 | |
eab89f69 | 2279 | clk_prepare_lock(); |
b2476490 MT |
2280 | |
2281 | /* check to see if a clock with this name is already registered */ | |
d6968fca | 2282 | if (clk_core_lookup(core->name)) { |
d1302a36 | 2283 | pr_debug("%s: clk %s already initialized\n", |
d6968fca | 2284 | __func__, core->name); |
d1302a36 | 2285 | ret = -EEXIST; |
b2476490 | 2286 | goto out; |
d1302a36 | 2287 | } |
b2476490 | 2288 | |
d4d7e3dd | 2289 | /* check that clk_ops are sane. See Documentation/clk.txt */ |
d6968fca SB |
2290 | if (core->ops->set_rate && |
2291 | !((core->ops->round_rate || core->ops->determine_rate) && | |
2292 | core->ops->recalc_rate)) { | |
71472c0c | 2293 | pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", |
d6968fca | 2294 | __func__, core->name); |
d1302a36 | 2295 | ret = -EINVAL; |
d4d7e3dd MT |
2296 | goto out; |
2297 | } | |
2298 | ||
d6968fca | 2299 | if (core->ops->set_parent && !core->ops->get_parent) { |
d4d7e3dd | 2300 | pr_warning("%s: %s must implement .get_parent & .set_parent\n", |
d6968fca | 2301 | __func__, core->name); |
d1302a36 | 2302 | ret = -EINVAL; |
d4d7e3dd MT |
2303 | goto out; |
2304 | } | |
2305 | ||
d6968fca SB |
2306 | if (core->ops->set_rate_and_parent && |
2307 | !(core->ops->set_parent && core->ops->set_rate)) { | |
3fa2252b | 2308 | pr_warn("%s: %s must implement .set_parent & .set_rate\n", |
d6968fca | 2309 | __func__, core->name); |
3fa2252b SB |
2310 | ret = -EINVAL; |
2311 | goto out; | |
2312 | } | |
2313 | ||
b2476490 | 2314 | /* throw a WARN if any entries in parent_names are NULL */ |
d6968fca SB |
2315 | for (i = 0; i < core->num_parents; i++) |
2316 | WARN(!core->parent_names[i], | |
b2476490 | 2317 | "%s: invalid NULL in %s's .parent_names\n", |
d6968fca | 2318 | __func__, core->name); |
b2476490 MT |
2319 | |
2320 | /* | |
2321 | * Allocate an array of struct clk *'s to avoid unnecessary string | |
2322 | * look-ups of clk's possible parents. This can fail for clocks passed | |
d6968fca | 2323 | * in to clk_init during early boot; thus any access to core->parents[] |
b2476490 MT |
2324 | * must always check for a NULL pointer and try to populate it if |
2325 | * necessary. | |
2326 | * | |
d6968fca SB |
2327 | * If core->parents is not NULL we skip this entire block. This allows |
2328 | * for clock drivers to statically initialize core->parents. | |
b2476490 | 2329 | */ |
d6968fca SB |
2330 | if (core->num_parents > 1 && !core->parents) { |
2331 | core->parents = kcalloc(core->num_parents, sizeof(struct clk *), | |
96a7ed90 | 2332 | GFP_KERNEL); |
b2476490 | 2333 | /* |
035a61c3 | 2334 | * clk_core_lookup returns NULL for parents that have not been |
b2476490 MT |
2335 | * clk_init'd; thus any access to clk->parents[] must check |
2336 | * for a NULL pointer. We can always perform lazy lookups for | |
2337 | * missing parents later on. | |
2338 | */ | |
d6968fca SB |
2339 | if (core->parents) |
2340 | for (i = 0; i < core->num_parents; i++) | |
2341 | core->parents[i] = | |
2342 | clk_core_lookup(core->parent_names[i]); | |
b2476490 MT |
2343 | } |
2344 | ||
d6968fca | 2345 | core->parent = __clk_init_parent(core); |
b2476490 MT |
2346 | |
2347 | /* | |
d6968fca | 2348 | * Populate core->parent if parent has already been __clk_init'd. If |
b2476490 MT |
2349 | * parent has not yet been __clk_init'd then place clk in the orphan |
2350 | * list. If clk has set the CLK_IS_ROOT flag then place it in the root | |
2351 | * clk list. | |
2352 | * | |
2353 | * Every time a new clk is clk_init'd then we walk the list of orphan | |
2354 | * clocks and re-parent any that are children of the clock currently | |
2355 | * being clk_init'd. | |
2356 | */ | |
d6968fca SB |
2357 | if (core->parent) |
2358 | hlist_add_head(&core->child_node, | |
2359 | &core->parent->children); | |
2360 | else if (core->flags & CLK_IS_ROOT) | |
2361 | hlist_add_head(&core->child_node, &clk_root_list); | |
b2476490 | 2362 | else |
d6968fca | 2363 | hlist_add_head(&core->child_node, &clk_orphan_list); |
b2476490 | 2364 | |
5279fc40 BB |
2365 | /* |
2366 | * Set clk's accuracy. The preferred method is to use | |
2367 | * .recalc_accuracy. For simple clocks and lazy developers the default | |
2368 | * fallback is to use the parent's accuracy. If a clock doesn't have a | |
2369 | * parent (or is orphaned) then accuracy is set to zero (perfect | |
2370 | * clock). | |
2371 | */ | |
d6968fca SB |
2372 | if (core->ops->recalc_accuracy) |
2373 | core->accuracy = core->ops->recalc_accuracy(core->hw, | |
2374 | __clk_get_accuracy(core->parent)); | |
2375 | else if (core->parent) | |
2376 | core->accuracy = core->parent->accuracy; | |
5279fc40 | 2377 | else |
d6968fca | 2378 | core->accuracy = 0; |
5279fc40 | 2379 | |
9824cf73 MR |
2380 | /* |
2381 | * Set clk's phase. | |
2382 | * Since a phase is by definition relative to its parent, just | |
2383 | * query the current clock phase, or just assume it's in phase. | |
2384 | */ | |
d6968fca SB |
2385 | if (core->ops->get_phase) |
2386 | core->phase = core->ops->get_phase(core->hw); | |
9824cf73 | 2387 | else |
d6968fca | 2388 | core->phase = 0; |
9824cf73 | 2389 | |
b2476490 MT |
2390 | /* |
2391 | * Set clk's rate. The preferred method is to use .recalc_rate. For | |
2392 | * simple clocks and lazy developers the default fallback is to use the | |
2393 | * parent's rate. If a clock doesn't have a parent (or is orphaned) | |
2394 | * then rate is set to zero. | |
2395 | */ | |
d6968fca SB |
2396 | if (core->ops->recalc_rate) |
2397 | rate = core->ops->recalc_rate(core->hw, | |
2398 | clk_core_get_rate_nolock(core->parent)); | |
2399 | else if (core->parent) | |
2400 | rate = core->parent->rate; | |
b2476490 | 2401 | else |
1c8e6004 | 2402 | rate = 0; |
d6968fca | 2403 | core->rate = core->req_rate = rate; |
b2476490 MT |
2404 | |
2405 | /* | |
2406 | * walk the list of orphan clocks and reparent any that are children of | |
2407 | * this clock | |
2408 | */ | |
b67bfe0d | 2409 | hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { |
12d29886 | 2410 | if (orphan->num_parents && orphan->ops->get_parent) { |
1f61e5f1 | 2411 | i = orphan->ops->get_parent(orphan->hw); |
d6968fca SB |
2412 | if (!strcmp(core->name, orphan->parent_names[i])) |
2413 | clk_core_reparent(orphan, core); | |
1f61e5f1 MF |
2414 | continue; |
2415 | } | |
2416 | ||
b2476490 | 2417 | for (i = 0; i < orphan->num_parents; i++) |
d6968fca SB |
2418 | if (!strcmp(core->name, orphan->parent_names[i])) { |
2419 | clk_core_reparent(orphan, core); | |
b2476490 MT |
2420 | break; |
2421 | } | |
1f61e5f1 | 2422 | } |
b2476490 MT |
2423 | |
2424 | /* | |
2425 | * optional platform-specific magic | |
2426 | * | |
2427 | * The .init callback is not used by any of the basic clock types, but | |
2428 | * exists for weird hardware that must perform initialization magic. | |
2429 | * Please consider other ways of solving initialization problems before | |
24ee1a08 | 2430 | * using this callback, as its use is discouraged. |
b2476490 | 2431 | */ |
d6968fca SB |
2432 | if (core->ops->init) |
2433 | core->ops->init(core->hw); | |
b2476490 | 2434 | |
d6968fca | 2435 | kref_init(&core->ref); |
b2476490 | 2436 | out: |
eab89f69 | 2437 | clk_prepare_unlock(); |
b2476490 | 2438 | |
89f7e9de | 2439 | if (!ret) |
d6968fca | 2440 | clk_debug_register(core); |
89f7e9de | 2441 | |
d1302a36 | 2442 | return ret; |
b2476490 MT |
2443 | } |
2444 | ||
035a61c3 TV |
2445 | struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, |
2446 | const char *con_id) | |
0197b3ea | 2447 | { |
0197b3ea SK |
2448 | struct clk *clk; |
2449 | ||
035a61c3 TV |
2450 | /* This is to allow this function to be chained to others */ |
2451 | if (!hw || IS_ERR(hw)) | |
2452 | return (struct clk *) hw; | |
0197b3ea | 2453 | |
035a61c3 TV |
2454 | clk = kzalloc(sizeof(*clk), GFP_KERNEL); |
2455 | if (!clk) | |
2456 | return ERR_PTR(-ENOMEM); | |
2457 | ||
2458 | clk->core = hw->core; | |
2459 | clk->dev_id = dev_id; | |
2460 | clk->con_id = con_id; | |
1c8e6004 TV |
2461 | clk->max_rate = ULONG_MAX; |
2462 | ||
2463 | clk_prepare_lock(); | |
50595f8b | 2464 | hlist_add_head(&clk->clks_node, &hw->core->clks); |
1c8e6004 | 2465 | clk_prepare_unlock(); |
0197b3ea SK |
2466 | |
2467 | return clk; | |
2468 | } | |
035a61c3 | 2469 | |
73e0e496 | 2470 | void __clk_free_clk(struct clk *clk) |
1c8e6004 TV |
2471 | { |
2472 | clk_prepare_lock(); | |
50595f8b | 2473 | hlist_del(&clk->clks_node); |
1c8e6004 TV |
2474 | clk_prepare_unlock(); |
2475 | ||
2476 | kfree(clk); | |
2477 | } | |
0197b3ea | 2478 | |
293ba3b4 SB |
2479 | /** |
2480 | * clk_register - allocate a new clock, register it and return an opaque cookie | |
2481 | * @dev: device that is registering this clock | |
2482 | * @hw: link to hardware-specific clock data | |
2483 | * | |
2484 | * clk_register is the primary interface for populating the clock tree with new | |
2485 | * clock nodes. It returns a pointer to the newly allocated struct clk which | |
a59a5163 | 2486 | * cannot be dereferenced by driver code but may be used in conjunction with the |
293ba3b4 SB |
2487 | * rest of the clock API. In the event of an error clk_register will return an |
2488 | * error code; drivers must test for an error code after calling clk_register. | |
2489 | */ | |
2490 | struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
b2476490 | 2491 | { |
d1302a36 | 2492 | int i, ret; |
d6968fca | 2493 | struct clk_core *core; |
293ba3b4 | 2494 | |
d6968fca SB |
2495 | core = kzalloc(sizeof(*core), GFP_KERNEL); |
2496 | if (!core) { | |
293ba3b4 SB |
2497 | ret = -ENOMEM; |
2498 | goto fail_out; | |
2499 | } | |
b2476490 | 2500 | |
d6968fca SB |
2501 | core->name = kstrdup_const(hw->init->name, GFP_KERNEL); |
2502 | if (!core->name) { | |
0197b3ea SK |
2503 | ret = -ENOMEM; |
2504 | goto fail_name; | |
2505 | } | |
d6968fca | 2506 | core->ops = hw->init->ops; |
ac2df527 | 2507 | if (dev && dev->driver) |
d6968fca SB |
2508 | core->owner = dev->driver->owner; |
2509 | core->hw = hw; | |
2510 | core->flags = hw->init->flags; | |
2511 | core->num_parents = hw->init->num_parents; | |
9783c0d9 SB |
2512 | core->min_rate = 0; |
2513 | core->max_rate = ULONG_MAX; | |
d6968fca | 2514 | hw->core = core; |
b2476490 | 2515 | |
d1302a36 | 2516 | /* allocate local copy in case parent_names is __initdata */ |
d6968fca | 2517 | core->parent_names = kcalloc(core->num_parents, sizeof(char *), |
96a7ed90 | 2518 | GFP_KERNEL); |
d1302a36 | 2519 | |
d6968fca | 2520 | if (!core->parent_names) { |
d1302a36 MT |
2521 | ret = -ENOMEM; |
2522 | goto fail_parent_names; | |
2523 | } | |
2524 | ||
2525 | ||
2526 | /* copy each string name in case parent_names is __initdata */ | |
d6968fca SB |
2527 | for (i = 0; i < core->num_parents; i++) { |
2528 | core->parent_names[i] = kstrdup_const(hw->init->parent_names[i], | |
0197b3ea | 2529 | GFP_KERNEL); |
d6968fca | 2530 | if (!core->parent_names[i]) { |
d1302a36 MT |
2531 | ret = -ENOMEM; |
2532 | goto fail_parent_names_copy; | |
2533 | } | |
2534 | } | |
2535 | ||
d6968fca | 2536 | INIT_HLIST_HEAD(&core->clks); |
1c8e6004 | 2537 | |
035a61c3 TV |
2538 | hw->clk = __clk_create_clk(hw, NULL, NULL); |
2539 | if (IS_ERR(hw->clk)) { | |
035a61c3 TV |
2540 | ret = PTR_ERR(hw->clk); |
2541 | goto fail_parent_names_copy; | |
2542 | } | |
2543 | ||
2544 | ret = __clk_init(dev, hw->clk); | |
d1302a36 | 2545 | if (!ret) |
035a61c3 | 2546 | return hw->clk; |
b2476490 | 2547 | |
1c8e6004 | 2548 | __clk_free_clk(hw->clk); |
035a61c3 | 2549 | hw->clk = NULL; |
b2476490 | 2550 | |
d1302a36 MT |
2551 | fail_parent_names_copy: |
2552 | while (--i >= 0) | |
d6968fca SB |
2553 | kfree_const(core->parent_names[i]); |
2554 | kfree(core->parent_names); | |
d1302a36 | 2555 | fail_parent_names: |
d6968fca | 2556 | kfree_const(core->name); |
0197b3ea | 2557 | fail_name: |
d6968fca | 2558 | kfree(core); |
d1302a36 MT |
2559 | fail_out: |
2560 | return ERR_PTR(ret); | |
b2476490 MT |
2561 | } |
2562 | EXPORT_SYMBOL_GPL(clk_register); | |
2563 | ||
6e5ab41b | 2564 | /* Free memory allocated for a clock. */ |
fcb0ee6a SN |
2565 | static void __clk_release(struct kref *ref) |
2566 | { | |
d6968fca SB |
2567 | struct clk_core *core = container_of(ref, struct clk_core, ref); |
2568 | int i = core->num_parents; | |
fcb0ee6a | 2569 | |
496eadf8 KK |
2570 | lockdep_assert_held(&prepare_lock); |
2571 | ||
d6968fca | 2572 | kfree(core->parents); |
fcb0ee6a | 2573 | while (--i >= 0) |
d6968fca | 2574 | kfree_const(core->parent_names[i]); |
fcb0ee6a | 2575 | |
d6968fca SB |
2576 | kfree(core->parent_names); |
2577 | kfree_const(core->name); | |
2578 | kfree(core); | |
fcb0ee6a SN |
2579 | } |
2580 | ||
2581 | /* | |
2582 | * Empty clk_ops for unregistered clocks. These are used temporarily | |
2583 | * after clk_unregister() was called on a clock and until last clock | |
2584 | * consumer calls clk_put() and the struct clk object is freed. | |
2585 | */ | |
2586 | static int clk_nodrv_prepare_enable(struct clk_hw *hw) | |
2587 | { | |
2588 | return -ENXIO; | |
2589 | } | |
2590 | ||
2591 | static void clk_nodrv_disable_unprepare(struct clk_hw *hw) | |
2592 | { | |
2593 | WARN_ON_ONCE(1); | |
2594 | } | |
2595 | ||
2596 | static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, | |
2597 | unsigned long parent_rate) | |
2598 | { | |
2599 | return -ENXIO; | |
2600 | } | |
2601 | ||
2602 | static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) | |
2603 | { | |
2604 | return -ENXIO; | |
2605 | } | |
2606 | ||
2607 | static const struct clk_ops clk_nodrv_ops = { | |
2608 | .enable = clk_nodrv_prepare_enable, | |
2609 | .disable = clk_nodrv_disable_unprepare, | |
2610 | .prepare = clk_nodrv_prepare_enable, | |
2611 | .unprepare = clk_nodrv_disable_unprepare, | |
2612 | .set_rate = clk_nodrv_set_rate, | |
2613 | .set_parent = clk_nodrv_set_parent, | |
2614 | }; | |
2615 | ||
1df5c939 MB |
2616 | /** |
2617 | * clk_unregister - unregister a currently registered clock | |
2618 | * @clk: clock to unregister | |
1df5c939 | 2619 | */ |
fcb0ee6a SN |
2620 | void clk_unregister(struct clk *clk) |
2621 | { | |
2622 | unsigned long flags; | |
2623 | ||
6314b679 SB |
2624 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
2625 | return; | |
2626 | ||
035a61c3 | 2627 | clk_debug_unregister(clk->core); |
fcb0ee6a SN |
2628 | |
2629 | clk_prepare_lock(); | |
2630 | ||
035a61c3 TV |
2631 | if (clk->core->ops == &clk_nodrv_ops) { |
2632 | pr_err("%s: unregistered clock: %s\n", __func__, | |
2633 | clk->core->name); | |
6314b679 | 2634 | return; |
fcb0ee6a SN |
2635 | } |
2636 | /* | |
2637 | * Assign empty clock ops for consumers that might still hold | |
2638 | * a reference to this clock. | |
2639 | */ | |
2640 | flags = clk_enable_lock(); | |
035a61c3 | 2641 | clk->core->ops = &clk_nodrv_ops; |
fcb0ee6a SN |
2642 | clk_enable_unlock(flags); |
2643 | ||
035a61c3 TV |
2644 | if (!hlist_empty(&clk->core->children)) { |
2645 | struct clk_core *child; | |
874f224c | 2646 | struct hlist_node *t; |
fcb0ee6a SN |
2647 | |
2648 | /* Reparent all children to the orphan list. */ | |
035a61c3 TV |
2649 | hlist_for_each_entry_safe(child, t, &clk->core->children, |
2650 | child_node) | |
2651 | clk_core_set_parent(child, NULL); | |
fcb0ee6a SN |
2652 | } |
2653 | ||
035a61c3 | 2654 | hlist_del_init(&clk->core->child_node); |
fcb0ee6a | 2655 | |
035a61c3 | 2656 | if (clk->core->prepare_count) |
fcb0ee6a | 2657 | pr_warn("%s: unregistering prepared clock: %s\n", |
035a61c3 TV |
2658 | __func__, clk->core->name); |
2659 | kref_put(&clk->core->ref, __clk_release); | |
6314b679 | 2660 | |
fcb0ee6a SN |
2661 | clk_prepare_unlock(); |
2662 | } | |
1df5c939 MB |
2663 | EXPORT_SYMBOL_GPL(clk_unregister); |
2664 | ||
46c8773a SB |
2665 | static void devm_clk_release(struct device *dev, void *res) |
2666 | { | |
293ba3b4 | 2667 | clk_unregister(*(struct clk **)res); |
46c8773a SB |
2668 | } |
2669 | ||
2670 | /** | |
2671 | * devm_clk_register - resource managed clk_register() | |
2672 | * @dev: device that is registering this clock | |
2673 | * @hw: link to hardware-specific clock data | |
2674 | * | |
2675 | * Managed clk_register(). Clocks returned from this function are | |
2676 | * automatically clk_unregister()ed on driver detach. See clk_register() for | |
2677 | * more information. | |
2678 | */ | |
2679 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) | |
2680 | { | |
2681 | struct clk *clk; | |
293ba3b4 | 2682 | struct clk **clkp; |
46c8773a | 2683 | |
293ba3b4 SB |
2684 | clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); |
2685 | if (!clkp) | |
46c8773a SB |
2686 | return ERR_PTR(-ENOMEM); |
2687 | ||
293ba3b4 SB |
2688 | clk = clk_register(dev, hw); |
2689 | if (!IS_ERR(clk)) { | |
2690 | *clkp = clk; | |
2691 | devres_add(dev, clkp); | |
46c8773a | 2692 | } else { |
293ba3b4 | 2693 | devres_free(clkp); |
46c8773a SB |
2694 | } |
2695 | ||
2696 | return clk; | |
2697 | } | |
2698 | EXPORT_SYMBOL_GPL(devm_clk_register); | |
2699 | ||
2700 | static int devm_clk_match(struct device *dev, void *res, void *data) | |
2701 | { | |
2702 | struct clk *c = res; | |
2703 | if (WARN_ON(!c)) | |
2704 | return 0; | |
2705 | return c == data; | |
2706 | } | |
2707 | ||
2708 | /** | |
2709 | * devm_clk_unregister - resource managed clk_unregister() | |
2710 | * @clk: clock to unregister | |
2711 | * | |
2712 | * Deallocate a clock allocated with devm_clk_register(). Normally | |
2713 | * this function will not need to be called and the resource management | |
2714 | * code will ensure that the resource is freed. | |
2715 | */ | |
2716 | void devm_clk_unregister(struct device *dev, struct clk *clk) | |
2717 | { | |
2718 | WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk)); | |
2719 | } | |
2720 | EXPORT_SYMBOL_GPL(devm_clk_unregister); | |
2721 | ||
ac2df527 SN |
2722 | /* |
2723 | * clkdev helpers | |
2724 | */ | |
2725 | int __clk_get(struct clk *clk) | |
2726 | { | |
035a61c3 TV |
2727 | struct clk_core *core = !clk ? NULL : clk->core; |
2728 | ||
2729 | if (core) { | |
2730 | if (!try_module_get(core->owner)) | |
00efcb1c | 2731 | return 0; |
ac2df527 | 2732 | |
035a61c3 | 2733 | kref_get(&core->ref); |
00efcb1c | 2734 | } |
ac2df527 SN |
2735 | return 1; |
2736 | } | |
2737 | ||
2738 | void __clk_put(struct clk *clk) | |
2739 | { | |
10cdfe54 TV |
2740 | struct module *owner; |
2741 | ||
00efcb1c | 2742 | if (!clk || WARN_ON_ONCE(IS_ERR(clk))) |
ac2df527 SN |
2743 | return; |
2744 | ||
fcb0ee6a | 2745 | clk_prepare_lock(); |
1c8e6004 | 2746 | |
50595f8b | 2747 | hlist_del(&clk->clks_node); |
ec02ace8 TV |
2748 | if (clk->min_rate > clk->core->req_rate || |
2749 | clk->max_rate < clk->core->req_rate) | |
2750 | clk_core_set_rate_nolock(clk->core, clk->core->req_rate); | |
2751 | ||
1c8e6004 TV |
2752 | owner = clk->core->owner; |
2753 | kref_put(&clk->core->ref, __clk_release); | |
2754 | ||
fcb0ee6a SN |
2755 | clk_prepare_unlock(); |
2756 | ||
10cdfe54 | 2757 | module_put(owner); |
035a61c3 | 2758 | |
035a61c3 | 2759 | kfree(clk); |
ac2df527 SN |
2760 | } |
2761 | ||
b2476490 MT |
2762 | /*** clk rate change notifiers ***/ |
2763 | ||
2764 | /** | |
2765 | * clk_notifier_register - add a clk rate change notifier | |
2766 | * @clk: struct clk * to watch | |
2767 | * @nb: struct notifier_block * with callback info | |
2768 | * | |
2769 | * Request notification when clk's rate changes. This uses an SRCU | |
2770 | * notifier because we want it to block and notifier unregistrations are | |
2771 | * uncommon. The callbacks associated with the notifier must not | |
2772 | * re-enter into the clk framework by calling any top-level clk APIs; | |
2773 | * this will cause a nested prepare_lock mutex. | |
2774 | * | |
5324fda7 SB |
2775 | * In all notification cases cases (pre, post and abort rate change) the |
2776 | * original clock rate is passed to the callback via struct | |
2777 | * clk_notifier_data.old_rate and the new frequency is passed via struct | |
b2476490 MT |
2778 | * clk_notifier_data.new_rate. |
2779 | * | |
b2476490 MT |
2780 | * clk_notifier_register() must be called from non-atomic context. |
2781 | * Returns -EINVAL if called with null arguments, -ENOMEM upon | |
2782 | * allocation failure; otherwise, passes along the return value of | |
2783 | * srcu_notifier_chain_register(). | |
2784 | */ | |
2785 | int clk_notifier_register(struct clk *clk, struct notifier_block *nb) | |
2786 | { | |
2787 | struct clk_notifier *cn; | |
2788 | int ret = -ENOMEM; | |
2789 | ||
2790 | if (!clk || !nb) | |
2791 | return -EINVAL; | |
2792 | ||
eab89f69 | 2793 | clk_prepare_lock(); |
b2476490 MT |
2794 | |
2795 | /* search the list of notifiers for this clk */ | |
2796 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2797 | if (cn->clk == clk) | |
2798 | break; | |
2799 | ||
2800 | /* if clk wasn't in the notifier list, allocate new clk_notifier */ | |
2801 | if (cn->clk != clk) { | |
2802 | cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL); | |
2803 | if (!cn) | |
2804 | goto out; | |
2805 | ||
2806 | cn->clk = clk; | |
2807 | srcu_init_notifier_head(&cn->notifier_head); | |
2808 | ||
2809 | list_add(&cn->node, &clk_notifier_list); | |
2810 | } | |
2811 | ||
2812 | ret = srcu_notifier_chain_register(&cn->notifier_head, nb); | |
2813 | ||
035a61c3 | 2814 | clk->core->notifier_count++; |
b2476490 MT |
2815 | |
2816 | out: | |
eab89f69 | 2817 | clk_prepare_unlock(); |
b2476490 MT |
2818 | |
2819 | return ret; | |
2820 | } | |
2821 | EXPORT_SYMBOL_GPL(clk_notifier_register); | |
2822 | ||
2823 | /** | |
2824 | * clk_notifier_unregister - remove a clk rate change notifier | |
2825 | * @clk: struct clk * | |
2826 | * @nb: struct notifier_block * with callback info | |
2827 | * | |
2828 | * Request no further notification for changes to 'clk' and frees memory | |
2829 | * allocated in clk_notifier_register. | |
2830 | * | |
2831 | * Returns -EINVAL if called with null arguments; otherwise, passes | |
2832 | * along the return value of srcu_notifier_chain_unregister(). | |
2833 | */ | |
2834 | int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) | |
2835 | { | |
2836 | struct clk_notifier *cn = NULL; | |
2837 | int ret = -EINVAL; | |
2838 | ||
2839 | if (!clk || !nb) | |
2840 | return -EINVAL; | |
2841 | ||
eab89f69 | 2842 | clk_prepare_lock(); |
b2476490 MT |
2843 | |
2844 | list_for_each_entry(cn, &clk_notifier_list, node) | |
2845 | if (cn->clk == clk) | |
2846 | break; | |
2847 | ||
2848 | if (cn->clk == clk) { | |
2849 | ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); | |
2850 | ||
035a61c3 | 2851 | clk->core->notifier_count--; |
b2476490 MT |
2852 | |
2853 | /* XXX the notifier code should handle this better */ | |
2854 | if (!cn->notifier_head.head) { | |
2855 | srcu_cleanup_notifier_head(&cn->notifier_head); | |
72b5322f | 2856 | list_del(&cn->node); |
b2476490 MT |
2857 | kfree(cn); |
2858 | } | |
2859 | ||
2860 | } else { | |
2861 | ret = -ENOENT; | |
2862 | } | |
2863 | ||
eab89f69 | 2864 | clk_prepare_unlock(); |
b2476490 MT |
2865 | |
2866 | return ret; | |
2867 | } | |
2868 | EXPORT_SYMBOL_GPL(clk_notifier_unregister); | |
766e6a4e GL |
2869 | |
2870 | #ifdef CONFIG_OF | |
2871 | /** | |
2872 | * struct of_clk_provider - Clock provider registration structure | |
2873 | * @link: Entry in global list of clock providers | |
2874 | * @node: Pointer to device tree node of clock provider | |
2875 | * @get: Get clock callback. Returns NULL or a struct clk for the | |
2876 | * given clock specifier | |
2877 | * @data: context pointer to be passed into @get callback | |
2878 | */ | |
2879 | struct of_clk_provider { | |
2880 | struct list_head link; | |
2881 | ||
2882 | struct device_node *node; | |
2883 | struct clk *(*get)(struct of_phandle_args *clkspec, void *data); | |
2884 | void *data; | |
2885 | }; | |
2886 | ||
f2f6c255 PG |
2887 | static const struct of_device_id __clk_of_table_sentinel |
2888 | __used __section(__clk_of_table_end); | |
2889 | ||
766e6a4e | 2890 | static LIST_HEAD(of_clk_providers); |
d6782c26 SN |
2891 | static DEFINE_MUTEX(of_clk_mutex); |
2892 | ||
766e6a4e GL |
2893 | struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, |
2894 | void *data) | |
2895 | { | |
2896 | return data; | |
2897 | } | |
2898 | EXPORT_SYMBOL_GPL(of_clk_src_simple_get); | |
2899 | ||
494bfec9 SG |
2900 | struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) |
2901 | { | |
2902 | struct clk_onecell_data *clk_data = data; | |
2903 | unsigned int idx = clkspec->args[0]; | |
2904 | ||
2905 | if (idx >= clk_data->clk_num) { | |
2906 | pr_err("%s: invalid clock index %d\n", __func__, idx); | |
2907 | return ERR_PTR(-EINVAL); | |
2908 | } | |
2909 | ||
2910 | return clk_data->clks[idx]; | |
2911 | } | |
2912 | EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); | |
2913 | ||
766e6a4e GL |
2914 | /** |
2915 | * of_clk_add_provider() - Register a clock provider for a node | |
2916 | * @np: Device node pointer associated with clock provider | |
2917 | * @clk_src_get: callback for decoding clock | |
2918 | * @data: context pointer for @clk_src_get callback. | |
2919 | */ | |
2920 | int of_clk_add_provider(struct device_node *np, | |
2921 | struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, | |
2922 | void *data), | |
2923 | void *data) | |
2924 | { | |
2925 | struct of_clk_provider *cp; | |
86be408b | 2926 | int ret; |
766e6a4e GL |
2927 | |
2928 | cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL); | |
2929 | if (!cp) | |
2930 | return -ENOMEM; | |
2931 | ||
2932 | cp->node = of_node_get(np); | |
2933 | cp->data = data; | |
2934 | cp->get = clk_src_get; | |
2935 | ||
d6782c26 | 2936 | mutex_lock(&of_clk_mutex); |
766e6a4e | 2937 | list_add(&cp->link, &of_clk_providers); |
d6782c26 | 2938 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2939 | pr_debug("Added clock from %s\n", np->full_name); |
2940 | ||
86be408b SN |
2941 | ret = of_clk_set_defaults(np, true); |
2942 | if (ret < 0) | |
2943 | of_clk_del_provider(np); | |
2944 | ||
2945 | return ret; | |
766e6a4e GL |
2946 | } |
2947 | EXPORT_SYMBOL_GPL(of_clk_add_provider); | |
2948 | ||
2949 | /** | |
2950 | * of_clk_del_provider() - Remove a previously registered clock provider | |
2951 | * @np: Device node pointer associated with clock provider | |
2952 | */ | |
2953 | void of_clk_del_provider(struct device_node *np) | |
2954 | { | |
2955 | struct of_clk_provider *cp; | |
2956 | ||
d6782c26 | 2957 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2958 | list_for_each_entry(cp, &of_clk_providers, link) { |
2959 | if (cp->node == np) { | |
2960 | list_del(&cp->link); | |
2961 | of_node_put(cp->node); | |
2962 | kfree(cp); | |
2963 | break; | |
2964 | } | |
2965 | } | |
d6782c26 | 2966 | mutex_unlock(&of_clk_mutex); |
766e6a4e GL |
2967 | } |
2968 | EXPORT_SYMBOL_GPL(of_clk_del_provider); | |
2969 | ||
73e0e496 SB |
2970 | struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec, |
2971 | const char *dev_id, const char *con_id) | |
766e6a4e GL |
2972 | { |
2973 | struct of_clk_provider *provider; | |
a34cd466 | 2974 | struct clk *clk = ERR_PTR(-EPROBE_DEFER); |
766e6a4e | 2975 | |
306c342f SB |
2976 | if (!clkspec) |
2977 | return ERR_PTR(-EINVAL); | |
2978 | ||
766e6a4e | 2979 | /* Check if we have such a provider in our array */ |
306c342f | 2980 | mutex_lock(&of_clk_mutex); |
766e6a4e GL |
2981 | list_for_each_entry(provider, &of_clk_providers, link) { |
2982 | if (provider->node == clkspec->np) | |
2983 | clk = provider->get(clkspec, provider->data); | |
73e0e496 SB |
2984 | if (!IS_ERR(clk)) { |
2985 | clk = __clk_create_clk(__clk_get_hw(clk), dev_id, | |
2986 | con_id); | |
2987 | ||
2988 | if (!IS_ERR(clk) && !__clk_get(clk)) { | |
2989 | __clk_free_clk(clk); | |
2990 | clk = ERR_PTR(-ENOENT); | |
2991 | } | |
2992 | ||
766e6a4e | 2993 | break; |
73e0e496 | 2994 | } |
766e6a4e | 2995 | } |
306c342f | 2996 | mutex_unlock(&of_clk_mutex); |
d6782c26 SN |
2997 | |
2998 | return clk; | |
2999 | } | |
3000 | ||
306c342f SB |
3001 | /** |
3002 | * of_clk_get_from_provider() - Lookup a clock from a clock provider | |
3003 | * @clkspec: pointer to a clock specifier data structure | |
3004 | * | |
3005 | * This function looks up a struct clk from the registered list of clock | |
3006 | * providers, an input is a clock specifier data structure as returned | |
3007 | * from the of_parse_phandle_with_args() function call. | |
3008 | */ | |
d6782c26 SN |
3009 | struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) |
3010 | { | |
306c342f | 3011 | return __of_clk_get_from_provider(clkspec, NULL, __func__); |
766e6a4e GL |
3012 | } |
3013 | ||
f6102742 MT |
3014 | int of_clk_get_parent_count(struct device_node *np) |
3015 | { | |
3016 | return of_count_phandle_with_args(np, "clocks", "#clock-cells"); | |
3017 | } | |
3018 | EXPORT_SYMBOL_GPL(of_clk_get_parent_count); | |
3019 | ||
766e6a4e GL |
3020 | const char *of_clk_get_parent_name(struct device_node *np, int index) |
3021 | { | |
3022 | struct of_phandle_args clkspec; | |
7a0fc1a3 | 3023 | struct property *prop; |
766e6a4e | 3024 | const char *clk_name; |
7a0fc1a3 BD |
3025 | const __be32 *vp; |
3026 | u32 pv; | |
766e6a4e | 3027 | int rc; |
7a0fc1a3 | 3028 | int count; |
766e6a4e GL |
3029 | |
3030 | if (index < 0) | |
3031 | return NULL; | |
3032 | ||
3033 | rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, | |
3034 | &clkspec); | |
3035 | if (rc) | |
3036 | return NULL; | |
3037 | ||
7a0fc1a3 BD |
3038 | index = clkspec.args_count ? clkspec.args[0] : 0; |
3039 | count = 0; | |
3040 | ||
3041 | /* if there is an indices property, use it to transfer the index | |
3042 | * specified into an array offset for the clock-output-names property. | |
3043 | */ | |
3044 | of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { | |
3045 | if (index == pv) { | |
3046 | index = count; | |
3047 | break; | |
3048 | } | |
3049 | count++; | |
3050 | } | |
3051 | ||
766e6a4e | 3052 | if (of_property_read_string_index(clkspec.np, "clock-output-names", |
7a0fc1a3 | 3053 | index, |
766e6a4e GL |
3054 | &clk_name) < 0) |
3055 | clk_name = clkspec.np->name; | |
3056 | ||
3057 | of_node_put(clkspec.np); | |
3058 | return clk_name; | |
3059 | } | |
3060 | EXPORT_SYMBOL_GPL(of_clk_get_parent_name); | |
3061 | ||
2e61dfb3 DN |
3062 | /** |
3063 | * of_clk_parent_fill() - Fill @parents with names of @np's parents and return | |
3064 | * number of parents | |
3065 | * @np: Device node pointer associated with clock provider | |
3066 | * @parents: pointer to char array that hold the parents' names | |
3067 | * @size: size of the @parents array | |
3068 | * | |
3069 | * Return: number of parents for the clock node. | |
3070 | */ | |
3071 | int of_clk_parent_fill(struct device_node *np, const char **parents, | |
3072 | unsigned int size) | |
3073 | { | |
3074 | unsigned int i = 0; | |
3075 | ||
3076 | while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) | |
3077 | i++; | |
3078 | ||
3079 | return i; | |
3080 | } | |
3081 | EXPORT_SYMBOL_GPL(of_clk_parent_fill); | |
3082 | ||
1771b10d GC |
3083 | struct clock_provider { |
3084 | of_clk_init_cb_t clk_init_cb; | |
3085 | struct device_node *np; | |
3086 | struct list_head node; | |
3087 | }; | |
3088 | ||
1771b10d GC |
3089 | /* |
3090 | * This function looks for a parent clock. If there is one, then it | |
3091 | * checks that the provider for this parent clock was initialized, in | |
3092 | * this case the parent clock will be ready. | |
3093 | */ | |
3094 | static int parent_ready(struct device_node *np) | |
3095 | { | |
3096 | int i = 0; | |
3097 | ||
3098 | while (true) { | |
3099 | struct clk *clk = of_clk_get(np, i); | |
3100 | ||
3101 | /* this parent is ready we can check the next one */ | |
3102 | if (!IS_ERR(clk)) { | |
3103 | clk_put(clk); | |
3104 | i++; | |
3105 | continue; | |
3106 | } | |
3107 | ||
3108 | /* at least one parent is not ready, we exit now */ | |
3109 | if (PTR_ERR(clk) == -EPROBE_DEFER) | |
3110 | return 0; | |
3111 | ||
3112 | /* | |
3113 | * Here we make assumption that the device tree is | |
3114 | * written correctly. So an error means that there is | |
3115 | * no more parent. As we didn't exit yet, then the | |
3116 | * previous parent are ready. If there is no clock | |
3117 | * parent, no need to wait for them, then we can | |
3118 | * consider their absence as being ready | |
3119 | */ | |
3120 | return 1; | |
3121 | } | |
3122 | } | |
3123 | ||
766e6a4e GL |
3124 | /** |
3125 | * of_clk_init() - Scan and init clock providers from the DT | |
3126 | * @matches: array of compatible values and init functions for providers. | |
3127 | * | |
1771b10d | 3128 | * This function scans the device tree for matching clock providers |
e5ca8fb4 | 3129 | * and calls their initialization functions. It also does it by trying |
1771b10d | 3130 | * to follow the dependencies. |
766e6a4e GL |
3131 | */ |
3132 | void __init of_clk_init(const struct of_device_id *matches) | |
3133 | { | |
7f7ed584 | 3134 | const struct of_device_id *match; |
766e6a4e | 3135 | struct device_node *np; |
1771b10d GC |
3136 | struct clock_provider *clk_provider, *next; |
3137 | bool is_init_done; | |
3138 | bool force = false; | |
2573a02a | 3139 | LIST_HEAD(clk_provider_list); |
766e6a4e | 3140 | |
f2f6c255 | 3141 | if (!matches) |
819b4861 | 3142 | matches = &__clk_of_table; |
f2f6c255 | 3143 | |
1771b10d | 3144 | /* First prepare the list of the clocks providers */ |
7f7ed584 | 3145 | for_each_matching_node_and_match(np, matches, &match) { |
2e3b19f1 SB |
3146 | struct clock_provider *parent; |
3147 | ||
3148 | parent = kzalloc(sizeof(*parent), GFP_KERNEL); | |
3149 | if (!parent) { | |
3150 | list_for_each_entry_safe(clk_provider, next, | |
3151 | &clk_provider_list, node) { | |
3152 | list_del(&clk_provider->node); | |
3153 | kfree(clk_provider); | |
3154 | } | |
3155 | return; | |
3156 | } | |
1771b10d GC |
3157 | |
3158 | parent->clk_init_cb = match->data; | |
3159 | parent->np = np; | |
3f6d439f | 3160 | list_add_tail(&parent->node, &clk_provider_list); |
1771b10d GC |
3161 | } |
3162 | ||
3163 | while (!list_empty(&clk_provider_list)) { | |
3164 | is_init_done = false; | |
3165 | list_for_each_entry_safe(clk_provider, next, | |
3166 | &clk_provider_list, node) { | |
3167 | if (force || parent_ready(clk_provider->np)) { | |
86be408b | 3168 | |
1771b10d | 3169 | clk_provider->clk_init_cb(clk_provider->np); |
86be408b SN |
3170 | of_clk_set_defaults(clk_provider->np, true); |
3171 | ||
1771b10d GC |
3172 | list_del(&clk_provider->node); |
3173 | kfree(clk_provider); | |
3174 | is_init_done = true; | |
3175 | } | |
3176 | } | |
3177 | ||
3178 | /* | |
e5ca8fb4 | 3179 | * We didn't manage to initialize any of the |
1771b10d GC |
3180 | * remaining providers during the last loop, so now we |
3181 | * initialize all the remaining ones unconditionally | |
3182 | * in case the clock parent was not mandatory | |
3183 | */ | |
3184 | if (!is_init_done) | |
3185 | force = true; | |
766e6a4e GL |
3186 | } |
3187 | } | |
3188 | #endif |