clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
[deliverable/linux.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
3c373117 12#include <linux/clk.h>
b09d6d99 13#include <linux/clk-provider.h>
86be408b 14#include <linux/clk/clk-conf.h>
b2476490
MT
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spinlock.h>
18#include <linux/err.h>
19#include <linux/list.h>
20#include <linux/slab.h>
766e6a4e 21#include <linux/of.h>
46c8773a 22#include <linux/device.h>
f2f6c255 23#include <linux/init.h>
533ddeb1 24#include <linux/sched.h>
562ef0b0 25#include <linux/clkdev.h>
b2476490 26
d6782c26
SN
27#include "clk.h"
28
b2476490
MT
29static DEFINE_SPINLOCK(enable_lock);
30static DEFINE_MUTEX(prepare_lock);
31
533ddeb1
MT
32static struct task_struct *prepare_owner;
33static struct task_struct *enable_owner;
34
35static int prepare_refcnt;
36static int enable_refcnt;
37
b2476490
MT
38static HLIST_HEAD(clk_root_list);
39static HLIST_HEAD(clk_orphan_list);
40static LIST_HEAD(clk_notifier_list);
41
b09d6d99
MT
42/*** private data structures ***/
43
44struct clk_core {
45 const char *name;
46 const struct clk_ops *ops;
47 struct clk_hw *hw;
48 struct module *owner;
49 struct clk_core *parent;
50 const char **parent_names;
51 struct clk_core **parents;
52 u8 num_parents;
53 u8 new_parent_index;
54 unsigned long rate;
1c8e6004 55 unsigned long req_rate;
b09d6d99
MT
56 unsigned long new_rate;
57 struct clk_core *new_parent;
58 struct clk_core *new_child;
59 unsigned long flags;
e6500344 60 bool orphan;
b09d6d99
MT
61 unsigned int enable_count;
62 unsigned int prepare_count;
9783c0d9
SB
63 unsigned long min_rate;
64 unsigned long max_rate;
b09d6d99
MT
65 unsigned long accuracy;
66 int phase;
67 struct hlist_head children;
68 struct hlist_node child_node;
1c8e6004 69 struct hlist_head clks;
b09d6d99
MT
70 unsigned int notifier_count;
71#ifdef CONFIG_DEBUG_FS
72 struct dentry *dentry;
8c9a8a8f 73 struct hlist_node debug_node;
b09d6d99
MT
74#endif
75 struct kref ref;
76};
77
dfc202ea
SB
78#define CREATE_TRACE_POINTS
79#include <trace/events/clk.h>
80
b09d6d99
MT
81struct clk {
82 struct clk_core *core;
83 const char *dev_id;
84 const char *con_id;
1c8e6004
TV
85 unsigned long min_rate;
86 unsigned long max_rate;
50595f8b 87 struct hlist_node clks_node;
b09d6d99
MT
88};
89
eab89f69
MT
90/*** locking ***/
91static void clk_prepare_lock(void)
92{
533ddeb1
MT
93 if (!mutex_trylock(&prepare_lock)) {
94 if (prepare_owner == current) {
95 prepare_refcnt++;
96 return;
97 }
98 mutex_lock(&prepare_lock);
99 }
100 WARN_ON_ONCE(prepare_owner != NULL);
101 WARN_ON_ONCE(prepare_refcnt != 0);
102 prepare_owner = current;
103 prepare_refcnt = 1;
eab89f69
MT
104}
105
106static void clk_prepare_unlock(void)
107{
533ddeb1
MT
108 WARN_ON_ONCE(prepare_owner != current);
109 WARN_ON_ONCE(prepare_refcnt == 0);
110
111 if (--prepare_refcnt)
112 return;
113 prepare_owner = NULL;
eab89f69
MT
114 mutex_unlock(&prepare_lock);
115}
116
117static unsigned long clk_enable_lock(void)
a57aa185 118 __acquires(enable_lock)
eab89f69
MT
119{
120 unsigned long flags;
533ddeb1
MT
121
122 if (!spin_trylock_irqsave(&enable_lock, flags)) {
123 if (enable_owner == current) {
124 enable_refcnt++;
a57aa185 125 __acquire(enable_lock);
533ddeb1
MT
126 return flags;
127 }
128 spin_lock_irqsave(&enable_lock, flags);
129 }
130 WARN_ON_ONCE(enable_owner != NULL);
131 WARN_ON_ONCE(enable_refcnt != 0);
132 enable_owner = current;
133 enable_refcnt = 1;
eab89f69
MT
134 return flags;
135}
136
137static void clk_enable_unlock(unsigned long flags)
a57aa185 138 __releases(enable_lock)
eab89f69 139{
533ddeb1
MT
140 WARN_ON_ONCE(enable_owner != current);
141 WARN_ON_ONCE(enable_refcnt == 0);
142
a57aa185
SB
143 if (--enable_refcnt) {
144 __release(enable_lock);
533ddeb1 145 return;
a57aa185 146 }
533ddeb1 147 enable_owner = NULL;
eab89f69
MT
148 spin_unlock_irqrestore(&enable_lock, flags);
149}
150
4dff95dc
SB
151static bool clk_core_is_prepared(struct clk_core *core)
152{
153 /*
154 * .is_prepared is optional for clocks that can prepare
155 * fall back to software usage counter if it is missing
156 */
157 if (!core->ops->is_prepared)
158 return core->prepare_count;
b2476490 159
4dff95dc
SB
160 return core->ops->is_prepared(core->hw);
161}
b2476490 162
4dff95dc
SB
163static bool clk_core_is_enabled(struct clk_core *core)
164{
165 /*
166 * .is_enabled is only mandatory for clocks that gate
167 * fall back to software usage counter if .is_enabled is missing
168 */
169 if (!core->ops->is_enabled)
170 return core->enable_count;
6b44c854 171
4dff95dc
SB
172 return core->ops->is_enabled(core->hw);
173}
6b44c854 174
4dff95dc 175static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 176{
4dff95dc
SB
177 struct clk_core *child;
178
179 lockdep_assert_held(&prepare_lock);
180
181 hlist_for_each_entry(child, &core->children, child_node)
182 clk_unprepare_unused_subtree(child);
183
184 if (core->prepare_count)
1af599df
PG
185 return;
186
4dff95dc
SB
187 if (core->flags & CLK_IGNORE_UNUSED)
188 return;
189
190 if (clk_core_is_prepared(core)) {
191 trace_clk_unprepare(core);
192 if (core->ops->unprepare_unused)
193 core->ops->unprepare_unused(core->hw);
194 else if (core->ops->unprepare)
195 core->ops->unprepare(core->hw);
196 trace_clk_unprepare_complete(core);
197 }
1af599df
PG
198}
199
4dff95dc 200static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 201{
035a61c3 202 struct clk_core *child;
4dff95dc 203 unsigned long flags;
1af599df 204
4dff95dc 205 lockdep_assert_held(&prepare_lock);
1af599df 206
4dff95dc
SB
207 hlist_for_each_entry(child, &core->children, child_node)
208 clk_disable_unused_subtree(child);
1af599df 209
4dff95dc
SB
210 flags = clk_enable_lock();
211
212 if (core->enable_count)
213 goto unlock_out;
214
215 if (core->flags & CLK_IGNORE_UNUSED)
216 goto unlock_out;
217
218 /*
219 * some gate clocks have special needs during the disable-unused
220 * sequence. call .disable_unused if available, otherwise fall
221 * back to .disable
222 */
223 if (clk_core_is_enabled(core)) {
224 trace_clk_disable(core);
225 if (core->ops->disable_unused)
226 core->ops->disable_unused(core->hw);
227 else if (core->ops->disable)
228 core->ops->disable(core->hw);
229 trace_clk_disable_complete(core);
230 }
231
232unlock_out:
233 clk_enable_unlock(flags);
1af599df
PG
234}
235
4dff95dc
SB
236static bool clk_ignore_unused;
237static int __init clk_ignore_unused_setup(char *__unused)
1af599df 238{
4dff95dc
SB
239 clk_ignore_unused = true;
240 return 1;
241}
242__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 243
4dff95dc
SB
244static int clk_disable_unused(void)
245{
246 struct clk_core *core;
247
248 if (clk_ignore_unused) {
249 pr_warn("clk: Not disabling unused clocks\n");
250 return 0;
251 }
1af599df 252
eab89f69 253 clk_prepare_lock();
1af599df 254
4dff95dc
SB
255 hlist_for_each_entry(core, &clk_root_list, child_node)
256 clk_disable_unused_subtree(core);
257
258 hlist_for_each_entry(core, &clk_orphan_list, child_node)
259 clk_disable_unused_subtree(core);
260
261 hlist_for_each_entry(core, &clk_root_list, child_node)
262 clk_unprepare_unused_subtree(core);
263
264 hlist_for_each_entry(core, &clk_orphan_list, child_node)
265 clk_unprepare_unused_subtree(core);
1af599df 266
eab89f69 267 clk_prepare_unlock();
1af599df
PG
268
269 return 0;
270}
4dff95dc 271late_initcall_sync(clk_disable_unused);
1af599df 272
4dff95dc 273/*** helper functions ***/
1af599df 274
4dff95dc 275const char *__clk_get_name(struct clk *clk)
1af599df 276{
4dff95dc 277 return !clk ? NULL : clk->core->name;
1af599df 278}
4dff95dc 279EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 280
e7df6f6e 281const char *clk_hw_get_name(const struct clk_hw *hw)
1a9c069c
SB
282{
283 return hw->core->name;
284}
285EXPORT_SYMBOL_GPL(clk_hw_get_name);
286
4dff95dc
SB
287struct clk_hw *__clk_get_hw(struct clk *clk)
288{
289 return !clk ? NULL : clk->core->hw;
290}
291EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 292
e7df6f6e 293unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
1a9c069c
SB
294{
295 return hw->core->num_parents;
296}
297EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
298
e7df6f6e 299struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
1a9c069c
SB
300{
301 return hw->core->parent ? hw->core->parent->hw : NULL;
302}
303EXPORT_SYMBOL_GPL(clk_hw_get_parent);
304
4dff95dc
SB
305static struct clk_core *__clk_lookup_subtree(const char *name,
306 struct clk_core *core)
bddca894 307{
035a61c3 308 struct clk_core *child;
4dff95dc 309 struct clk_core *ret;
bddca894 310
4dff95dc
SB
311 if (!strcmp(core->name, name))
312 return core;
bddca894 313
4dff95dc
SB
314 hlist_for_each_entry(child, &core->children, child_node) {
315 ret = __clk_lookup_subtree(name, child);
316 if (ret)
317 return ret;
bddca894
PG
318 }
319
4dff95dc 320 return NULL;
bddca894
PG
321}
322
4dff95dc 323static struct clk_core *clk_core_lookup(const char *name)
bddca894 324{
4dff95dc
SB
325 struct clk_core *root_clk;
326 struct clk_core *ret;
bddca894 327
4dff95dc
SB
328 if (!name)
329 return NULL;
bddca894 330
4dff95dc
SB
331 /* search the 'proper' clk tree first */
332 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
333 ret = __clk_lookup_subtree(name, root_clk);
334 if (ret)
335 return ret;
bddca894
PG
336 }
337
4dff95dc
SB
338 /* if not found, then search the orphan tree */
339 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
340 ret = __clk_lookup_subtree(name, root_clk);
341 if (ret)
342 return ret;
343 }
bddca894 344
4dff95dc 345 return NULL;
bddca894
PG
346}
347
4dff95dc
SB
348static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
349 u8 index)
bddca894 350{
4dff95dc
SB
351 if (!core || index >= core->num_parents)
352 return NULL;
353 else if (!core->parents)
354 return clk_core_lookup(core->parent_names[index]);
355 else if (!core->parents[index])
356 return core->parents[index] =
357 clk_core_lookup(core->parent_names[index]);
358 else
359 return core->parents[index];
bddca894
PG
360}
361
e7df6f6e
SB
362struct clk_hw *
363clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
1a9c069c
SB
364{
365 struct clk_core *parent;
366
367 parent = clk_core_get_parent_by_index(hw->core, index);
368
369 return !parent ? NULL : parent->hw;
370}
371EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
372
4dff95dc
SB
373unsigned int __clk_get_enable_count(struct clk *clk)
374{
375 return !clk ? 0 : clk->core->enable_count;
376}
b2476490 377
4dff95dc
SB
378static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
379{
380 unsigned long ret;
b2476490 381
4dff95dc
SB
382 if (!core) {
383 ret = 0;
384 goto out;
385 }
b2476490 386
4dff95dc 387 ret = core->rate;
b2476490 388
4dff95dc
SB
389 if (core->flags & CLK_IS_ROOT)
390 goto out;
c646cbf1 391
4dff95dc
SB
392 if (!core->parent)
393 ret = 0;
b2476490 394
b2476490
MT
395out:
396 return ret;
397}
398
e7df6f6e 399unsigned long clk_hw_get_rate(const struct clk_hw *hw)
1a9c069c
SB
400{
401 return clk_core_get_rate_nolock(hw->core);
402}
403EXPORT_SYMBOL_GPL(clk_hw_get_rate);
404
4dff95dc
SB
405static unsigned long __clk_get_accuracy(struct clk_core *core)
406{
407 if (!core)
408 return 0;
b2476490 409
4dff95dc 410 return core->accuracy;
b2476490
MT
411}
412
4dff95dc 413unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 414{
4dff95dc 415 return !clk ? 0 : clk->core->flags;
fcb0ee6a 416}
4dff95dc 417EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 418
e7df6f6e 419unsigned long clk_hw_get_flags(const struct clk_hw *hw)
1a9c069c
SB
420{
421 return hw->core->flags;
422}
423EXPORT_SYMBOL_GPL(clk_hw_get_flags);
424
e7df6f6e 425bool clk_hw_is_prepared(const struct clk_hw *hw)
1a9c069c
SB
426{
427 return clk_core_is_prepared(hw->core);
428}
429
4dff95dc 430bool __clk_is_enabled(struct clk *clk)
b2476490 431{
4dff95dc
SB
432 if (!clk)
433 return false;
b2476490 434
4dff95dc
SB
435 return clk_core_is_enabled(clk->core);
436}
437EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 438
4dff95dc
SB
439static bool mux_is_better_rate(unsigned long rate, unsigned long now,
440 unsigned long best, unsigned long flags)
441{
442 if (flags & CLK_MUX_ROUND_CLOSEST)
443 return abs(now - rate) < abs(best - rate);
1af599df 444
4dff95dc
SB
445 return now <= rate && now > best;
446}
bddca894 447
0817b62c
BB
448static int
449clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req,
4dff95dc
SB
450 unsigned long flags)
451{
452 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
453 int i, num_parents, ret;
454 unsigned long best = 0;
455 struct clk_rate_request parent_req = *req;
b2476490 456
4dff95dc
SB
457 /* if NO_REPARENT flag set, pass through to current parent */
458 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
459 parent = core->parent;
0817b62c
BB
460 if (core->flags & CLK_SET_RATE_PARENT) {
461 ret = __clk_determine_rate(parent ? parent->hw : NULL,
462 &parent_req);
463 if (ret)
464 return ret;
465
466 best = parent_req.rate;
467 } else if (parent) {
4dff95dc 468 best = clk_core_get_rate_nolock(parent);
0817b62c 469 } else {
4dff95dc 470 best = clk_core_get_rate_nolock(core);
0817b62c
BB
471 }
472
4dff95dc
SB
473 goto out;
474 }
b2476490 475
4dff95dc
SB
476 /* find the parent that can provide the fastest rate <= rate */
477 num_parents = core->num_parents;
478 for (i = 0; i < num_parents; i++) {
479 parent = clk_core_get_parent_by_index(core, i);
480 if (!parent)
481 continue;
0817b62c
BB
482
483 if (core->flags & CLK_SET_RATE_PARENT) {
484 parent_req = *req;
485 ret = __clk_determine_rate(parent->hw, &parent_req);
486 if (ret)
487 continue;
488 } else {
489 parent_req.rate = clk_core_get_rate_nolock(parent);
490 }
491
492 if (mux_is_better_rate(req->rate, parent_req.rate,
493 best, flags)) {
4dff95dc 494 best_parent = parent;
0817b62c 495 best = parent_req.rate;
4dff95dc
SB
496 }
497 }
b2476490 498
57d866e6
BB
499 if (!best_parent)
500 return -EINVAL;
501
4dff95dc
SB
502out:
503 if (best_parent)
0817b62c
BB
504 req->best_parent_hw = best_parent->hw;
505 req->best_parent_rate = best;
506 req->rate = best;
b2476490 507
0817b62c 508 return 0;
b33d212f 509}
4dff95dc
SB
510
511struct clk *__clk_lookup(const char *name)
fcb0ee6a 512{
4dff95dc
SB
513 struct clk_core *core = clk_core_lookup(name);
514
515 return !core ? NULL : core->hw->clk;
fcb0ee6a 516}
b2476490 517
4dff95dc
SB
518static void clk_core_get_boundaries(struct clk_core *core,
519 unsigned long *min_rate,
520 unsigned long *max_rate)
1c155b3d 521{
4dff95dc 522 struct clk *clk_user;
1c155b3d 523
9783c0d9
SB
524 *min_rate = core->min_rate;
525 *max_rate = core->max_rate;
496eadf8 526
4dff95dc
SB
527 hlist_for_each_entry(clk_user, &core->clks, clks_node)
528 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 529
4dff95dc
SB
530 hlist_for_each_entry(clk_user, &core->clks, clks_node)
531 *max_rate = min(*max_rate, clk_user->max_rate);
532}
1c155b3d 533
9783c0d9
SB
534void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
535 unsigned long max_rate)
536{
537 hw->core->min_rate = min_rate;
538 hw->core->max_rate = max_rate;
539}
540EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
541
4dff95dc
SB
542/*
543 * Helper for finding best parent to provide a given frequency. This can be used
544 * directly as a determine_rate callback (e.g. for a mux), or from a more
545 * complex clock that may combine a mux with other operations.
546 */
0817b62c
BB
547int __clk_mux_determine_rate(struct clk_hw *hw,
548 struct clk_rate_request *req)
4dff95dc 549{
0817b62c 550 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 551}
4dff95dc 552EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 553
0817b62c
BB
554int __clk_mux_determine_rate_closest(struct clk_hw *hw,
555 struct clk_rate_request *req)
b2476490 556{
0817b62c 557 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
558}
559EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 560
4dff95dc 561/*** clk api ***/
496eadf8 562
4dff95dc
SB
563static void clk_core_unprepare(struct clk_core *core)
564{
a6334725
SB
565 lockdep_assert_held(&prepare_lock);
566
4dff95dc
SB
567 if (!core)
568 return;
b2476490 569
4dff95dc
SB
570 if (WARN_ON(core->prepare_count == 0))
571 return;
b2476490 572
4dff95dc
SB
573 if (--core->prepare_count > 0)
574 return;
b2476490 575
4dff95dc 576 WARN_ON(core->enable_count > 0);
b2476490 577
4dff95dc 578 trace_clk_unprepare(core);
b2476490 579
4dff95dc
SB
580 if (core->ops->unprepare)
581 core->ops->unprepare(core->hw);
582
583 trace_clk_unprepare_complete(core);
584 clk_core_unprepare(core->parent);
b2476490
MT
585}
586
4dff95dc
SB
587/**
588 * clk_unprepare - undo preparation of a clock source
589 * @clk: the clk being unprepared
590 *
591 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
592 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
593 * if the operation may sleep. One example is a clk which is accessed over
594 * I2c. In the complex case a clk gate operation may require a fast and a slow
595 * part. It is this reason that clk_unprepare and clk_disable are not mutually
596 * exclusive. In fact clk_disable must be called before clk_unprepare.
597 */
598void clk_unprepare(struct clk *clk)
1e435256 599{
4dff95dc
SB
600 if (IS_ERR_OR_NULL(clk))
601 return;
602
603 clk_prepare_lock();
604 clk_core_unprepare(clk->core);
605 clk_prepare_unlock();
1e435256 606}
4dff95dc 607EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 608
4dff95dc 609static int clk_core_prepare(struct clk_core *core)
b2476490 610{
4dff95dc 611 int ret = 0;
b2476490 612
a6334725
SB
613 lockdep_assert_held(&prepare_lock);
614
4dff95dc 615 if (!core)
1e435256 616 return 0;
1e435256 617
4dff95dc
SB
618 if (core->prepare_count == 0) {
619 ret = clk_core_prepare(core->parent);
620 if (ret)
621 return ret;
b2476490 622
4dff95dc 623 trace_clk_prepare(core);
b2476490 624
4dff95dc
SB
625 if (core->ops->prepare)
626 ret = core->ops->prepare(core->hw);
b2476490 627
4dff95dc 628 trace_clk_prepare_complete(core);
1c155b3d 629
4dff95dc
SB
630 if (ret) {
631 clk_core_unprepare(core->parent);
632 return ret;
633 }
634 }
1c155b3d 635
4dff95dc 636 core->prepare_count++;
b2476490
MT
637
638 return 0;
639}
b2476490 640
4dff95dc
SB
641/**
642 * clk_prepare - prepare a clock source
643 * @clk: the clk being prepared
644 *
645 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
646 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
647 * operation may sleep. One example is a clk which is accessed over I2c. In
648 * the complex case a clk ungate operation may require a fast and a slow part.
649 * It is this reason that clk_prepare and clk_enable are not mutually
650 * exclusive. In fact clk_prepare must be called before clk_enable.
651 * Returns 0 on success, -EERROR otherwise.
652 */
653int clk_prepare(struct clk *clk)
b2476490 654{
4dff95dc 655 int ret;
b2476490 656
4dff95dc
SB
657 if (!clk)
658 return 0;
b2476490 659
4dff95dc
SB
660 clk_prepare_lock();
661 ret = clk_core_prepare(clk->core);
662 clk_prepare_unlock();
663
664 return ret;
b2476490 665}
4dff95dc 666EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 667
4dff95dc 668static void clk_core_disable(struct clk_core *core)
b2476490 669{
a6334725
SB
670 lockdep_assert_held(&enable_lock);
671
4dff95dc
SB
672 if (!core)
673 return;
035a61c3 674
4dff95dc
SB
675 if (WARN_ON(core->enable_count == 0))
676 return;
b2476490 677
4dff95dc
SB
678 if (--core->enable_count > 0)
679 return;
035a61c3 680
4dff95dc 681 trace_clk_disable(core);
035a61c3 682
4dff95dc
SB
683 if (core->ops->disable)
684 core->ops->disable(core->hw);
035a61c3 685
4dff95dc 686 trace_clk_disable_complete(core);
035a61c3 687
4dff95dc 688 clk_core_disable(core->parent);
035a61c3 689}
7ef3dcc8 690
4dff95dc
SB
691/**
692 * clk_disable - gate a clock
693 * @clk: the clk being gated
694 *
695 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
696 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
697 * clk if the operation is fast and will never sleep. One example is a
698 * SoC-internal clk which is controlled via simple register writes. In the
699 * complex case a clk gate operation may require a fast and a slow part. It is
700 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
701 * In fact clk_disable must be called before clk_unprepare.
702 */
703void clk_disable(struct clk *clk)
b2476490 704{
4dff95dc
SB
705 unsigned long flags;
706
707 if (IS_ERR_OR_NULL(clk))
708 return;
709
710 flags = clk_enable_lock();
711 clk_core_disable(clk->core);
712 clk_enable_unlock(flags);
b2476490 713}
4dff95dc 714EXPORT_SYMBOL_GPL(clk_disable);
b2476490 715
4dff95dc 716static int clk_core_enable(struct clk_core *core)
b2476490 717{
4dff95dc 718 int ret = 0;
b2476490 719
a6334725
SB
720 lockdep_assert_held(&enable_lock);
721
4dff95dc
SB
722 if (!core)
723 return 0;
b2476490 724
4dff95dc
SB
725 if (WARN_ON(core->prepare_count == 0))
726 return -ESHUTDOWN;
b2476490 727
4dff95dc
SB
728 if (core->enable_count == 0) {
729 ret = clk_core_enable(core->parent);
b2476490 730
4dff95dc
SB
731 if (ret)
732 return ret;
b2476490 733
4dff95dc 734 trace_clk_enable(core);
035a61c3 735
4dff95dc
SB
736 if (core->ops->enable)
737 ret = core->ops->enable(core->hw);
035a61c3 738
4dff95dc
SB
739 trace_clk_enable_complete(core);
740
741 if (ret) {
742 clk_core_disable(core->parent);
743 return ret;
744 }
745 }
746
747 core->enable_count++;
748 return 0;
035a61c3 749}
b2476490 750
4dff95dc
SB
751/**
752 * clk_enable - ungate a clock
753 * @clk: the clk being ungated
754 *
755 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
756 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
757 * if the operation will never sleep. One example is a SoC-internal clk which
758 * is controlled via simple register writes. In the complex case a clk ungate
759 * operation may require a fast and a slow part. It is this reason that
760 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
761 * must be called before clk_enable. Returns 0 on success, -EERROR
762 * otherwise.
763 */
764int clk_enable(struct clk *clk)
5279fc40 765{
4dff95dc
SB
766 unsigned long flags;
767 int ret;
768
769 if (!clk)
5279fc40
BB
770 return 0;
771
4dff95dc
SB
772 flags = clk_enable_lock();
773 ret = clk_core_enable(clk->core);
774 clk_enable_unlock(flags);
5279fc40 775
4dff95dc 776 return ret;
b2476490 777}
4dff95dc 778EXPORT_SYMBOL_GPL(clk_enable);
b2476490 779
0817b62c
BB
780static int clk_core_round_rate_nolock(struct clk_core *core,
781 struct clk_rate_request *req)
3d6ee287 782{
4dff95dc 783 struct clk_core *parent;
0817b62c 784 long rate;
4dff95dc
SB
785
786 lockdep_assert_held(&prepare_lock);
3d6ee287 787
d6968fca 788 if (!core)
4dff95dc 789 return 0;
3d6ee287 790
4dff95dc 791 parent = core->parent;
0817b62c
BB
792 if (parent) {
793 req->best_parent_hw = parent->hw;
794 req->best_parent_rate = parent->rate;
795 } else {
796 req->best_parent_hw = NULL;
797 req->best_parent_rate = 0;
798 }
3d6ee287 799
4dff95dc 800 if (core->ops->determine_rate) {
0817b62c
BB
801 return core->ops->determine_rate(core->hw, req);
802 } else if (core->ops->round_rate) {
803 rate = core->ops->round_rate(core->hw, req->rate,
804 &req->best_parent_rate);
805 if (rate < 0)
806 return rate;
807
808 req->rate = rate;
809 } else if (core->flags & CLK_SET_RATE_PARENT) {
810 return clk_core_round_rate_nolock(parent, req);
811 } else {
812 req->rate = core->rate;
813 }
814
815 return 0;
3d6ee287
UH
816}
817
4dff95dc
SB
818/**
819 * __clk_determine_rate - get the closest rate actually supported by a clock
820 * @hw: determine the rate of this clock
821 * @rate: target rate
822 * @min_rate: returned rate must be greater than this rate
823 * @max_rate: returned rate must be less than this rate
824 *
6e5ab41b 825 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 826 */
0817b62c 827int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 828{
0817b62c
BB
829 if (!hw) {
830 req->rate = 0;
4dff95dc 831 return 0;
0817b62c 832 }
035a61c3 833
0817b62c 834 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 835}
4dff95dc 836EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 837
1a9c069c
SB
838unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
839{
840 int ret;
841 struct clk_rate_request req;
842
843 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
844 req.rate = rate;
845
846 ret = clk_core_round_rate_nolock(hw->core, &req);
847 if (ret)
848 return 0;
849
850 return req.rate;
851}
852EXPORT_SYMBOL_GPL(clk_hw_round_rate);
853
4dff95dc
SB
854/**
855 * clk_round_rate - round the given rate for a clk
856 * @clk: the clk for which we are rounding a rate
857 * @rate: the rate which is to be rounded
858 *
859 * Takes in a rate as input and rounds it to a rate that the clk can actually
860 * use which is then returned. If clk doesn't support round_rate operation
861 * then the parent rate is returned.
862 */
863long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 864{
fc4a05d4
SB
865 struct clk_rate_request req;
866 int ret;
4dff95dc 867
035a61c3 868 if (!clk)
4dff95dc 869 return 0;
035a61c3 870
4dff95dc 871 clk_prepare_lock();
fc4a05d4
SB
872
873 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
874 req.rate = rate;
875
876 ret = clk_core_round_rate_nolock(clk->core, &req);
4dff95dc
SB
877 clk_prepare_unlock();
878
fc4a05d4
SB
879 if (ret)
880 return ret;
881
882 return req.rate;
035a61c3 883}
4dff95dc 884EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 885
4dff95dc
SB
886/**
887 * __clk_notify - call clk notifier chain
888 * @core: clk that is changing rate
889 * @msg: clk notifier type (see include/linux/clk.h)
890 * @old_rate: old clk rate
891 * @new_rate: new clk rate
892 *
893 * Triggers a notifier call chain on the clk rate-change notification
894 * for 'clk'. Passes a pointer to the struct clk and the previous
895 * and current rates to the notifier callback. Intended to be called by
896 * internal clock code only. Returns NOTIFY_DONE from the last driver
897 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
898 * a driver returns that.
899 */
900static int __clk_notify(struct clk_core *core, unsigned long msg,
901 unsigned long old_rate, unsigned long new_rate)
b2476490 902{
4dff95dc
SB
903 struct clk_notifier *cn;
904 struct clk_notifier_data cnd;
905 int ret = NOTIFY_DONE;
b2476490 906
4dff95dc
SB
907 cnd.old_rate = old_rate;
908 cnd.new_rate = new_rate;
b2476490 909
4dff95dc
SB
910 list_for_each_entry(cn, &clk_notifier_list, node) {
911 if (cn->clk->core == core) {
912 cnd.clk = cn->clk;
913 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
914 &cnd);
915 }
b2476490
MT
916 }
917
4dff95dc 918 return ret;
b2476490
MT
919}
920
4dff95dc
SB
921/**
922 * __clk_recalc_accuracies
923 * @core: first clk in the subtree
924 *
925 * Walks the subtree of clks starting with clk and recalculates accuracies as
926 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 927 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 928 * parent.
4dff95dc
SB
929 */
930static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 931{
4dff95dc
SB
932 unsigned long parent_accuracy = 0;
933 struct clk_core *child;
b2476490 934
4dff95dc 935 lockdep_assert_held(&prepare_lock);
b2476490 936
4dff95dc
SB
937 if (core->parent)
938 parent_accuracy = core->parent->accuracy;
b2476490 939
4dff95dc
SB
940 if (core->ops->recalc_accuracy)
941 core->accuracy = core->ops->recalc_accuracy(core->hw,
942 parent_accuracy);
943 else
944 core->accuracy = parent_accuracy;
b2476490 945
4dff95dc
SB
946 hlist_for_each_entry(child, &core->children, child_node)
947 __clk_recalc_accuracies(child);
b2476490
MT
948}
949
4dff95dc 950static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 951{
4dff95dc 952 unsigned long accuracy;
15a02c1f 953
4dff95dc
SB
954 clk_prepare_lock();
955 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
956 __clk_recalc_accuracies(core);
15a02c1f 957
4dff95dc
SB
958 accuracy = __clk_get_accuracy(core);
959 clk_prepare_unlock();
e366fdd7 960
4dff95dc 961 return accuracy;
e366fdd7 962}
15a02c1f 963
4dff95dc
SB
964/**
965 * clk_get_accuracy - return the accuracy of clk
966 * @clk: the clk whose accuracy is being returned
967 *
968 * Simply returns the cached accuracy of the clk, unless
969 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
970 * issued.
971 * If clk is NULL then returns 0.
972 */
973long clk_get_accuracy(struct clk *clk)
035a61c3 974{
4dff95dc
SB
975 if (!clk)
976 return 0;
035a61c3 977
4dff95dc 978 return clk_core_get_accuracy(clk->core);
035a61c3 979}
4dff95dc 980EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 981
4dff95dc
SB
982static unsigned long clk_recalc(struct clk_core *core,
983 unsigned long parent_rate)
1c8e6004 984{
4dff95dc
SB
985 if (core->ops->recalc_rate)
986 return core->ops->recalc_rate(core->hw, parent_rate);
987 return parent_rate;
1c8e6004
TV
988}
989
4dff95dc
SB
990/**
991 * __clk_recalc_rates
992 * @core: first clk in the subtree
993 * @msg: notification type (see include/linux/clk.h)
994 *
995 * Walks the subtree of clks starting with clk and recalculates rates as it
996 * goes. Note that if a clk does not implement the .recalc_rate callback then
997 * it is assumed that the clock will take on the rate of its parent.
998 *
999 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1000 * if necessary.
15a02c1f 1001 */
4dff95dc 1002static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1003{
4dff95dc
SB
1004 unsigned long old_rate;
1005 unsigned long parent_rate = 0;
1006 struct clk_core *child;
e366fdd7 1007
4dff95dc 1008 lockdep_assert_held(&prepare_lock);
15a02c1f 1009
4dff95dc 1010 old_rate = core->rate;
b2476490 1011
4dff95dc
SB
1012 if (core->parent)
1013 parent_rate = core->parent->rate;
b2476490 1014
4dff95dc 1015 core->rate = clk_recalc(core, parent_rate);
b2476490 1016
4dff95dc
SB
1017 /*
1018 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1019 * & ABORT_RATE_CHANGE notifiers
1020 */
1021 if (core->notifier_count && msg)
1022 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1023
4dff95dc
SB
1024 hlist_for_each_entry(child, &core->children, child_node)
1025 __clk_recalc_rates(child, msg);
1026}
b2476490 1027
4dff95dc
SB
1028static unsigned long clk_core_get_rate(struct clk_core *core)
1029{
1030 unsigned long rate;
dfc202ea 1031
4dff95dc 1032 clk_prepare_lock();
b2476490 1033
4dff95dc
SB
1034 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1035 __clk_recalc_rates(core, 0);
1036
1037 rate = clk_core_get_rate_nolock(core);
1038 clk_prepare_unlock();
1039
1040 return rate;
b2476490
MT
1041}
1042
1043/**
4dff95dc
SB
1044 * clk_get_rate - return the rate of clk
1045 * @clk: the clk whose rate is being returned
b2476490 1046 *
4dff95dc
SB
1047 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1048 * is set, which means a recalc_rate will be issued.
1049 * If clk is NULL then returns 0.
b2476490 1050 */
4dff95dc 1051unsigned long clk_get_rate(struct clk *clk)
b2476490 1052{
4dff95dc
SB
1053 if (!clk)
1054 return 0;
63589e92 1055
4dff95dc 1056 return clk_core_get_rate(clk->core);
b2476490 1057}
4dff95dc 1058EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1059
4dff95dc
SB
1060static int clk_fetch_parent_index(struct clk_core *core,
1061 struct clk_core *parent)
b2476490 1062{
4dff95dc 1063 int i;
b2476490 1064
4dff95dc
SB
1065 if (!core->parents) {
1066 core->parents = kcalloc(core->num_parents,
1067 sizeof(struct clk *), GFP_KERNEL);
1068 if (!core->parents)
1069 return -ENOMEM;
1070 }
dfc202ea 1071
4dff95dc
SB
1072 /*
1073 * find index of new parent clock using cached parent ptrs,
1074 * or if not yet cached, use string name comparison and cache
1075 * them now to avoid future calls to clk_core_lookup.
1076 */
1077 for (i = 0; i < core->num_parents; i++) {
1078 if (core->parents[i] == parent)
1079 return i;
dfc202ea 1080
4dff95dc
SB
1081 if (core->parents[i])
1082 continue;
dfc202ea 1083
4dff95dc
SB
1084 if (!strcmp(core->parent_names[i], parent->name)) {
1085 core->parents[i] = clk_core_lookup(parent->name);
1086 return i;
b2476490
MT
1087 }
1088 }
1089
4dff95dc 1090 return -EINVAL;
b2476490
MT
1091}
1092
e6500344
HS
1093/*
1094 * Update the orphan status of @core and all its children.
1095 */
1096static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1097{
1098 struct clk_core *child;
1099
1100 core->orphan = is_orphan;
1101
1102 hlist_for_each_entry(child, &core->children, child_node)
1103 clk_core_update_orphan_status(child, is_orphan);
1104}
1105
4dff95dc 1106static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1107{
e6500344
HS
1108 bool was_orphan = core->orphan;
1109
4dff95dc 1110 hlist_del(&core->child_node);
035a61c3 1111
4dff95dc 1112 if (new_parent) {
e6500344
HS
1113 bool becomes_orphan = new_parent->orphan;
1114
4dff95dc
SB
1115 /* avoid duplicate POST_RATE_CHANGE notifications */
1116 if (new_parent->new_child == core)
1117 new_parent->new_child = NULL;
b2476490 1118
4dff95dc 1119 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1120
1121 if (was_orphan != becomes_orphan)
1122 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1123 } else {
1124 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1125 if (!was_orphan)
1126 clk_core_update_orphan_status(core, true);
4dff95dc 1127 }
dfc202ea 1128
4dff95dc 1129 core->parent = new_parent;
035a61c3
TV
1130}
1131
4dff95dc
SB
1132static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1133 struct clk_core *parent)
b2476490
MT
1134{
1135 unsigned long flags;
4dff95dc 1136 struct clk_core *old_parent = core->parent;
b2476490 1137
4dff95dc
SB
1138 /*
1139 * Migrate prepare state between parents and prevent race with
1140 * clk_enable().
1141 *
1142 * If the clock is not prepared, then a race with
1143 * clk_enable/disable() is impossible since we already have the
1144 * prepare lock (future calls to clk_enable() need to be preceded by
1145 * a clk_prepare()).
1146 *
1147 * If the clock is prepared, migrate the prepared state to the new
1148 * parent and also protect against a race with clk_enable() by
1149 * forcing the clock and the new parent on. This ensures that all
1150 * future calls to clk_enable() are practically NOPs with respect to
1151 * hardware and software states.
1152 *
1153 * See also: Comment for clk_set_parent() below.
1154 */
1155 if (core->prepare_count) {
1156 clk_core_prepare(parent);
d2a5d46b 1157 flags = clk_enable_lock();
4dff95dc
SB
1158 clk_core_enable(parent);
1159 clk_core_enable(core);
d2a5d46b 1160 clk_enable_unlock(flags);
4dff95dc 1161 }
63589e92 1162
4dff95dc 1163 /* update the clk tree topology */
eab89f69 1164 flags = clk_enable_lock();
4dff95dc 1165 clk_reparent(core, parent);
eab89f69 1166 clk_enable_unlock(flags);
4dff95dc
SB
1167
1168 return old_parent;
b2476490 1169}
b2476490 1170
4dff95dc
SB
1171static void __clk_set_parent_after(struct clk_core *core,
1172 struct clk_core *parent,
1173 struct clk_core *old_parent)
b2476490 1174{
d2a5d46b
DA
1175 unsigned long flags;
1176
4dff95dc
SB
1177 /*
1178 * Finish the migration of prepare state and undo the changes done
1179 * for preventing a race with clk_enable().
1180 */
1181 if (core->prepare_count) {
d2a5d46b 1182 flags = clk_enable_lock();
4dff95dc
SB
1183 clk_core_disable(core);
1184 clk_core_disable(old_parent);
d2a5d46b 1185 clk_enable_unlock(flags);
4dff95dc
SB
1186 clk_core_unprepare(old_parent);
1187 }
1188}
b2476490 1189
4dff95dc
SB
1190static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1191 u8 p_index)
1192{
1193 unsigned long flags;
1194 int ret = 0;
1195 struct clk_core *old_parent;
b2476490 1196
4dff95dc 1197 old_parent = __clk_set_parent_before(core, parent);
b2476490 1198
4dff95dc 1199 trace_clk_set_parent(core, parent);
b2476490 1200
4dff95dc
SB
1201 /* change clock input source */
1202 if (parent && core->ops->set_parent)
1203 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1204
4dff95dc 1205 trace_clk_set_parent_complete(core, parent);
dfc202ea 1206
4dff95dc
SB
1207 if (ret) {
1208 flags = clk_enable_lock();
1209 clk_reparent(core, old_parent);
1210 clk_enable_unlock(flags);
dfc202ea 1211
4dff95dc 1212 if (core->prepare_count) {
d2a5d46b 1213 flags = clk_enable_lock();
4dff95dc
SB
1214 clk_core_disable(core);
1215 clk_core_disable(parent);
d2a5d46b 1216 clk_enable_unlock(flags);
4dff95dc 1217 clk_core_unprepare(parent);
b2476490 1218 }
4dff95dc 1219 return ret;
b2476490
MT
1220 }
1221
4dff95dc
SB
1222 __clk_set_parent_after(core, parent, old_parent);
1223
b2476490
MT
1224 return 0;
1225}
1226
1227/**
4dff95dc
SB
1228 * __clk_speculate_rates
1229 * @core: first clk in the subtree
1230 * @parent_rate: the "future" rate of clk's parent
b2476490 1231 *
4dff95dc
SB
1232 * Walks the subtree of clks starting with clk, speculating rates as it
1233 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1234 *
1235 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1236 * pre-rate change notifications and returns early if no clks in the
1237 * subtree have subscribed to the notifications. Note that if a clk does not
1238 * implement the .recalc_rate callback then it is assumed that the clock will
1239 * take on the rate of its parent.
b2476490 1240 */
4dff95dc
SB
1241static int __clk_speculate_rates(struct clk_core *core,
1242 unsigned long parent_rate)
b2476490 1243{
4dff95dc
SB
1244 struct clk_core *child;
1245 unsigned long new_rate;
1246 int ret = NOTIFY_DONE;
b2476490 1247
4dff95dc 1248 lockdep_assert_held(&prepare_lock);
864e160a 1249
4dff95dc
SB
1250 new_rate = clk_recalc(core, parent_rate);
1251
1252 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1253 if (core->notifier_count)
1254 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1255
1256 if (ret & NOTIFY_STOP_MASK) {
1257 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1258 __func__, core->name, ret);
1259 goto out;
1260 }
1261
1262 hlist_for_each_entry(child, &core->children, child_node) {
1263 ret = __clk_speculate_rates(child, new_rate);
1264 if (ret & NOTIFY_STOP_MASK)
1265 break;
1266 }
b2476490 1267
4dff95dc 1268out:
b2476490
MT
1269 return ret;
1270}
b2476490 1271
4dff95dc
SB
1272static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1273 struct clk_core *new_parent, u8 p_index)
b2476490 1274{
4dff95dc 1275 struct clk_core *child;
b2476490 1276
4dff95dc
SB
1277 core->new_rate = new_rate;
1278 core->new_parent = new_parent;
1279 core->new_parent_index = p_index;
1280 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1281 core->new_child = NULL;
1282 if (new_parent && new_parent != core->parent)
1283 new_parent->new_child = core;
496eadf8 1284
4dff95dc
SB
1285 hlist_for_each_entry(child, &core->children, child_node) {
1286 child->new_rate = clk_recalc(child, new_rate);
1287 clk_calc_subtree(child, child->new_rate, NULL, 0);
1288 }
1289}
b2476490 1290
4dff95dc
SB
1291/*
1292 * calculate the new rates returning the topmost clock that has to be
1293 * changed.
1294 */
1295static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1296 unsigned long rate)
1297{
1298 struct clk_core *top = core;
1299 struct clk_core *old_parent, *parent;
4dff95dc
SB
1300 unsigned long best_parent_rate = 0;
1301 unsigned long new_rate;
1302 unsigned long min_rate;
1303 unsigned long max_rate;
1304 int p_index = 0;
1305 long ret;
1306
1307 /* sanity */
1308 if (IS_ERR_OR_NULL(core))
1309 return NULL;
1310
1311 /* save parent rate, if it exists */
1312 parent = old_parent = core->parent;
71472c0c 1313 if (parent)
4dff95dc 1314 best_parent_rate = parent->rate;
71472c0c 1315
4dff95dc
SB
1316 clk_core_get_boundaries(core, &min_rate, &max_rate);
1317
1318 /* find the closest rate and parent clk/rate */
d6968fca 1319 if (core->ops->determine_rate) {
0817b62c
BB
1320 struct clk_rate_request req;
1321
1322 req.rate = rate;
1323 req.min_rate = min_rate;
1324 req.max_rate = max_rate;
1325 if (parent) {
1326 req.best_parent_hw = parent->hw;
1327 req.best_parent_rate = parent->rate;
1328 } else {
1329 req.best_parent_hw = NULL;
1330 req.best_parent_rate = 0;
1331 }
1332
1333 ret = core->ops->determine_rate(core->hw, &req);
4dff95dc
SB
1334 if (ret < 0)
1335 return NULL;
1c8e6004 1336
0817b62c
BB
1337 best_parent_rate = req.best_parent_rate;
1338 new_rate = req.rate;
1339 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
4dff95dc
SB
1340 } else if (core->ops->round_rate) {
1341 ret = core->ops->round_rate(core->hw, rate,
0817b62c 1342 &best_parent_rate);
4dff95dc
SB
1343 if (ret < 0)
1344 return NULL;
035a61c3 1345
4dff95dc
SB
1346 new_rate = ret;
1347 if (new_rate < min_rate || new_rate > max_rate)
1348 return NULL;
1349 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1350 /* pass-through clock without adjustable parent */
1351 core->new_rate = core->rate;
1352 return NULL;
1353 } else {
1354 /* pass-through clock with adjustable parent */
1355 top = clk_calc_new_rates(parent, rate);
1356 new_rate = parent->new_rate;
1357 goto out;
1358 }
1c8e6004 1359
4dff95dc
SB
1360 /* some clocks must be gated to change parent */
1361 if (parent != old_parent &&
1362 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1363 pr_debug("%s: %s not gated but wants to reparent\n",
1364 __func__, core->name);
1365 return NULL;
1366 }
b2476490 1367
4dff95dc
SB
1368 /* try finding the new parent index */
1369 if (parent && core->num_parents > 1) {
1370 p_index = clk_fetch_parent_index(core, parent);
1371 if (p_index < 0) {
1372 pr_debug("%s: clk %s can not be parent of clk %s\n",
1373 __func__, parent->name, core->name);
1374 return NULL;
1375 }
1376 }
b2476490 1377
4dff95dc
SB
1378 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1379 best_parent_rate != parent->rate)
1380 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1381
4dff95dc
SB
1382out:
1383 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1384
4dff95dc 1385 return top;
b2476490 1386}
b2476490 1387
4dff95dc
SB
1388/*
1389 * Notify about rate changes in a subtree. Always walk down the whole tree
1390 * so that in case of an error we can walk down the whole tree again and
1391 * abort the change.
b2476490 1392 */
4dff95dc
SB
1393static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1394 unsigned long event)
b2476490 1395{
4dff95dc 1396 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1397 int ret = NOTIFY_DONE;
1398
4dff95dc
SB
1399 if (core->rate == core->new_rate)
1400 return NULL;
b2476490 1401
4dff95dc
SB
1402 if (core->notifier_count) {
1403 ret = __clk_notify(core, event, core->rate, core->new_rate);
1404 if (ret & NOTIFY_STOP_MASK)
1405 fail_clk = core;
b2476490
MT
1406 }
1407
4dff95dc
SB
1408 hlist_for_each_entry(child, &core->children, child_node) {
1409 /* Skip children who will be reparented to another clock */
1410 if (child->new_parent && child->new_parent != core)
1411 continue;
1412 tmp_clk = clk_propagate_rate_change(child, event);
1413 if (tmp_clk)
1414 fail_clk = tmp_clk;
1415 }
5279fc40 1416
4dff95dc
SB
1417 /* handle the new child who might not be in core->children yet */
1418 if (core->new_child) {
1419 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1420 if (tmp_clk)
1421 fail_clk = tmp_clk;
1422 }
5279fc40 1423
4dff95dc 1424 return fail_clk;
5279fc40
BB
1425}
1426
4dff95dc
SB
1427/*
1428 * walk down a subtree and set the new rates notifying the rate
1429 * change on the way
1430 */
1431static void clk_change_rate(struct clk_core *core)
035a61c3 1432{
4dff95dc
SB
1433 struct clk_core *child;
1434 struct hlist_node *tmp;
1435 unsigned long old_rate;
1436 unsigned long best_parent_rate = 0;
1437 bool skip_set_rate = false;
1438 struct clk_core *old_parent;
035a61c3 1439
4dff95dc 1440 old_rate = core->rate;
035a61c3 1441
4dff95dc
SB
1442 if (core->new_parent)
1443 best_parent_rate = core->new_parent->rate;
1444 else if (core->parent)
1445 best_parent_rate = core->parent->rate;
035a61c3 1446
4dff95dc
SB
1447 if (core->new_parent && core->new_parent != core->parent) {
1448 old_parent = __clk_set_parent_before(core, core->new_parent);
1449 trace_clk_set_parent(core, core->new_parent);
5279fc40 1450
4dff95dc
SB
1451 if (core->ops->set_rate_and_parent) {
1452 skip_set_rate = true;
1453 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1454 best_parent_rate,
1455 core->new_parent_index);
1456 } else if (core->ops->set_parent) {
1457 core->ops->set_parent(core->hw, core->new_parent_index);
1458 }
5279fc40 1459
4dff95dc
SB
1460 trace_clk_set_parent_complete(core, core->new_parent);
1461 __clk_set_parent_after(core, core->new_parent, old_parent);
1462 }
8f2c2db1 1463
4dff95dc 1464 trace_clk_set_rate(core, core->new_rate);
b2476490 1465
4dff95dc
SB
1466 if (!skip_set_rate && core->ops->set_rate)
1467 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1468
4dff95dc 1469 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1470
4dff95dc 1471 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1472
4dff95dc
SB
1473 if (core->notifier_count && old_rate != core->rate)
1474 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 1475
85e88fab
MT
1476 if (core->flags & CLK_RECALC_NEW_RATES)
1477 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 1478
b2476490 1479 /*
4dff95dc
SB
1480 * Use safe iteration, as change_rate can actually swap parents
1481 * for certain clock types.
b2476490 1482 */
4dff95dc
SB
1483 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1484 /* Skip children who will be reparented to another clock */
1485 if (child->new_parent && child->new_parent != core)
1486 continue;
1487 clk_change_rate(child);
1488 }
b2476490 1489
4dff95dc
SB
1490 /* handle the new child who might not be in core->children yet */
1491 if (core->new_child)
1492 clk_change_rate(core->new_child);
b2476490
MT
1493}
1494
4dff95dc
SB
1495static int clk_core_set_rate_nolock(struct clk_core *core,
1496 unsigned long req_rate)
a093bde2 1497{
4dff95dc
SB
1498 struct clk_core *top, *fail_clk;
1499 unsigned long rate = req_rate;
1500 int ret = 0;
a093bde2 1501
4dff95dc
SB
1502 if (!core)
1503 return 0;
a093bde2 1504
4dff95dc
SB
1505 /* bail early if nothing to do */
1506 if (rate == clk_core_get_rate_nolock(core))
1507 return 0;
a093bde2 1508
4dff95dc
SB
1509 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1510 return -EBUSY;
a093bde2 1511
4dff95dc
SB
1512 /* calculate new rates and get the topmost changed clock */
1513 top = clk_calc_new_rates(core, rate);
1514 if (!top)
1515 return -EINVAL;
1516
1517 /* notify that we are about to change rates */
1518 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1519 if (fail_clk) {
1520 pr_debug("%s: failed to set %s rate\n", __func__,
1521 fail_clk->name);
1522 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1523 return -EBUSY;
1524 }
1525
1526 /* change the rates */
1527 clk_change_rate(top);
1528
1529 core->req_rate = req_rate;
1530
1531 return ret;
a093bde2 1532}
035a61c3
TV
1533
1534/**
4dff95dc
SB
1535 * clk_set_rate - specify a new rate for clk
1536 * @clk: the clk whose rate is being changed
1537 * @rate: the new rate for clk
035a61c3 1538 *
4dff95dc
SB
1539 * In the simplest case clk_set_rate will only adjust the rate of clk.
1540 *
1541 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1542 * propagate up to clk's parent; whether or not this happens depends on the
1543 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1544 * after calling .round_rate then upstream parent propagation is ignored. If
1545 * *parent_rate comes back with a new rate for clk's parent then we propagate
1546 * up to clk's parent and set its rate. Upward propagation will continue
1547 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1548 * .round_rate stops requesting changes to clk's parent_rate.
1549 *
1550 * Rate changes are accomplished via tree traversal that also recalculates the
1551 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1552 *
1553 * Returns 0 on success, -EERROR otherwise.
035a61c3 1554 */
4dff95dc 1555int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1556{
4dff95dc
SB
1557 int ret;
1558
035a61c3
TV
1559 if (!clk)
1560 return 0;
1561
4dff95dc
SB
1562 /* prevent racing with updates to the clock topology */
1563 clk_prepare_lock();
da0f0b2c 1564
4dff95dc 1565 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1566
4dff95dc 1567 clk_prepare_unlock();
4935b22c 1568
4dff95dc 1569 return ret;
4935b22c 1570}
4dff95dc 1571EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1572
4dff95dc
SB
1573/**
1574 * clk_set_rate_range - set a rate range for a clock source
1575 * @clk: clock source
1576 * @min: desired minimum clock rate in Hz, inclusive
1577 * @max: desired maximum clock rate in Hz, inclusive
1578 *
1579 * Returns success (0) or negative errno.
1580 */
1581int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1582{
4dff95dc 1583 int ret = 0;
4935b22c 1584
4dff95dc
SB
1585 if (!clk)
1586 return 0;
903efc55 1587
4dff95dc
SB
1588 if (min > max) {
1589 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1590 __func__, clk->core->name, clk->dev_id, clk->con_id,
1591 min, max);
1592 return -EINVAL;
903efc55 1593 }
4935b22c 1594
4dff95dc 1595 clk_prepare_lock();
4935b22c 1596
4dff95dc
SB
1597 if (min != clk->min_rate || max != clk->max_rate) {
1598 clk->min_rate = min;
1599 clk->max_rate = max;
1600 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1601 }
1602
4dff95dc 1603 clk_prepare_unlock();
4935b22c 1604
4dff95dc 1605 return ret;
3fa2252b 1606}
4dff95dc 1607EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1608
4dff95dc
SB
1609/**
1610 * clk_set_min_rate - set a minimum clock rate for a clock source
1611 * @clk: clock source
1612 * @rate: desired minimum clock rate in Hz, inclusive
1613 *
1614 * Returns success (0) or negative errno.
1615 */
1616int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1617{
4dff95dc
SB
1618 if (!clk)
1619 return 0;
1620
1621 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1622}
4dff95dc 1623EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1624
4dff95dc
SB
1625/**
1626 * clk_set_max_rate - set a maximum clock rate for a clock source
1627 * @clk: clock source
1628 * @rate: desired maximum clock rate in Hz, inclusive
1629 *
1630 * Returns success (0) or negative errno.
1631 */
1632int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1633{
4dff95dc
SB
1634 if (!clk)
1635 return 0;
4935b22c 1636
4dff95dc 1637 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1638}
4dff95dc 1639EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1640
b2476490 1641/**
4dff95dc
SB
1642 * clk_get_parent - return the parent of a clk
1643 * @clk: the clk whose parent gets returned
b2476490 1644 *
4dff95dc 1645 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1646 */
4dff95dc 1647struct clk *clk_get_parent(struct clk *clk)
b2476490 1648{
4dff95dc 1649 struct clk *parent;
b2476490 1650
fc4a05d4
SB
1651 if (!clk)
1652 return NULL;
1653
4dff95dc 1654 clk_prepare_lock();
fc4a05d4
SB
1655 /* TODO: Create a per-user clk and change callers to call clk_put */
1656 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 1657 clk_prepare_unlock();
496eadf8 1658
4dff95dc
SB
1659 return parent;
1660}
1661EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1662
4dff95dc
SB
1663/*
1664 * .get_parent is mandatory for clocks with multiple possible parents. It is
1665 * optional for single-parent clocks. Always call .get_parent if it is
1666 * available and WARN if it is missing for multi-parent clocks.
1667 *
1668 * For single-parent clocks without .get_parent, first check to see if the
1669 * .parents array exists, and if so use it to avoid an expensive tree
1670 * traversal. If .parents does not exist then walk the tree.
1671 */
1672static struct clk_core *__clk_init_parent(struct clk_core *core)
1673{
1674 struct clk_core *ret = NULL;
1675 u8 index;
b2476490 1676
4dff95dc
SB
1677 /* handle the trivial cases */
1678
1679 if (!core->num_parents)
b2476490
MT
1680 goto out;
1681
4dff95dc
SB
1682 if (core->num_parents == 1) {
1683 if (IS_ERR_OR_NULL(core->parent))
1684 core->parent = clk_core_lookup(core->parent_names[0]);
1685 ret = core->parent;
1686 goto out;
b2476490
MT
1687 }
1688
4dff95dc
SB
1689 if (!core->ops->get_parent) {
1690 WARN(!core->ops->get_parent,
1691 "%s: multi-parent clocks must implement .get_parent\n",
1692 __func__);
1693 goto out;
1694 };
1695
1696 /*
1697 * Do our best to cache parent clocks in core->parents. This prevents
1698 * unnecessary and expensive lookups. We don't set core->parent here;
1699 * that is done by the calling function.
1700 */
1701
1702 index = core->ops->get_parent(core->hw);
1703
1704 if (!core->parents)
1705 core->parents =
1706 kcalloc(core->num_parents, sizeof(struct clk *),
1707 GFP_KERNEL);
1708
1709 ret = clk_core_get_parent_by_index(core, index);
1710
b2476490
MT
1711out:
1712 return ret;
1713}
1714
4dff95dc
SB
1715static void clk_core_reparent(struct clk_core *core,
1716 struct clk_core *new_parent)
b2476490 1717{
4dff95dc
SB
1718 clk_reparent(core, new_parent);
1719 __clk_recalc_accuracies(core);
1720 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1721}
1722
42c86547
TV
1723void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
1724{
1725 if (!hw)
1726 return;
1727
1728 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
1729}
1730
4dff95dc
SB
1731/**
1732 * clk_has_parent - check if a clock is a possible parent for another
1733 * @clk: clock source
1734 * @parent: parent clock source
1735 *
1736 * This function can be used in drivers that need to check that a clock can be
1737 * the parent of another without actually changing the parent.
1738 *
1739 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1740 */
4dff95dc 1741bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1742{
4dff95dc
SB
1743 struct clk_core *core, *parent_core;
1744 unsigned int i;
b2476490 1745
4dff95dc
SB
1746 /* NULL clocks should be nops, so return success if either is NULL. */
1747 if (!clk || !parent)
1748 return true;
7452b219 1749
4dff95dc
SB
1750 core = clk->core;
1751 parent_core = parent->core;
71472c0c 1752
4dff95dc
SB
1753 /* Optimize for the case where the parent is already the parent. */
1754 if (core->parent == parent_core)
1755 return true;
1c8e6004 1756
4dff95dc
SB
1757 for (i = 0; i < core->num_parents; i++)
1758 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1759 return true;
03bc10ab 1760
4dff95dc
SB
1761 return false;
1762}
1763EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1764
4dff95dc
SB
1765static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1766{
1767 int ret = 0;
1768 int p_index = 0;
1769 unsigned long p_rate = 0;
1770
1771 if (!core)
1772 return 0;
1773
1774 /* prevent racing with updates to the clock topology */
1775 clk_prepare_lock();
1776
1777 if (core->parent == parent)
1778 goto out;
1779
1780 /* verify ops for for multi-parent clks */
1781 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1782 ret = -ENOSYS;
63f5c3b2 1783 goto out;
7452b219
MT
1784 }
1785
4dff95dc
SB
1786 /* check that we are allowed to re-parent if the clock is in use */
1787 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1788 ret = -EBUSY;
1789 goto out;
b2476490
MT
1790 }
1791
71472c0c 1792 /* try finding the new parent index */
4dff95dc 1793 if (parent) {
d6968fca 1794 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1795 p_rate = parent->rate;
f1c8b2ed 1796 if (p_index < 0) {
71472c0c 1797 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1798 __func__, parent->name, core->name);
1799 ret = p_index;
1800 goto out;
71472c0c 1801 }
b2476490
MT
1802 }
1803
4dff95dc
SB
1804 /* propagate PRE_RATE_CHANGE notifications */
1805 ret = __clk_speculate_rates(core, p_rate);
b2476490 1806
4dff95dc
SB
1807 /* abort if a driver objects */
1808 if (ret & NOTIFY_STOP_MASK)
1809 goto out;
b2476490 1810
4dff95dc
SB
1811 /* do the re-parent */
1812 ret = __clk_set_parent(core, parent, p_index);
b2476490 1813
4dff95dc
SB
1814 /* propagate rate an accuracy recalculation accordingly */
1815 if (ret) {
1816 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1817 } else {
1818 __clk_recalc_rates(core, POST_RATE_CHANGE);
1819 __clk_recalc_accuracies(core);
b2476490
MT
1820 }
1821
4dff95dc
SB
1822out:
1823 clk_prepare_unlock();
71472c0c 1824
4dff95dc
SB
1825 return ret;
1826}
b2476490 1827
4dff95dc
SB
1828/**
1829 * clk_set_parent - switch the parent of a mux clk
1830 * @clk: the mux clk whose input we are switching
1831 * @parent: the new input to clk
1832 *
1833 * Re-parent clk to use parent as its new input source. If clk is in
1834 * prepared state, the clk will get enabled for the duration of this call. If
1835 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1836 * that, the reparenting is glitchy in hardware, etc), use the
1837 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1838 *
1839 * After successfully changing clk's parent clk_set_parent will update the
1840 * clk topology, sysfs topology and propagate rate recalculation via
1841 * __clk_recalc_rates.
1842 *
1843 * Returns 0 on success, -EERROR otherwise.
1844 */
1845int clk_set_parent(struct clk *clk, struct clk *parent)
1846{
1847 if (!clk)
1848 return 0;
1849
1850 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1851}
4dff95dc 1852EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1853
4dff95dc
SB
1854/**
1855 * clk_set_phase - adjust the phase shift of a clock signal
1856 * @clk: clock signal source
1857 * @degrees: number of degrees the signal is shifted
1858 *
1859 * Shifts the phase of a clock signal by the specified
1860 * degrees. Returns 0 on success, -EERROR otherwise.
1861 *
1862 * This function makes no distinction about the input or reference
1863 * signal that we adjust the clock signal phase against. For example
1864 * phase locked-loop clock signal generators we may shift phase with
1865 * respect to feedback clock signal input, but for other cases the
1866 * clock phase may be shifted with respect to some other, unspecified
1867 * signal.
1868 *
1869 * Additionally the concept of phase shift does not propagate through
1870 * the clock tree hierarchy, which sets it apart from clock rates and
1871 * clock accuracy. A parent clock phase attribute does not have an
1872 * impact on the phase attribute of a child clock.
b2476490 1873 */
4dff95dc 1874int clk_set_phase(struct clk *clk, int degrees)
b2476490 1875{
4dff95dc 1876 int ret = -EINVAL;
b2476490 1877
4dff95dc
SB
1878 if (!clk)
1879 return 0;
b2476490 1880
4dff95dc
SB
1881 /* sanity check degrees */
1882 degrees %= 360;
1883 if (degrees < 0)
1884 degrees += 360;
bf47b4fd 1885
4dff95dc 1886 clk_prepare_lock();
3fa2252b 1887
4dff95dc 1888 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1889
4dff95dc
SB
1890 if (clk->core->ops->set_phase)
1891 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1892
4dff95dc 1893 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1894
4dff95dc
SB
1895 if (!ret)
1896 clk->core->phase = degrees;
b2476490 1897
4dff95dc 1898 clk_prepare_unlock();
dfc202ea 1899
4dff95dc
SB
1900 return ret;
1901}
1902EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1903
4dff95dc
SB
1904static int clk_core_get_phase(struct clk_core *core)
1905{
1906 int ret;
b2476490 1907
4dff95dc
SB
1908 clk_prepare_lock();
1909 ret = core->phase;
1910 clk_prepare_unlock();
71472c0c 1911
4dff95dc 1912 return ret;
b2476490
MT
1913}
1914
4dff95dc
SB
1915/**
1916 * clk_get_phase - return the phase shift of a clock signal
1917 * @clk: clock signal source
1918 *
1919 * Returns the phase shift of a clock node in degrees, otherwise returns
1920 * -EERROR.
1921 */
1922int clk_get_phase(struct clk *clk)
1c8e6004 1923{
4dff95dc 1924 if (!clk)
1c8e6004
TV
1925 return 0;
1926
4dff95dc
SB
1927 return clk_core_get_phase(clk->core);
1928}
1929EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1930
4dff95dc
SB
1931/**
1932 * clk_is_match - check if two clk's point to the same hardware clock
1933 * @p: clk compared against q
1934 * @q: clk compared against p
1935 *
1936 * Returns true if the two struct clk pointers both point to the same hardware
1937 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1938 * share the same struct clk_core object.
1939 *
1940 * Returns false otherwise. Note that two NULL clks are treated as matching.
1941 */
1942bool clk_is_match(const struct clk *p, const struct clk *q)
1943{
1944 /* trivial case: identical struct clk's or both NULL */
1945 if (p == q)
1946 return true;
1c8e6004 1947
4dff95dc
SB
1948 /* true if clk->core pointers match. Avoid derefing garbage */
1949 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1950 if (p->core == q->core)
1951 return true;
1c8e6004 1952
4dff95dc
SB
1953 return false;
1954}
1955EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1956
4dff95dc 1957/*** debugfs support ***/
1c8e6004 1958
4dff95dc
SB
1959#ifdef CONFIG_DEBUG_FS
1960#include <linux/debugfs.h>
1c8e6004 1961
4dff95dc
SB
1962static struct dentry *rootdir;
1963static int inited = 0;
1964static DEFINE_MUTEX(clk_debug_lock);
1965static HLIST_HEAD(clk_debug_list);
1c8e6004 1966
4dff95dc
SB
1967static struct hlist_head *all_lists[] = {
1968 &clk_root_list,
1969 &clk_orphan_list,
1970 NULL,
1971};
1972
1973static struct hlist_head *orphan_list[] = {
1974 &clk_orphan_list,
1975 NULL,
1976};
1977
1978static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1979 int level)
b2476490 1980{
4dff95dc
SB
1981 if (!c)
1982 return;
b2476490 1983
4dff95dc
SB
1984 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1985 level * 3 + 1, "",
1986 30 - level * 3, c->name,
1987 c->enable_count, c->prepare_count, clk_core_get_rate(c),
1988 clk_core_get_accuracy(c), clk_core_get_phase(c));
1989}
89ac8d7a 1990
4dff95dc
SB
1991static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1992 int level)
1993{
1994 struct clk_core *child;
b2476490 1995
4dff95dc
SB
1996 if (!c)
1997 return;
b2476490 1998
4dff95dc 1999 clk_summary_show_one(s, c, level);
0e1c0301 2000
4dff95dc
SB
2001 hlist_for_each_entry(child, &c->children, child_node)
2002 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2003}
b2476490 2004
4dff95dc 2005static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2006{
4dff95dc
SB
2007 struct clk_core *c;
2008 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2009
4dff95dc
SB
2010 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
2011 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 2012
1c8e6004
TV
2013 clk_prepare_lock();
2014
4dff95dc
SB
2015 for (; *lists; lists++)
2016 hlist_for_each_entry(c, *lists, child_node)
2017 clk_summary_show_subtree(s, c, 0);
b2476490 2018
eab89f69 2019 clk_prepare_unlock();
b2476490 2020
4dff95dc 2021 return 0;
b2476490 2022}
1c8e6004 2023
1c8e6004 2024
4dff95dc 2025static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 2026{
4dff95dc 2027 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 2028}
b2476490 2029
4dff95dc
SB
2030static const struct file_operations clk_summary_fops = {
2031 .open = clk_summary_open,
2032 .read = seq_read,
2033 .llseek = seq_lseek,
2034 .release = single_release,
2035};
b2476490 2036
4dff95dc
SB
2037static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2038{
2039 if (!c)
2040 return;
b2476490 2041
7cb81136 2042 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
2043 seq_printf(s, "\"%s\": { ", c->name);
2044 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2045 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
7cb81136
SW
2046 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2047 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
4dff95dc 2048 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 2049}
b2476490 2050
4dff95dc 2051static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 2052{
4dff95dc 2053 struct clk_core *child;
b2476490 2054
4dff95dc
SB
2055 if (!c)
2056 return;
b2476490 2057
4dff95dc 2058 clk_dump_one(s, c, level);
b2476490 2059
4dff95dc
SB
2060 hlist_for_each_entry(child, &c->children, child_node) {
2061 seq_printf(s, ",");
2062 clk_dump_subtree(s, child, level + 1);
b2476490
MT
2063 }
2064
4dff95dc 2065 seq_printf(s, "}");
b2476490
MT
2066}
2067
4dff95dc 2068static int clk_dump(struct seq_file *s, void *data)
4e88f3de 2069{
4dff95dc
SB
2070 struct clk_core *c;
2071 bool first_node = true;
2072 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 2073
4dff95dc 2074 seq_printf(s, "{");
4e88f3de 2075
4dff95dc 2076 clk_prepare_lock();
035a61c3 2077
4dff95dc
SB
2078 for (; *lists; lists++) {
2079 hlist_for_each_entry(c, *lists, child_node) {
2080 if (!first_node)
2081 seq_puts(s, ",");
2082 first_node = false;
2083 clk_dump_subtree(s, c, 0);
2084 }
2085 }
4e88f3de 2086
4dff95dc 2087 clk_prepare_unlock();
4e88f3de 2088
70e9f4dd 2089 seq_puts(s, "}\n");
4dff95dc 2090 return 0;
4e88f3de 2091}
4e88f3de 2092
4dff95dc
SB
2093
2094static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2095{
4dff95dc
SB
2096 return single_open(file, clk_dump, inode->i_private);
2097}
b2476490 2098
4dff95dc
SB
2099static const struct file_operations clk_dump_fops = {
2100 .open = clk_dump_open,
2101 .read = seq_read,
2102 .llseek = seq_lseek,
2103 .release = single_release,
2104};
89ac8d7a 2105
4dff95dc
SB
2106static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2107{
2108 struct dentry *d;
2109 int ret = -ENOMEM;
b2476490 2110
4dff95dc
SB
2111 if (!core || !pdentry) {
2112 ret = -EINVAL;
b2476490 2113 goto out;
4dff95dc 2114 }
b2476490 2115
4dff95dc
SB
2116 d = debugfs_create_dir(core->name, pdentry);
2117 if (!d)
b61c43c0 2118 goto out;
b61c43c0 2119
4dff95dc
SB
2120 core->dentry = d;
2121
2122 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2123 (u32 *)&core->rate);
2124 if (!d)
2125 goto err_out;
2126
2127 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2128 (u32 *)&core->accuracy);
2129 if (!d)
2130 goto err_out;
2131
2132 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2133 (u32 *)&core->phase);
2134 if (!d)
2135 goto err_out;
031dcc9b 2136
4dff95dc
SB
2137 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2138 (u32 *)&core->flags);
2139 if (!d)
2140 goto err_out;
031dcc9b 2141
4dff95dc
SB
2142 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2143 (u32 *)&core->prepare_count);
2144 if (!d)
2145 goto err_out;
b2476490 2146
4dff95dc
SB
2147 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2148 (u32 *)&core->enable_count);
2149 if (!d)
2150 goto err_out;
b2476490 2151
4dff95dc
SB
2152 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2153 (u32 *)&core->notifier_count);
2154 if (!d)
2155 goto err_out;
b2476490 2156
4dff95dc
SB
2157 if (core->ops->debug_init) {
2158 ret = core->ops->debug_init(core->hw, core->dentry);
2159 if (ret)
2160 goto err_out;
5279fc40 2161 }
b2476490 2162
4dff95dc
SB
2163 ret = 0;
2164 goto out;
b2476490 2165
4dff95dc
SB
2166err_out:
2167 debugfs_remove_recursive(core->dentry);
2168 core->dentry = NULL;
2169out:
b2476490
MT
2170 return ret;
2171}
035a61c3
TV
2172
2173/**
6e5ab41b
SB
2174 * clk_debug_register - add a clk node to the debugfs clk directory
2175 * @core: the clk being added to the debugfs clk directory
035a61c3 2176 *
6e5ab41b
SB
2177 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2178 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2179 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2180 */
4dff95dc 2181static int clk_debug_register(struct clk_core *core)
035a61c3 2182{
4dff95dc 2183 int ret = 0;
035a61c3 2184
4dff95dc
SB
2185 mutex_lock(&clk_debug_lock);
2186 hlist_add_head(&core->debug_node, &clk_debug_list);
2187
2188 if (!inited)
2189 goto unlock;
2190
2191 ret = clk_debug_create_one(core, rootdir);
2192unlock:
2193 mutex_unlock(&clk_debug_lock);
2194
2195 return ret;
035a61c3 2196}
b2476490 2197
4dff95dc 2198 /**
6e5ab41b
SB
2199 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2200 * @core: the clk being removed from the debugfs clk directory
e59c5371 2201 *
6e5ab41b
SB
2202 * Dynamically removes a clk and all its child nodes from the
2203 * debugfs clk directory if clk->dentry points to debugfs created by
4dff95dc 2204 * clk_debug_register in __clk_init.
e59c5371 2205 */
4dff95dc 2206static void clk_debug_unregister(struct clk_core *core)
e59c5371 2207{
4dff95dc
SB
2208 mutex_lock(&clk_debug_lock);
2209 hlist_del_init(&core->debug_node);
2210 debugfs_remove_recursive(core->dentry);
2211 core->dentry = NULL;
2212 mutex_unlock(&clk_debug_lock);
2213}
e59c5371 2214
4dff95dc
SB
2215struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2216 void *data, const struct file_operations *fops)
2217{
2218 struct dentry *d = NULL;
e59c5371 2219
4dff95dc
SB
2220 if (hw->core->dentry)
2221 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2222 fops);
e59c5371 2223
4dff95dc
SB
2224 return d;
2225}
2226EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2227
4dff95dc 2228/**
6e5ab41b 2229 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2230 *
6e5ab41b
SB
2231 * clks are often initialized very early during boot before memory can be
2232 * dynamically allocated and well before debugfs is setup. This function
2233 * populates the debugfs clk directory once at boot-time when we know that
2234 * debugfs is setup. It should only be called once at boot-time, all other clks
2235 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2236 */
2237static int __init clk_debug_init(void)
2238{
2239 struct clk_core *core;
2240 struct dentry *d;
dfc202ea 2241
4dff95dc 2242 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2243
4dff95dc
SB
2244 if (!rootdir)
2245 return -ENOMEM;
dfc202ea 2246
4dff95dc
SB
2247 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2248 &clk_summary_fops);
2249 if (!d)
2250 return -ENOMEM;
e59c5371 2251
4dff95dc
SB
2252 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2253 &clk_dump_fops);
2254 if (!d)
2255 return -ENOMEM;
e59c5371 2256
4dff95dc
SB
2257 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2258 &orphan_list, &clk_summary_fops);
2259 if (!d)
2260 return -ENOMEM;
e59c5371 2261
4dff95dc
SB
2262 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2263 &orphan_list, &clk_dump_fops);
2264 if (!d)
2265 return -ENOMEM;
e59c5371 2266
4dff95dc
SB
2267 mutex_lock(&clk_debug_lock);
2268 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2269 clk_debug_create_one(core, rootdir);
e59c5371 2270
4dff95dc
SB
2271 inited = 1;
2272 mutex_unlock(&clk_debug_lock);
e59c5371 2273
4dff95dc
SB
2274 return 0;
2275}
2276late_initcall(clk_debug_init);
2277#else
2278static inline int clk_debug_register(struct clk_core *core) { return 0; }
2279static inline void clk_debug_reparent(struct clk_core *core,
2280 struct clk_core *new_parent)
035a61c3 2281{
035a61c3 2282}
4dff95dc 2283static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2284{
3d3801ef 2285}
4dff95dc 2286#endif
3d3801ef 2287
b2476490
MT
2288/**
2289 * __clk_init - initialize the data structures in a struct clk
2290 * @dev: device initializing this clk, placeholder for now
2291 * @clk: clk being initialized
2292 *
035a61c3 2293 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2294 * parent and rate and sets them both.
b2476490 2295 */
b09d6d99 2296static int __clk_init(struct device *dev, struct clk *clk_user)
b2476490 2297{
d1302a36 2298 int i, ret = 0;
035a61c3 2299 struct clk_core *orphan;
b67bfe0d 2300 struct hlist_node *tmp2;
d6968fca 2301 struct clk_core *core;
1c8e6004 2302 unsigned long rate;
b2476490 2303
035a61c3 2304 if (!clk_user)
d1302a36 2305 return -EINVAL;
b2476490 2306
d6968fca 2307 core = clk_user->core;
035a61c3 2308
eab89f69 2309 clk_prepare_lock();
b2476490
MT
2310
2311 /* check to see if a clock with this name is already registered */
d6968fca 2312 if (clk_core_lookup(core->name)) {
d1302a36 2313 pr_debug("%s: clk %s already initialized\n",
d6968fca 2314 __func__, core->name);
d1302a36 2315 ret = -EEXIST;
b2476490 2316 goto out;
d1302a36 2317 }
b2476490 2318
d4d7e3dd 2319 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2320 if (core->ops->set_rate &&
2321 !((core->ops->round_rate || core->ops->determine_rate) &&
2322 core->ops->recalc_rate)) {
71472c0c 2323 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d6968fca 2324 __func__, core->name);
d1302a36 2325 ret = -EINVAL;
d4d7e3dd
MT
2326 goto out;
2327 }
2328
d6968fca 2329 if (core->ops->set_parent && !core->ops->get_parent) {
d4d7e3dd 2330 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
d6968fca 2331 __func__, core->name);
d1302a36 2332 ret = -EINVAL;
d4d7e3dd
MT
2333 goto out;
2334 }
2335
d6968fca
SB
2336 if (core->ops->set_rate_and_parent &&
2337 !(core->ops->set_parent && core->ops->set_rate)) {
3fa2252b 2338 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2339 __func__, core->name);
3fa2252b
SB
2340 ret = -EINVAL;
2341 goto out;
2342 }
2343
b2476490 2344 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2345 for (i = 0; i < core->num_parents; i++)
2346 WARN(!core->parent_names[i],
b2476490 2347 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2348 __func__, core->name);
b2476490
MT
2349
2350 /*
2351 * Allocate an array of struct clk *'s to avoid unnecessary string
2352 * look-ups of clk's possible parents. This can fail for clocks passed
d6968fca 2353 * in to clk_init during early boot; thus any access to core->parents[]
b2476490
MT
2354 * must always check for a NULL pointer and try to populate it if
2355 * necessary.
2356 *
d6968fca
SB
2357 * If core->parents is not NULL we skip this entire block. This allows
2358 * for clock drivers to statically initialize core->parents.
b2476490 2359 */
d6968fca
SB
2360 if (core->num_parents > 1 && !core->parents) {
2361 core->parents = kcalloc(core->num_parents, sizeof(struct clk *),
96a7ed90 2362 GFP_KERNEL);
b2476490 2363 /*
035a61c3 2364 * clk_core_lookup returns NULL for parents that have not been
b2476490
MT
2365 * clk_init'd; thus any access to clk->parents[] must check
2366 * for a NULL pointer. We can always perform lazy lookups for
2367 * missing parents later on.
2368 */
d6968fca
SB
2369 if (core->parents)
2370 for (i = 0; i < core->num_parents; i++)
2371 core->parents[i] =
2372 clk_core_lookup(core->parent_names[i]);
b2476490
MT
2373 }
2374
d6968fca 2375 core->parent = __clk_init_parent(core);
b2476490
MT
2376
2377 /*
d6968fca 2378 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2379 * parent has not yet been __clk_init'd then place clk in the orphan
2380 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2381 * clk list.
2382 *
2383 * Every time a new clk is clk_init'd then we walk the list of orphan
2384 * clocks and re-parent any that are children of the clock currently
2385 * being clk_init'd.
2386 */
e6500344 2387 if (core->parent) {
d6968fca
SB
2388 hlist_add_head(&core->child_node,
2389 &core->parent->children);
e6500344
HS
2390 core->orphan = core->parent->orphan;
2391 } else if (core->flags & CLK_IS_ROOT) {
d6968fca 2392 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
2393 core->orphan = false;
2394 } else {
d6968fca 2395 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
2396 core->orphan = true;
2397 }
b2476490 2398
5279fc40
BB
2399 /*
2400 * Set clk's accuracy. The preferred method is to use
2401 * .recalc_accuracy. For simple clocks and lazy developers the default
2402 * fallback is to use the parent's accuracy. If a clock doesn't have a
2403 * parent (or is orphaned) then accuracy is set to zero (perfect
2404 * clock).
2405 */
d6968fca
SB
2406 if (core->ops->recalc_accuracy)
2407 core->accuracy = core->ops->recalc_accuracy(core->hw,
2408 __clk_get_accuracy(core->parent));
2409 else if (core->parent)
2410 core->accuracy = core->parent->accuracy;
5279fc40 2411 else
d6968fca 2412 core->accuracy = 0;
5279fc40 2413
9824cf73
MR
2414 /*
2415 * Set clk's phase.
2416 * Since a phase is by definition relative to its parent, just
2417 * query the current clock phase, or just assume it's in phase.
2418 */
d6968fca
SB
2419 if (core->ops->get_phase)
2420 core->phase = core->ops->get_phase(core->hw);
9824cf73 2421 else
d6968fca 2422 core->phase = 0;
9824cf73 2423
b2476490
MT
2424 /*
2425 * Set clk's rate. The preferred method is to use .recalc_rate. For
2426 * simple clocks and lazy developers the default fallback is to use the
2427 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2428 * then rate is set to zero.
2429 */
d6968fca
SB
2430 if (core->ops->recalc_rate)
2431 rate = core->ops->recalc_rate(core->hw,
2432 clk_core_get_rate_nolock(core->parent));
2433 else if (core->parent)
2434 rate = core->parent->rate;
b2476490 2435 else
1c8e6004 2436 rate = 0;
d6968fca 2437 core->rate = core->req_rate = rate;
b2476490
MT
2438
2439 /*
2440 * walk the list of orphan clocks and reparent any that are children of
2441 * this clock
2442 */
b67bfe0d 2443 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2444 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2445 i = orphan->ops->get_parent(orphan->hw);
d6968fca
SB
2446 if (!strcmp(core->name, orphan->parent_names[i]))
2447 clk_core_reparent(orphan, core);
1f61e5f1
MF
2448 continue;
2449 }
2450
b2476490 2451 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2452 if (!strcmp(core->name, orphan->parent_names[i])) {
2453 clk_core_reparent(orphan, core);
b2476490
MT
2454 break;
2455 }
1f61e5f1 2456 }
b2476490
MT
2457
2458 /*
2459 * optional platform-specific magic
2460 *
2461 * The .init callback is not used by any of the basic clock types, but
2462 * exists for weird hardware that must perform initialization magic.
2463 * Please consider other ways of solving initialization problems before
24ee1a08 2464 * using this callback, as its use is discouraged.
b2476490 2465 */
d6968fca
SB
2466 if (core->ops->init)
2467 core->ops->init(core->hw);
b2476490 2468
d6968fca 2469 kref_init(&core->ref);
b2476490 2470out:
eab89f69 2471 clk_prepare_unlock();
b2476490 2472
89f7e9de 2473 if (!ret)
d6968fca 2474 clk_debug_register(core);
89f7e9de 2475
d1302a36 2476 return ret;
b2476490
MT
2477}
2478
035a61c3
TV
2479struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2480 const char *con_id)
0197b3ea 2481{
0197b3ea
SK
2482 struct clk *clk;
2483
035a61c3
TV
2484 /* This is to allow this function to be chained to others */
2485 if (!hw || IS_ERR(hw))
2486 return (struct clk *) hw;
0197b3ea 2487
035a61c3
TV
2488 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2489 if (!clk)
2490 return ERR_PTR(-ENOMEM);
2491
2492 clk->core = hw->core;
2493 clk->dev_id = dev_id;
2494 clk->con_id = con_id;
1c8e6004
TV
2495 clk->max_rate = ULONG_MAX;
2496
2497 clk_prepare_lock();
50595f8b 2498 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2499 clk_prepare_unlock();
0197b3ea
SK
2500
2501 return clk;
2502}
035a61c3 2503
73e0e496 2504void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2505{
2506 clk_prepare_lock();
50595f8b 2507 hlist_del(&clk->clks_node);
1c8e6004
TV
2508 clk_prepare_unlock();
2509
2510 kfree(clk);
2511}
0197b3ea 2512
293ba3b4
SB
2513/**
2514 * clk_register - allocate a new clock, register it and return an opaque cookie
2515 * @dev: device that is registering this clock
2516 * @hw: link to hardware-specific clock data
2517 *
2518 * clk_register is the primary interface for populating the clock tree with new
2519 * clock nodes. It returns a pointer to the newly allocated struct clk which
a59a5163 2520 * cannot be dereferenced by driver code but may be used in conjunction with the
293ba3b4
SB
2521 * rest of the clock API. In the event of an error clk_register will return an
2522 * error code; drivers must test for an error code after calling clk_register.
2523 */
2524struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2525{
d1302a36 2526 int i, ret;
d6968fca 2527 struct clk_core *core;
293ba3b4 2528
d6968fca
SB
2529 core = kzalloc(sizeof(*core), GFP_KERNEL);
2530 if (!core) {
293ba3b4
SB
2531 ret = -ENOMEM;
2532 goto fail_out;
2533 }
b2476490 2534
d6968fca
SB
2535 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2536 if (!core->name) {
0197b3ea
SK
2537 ret = -ENOMEM;
2538 goto fail_name;
2539 }
d6968fca 2540 core->ops = hw->init->ops;
ac2df527 2541 if (dev && dev->driver)
d6968fca
SB
2542 core->owner = dev->driver->owner;
2543 core->hw = hw;
2544 core->flags = hw->init->flags;
2545 core->num_parents = hw->init->num_parents;
9783c0d9
SB
2546 core->min_rate = 0;
2547 core->max_rate = ULONG_MAX;
d6968fca 2548 hw->core = core;
b2476490 2549
d1302a36 2550 /* allocate local copy in case parent_names is __initdata */
d6968fca 2551 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2552 GFP_KERNEL);
d1302a36 2553
d6968fca 2554 if (!core->parent_names) {
d1302a36
MT
2555 ret = -ENOMEM;
2556 goto fail_parent_names;
2557 }
2558
2559
2560 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2561 for (i = 0; i < core->num_parents; i++) {
2562 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2563 GFP_KERNEL);
d6968fca 2564 if (!core->parent_names[i]) {
d1302a36
MT
2565 ret = -ENOMEM;
2566 goto fail_parent_names_copy;
2567 }
2568 }
2569
d6968fca 2570 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2571
035a61c3
TV
2572 hw->clk = __clk_create_clk(hw, NULL, NULL);
2573 if (IS_ERR(hw->clk)) {
035a61c3
TV
2574 ret = PTR_ERR(hw->clk);
2575 goto fail_parent_names_copy;
2576 }
2577
2578 ret = __clk_init(dev, hw->clk);
d1302a36 2579 if (!ret)
035a61c3 2580 return hw->clk;
b2476490 2581
1c8e6004 2582 __clk_free_clk(hw->clk);
035a61c3 2583 hw->clk = NULL;
b2476490 2584
d1302a36
MT
2585fail_parent_names_copy:
2586 while (--i >= 0)
d6968fca
SB
2587 kfree_const(core->parent_names[i]);
2588 kfree(core->parent_names);
d1302a36 2589fail_parent_names:
d6968fca 2590 kfree_const(core->name);
0197b3ea 2591fail_name:
d6968fca 2592 kfree(core);
d1302a36
MT
2593fail_out:
2594 return ERR_PTR(ret);
b2476490
MT
2595}
2596EXPORT_SYMBOL_GPL(clk_register);
2597
6e5ab41b 2598/* Free memory allocated for a clock. */
fcb0ee6a
SN
2599static void __clk_release(struct kref *ref)
2600{
d6968fca
SB
2601 struct clk_core *core = container_of(ref, struct clk_core, ref);
2602 int i = core->num_parents;
fcb0ee6a 2603
496eadf8
KK
2604 lockdep_assert_held(&prepare_lock);
2605
d6968fca 2606 kfree(core->parents);
fcb0ee6a 2607 while (--i >= 0)
d6968fca 2608 kfree_const(core->parent_names[i]);
fcb0ee6a 2609
d6968fca
SB
2610 kfree(core->parent_names);
2611 kfree_const(core->name);
2612 kfree(core);
fcb0ee6a
SN
2613}
2614
2615/*
2616 * Empty clk_ops for unregistered clocks. These are used temporarily
2617 * after clk_unregister() was called on a clock and until last clock
2618 * consumer calls clk_put() and the struct clk object is freed.
2619 */
2620static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2621{
2622 return -ENXIO;
2623}
2624
2625static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2626{
2627 WARN_ON_ONCE(1);
2628}
2629
2630static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2631 unsigned long parent_rate)
2632{
2633 return -ENXIO;
2634}
2635
2636static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2637{
2638 return -ENXIO;
2639}
2640
2641static const struct clk_ops clk_nodrv_ops = {
2642 .enable = clk_nodrv_prepare_enable,
2643 .disable = clk_nodrv_disable_unprepare,
2644 .prepare = clk_nodrv_prepare_enable,
2645 .unprepare = clk_nodrv_disable_unprepare,
2646 .set_rate = clk_nodrv_set_rate,
2647 .set_parent = clk_nodrv_set_parent,
2648};
2649
1df5c939
MB
2650/**
2651 * clk_unregister - unregister a currently registered clock
2652 * @clk: clock to unregister
1df5c939 2653 */
fcb0ee6a
SN
2654void clk_unregister(struct clk *clk)
2655{
2656 unsigned long flags;
2657
6314b679
SB
2658 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2659 return;
2660
035a61c3 2661 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2662
2663 clk_prepare_lock();
2664
035a61c3
TV
2665 if (clk->core->ops == &clk_nodrv_ops) {
2666 pr_err("%s: unregistered clock: %s\n", __func__,
2667 clk->core->name);
6314b679 2668 return;
fcb0ee6a
SN
2669 }
2670 /*
2671 * Assign empty clock ops for consumers that might still hold
2672 * a reference to this clock.
2673 */
2674 flags = clk_enable_lock();
035a61c3 2675 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2676 clk_enable_unlock(flags);
2677
035a61c3
TV
2678 if (!hlist_empty(&clk->core->children)) {
2679 struct clk_core *child;
874f224c 2680 struct hlist_node *t;
fcb0ee6a
SN
2681
2682 /* Reparent all children to the orphan list. */
035a61c3
TV
2683 hlist_for_each_entry_safe(child, t, &clk->core->children,
2684 child_node)
2685 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2686 }
2687
035a61c3 2688 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2689
035a61c3 2690 if (clk->core->prepare_count)
fcb0ee6a 2691 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2692 __func__, clk->core->name);
2693 kref_put(&clk->core->ref, __clk_release);
6314b679 2694
fcb0ee6a
SN
2695 clk_prepare_unlock();
2696}
1df5c939
MB
2697EXPORT_SYMBOL_GPL(clk_unregister);
2698
46c8773a
SB
2699static void devm_clk_release(struct device *dev, void *res)
2700{
293ba3b4 2701 clk_unregister(*(struct clk **)res);
46c8773a
SB
2702}
2703
2704/**
2705 * devm_clk_register - resource managed clk_register()
2706 * @dev: device that is registering this clock
2707 * @hw: link to hardware-specific clock data
2708 *
2709 * Managed clk_register(). Clocks returned from this function are
2710 * automatically clk_unregister()ed on driver detach. See clk_register() for
2711 * more information.
2712 */
2713struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2714{
2715 struct clk *clk;
293ba3b4 2716 struct clk **clkp;
46c8773a 2717
293ba3b4
SB
2718 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2719 if (!clkp)
46c8773a
SB
2720 return ERR_PTR(-ENOMEM);
2721
293ba3b4
SB
2722 clk = clk_register(dev, hw);
2723 if (!IS_ERR(clk)) {
2724 *clkp = clk;
2725 devres_add(dev, clkp);
46c8773a 2726 } else {
293ba3b4 2727 devres_free(clkp);
46c8773a
SB
2728 }
2729
2730 return clk;
2731}
2732EXPORT_SYMBOL_GPL(devm_clk_register);
2733
2734static int devm_clk_match(struct device *dev, void *res, void *data)
2735{
2736 struct clk *c = res;
2737 if (WARN_ON(!c))
2738 return 0;
2739 return c == data;
2740}
2741
2742/**
2743 * devm_clk_unregister - resource managed clk_unregister()
2744 * @clk: clock to unregister
2745 *
2746 * Deallocate a clock allocated with devm_clk_register(). Normally
2747 * this function will not need to be called and the resource management
2748 * code will ensure that the resource is freed.
2749 */
2750void devm_clk_unregister(struct device *dev, struct clk *clk)
2751{
2752 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2753}
2754EXPORT_SYMBOL_GPL(devm_clk_unregister);
2755
ac2df527
SN
2756/*
2757 * clkdev helpers
2758 */
2759int __clk_get(struct clk *clk)
2760{
035a61c3
TV
2761 struct clk_core *core = !clk ? NULL : clk->core;
2762
2763 if (core) {
2764 if (!try_module_get(core->owner))
00efcb1c 2765 return 0;
ac2df527 2766
035a61c3 2767 kref_get(&core->ref);
00efcb1c 2768 }
ac2df527
SN
2769 return 1;
2770}
2771
2772void __clk_put(struct clk *clk)
2773{
10cdfe54
TV
2774 struct module *owner;
2775
00efcb1c 2776 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2777 return;
2778
fcb0ee6a 2779 clk_prepare_lock();
1c8e6004 2780
50595f8b 2781 hlist_del(&clk->clks_node);
ec02ace8
TV
2782 if (clk->min_rate > clk->core->req_rate ||
2783 clk->max_rate < clk->core->req_rate)
2784 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2785
1c8e6004
TV
2786 owner = clk->core->owner;
2787 kref_put(&clk->core->ref, __clk_release);
2788
fcb0ee6a
SN
2789 clk_prepare_unlock();
2790
10cdfe54 2791 module_put(owner);
035a61c3 2792
035a61c3 2793 kfree(clk);
ac2df527
SN
2794}
2795
b2476490
MT
2796/*** clk rate change notifiers ***/
2797
2798/**
2799 * clk_notifier_register - add a clk rate change notifier
2800 * @clk: struct clk * to watch
2801 * @nb: struct notifier_block * with callback info
2802 *
2803 * Request notification when clk's rate changes. This uses an SRCU
2804 * notifier because we want it to block and notifier unregistrations are
2805 * uncommon. The callbacks associated with the notifier must not
2806 * re-enter into the clk framework by calling any top-level clk APIs;
2807 * this will cause a nested prepare_lock mutex.
2808 *
5324fda7
SB
2809 * In all notification cases cases (pre, post and abort rate change) the
2810 * original clock rate is passed to the callback via struct
2811 * clk_notifier_data.old_rate and the new frequency is passed via struct
b2476490
MT
2812 * clk_notifier_data.new_rate.
2813 *
b2476490
MT
2814 * clk_notifier_register() must be called from non-atomic context.
2815 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2816 * allocation failure; otherwise, passes along the return value of
2817 * srcu_notifier_chain_register().
2818 */
2819int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2820{
2821 struct clk_notifier *cn;
2822 int ret = -ENOMEM;
2823
2824 if (!clk || !nb)
2825 return -EINVAL;
2826
eab89f69 2827 clk_prepare_lock();
b2476490
MT
2828
2829 /* search the list of notifiers for this clk */
2830 list_for_each_entry(cn, &clk_notifier_list, node)
2831 if (cn->clk == clk)
2832 break;
2833
2834 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2835 if (cn->clk != clk) {
2836 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2837 if (!cn)
2838 goto out;
2839
2840 cn->clk = clk;
2841 srcu_init_notifier_head(&cn->notifier_head);
2842
2843 list_add(&cn->node, &clk_notifier_list);
2844 }
2845
2846 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2847
035a61c3 2848 clk->core->notifier_count++;
b2476490
MT
2849
2850out:
eab89f69 2851 clk_prepare_unlock();
b2476490
MT
2852
2853 return ret;
2854}
2855EXPORT_SYMBOL_GPL(clk_notifier_register);
2856
2857/**
2858 * clk_notifier_unregister - remove a clk rate change notifier
2859 * @clk: struct clk *
2860 * @nb: struct notifier_block * with callback info
2861 *
2862 * Request no further notification for changes to 'clk' and frees memory
2863 * allocated in clk_notifier_register.
2864 *
2865 * Returns -EINVAL if called with null arguments; otherwise, passes
2866 * along the return value of srcu_notifier_chain_unregister().
2867 */
2868int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2869{
2870 struct clk_notifier *cn = NULL;
2871 int ret = -EINVAL;
2872
2873 if (!clk || !nb)
2874 return -EINVAL;
2875
eab89f69 2876 clk_prepare_lock();
b2476490
MT
2877
2878 list_for_each_entry(cn, &clk_notifier_list, node)
2879 if (cn->clk == clk)
2880 break;
2881
2882 if (cn->clk == clk) {
2883 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2884
035a61c3 2885 clk->core->notifier_count--;
b2476490
MT
2886
2887 /* XXX the notifier code should handle this better */
2888 if (!cn->notifier_head.head) {
2889 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2890 list_del(&cn->node);
b2476490
MT
2891 kfree(cn);
2892 }
2893
2894 } else {
2895 ret = -ENOENT;
2896 }
2897
eab89f69 2898 clk_prepare_unlock();
b2476490
MT
2899
2900 return ret;
2901}
2902EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2903
2904#ifdef CONFIG_OF
2905/**
2906 * struct of_clk_provider - Clock provider registration structure
2907 * @link: Entry in global list of clock providers
2908 * @node: Pointer to device tree node of clock provider
2909 * @get: Get clock callback. Returns NULL or a struct clk for the
2910 * given clock specifier
2911 * @data: context pointer to be passed into @get callback
2912 */
2913struct of_clk_provider {
2914 struct list_head link;
2915
2916 struct device_node *node;
2917 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2918 void *data;
2919};
2920
f2f6c255
PG
2921static const struct of_device_id __clk_of_table_sentinel
2922 __used __section(__clk_of_table_end);
2923
766e6a4e 2924static LIST_HEAD(of_clk_providers);
d6782c26
SN
2925static DEFINE_MUTEX(of_clk_mutex);
2926
766e6a4e
GL
2927struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2928 void *data)
2929{
2930 return data;
2931}
2932EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2933
494bfec9
SG
2934struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2935{
2936 struct clk_onecell_data *clk_data = data;
2937 unsigned int idx = clkspec->args[0];
2938
2939 if (idx >= clk_data->clk_num) {
2940 pr_err("%s: invalid clock index %d\n", __func__, idx);
2941 return ERR_PTR(-EINVAL);
2942 }
2943
2944 return clk_data->clks[idx];
2945}
2946EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2947
766e6a4e
GL
2948/**
2949 * of_clk_add_provider() - Register a clock provider for a node
2950 * @np: Device node pointer associated with clock provider
2951 * @clk_src_get: callback for decoding clock
2952 * @data: context pointer for @clk_src_get callback.
2953 */
2954int of_clk_add_provider(struct device_node *np,
2955 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2956 void *data),
2957 void *data)
2958{
2959 struct of_clk_provider *cp;
86be408b 2960 int ret;
766e6a4e
GL
2961
2962 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2963 if (!cp)
2964 return -ENOMEM;
2965
2966 cp->node = of_node_get(np);
2967 cp->data = data;
2968 cp->get = clk_src_get;
2969
d6782c26 2970 mutex_lock(&of_clk_mutex);
766e6a4e 2971 list_add(&cp->link, &of_clk_providers);
d6782c26 2972 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2973 pr_debug("Added clock from %s\n", np->full_name);
2974
86be408b
SN
2975 ret = of_clk_set_defaults(np, true);
2976 if (ret < 0)
2977 of_clk_del_provider(np);
2978
2979 return ret;
766e6a4e
GL
2980}
2981EXPORT_SYMBOL_GPL(of_clk_add_provider);
2982
2983/**
2984 * of_clk_del_provider() - Remove a previously registered clock provider
2985 * @np: Device node pointer associated with clock provider
2986 */
2987void of_clk_del_provider(struct device_node *np)
2988{
2989 struct of_clk_provider *cp;
2990
d6782c26 2991 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2992 list_for_each_entry(cp, &of_clk_providers, link) {
2993 if (cp->node == np) {
2994 list_del(&cp->link);
2995 of_node_put(cp->node);
2996 kfree(cp);
2997 break;
2998 }
2999 }
d6782c26 3000 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
3001}
3002EXPORT_SYMBOL_GPL(of_clk_del_provider);
3003
73e0e496
SB
3004struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3005 const char *dev_id, const char *con_id)
766e6a4e
GL
3006{
3007 struct of_clk_provider *provider;
a34cd466 3008 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 3009
306c342f
SB
3010 if (!clkspec)
3011 return ERR_PTR(-EINVAL);
3012
766e6a4e 3013 /* Check if we have such a provider in our array */
306c342f 3014 mutex_lock(&of_clk_mutex);
766e6a4e
GL
3015 list_for_each_entry(provider, &of_clk_providers, link) {
3016 if (provider->node == clkspec->np)
3017 clk = provider->get(clkspec, provider->data);
73e0e496
SB
3018 if (!IS_ERR(clk)) {
3019 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
3020 con_id);
3021
3022 if (!IS_ERR(clk) && !__clk_get(clk)) {
3023 __clk_free_clk(clk);
3024 clk = ERR_PTR(-ENOENT);
3025 }
3026
766e6a4e 3027 break;
73e0e496 3028 }
766e6a4e 3029 }
306c342f 3030 mutex_unlock(&of_clk_mutex);
d6782c26
SN
3031
3032 return clk;
3033}
3034
306c342f
SB
3035/**
3036 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3037 * @clkspec: pointer to a clock specifier data structure
3038 *
3039 * This function looks up a struct clk from the registered list of clock
3040 * providers, an input is a clock specifier data structure as returned
3041 * from the of_parse_phandle_with_args() function call.
3042 */
d6782c26
SN
3043struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
3044{
306c342f 3045 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
3046}
3047
f6102742
MT
3048int of_clk_get_parent_count(struct device_node *np)
3049{
3050 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
3051}
3052EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
3053
766e6a4e
GL
3054const char *of_clk_get_parent_name(struct device_node *np, int index)
3055{
3056 struct of_phandle_args clkspec;
7a0fc1a3 3057 struct property *prop;
766e6a4e 3058 const char *clk_name;
7a0fc1a3
BD
3059 const __be32 *vp;
3060 u32 pv;
766e6a4e 3061 int rc;
7a0fc1a3 3062 int count;
766e6a4e
GL
3063
3064 if (index < 0)
3065 return NULL;
3066
3067 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
3068 &clkspec);
3069 if (rc)
3070 return NULL;
3071
7a0fc1a3
BD
3072 index = clkspec.args_count ? clkspec.args[0] : 0;
3073 count = 0;
3074
3075 /* if there is an indices property, use it to transfer the index
3076 * specified into an array offset for the clock-output-names property.
3077 */
3078 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
3079 if (index == pv) {
3080 index = count;
3081 break;
3082 }
3083 count++;
3084 }
3085
766e6a4e 3086 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 3087 index,
766e6a4e
GL
3088 &clk_name) < 0)
3089 clk_name = clkspec.np->name;
3090
3091 of_node_put(clkspec.np);
3092 return clk_name;
3093}
3094EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3095
2e61dfb3
DN
3096/**
3097 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
3098 * number of parents
3099 * @np: Device node pointer associated with clock provider
3100 * @parents: pointer to char array that hold the parents' names
3101 * @size: size of the @parents array
3102 *
3103 * Return: number of parents for the clock node.
3104 */
3105int of_clk_parent_fill(struct device_node *np, const char **parents,
3106 unsigned int size)
3107{
3108 unsigned int i = 0;
3109
3110 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
3111 i++;
3112
3113 return i;
3114}
3115EXPORT_SYMBOL_GPL(of_clk_parent_fill);
3116
1771b10d
GC
3117struct clock_provider {
3118 of_clk_init_cb_t clk_init_cb;
3119 struct device_node *np;
3120 struct list_head node;
3121};
3122
1771b10d
GC
3123/*
3124 * This function looks for a parent clock. If there is one, then it
3125 * checks that the provider for this parent clock was initialized, in
3126 * this case the parent clock will be ready.
3127 */
3128static int parent_ready(struct device_node *np)
3129{
3130 int i = 0;
3131
3132 while (true) {
3133 struct clk *clk = of_clk_get(np, i);
3134
3135 /* this parent is ready we can check the next one */
3136 if (!IS_ERR(clk)) {
3137 clk_put(clk);
3138 i++;
3139 continue;
3140 }
3141
3142 /* at least one parent is not ready, we exit now */
3143 if (PTR_ERR(clk) == -EPROBE_DEFER)
3144 return 0;
3145
3146 /*
3147 * Here we make assumption that the device tree is
3148 * written correctly. So an error means that there is
3149 * no more parent. As we didn't exit yet, then the
3150 * previous parent are ready. If there is no clock
3151 * parent, no need to wait for them, then we can
3152 * consider their absence as being ready
3153 */
3154 return 1;
3155 }
3156}
3157
766e6a4e
GL
3158/**
3159 * of_clk_init() - Scan and init clock providers from the DT
3160 * @matches: array of compatible values and init functions for providers.
3161 *
1771b10d 3162 * This function scans the device tree for matching clock providers
e5ca8fb4 3163 * and calls their initialization functions. It also does it by trying
1771b10d 3164 * to follow the dependencies.
766e6a4e
GL
3165 */
3166void __init of_clk_init(const struct of_device_id *matches)
3167{
7f7ed584 3168 const struct of_device_id *match;
766e6a4e 3169 struct device_node *np;
1771b10d
GC
3170 struct clock_provider *clk_provider, *next;
3171 bool is_init_done;
3172 bool force = false;
2573a02a 3173 LIST_HEAD(clk_provider_list);
766e6a4e 3174
f2f6c255 3175 if (!matches)
819b4861 3176 matches = &__clk_of_table;
f2f6c255 3177
1771b10d 3178 /* First prepare the list of the clocks providers */
7f7ed584 3179 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
3180 struct clock_provider *parent;
3181
3182 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
3183 if (!parent) {
3184 list_for_each_entry_safe(clk_provider, next,
3185 &clk_provider_list, node) {
3186 list_del(&clk_provider->node);
3187 kfree(clk_provider);
3188 }
3189 return;
3190 }
1771b10d
GC
3191
3192 parent->clk_init_cb = match->data;
3193 parent->np = np;
3f6d439f 3194 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3195 }
3196
3197 while (!list_empty(&clk_provider_list)) {
3198 is_init_done = false;
3199 list_for_each_entry_safe(clk_provider, next,
3200 &clk_provider_list, node) {
3201 if (force || parent_ready(clk_provider->np)) {
86be408b 3202
1771b10d 3203 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3204 of_clk_set_defaults(clk_provider->np, true);
3205
1771b10d
GC
3206 list_del(&clk_provider->node);
3207 kfree(clk_provider);
3208 is_init_done = true;
3209 }
3210 }
3211
3212 /*
e5ca8fb4 3213 * We didn't manage to initialize any of the
1771b10d
GC
3214 * remaining providers during the last loop, so now we
3215 * initialize all the remaining ones unconditionally
3216 * in case the clock parent was not mandatory
3217 */
3218 if (!is_init_done)
3219 force = true;
766e6a4e
GL
3220 }
3221}
3222#endif
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