clk: Hi6220: add stub clock driver
[deliverable/linux.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
3c373117 12#include <linux/clk.h>
b09d6d99 13#include <linux/clk-provider.h>
86be408b 14#include <linux/clk/clk-conf.h>
b2476490
MT
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spinlock.h>
18#include <linux/err.h>
19#include <linux/list.h>
20#include <linux/slab.h>
766e6a4e 21#include <linux/of.h>
46c8773a 22#include <linux/device.h>
f2f6c255 23#include <linux/init.h>
533ddeb1 24#include <linux/sched.h>
562ef0b0 25#include <linux/clkdev.h>
b2476490 26
d6782c26
SN
27#include "clk.h"
28
b2476490
MT
29static DEFINE_SPINLOCK(enable_lock);
30static DEFINE_MUTEX(prepare_lock);
31
533ddeb1
MT
32static struct task_struct *prepare_owner;
33static struct task_struct *enable_owner;
34
35static int prepare_refcnt;
36static int enable_refcnt;
37
b2476490
MT
38static HLIST_HEAD(clk_root_list);
39static HLIST_HEAD(clk_orphan_list);
40static LIST_HEAD(clk_notifier_list);
41
b09d6d99
MT
42/*** private data structures ***/
43
44struct clk_core {
45 const char *name;
46 const struct clk_ops *ops;
47 struct clk_hw *hw;
48 struct module *owner;
49 struct clk_core *parent;
50 const char **parent_names;
51 struct clk_core **parents;
52 u8 num_parents;
53 u8 new_parent_index;
54 unsigned long rate;
1c8e6004 55 unsigned long req_rate;
b09d6d99
MT
56 unsigned long new_rate;
57 struct clk_core *new_parent;
58 struct clk_core *new_child;
59 unsigned long flags;
e6500344 60 bool orphan;
b09d6d99
MT
61 unsigned int enable_count;
62 unsigned int prepare_count;
9783c0d9
SB
63 unsigned long min_rate;
64 unsigned long max_rate;
b09d6d99
MT
65 unsigned long accuracy;
66 int phase;
67 struct hlist_head children;
68 struct hlist_node child_node;
1c8e6004 69 struct hlist_head clks;
b09d6d99
MT
70 unsigned int notifier_count;
71#ifdef CONFIG_DEBUG_FS
72 struct dentry *dentry;
8c9a8a8f 73 struct hlist_node debug_node;
b09d6d99
MT
74#endif
75 struct kref ref;
76};
77
dfc202ea
SB
78#define CREATE_TRACE_POINTS
79#include <trace/events/clk.h>
80
b09d6d99
MT
81struct clk {
82 struct clk_core *core;
83 const char *dev_id;
84 const char *con_id;
1c8e6004
TV
85 unsigned long min_rate;
86 unsigned long max_rate;
50595f8b 87 struct hlist_node clks_node;
b09d6d99
MT
88};
89
eab89f69
MT
90/*** locking ***/
91static void clk_prepare_lock(void)
92{
533ddeb1
MT
93 if (!mutex_trylock(&prepare_lock)) {
94 if (prepare_owner == current) {
95 prepare_refcnt++;
96 return;
97 }
98 mutex_lock(&prepare_lock);
99 }
100 WARN_ON_ONCE(prepare_owner != NULL);
101 WARN_ON_ONCE(prepare_refcnt != 0);
102 prepare_owner = current;
103 prepare_refcnt = 1;
eab89f69
MT
104}
105
106static void clk_prepare_unlock(void)
107{
533ddeb1
MT
108 WARN_ON_ONCE(prepare_owner != current);
109 WARN_ON_ONCE(prepare_refcnt == 0);
110
111 if (--prepare_refcnt)
112 return;
113 prepare_owner = NULL;
eab89f69
MT
114 mutex_unlock(&prepare_lock);
115}
116
117static unsigned long clk_enable_lock(void)
a57aa185 118 __acquires(enable_lock)
eab89f69
MT
119{
120 unsigned long flags;
533ddeb1
MT
121
122 if (!spin_trylock_irqsave(&enable_lock, flags)) {
123 if (enable_owner == current) {
124 enable_refcnt++;
a57aa185 125 __acquire(enable_lock);
533ddeb1
MT
126 return flags;
127 }
128 spin_lock_irqsave(&enable_lock, flags);
129 }
130 WARN_ON_ONCE(enable_owner != NULL);
131 WARN_ON_ONCE(enable_refcnt != 0);
132 enable_owner = current;
133 enable_refcnt = 1;
eab89f69
MT
134 return flags;
135}
136
137static void clk_enable_unlock(unsigned long flags)
a57aa185 138 __releases(enable_lock)
eab89f69 139{
533ddeb1
MT
140 WARN_ON_ONCE(enable_owner != current);
141 WARN_ON_ONCE(enable_refcnt == 0);
142
a57aa185
SB
143 if (--enable_refcnt) {
144 __release(enable_lock);
533ddeb1 145 return;
a57aa185 146 }
533ddeb1 147 enable_owner = NULL;
eab89f69
MT
148 spin_unlock_irqrestore(&enable_lock, flags);
149}
150
4dff95dc
SB
151static bool clk_core_is_prepared(struct clk_core *core)
152{
153 /*
154 * .is_prepared is optional for clocks that can prepare
155 * fall back to software usage counter if it is missing
156 */
157 if (!core->ops->is_prepared)
158 return core->prepare_count;
b2476490 159
4dff95dc
SB
160 return core->ops->is_prepared(core->hw);
161}
b2476490 162
4dff95dc
SB
163static bool clk_core_is_enabled(struct clk_core *core)
164{
165 /*
166 * .is_enabled is only mandatory for clocks that gate
167 * fall back to software usage counter if .is_enabled is missing
168 */
169 if (!core->ops->is_enabled)
170 return core->enable_count;
6b44c854 171
4dff95dc
SB
172 return core->ops->is_enabled(core->hw);
173}
6b44c854 174
4dff95dc 175static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 176{
4dff95dc
SB
177 struct clk_core *child;
178
179 lockdep_assert_held(&prepare_lock);
180
181 hlist_for_each_entry(child, &core->children, child_node)
182 clk_unprepare_unused_subtree(child);
183
184 if (core->prepare_count)
1af599df
PG
185 return;
186
4dff95dc
SB
187 if (core->flags & CLK_IGNORE_UNUSED)
188 return;
189
190 if (clk_core_is_prepared(core)) {
191 trace_clk_unprepare(core);
192 if (core->ops->unprepare_unused)
193 core->ops->unprepare_unused(core->hw);
194 else if (core->ops->unprepare)
195 core->ops->unprepare(core->hw);
196 trace_clk_unprepare_complete(core);
197 }
1af599df
PG
198}
199
4dff95dc 200static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 201{
035a61c3 202 struct clk_core *child;
4dff95dc 203 unsigned long flags;
1af599df 204
4dff95dc 205 lockdep_assert_held(&prepare_lock);
1af599df 206
4dff95dc
SB
207 hlist_for_each_entry(child, &core->children, child_node)
208 clk_disable_unused_subtree(child);
1af599df 209
4dff95dc
SB
210 flags = clk_enable_lock();
211
212 if (core->enable_count)
213 goto unlock_out;
214
215 if (core->flags & CLK_IGNORE_UNUSED)
216 goto unlock_out;
217
218 /*
219 * some gate clocks have special needs during the disable-unused
220 * sequence. call .disable_unused if available, otherwise fall
221 * back to .disable
222 */
223 if (clk_core_is_enabled(core)) {
224 trace_clk_disable(core);
225 if (core->ops->disable_unused)
226 core->ops->disable_unused(core->hw);
227 else if (core->ops->disable)
228 core->ops->disable(core->hw);
229 trace_clk_disable_complete(core);
230 }
231
232unlock_out:
233 clk_enable_unlock(flags);
1af599df
PG
234}
235
4dff95dc
SB
236static bool clk_ignore_unused;
237static int __init clk_ignore_unused_setup(char *__unused)
1af599df 238{
4dff95dc
SB
239 clk_ignore_unused = true;
240 return 1;
241}
242__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 243
4dff95dc
SB
244static int clk_disable_unused(void)
245{
246 struct clk_core *core;
247
248 if (clk_ignore_unused) {
249 pr_warn("clk: Not disabling unused clocks\n");
250 return 0;
251 }
1af599df 252
eab89f69 253 clk_prepare_lock();
1af599df 254
4dff95dc
SB
255 hlist_for_each_entry(core, &clk_root_list, child_node)
256 clk_disable_unused_subtree(core);
257
258 hlist_for_each_entry(core, &clk_orphan_list, child_node)
259 clk_disable_unused_subtree(core);
260
261 hlist_for_each_entry(core, &clk_root_list, child_node)
262 clk_unprepare_unused_subtree(core);
263
264 hlist_for_each_entry(core, &clk_orphan_list, child_node)
265 clk_unprepare_unused_subtree(core);
1af599df 266
eab89f69 267 clk_prepare_unlock();
1af599df
PG
268
269 return 0;
270}
4dff95dc 271late_initcall_sync(clk_disable_unused);
1af599df 272
4dff95dc 273/*** helper functions ***/
1af599df 274
4dff95dc 275const char *__clk_get_name(struct clk *clk)
1af599df 276{
4dff95dc 277 return !clk ? NULL : clk->core->name;
1af599df 278}
4dff95dc 279EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 280
1a9c069c
SB
281const char *clk_hw_get_name(struct clk_hw *hw)
282{
283 return hw->core->name;
284}
285EXPORT_SYMBOL_GPL(clk_hw_get_name);
286
4dff95dc
SB
287struct clk_hw *__clk_get_hw(struct clk *clk)
288{
289 return !clk ? NULL : clk->core->hw;
290}
291EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 292
1a9c069c
SB
293unsigned int clk_hw_get_num_parents(struct clk_hw *hw)
294{
295 return hw->core->num_parents;
296}
297EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
298
1a9c069c
SB
299struct clk_hw *clk_hw_get_parent(struct clk_hw *hw)
300{
301 return hw->core->parent ? hw->core->parent->hw : NULL;
302}
303EXPORT_SYMBOL_GPL(clk_hw_get_parent);
304
4dff95dc
SB
305static struct clk_core *__clk_lookup_subtree(const char *name,
306 struct clk_core *core)
bddca894 307{
035a61c3 308 struct clk_core *child;
4dff95dc 309 struct clk_core *ret;
bddca894 310
4dff95dc
SB
311 if (!strcmp(core->name, name))
312 return core;
bddca894 313
4dff95dc
SB
314 hlist_for_each_entry(child, &core->children, child_node) {
315 ret = __clk_lookup_subtree(name, child);
316 if (ret)
317 return ret;
bddca894
PG
318 }
319
4dff95dc 320 return NULL;
bddca894
PG
321}
322
4dff95dc 323static struct clk_core *clk_core_lookup(const char *name)
bddca894 324{
4dff95dc
SB
325 struct clk_core *root_clk;
326 struct clk_core *ret;
bddca894 327
4dff95dc
SB
328 if (!name)
329 return NULL;
bddca894 330
4dff95dc
SB
331 /* search the 'proper' clk tree first */
332 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
333 ret = __clk_lookup_subtree(name, root_clk);
334 if (ret)
335 return ret;
bddca894
PG
336 }
337
4dff95dc
SB
338 /* if not found, then search the orphan tree */
339 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
340 ret = __clk_lookup_subtree(name, root_clk);
341 if (ret)
342 return ret;
343 }
bddca894 344
4dff95dc 345 return NULL;
bddca894
PG
346}
347
4dff95dc
SB
348static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
349 u8 index)
bddca894 350{
4dff95dc
SB
351 if (!core || index >= core->num_parents)
352 return NULL;
353 else if (!core->parents)
354 return clk_core_lookup(core->parent_names[index]);
355 else if (!core->parents[index])
356 return core->parents[index] =
357 clk_core_lookup(core->parent_names[index]);
358 else
359 return core->parents[index];
bddca894
PG
360}
361
1a9c069c
SB
362struct clk_hw *clk_hw_get_parent_by_index(struct clk_hw *hw, unsigned int index)
363{
364 struct clk_core *parent;
365
366 parent = clk_core_get_parent_by_index(hw->core, index);
367
368 return !parent ? NULL : parent->hw;
369}
370EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
371
4dff95dc
SB
372unsigned int __clk_get_enable_count(struct clk *clk)
373{
374 return !clk ? 0 : clk->core->enable_count;
375}
b2476490 376
4dff95dc
SB
377static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
378{
379 unsigned long ret;
b2476490 380
4dff95dc
SB
381 if (!core) {
382 ret = 0;
383 goto out;
384 }
b2476490 385
4dff95dc 386 ret = core->rate;
b2476490 387
4dff95dc
SB
388 if (core->flags & CLK_IS_ROOT)
389 goto out;
c646cbf1 390
4dff95dc
SB
391 if (!core->parent)
392 ret = 0;
b2476490 393
b2476490
MT
394out:
395 return ret;
396}
397
1a9c069c
SB
398unsigned long clk_hw_get_rate(struct clk_hw *hw)
399{
400 return clk_core_get_rate_nolock(hw->core);
401}
402EXPORT_SYMBOL_GPL(clk_hw_get_rate);
403
4dff95dc
SB
404static unsigned long __clk_get_accuracy(struct clk_core *core)
405{
406 if (!core)
407 return 0;
b2476490 408
4dff95dc 409 return core->accuracy;
b2476490
MT
410}
411
4dff95dc 412unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 413{
4dff95dc 414 return !clk ? 0 : clk->core->flags;
fcb0ee6a 415}
4dff95dc 416EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 417
1a9c069c
SB
418unsigned long clk_hw_get_flags(struct clk_hw *hw)
419{
420 return hw->core->flags;
421}
422EXPORT_SYMBOL_GPL(clk_hw_get_flags);
423
1a9c069c
SB
424bool clk_hw_is_prepared(struct clk_hw *hw)
425{
426 return clk_core_is_prepared(hw->core);
427}
428
4dff95dc 429bool __clk_is_enabled(struct clk *clk)
b2476490 430{
4dff95dc
SB
431 if (!clk)
432 return false;
b2476490 433
4dff95dc
SB
434 return clk_core_is_enabled(clk->core);
435}
436EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 437
4dff95dc
SB
438static bool mux_is_better_rate(unsigned long rate, unsigned long now,
439 unsigned long best, unsigned long flags)
440{
441 if (flags & CLK_MUX_ROUND_CLOSEST)
442 return abs(now - rate) < abs(best - rate);
1af599df 443
4dff95dc
SB
444 return now <= rate && now > best;
445}
bddca894 446
0817b62c
BB
447static int
448clk_mux_determine_rate_flags(struct clk_hw *hw, struct clk_rate_request *req,
4dff95dc
SB
449 unsigned long flags)
450{
451 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
0817b62c
BB
452 int i, num_parents, ret;
453 unsigned long best = 0;
454 struct clk_rate_request parent_req = *req;
b2476490 455
4dff95dc
SB
456 /* if NO_REPARENT flag set, pass through to current parent */
457 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
458 parent = core->parent;
0817b62c
BB
459 if (core->flags & CLK_SET_RATE_PARENT) {
460 ret = __clk_determine_rate(parent ? parent->hw : NULL,
461 &parent_req);
462 if (ret)
463 return ret;
464
465 best = parent_req.rate;
466 } else if (parent) {
4dff95dc 467 best = clk_core_get_rate_nolock(parent);
0817b62c 468 } else {
4dff95dc 469 best = clk_core_get_rate_nolock(core);
0817b62c
BB
470 }
471
4dff95dc
SB
472 goto out;
473 }
b2476490 474
4dff95dc
SB
475 /* find the parent that can provide the fastest rate <= rate */
476 num_parents = core->num_parents;
477 for (i = 0; i < num_parents; i++) {
478 parent = clk_core_get_parent_by_index(core, i);
479 if (!parent)
480 continue;
0817b62c
BB
481
482 if (core->flags & CLK_SET_RATE_PARENT) {
483 parent_req = *req;
484 ret = __clk_determine_rate(parent->hw, &parent_req);
485 if (ret)
486 continue;
487 } else {
488 parent_req.rate = clk_core_get_rate_nolock(parent);
489 }
490
491 if (mux_is_better_rate(req->rate, parent_req.rate,
492 best, flags)) {
4dff95dc 493 best_parent = parent;
0817b62c 494 best = parent_req.rate;
4dff95dc
SB
495 }
496 }
b2476490 497
57d866e6
BB
498 if (!best_parent)
499 return -EINVAL;
500
4dff95dc
SB
501out:
502 if (best_parent)
0817b62c
BB
503 req->best_parent_hw = best_parent->hw;
504 req->best_parent_rate = best;
505 req->rate = best;
b2476490 506
0817b62c 507 return 0;
b33d212f 508}
4dff95dc
SB
509
510struct clk *__clk_lookup(const char *name)
fcb0ee6a 511{
4dff95dc
SB
512 struct clk_core *core = clk_core_lookup(name);
513
514 return !core ? NULL : core->hw->clk;
fcb0ee6a 515}
b2476490 516
4dff95dc
SB
517static void clk_core_get_boundaries(struct clk_core *core,
518 unsigned long *min_rate,
519 unsigned long *max_rate)
1c155b3d 520{
4dff95dc 521 struct clk *clk_user;
1c155b3d 522
9783c0d9
SB
523 *min_rate = core->min_rate;
524 *max_rate = core->max_rate;
496eadf8 525
4dff95dc
SB
526 hlist_for_each_entry(clk_user, &core->clks, clks_node)
527 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 528
4dff95dc
SB
529 hlist_for_each_entry(clk_user, &core->clks, clks_node)
530 *max_rate = min(*max_rate, clk_user->max_rate);
531}
1c155b3d 532
9783c0d9
SB
533void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
534 unsigned long max_rate)
535{
536 hw->core->min_rate = min_rate;
537 hw->core->max_rate = max_rate;
538}
539EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
540
4dff95dc
SB
541/*
542 * Helper for finding best parent to provide a given frequency. This can be used
543 * directly as a determine_rate callback (e.g. for a mux), or from a more
544 * complex clock that may combine a mux with other operations.
545 */
0817b62c
BB
546int __clk_mux_determine_rate(struct clk_hw *hw,
547 struct clk_rate_request *req)
4dff95dc 548{
0817b62c 549 return clk_mux_determine_rate_flags(hw, req, 0);
1c155b3d 550}
4dff95dc 551EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 552
0817b62c
BB
553int __clk_mux_determine_rate_closest(struct clk_hw *hw,
554 struct clk_rate_request *req)
b2476490 555{
0817b62c 556 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
4dff95dc
SB
557}
558EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 559
4dff95dc 560/*** clk api ***/
496eadf8 561
4dff95dc
SB
562static void clk_core_unprepare(struct clk_core *core)
563{
a6334725
SB
564 lockdep_assert_held(&prepare_lock);
565
4dff95dc
SB
566 if (!core)
567 return;
b2476490 568
4dff95dc
SB
569 if (WARN_ON(core->prepare_count == 0))
570 return;
b2476490 571
4dff95dc
SB
572 if (--core->prepare_count > 0)
573 return;
b2476490 574
4dff95dc 575 WARN_ON(core->enable_count > 0);
b2476490 576
4dff95dc 577 trace_clk_unprepare(core);
b2476490 578
4dff95dc
SB
579 if (core->ops->unprepare)
580 core->ops->unprepare(core->hw);
581
582 trace_clk_unprepare_complete(core);
583 clk_core_unprepare(core->parent);
b2476490
MT
584}
585
4dff95dc
SB
586/**
587 * clk_unprepare - undo preparation of a clock source
588 * @clk: the clk being unprepared
589 *
590 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
591 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
592 * if the operation may sleep. One example is a clk which is accessed over
593 * I2c. In the complex case a clk gate operation may require a fast and a slow
594 * part. It is this reason that clk_unprepare and clk_disable are not mutually
595 * exclusive. In fact clk_disable must be called before clk_unprepare.
596 */
597void clk_unprepare(struct clk *clk)
1e435256 598{
4dff95dc
SB
599 if (IS_ERR_OR_NULL(clk))
600 return;
601
602 clk_prepare_lock();
603 clk_core_unprepare(clk->core);
604 clk_prepare_unlock();
1e435256 605}
4dff95dc 606EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 607
4dff95dc 608static int clk_core_prepare(struct clk_core *core)
b2476490 609{
4dff95dc 610 int ret = 0;
b2476490 611
a6334725
SB
612 lockdep_assert_held(&prepare_lock);
613
4dff95dc 614 if (!core)
1e435256 615 return 0;
1e435256 616
4dff95dc
SB
617 if (core->prepare_count == 0) {
618 ret = clk_core_prepare(core->parent);
619 if (ret)
620 return ret;
b2476490 621
4dff95dc 622 trace_clk_prepare(core);
b2476490 623
4dff95dc
SB
624 if (core->ops->prepare)
625 ret = core->ops->prepare(core->hw);
b2476490 626
4dff95dc 627 trace_clk_prepare_complete(core);
1c155b3d 628
4dff95dc
SB
629 if (ret) {
630 clk_core_unprepare(core->parent);
631 return ret;
632 }
633 }
1c155b3d 634
4dff95dc 635 core->prepare_count++;
b2476490
MT
636
637 return 0;
638}
b2476490 639
4dff95dc
SB
640/**
641 * clk_prepare - prepare a clock source
642 * @clk: the clk being prepared
643 *
644 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
645 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
646 * operation may sleep. One example is a clk which is accessed over I2c. In
647 * the complex case a clk ungate operation may require a fast and a slow part.
648 * It is this reason that clk_prepare and clk_enable are not mutually
649 * exclusive. In fact clk_prepare must be called before clk_enable.
650 * Returns 0 on success, -EERROR otherwise.
651 */
652int clk_prepare(struct clk *clk)
b2476490 653{
4dff95dc 654 int ret;
b2476490 655
4dff95dc
SB
656 if (!clk)
657 return 0;
b2476490 658
4dff95dc
SB
659 clk_prepare_lock();
660 ret = clk_core_prepare(clk->core);
661 clk_prepare_unlock();
662
663 return ret;
b2476490 664}
4dff95dc 665EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 666
4dff95dc 667static void clk_core_disable(struct clk_core *core)
b2476490 668{
a6334725
SB
669 lockdep_assert_held(&enable_lock);
670
4dff95dc
SB
671 if (!core)
672 return;
035a61c3 673
4dff95dc
SB
674 if (WARN_ON(core->enable_count == 0))
675 return;
b2476490 676
4dff95dc
SB
677 if (--core->enable_count > 0)
678 return;
035a61c3 679
4dff95dc 680 trace_clk_disable(core);
035a61c3 681
4dff95dc
SB
682 if (core->ops->disable)
683 core->ops->disable(core->hw);
035a61c3 684
4dff95dc 685 trace_clk_disable_complete(core);
035a61c3 686
4dff95dc 687 clk_core_disable(core->parent);
035a61c3 688}
7ef3dcc8 689
4dff95dc
SB
690/**
691 * clk_disable - gate a clock
692 * @clk: the clk being gated
693 *
694 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
695 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
696 * clk if the operation is fast and will never sleep. One example is a
697 * SoC-internal clk which is controlled via simple register writes. In the
698 * complex case a clk gate operation may require a fast and a slow part. It is
699 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
700 * In fact clk_disable must be called before clk_unprepare.
701 */
702void clk_disable(struct clk *clk)
b2476490 703{
4dff95dc
SB
704 unsigned long flags;
705
706 if (IS_ERR_OR_NULL(clk))
707 return;
708
709 flags = clk_enable_lock();
710 clk_core_disable(clk->core);
711 clk_enable_unlock(flags);
b2476490 712}
4dff95dc 713EXPORT_SYMBOL_GPL(clk_disable);
b2476490 714
4dff95dc 715static int clk_core_enable(struct clk_core *core)
b2476490 716{
4dff95dc 717 int ret = 0;
b2476490 718
a6334725
SB
719 lockdep_assert_held(&enable_lock);
720
4dff95dc
SB
721 if (!core)
722 return 0;
b2476490 723
4dff95dc
SB
724 if (WARN_ON(core->prepare_count == 0))
725 return -ESHUTDOWN;
b2476490 726
4dff95dc
SB
727 if (core->enable_count == 0) {
728 ret = clk_core_enable(core->parent);
b2476490 729
4dff95dc
SB
730 if (ret)
731 return ret;
b2476490 732
4dff95dc 733 trace_clk_enable(core);
035a61c3 734
4dff95dc
SB
735 if (core->ops->enable)
736 ret = core->ops->enable(core->hw);
035a61c3 737
4dff95dc
SB
738 trace_clk_enable_complete(core);
739
740 if (ret) {
741 clk_core_disable(core->parent);
742 return ret;
743 }
744 }
745
746 core->enable_count++;
747 return 0;
035a61c3 748}
b2476490 749
4dff95dc
SB
750/**
751 * clk_enable - ungate a clock
752 * @clk: the clk being ungated
753 *
754 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
755 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
756 * if the operation will never sleep. One example is a SoC-internal clk which
757 * is controlled via simple register writes. In the complex case a clk ungate
758 * operation may require a fast and a slow part. It is this reason that
759 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
760 * must be called before clk_enable. Returns 0 on success, -EERROR
761 * otherwise.
762 */
763int clk_enable(struct clk *clk)
5279fc40 764{
4dff95dc
SB
765 unsigned long flags;
766 int ret;
767
768 if (!clk)
5279fc40
BB
769 return 0;
770
4dff95dc
SB
771 flags = clk_enable_lock();
772 ret = clk_core_enable(clk->core);
773 clk_enable_unlock(flags);
5279fc40 774
4dff95dc 775 return ret;
b2476490 776}
4dff95dc 777EXPORT_SYMBOL_GPL(clk_enable);
b2476490 778
0817b62c
BB
779static int clk_core_round_rate_nolock(struct clk_core *core,
780 struct clk_rate_request *req)
3d6ee287 781{
4dff95dc 782 struct clk_core *parent;
0817b62c 783 long rate;
4dff95dc
SB
784
785 lockdep_assert_held(&prepare_lock);
3d6ee287 786
d6968fca 787 if (!core)
4dff95dc 788 return 0;
3d6ee287 789
4dff95dc 790 parent = core->parent;
0817b62c
BB
791 if (parent) {
792 req->best_parent_hw = parent->hw;
793 req->best_parent_rate = parent->rate;
794 } else {
795 req->best_parent_hw = NULL;
796 req->best_parent_rate = 0;
797 }
3d6ee287 798
4dff95dc 799 if (core->ops->determine_rate) {
0817b62c
BB
800 return core->ops->determine_rate(core->hw, req);
801 } else if (core->ops->round_rate) {
802 rate = core->ops->round_rate(core->hw, req->rate,
803 &req->best_parent_rate);
804 if (rate < 0)
805 return rate;
806
807 req->rate = rate;
808 } else if (core->flags & CLK_SET_RATE_PARENT) {
809 return clk_core_round_rate_nolock(parent, req);
810 } else {
811 req->rate = core->rate;
812 }
813
814 return 0;
3d6ee287
UH
815}
816
4dff95dc
SB
817/**
818 * __clk_determine_rate - get the closest rate actually supported by a clock
819 * @hw: determine the rate of this clock
820 * @rate: target rate
821 * @min_rate: returned rate must be greater than this rate
822 * @max_rate: returned rate must be less than this rate
823 *
6e5ab41b 824 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc 825 */
0817b62c 826int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
035a61c3 827{
0817b62c
BB
828 if (!hw) {
829 req->rate = 0;
4dff95dc 830 return 0;
0817b62c 831 }
035a61c3 832
0817b62c 833 return clk_core_round_rate_nolock(hw->core, req);
035a61c3 834}
4dff95dc 835EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 836
1a9c069c
SB
837unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
838{
839 int ret;
840 struct clk_rate_request req;
841
842 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
843 req.rate = rate;
844
845 ret = clk_core_round_rate_nolock(hw->core, &req);
846 if (ret)
847 return 0;
848
849 return req.rate;
850}
851EXPORT_SYMBOL_GPL(clk_hw_round_rate);
852
4dff95dc
SB
853/**
854 * clk_round_rate - round the given rate for a clk
855 * @clk: the clk for which we are rounding a rate
856 * @rate: the rate which is to be rounded
857 *
858 * Takes in a rate as input and rounds it to a rate that the clk can actually
859 * use which is then returned. If clk doesn't support round_rate operation
860 * then the parent rate is returned.
861 */
862long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 863{
fc4a05d4
SB
864 struct clk_rate_request req;
865 int ret;
4dff95dc 866
035a61c3 867 if (!clk)
4dff95dc 868 return 0;
035a61c3 869
4dff95dc 870 clk_prepare_lock();
fc4a05d4
SB
871
872 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
873 req.rate = rate;
874
875 ret = clk_core_round_rate_nolock(clk->core, &req);
4dff95dc
SB
876 clk_prepare_unlock();
877
fc4a05d4
SB
878 if (ret)
879 return ret;
880
881 return req.rate;
035a61c3 882}
4dff95dc 883EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 884
4dff95dc
SB
885/**
886 * __clk_notify - call clk notifier chain
887 * @core: clk that is changing rate
888 * @msg: clk notifier type (see include/linux/clk.h)
889 * @old_rate: old clk rate
890 * @new_rate: new clk rate
891 *
892 * Triggers a notifier call chain on the clk rate-change notification
893 * for 'clk'. Passes a pointer to the struct clk and the previous
894 * and current rates to the notifier callback. Intended to be called by
895 * internal clock code only. Returns NOTIFY_DONE from the last driver
896 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
897 * a driver returns that.
898 */
899static int __clk_notify(struct clk_core *core, unsigned long msg,
900 unsigned long old_rate, unsigned long new_rate)
b2476490 901{
4dff95dc
SB
902 struct clk_notifier *cn;
903 struct clk_notifier_data cnd;
904 int ret = NOTIFY_DONE;
b2476490 905
4dff95dc
SB
906 cnd.old_rate = old_rate;
907 cnd.new_rate = new_rate;
b2476490 908
4dff95dc
SB
909 list_for_each_entry(cn, &clk_notifier_list, node) {
910 if (cn->clk->core == core) {
911 cnd.clk = cn->clk;
912 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
913 &cnd);
914 }
b2476490
MT
915 }
916
4dff95dc 917 return ret;
b2476490
MT
918}
919
4dff95dc
SB
920/**
921 * __clk_recalc_accuracies
922 * @core: first clk in the subtree
923 *
924 * Walks the subtree of clks starting with clk and recalculates accuracies as
925 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 926 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 927 * parent.
4dff95dc
SB
928 */
929static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 930{
4dff95dc
SB
931 unsigned long parent_accuracy = 0;
932 struct clk_core *child;
b2476490 933
4dff95dc 934 lockdep_assert_held(&prepare_lock);
b2476490 935
4dff95dc
SB
936 if (core->parent)
937 parent_accuracy = core->parent->accuracy;
b2476490 938
4dff95dc
SB
939 if (core->ops->recalc_accuracy)
940 core->accuracy = core->ops->recalc_accuracy(core->hw,
941 parent_accuracy);
942 else
943 core->accuracy = parent_accuracy;
b2476490 944
4dff95dc
SB
945 hlist_for_each_entry(child, &core->children, child_node)
946 __clk_recalc_accuracies(child);
b2476490
MT
947}
948
4dff95dc 949static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 950{
4dff95dc 951 unsigned long accuracy;
15a02c1f 952
4dff95dc
SB
953 clk_prepare_lock();
954 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
955 __clk_recalc_accuracies(core);
15a02c1f 956
4dff95dc
SB
957 accuracy = __clk_get_accuracy(core);
958 clk_prepare_unlock();
e366fdd7 959
4dff95dc 960 return accuracy;
e366fdd7 961}
15a02c1f 962
4dff95dc
SB
963/**
964 * clk_get_accuracy - return the accuracy of clk
965 * @clk: the clk whose accuracy is being returned
966 *
967 * Simply returns the cached accuracy of the clk, unless
968 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
969 * issued.
970 * If clk is NULL then returns 0.
971 */
972long clk_get_accuracy(struct clk *clk)
035a61c3 973{
4dff95dc
SB
974 if (!clk)
975 return 0;
035a61c3 976
4dff95dc 977 return clk_core_get_accuracy(clk->core);
035a61c3 978}
4dff95dc 979EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 980
4dff95dc
SB
981static unsigned long clk_recalc(struct clk_core *core,
982 unsigned long parent_rate)
1c8e6004 983{
4dff95dc
SB
984 if (core->ops->recalc_rate)
985 return core->ops->recalc_rate(core->hw, parent_rate);
986 return parent_rate;
1c8e6004
TV
987}
988
4dff95dc
SB
989/**
990 * __clk_recalc_rates
991 * @core: first clk in the subtree
992 * @msg: notification type (see include/linux/clk.h)
993 *
994 * Walks the subtree of clks starting with clk and recalculates rates as it
995 * goes. Note that if a clk does not implement the .recalc_rate callback then
996 * it is assumed that the clock will take on the rate of its parent.
997 *
998 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
999 * if necessary.
15a02c1f 1000 */
4dff95dc 1001static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 1002{
4dff95dc
SB
1003 unsigned long old_rate;
1004 unsigned long parent_rate = 0;
1005 struct clk_core *child;
e366fdd7 1006
4dff95dc 1007 lockdep_assert_held(&prepare_lock);
15a02c1f 1008
4dff95dc 1009 old_rate = core->rate;
b2476490 1010
4dff95dc
SB
1011 if (core->parent)
1012 parent_rate = core->parent->rate;
b2476490 1013
4dff95dc 1014 core->rate = clk_recalc(core, parent_rate);
b2476490 1015
4dff95dc
SB
1016 /*
1017 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1018 * & ABORT_RATE_CHANGE notifiers
1019 */
1020 if (core->notifier_count && msg)
1021 __clk_notify(core, msg, old_rate, core->rate);
b2476490 1022
4dff95dc
SB
1023 hlist_for_each_entry(child, &core->children, child_node)
1024 __clk_recalc_rates(child, msg);
1025}
b2476490 1026
4dff95dc
SB
1027static unsigned long clk_core_get_rate(struct clk_core *core)
1028{
1029 unsigned long rate;
dfc202ea 1030
4dff95dc 1031 clk_prepare_lock();
b2476490 1032
4dff95dc
SB
1033 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1034 __clk_recalc_rates(core, 0);
1035
1036 rate = clk_core_get_rate_nolock(core);
1037 clk_prepare_unlock();
1038
1039 return rate;
b2476490
MT
1040}
1041
1042/**
4dff95dc
SB
1043 * clk_get_rate - return the rate of clk
1044 * @clk: the clk whose rate is being returned
b2476490 1045 *
4dff95dc
SB
1046 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1047 * is set, which means a recalc_rate will be issued.
1048 * If clk is NULL then returns 0.
b2476490 1049 */
4dff95dc 1050unsigned long clk_get_rate(struct clk *clk)
b2476490 1051{
4dff95dc
SB
1052 if (!clk)
1053 return 0;
63589e92 1054
4dff95dc 1055 return clk_core_get_rate(clk->core);
b2476490 1056}
4dff95dc 1057EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1058
4dff95dc
SB
1059static int clk_fetch_parent_index(struct clk_core *core,
1060 struct clk_core *parent)
b2476490 1061{
4dff95dc 1062 int i;
b2476490 1063
4dff95dc
SB
1064 if (!core->parents) {
1065 core->parents = kcalloc(core->num_parents,
1066 sizeof(struct clk *), GFP_KERNEL);
1067 if (!core->parents)
1068 return -ENOMEM;
1069 }
dfc202ea 1070
4dff95dc
SB
1071 /*
1072 * find index of new parent clock using cached parent ptrs,
1073 * or if not yet cached, use string name comparison and cache
1074 * them now to avoid future calls to clk_core_lookup.
1075 */
1076 for (i = 0; i < core->num_parents; i++) {
1077 if (core->parents[i] == parent)
1078 return i;
dfc202ea 1079
4dff95dc
SB
1080 if (core->parents[i])
1081 continue;
dfc202ea 1082
4dff95dc
SB
1083 if (!strcmp(core->parent_names[i], parent->name)) {
1084 core->parents[i] = clk_core_lookup(parent->name);
1085 return i;
b2476490
MT
1086 }
1087 }
1088
4dff95dc 1089 return -EINVAL;
b2476490
MT
1090}
1091
e6500344
HS
1092/*
1093 * Update the orphan status of @core and all its children.
1094 */
1095static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1096{
1097 struct clk_core *child;
1098
1099 core->orphan = is_orphan;
1100
1101 hlist_for_each_entry(child, &core->children, child_node)
1102 clk_core_update_orphan_status(child, is_orphan);
1103}
1104
4dff95dc 1105static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1106{
e6500344
HS
1107 bool was_orphan = core->orphan;
1108
4dff95dc 1109 hlist_del(&core->child_node);
035a61c3 1110
4dff95dc 1111 if (new_parent) {
e6500344
HS
1112 bool becomes_orphan = new_parent->orphan;
1113
4dff95dc
SB
1114 /* avoid duplicate POST_RATE_CHANGE notifications */
1115 if (new_parent->new_child == core)
1116 new_parent->new_child = NULL;
b2476490 1117
4dff95dc 1118 hlist_add_head(&core->child_node, &new_parent->children);
e6500344
HS
1119
1120 if (was_orphan != becomes_orphan)
1121 clk_core_update_orphan_status(core, becomes_orphan);
4dff95dc
SB
1122 } else {
1123 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
1124 if (!was_orphan)
1125 clk_core_update_orphan_status(core, true);
4dff95dc 1126 }
dfc202ea 1127
4dff95dc 1128 core->parent = new_parent;
035a61c3
TV
1129}
1130
4dff95dc
SB
1131static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1132 struct clk_core *parent)
b2476490
MT
1133{
1134 unsigned long flags;
4dff95dc 1135 struct clk_core *old_parent = core->parent;
b2476490 1136
4dff95dc
SB
1137 /*
1138 * Migrate prepare state between parents and prevent race with
1139 * clk_enable().
1140 *
1141 * If the clock is not prepared, then a race with
1142 * clk_enable/disable() is impossible since we already have the
1143 * prepare lock (future calls to clk_enable() need to be preceded by
1144 * a clk_prepare()).
1145 *
1146 * If the clock is prepared, migrate the prepared state to the new
1147 * parent and also protect against a race with clk_enable() by
1148 * forcing the clock and the new parent on. This ensures that all
1149 * future calls to clk_enable() are practically NOPs with respect to
1150 * hardware and software states.
1151 *
1152 * See also: Comment for clk_set_parent() below.
1153 */
1154 if (core->prepare_count) {
1155 clk_core_prepare(parent);
d2a5d46b 1156 flags = clk_enable_lock();
4dff95dc
SB
1157 clk_core_enable(parent);
1158 clk_core_enable(core);
d2a5d46b 1159 clk_enable_unlock(flags);
4dff95dc 1160 }
63589e92 1161
4dff95dc 1162 /* update the clk tree topology */
eab89f69 1163 flags = clk_enable_lock();
4dff95dc 1164 clk_reparent(core, parent);
eab89f69 1165 clk_enable_unlock(flags);
4dff95dc
SB
1166
1167 return old_parent;
b2476490 1168}
b2476490 1169
4dff95dc
SB
1170static void __clk_set_parent_after(struct clk_core *core,
1171 struct clk_core *parent,
1172 struct clk_core *old_parent)
b2476490 1173{
d2a5d46b
DA
1174 unsigned long flags;
1175
4dff95dc
SB
1176 /*
1177 * Finish the migration of prepare state and undo the changes done
1178 * for preventing a race with clk_enable().
1179 */
1180 if (core->prepare_count) {
d2a5d46b 1181 flags = clk_enable_lock();
4dff95dc
SB
1182 clk_core_disable(core);
1183 clk_core_disable(old_parent);
d2a5d46b 1184 clk_enable_unlock(flags);
4dff95dc
SB
1185 clk_core_unprepare(old_parent);
1186 }
1187}
b2476490 1188
4dff95dc
SB
1189static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1190 u8 p_index)
1191{
1192 unsigned long flags;
1193 int ret = 0;
1194 struct clk_core *old_parent;
b2476490 1195
4dff95dc 1196 old_parent = __clk_set_parent_before(core, parent);
b2476490 1197
4dff95dc 1198 trace_clk_set_parent(core, parent);
b2476490 1199
4dff95dc
SB
1200 /* change clock input source */
1201 if (parent && core->ops->set_parent)
1202 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1203
4dff95dc 1204 trace_clk_set_parent_complete(core, parent);
dfc202ea 1205
4dff95dc
SB
1206 if (ret) {
1207 flags = clk_enable_lock();
1208 clk_reparent(core, old_parent);
1209 clk_enable_unlock(flags);
dfc202ea 1210
4dff95dc 1211 if (core->prepare_count) {
d2a5d46b 1212 flags = clk_enable_lock();
4dff95dc
SB
1213 clk_core_disable(core);
1214 clk_core_disable(parent);
d2a5d46b 1215 clk_enable_unlock(flags);
4dff95dc 1216 clk_core_unprepare(parent);
b2476490 1217 }
4dff95dc 1218 return ret;
b2476490
MT
1219 }
1220
4dff95dc
SB
1221 __clk_set_parent_after(core, parent, old_parent);
1222
b2476490
MT
1223 return 0;
1224}
1225
1226/**
4dff95dc
SB
1227 * __clk_speculate_rates
1228 * @core: first clk in the subtree
1229 * @parent_rate: the "future" rate of clk's parent
b2476490 1230 *
4dff95dc
SB
1231 * Walks the subtree of clks starting with clk, speculating rates as it
1232 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1233 *
1234 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1235 * pre-rate change notifications and returns early if no clks in the
1236 * subtree have subscribed to the notifications. Note that if a clk does not
1237 * implement the .recalc_rate callback then it is assumed that the clock will
1238 * take on the rate of its parent.
b2476490 1239 */
4dff95dc
SB
1240static int __clk_speculate_rates(struct clk_core *core,
1241 unsigned long parent_rate)
b2476490 1242{
4dff95dc
SB
1243 struct clk_core *child;
1244 unsigned long new_rate;
1245 int ret = NOTIFY_DONE;
b2476490 1246
4dff95dc 1247 lockdep_assert_held(&prepare_lock);
864e160a 1248
4dff95dc
SB
1249 new_rate = clk_recalc(core, parent_rate);
1250
1251 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1252 if (core->notifier_count)
1253 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1254
1255 if (ret & NOTIFY_STOP_MASK) {
1256 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1257 __func__, core->name, ret);
1258 goto out;
1259 }
1260
1261 hlist_for_each_entry(child, &core->children, child_node) {
1262 ret = __clk_speculate_rates(child, new_rate);
1263 if (ret & NOTIFY_STOP_MASK)
1264 break;
1265 }
b2476490 1266
4dff95dc 1267out:
b2476490
MT
1268 return ret;
1269}
b2476490 1270
4dff95dc
SB
1271static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1272 struct clk_core *new_parent, u8 p_index)
b2476490 1273{
4dff95dc 1274 struct clk_core *child;
b2476490 1275
4dff95dc
SB
1276 core->new_rate = new_rate;
1277 core->new_parent = new_parent;
1278 core->new_parent_index = p_index;
1279 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1280 core->new_child = NULL;
1281 if (new_parent && new_parent != core->parent)
1282 new_parent->new_child = core;
496eadf8 1283
4dff95dc
SB
1284 hlist_for_each_entry(child, &core->children, child_node) {
1285 child->new_rate = clk_recalc(child, new_rate);
1286 clk_calc_subtree(child, child->new_rate, NULL, 0);
1287 }
1288}
b2476490 1289
4dff95dc
SB
1290/*
1291 * calculate the new rates returning the topmost clock that has to be
1292 * changed.
1293 */
1294static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1295 unsigned long rate)
1296{
1297 struct clk_core *top = core;
1298 struct clk_core *old_parent, *parent;
4dff95dc
SB
1299 unsigned long best_parent_rate = 0;
1300 unsigned long new_rate;
1301 unsigned long min_rate;
1302 unsigned long max_rate;
1303 int p_index = 0;
1304 long ret;
1305
1306 /* sanity */
1307 if (IS_ERR_OR_NULL(core))
1308 return NULL;
1309
1310 /* save parent rate, if it exists */
1311 parent = old_parent = core->parent;
71472c0c 1312 if (parent)
4dff95dc 1313 best_parent_rate = parent->rate;
71472c0c 1314
4dff95dc
SB
1315 clk_core_get_boundaries(core, &min_rate, &max_rate);
1316
1317 /* find the closest rate and parent clk/rate */
d6968fca 1318 if (core->ops->determine_rate) {
0817b62c
BB
1319 struct clk_rate_request req;
1320
1321 req.rate = rate;
1322 req.min_rate = min_rate;
1323 req.max_rate = max_rate;
1324 if (parent) {
1325 req.best_parent_hw = parent->hw;
1326 req.best_parent_rate = parent->rate;
1327 } else {
1328 req.best_parent_hw = NULL;
1329 req.best_parent_rate = 0;
1330 }
1331
1332 ret = core->ops->determine_rate(core->hw, &req);
4dff95dc
SB
1333 if (ret < 0)
1334 return NULL;
1c8e6004 1335
0817b62c
BB
1336 best_parent_rate = req.best_parent_rate;
1337 new_rate = req.rate;
1338 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
4dff95dc
SB
1339 } else if (core->ops->round_rate) {
1340 ret = core->ops->round_rate(core->hw, rate,
0817b62c 1341 &best_parent_rate);
4dff95dc
SB
1342 if (ret < 0)
1343 return NULL;
035a61c3 1344
4dff95dc
SB
1345 new_rate = ret;
1346 if (new_rate < min_rate || new_rate > max_rate)
1347 return NULL;
1348 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1349 /* pass-through clock without adjustable parent */
1350 core->new_rate = core->rate;
1351 return NULL;
1352 } else {
1353 /* pass-through clock with adjustable parent */
1354 top = clk_calc_new_rates(parent, rate);
1355 new_rate = parent->new_rate;
1356 goto out;
1357 }
1c8e6004 1358
4dff95dc
SB
1359 /* some clocks must be gated to change parent */
1360 if (parent != old_parent &&
1361 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1362 pr_debug("%s: %s not gated but wants to reparent\n",
1363 __func__, core->name);
1364 return NULL;
1365 }
b2476490 1366
4dff95dc
SB
1367 /* try finding the new parent index */
1368 if (parent && core->num_parents > 1) {
1369 p_index = clk_fetch_parent_index(core, parent);
1370 if (p_index < 0) {
1371 pr_debug("%s: clk %s can not be parent of clk %s\n",
1372 __func__, parent->name, core->name);
1373 return NULL;
1374 }
1375 }
b2476490 1376
4dff95dc
SB
1377 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1378 best_parent_rate != parent->rate)
1379 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1380
4dff95dc
SB
1381out:
1382 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1383
4dff95dc 1384 return top;
b2476490 1385}
b2476490 1386
4dff95dc
SB
1387/*
1388 * Notify about rate changes in a subtree. Always walk down the whole tree
1389 * so that in case of an error we can walk down the whole tree again and
1390 * abort the change.
b2476490 1391 */
4dff95dc
SB
1392static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1393 unsigned long event)
b2476490 1394{
4dff95dc 1395 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1396 int ret = NOTIFY_DONE;
1397
4dff95dc
SB
1398 if (core->rate == core->new_rate)
1399 return NULL;
b2476490 1400
4dff95dc
SB
1401 if (core->notifier_count) {
1402 ret = __clk_notify(core, event, core->rate, core->new_rate);
1403 if (ret & NOTIFY_STOP_MASK)
1404 fail_clk = core;
b2476490
MT
1405 }
1406
4dff95dc
SB
1407 hlist_for_each_entry(child, &core->children, child_node) {
1408 /* Skip children who will be reparented to another clock */
1409 if (child->new_parent && child->new_parent != core)
1410 continue;
1411 tmp_clk = clk_propagate_rate_change(child, event);
1412 if (tmp_clk)
1413 fail_clk = tmp_clk;
1414 }
5279fc40 1415
4dff95dc
SB
1416 /* handle the new child who might not be in core->children yet */
1417 if (core->new_child) {
1418 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1419 if (tmp_clk)
1420 fail_clk = tmp_clk;
1421 }
5279fc40 1422
4dff95dc 1423 return fail_clk;
5279fc40
BB
1424}
1425
4dff95dc
SB
1426/*
1427 * walk down a subtree and set the new rates notifying the rate
1428 * change on the way
1429 */
1430static void clk_change_rate(struct clk_core *core)
035a61c3 1431{
4dff95dc
SB
1432 struct clk_core *child;
1433 struct hlist_node *tmp;
1434 unsigned long old_rate;
1435 unsigned long best_parent_rate = 0;
1436 bool skip_set_rate = false;
1437 struct clk_core *old_parent;
035a61c3 1438
4dff95dc 1439 old_rate = core->rate;
035a61c3 1440
4dff95dc
SB
1441 if (core->new_parent)
1442 best_parent_rate = core->new_parent->rate;
1443 else if (core->parent)
1444 best_parent_rate = core->parent->rate;
035a61c3 1445
4dff95dc
SB
1446 if (core->new_parent && core->new_parent != core->parent) {
1447 old_parent = __clk_set_parent_before(core, core->new_parent);
1448 trace_clk_set_parent(core, core->new_parent);
5279fc40 1449
4dff95dc
SB
1450 if (core->ops->set_rate_and_parent) {
1451 skip_set_rate = true;
1452 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1453 best_parent_rate,
1454 core->new_parent_index);
1455 } else if (core->ops->set_parent) {
1456 core->ops->set_parent(core->hw, core->new_parent_index);
1457 }
5279fc40 1458
4dff95dc
SB
1459 trace_clk_set_parent_complete(core, core->new_parent);
1460 __clk_set_parent_after(core, core->new_parent, old_parent);
1461 }
8f2c2db1 1462
4dff95dc 1463 trace_clk_set_rate(core, core->new_rate);
b2476490 1464
4dff95dc
SB
1465 if (!skip_set_rate && core->ops->set_rate)
1466 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1467
4dff95dc 1468 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1469
4dff95dc 1470 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1471
4dff95dc
SB
1472 if (core->notifier_count && old_rate != core->rate)
1473 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490 1474
85e88fab
MT
1475 if (core->flags & CLK_RECALC_NEW_RATES)
1476 (void)clk_calc_new_rates(core, core->new_rate);
d8d91987 1477
b2476490 1478 /*
4dff95dc
SB
1479 * Use safe iteration, as change_rate can actually swap parents
1480 * for certain clock types.
b2476490 1481 */
4dff95dc
SB
1482 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1483 /* Skip children who will be reparented to another clock */
1484 if (child->new_parent && child->new_parent != core)
1485 continue;
1486 clk_change_rate(child);
1487 }
b2476490 1488
4dff95dc
SB
1489 /* handle the new child who might not be in core->children yet */
1490 if (core->new_child)
1491 clk_change_rate(core->new_child);
b2476490
MT
1492}
1493
4dff95dc
SB
1494static int clk_core_set_rate_nolock(struct clk_core *core,
1495 unsigned long req_rate)
a093bde2 1496{
4dff95dc
SB
1497 struct clk_core *top, *fail_clk;
1498 unsigned long rate = req_rate;
1499 int ret = 0;
a093bde2 1500
4dff95dc
SB
1501 if (!core)
1502 return 0;
a093bde2 1503
4dff95dc
SB
1504 /* bail early if nothing to do */
1505 if (rate == clk_core_get_rate_nolock(core))
1506 return 0;
a093bde2 1507
4dff95dc
SB
1508 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1509 return -EBUSY;
a093bde2 1510
4dff95dc
SB
1511 /* calculate new rates and get the topmost changed clock */
1512 top = clk_calc_new_rates(core, rate);
1513 if (!top)
1514 return -EINVAL;
1515
1516 /* notify that we are about to change rates */
1517 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1518 if (fail_clk) {
1519 pr_debug("%s: failed to set %s rate\n", __func__,
1520 fail_clk->name);
1521 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1522 return -EBUSY;
1523 }
1524
1525 /* change the rates */
1526 clk_change_rate(top);
1527
1528 core->req_rate = req_rate;
1529
1530 return ret;
a093bde2 1531}
035a61c3
TV
1532
1533/**
4dff95dc
SB
1534 * clk_set_rate - specify a new rate for clk
1535 * @clk: the clk whose rate is being changed
1536 * @rate: the new rate for clk
035a61c3 1537 *
4dff95dc
SB
1538 * In the simplest case clk_set_rate will only adjust the rate of clk.
1539 *
1540 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1541 * propagate up to clk's parent; whether or not this happens depends on the
1542 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1543 * after calling .round_rate then upstream parent propagation is ignored. If
1544 * *parent_rate comes back with a new rate for clk's parent then we propagate
1545 * up to clk's parent and set its rate. Upward propagation will continue
1546 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1547 * .round_rate stops requesting changes to clk's parent_rate.
1548 *
1549 * Rate changes are accomplished via tree traversal that also recalculates the
1550 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1551 *
1552 * Returns 0 on success, -EERROR otherwise.
035a61c3 1553 */
4dff95dc 1554int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1555{
4dff95dc
SB
1556 int ret;
1557
035a61c3
TV
1558 if (!clk)
1559 return 0;
1560
4dff95dc
SB
1561 /* prevent racing with updates to the clock topology */
1562 clk_prepare_lock();
da0f0b2c 1563
4dff95dc 1564 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1565
4dff95dc 1566 clk_prepare_unlock();
4935b22c 1567
4dff95dc 1568 return ret;
4935b22c 1569}
4dff95dc 1570EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1571
4dff95dc
SB
1572/**
1573 * clk_set_rate_range - set a rate range for a clock source
1574 * @clk: clock source
1575 * @min: desired minimum clock rate in Hz, inclusive
1576 * @max: desired maximum clock rate in Hz, inclusive
1577 *
1578 * Returns success (0) or negative errno.
1579 */
1580int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1581{
4dff95dc 1582 int ret = 0;
4935b22c 1583
4dff95dc
SB
1584 if (!clk)
1585 return 0;
903efc55 1586
4dff95dc
SB
1587 if (min > max) {
1588 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1589 __func__, clk->core->name, clk->dev_id, clk->con_id,
1590 min, max);
1591 return -EINVAL;
903efc55 1592 }
4935b22c 1593
4dff95dc 1594 clk_prepare_lock();
4935b22c 1595
4dff95dc
SB
1596 if (min != clk->min_rate || max != clk->max_rate) {
1597 clk->min_rate = min;
1598 clk->max_rate = max;
1599 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1600 }
1601
4dff95dc 1602 clk_prepare_unlock();
4935b22c 1603
4dff95dc 1604 return ret;
3fa2252b 1605}
4dff95dc 1606EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1607
4dff95dc
SB
1608/**
1609 * clk_set_min_rate - set a minimum clock rate for a clock source
1610 * @clk: clock source
1611 * @rate: desired minimum clock rate in Hz, inclusive
1612 *
1613 * Returns success (0) or negative errno.
1614 */
1615int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1616{
4dff95dc
SB
1617 if (!clk)
1618 return 0;
1619
1620 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1621}
4dff95dc 1622EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1623
4dff95dc
SB
1624/**
1625 * clk_set_max_rate - set a maximum clock rate for a clock source
1626 * @clk: clock source
1627 * @rate: desired maximum clock rate in Hz, inclusive
1628 *
1629 * Returns success (0) or negative errno.
1630 */
1631int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1632{
4dff95dc
SB
1633 if (!clk)
1634 return 0;
4935b22c 1635
4dff95dc 1636 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1637}
4dff95dc 1638EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1639
b2476490 1640/**
4dff95dc
SB
1641 * clk_get_parent - return the parent of a clk
1642 * @clk: the clk whose parent gets returned
b2476490 1643 *
4dff95dc 1644 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1645 */
4dff95dc 1646struct clk *clk_get_parent(struct clk *clk)
b2476490 1647{
4dff95dc 1648 struct clk *parent;
b2476490 1649
fc4a05d4
SB
1650 if (!clk)
1651 return NULL;
1652
4dff95dc 1653 clk_prepare_lock();
fc4a05d4
SB
1654 /* TODO: Create a per-user clk and change callers to call clk_put */
1655 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
4dff95dc 1656 clk_prepare_unlock();
496eadf8 1657
4dff95dc
SB
1658 return parent;
1659}
1660EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1661
4dff95dc
SB
1662/*
1663 * .get_parent is mandatory for clocks with multiple possible parents. It is
1664 * optional for single-parent clocks. Always call .get_parent if it is
1665 * available and WARN if it is missing for multi-parent clocks.
1666 *
1667 * For single-parent clocks without .get_parent, first check to see if the
1668 * .parents array exists, and if so use it to avoid an expensive tree
1669 * traversal. If .parents does not exist then walk the tree.
1670 */
1671static struct clk_core *__clk_init_parent(struct clk_core *core)
1672{
1673 struct clk_core *ret = NULL;
1674 u8 index;
b2476490 1675
4dff95dc
SB
1676 /* handle the trivial cases */
1677
1678 if (!core->num_parents)
b2476490
MT
1679 goto out;
1680
4dff95dc
SB
1681 if (core->num_parents == 1) {
1682 if (IS_ERR_OR_NULL(core->parent))
1683 core->parent = clk_core_lookup(core->parent_names[0]);
1684 ret = core->parent;
1685 goto out;
b2476490
MT
1686 }
1687
4dff95dc
SB
1688 if (!core->ops->get_parent) {
1689 WARN(!core->ops->get_parent,
1690 "%s: multi-parent clocks must implement .get_parent\n",
1691 __func__);
1692 goto out;
1693 };
1694
1695 /*
1696 * Do our best to cache parent clocks in core->parents. This prevents
1697 * unnecessary and expensive lookups. We don't set core->parent here;
1698 * that is done by the calling function.
1699 */
1700
1701 index = core->ops->get_parent(core->hw);
1702
1703 if (!core->parents)
1704 core->parents =
1705 kcalloc(core->num_parents, sizeof(struct clk *),
1706 GFP_KERNEL);
1707
1708 ret = clk_core_get_parent_by_index(core, index);
1709
b2476490
MT
1710out:
1711 return ret;
1712}
1713
4dff95dc
SB
1714static void clk_core_reparent(struct clk_core *core,
1715 struct clk_core *new_parent)
b2476490 1716{
4dff95dc
SB
1717 clk_reparent(core, new_parent);
1718 __clk_recalc_accuracies(core);
1719 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1720}
1721
42c86547
TV
1722void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
1723{
1724 if (!hw)
1725 return;
1726
1727 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
1728}
1729
4dff95dc
SB
1730/**
1731 * clk_has_parent - check if a clock is a possible parent for another
1732 * @clk: clock source
1733 * @parent: parent clock source
1734 *
1735 * This function can be used in drivers that need to check that a clock can be
1736 * the parent of another without actually changing the parent.
1737 *
1738 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1739 */
4dff95dc 1740bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1741{
4dff95dc
SB
1742 struct clk_core *core, *parent_core;
1743 unsigned int i;
b2476490 1744
4dff95dc
SB
1745 /* NULL clocks should be nops, so return success if either is NULL. */
1746 if (!clk || !parent)
1747 return true;
7452b219 1748
4dff95dc
SB
1749 core = clk->core;
1750 parent_core = parent->core;
71472c0c 1751
4dff95dc
SB
1752 /* Optimize for the case where the parent is already the parent. */
1753 if (core->parent == parent_core)
1754 return true;
1c8e6004 1755
4dff95dc
SB
1756 for (i = 0; i < core->num_parents; i++)
1757 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1758 return true;
03bc10ab 1759
4dff95dc
SB
1760 return false;
1761}
1762EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1763
4dff95dc
SB
1764static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1765{
1766 int ret = 0;
1767 int p_index = 0;
1768 unsigned long p_rate = 0;
1769
1770 if (!core)
1771 return 0;
1772
1773 /* prevent racing with updates to the clock topology */
1774 clk_prepare_lock();
1775
1776 if (core->parent == parent)
1777 goto out;
1778
1779 /* verify ops for for multi-parent clks */
1780 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1781 ret = -ENOSYS;
63f5c3b2 1782 goto out;
7452b219
MT
1783 }
1784
4dff95dc
SB
1785 /* check that we are allowed to re-parent if the clock is in use */
1786 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1787 ret = -EBUSY;
1788 goto out;
b2476490
MT
1789 }
1790
71472c0c 1791 /* try finding the new parent index */
4dff95dc 1792 if (parent) {
d6968fca 1793 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1794 p_rate = parent->rate;
f1c8b2ed 1795 if (p_index < 0) {
71472c0c 1796 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1797 __func__, parent->name, core->name);
1798 ret = p_index;
1799 goto out;
71472c0c 1800 }
b2476490
MT
1801 }
1802
4dff95dc
SB
1803 /* propagate PRE_RATE_CHANGE notifications */
1804 ret = __clk_speculate_rates(core, p_rate);
b2476490 1805
4dff95dc
SB
1806 /* abort if a driver objects */
1807 if (ret & NOTIFY_STOP_MASK)
1808 goto out;
b2476490 1809
4dff95dc
SB
1810 /* do the re-parent */
1811 ret = __clk_set_parent(core, parent, p_index);
b2476490 1812
4dff95dc
SB
1813 /* propagate rate an accuracy recalculation accordingly */
1814 if (ret) {
1815 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1816 } else {
1817 __clk_recalc_rates(core, POST_RATE_CHANGE);
1818 __clk_recalc_accuracies(core);
b2476490
MT
1819 }
1820
4dff95dc
SB
1821out:
1822 clk_prepare_unlock();
71472c0c 1823
4dff95dc
SB
1824 return ret;
1825}
b2476490 1826
4dff95dc
SB
1827/**
1828 * clk_set_parent - switch the parent of a mux clk
1829 * @clk: the mux clk whose input we are switching
1830 * @parent: the new input to clk
1831 *
1832 * Re-parent clk to use parent as its new input source. If clk is in
1833 * prepared state, the clk will get enabled for the duration of this call. If
1834 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1835 * that, the reparenting is glitchy in hardware, etc), use the
1836 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1837 *
1838 * After successfully changing clk's parent clk_set_parent will update the
1839 * clk topology, sysfs topology and propagate rate recalculation via
1840 * __clk_recalc_rates.
1841 *
1842 * Returns 0 on success, -EERROR otherwise.
1843 */
1844int clk_set_parent(struct clk *clk, struct clk *parent)
1845{
1846 if (!clk)
1847 return 0;
1848
1849 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1850}
4dff95dc 1851EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1852
4dff95dc
SB
1853/**
1854 * clk_set_phase - adjust the phase shift of a clock signal
1855 * @clk: clock signal source
1856 * @degrees: number of degrees the signal is shifted
1857 *
1858 * Shifts the phase of a clock signal by the specified
1859 * degrees. Returns 0 on success, -EERROR otherwise.
1860 *
1861 * This function makes no distinction about the input or reference
1862 * signal that we adjust the clock signal phase against. For example
1863 * phase locked-loop clock signal generators we may shift phase with
1864 * respect to feedback clock signal input, but for other cases the
1865 * clock phase may be shifted with respect to some other, unspecified
1866 * signal.
1867 *
1868 * Additionally the concept of phase shift does not propagate through
1869 * the clock tree hierarchy, which sets it apart from clock rates and
1870 * clock accuracy. A parent clock phase attribute does not have an
1871 * impact on the phase attribute of a child clock.
b2476490 1872 */
4dff95dc 1873int clk_set_phase(struct clk *clk, int degrees)
b2476490 1874{
4dff95dc 1875 int ret = -EINVAL;
b2476490 1876
4dff95dc
SB
1877 if (!clk)
1878 return 0;
b2476490 1879
4dff95dc
SB
1880 /* sanity check degrees */
1881 degrees %= 360;
1882 if (degrees < 0)
1883 degrees += 360;
bf47b4fd 1884
4dff95dc 1885 clk_prepare_lock();
3fa2252b 1886
4dff95dc 1887 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1888
4dff95dc
SB
1889 if (clk->core->ops->set_phase)
1890 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1891
4dff95dc 1892 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1893
4dff95dc
SB
1894 if (!ret)
1895 clk->core->phase = degrees;
b2476490 1896
4dff95dc 1897 clk_prepare_unlock();
dfc202ea 1898
4dff95dc
SB
1899 return ret;
1900}
1901EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1902
4dff95dc
SB
1903static int clk_core_get_phase(struct clk_core *core)
1904{
1905 int ret;
b2476490 1906
4dff95dc
SB
1907 clk_prepare_lock();
1908 ret = core->phase;
1909 clk_prepare_unlock();
71472c0c 1910
4dff95dc 1911 return ret;
b2476490
MT
1912}
1913
4dff95dc
SB
1914/**
1915 * clk_get_phase - return the phase shift of a clock signal
1916 * @clk: clock signal source
1917 *
1918 * Returns the phase shift of a clock node in degrees, otherwise returns
1919 * -EERROR.
1920 */
1921int clk_get_phase(struct clk *clk)
1c8e6004 1922{
4dff95dc 1923 if (!clk)
1c8e6004
TV
1924 return 0;
1925
4dff95dc
SB
1926 return clk_core_get_phase(clk->core);
1927}
1928EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1929
4dff95dc
SB
1930/**
1931 * clk_is_match - check if two clk's point to the same hardware clock
1932 * @p: clk compared against q
1933 * @q: clk compared against p
1934 *
1935 * Returns true if the two struct clk pointers both point to the same hardware
1936 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1937 * share the same struct clk_core object.
1938 *
1939 * Returns false otherwise. Note that two NULL clks are treated as matching.
1940 */
1941bool clk_is_match(const struct clk *p, const struct clk *q)
1942{
1943 /* trivial case: identical struct clk's or both NULL */
1944 if (p == q)
1945 return true;
1c8e6004 1946
4dff95dc
SB
1947 /* true if clk->core pointers match. Avoid derefing garbage */
1948 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1949 if (p->core == q->core)
1950 return true;
1c8e6004 1951
4dff95dc
SB
1952 return false;
1953}
1954EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1955
4dff95dc 1956/*** debugfs support ***/
1c8e6004 1957
4dff95dc
SB
1958#ifdef CONFIG_DEBUG_FS
1959#include <linux/debugfs.h>
1c8e6004 1960
4dff95dc
SB
1961static struct dentry *rootdir;
1962static int inited = 0;
1963static DEFINE_MUTEX(clk_debug_lock);
1964static HLIST_HEAD(clk_debug_list);
1c8e6004 1965
4dff95dc
SB
1966static struct hlist_head *all_lists[] = {
1967 &clk_root_list,
1968 &clk_orphan_list,
1969 NULL,
1970};
1971
1972static struct hlist_head *orphan_list[] = {
1973 &clk_orphan_list,
1974 NULL,
1975};
1976
1977static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1978 int level)
b2476490 1979{
4dff95dc
SB
1980 if (!c)
1981 return;
b2476490 1982
4dff95dc
SB
1983 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1984 level * 3 + 1, "",
1985 30 - level * 3, c->name,
1986 c->enable_count, c->prepare_count, clk_core_get_rate(c),
1987 clk_core_get_accuracy(c), clk_core_get_phase(c));
1988}
89ac8d7a 1989
4dff95dc
SB
1990static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1991 int level)
1992{
1993 struct clk_core *child;
b2476490 1994
4dff95dc
SB
1995 if (!c)
1996 return;
b2476490 1997
4dff95dc 1998 clk_summary_show_one(s, c, level);
0e1c0301 1999
4dff95dc
SB
2000 hlist_for_each_entry(child, &c->children, child_node)
2001 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 2002}
b2476490 2003
4dff95dc 2004static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 2005{
4dff95dc
SB
2006 struct clk_core *c;
2007 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 2008
4dff95dc
SB
2009 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
2010 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 2011
1c8e6004
TV
2012 clk_prepare_lock();
2013
4dff95dc
SB
2014 for (; *lists; lists++)
2015 hlist_for_each_entry(c, *lists, child_node)
2016 clk_summary_show_subtree(s, c, 0);
b2476490 2017
eab89f69 2018 clk_prepare_unlock();
b2476490 2019
4dff95dc 2020 return 0;
b2476490 2021}
1c8e6004 2022
1c8e6004 2023
4dff95dc 2024static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 2025{
4dff95dc 2026 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 2027}
b2476490 2028
4dff95dc
SB
2029static const struct file_operations clk_summary_fops = {
2030 .open = clk_summary_open,
2031 .read = seq_read,
2032 .llseek = seq_lseek,
2033 .release = single_release,
2034};
b2476490 2035
4dff95dc
SB
2036static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
2037{
2038 if (!c)
2039 return;
b2476490 2040
7cb81136 2041 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
2042 seq_printf(s, "\"%s\": { ", c->name);
2043 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
2044 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
7cb81136
SW
2045 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
2046 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
4dff95dc 2047 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 2048}
b2476490 2049
4dff95dc 2050static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 2051{
4dff95dc 2052 struct clk_core *child;
b2476490 2053
4dff95dc
SB
2054 if (!c)
2055 return;
b2476490 2056
4dff95dc 2057 clk_dump_one(s, c, level);
b2476490 2058
4dff95dc
SB
2059 hlist_for_each_entry(child, &c->children, child_node) {
2060 seq_printf(s, ",");
2061 clk_dump_subtree(s, child, level + 1);
b2476490
MT
2062 }
2063
4dff95dc 2064 seq_printf(s, "}");
b2476490
MT
2065}
2066
4dff95dc 2067static int clk_dump(struct seq_file *s, void *data)
4e88f3de 2068{
4dff95dc
SB
2069 struct clk_core *c;
2070 bool first_node = true;
2071 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 2072
4dff95dc 2073 seq_printf(s, "{");
4e88f3de 2074
4dff95dc 2075 clk_prepare_lock();
035a61c3 2076
4dff95dc
SB
2077 for (; *lists; lists++) {
2078 hlist_for_each_entry(c, *lists, child_node) {
2079 if (!first_node)
2080 seq_puts(s, ",");
2081 first_node = false;
2082 clk_dump_subtree(s, c, 0);
2083 }
2084 }
4e88f3de 2085
4dff95dc 2086 clk_prepare_unlock();
4e88f3de 2087
70e9f4dd 2088 seq_puts(s, "}\n");
4dff95dc 2089 return 0;
4e88f3de 2090}
4e88f3de 2091
4dff95dc
SB
2092
2093static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2094{
4dff95dc
SB
2095 return single_open(file, clk_dump, inode->i_private);
2096}
b2476490 2097
4dff95dc
SB
2098static const struct file_operations clk_dump_fops = {
2099 .open = clk_dump_open,
2100 .read = seq_read,
2101 .llseek = seq_lseek,
2102 .release = single_release,
2103};
89ac8d7a 2104
4dff95dc
SB
2105static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2106{
2107 struct dentry *d;
2108 int ret = -ENOMEM;
b2476490 2109
4dff95dc
SB
2110 if (!core || !pdentry) {
2111 ret = -EINVAL;
b2476490 2112 goto out;
4dff95dc 2113 }
b2476490 2114
4dff95dc
SB
2115 d = debugfs_create_dir(core->name, pdentry);
2116 if (!d)
b61c43c0 2117 goto out;
b61c43c0 2118
4dff95dc
SB
2119 core->dentry = d;
2120
2121 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2122 (u32 *)&core->rate);
2123 if (!d)
2124 goto err_out;
2125
2126 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2127 (u32 *)&core->accuracy);
2128 if (!d)
2129 goto err_out;
2130
2131 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2132 (u32 *)&core->phase);
2133 if (!d)
2134 goto err_out;
031dcc9b 2135
4dff95dc
SB
2136 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2137 (u32 *)&core->flags);
2138 if (!d)
2139 goto err_out;
031dcc9b 2140
4dff95dc
SB
2141 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2142 (u32 *)&core->prepare_count);
2143 if (!d)
2144 goto err_out;
b2476490 2145
4dff95dc
SB
2146 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2147 (u32 *)&core->enable_count);
2148 if (!d)
2149 goto err_out;
b2476490 2150
4dff95dc
SB
2151 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2152 (u32 *)&core->notifier_count);
2153 if (!d)
2154 goto err_out;
b2476490 2155
4dff95dc
SB
2156 if (core->ops->debug_init) {
2157 ret = core->ops->debug_init(core->hw, core->dentry);
2158 if (ret)
2159 goto err_out;
5279fc40 2160 }
b2476490 2161
4dff95dc
SB
2162 ret = 0;
2163 goto out;
b2476490 2164
4dff95dc
SB
2165err_out:
2166 debugfs_remove_recursive(core->dentry);
2167 core->dentry = NULL;
2168out:
b2476490
MT
2169 return ret;
2170}
035a61c3
TV
2171
2172/**
6e5ab41b
SB
2173 * clk_debug_register - add a clk node to the debugfs clk directory
2174 * @core: the clk being added to the debugfs clk directory
035a61c3 2175 *
6e5ab41b
SB
2176 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2177 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2178 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2179 */
4dff95dc 2180static int clk_debug_register(struct clk_core *core)
035a61c3 2181{
4dff95dc 2182 int ret = 0;
035a61c3 2183
4dff95dc
SB
2184 mutex_lock(&clk_debug_lock);
2185 hlist_add_head(&core->debug_node, &clk_debug_list);
2186
2187 if (!inited)
2188 goto unlock;
2189
2190 ret = clk_debug_create_one(core, rootdir);
2191unlock:
2192 mutex_unlock(&clk_debug_lock);
2193
2194 return ret;
035a61c3 2195}
b2476490 2196
4dff95dc 2197 /**
6e5ab41b
SB
2198 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2199 * @core: the clk being removed from the debugfs clk directory
e59c5371 2200 *
6e5ab41b
SB
2201 * Dynamically removes a clk and all its child nodes from the
2202 * debugfs clk directory if clk->dentry points to debugfs created by
4dff95dc 2203 * clk_debug_register in __clk_init.
e59c5371 2204 */
4dff95dc 2205static void clk_debug_unregister(struct clk_core *core)
e59c5371 2206{
4dff95dc
SB
2207 mutex_lock(&clk_debug_lock);
2208 hlist_del_init(&core->debug_node);
2209 debugfs_remove_recursive(core->dentry);
2210 core->dentry = NULL;
2211 mutex_unlock(&clk_debug_lock);
2212}
e59c5371 2213
4dff95dc
SB
2214struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2215 void *data, const struct file_operations *fops)
2216{
2217 struct dentry *d = NULL;
e59c5371 2218
4dff95dc
SB
2219 if (hw->core->dentry)
2220 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2221 fops);
e59c5371 2222
4dff95dc
SB
2223 return d;
2224}
2225EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2226
4dff95dc 2227/**
6e5ab41b 2228 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2229 *
6e5ab41b
SB
2230 * clks are often initialized very early during boot before memory can be
2231 * dynamically allocated and well before debugfs is setup. This function
2232 * populates the debugfs clk directory once at boot-time when we know that
2233 * debugfs is setup. It should only be called once at boot-time, all other clks
2234 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2235 */
2236static int __init clk_debug_init(void)
2237{
2238 struct clk_core *core;
2239 struct dentry *d;
dfc202ea 2240
4dff95dc 2241 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2242
4dff95dc
SB
2243 if (!rootdir)
2244 return -ENOMEM;
dfc202ea 2245
4dff95dc
SB
2246 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2247 &clk_summary_fops);
2248 if (!d)
2249 return -ENOMEM;
e59c5371 2250
4dff95dc
SB
2251 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2252 &clk_dump_fops);
2253 if (!d)
2254 return -ENOMEM;
e59c5371 2255
4dff95dc
SB
2256 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2257 &orphan_list, &clk_summary_fops);
2258 if (!d)
2259 return -ENOMEM;
e59c5371 2260
4dff95dc
SB
2261 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2262 &orphan_list, &clk_dump_fops);
2263 if (!d)
2264 return -ENOMEM;
e59c5371 2265
4dff95dc
SB
2266 mutex_lock(&clk_debug_lock);
2267 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2268 clk_debug_create_one(core, rootdir);
e59c5371 2269
4dff95dc
SB
2270 inited = 1;
2271 mutex_unlock(&clk_debug_lock);
e59c5371 2272
4dff95dc
SB
2273 return 0;
2274}
2275late_initcall(clk_debug_init);
2276#else
2277static inline int clk_debug_register(struct clk_core *core) { return 0; }
2278static inline void clk_debug_reparent(struct clk_core *core,
2279 struct clk_core *new_parent)
035a61c3 2280{
035a61c3 2281}
4dff95dc 2282static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2283{
3d3801ef 2284}
4dff95dc 2285#endif
3d3801ef 2286
b2476490
MT
2287/**
2288 * __clk_init - initialize the data structures in a struct clk
2289 * @dev: device initializing this clk, placeholder for now
2290 * @clk: clk being initialized
2291 *
035a61c3 2292 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2293 * parent and rate and sets them both.
b2476490 2294 */
b09d6d99 2295static int __clk_init(struct device *dev, struct clk *clk_user)
b2476490 2296{
d1302a36 2297 int i, ret = 0;
035a61c3 2298 struct clk_core *orphan;
b67bfe0d 2299 struct hlist_node *tmp2;
d6968fca 2300 struct clk_core *core;
1c8e6004 2301 unsigned long rate;
b2476490 2302
035a61c3 2303 if (!clk_user)
d1302a36 2304 return -EINVAL;
b2476490 2305
d6968fca 2306 core = clk_user->core;
035a61c3 2307
eab89f69 2308 clk_prepare_lock();
b2476490
MT
2309
2310 /* check to see if a clock with this name is already registered */
d6968fca 2311 if (clk_core_lookup(core->name)) {
d1302a36 2312 pr_debug("%s: clk %s already initialized\n",
d6968fca 2313 __func__, core->name);
d1302a36 2314 ret = -EEXIST;
b2476490 2315 goto out;
d1302a36 2316 }
b2476490 2317
d4d7e3dd 2318 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2319 if (core->ops->set_rate &&
2320 !((core->ops->round_rate || core->ops->determine_rate) &&
2321 core->ops->recalc_rate)) {
71472c0c 2322 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d6968fca 2323 __func__, core->name);
d1302a36 2324 ret = -EINVAL;
d4d7e3dd
MT
2325 goto out;
2326 }
2327
d6968fca 2328 if (core->ops->set_parent && !core->ops->get_parent) {
d4d7e3dd 2329 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
d6968fca 2330 __func__, core->name);
d1302a36 2331 ret = -EINVAL;
d4d7e3dd
MT
2332 goto out;
2333 }
2334
d6968fca
SB
2335 if (core->ops->set_rate_and_parent &&
2336 !(core->ops->set_parent && core->ops->set_rate)) {
3fa2252b 2337 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2338 __func__, core->name);
3fa2252b
SB
2339 ret = -EINVAL;
2340 goto out;
2341 }
2342
b2476490 2343 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2344 for (i = 0; i < core->num_parents; i++)
2345 WARN(!core->parent_names[i],
b2476490 2346 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2347 __func__, core->name);
b2476490
MT
2348
2349 /*
2350 * Allocate an array of struct clk *'s to avoid unnecessary string
2351 * look-ups of clk's possible parents. This can fail for clocks passed
d6968fca 2352 * in to clk_init during early boot; thus any access to core->parents[]
b2476490
MT
2353 * must always check for a NULL pointer and try to populate it if
2354 * necessary.
2355 *
d6968fca
SB
2356 * If core->parents is not NULL we skip this entire block. This allows
2357 * for clock drivers to statically initialize core->parents.
b2476490 2358 */
d6968fca
SB
2359 if (core->num_parents > 1 && !core->parents) {
2360 core->parents = kcalloc(core->num_parents, sizeof(struct clk *),
96a7ed90 2361 GFP_KERNEL);
b2476490 2362 /*
035a61c3 2363 * clk_core_lookup returns NULL for parents that have not been
b2476490
MT
2364 * clk_init'd; thus any access to clk->parents[] must check
2365 * for a NULL pointer. We can always perform lazy lookups for
2366 * missing parents later on.
2367 */
d6968fca
SB
2368 if (core->parents)
2369 for (i = 0; i < core->num_parents; i++)
2370 core->parents[i] =
2371 clk_core_lookup(core->parent_names[i]);
b2476490
MT
2372 }
2373
d6968fca 2374 core->parent = __clk_init_parent(core);
b2476490
MT
2375
2376 /*
d6968fca 2377 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2378 * parent has not yet been __clk_init'd then place clk in the orphan
2379 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2380 * clk list.
2381 *
2382 * Every time a new clk is clk_init'd then we walk the list of orphan
2383 * clocks and re-parent any that are children of the clock currently
2384 * being clk_init'd.
2385 */
e6500344 2386 if (core->parent) {
d6968fca
SB
2387 hlist_add_head(&core->child_node,
2388 &core->parent->children);
e6500344
HS
2389 core->orphan = core->parent->orphan;
2390 } else if (core->flags & CLK_IS_ROOT) {
d6968fca 2391 hlist_add_head(&core->child_node, &clk_root_list);
e6500344
HS
2392 core->orphan = false;
2393 } else {
d6968fca 2394 hlist_add_head(&core->child_node, &clk_orphan_list);
e6500344
HS
2395 core->orphan = true;
2396 }
b2476490 2397
5279fc40
BB
2398 /*
2399 * Set clk's accuracy. The preferred method is to use
2400 * .recalc_accuracy. For simple clocks and lazy developers the default
2401 * fallback is to use the parent's accuracy. If a clock doesn't have a
2402 * parent (or is orphaned) then accuracy is set to zero (perfect
2403 * clock).
2404 */
d6968fca
SB
2405 if (core->ops->recalc_accuracy)
2406 core->accuracy = core->ops->recalc_accuracy(core->hw,
2407 __clk_get_accuracy(core->parent));
2408 else if (core->parent)
2409 core->accuracy = core->parent->accuracy;
5279fc40 2410 else
d6968fca 2411 core->accuracy = 0;
5279fc40 2412
9824cf73
MR
2413 /*
2414 * Set clk's phase.
2415 * Since a phase is by definition relative to its parent, just
2416 * query the current clock phase, or just assume it's in phase.
2417 */
d6968fca
SB
2418 if (core->ops->get_phase)
2419 core->phase = core->ops->get_phase(core->hw);
9824cf73 2420 else
d6968fca 2421 core->phase = 0;
9824cf73 2422
b2476490
MT
2423 /*
2424 * Set clk's rate. The preferred method is to use .recalc_rate. For
2425 * simple clocks and lazy developers the default fallback is to use the
2426 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2427 * then rate is set to zero.
2428 */
d6968fca
SB
2429 if (core->ops->recalc_rate)
2430 rate = core->ops->recalc_rate(core->hw,
2431 clk_core_get_rate_nolock(core->parent));
2432 else if (core->parent)
2433 rate = core->parent->rate;
b2476490 2434 else
1c8e6004 2435 rate = 0;
d6968fca 2436 core->rate = core->req_rate = rate;
b2476490
MT
2437
2438 /*
2439 * walk the list of orphan clocks and reparent any that are children of
2440 * this clock
2441 */
b67bfe0d 2442 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2443 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2444 i = orphan->ops->get_parent(orphan->hw);
d6968fca
SB
2445 if (!strcmp(core->name, orphan->parent_names[i]))
2446 clk_core_reparent(orphan, core);
1f61e5f1
MF
2447 continue;
2448 }
2449
b2476490 2450 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2451 if (!strcmp(core->name, orphan->parent_names[i])) {
2452 clk_core_reparent(orphan, core);
b2476490
MT
2453 break;
2454 }
1f61e5f1 2455 }
b2476490
MT
2456
2457 /*
2458 * optional platform-specific magic
2459 *
2460 * The .init callback is not used by any of the basic clock types, but
2461 * exists for weird hardware that must perform initialization magic.
2462 * Please consider other ways of solving initialization problems before
24ee1a08 2463 * using this callback, as its use is discouraged.
b2476490 2464 */
d6968fca
SB
2465 if (core->ops->init)
2466 core->ops->init(core->hw);
b2476490 2467
d6968fca 2468 kref_init(&core->ref);
b2476490 2469out:
eab89f69 2470 clk_prepare_unlock();
b2476490 2471
89f7e9de 2472 if (!ret)
d6968fca 2473 clk_debug_register(core);
89f7e9de 2474
d1302a36 2475 return ret;
b2476490
MT
2476}
2477
035a61c3
TV
2478struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2479 const char *con_id)
0197b3ea 2480{
0197b3ea
SK
2481 struct clk *clk;
2482
035a61c3
TV
2483 /* This is to allow this function to be chained to others */
2484 if (!hw || IS_ERR(hw))
2485 return (struct clk *) hw;
0197b3ea 2486
035a61c3
TV
2487 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2488 if (!clk)
2489 return ERR_PTR(-ENOMEM);
2490
2491 clk->core = hw->core;
2492 clk->dev_id = dev_id;
2493 clk->con_id = con_id;
1c8e6004
TV
2494 clk->max_rate = ULONG_MAX;
2495
2496 clk_prepare_lock();
50595f8b 2497 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2498 clk_prepare_unlock();
0197b3ea
SK
2499
2500 return clk;
2501}
035a61c3 2502
73e0e496 2503void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2504{
2505 clk_prepare_lock();
50595f8b 2506 hlist_del(&clk->clks_node);
1c8e6004
TV
2507 clk_prepare_unlock();
2508
2509 kfree(clk);
2510}
0197b3ea 2511
293ba3b4
SB
2512/**
2513 * clk_register - allocate a new clock, register it and return an opaque cookie
2514 * @dev: device that is registering this clock
2515 * @hw: link to hardware-specific clock data
2516 *
2517 * clk_register is the primary interface for populating the clock tree with new
2518 * clock nodes. It returns a pointer to the newly allocated struct clk which
a59a5163 2519 * cannot be dereferenced by driver code but may be used in conjunction with the
293ba3b4
SB
2520 * rest of the clock API. In the event of an error clk_register will return an
2521 * error code; drivers must test for an error code after calling clk_register.
2522 */
2523struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2524{
d1302a36 2525 int i, ret;
d6968fca 2526 struct clk_core *core;
293ba3b4 2527
d6968fca
SB
2528 core = kzalloc(sizeof(*core), GFP_KERNEL);
2529 if (!core) {
293ba3b4
SB
2530 ret = -ENOMEM;
2531 goto fail_out;
2532 }
b2476490 2533
d6968fca
SB
2534 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2535 if (!core->name) {
0197b3ea
SK
2536 ret = -ENOMEM;
2537 goto fail_name;
2538 }
d6968fca 2539 core->ops = hw->init->ops;
ac2df527 2540 if (dev && dev->driver)
d6968fca
SB
2541 core->owner = dev->driver->owner;
2542 core->hw = hw;
2543 core->flags = hw->init->flags;
2544 core->num_parents = hw->init->num_parents;
9783c0d9
SB
2545 core->min_rate = 0;
2546 core->max_rate = ULONG_MAX;
d6968fca 2547 hw->core = core;
b2476490 2548
d1302a36 2549 /* allocate local copy in case parent_names is __initdata */
d6968fca 2550 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2551 GFP_KERNEL);
d1302a36 2552
d6968fca 2553 if (!core->parent_names) {
d1302a36
MT
2554 ret = -ENOMEM;
2555 goto fail_parent_names;
2556 }
2557
2558
2559 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2560 for (i = 0; i < core->num_parents; i++) {
2561 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2562 GFP_KERNEL);
d6968fca 2563 if (!core->parent_names[i]) {
d1302a36
MT
2564 ret = -ENOMEM;
2565 goto fail_parent_names_copy;
2566 }
2567 }
2568
d6968fca 2569 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2570
035a61c3
TV
2571 hw->clk = __clk_create_clk(hw, NULL, NULL);
2572 if (IS_ERR(hw->clk)) {
035a61c3
TV
2573 ret = PTR_ERR(hw->clk);
2574 goto fail_parent_names_copy;
2575 }
2576
2577 ret = __clk_init(dev, hw->clk);
d1302a36 2578 if (!ret)
035a61c3 2579 return hw->clk;
b2476490 2580
1c8e6004 2581 __clk_free_clk(hw->clk);
035a61c3 2582 hw->clk = NULL;
b2476490 2583
d1302a36
MT
2584fail_parent_names_copy:
2585 while (--i >= 0)
d6968fca
SB
2586 kfree_const(core->parent_names[i]);
2587 kfree(core->parent_names);
d1302a36 2588fail_parent_names:
d6968fca 2589 kfree_const(core->name);
0197b3ea 2590fail_name:
d6968fca 2591 kfree(core);
d1302a36
MT
2592fail_out:
2593 return ERR_PTR(ret);
b2476490
MT
2594}
2595EXPORT_SYMBOL_GPL(clk_register);
2596
6e5ab41b 2597/* Free memory allocated for a clock. */
fcb0ee6a
SN
2598static void __clk_release(struct kref *ref)
2599{
d6968fca
SB
2600 struct clk_core *core = container_of(ref, struct clk_core, ref);
2601 int i = core->num_parents;
fcb0ee6a 2602
496eadf8
KK
2603 lockdep_assert_held(&prepare_lock);
2604
d6968fca 2605 kfree(core->parents);
fcb0ee6a 2606 while (--i >= 0)
d6968fca 2607 kfree_const(core->parent_names[i]);
fcb0ee6a 2608
d6968fca
SB
2609 kfree(core->parent_names);
2610 kfree_const(core->name);
2611 kfree(core);
fcb0ee6a
SN
2612}
2613
2614/*
2615 * Empty clk_ops for unregistered clocks. These are used temporarily
2616 * after clk_unregister() was called on a clock and until last clock
2617 * consumer calls clk_put() and the struct clk object is freed.
2618 */
2619static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2620{
2621 return -ENXIO;
2622}
2623
2624static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2625{
2626 WARN_ON_ONCE(1);
2627}
2628
2629static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2630 unsigned long parent_rate)
2631{
2632 return -ENXIO;
2633}
2634
2635static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2636{
2637 return -ENXIO;
2638}
2639
2640static const struct clk_ops clk_nodrv_ops = {
2641 .enable = clk_nodrv_prepare_enable,
2642 .disable = clk_nodrv_disable_unprepare,
2643 .prepare = clk_nodrv_prepare_enable,
2644 .unprepare = clk_nodrv_disable_unprepare,
2645 .set_rate = clk_nodrv_set_rate,
2646 .set_parent = clk_nodrv_set_parent,
2647};
2648
1df5c939
MB
2649/**
2650 * clk_unregister - unregister a currently registered clock
2651 * @clk: clock to unregister
1df5c939 2652 */
fcb0ee6a
SN
2653void clk_unregister(struct clk *clk)
2654{
2655 unsigned long flags;
2656
6314b679
SB
2657 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2658 return;
2659
035a61c3 2660 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2661
2662 clk_prepare_lock();
2663
035a61c3
TV
2664 if (clk->core->ops == &clk_nodrv_ops) {
2665 pr_err("%s: unregistered clock: %s\n", __func__,
2666 clk->core->name);
6314b679 2667 return;
fcb0ee6a
SN
2668 }
2669 /*
2670 * Assign empty clock ops for consumers that might still hold
2671 * a reference to this clock.
2672 */
2673 flags = clk_enable_lock();
035a61c3 2674 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2675 clk_enable_unlock(flags);
2676
035a61c3
TV
2677 if (!hlist_empty(&clk->core->children)) {
2678 struct clk_core *child;
874f224c 2679 struct hlist_node *t;
fcb0ee6a
SN
2680
2681 /* Reparent all children to the orphan list. */
035a61c3
TV
2682 hlist_for_each_entry_safe(child, t, &clk->core->children,
2683 child_node)
2684 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2685 }
2686
035a61c3 2687 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2688
035a61c3 2689 if (clk->core->prepare_count)
fcb0ee6a 2690 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2691 __func__, clk->core->name);
2692 kref_put(&clk->core->ref, __clk_release);
6314b679 2693
fcb0ee6a
SN
2694 clk_prepare_unlock();
2695}
1df5c939
MB
2696EXPORT_SYMBOL_GPL(clk_unregister);
2697
46c8773a
SB
2698static void devm_clk_release(struct device *dev, void *res)
2699{
293ba3b4 2700 clk_unregister(*(struct clk **)res);
46c8773a
SB
2701}
2702
2703/**
2704 * devm_clk_register - resource managed clk_register()
2705 * @dev: device that is registering this clock
2706 * @hw: link to hardware-specific clock data
2707 *
2708 * Managed clk_register(). Clocks returned from this function are
2709 * automatically clk_unregister()ed on driver detach. See clk_register() for
2710 * more information.
2711 */
2712struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2713{
2714 struct clk *clk;
293ba3b4 2715 struct clk **clkp;
46c8773a 2716
293ba3b4
SB
2717 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2718 if (!clkp)
46c8773a
SB
2719 return ERR_PTR(-ENOMEM);
2720
293ba3b4
SB
2721 clk = clk_register(dev, hw);
2722 if (!IS_ERR(clk)) {
2723 *clkp = clk;
2724 devres_add(dev, clkp);
46c8773a 2725 } else {
293ba3b4 2726 devres_free(clkp);
46c8773a
SB
2727 }
2728
2729 return clk;
2730}
2731EXPORT_SYMBOL_GPL(devm_clk_register);
2732
2733static int devm_clk_match(struct device *dev, void *res, void *data)
2734{
2735 struct clk *c = res;
2736 if (WARN_ON(!c))
2737 return 0;
2738 return c == data;
2739}
2740
2741/**
2742 * devm_clk_unregister - resource managed clk_unregister()
2743 * @clk: clock to unregister
2744 *
2745 * Deallocate a clock allocated with devm_clk_register(). Normally
2746 * this function will not need to be called and the resource management
2747 * code will ensure that the resource is freed.
2748 */
2749void devm_clk_unregister(struct device *dev, struct clk *clk)
2750{
2751 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2752}
2753EXPORT_SYMBOL_GPL(devm_clk_unregister);
2754
ac2df527
SN
2755/*
2756 * clkdev helpers
2757 */
2758int __clk_get(struct clk *clk)
2759{
035a61c3
TV
2760 struct clk_core *core = !clk ? NULL : clk->core;
2761
2762 if (core) {
2763 if (!try_module_get(core->owner))
00efcb1c 2764 return 0;
ac2df527 2765
035a61c3 2766 kref_get(&core->ref);
00efcb1c 2767 }
ac2df527
SN
2768 return 1;
2769}
2770
2771void __clk_put(struct clk *clk)
2772{
10cdfe54
TV
2773 struct module *owner;
2774
00efcb1c 2775 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2776 return;
2777
fcb0ee6a 2778 clk_prepare_lock();
1c8e6004 2779
50595f8b 2780 hlist_del(&clk->clks_node);
ec02ace8
TV
2781 if (clk->min_rate > clk->core->req_rate ||
2782 clk->max_rate < clk->core->req_rate)
2783 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2784
1c8e6004
TV
2785 owner = clk->core->owner;
2786 kref_put(&clk->core->ref, __clk_release);
2787
fcb0ee6a
SN
2788 clk_prepare_unlock();
2789
10cdfe54 2790 module_put(owner);
035a61c3 2791
035a61c3 2792 kfree(clk);
ac2df527
SN
2793}
2794
b2476490
MT
2795/*** clk rate change notifiers ***/
2796
2797/**
2798 * clk_notifier_register - add a clk rate change notifier
2799 * @clk: struct clk * to watch
2800 * @nb: struct notifier_block * with callback info
2801 *
2802 * Request notification when clk's rate changes. This uses an SRCU
2803 * notifier because we want it to block and notifier unregistrations are
2804 * uncommon. The callbacks associated with the notifier must not
2805 * re-enter into the clk framework by calling any top-level clk APIs;
2806 * this will cause a nested prepare_lock mutex.
2807 *
5324fda7
SB
2808 * In all notification cases cases (pre, post and abort rate change) the
2809 * original clock rate is passed to the callback via struct
2810 * clk_notifier_data.old_rate and the new frequency is passed via struct
b2476490
MT
2811 * clk_notifier_data.new_rate.
2812 *
b2476490
MT
2813 * clk_notifier_register() must be called from non-atomic context.
2814 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2815 * allocation failure; otherwise, passes along the return value of
2816 * srcu_notifier_chain_register().
2817 */
2818int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2819{
2820 struct clk_notifier *cn;
2821 int ret = -ENOMEM;
2822
2823 if (!clk || !nb)
2824 return -EINVAL;
2825
eab89f69 2826 clk_prepare_lock();
b2476490
MT
2827
2828 /* search the list of notifiers for this clk */
2829 list_for_each_entry(cn, &clk_notifier_list, node)
2830 if (cn->clk == clk)
2831 break;
2832
2833 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2834 if (cn->clk != clk) {
2835 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2836 if (!cn)
2837 goto out;
2838
2839 cn->clk = clk;
2840 srcu_init_notifier_head(&cn->notifier_head);
2841
2842 list_add(&cn->node, &clk_notifier_list);
2843 }
2844
2845 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2846
035a61c3 2847 clk->core->notifier_count++;
b2476490
MT
2848
2849out:
eab89f69 2850 clk_prepare_unlock();
b2476490
MT
2851
2852 return ret;
2853}
2854EXPORT_SYMBOL_GPL(clk_notifier_register);
2855
2856/**
2857 * clk_notifier_unregister - remove a clk rate change notifier
2858 * @clk: struct clk *
2859 * @nb: struct notifier_block * with callback info
2860 *
2861 * Request no further notification for changes to 'clk' and frees memory
2862 * allocated in clk_notifier_register.
2863 *
2864 * Returns -EINVAL if called with null arguments; otherwise, passes
2865 * along the return value of srcu_notifier_chain_unregister().
2866 */
2867int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2868{
2869 struct clk_notifier *cn = NULL;
2870 int ret = -EINVAL;
2871
2872 if (!clk || !nb)
2873 return -EINVAL;
2874
eab89f69 2875 clk_prepare_lock();
b2476490
MT
2876
2877 list_for_each_entry(cn, &clk_notifier_list, node)
2878 if (cn->clk == clk)
2879 break;
2880
2881 if (cn->clk == clk) {
2882 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2883
035a61c3 2884 clk->core->notifier_count--;
b2476490
MT
2885
2886 /* XXX the notifier code should handle this better */
2887 if (!cn->notifier_head.head) {
2888 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2889 list_del(&cn->node);
b2476490
MT
2890 kfree(cn);
2891 }
2892
2893 } else {
2894 ret = -ENOENT;
2895 }
2896
eab89f69 2897 clk_prepare_unlock();
b2476490
MT
2898
2899 return ret;
2900}
2901EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2902
2903#ifdef CONFIG_OF
2904/**
2905 * struct of_clk_provider - Clock provider registration structure
2906 * @link: Entry in global list of clock providers
2907 * @node: Pointer to device tree node of clock provider
2908 * @get: Get clock callback. Returns NULL or a struct clk for the
2909 * given clock specifier
2910 * @data: context pointer to be passed into @get callback
2911 */
2912struct of_clk_provider {
2913 struct list_head link;
2914
2915 struct device_node *node;
2916 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2917 void *data;
2918};
2919
f2f6c255
PG
2920static const struct of_device_id __clk_of_table_sentinel
2921 __used __section(__clk_of_table_end);
2922
766e6a4e 2923static LIST_HEAD(of_clk_providers);
d6782c26
SN
2924static DEFINE_MUTEX(of_clk_mutex);
2925
766e6a4e
GL
2926struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2927 void *data)
2928{
2929 return data;
2930}
2931EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2932
494bfec9
SG
2933struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2934{
2935 struct clk_onecell_data *clk_data = data;
2936 unsigned int idx = clkspec->args[0];
2937
2938 if (idx >= clk_data->clk_num) {
2939 pr_err("%s: invalid clock index %d\n", __func__, idx);
2940 return ERR_PTR(-EINVAL);
2941 }
2942
2943 return clk_data->clks[idx];
2944}
2945EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2946
766e6a4e
GL
2947/**
2948 * of_clk_add_provider() - Register a clock provider for a node
2949 * @np: Device node pointer associated with clock provider
2950 * @clk_src_get: callback for decoding clock
2951 * @data: context pointer for @clk_src_get callback.
2952 */
2953int of_clk_add_provider(struct device_node *np,
2954 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2955 void *data),
2956 void *data)
2957{
2958 struct of_clk_provider *cp;
86be408b 2959 int ret;
766e6a4e
GL
2960
2961 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2962 if (!cp)
2963 return -ENOMEM;
2964
2965 cp->node = of_node_get(np);
2966 cp->data = data;
2967 cp->get = clk_src_get;
2968
d6782c26 2969 mutex_lock(&of_clk_mutex);
766e6a4e 2970 list_add(&cp->link, &of_clk_providers);
d6782c26 2971 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2972 pr_debug("Added clock from %s\n", np->full_name);
2973
86be408b
SN
2974 ret = of_clk_set_defaults(np, true);
2975 if (ret < 0)
2976 of_clk_del_provider(np);
2977
2978 return ret;
766e6a4e
GL
2979}
2980EXPORT_SYMBOL_GPL(of_clk_add_provider);
2981
2982/**
2983 * of_clk_del_provider() - Remove a previously registered clock provider
2984 * @np: Device node pointer associated with clock provider
2985 */
2986void of_clk_del_provider(struct device_node *np)
2987{
2988 struct of_clk_provider *cp;
2989
d6782c26 2990 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2991 list_for_each_entry(cp, &of_clk_providers, link) {
2992 if (cp->node == np) {
2993 list_del(&cp->link);
2994 of_node_put(cp->node);
2995 kfree(cp);
2996 break;
2997 }
2998 }
d6782c26 2999 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
3000}
3001EXPORT_SYMBOL_GPL(of_clk_del_provider);
3002
73e0e496
SB
3003struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
3004 const char *dev_id, const char *con_id)
766e6a4e
GL
3005{
3006 struct of_clk_provider *provider;
a34cd466 3007 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 3008
306c342f
SB
3009 if (!clkspec)
3010 return ERR_PTR(-EINVAL);
3011
766e6a4e 3012 /* Check if we have such a provider in our array */
306c342f 3013 mutex_lock(&of_clk_mutex);
766e6a4e
GL
3014 list_for_each_entry(provider, &of_clk_providers, link) {
3015 if (provider->node == clkspec->np)
3016 clk = provider->get(clkspec, provider->data);
73e0e496
SB
3017 if (!IS_ERR(clk)) {
3018 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
3019 con_id);
3020
3021 if (!IS_ERR(clk) && !__clk_get(clk)) {
3022 __clk_free_clk(clk);
3023 clk = ERR_PTR(-ENOENT);
3024 }
3025
766e6a4e 3026 break;
73e0e496 3027 }
766e6a4e 3028 }
306c342f 3029 mutex_unlock(&of_clk_mutex);
d6782c26
SN
3030
3031 return clk;
3032}
3033
306c342f
SB
3034/**
3035 * of_clk_get_from_provider() - Lookup a clock from a clock provider
3036 * @clkspec: pointer to a clock specifier data structure
3037 *
3038 * This function looks up a struct clk from the registered list of clock
3039 * providers, an input is a clock specifier data structure as returned
3040 * from the of_parse_phandle_with_args() function call.
3041 */
d6782c26
SN
3042struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
3043{
306c342f 3044 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
3045}
3046
f6102742
MT
3047int of_clk_get_parent_count(struct device_node *np)
3048{
3049 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
3050}
3051EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
3052
766e6a4e
GL
3053const char *of_clk_get_parent_name(struct device_node *np, int index)
3054{
3055 struct of_phandle_args clkspec;
7a0fc1a3 3056 struct property *prop;
766e6a4e 3057 const char *clk_name;
7a0fc1a3
BD
3058 const __be32 *vp;
3059 u32 pv;
766e6a4e 3060 int rc;
7a0fc1a3 3061 int count;
766e6a4e
GL
3062
3063 if (index < 0)
3064 return NULL;
3065
3066 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
3067 &clkspec);
3068 if (rc)
3069 return NULL;
3070
7a0fc1a3
BD
3071 index = clkspec.args_count ? clkspec.args[0] : 0;
3072 count = 0;
3073
3074 /* if there is an indices property, use it to transfer the index
3075 * specified into an array offset for the clock-output-names property.
3076 */
3077 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
3078 if (index == pv) {
3079 index = count;
3080 break;
3081 }
3082 count++;
3083 }
3084
766e6a4e 3085 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 3086 index,
766e6a4e
GL
3087 &clk_name) < 0)
3088 clk_name = clkspec.np->name;
3089
3090 of_node_put(clkspec.np);
3091 return clk_name;
3092}
3093EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3094
2e61dfb3
DN
3095/**
3096 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
3097 * number of parents
3098 * @np: Device node pointer associated with clock provider
3099 * @parents: pointer to char array that hold the parents' names
3100 * @size: size of the @parents array
3101 *
3102 * Return: number of parents for the clock node.
3103 */
3104int of_clk_parent_fill(struct device_node *np, const char **parents,
3105 unsigned int size)
3106{
3107 unsigned int i = 0;
3108
3109 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
3110 i++;
3111
3112 return i;
3113}
3114EXPORT_SYMBOL_GPL(of_clk_parent_fill);
3115
1771b10d
GC
3116struct clock_provider {
3117 of_clk_init_cb_t clk_init_cb;
3118 struct device_node *np;
3119 struct list_head node;
3120};
3121
1771b10d
GC
3122/*
3123 * This function looks for a parent clock. If there is one, then it
3124 * checks that the provider for this parent clock was initialized, in
3125 * this case the parent clock will be ready.
3126 */
3127static int parent_ready(struct device_node *np)
3128{
3129 int i = 0;
3130
3131 while (true) {
3132 struct clk *clk = of_clk_get(np, i);
3133
3134 /* this parent is ready we can check the next one */
3135 if (!IS_ERR(clk)) {
3136 clk_put(clk);
3137 i++;
3138 continue;
3139 }
3140
3141 /* at least one parent is not ready, we exit now */
3142 if (PTR_ERR(clk) == -EPROBE_DEFER)
3143 return 0;
3144
3145 /*
3146 * Here we make assumption that the device tree is
3147 * written correctly. So an error means that there is
3148 * no more parent. As we didn't exit yet, then the
3149 * previous parent are ready. If there is no clock
3150 * parent, no need to wait for them, then we can
3151 * consider their absence as being ready
3152 */
3153 return 1;
3154 }
3155}
3156
766e6a4e
GL
3157/**
3158 * of_clk_init() - Scan and init clock providers from the DT
3159 * @matches: array of compatible values and init functions for providers.
3160 *
1771b10d 3161 * This function scans the device tree for matching clock providers
e5ca8fb4 3162 * and calls their initialization functions. It also does it by trying
1771b10d 3163 * to follow the dependencies.
766e6a4e
GL
3164 */
3165void __init of_clk_init(const struct of_device_id *matches)
3166{
7f7ed584 3167 const struct of_device_id *match;
766e6a4e 3168 struct device_node *np;
1771b10d
GC
3169 struct clock_provider *clk_provider, *next;
3170 bool is_init_done;
3171 bool force = false;
2573a02a 3172 LIST_HEAD(clk_provider_list);
766e6a4e 3173
f2f6c255 3174 if (!matches)
819b4861 3175 matches = &__clk_of_table;
f2f6c255 3176
1771b10d 3177 /* First prepare the list of the clocks providers */
7f7ed584 3178 for_each_matching_node_and_match(np, matches, &match) {
2e3b19f1
SB
3179 struct clock_provider *parent;
3180
3181 parent = kzalloc(sizeof(*parent), GFP_KERNEL);
3182 if (!parent) {
3183 list_for_each_entry_safe(clk_provider, next,
3184 &clk_provider_list, node) {
3185 list_del(&clk_provider->node);
3186 kfree(clk_provider);
3187 }
3188 return;
3189 }
1771b10d
GC
3190
3191 parent->clk_init_cb = match->data;
3192 parent->np = np;
3f6d439f 3193 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3194 }
3195
3196 while (!list_empty(&clk_provider_list)) {
3197 is_init_done = false;
3198 list_for_each_entry_safe(clk_provider, next,
3199 &clk_provider_list, node) {
3200 if (force || parent_ready(clk_provider->np)) {
86be408b 3201
1771b10d 3202 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3203 of_clk_set_defaults(clk_provider->np, true);
3204
1771b10d
GC
3205 list_del(&clk_provider->node);
3206 kfree(clk_provider);
3207 is_init_done = true;
3208 }
3209 }
3210
3211 /*
e5ca8fb4 3212 * We didn't manage to initialize any of the
1771b10d
GC
3213 * remaining providers during the last loop, so now we
3214 * initialize all the remaining ones unconditionally
3215 * in case the clock parent was not mandatory
3216 */
3217 if (!is_init_done)
3218 force = true;
766e6a4e
GL
3219 }
3220}
3221#endif
This page took 0.551315 seconds and 5 git commands to generate.