Linux 4.0-rc1
[deliverable/linux.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
b09d6d99 12#include <linux/clk-provider.h>
86be408b 13#include <linux/clk/clk-conf.h>
b2476490
MT
14#include <linux/module.h>
15#include <linux/mutex.h>
16#include <linux/spinlock.h>
17#include <linux/err.h>
18#include <linux/list.h>
19#include <linux/slab.h>
766e6a4e 20#include <linux/of.h>
46c8773a 21#include <linux/device.h>
f2f6c255 22#include <linux/init.h>
533ddeb1 23#include <linux/sched.h>
b2476490 24
d6782c26
SN
25#include "clk.h"
26
b2476490
MT
27static DEFINE_SPINLOCK(enable_lock);
28static DEFINE_MUTEX(prepare_lock);
29
533ddeb1
MT
30static struct task_struct *prepare_owner;
31static struct task_struct *enable_owner;
32
33static int prepare_refcnt;
34static int enable_refcnt;
35
b2476490
MT
36static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list);
39
035a61c3
TV
40static long clk_core_get_accuracy(struct clk_core *clk);
41static unsigned long clk_core_get_rate(struct clk_core *clk);
42static int clk_core_get_phase(struct clk_core *clk);
43static bool clk_core_is_prepared(struct clk_core *clk);
44static bool clk_core_is_enabled(struct clk_core *clk);
035a61c3
TV
45static struct clk_core *clk_core_lookup(const char *name);
46
b09d6d99
MT
47/*** private data structures ***/
48
49struct clk_core {
50 const char *name;
51 const struct clk_ops *ops;
52 struct clk_hw *hw;
53 struct module *owner;
54 struct clk_core *parent;
55 const char **parent_names;
56 struct clk_core **parents;
57 u8 num_parents;
58 u8 new_parent_index;
59 unsigned long rate;
1c8e6004 60 unsigned long req_rate;
b09d6d99
MT
61 unsigned long new_rate;
62 struct clk_core *new_parent;
63 struct clk_core *new_child;
64 unsigned long flags;
65 unsigned int enable_count;
66 unsigned int prepare_count;
67 unsigned long accuracy;
68 int phase;
69 struct hlist_head children;
70 struct hlist_node child_node;
71 struct hlist_node debug_node;
1c8e6004 72 struct hlist_head clks;
b09d6d99
MT
73 unsigned int notifier_count;
74#ifdef CONFIG_DEBUG_FS
75 struct dentry *dentry;
76#endif
77 struct kref ref;
78};
79
80struct clk {
81 struct clk_core *core;
82 const char *dev_id;
83 const char *con_id;
1c8e6004
TV
84 unsigned long min_rate;
85 unsigned long max_rate;
86 struct hlist_node child_node;
b09d6d99
MT
87};
88
eab89f69
MT
89/*** locking ***/
90static void clk_prepare_lock(void)
91{
533ddeb1
MT
92 if (!mutex_trylock(&prepare_lock)) {
93 if (prepare_owner == current) {
94 prepare_refcnt++;
95 return;
96 }
97 mutex_lock(&prepare_lock);
98 }
99 WARN_ON_ONCE(prepare_owner != NULL);
100 WARN_ON_ONCE(prepare_refcnt != 0);
101 prepare_owner = current;
102 prepare_refcnt = 1;
eab89f69
MT
103}
104
105static void clk_prepare_unlock(void)
106{
533ddeb1
MT
107 WARN_ON_ONCE(prepare_owner != current);
108 WARN_ON_ONCE(prepare_refcnt == 0);
109
110 if (--prepare_refcnt)
111 return;
112 prepare_owner = NULL;
eab89f69
MT
113 mutex_unlock(&prepare_lock);
114}
115
116static unsigned long clk_enable_lock(void)
117{
118 unsigned long flags;
533ddeb1
MT
119
120 if (!spin_trylock_irqsave(&enable_lock, flags)) {
121 if (enable_owner == current) {
122 enable_refcnt++;
123 return flags;
124 }
125 spin_lock_irqsave(&enable_lock, flags);
126 }
127 WARN_ON_ONCE(enable_owner != NULL);
128 WARN_ON_ONCE(enable_refcnt != 0);
129 enable_owner = current;
130 enable_refcnt = 1;
eab89f69
MT
131 return flags;
132}
133
134static void clk_enable_unlock(unsigned long flags)
135{
533ddeb1
MT
136 WARN_ON_ONCE(enable_owner != current);
137 WARN_ON_ONCE(enable_refcnt == 0);
138
139 if (--enable_refcnt)
140 return;
141 enable_owner = NULL;
eab89f69
MT
142 spin_unlock_irqrestore(&enable_lock, flags);
143}
144
b2476490
MT
145/*** debugfs support ***/
146
ea72dc2c 147#ifdef CONFIG_DEBUG_FS
b2476490
MT
148#include <linux/debugfs.h>
149
150static struct dentry *rootdir;
b2476490 151static int inited = 0;
6314b679
SB
152static DEFINE_MUTEX(clk_debug_lock);
153static HLIST_HEAD(clk_debug_list);
b2476490 154
6b44c854
SK
155static struct hlist_head *all_lists[] = {
156 &clk_root_list,
157 &clk_orphan_list,
158 NULL,
159};
160
161static struct hlist_head *orphan_list[] = {
162 &clk_orphan_list,
163 NULL,
164};
165
035a61c3
TV
166static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
167 int level)
1af599df
PG
168{
169 if (!c)
170 return;
171
e59c5371 172 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1af599df
PG
173 level * 3 + 1, "",
174 30 - level * 3, c->name,
035a61c3
TV
175 c->enable_count, c->prepare_count, clk_core_get_rate(c),
176 clk_core_get_accuracy(c), clk_core_get_phase(c));
1af599df
PG
177}
178
035a61c3 179static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1af599df
PG
180 int level)
181{
035a61c3 182 struct clk_core *child;
1af599df
PG
183
184 if (!c)
185 return;
186
187 clk_summary_show_one(s, c, level);
188
b67bfe0d 189 hlist_for_each_entry(child, &c->children, child_node)
1af599df
PG
190 clk_summary_show_subtree(s, child, level + 1);
191}
192
193static int clk_summary_show(struct seq_file *s, void *data)
194{
035a61c3 195 struct clk_core *c;
27b8d5f7 196 struct hlist_head **lists = (struct hlist_head **)s->private;
1af599df 197
e59c5371
MT
198 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
199 seq_puts(s, "----------------------------------------------------------------------------------------\n");
1af599df 200
eab89f69 201 clk_prepare_lock();
1af599df 202
27b8d5f7
PDS
203 for (; *lists; lists++)
204 hlist_for_each_entry(c, *lists, child_node)
205 clk_summary_show_subtree(s, c, 0);
1af599df 206
eab89f69 207 clk_prepare_unlock();
1af599df
PG
208
209 return 0;
210}
211
212
213static int clk_summary_open(struct inode *inode, struct file *file)
214{
215 return single_open(file, clk_summary_show, inode->i_private);
216}
217
218static const struct file_operations clk_summary_fops = {
219 .open = clk_summary_open,
220 .read = seq_read,
221 .llseek = seq_lseek,
222 .release = single_release,
223};
224
035a61c3 225static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
bddca894
PG
226{
227 if (!c)
228 return;
229
230 seq_printf(s, "\"%s\": { ", c->name);
231 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
232 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
035a61c3
TV
233 seq_printf(s, "\"rate\": %lu", clk_core_get_rate(c));
234 seq_printf(s, "\"accuracy\": %lu", clk_core_get_accuracy(c));
235 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
bddca894
PG
236}
237
035a61c3 238static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
bddca894 239{
035a61c3 240 struct clk_core *child;
bddca894
PG
241
242 if (!c)
243 return;
244
245 clk_dump_one(s, c, level);
246
b67bfe0d 247 hlist_for_each_entry(child, &c->children, child_node) {
bddca894
PG
248 seq_printf(s, ",");
249 clk_dump_subtree(s, child, level + 1);
250 }
251
252 seq_printf(s, "}");
253}
254
255static int clk_dump(struct seq_file *s, void *data)
256{
035a61c3 257 struct clk_core *c;
bddca894 258 bool first_node = true;
27b8d5f7 259 struct hlist_head **lists = (struct hlist_head **)s->private;
bddca894
PG
260
261 seq_printf(s, "{");
262
eab89f69 263 clk_prepare_lock();
bddca894 264
27b8d5f7
PDS
265 for (; *lists; lists++) {
266 hlist_for_each_entry(c, *lists, child_node) {
267 if (!first_node)
268 seq_puts(s, ",");
269 first_node = false;
270 clk_dump_subtree(s, c, 0);
271 }
bddca894
PG
272 }
273
eab89f69 274 clk_prepare_unlock();
bddca894
PG
275
276 seq_printf(s, "}");
277 return 0;
278}
279
280
281static int clk_dump_open(struct inode *inode, struct file *file)
282{
283 return single_open(file, clk_dump, inode->i_private);
284}
285
286static const struct file_operations clk_dump_fops = {
287 .open = clk_dump_open,
288 .read = seq_read,
289 .llseek = seq_lseek,
290 .release = single_release,
291};
292
035a61c3 293static int clk_debug_create_one(struct clk_core *clk, struct dentry *pdentry)
b2476490
MT
294{
295 struct dentry *d;
296 int ret = -ENOMEM;
297
298 if (!clk || !pdentry) {
299 ret = -EINVAL;
300 goto out;
301 }
302
303 d = debugfs_create_dir(clk->name, pdentry);
304 if (!d)
305 goto out;
306
307 clk->dentry = d;
308
309 d = debugfs_create_u32("clk_rate", S_IRUGO, clk->dentry,
310 (u32 *)&clk->rate);
311 if (!d)
312 goto err_out;
313
5279fc40
BB
314 d = debugfs_create_u32("clk_accuracy", S_IRUGO, clk->dentry,
315 (u32 *)&clk->accuracy);
316 if (!d)
317 goto err_out;
318
e59c5371
MT
319 d = debugfs_create_u32("clk_phase", S_IRUGO, clk->dentry,
320 (u32 *)&clk->phase);
321 if (!d)
322 goto err_out;
323
b2476490
MT
324 d = debugfs_create_x32("clk_flags", S_IRUGO, clk->dentry,
325 (u32 *)&clk->flags);
326 if (!d)
327 goto err_out;
328
329 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, clk->dentry,
330 (u32 *)&clk->prepare_count);
331 if (!d)
332 goto err_out;
333
334 d = debugfs_create_u32("clk_enable_count", S_IRUGO, clk->dentry,
335 (u32 *)&clk->enable_count);
336 if (!d)
337 goto err_out;
338
339 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, clk->dentry,
340 (u32 *)&clk->notifier_count);
341 if (!d)
342 goto err_out;
343
abeab450
CB
344 if (clk->ops->debug_init) {
345 ret = clk->ops->debug_init(clk->hw, clk->dentry);
346 if (ret)
c646cbf1 347 goto err_out;
abeab450 348 }
c646cbf1 349
b2476490
MT
350 ret = 0;
351 goto out;
352
353err_out:
b5f98e65
AE
354 debugfs_remove_recursive(clk->dentry);
355 clk->dentry = NULL;
b2476490
MT
356out:
357 return ret;
358}
359
b2476490
MT
360/**
361 * clk_debug_register - add a clk node to the debugfs clk tree
362 * @clk: the clk being added to the debugfs clk tree
363 *
364 * Dynamically adds a clk to the debugfs clk tree if debugfs has been
365 * initialized. Otherwise it bails out early since the debugfs clk tree
366 * will be created lazily by clk_debug_init as part of a late_initcall.
b2476490 367 */
035a61c3 368static int clk_debug_register(struct clk_core *clk)
b2476490 369{
b2476490
MT
370 int ret = 0;
371
6314b679
SB
372 mutex_lock(&clk_debug_lock);
373 hlist_add_head(&clk->debug_node, &clk_debug_list);
374
b2476490 375 if (!inited)
6314b679 376 goto unlock;
b2476490 377
6314b679
SB
378 ret = clk_debug_create_one(clk, rootdir);
379unlock:
380 mutex_unlock(&clk_debug_lock);
b2476490 381
b2476490
MT
382 return ret;
383}
384
fcb0ee6a
SN
385 /**
386 * clk_debug_unregister - remove a clk node from the debugfs clk tree
387 * @clk: the clk being removed from the debugfs clk tree
388 *
389 * Dynamically removes a clk and all it's children clk nodes from the
390 * debugfs clk tree if clk->dentry points to debugfs created by
391 * clk_debug_register in __clk_init.
fcb0ee6a 392 */
035a61c3 393static void clk_debug_unregister(struct clk_core *clk)
fcb0ee6a 394{
6314b679 395 mutex_lock(&clk_debug_lock);
6314b679 396 hlist_del_init(&clk->debug_node);
fcb0ee6a 397 debugfs_remove_recursive(clk->dentry);
6314b679 398 clk->dentry = NULL;
6314b679 399 mutex_unlock(&clk_debug_lock);
fcb0ee6a
SN
400}
401
61c7cddf 402struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
fb2b3c9f
PDS
403 void *data, const struct file_operations *fops)
404{
405 struct dentry *d = NULL;
406
035a61c3
TV
407 if (hw->core->dentry)
408 d = debugfs_create_file(name, mode, hw->core->dentry, data,
409 fops);
fb2b3c9f
PDS
410
411 return d;
412}
413EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
414
b2476490
MT
415/**
416 * clk_debug_init - lazily create the debugfs clk tree visualization
417 *
418 * clks are often initialized very early during boot before memory can
419 * be dynamically allocated and well before debugfs is setup.
420 * clk_debug_init walks the clk tree hierarchy while holding
421 * prepare_lock and creates the topology as part of a late_initcall,
422 * thus insuring that clks initialized very early will still be
423 * represented in the debugfs clk tree. This function should only be
424 * called once at boot-time, and all other clks added dynamically will
425 * be done so with clk_debug_register.
426 */
427static int __init clk_debug_init(void)
428{
035a61c3 429 struct clk_core *clk;
1af599df 430 struct dentry *d;
b2476490
MT
431
432 rootdir = debugfs_create_dir("clk", NULL);
433
434 if (!rootdir)
435 return -ENOMEM;
436
27b8d5f7 437 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
1af599df
PG
438 &clk_summary_fops);
439 if (!d)
440 return -ENOMEM;
441
27b8d5f7 442 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
bddca894
PG
443 &clk_dump_fops);
444 if (!d)
445 return -ENOMEM;
446
27b8d5f7
PDS
447 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
448 &orphan_list, &clk_summary_fops);
449 if (!d)
450 return -ENOMEM;
b2476490 451
27b8d5f7
PDS
452 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
453 &orphan_list, &clk_dump_fops);
454 if (!d)
b2476490
MT
455 return -ENOMEM;
456
6314b679
SB
457 mutex_lock(&clk_debug_lock);
458 hlist_for_each_entry(clk, &clk_debug_list, debug_node)
459 clk_debug_create_one(clk, rootdir);
b2476490
MT
460
461 inited = 1;
6314b679 462 mutex_unlock(&clk_debug_lock);
b2476490
MT
463
464 return 0;
465}
466late_initcall(clk_debug_init);
467#else
035a61c3
TV
468static inline int clk_debug_register(struct clk_core *clk) { return 0; }
469static inline void clk_debug_reparent(struct clk_core *clk,
470 struct clk_core *new_parent)
b33d212f
UH
471{
472}
035a61c3 473static inline void clk_debug_unregister(struct clk_core *clk)
fcb0ee6a
SN
474{
475}
70d347e6 476#endif
b2476490 477
1c155b3d 478/* caller must hold prepare_lock */
035a61c3 479static void clk_unprepare_unused_subtree(struct clk_core *clk)
1c155b3d 480{
035a61c3 481 struct clk_core *child;
1c155b3d
UH
482
483 hlist_for_each_entry(child, &clk->children, child_node)
484 clk_unprepare_unused_subtree(child);
485
486 if (clk->prepare_count)
487 return;
488
489 if (clk->flags & CLK_IGNORE_UNUSED)
490 return;
491
035a61c3 492 if (clk_core_is_prepared(clk)) {
3cc8247f
UH
493 if (clk->ops->unprepare_unused)
494 clk->ops->unprepare_unused(clk->hw);
495 else if (clk->ops->unprepare)
1c155b3d 496 clk->ops->unprepare(clk->hw);
3cc8247f 497 }
1c155b3d
UH
498}
499
b2476490 500/* caller must hold prepare_lock */
035a61c3 501static void clk_disable_unused_subtree(struct clk_core *clk)
b2476490 502{
035a61c3 503 struct clk_core *child;
b2476490
MT
504 unsigned long flags;
505
b67bfe0d 506 hlist_for_each_entry(child, &clk->children, child_node)
b2476490
MT
507 clk_disable_unused_subtree(child);
508
eab89f69 509 flags = clk_enable_lock();
b2476490
MT
510
511 if (clk->enable_count)
512 goto unlock_out;
513
514 if (clk->flags & CLK_IGNORE_UNUSED)
515 goto unlock_out;
516
7c045a55
MT
517 /*
518 * some gate clocks have special needs during the disable-unused
519 * sequence. call .disable_unused if available, otherwise fall
520 * back to .disable
521 */
035a61c3 522 if (clk_core_is_enabled(clk)) {
7c045a55
MT
523 if (clk->ops->disable_unused)
524 clk->ops->disable_unused(clk->hw);
525 else if (clk->ops->disable)
526 clk->ops->disable(clk->hw);
527 }
b2476490
MT
528
529unlock_out:
eab89f69 530 clk_enable_unlock(flags);
b2476490
MT
531}
532
1e435256
OJ
533static bool clk_ignore_unused;
534static int __init clk_ignore_unused_setup(char *__unused)
535{
536 clk_ignore_unused = true;
537 return 1;
538}
539__setup("clk_ignore_unused", clk_ignore_unused_setup);
540
b2476490
MT
541static int clk_disable_unused(void)
542{
035a61c3 543 struct clk_core *clk;
b2476490 544
1e435256
OJ
545 if (clk_ignore_unused) {
546 pr_warn("clk: Not disabling unused clocks\n");
547 return 0;
548 }
549
eab89f69 550 clk_prepare_lock();
b2476490 551
b67bfe0d 552 hlist_for_each_entry(clk, &clk_root_list, child_node)
b2476490
MT
553 clk_disable_unused_subtree(clk);
554
b67bfe0d 555 hlist_for_each_entry(clk, &clk_orphan_list, child_node)
b2476490
MT
556 clk_disable_unused_subtree(clk);
557
1c155b3d
UH
558 hlist_for_each_entry(clk, &clk_root_list, child_node)
559 clk_unprepare_unused_subtree(clk);
560
561 hlist_for_each_entry(clk, &clk_orphan_list, child_node)
562 clk_unprepare_unused_subtree(clk);
563
eab89f69 564 clk_prepare_unlock();
b2476490
MT
565
566 return 0;
567}
d41d5805 568late_initcall_sync(clk_disable_unused);
b2476490
MT
569
570/*** helper functions ***/
571
65800b2c 572const char *__clk_get_name(struct clk *clk)
b2476490 573{
035a61c3 574 return !clk ? NULL : clk->core->name;
b2476490 575}
4895084c 576EXPORT_SYMBOL_GPL(__clk_get_name);
b2476490 577
65800b2c 578struct clk_hw *__clk_get_hw(struct clk *clk)
b2476490 579{
035a61c3 580 return !clk ? NULL : clk->core->hw;
b2476490 581}
0b7f04b8 582EXPORT_SYMBOL_GPL(__clk_get_hw);
b2476490 583
65800b2c 584u8 __clk_get_num_parents(struct clk *clk)
b2476490 585{
035a61c3 586 return !clk ? 0 : clk->core->num_parents;
b2476490 587}
0b7f04b8 588EXPORT_SYMBOL_GPL(__clk_get_num_parents);
b2476490 589
65800b2c 590struct clk *__clk_get_parent(struct clk *clk)
b2476490 591{
035a61c3
TV
592 if (!clk)
593 return NULL;
594
595 /* TODO: Create a per-user clk and change callers to call clk_put */
596 return !clk->core->parent ? NULL : clk->core->parent->hw->clk;
b2476490 597}
0b7f04b8 598EXPORT_SYMBOL_GPL(__clk_get_parent);
b2476490 599
035a61c3
TV
600static struct clk_core *clk_core_get_parent_by_index(struct clk_core *clk,
601 u8 index)
7ef3dcc8
JH
602{
603 if (!clk || index >= clk->num_parents)
604 return NULL;
605 else if (!clk->parents)
035a61c3 606 return clk_core_lookup(clk->parent_names[index]);
7ef3dcc8
JH
607 else if (!clk->parents[index])
608 return clk->parents[index] =
035a61c3 609 clk_core_lookup(clk->parent_names[index]);
7ef3dcc8
JH
610 else
611 return clk->parents[index];
612}
035a61c3
TV
613
614struct clk *clk_get_parent_by_index(struct clk *clk, u8 index)
615{
616 struct clk_core *parent;
617
618 if (!clk)
619 return NULL;
620
621 parent = clk_core_get_parent_by_index(clk->core, index);
622
623 return !parent ? NULL : parent->hw->clk;
624}
0b7f04b8 625EXPORT_SYMBOL_GPL(clk_get_parent_by_index);
7ef3dcc8 626
65800b2c 627unsigned int __clk_get_enable_count(struct clk *clk)
b2476490 628{
035a61c3 629 return !clk ? 0 : clk->core->enable_count;
b2476490
MT
630}
631
035a61c3 632static unsigned long clk_core_get_rate_nolock(struct clk_core *clk)
b2476490
MT
633{
634 unsigned long ret;
635
636 if (!clk) {
34e44fe8 637 ret = 0;
b2476490
MT
638 goto out;
639 }
640
641 ret = clk->rate;
642
643 if (clk->flags & CLK_IS_ROOT)
644 goto out;
645
646 if (!clk->parent)
34e44fe8 647 ret = 0;
b2476490
MT
648
649out:
650 return ret;
651}
035a61c3
TV
652
653unsigned long __clk_get_rate(struct clk *clk)
654{
655 if (!clk)
656 return 0;
657
658 return clk_core_get_rate_nolock(clk->core);
659}
0b7f04b8 660EXPORT_SYMBOL_GPL(__clk_get_rate);
b2476490 661
035a61c3 662static unsigned long __clk_get_accuracy(struct clk_core *clk)
5279fc40
BB
663{
664 if (!clk)
665 return 0;
666
667 return clk->accuracy;
668}
669
65800b2c 670unsigned long __clk_get_flags(struct clk *clk)
b2476490 671{
035a61c3 672 return !clk ? 0 : clk->core->flags;
b2476490 673}
b05c6836 674EXPORT_SYMBOL_GPL(__clk_get_flags);
b2476490 675
035a61c3 676static bool clk_core_is_prepared(struct clk_core *clk)
3d6ee287
UH
677{
678 int ret;
679
680 if (!clk)
681 return false;
682
683 /*
684 * .is_prepared is optional for clocks that can prepare
685 * fall back to software usage counter if it is missing
686 */
687 if (!clk->ops->is_prepared) {
688 ret = clk->prepare_count ? 1 : 0;
689 goto out;
690 }
691
692 ret = clk->ops->is_prepared(clk->hw);
693out:
694 return !!ret;
695}
696
035a61c3
TV
697bool __clk_is_prepared(struct clk *clk)
698{
699 if (!clk)
700 return false;
701
702 return clk_core_is_prepared(clk->core);
703}
704
705static bool clk_core_is_enabled(struct clk_core *clk)
b2476490
MT
706{
707 int ret;
708
709 if (!clk)
2ac6b1f5 710 return false;
b2476490
MT
711
712 /*
713 * .is_enabled is only mandatory for clocks that gate
714 * fall back to software usage counter if .is_enabled is missing
715 */
716 if (!clk->ops->is_enabled) {
717 ret = clk->enable_count ? 1 : 0;
718 goto out;
719 }
720
721 ret = clk->ops->is_enabled(clk->hw);
722out:
2ac6b1f5 723 return !!ret;
b2476490 724}
035a61c3
TV
725
726bool __clk_is_enabled(struct clk *clk)
727{
728 if (!clk)
729 return false;
730
731 return clk_core_is_enabled(clk->core);
732}
0b7f04b8 733EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 734
035a61c3
TV
735static struct clk_core *__clk_lookup_subtree(const char *name,
736 struct clk_core *clk)
b2476490 737{
035a61c3
TV
738 struct clk_core *child;
739 struct clk_core *ret;
b2476490
MT
740
741 if (!strcmp(clk->name, name))
742 return clk;
743
b67bfe0d 744 hlist_for_each_entry(child, &clk->children, child_node) {
b2476490
MT
745 ret = __clk_lookup_subtree(name, child);
746 if (ret)
747 return ret;
748 }
749
750 return NULL;
751}
752
035a61c3 753static struct clk_core *clk_core_lookup(const char *name)
b2476490 754{
035a61c3
TV
755 struct clk_core *root_clk;
756 struct clk_core *ret;
b2476490
MT
757
758 if (!name)
759 return NULL;
760
761 /* search the 'proper' clk tree first */
b67bfe0d 762 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
b2476490
MT
763 ret = __clk_lookup_subtree(name, root_clk);
764 if (ret)
765 return ret;
766 }
767
768 /* if not found, then search the orphan tree */
b67bfe0d 769 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
b2476490
MT
770 ret = __clk_lookup_subtree(name, root_clk);
771 if (ret)
772 return ret;
773 }
774
775 return NULL;
776}
777
15a02c1f
SB
778static bool mux_is_better_rate(unsigned long rate, unsigned long now,
779 unsigned long best, unsigned long flags)
e366fdd7 780{
15a02c1f
SB
781 if (flags & CLK_MUX_ROUND_CLOSEST)
782 return abs(now - rate) < abs(best - rate);
783
784 return now <= rate && now > best;
785}
786
787static long
788clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate,
1c8e6004
TV
789 unsigned long min_rate,
790 unsigned long max_rate,
15a02c1f
SB
791 unsigned long *best_parent_rate,
792 struct clk_hw **best_parent_p,
793 unsigned long flags)
e366fdd7 794{
035a61c3 795 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
e366fdd7
JH
796 int i, num_parents;
797 unsigned long parent_rate, best = 0;
798
799 /* if NO_REPARENT flag set, pass through to current parent */
035a61c3
TV
800 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
801 parent = core->parent;
802 if (core->flags & CLK_SET_RATE_PARENT)
9e0ad7d2
JMC
803 best = __clk_determine_rate(parent ? parent->hw : NULL,
804 rate, min_rate, max_rate);
e366fdd7 805 else if (parent)
035a61c3 806 best = clk_core_get_rate_nolock(parent);
e366fdd7 807 else
035a61c3 808 best = clk_core_get_rate_nolock(core);
e366fdd7
JH
809 goto out;
810 }
811
812 /* find the parent that can provide the fastest rate <= rate */
035a61c3 813 num_parents = core->num_parents;
e366fdd7 814 for (i = 0; i < num_parents; i++) {
035a61c3 815 parent = clk_core_get_parent_by_index(core, i);
e366fdd7
JH
816 if (!parent)
817 continue;
035a61c3 818 if (core->flags & CLK_SET_RATE_PARENT)
1c8e6004
TV
819 parent_rate = __clk_determine_rate(parent->hw, rate,
820 min_rate,
821 max_rate);
e366fdd7 822 else
035a61c3 823 parent_rate = clk_core_get_rate_nolock(parent);
15a02c1f 824 if (mux_is_better_rate(rate, parent_rate, best, flags)) {
e366fdd7
JH
825 best_parent = parent;
826 best = parent_rate;
827 }
828 }
829
830out:
831 if (best_parent)
646cafc6 832 *best_parent_p = best_parent->hw;
e366fdd7
JH
833 *best_parent_rate = best;
834
835 return best;
836}
15a02c1f 837
035a61c3
TV
838struct clk *__clk_lookup(const char *name)
839{
840 struct clk_core *core = clk_core_lookup(name);
841
842 return !core ? NULL : core->hw->clk;
843}
844
1c8e6004
TV
845static void clk_core_get_boundaries(struct clk_core *clk,
846 unsigned long *min_rate,
847 unsigned long *max_rate)
848{
849 struct clk *clk_user;
850
851 *min_rate = 0;
852 *max_rate = ULONG_MAX;
853
854 hlist_for_each_entry(clk_user, &clk->clks, child_node)
855 *min_rate = max(*min_rate, clk_user->min_rate);
856
857 hlist_for_each_entry(clk_user, &clk->clks, child_node)
858 *max_rate = min(*max_rate, clk_user->max_rate);
859}
860
15a02c1f
SB
861/*
862 * Helper for finding best parent to provide a given frequency. This can be used
863 * directly as a determine_rate callback (e.g. for a mux), or from a more
864 * complex clock that may combine a mux with other operations.
865 */
866long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
1c8e6004
TV
867 unsigned long min_rate,
868 unsigned long max_rate,
15a02c1f
SB
869 unsigned long *best_parent_rate,
870 struct clk_hw **best_parent_p)
871{
1c8e6004
TV
872 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
873 best_parent_rate,
15a02c1f
SB
874 best_parent_p, 0);
875}
0b7f04b8 876EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
e366fdd7 877
15a02c1f 878long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
1c8e6004
TV
879 unsigned long min_rate,
880 unsigned long max_rate,
15a02c1f
SB
881 unsigned long *best_parent_rate,
882 struct clk_hw **best_parent_p)
883{
1c8e6004
TV
884 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
885 best_parent_rate,
15a02c1f
SB
886 best_parent_p,
887 CLK_MUX_ROUND_CLOSEST);
888}
889EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
890
b2476490
MT
891/*** clk api ***/
892
035a61c3 893static void clk_core_unprepare(struct clk_core *clk)
b2476490
MT
894{
895 if (!clk)
896 return;
897
898 if (WARN_ON(clk->prepare_count == 0))
899 return;
900
901 if (--clk->prepare_count > 0)
902 return;
903
904 WARN_ON(clk->enable_count > 0);
905
906 if (clk->ops->unprepare)
907 clk->ops->unprepare(clk->hw);
908
035a61c3 909 clk_core_unprepare(clk->parent);
b2476490
MT
910}
911
912/**
913 * clk_unprepare - undo preparation of a clock source
24ee1a08 914 * @clk: the clk being unprepared
b2476490
MT
915 *
916 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
917 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
918 * if the operation may sleep. One example is a clk which is accessed over
919 * I2c. In the complex case a clk gate operation may require a fast and a slow
920 * part. It is this reason that clk_unprepare and clk_disable are not mutually
921 * exclusive. In fact clk_disable must be called before clk_unprepare.
922 */
923void clk_unprepare(struct clk *clk)
924{
63589e92
SB
925 if (IS_ERR_OR_NULL(clk))
926 return;
927
eab89f69 928 clk_prepare_lock();
035a61c3 929 clk_core_unprepare(clk->core);
eab89f69 930 clk_prepare_unlock();
b2476490
MT
931}
932EXPORT_SYMBOL_GPL(clk_unprepare);
933
035a61c3 934static int clk_core_prepare(struct clk_core *clk)
b2476490
MT
935{
936 int ret = 0;
937
938 if (!clk)
939 return 0;
940
941 if (clk->prepare_count == 0) {
035a61c3 942 ret = clk_core_prepare(clk->parent);
b2476490
MT
943 if (ret)
944 return ret;
945
946 if (clk->ops->prepare) {
947 ret = clk->ops->prepare(clk->hw);
948 if (ret) {
035a61c3 949 clk_core_unprepare(clk->parent);
b2476490
MT
950 return ret;
951 }
952 }
953 }
954
955 clk->prepare_count++;
956
957 return 0;
958}
959
960/**
961 * clk_prepare - prepare a clock source
962 * @clk: the clk being prepared
963 *
964 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
965 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
966 * operation may sleep. One example is a clk which is accessed over I2c. In
967 * the complex case a clk ungate operation may require a fast and a slow part.
968 * It is this reason that clk_prepare and clk_enable are not mutually
969 * exclusive. In fact clk_prepare must be called before clk_enable.
970 * Returns 0 on success, -EERROR otherwise.
971 */
972int clk_prepare(struct clk *clk)
973{
974 int ret;
975
035a61c3
TV
976 if (!clk)
977 return 0;
978
eab89f69 979 clk_prepare_lock();
035a61c3 980 ret = clk_core_prepare(clk->core);
eab89f69 981 clk_prepare_unlock();
b2476490
MT
982
983 return ret;
984}
985EXPORT_SYMBOL_GPL(clk_prepare);
986
035a61c3 987static void clk_core_disable(struct clk_core *clk)
b2476490
MT
988{
989 if (!clk)
990 return;
991
992 if (WARN_ON(clk->enable_count == 0))
993 return;
994
995 if (--clk->enable_count > 0)
996 return;
997
998 if (clk->ops->disable)
999 clk->ops->disable(clk->hw);
1000
035a61c3
TV
1001 clk_core_disable(clk->parent);
1002}
1003
1004static void __clk_disable(struct clk *clk)
1005{
1006 if (!clk)
1007 return;
1008
1009 clk_core_disable(clk->core);
b2476490
MT
1010}
1011
1012/**
1013 * clk_disable - gate a clock
1014 * @clk: the clk being gated
1015 *
1016 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
1017 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
1018 * clk if the operation is fast and will never sleep. One example is a
1019 * SoC-internal clk which is controlled via simple register writes. In the
1020 * complex case a clk gate operation may require a fast and a slow part. It is
1021 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
1022 * In fact clk_disable must be called before clk_unprepare.
1023 */
1024void clk_disable(struct clk *clk)
1025{
1026 unsigned long flags;
1027
63589e92
SB
1028 if (IS_ERR_OR_NULL(clk))
1029 return;
1030
eab89f69 1031 flags = clk_enable_lock();
b2476490 1032 __clk_disable(clk);
eab89f69 1033 clk_enable_unlock(flags);
b2476490
MT
1034}
1035EXPORT_SYMBOL_GPL(clk_disable);
1036
035a61c3 1037static int clk_core_enable(struct clk_core *clk)
b2476490
MT
1038{
1039 int ret = 0;
1040
1041 if (!clk)
1042 return 0;
1043
1044 if (WARN_ON(clk->prepare_count == 0))
1045 return -ESHUTDOWN;
1046
1047 if (clk->enable_count == 0) {
035a61c3 1048 ret = clk_core_enable(clk->parent);
b2476490
MT
1049
1050 if (ret)
1051 return ret;
1052
1053 if (clk->ops->enable) {
1054 ret = clk->ops->enable(clk->hw);
1055 if (ret) {
035a61c3 1056 clk_core_disable(clk->parent);
b2476490
MT
1057 return ret;
1058 }
1059 }
1060 }
1061
1062 clk->enable_count++;
1063 return 0;
1064}
1065
035a61c3
TV
1066static int __clk_enable(struct clk *clk)
1067{
1068 if (!clk)
1069 return 0;
1070
1071 return clk_core_enable(clk->core);
1072}
1073
b2476490
MT
1074/**
1075 * clk_enable - ungate a clock
1076 * @clk: the clk being ungated
1077 *
1078 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
1079 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
1080 * if the operation will never sleep. One example is a SoC-internal clk which
1081 * is controlled via simple register writes. In the complex case a clk ungate
1082 * operation may require a fast and a slow part. It is this reason that
1083 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
1084 * must be called before clk_enable. Returns 0 on success, -EERROR
1085 * otherwise.
1086 */
1087int clk_enable(struct clk *clk)
1088{
1089 unsigned long flags;
1090 int ret;
1091
eab89f69 1092 flags = clk_enable_lock();
b2476490 1093 ret = __clk_enable(clk);
eab89f69 1094 clk_enable_unlock(flags);
b2476490
MT
1095
1096 return ret;
1097}
1098EXPORT_SYMBOL_GPL(clk_enable);
1099
035a61c3 1100static unsigned long clk_core_round_rate_nolock(struct clk_core *clk,
1c8e6004
TV
1101 unsigned long rate,
1102 unsigned long min_rate,
1103 unsigned long max_rate)
b2476490 1104{
81536e07 1105 unsigned long parent_rate = 0;
035a61c3 1106 struct clk_core *parent;
646cafc6 1107 struct clk_hw *parent_hw;
b2476490
MT
1108
1109 if (!clk)
2ac6b1f5 1110 return 0;
b2476490 1111
71472c0c
JH
1112 parent = clk->parent;
1113 if (parent)
1114 parent_rate = parent->rate;
1115
646cafc6
TV
1116 if (clk->ops->determine_rate) {
1117 parent_hw = parent ? parent->hw : NULL;
1c8e6004
TV
1118 return clk->ops->determine_rate(clk->hw, rate,
1119 min_rate, max_rate,
1120 &parent_rate, &parent_hw);
646cafc6 1121 } else if (clk->ops->round_rate)
71472c0c
JH
1122 return clk->ops->round_rate(clk->hw, rate, &parent_rate);
1123 else if (clk->flags & CLK_SET_RATE_PARENT)
1c8e6004
TV
1124 return clk_core_round_rate_nolock(clk->parent, rate, min_rate,
1125 max_rate);
71472c0c
JH
1126 else
1127 return clk->rate;
b2476490 1128}
035a61c3 1129
1c8e6004
TV
1130/**
1131 * __clk_determine_rate - get the closest rate actually supported by a clock
1132 * @hw: determine the rate of this clock
1133 * @rate: target rate
1134 * @min_rate: returned rate must be greater than this rate
1135 * @max_rate: returned rate must be less than this rate
1136 *
1137 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate and
1138 * .determine_rate.
1139 */
1140unsigned long __clk_determine_rate(struct clk_hw *hw,
1141 unsigned long rate,
1142 unsigned long min_rate,
1143 unsigned long max_rate)
1144{
1145 if (!hw)
1146 return 0;
1147
1148 return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate);
1149}
1150EXPORT_SYMBOL_GPL(__clk_determine_rate);
1151
035a61c3
TV
1152/**
1153 * __clk_round_rate - round the given rate for a clk
1154 * @clk: round the rate of this clock
1155 * @rate: the rate which is to be rounded
1156 *
1157 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate
1158 */
1159unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)
1160{
1c8e6004
TV
1161 unsigned long min_rate;
1162 unsigned long max_rate;
1163
035a61c3
TV
1164 if (!clk)
1165 return 0;
1166
1c8e6004
TV
1167 clk_core_get_boundaries(clk->core, &min_rate, &max_rate);
1168
1169 return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate);
035a61c3 1170}
1cdf8ee2 1171EXPORT_SYMBOL_GPL(__clk_round_rate);
b2476490
MT
1172
1173/**
1174 * clk_round_rate - round the given rate for a clk
1175 * @clk: the clk for which we are rounding a rate
1176 * @rate: the rate which is to be rounded
1177 *
1178 * Takes in a rate as input and rounds it to a rate that the clk can actually
1179 * use which is then returned. If clk doesn't support round_rate operation
1180 * then the parent rate is returned.
1181 */
1182long clk_round_rate(struct clk *clk, unsigned long rate)
1183{
1184 unsigned long ret;
1185
035a61c3
TV
1186 if (!clk)
1187 return 0;
1188
eab89f69 1189 clk_prepare_lock();
b2476490 1190 ret = __clk_round_rate(clk, rate);
eab89f69 1191 clk_prepare_unlock();
b2476490
MT
1192
1193 return ret;
1194}
1195EXPORT_SYMBOL_GPL(clk_round_rate);
1196
1197/**
1198 * __clk_notify - call clk notifier chain
1199 * @clk: struct clk * that is changing rate
1200 * @msg: clk notifier type (see include/linux/clk.h)
1201 * @old_rate: old clk rate
1202 * @new_rate: new clk rate
1203 *
1204 * Triggers a notifier call chain on the clk rate-change notification
1205 * for 'clk'. Passes a pointer to the struct clk and the previous
1206 * and current rates to the notifier callback. Intended to be called by
1207 * internal clock code only. Returns NOTIFY_DONE from the last driver
1208 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1209 * a driver returns that.
1210 */
035a61c3 1211static int __clk_notify(struct clk_core *clk, unsigned long msg,
b2476490
MT
1212 unsigned long old_rate, unsigned long new_rate)
1213{
1214 struct clk_notifier *cn;
1215 struct clk_notifier_data cnd;
1216 int ret = NOTIFY_DONE;
1217
b2476490
MT
1218 cnd.old_rate = old_rate;
1219 cnd.new_rate = new_rate;
1220
1221 list_for_each_entry(cn, &clk_notifier_list, node) {
035a61c3
TV
1222 if (cn->clk->core == clk) {
1223 cnd.clk = cn->clk;
b2476490
MT
1224 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1225 &cnd);
b2476490
MT
1226 }
1227 }
1228
1229 return ret;
1230}
1231
5279fc40
BB
1232/**
1233 * __clk_recalc_accuracies
1234 * @clk: first clk in the subtree
1235 *
1236 * Walks the subtree of clks starting with clk and recalculates accuracies as
1237 * it goes. Note that if a clk does not implement the .recalc_accuracy
1238 * callback then it is assumed that the clock will take on the accuracy of it's
1239 * parent.
1240 *
1241 * Caller must hold prepare_lock.
1242 */
035a61c3 1243static void __clk_recalc_accuracies(struct clk_core *clk)
5279fc40
BB
1244{
1245 unsigned long parent_accuracy = 0;
035a61c3 1246 struct clk_core *child;
5279fc40
BB
1247
1248 if (clk->parent)
1249 parent_accuracy = clk->parent->accuracy;
1250
1251 if (clk->ops->recalc_accuracy)
1252 clk->accuracy = clk->ops->recalc_accuracy(clk->hw,
1253 parent_accuracy);
1254 else
1255 clk->accuracy = parent_accuracy;
1256
1257 hlist_for_each_entry(child, &clk->children, child_node)
1258 __clk_recalc_accuracies(child);
1259}
1260
035a61c3
TV
1261static long clk_core_get_accuracy(struct clk_core *clk)
1262{
1263 unsigned long accuracy;
1264
1265 clk_prepare_lock();
1266 if (clk && (clk->flags & CLK_GET_ACCURACY_NOCACHE))
1267 __clk_recalc_accuracies(clk);
1268
1269 accuracy = __clk_get_accuracy(clk);
1270 clk_prepare_unlock();
1271
1272 return accuracy;
1273}
1274
5279fc40
BB
1275/**
1276 * clk_get_accuracy - return the accuracy of clk
1277 * @clk: the clk whose accuracy is being returned
1278 *
1279 * Simply returns the cached accuracy of the clk, unless
1280 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1281 * issued.
1282 * If clk is NULL then returns 0.
1283 */
1284long clk_get_accuracy(struct clk *clk)
1285{
035a61c3
TV
1286 if (!clk)
1287 return 0;
5279fc40 1288
035a61c3 1289 return clk_core_get_accuracy(clk->core);
5279fc40
BB
1290}
1291EXPORT_SYMBOL_GPL(clk_get_accuracy);
1292
035a61c3
TV
1293static unsigned long clk_recalc(struct clk_core *clk,
1294 unsigned long parent_rate)
8f2c2db1
SB
1295{
1296 if (clk->ops->recalc_rate)
1297 return clk->ops->recalc_rate(clk->hw, parent_rate);
1298 return parent_rate;
1299}
1300
b2476490
MT
1301/**
1302 * __clk_recalc_rates
1303 * @clk: first clk in the subtree
1304 * @msg: notification type (see include/linux/clk.h)
1305 *
1306 * Walks the subtree of clks starting with clk and recalculates rates as it
1307 * goes. Note that if a clk does not implement the .recalc_rate callback then
24ee1a08 1308 * it is assumed that the clock will take on the rate of its parent.
b2476490
MT
1309 *
1310 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1311 * if necessary.
1312 *
1313 * Caller must hold prepare_lock.
1314 */
035a61c3 1315static void __clk_recalc_rates(struct clk_core *clk, unsigned long msg)
b2476490
MT
1316{
1317 unsigned long old_rate;
1318 unsigned long parent_rate = 0;
035a61c3 1319 struct clk_core *child;
b2476490
MT
1320
1321 old_rate = clk->rate;
1322
1323 if (clk->parent)
1324 parent_rate = clk->parent->rate;
1325
8f2c2db1 1326 clk->rate = clk_recalc(clk, parent_rate);
b2476490
MT
1327
1328 /*
1329 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1330 * & ABORT_RATE_CHANGE notifiers
1331 */
1332 if (clk->notifier_count && msg)
1333 __clk_notify(clk, msg, old_rate, clk->rate);
1334
b67bfe0d 1335 hlist_for_each_entry(child, &clk->children, child_node)
b2476490
MT
1336 __clk_recalc_rates(child, msg);
1337}
1338
035a61c3 1339static unsigned long clk_core_get_rate(struct clk_core *clk)
a093bde2
UH
1340{
1341 unsigned long rate;
1342
eab89f69 1343 clk_prepare_lock();
a093bde2
UH
1344
1345 if (clk && (clk->flags & CLK_GET_RATE_NOCACHE))
1346 __clk_recalc_rates(clk, 0);
1347
035a61c3 1348 rate = clk_core_get_rate_nolock(clk);
eab89f69 1349 clk_prepare_unlock();
a093bde2
UH
1350
1351 return rate;
1352}
035a61c3
TV
1353EXPORT_SYMBOL_GPL(clk_core_get_rate);
1354
1355/**
1356 * clk_get_rate - return the rate of clk
1357 * @clk: the clk whose rate is being returned
1358 *
1359 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1360 * is set, which means a recalc_rate will be issued.
1361 * If clk is NULL then returns 0.
1362 */
1363unsigned long clk_get_rate(struct clk *clk)
1364{
1365 if (!clk)
1366 return 0;
1367
1368 return clk_core_get_rate(clk->core);
1369}
a093bde2
UH
1370EXPORT_SYMBOL_GPL(clk_get_rate);
1371
035a61c3
TV
1372static int clk_fetch_parent_index(struct clk_core *clk,
1373 struct clk_core *parent)
4935b22c 1374{
f1c8b2ed 1375 int i;
4935b22c 1376
f1c8b2ed 1377 if (!clk->parents) {
96a7ed90
TF
1378 clk->parents = kcalloc(clk->num_parents,
1379 sizeof(struct clk *), GFP_KERNEL);
f1c8b2ed
TF
1380 if (!clk->parents)
1381 return -ENOMEM;
1382 }
4935b22c
JH
1383
1384 /*
1385 * find index of new parent clock using cached parent ptrs,
1386 * or if not yet cached, use string name comparison and cache
035a61c3 1387 * them now to avoid future calls to clk_core_lookup.
4935b22c
JH
1388 */
1389 for (i = 0; i < clk->num_parents; i++) {
da0f0b2c 1390 if (clk->parents[i] == parent)
f1c8b2ed 1391 return i;
da0f0b2c
TF
1392
1393 if (clk->parents[i])
1394 continue;
1395
1396 if (!strcmp(clk->parent_names[i], parent->name)) {
035a61c3 1397 clk->parents[i] = clk_core_lookup(parent->name);
f1c8b2ed 1398 return i;
4935b22c
JH
1399 }
1400 }
1401
f1c8b2ed 1402 return -EINVAL;
4935b22c
JH
1403}
1404
035a61c3 1405static void clk_reparent(struct clk_core *clk, struct clk_core *new_parent)
4935b22c
JH
1406{
1407 hlist_del(&clk->child_node);
1408
903efc55
JH
1409 if (new_parent) {
1410 /* avoid duplicate POST_RATE_CHANGE notifications */
1411 if (new_parent->new_child == clk)
1412 new_parent->new_child = NULL;
1413
4935b22c 1414 hlist_add_head(&clk->child_node, &new_parent->children);
903efc55 1415 } else {
4935b22c 1416 hlist_add_head(&clk->child_node, &clk_orphan_list);
903efc55 1417 }
4935b22c
JH
1418
1419 clk->parent = new_parent;
1420}
1421
035a61c3
TV
1422static struct clk_core *__clk_set_parent_before(struct clk_core *clk,
1423 struct clk_core *parent)
4935b22c
JH
1424{
1425 unsigned long flags;
035a61c3 1426 struct clk_core *old_parent = clk->parent;
4935b22c
JH
1427
1428 /*
1429 * Migrate prepare state between parents and prevent race with
1430 * clk_enable().
1431 *
1432 * If the clock is not prepared, then a race with
1433 * clk_enable/disable() is impossible since we already have the
1434 * prepare lock (future calls to clk_enable() need to be preceded by
1435 * a clk_prepare()).
1436 *
1437 * If the clock is prepared, migrate the prepared state to the new
1438 * parent and also protect against a race with clk_enable() by
1439 * forcing the clock and the new parent on. This ensures that all
1440 * future calls to clk_enable() are practically NOPs with respect to
1441 * hardware and software states.
1442 *
1443 * See also: Comment for clk_set_parent() below.
1444 */
1445 if (clk->prepare_count) {
035a61c3
TV
1446 clk_core_prepare(parent);
1447 clk_core_enable(parent);
1448 clk_core_enable(clk);
4935b22c
JH
1449 }
1450
1451 /* update the clk tree topology */
1452 flags = clk_enable_lock();
1453 clk_reparent(clk, parent);
1454 clk_enable_unlock(flags);
1455
3fa2252b
SB
1456 return old_parent;
1457}
1458
035a61c3
TV
1459static void __clk_set_parent_after(struct clk_core *core,
1460 struct clk_core *parent,
1461 struct clk_core *old_parent)
3fa2252b
SB
1462{
1463 /*
1464 * Finish the migration of prepare state and undo the changes done
1465 * for preventing a race with clk_enable().
1466 */
035a61c3
TV
1467 if (core->prepare_count) {
1468 clk_core_disable(core);
1469 clk_core_disable(old_parent);
1470 clk_core_unprepare(old_parent);
3fa2252b 1471 }
3fa2252b
SB
1472}
1473
035a61c3
TV
1474static int __clk_set_parent(struct clk_core *clk, struct clk_core *parent,
1475 u8 p_index)
3fa2252b
SB
1476{
1477 unsigned long flags;
1478 int ret = 0;
035a61c3 1479 struct clk_core *old_parent;
3fa2252b
SB
1480
1481 old_parent = __clk_set_parent_before(clk, parent);
1482
4935b22c
JH
1483 /* change clock input source */
1484 if (parent && clk->ops->set_parent)
1485 ret = clk->ops->set_parent(clk->hw, p_index);
1486
1487 if (ret) {
1488 flags = clk_enable_lock();
1489 clk_reparent(clk, old_parent);
1490 clk_enable_unlock(flags);
1491
1492 if (clk->prepare_count) {
035a61c3
TV
1493 clk_core_disable(clk);
1494 clk_core_disable(parent);
1495 clk_core_unprepare(parent);
4935b22c
JH
1496 }
1497 return ret;
1498 }
1499
3fa2252b 1500 __clk_set_parent_after(clk, parent, old_parent);
4935b22c 1501
4935b22c
JH
1502 return 0;
1503}
1504
b2476490
MT
1505/**
1506 * __clk_speculate_rates
1507 * @clk: first clk in the subtree
1508 * @parent_rate: the "future" rate of clk's parent
1509 *
1510 * Walks the subtree of clks starting with clk, speculating rates as it
1511 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1512 *
1513 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1514 * pre-rate change notifications and returns early if no clks in the
1515 * subtree have subscribed to the notifications. Note that if a clk does not
1516 * implement the .recalc_rate callback then it is assumed that the clock will
24ee1a08 1517 * take on the rate of its parent.
b2476490
MT
1518 *
1519 * Caller must hold prepare_lock.
1520 */
035a61c3
TV
1521static int __clk_speculate_rates(struct clk_core *clk,
1522 unsigned long parent_rate)
b2476490 1523{
035a61c3 1524 struct clk_core *child;
b2476490
MT
1525 unsigned long new_rate;
1526 int ret = NOTIFY_DONE;
1527
8f2c2db1 1528 new_rate = clk_recalc(clk, parent_rate);
b2476490 1529
fb72a059 1530 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
b2476490
MT
1531 if (clk->notifier_count)
1532 ret = __clk_notify(clk, PRE_RATE_CHANGE, clk->rate, new_rate);
1533
86bcfa2e
MT
1534 if (ret & NOTIFY_STOP_MASK) {
1535 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1536 __func__, clk->name, ret);
b2476490 1537 goto out;
86bcfa2e 1538 }
b2476490 1539
b67bfe0d 1540 hlist_for_each_entry(child, &clk->children, child_node) {
b2476490 1541 ret = __clk_speculate_rates(child, new_rate);
fb72a059 1542 if (ret & NOTIFY_STOP_MASK)
b2476490
MT
1543 break;
1544 }
1545
1546out:
1547 return ret;
1548}
1549
035a61c3
TV
1550static void clk_calc_subtree(struct clk_core *clk, unsigned long new_rate,
1551 struct clk_core *new_parent, u8 p_index)
b2476490 1552{
035a61c3 1553 struct clk_core *child;
b2476490
MT
1554
1555 clk->new_rate = new_rate;
71472c0c
JH
1556 clk->new_parent = new_parent;
1557 clk->new_parent_index = p_index;
1558 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1559 clk->new_child = NULL;
1560 if (new_parent && new_parent != clk->parent)
1561 new_parent->new_child = clk;
b2476490 1562
b67bfe0d 1563 hlist_for_each_entry(child, &clk->children, child_node) {
8f2c2db1 1564 child->new_rate = clk_recalc(child, new_rate);
71472c0c 1565 clk_calc_subtree(child, child->new_rate, NULL, 0);
b2476490
MT
1566 }
1567}
1568
1569/*
1570 * calculate the new rates returning the topmost clock that has to be
1571 * changed.
1572 */
035a61c3
TV
1573static struct clk_core *clk_calc_new_rates(struct clk_core *clk,
1574 unsigned long rate)
b2476490 1575{
035a61c3
TV
1576 struct clk_core *top = clk;
1577 struct clk_core *old_parent, *parent;
646cafc6 1578 struct clk_hw *parent_hw;
81536e07 1579 unsigned long best_parent_rate = 0;
b2476490 1580 unsigned long new_rate;
1c8e6004
TV
1581 unsigned long min_rate;
1582 unsigned long max_rate;
f1c8b2ed 1583 int p_index = 0;
b2476490 1584
7452b219
MT
1585 /* sanity */
1586 if (IS_ERR_OR_NULL(clk))
1587 return NULL;
1588
63f5c3b2 1589 /* save parent rate, if it exists */
71472c0c
JH
1590 parent = old_parent = clk->parent;
1591 if (parent)
1592 best_parent_rate = parent->rate;
1593
1c8e6004
TV
1594 clk_core_get_boundaries(clk, &min_rate, &max_rate);
1595
71472c0c
JH
1596 /* find the closest rate and parent clk/rate */
1597 if (clk->ops->determine_rate) {
646cafc6 1598 parent_hw = parent ? parent->hw : NULL;
71472c0c 1599 new_rate = clk->ops->determine_rate(clk->hw, rate,
1c8e6004
TV
1600 min_rate,
1601 max_rate,
71472c0c 1602 &best_parent_rate,
646cafc6 1603 &parent_hw);
035a61c3 1604 parent = parent_hw ? parent_hw->core : NULL;
71472c0c
JH
1605 } else if (clk->ops->round_rate) {
1606 new_rate = clk->ops->round_rate(clk->hw, rate,
1607 &best_parent_rate);
1c8e6004
TV
1608 if (new_rate < min_rate || new_rate > max_rate)
1609 return NULL;
71472c0c
JH
1610 } else if (!parent || !(clk->flags & CLK_SET_RATE_PARENT)) {
1611 /* pass-through clock without adjustable parent */
1612 clk->new_rate = clk->rate;
1613 return NULL;
1614 } else {
1615 /* pass-through clock with adjustable parent */
1616 top = clk_calc_new_rates(parent, rate);
1617 new_rate = parent->new_rate;
63f5c3b2 1618 goto out;
7452b219
MT
1619 }
1620
71472c0c
JH
1621 /* some clocks must be gated to change parent */
1622 if (parent != old_parent &&
1623 (clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) {
1624 pr_debug("%s: %s not gated but wants to reparent\n",
1625 __func__, clk->name);
b2476490
MT
1626 return NULL;
1627 }
1628
71472c0c 1629 /* try finding the new parent index */
4526e7b8 1630 if (parent && clk->num_parents > 1) {
71472c0c 1631 p_index = clk_fetch_parent_index(clk, parent);
f1c8b2ed 1632 if (p_index < 0) {
71472c0c
JH
1633 pr_debug("%s: clk %s can not be parent of clk %s\n",
1634 __func__, parent->name, clk->name);
1635 return NULL;
1636 }
b2476490
MT
1637 }
1638
71472c0c
JH
1639 if ((clk->flags & CLK_SET_RATE_PARENT) && parent &&
1640 best_parent_rate != parent->rate)
1641 top = clk_calc_new_rates(parent, best_parent_rate);
b2476490
MT
1642
1643out:
71472c0c 1644 clk_calc_subtree(clk, new_rate, parent, p_index);
b2476490
MT
1645
1646 return top;
1647}
1648
1649/*
1650 * Notify about rate changes in a subtree. Always walk down the whole tree
1651 * so that in case of an error we can walk down the whole tree again and
1652 * abort the change.
1653 */
035a61c3
TV
1654static struct clk_core *clk_propagate_rate_change(struct clk_core *clk,
1655 unsigned long event)
b2476490 1656{
035a61c3 1657 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1658 int ret = NOTIFY_DONE;
1659
1660 if (clk->rate == clk->new_rate)
5fda6858 1661 return NULL;
b2476490
MT
1662
1663 if (clk->notifier_count) {
1664 ret = __clk_notify(clk, event, clk->rate, clk->new_rate);
fb72a059 1665 if (ret & NOTIFY_STOP_MASK)
b2476490
MT
1666 fail_clk = clk;
1667 }
1668
b67bfe0d 1669 hlist_for_each_entry(child, &clk->children, child_node) {
71472c0c
JH
1670 /* Skip children who will be reparented to another clock */
1671 if (child->new_parent && child->new_parent != clk)
1672 continue;
1673 tmp_clk = clk_propagate_rate_change(child, event);
1674 if (tmp_clk)
1675 fail_clk = tmp_clk;
1676 }
1677
1678 /* handle the new child who might not be in clk->children yet */
1679 if (clk->new_child) {
1680 tmp_clk = clk_propagate_rate_change(clk->new_child, event);
1681 if (tmp_clk)
1682 fail_clk = tmp_clk;
b2476490
MT
1683 }
1684
1685 return fail_clk;
1686}
1687
1688/*
1689 * walk down a subtree and set the new rates notifying the rate
1690 * change on the way
1691 */
035a61c3 1692static void clk_change_rate(struct clk_core *clk)
b2476490 1693{
035a61c3 1694 struct clk_core *child;
067bb174 1695 struct hlist_node *tmp;
b2476490 1696 unsigned long old_rate;
bf47b4fd 1697 unsigned long best_parent_rate = 0;
3fa2252b 1698 bool skip_set_rate = false;
035a61c3 1699 struct clk_core *old_parent;
b2476490
MT
1700
1701 old_rate = clk->rate;
1702
3fa2252b
SB
1703 if (clk->new_parent)
1704 best_parent_rate = clk->new_parent->rate;
1705 else if (clk->parent)
bf47b4fd
PM
1706 best_parent_rate = clk->parent->rate;
1707
3fa2252b
SB
1708 if (clk->new_parent && clk->new_parent != clk->parent) {
1709 old_parent = __clk_set_parent_before(clk, clk->new_parent);
1710
1711 if (clk->ops->set_rate_and_parent) {
1712 skip_set_rate = true;
1713 clk->ops->set_rate_and_parent(clk->hw, clk->new_rate,
1714 best_parent_rate,
1715 clk->new_parent_index);
1716 } else if (clk->ops->set_parent) {
1717 clk->ops->set_parent(clk->hw, clk->new_parent_index);
1718 }
1719
1720 __clk_set_parent_after(clk, clk->new_parent, old_parent);
1721 }
1722
1723 if (!skip_set_rate && clk->ops->set_rate)
bf47b4fd 1724 clk->ops->set_rate(clk->hw, clk->new_rate, best_parent_rate);
b2476490 1725
8f2c2db1 1726 clk->rate = clk_recalc(clk, best_parent_rate);
b2476490
MT
1727
1728 if (clk->notifier_count && old_rate != clk->rate)
1729 __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate);
1730
067bb174
TK
1731 /*
1732 * Use safe iteration, as change_rate can actually swap parents
1733 * for certain clock types.
1734 */
1735 hlist_for_each_entry_safe(child, tmp, &clk->children, child_node) {
71472c0c
JH
1736 /* Skip children who will be reparented to another clock */
1737 if (child->new_parent && child->new_parent != clk)
1738 continue;
b2476490 1739 clk_change_rate(child);
71472c0c
JH
1740 }
1741
1742 /* handle the new child who might not be in clk->children yet */
1743 if (clk->new_child)
1744 clk_change_rate(clk->new_child);
b2476490
MT
1745}
1746
1c8e6004
TV
1747static int clk_core_set_rate_nolock(struct clk_core *clk,
1748 unsigned long req_rate)
1749{
1750 struct clk_core *top, *fail_clk;
1751 unsigned long rate = req_rate;
1752 int ret = 0;
1753
1754 if (!clk)
1755 return 0;
1756
1757 /* bail early if nothing to do */
1758 if (rate == clk_core_get_rate_nolock(clk))
1759 return 0;
1760
1761 if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count)
1762 return -EBUSY;
1763
1764 /* calculate new rates and get the topmost changed clock */
1765 top = clk_calc_new_rates(clk, rate);
1766 if (!top)
1767 return -EINVAL;
1768
1769 /* notify that we are about to change rates */
1770 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1771 if (fail_clk) {
1772 pr_debug("%s: failed to set %s rate\n", __func__,
1773 fail_clk->name);
1774 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1775 return -EBUSY;
1776 }
1777
1778 /* change the rates */
1779 clk_change_rate(top);
1780
1781 clk->req_rate = req_rate;
1782
1783 return ret;
1784}
1785
b2476490
MT
1786/**
1787 * clk_set_rate - specify a new rate for clk
1788 * @clk: the clk whose rate is being changed
1789 * @rate: the new rate for clk
1790 *
5654dc94 1791 * In the simplest case clk_set_rate will only adjust the rate of clk.
b2476490 1792 *
5654dc94
MT
1793 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1794 * propagate up to clk's parent; whether or not this happens depends on the
1795 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1796 * after calling .round_rate then upstream parent propagation is ignored. If
1797 * *parent_rate comes back with a new rate for clk's parent then we propagate
24ee1a08 1798 * up to clk's parent and set its rate. Upward propagation will continue
5654dc94
MT
1799 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1800 * .round_rate stops requesting changes to clk's parent_rate.
b2476490 1801 *
5654dc94
MT
1802 * Rate changes are accomplished via tree traversal that also recalculates the
1803 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
b2476490
MT
1804 *
1805 * Returns 0 on success, -EERROR otherwise.
1806 */
1807int clk_set_rate(struct clk *clk, unsigned long rate)
1808{
1c8e6004 1809 int ret;
b2476490 1810
89ac8d7a
MT
1811 if (!clk)
1812 return 0;
1813
b2476490 1814 /* prevent racing with updates to the clock topology */
eab89f69 1815 clk_prepare_lock();
b2476490 1816
1c8e6004 1817 ret = clk_core_set_rate_nolock(clk->core, rate);
b2476490 1818
1c8e6004 1819 clk_prepare_unlock();
0e1c0301 1820
1c8e6004
TV
1821 return ret;
1822}
1823EXPORT_SYMBOL_GPL(clk_set_rate);
b2476490 1824
1c8e6004
TV
1825/**
1826 * clk_set_rate_range - set a rate range for a clock source
1827 * @clk: clock source
1828 * @min: desired minimum clock rate in Hz, inclusive
1829 * @max: desired maximum clock rate in Hz, inclusive
1830 *
1831 * Returns success (0) or negative errno.
1832 */
1833int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
1834{
1835 int ret = 0;
1836
1837 if (!clk)
1838 return 0;
1839
1840 if (min > max) {
1841 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1842 __func__, clk->core->name, clk->dev_id, clk->con_id,
1843 min, max);
1844 return -EINVAL;
b2476490
MT
1845 }
1846
1c8e6004
TV
1847 clk_prepare_lock();
1848
1849 if (min != clk->min_rate || max != clk->max_rate) {
1850 clk->min_rate = min;
1851 clk->max_rate = max;
1852 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
1853 }
b2476490 1854
eab89f69 1855 clk_prepare_unlock();
b2476490
MT
1856
1857 return ret;
1858}
1c8e6004
TV
1859EXPORT_SYMBOL_GPL(clk_set_rate_range);
1860
1861/**
1862 * clk_set_min_rate - set a minimum clock rate for a clock source
1863 * @clk: clock source
1864 * @rate: desired minimum clock rate in Hz, inclusive
1865 *
1866 * Returns success (0) or negative errno.
1867 */
1868int clk_set_min_rate(struct clk *clk, unsigned long rate)
1869{
1870 if (!clk)
1871 return 0;
1872
1873 return clk_set_rate_range(clk, rate, clk->max_rate);
1874}
1875EXPORT_SYMBOL_GPL(clk_set_min_rate);
1876
1877/**
1878 * clk_set_max_rate - set a maximum clock rate for a clock source
1879 * @clk: clock source
1880 * @rate: desired maximum clock rate in Hz, inclusive
1881 *
1882 * Returns success (0) or negative errno.
1883 */
1884int clk_set_max_rate(struct clk *clk, unsigned long rate)
1885{
1886 if (!clk)
1887 return 0;
1888
1889 return clk_set_rate_range(clk, clk->min_rate, rate);
1890}
1891EXPORT_SYMBOL_GPL(clk_set_max_rate);
b2476490
MT
1892
1893/**
1894 * clk_get_parent - return the parent of a clk
1895 * @clk: the clk whose parent gets returned
1896 *
1897 * Simply returns clk->parent. Returns NULL if clk is NULL.
1898 */
1899struct clk *clk_get_parent(struct clk *clk)
1900{
1901 struct clk *parent;
1902
eab89f69 1903 clk_prepare_lock();
b2476490 1904 parent = __clk_get_parent(clk);
eab89f69 1905 clk_prepare_unlock();
b2476490
MT
1906
1907 return parent;
1908}
1909EXPORT_SYMBOL_GPL(clk_get_parent);
1910
1911/*
1912 * .get_parent is mandatory for clocks with multiple possible parents. It is
1913 * optional for single-parent clocks. Always call .get_parent if it is
1914 * available and WARN if it is missing for multi-parent clocks.
1915 *
1916 * For single-parent clocks without .get_parent, first check to see if the
1917 * .parents array exists, and if so use it to avoid an expensive tree
035a61c3 1918 * traversal. If .parents does not exist then walk the tree.
b2476490 1919 */
035a61c3 1920static struct clk_core *__clk_init_parent(struct clk_core *clk)
b2476490 1921{
035a61c3 1922 struct clk_core *ret = NULL;
b2476490
MT
1923 u8 index;
1924
1925 /* handle the trivial cases */
1926
1927 if (!clk->num_parents)
1928 goto out;
1929
1930 if (clk->num_parents == 1) {
1931 if (IS_ERR_OR_NULL(clk->parent))
035a61c3 1932 clk->parent = clk_core_lookup(clk->parent_names[0]);
b2476490
MT
1933 ret = clk->parent;
1934 goto out;
1935 }
1936
1937 if (!clk->ops->get_parent) {
1938 WARN(!clk->ops->get_parent,
1939 "%s: multi-parent clocks must implement .get_parent\n",
1940 __func__);
1941 goto out;
1942 };
1943
1944 /*
1945 * Do our best to cache parent clocks in clk->parents. This prevents
035a61c3
TV
1946 * unnecessary and expensive lookups. We don't set clk->parent here;
1947 * that is done by the calling function.
b2476490
MT
1948 */
1949
1950 index = clk->ops->get_parent(clk->hw);
1951
1952 if (!clk->parents)
1953 clk->parents =
96a7ed90 1954 kcalloc(clk->num_parents, sizeof(struct clk *),
b2476490
MT
1955 GFP_KERNEL);
1956
035a61c3 1957 ret = clk_core_get_parent_by_index(clk, index);
b2476490
MT
1958
1959out:
1960 return ret;
1961}
1962
035a61c3
TV
1963static void clk_core_reparent(struct clk_core *clk,
1964 struct clk_core *new_parent)
b33d212f
UH
1965{
1966 clk_reparent(clk, new_parent);
5279fc40 1967 __clk_recalc_accuracies(clk);
b2476490
MT
1968 __clk_recalc_rates(clk, POST_RATE_CHANGE);
1969}
1970
b2476490 1971/**
4e88f3de
TR
1972 * clk_has_parent - check if a clock is a possible parent for another
1973 * @clk: clock source
1974 * @parent: parent clock source
b2476490 1975 *
4e88f3de
TR
1976 * This function can be used in drivers that need to check that a clock can be
1977 * the parent of another without actually changing the parent.
f8aa0bd5 1978 *
4e88f3de 1979 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1980 */
4e88f3de
TR
1981bool clk_has_parent(struct clk *clk, struct clk *parent)
1982{
035a61c3 1983 struct clk_core *core, *parent_core;
4e88f3de
TR
1984 unsigned int i;
1985
1986 /* NULL clocks should be nops, so return success if either is NULL. */
1987 if (!clk || !parent)
1988 return true;
1989
035a61c3
TV
1990 core = clk->core;
1991 parent_core = parent->core;
1992
4e88f3de 1993 /* Optimize for the case where the parent is already the parent. */
035a61c3 1994 if (core->parent == parent_core)
4e88f3de
TR
1995 return true;
1996
035a61c3
TV
1997 for (i = 0; i < core->num_parents; i++)
1998 if (strcmp(core->parent_names[i], parent_core->name) == 0)
4e88f3de
TR
1999 return true;
2000
2001 return false;
2002}
2003EXPORT_SYMBOL_GPL(clk_has_parent);
2004
035a61c3 2005static int clk_core_set_parent(struct clk_core *clk, struct clk_core *parent)
b2476490
MT
2006{
2007 int ret = 0;
f1c8b2ed 2008 int p_index = 0;
031dcc9b 2009 unsigned long p_rate = 0;
b2476490 2010
89ac8d7a
MT
2011 if (!clk)
2012 return 0;
2013
031dcc9b
UH
2014 /* verify ops for for multi-parent clks */
2015 if ((clk->num_parents > 1) && (!clk->ops->set_parent))
b2476490
MT
2016 return -ENOSYS;
2017
2018 /* prevent racing with updates to the clock topology */
eab89f69 2019 clk_prepare_lock();
b2476490
MT
2020
2021 if (clk->parent == parent)
2022 goto out;
2023
031dcc9b
UH
2024 /* check that we are allowed to re-parent if the clock is in use */
2025 if ((clk->flags & CLK_SET_PARENT_GATE) && clk->prepare_count) {
2026 ret = -EBUSY;
2027 goto out;
2028 }
2029
2030 /* try finding the new parent index */
2031 if (parent) {
2032 p_index = clk_fetch_parent_index(clk, parent);
2033 p_rate = parent->rate;
f1c8b2ed 2034 if (p_index < 0) {
031dcc9b
UH
2035 pr_debug("%s: clk %s can not be parent of clk %s\n",
2036 __func__, parent->name, clk->name);
f1c8b2ed 2037 ret = p_index;
031dcc9b
UH
2038 goto out;
2039 }
2040 }
2041
b2476490 2042 /* propagate PRE_RATE_CHANGE notifications */
f3aab5d6 2043 ret = __clk_speculate_rates(clk, p_rate);
b2476490
MT
2044
2045 /* abort if a driver objects */
fb72a059 2046 if (ret & NOTIFY_STOP_MASK)
b2476490
MT
2047 goto out;
2048
031dcc9b
UH
2049 /* do the re-parent */
2050 ret = __clk_set_parent(clk, parent, p_index);
b2476490 2051
5279fc40
BB
2052 /* propagate rate an accuracy recalculation accordingly */
2053 if (ret) {
b2476490 2054 __clk_recalc_rates(clk, ABORT_RATE_CHANGE);
5279fc40 2055 } else {
a68de8e4 2056 __clk_recalc_rates(clk, POST_RATE_CHANGE);
5279fc40
BB
2057 __clk_recalc_accuracies(clk);
2058 }
b2476490
MT
2059
2060out:
eab89f69 2061 clk_prepare_unlock();
b2476490
MT
2062
2063 return ret;
2064}
035a61c3
TV
2065
2066/**
2067 * clk_set_parent - switch the parent of a mux clk
2068 * @clk: the mux clk whose input we are switching
2069 * @parent: the new input to clk
2070 *
2071 * Re-parent clk to use parent as its new input source. If clk is in
2072 * prepared state, the clk will get enabled for the duration of this call. If
2073 * that's not acceptable for a specific clk (Eg: the consumer can't handle
2074 * that, the reparenting is glitchy in hardware, etc), use the
2075 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2076 *
2077 * After successfully changing clk's parent clk_set_parent will update the
2078 * clk topology, sysfs topology and propagate rate recalculation via
2079 * __clk_recalc_rates.
2080 *
2081 * Returns 0 on success, -EERROR otherwise.
2082 */
2083int clk_set_parent(struct clk *clk, struct clk *parent)
2084{
2085 if (!clk)
2086 return 0;
2087
2088 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
2089}
b2476490
MT
2090EXPORT_SYMBOL_GPL(clk_set_parent);
2091
e59c5371
MT
2092/**
2093 * clk_set_phase - adjust the phase shift of a clock signal
2094 * @clk: clock signal source
2095 * @degrees: number of degrees the signal is shifted
2096 *
2097 * Shifts the phase of a clock signal by the specified
2098 * degrees. Returns 0 on success, -EERROR otherwise.
2099 *
2100 * This function makes no distinction about the input or reference
2101 * signal that we adjust the clock signal phase against. For example
2102 * phase locked-loop clock signal generators we may shift phase with
2103 * respect to feedback clock signal input, but for other cases the
2104 * clock phase may be shifted with respect to some other, unspecified
2105 * signal.
2106 *
2107 * Additionally the concept of phase shift does not propagate through
2108 * the clock tree hierarchy, which sets it apart from clock rates and
2109 * clock accuracy. A parent clock phase attribute does not have an
2110 * impact on the phase attribute of a child clock.
2111 */
2112int clk_set_phase(struct clk *clk, int degrees)
2113{
2114 int ret = 0;
2115
2116 if (!clk)
2117 goto out;
2118
2119 /* sanity check degrees */
2120 degrees %= 360;
2121 if (degrees < 0)
2122 degrees += 360;
2123
2124 clk_prepare_lock();
2125
035a61c3 2126 if (!clk->core->ops->set_phase)
e59c5371
MT
2127 goto out_unlock;
2128
035a61c3 2129 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
e59c5371
MT
2130
2131 if (!ret)
035a61c3 2132 clk->core->phase = degrees;
e59c5371
MT
2133
2134out_unlock:
2135 clk_prepare_unlock();
2136
2137out:
2138 return ret;
2139}
9767b04f 2140EXPORT_SYMBOL_GPL(clk_set_phase);
e59c5371 2141
035a61c3 2142static int clk_core_get_phase(struct clk_core *clk)
e59c5371
MT
2143{
2144 int ret = 0;
2145
2146 if (!clk)
2147 goto out;
2148
2149 clk_prepare_lock();
2150 ret = clk->phase;
2151 clk_prepare_unlock();
2152
2153out:
2154 return ret;
2155}
9767b04f 2156EXPORT_SYMBOL_GPL(clk_get_phase);
e59c5371 2157
035a61c3
TV
2158/**
2159 * clk_get_phase - return the phase shift of a clock signal
2160 * @clk: clock signal source
2161 *
2162 * Returns the phase shift of a clock node in degrees, otherwise returns
2163 * -EERROR.
2164 */
2165int clk_get_phase(struct clk *clk)
2166{
2167 if (!clk)
2168 return 0;
2169
2170 return clk_core_get_phase(clk->core);
2171}
e59c5371 2172
b2476490
MT
2173/**
2174 * __clk_init - initialize the data structures in a struct clk
2175 * @dev: device initializing this clk, placeholder for now
2176 * @clk: clk being initialized
2177 *
035a61c3 2178 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2179 * parent and rate and sets them both.
b2476490 2180 */
b09d6d99 2181static int __clk_init(struct device *dev, struct clk *clk_user)
b2476490 2182{
d1302a36 2183 int i, ret = 0;
035a61c3 2184 struct clk_core *orphan;
b67bfe0d 2185 struct hlist_node *tmp2;
035a61c3 2186 struct clk_core *clk;
1c8e6004 2187 unsigned long rate;
b2476490 2188
035a61c3 2189 if (!clk_user)
d1302a36 2190 return -EINVAL;
b2476490 2191
035a61c3
TV
2192 clk = clk_user->core;
2193
eab89f69 2194 clk_prepare_lock();
b2476490
MT
2195
2196 /* check to see if a clock with this name is already registered */
035a61c3 2197 if (clk_core_lookup(clk->name)) {
d1302a36
MT
2198 pr_debug("%s: clk %s already initialized\n",
2199 __func__, clk->name);
2200 ret = -EEXIST;
b2476490 2201 goto out;
d1302a36 2202 }
b2476490 2203
d4d7e3dd
MT
2204 /* check that clk_ops are sane. See Documentation/clk.txt */
2205 if (clk->ops->set_rate &&
71472c0c
JH
2206 !((clk->ops->round_rate || clk->ops->determine_rate) &&
2207 clk->ops->recalc_rate)) {
2208 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d4d7e3dd 2209 __func__, clk->name);
d1302a36 2210 ret = -EINVAL;
d4d7e3dd
MT
2211 goto out;
2212 }
2213
2214 if (clk->ops->set_parent && !clk->ops->get_parent) {
2215 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
2216 __func__, clk->name);
d1302a36 2217 ret = -EINVAL;
d4d7e3dd
MT
2218 goto out;
2219 }
2220
3fa2252b
SB
2221 if (clk->ops->set_rate_and_parent &&
2222 !(clk->ops->set_parent && clk->ops->set_rate)) {
2223 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
2224 __func__, clk->name);
2225 ret = -EINVAL;
2226 goto out;
2227 }
2228
b2476490
MT
2229 /* throw a WARN if any entries in parent_names are NULL */
2230 for (i = 0; i < clk->num_parents; i++)
2231 WARN(!clk->parent_names[i],
2232 "%s: invalid NULL in %s's .parent_names\n",
2233 __func__, clk->name);
2234
2235 /*
2236 * Allocate an array of struct clk *'s to avoid unnecessary string
2237 * look-ups of clk's possible parents. This can fail for clocks passed
2238 * in to clk_init during early boot; thus any access to clk->parents[]
2239 * must always check for a NULL pointer and try to populate it if
2240 * necessary.
2241 *
2242 * If clk->parents is not NULL we skip this entire block. This allows
2243 * for clock drivers to statically initialize clk->parents.
2244 */
9ca1c5a4 2245 if (clk->num_parents > 1 && !clk->parents) {
96a7ed90
TF
2246 clk->parents = kcalloc(clk->num_parents, sizeof(struct clk *),
2247 GFP_KERNEL);
b2476490 2248 /*
035a61c3 2249 * clk_core_lookup returns NULL for parents that have not been
b2476490
MT
2250 * clk_init'd; thus any access to clk->parents[] must check
2251 * for a NULL pointer. We can always perform lazy lookups for
2252 * missing parents later on.
2253 */
2254 if (clk->parents)
2255 for (i = 0; i < clk->num_parents; i++)
2256 clk->parents[i] =
035a61c3 2257 clk_core_lookup(clk->parent_names[i]);
b2476490
MT
2258 }
2259
2260 clk->parent = __clk_init_parent(clk);
2261
2262 /*
2263 * Populate clk->parent if parent has already been __clk_init'd. If
2264 * parent has not yet been __clk_init'd then place clk in the orphan
2265 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2266 * clk list.
2267 *
2268 * Every time a new clk is clk_init'd then we walk the list of orphan
2269 * clocks and re-parent any that are children of the clock currently
2270 * being clk_init'd.
2271 */
2272 if (clk->parent)
2273 hlist_add_head(&clk->child_node,
2274 &clk->parent->children);
2275 else if (clk->flags & CLK_IS_ROOT)
2276 hlist_add_head(&clk->child_node, &clk_root_list);
2277 else
2278 hlist_add_head(&clk->child_node, &clk_orphan_list);
2279
5279fc40
BB
2280 /*
2281 * Set clk's accuracy. The preferred method is to use
2282 * .recalc_accuracy. For simple clocks and lazy developers the default
2283 * fallback is to use the parent's accuracy. If a clock doesn't have a
2284 * parent (or is orphaned) then accuracy is set to zero (perfect
2285 * clock).
2286 */
2287 if (clk->ops->recalc_accuracy)
2288 clk->accuracy = clk->ops->recalc_accuracy(clk->hw,
2289 __clk_get_accuracy(clk->parent));
2290 else if (clk->parent)
2291 clk->accuracy = clk->parent->accuracy;
2292 else
2293 clk->accuracy = 0;
2294
9824cf73
MR
2295 /*
2296 * Set clk's phase.
2297 * Since a phase is by definition relative to its parent, just
2298 * query the current clock phase, or just assume it's in phase.
2299 */
2300 if (clk->ops->get_phase)
2301 clk->phase = clk->ops->get_phase(clk->hw);
2302 else
2303 clk->phase = 0;
2304
b2476490
MT
2305 /*
2306 * Set clk's rate. The preferred method is to use .recalc_rate. For
2307 * simple clocks and lazy developers the default fallback is to use the
2308 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2309 * then rate is set to zero.
2310 */
2311 if (clk->ops->recalc_rate)
1c8e6004 2312 rate = clk->ops->recalc_rate(clk->hw,
035a61c3 2313 clk_core_get_rate_nolock(clk->parent));
b2476490 2314 else if (clk->parent)
1c8e6004 2315 rate = clk->parent->rate;
b2476490 2316 else
1c8e6004
TV
2317 rate = 0;
2318 clk->rate = clk->req_rate = rate;
b2476490
MT
2319
2320 /*
2321 * walk the list of orphan clocks and reparent any that are children of
2322 * this clock
2323 */
b67bfe0d 2324 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2325 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1
MF
2326 i = orphan->ops->get_parent(orphan->hw);
2327 if (!strcmp(clk->name, orphan->parent_names[i]))
035a61c3 2328 clk_core_reparent(orphan, clk);
1f61e5f1
MF
2329 continue;
2330 }
2331
b2476490
MT
2332 for (i = 0; i < orphan->num_parents; i++)
2333 if (!strcmp(clk->name, orphan->parent_names[i])) {
035a61c3 2334 clk_core_reparent(orphan, clk);
b2476490
MT
2335 break;
2336 }
1f61e5f1 2337 }
b2476490
MT
2338
2339 /*
2340 * optional platform-specific magic
2341 *
2342 * The .init callback is not used by any of the basic clock types, but
2343 * exists for weird hardware that must perform initialization magic.
2344 * Please consider other ways of solving initialization problems before
24ee1a08 2345 * using this callback, as its use is discouraged.
b2476490
MT
2346 */
2347 if (clk->ops->init)
2348 clk->ops->init(clk->hw);
2349
fcb0ee6a 2350 kref_init(&clk->ref);
b2476490 2351out:
eab89f69 2352 clk_prepare_unlock();
b2476490 2353
89f7e9de
SB
2354 if (!ret)
2355 clk_debug_register(clk);
2356
d1302a36 2357 return ret;
b2476490
MT
2358}
2359
035a61c3
TV
2360struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2361 const char *con_id)
0197b3ea 2362{
0197b3ea
SK
2363 struct clk *clk;
2364
035a61c3
TV
2365 /* This is to allow this function to be chained to others */
2366 if (!hw || IS_ERR(hw))
2367 return (struct clk *) hw;
0197b3ea 2368
035a61c3
TV
2369 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2370 if (!clk)
2371 return ERR_PTR(-ENOMEM);
2372
2373 clk->core = hw->core;
2374 clk->dev_id = dev_id;
2375 clk->con_id = con_id;
1c8e6004
TV
2376 clk->max_rate = ULONG_MAX;
2377
2378 clk_prepare_lock();
2379 hlist_add_head(&clk->child_node, &hw->core->clks);
2380 clk_prepare_unlock();
0197b3ea
SK
2381
2382 return clk;
2383}
035a61c3 2384
73e0e496 2385void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2386{
2387 clk_prepare_lock();
2388 hlist_del(&clk->child_node);
2389 clk_prepare_unlock();
2390
2391 kfree(clk);
2392}
0197b3ea 2393
293ba3b4
SB
2394/**
2395 * clk_register - allocate a new clock, register it and return an opaque cookie
2396 * @dev: device that is registering this clock
2397 * @hw: link to hardware-specific clock data
2398 *
2399 * clk_register is the primary interface for populating the clock tree with new
2400 * clock nodes. It returns a pointer to the newly allocated struct clk which
2401 * cannot be dereferenced by driver code but may be used in conjuction with the
2402 * rest of the clock API. In the event of an error clk_register will return an
2403 * error code; drivers must test for an error code after calling clk_register.
2404 */
2405struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2406{
d1302a36 2407 int i, ret;
035a61c3 2408 struct clk_core *clk;
293ba3b4
SB
2409
2410 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2411 if (!clk) {
2412 pr_err("%s: could not allocate clk\n", __func__);
2413 ret = -ENOMEM;
2414 goto fail_out;
2415 }
b2476490 2416
612936f2 2417 clk->name = kstrdup_const(hw->init->name, GFP_KERNEL);
0197b3ea
SK
2418 if (!clk->name) {
2419 pr_err("%s: could not allocate clk->name\n", __func__);
2420 ret = -ENOMEM;
2421 goto fail_name;
2422 }
2423 clk->ops = hw->init->ops;
ac2df527
SN
2424 if (dev && dev->driver)
2425 clk->owner = dev->driver->owner;
b2476490 2426 clk->hw = hw;
0197b3ea
SK
2427 clk->flags = hw->init->flags;
2428 clk->num_parents = hw->init->num_parents;
035a61c3 2429 hw->core = clk;
b2476490 2430
d1302a36 2431 /* allocate local copy in case parent_names is __initdata */
96a7ed90
TF
2432 clk->parent_names = kcalloc(clk->num_parents, sizeof(char *),
2433 GFP_KERNEL);
d1302a36
MT
2434
2435 if (!clk->parent_names) {
2436 pr_err("%s: could not allocate clk->parent_names\n", __func__);
2437 ret = -ENOMEM;
2438 goto fail_parent_names;
2439 }
2440
2441
2442 /* copy each string name in case parent_names is __initdata */
0197b3ea 2443 for (i = 0; i < clk->num_parents; i++) {
612936f2 2444 clk->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2445 GFP_KERNEL);
d1302a36
MT
2446 if (!clk->parent_names[i]) {
2447 pr_err("%s: could not copy parent_names\n", __func__);
2448 ret = -ENOMEM;
2449 goto fail_parent_names_copy;
2450 }
2451 }
2452
1c8e6004
TV
2453 INIT_HLIST_HEAD(&clk->clks);
2454
035a61c3
TV
2455 hw->clk = __clk_create_clk(hw, NULL, NULL);
2456 if (IS_ERR(hw->clk)) {
2457 pr_err("%s: could not allocate per-user clk\n", __func__);
2458 ret = PTR_ERR(hw->clk);
2459 goto fail_parent_names_copy;
2460 }
2461
2462 ret = __clk_init(dev, hw->clk);
d1302a36 2463 if (!ret)
035a61c3 2464 return hw->clk;
b2476490 2465
1c8e6004 2466 __clk_free_clk(hw->clk);
035a61c3 2467 hw->clk = NULL;
b2476490 2468
d1302a36
MT
2469fail_parent_names_copy:
2470 while (--i >= 0)
612936f2 2471 kfree_const(clk->parent_names[i]);
d1302a36
MT
2472 kfree(clk->parent_names);
2473fail_parent_names:
612936f2 2474 kfree_const(clk->name);
0197b3ea 2475fail_name:
d1302a36
MT
2476 kfree(clk);
2477fail_out:
2478 return ERR_PTR(ret);
b2476490
MT
2479}
2480EXPORT_SYMBOL_GPL(clk_register);
2481
fcb0ee6a
SN
2482/*
2483 * Free memory allocated for a clock.
2484 * Caller must hold prepare_lock.
2485 */
2486static void __clk_release(struct kref *ref)
2487{
035a61c3 2488 struct clk_core *clk = container_of(ref, struct clk_core, ref);
fcb0ee6a
SN
2489 int i = clk->num_parents;
2490
2491 kfree(clk->parents);
2492 while (--i >= 0)
612936f2 2493 kfree_const(clk->parent_names[i]);
fcb0ee6a
SN
2494
2495 kfree(clk->parent_names);
612936f2 2496 kfree_const(clk->name);
fcb0ee6a
SN
2497 kfree(clk);
2498}
2499
2500/*
2501 * Empty clk_ops for unregistered clocks. These are used temporarily
2502 * after clk_unregister() was called on a clock and until last clock
2503 * consumer calls clk_put() and the struct clk object is freed.
2504 */
2505static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2506{
2507 return -ENXIO;
2508}
2509
2510static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2511{
2512 WARN_ON_ONCE(1);
2513}
2514
2515static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2516 unsigned long parent_rate)
2517{
2518 return -ENXIO;
2519}
2520
2521static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2522{
2523 return -ENXIO;
2524}
2525
2526static const struct clk_ops clk_nodrv_ops = {
2527 .enable = clk_nodrv_prepare_enable,
2528 .disable = clk_nodrv_disable_unprepare,
2529 .prepare = clk_nodrv_prepare_enable,
2530 .unprepare = clk_nodrv_disable_unprepare,
2531 .set_rate = clk_nodrv_set_rate,
2532 .set_parent = clk_nodrv_set_parent,
2533};
2534
1df5c939
MB
2535/**
2536 * clk_unregister - unregister a currently registered clock
2537 * @clk: clock to unregister
1df5c939 2538 */
fcb0ee6a
SN
2539void clk_unregister(struct clk *clk)
2540{
2541 unsigned long flags;
2542
6314b679
SB
2543 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2544 return;
2545
035a61c3 2546 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2547
2548 clk_prepare_lock();
2549
035a61c3
TV
2550 if (clk->core->ops == &clk_nodrv_ops) {
2551 pr_err("%s: unregistered clock: %s\n", __func__,
2552 clk->core->name);
6314b679 2553 return;
fcb0ee6a
SN
2554 }
2555 /*
2556 * Assign empty clock ops for consumers that might still hold
2557 * a reference to this clock.
2558 */
2559 flags = clk_enable_lock();
035a61c3 2560 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2561 clk_enable_unlock(flags);
2562
035a61c3
TV
2563 if (!hlist_empty(&clk->core->children)) {
2564 struct clk_core *child;
874f224c 2565 struct hlist_node *t;
fcb0ee6a
SN
2566
2567 /* Reparent all children to the orphan list. */
035a61c3
TV
2568 hlist_for_each_entry_safe(child, t, &clk->core->children,
2569 child_node)
2570 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2571 }
2572
035a61c3 2573 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2574
035a61c3 2575 if (clk->core->prepare_count)
fcb0ee6a 2576 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2577 __func__, clk->core->name);
2578 kref_put(&clk->core->ref, __clk_release);
6314b679 2579
fcb0ee6a
SN
2580 clk_prepare_unlock();
2581}
1df5c939
MB
2582EXPORT_SYMBOL_GPL(clk_unregister);
2583
46c8773a
SB
2584static void devm_clk_release(struct device *dev, void *res)
2585{
293ba3b4 2586 clk_unregister(*(struct clk **)res);
46c8773a
SB
2587}
2588
2589/**
2590 * devm_clk_register - resource managed clk_register()
2591 * @dev: device that is registering this clock
2592 * @hw: link to hardware-specific clock data
2593 *
2594 * Managed clk_register(). Clocks returned from this function are
2595 * automatically clk_unregister()ed on driver detach. See clk_register() for
2596 * more information.
2597 */
2598struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2599{
2600 struct clk *clk;
293ba3b4 2601 struct clk **clkp;
46c8773a 2602
293ba3b4
SB
2603 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2604 if (!clkp)
46c8773a
SB
2605 return ERR_PTR(-ENOMEM);
2606
293ba3b4
SB
2607 clk = clk_register(dev, hw);
2608 if (!IS_ERR(clk)) {
2609 *clkp = clk;
2610 devres_add(dev, clkp);
46c8773a 2611 } else {
293ba3b4 2612 devres_free(clkp);
46c8773a
SB
2613 }
2614
2615 return clk;
2616}
2617EXPORT_SYMBOL_GPL(devm_clk_register);
2618
2619static int devm_clk_match(struct device *dev, void *res, void *data)
2620{
2621 struct clk *c = res;
2622 if (WARN_ON(!c))
2623 return 0;
2624 return c == data;
2625}
2626
2627/**
2628 * devm_clk_unregister - resource managed clk_unregister()
2629 * @clk: clock to unregister
2630 *
2631 * Deallocate a clock allocated with devm_clk_register(). Normally
2632 * this function will not need to be called and the resource management
2633 * code will ensure that the resource is freed.
2634 */
2635void devm_clk_unregister(struct device *dev, struct clk *clk)
2636{
2637 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2638}
2639EXPORT_SYMBOL_GPL(devm_clk_unregister);
2640
ac2df527
SN
2641/*
2642 * clkdev helpers
2643 */
2644int __clk_get(struct clk *clk)
2645{
035a61c3
TV
2646 struct clk_core *core = !clk ? NULL : clk->core;
2647
2648 if (core) {
2649 if (!try_module_get(core->owner))
00efcb1c 2650 return 0;
ac2df527 2651
035a61c3 2652 kref_get(&core->ref);
00efcb1c 2653 }
ac2df527
SN
2654 return 1;
2655}
2656
2657void __clk_put(struct clk *clk)
2658{
10cdfe54
TV
2659 struct module *owner;
2660
00efcb1c 2661 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2662 return;
2663
fcb0ee6a 2664 clk_prepare_lock();
1c8e6004
TV
2665
2666 hlist_del(&clk->child_node);
ec02ace8
TV
2667 if (clk->min_rate > clk->core->req_rate ||
2668 clk->max_rate < clk->core->req_rate)
2669 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2670
1c8e6004
TV
2671 owner = clk->core->owner;
2672 kref_put(&clk->core->ref, __clk_release);
2673
fcb0ee6a
SN
2674 clk_prepare_unlock();
2675
10cdfe54 2676 module_put(owner);
035a61c3 2677
035a61c3 2678 kfree(clk);
ac2df527
SN
2679}
2680
b2476490
MT
2681/*** clk rate change notifiers ***/
2682
2683/**
2684 * clk_notifier_register - add a clk rate change notifier
2685 * @clk: struct clk * to watch
2686 * @nb: struct notifier_block * with callback info
2687 *
2688 * Request notification when clk's rate changes. This uses an SRCU
2689 * notifier because we want it to block and notifier unregistrations are
2690 * uncommon. The callbacks associated with the notifier must not
2691 * re-enter into the clk framework by calling any top-level clk APIs;
2692 * this will cause a nested prepare_lock mutex.
2693 *
5324fda7
SB
2694 * In all notification cases cases (pre, post and abort rate change) the
2695 * original clock rate is passed to the callback via struct
2696 * clk_notifier_data.old_rate and the new frequency is passed via struct
b2476490
MT
2697 * clk_notifier_data.new_rate.
2698 *
b2476490
MT
2699 * clk_notifier_register() must be called from non-atomic context.
2700 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2701 * allocation failure; otherwise, passes along the return value of
2702 * srcu_notifier_chain_register().
2703 */
2704int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2705{
2706 struct clk_notifier *cn;
2707 int ret = -ENOMEM;
2708
2709 if (!clk || !nb)
2710 return -EINVAL;
2711
eab89f69 2712 clk_prepare_lock();
b2476490
MT
2713
2714 /* search the list of notifiers for this clk */
2715 list_for_each_entry(cn, &clk_notifier_list, node)
2716 if (cn->clk == clk)
2717 break;
2718
2719 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2720 if (cn->clk != clk) {
2721 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2722 if (!cn)
2723 goto out;
2724
2725 cn->clk = clk;
2726 srcu_init_notifier_head(&cn->notifier_head);
2727
2728 list_add(&cn->node, &clk_notifier_list);
2729 }
2730
2731 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2732
035a61c3 2733 clk->core->notifier_count++;
b2476490
MT
2734
2735out:
eab89f69 2736 clk_prepare_unlock();
b2476490
MT
2737
2738 return ret;
2739}
2740EXPORT_SYMBOL_GPL(clk_notifier_register);
2741
2742/**
2743 * clk_notifier_unregister - remove a clk rate change notifier
2744 * @clk: struct clk *
2745 * @nb: struct notifier_block * with callback info
2746 *
2747 * Request no further notification for changes to 'clk' and frees memory
2748 * allocated in clk_notifier_register.
2749 *
2750 * Returns -EINVAL if called with null arguments; otherwise, passes
2751 * along the return value of srcu_notifier_chain_unregister().
2752 */
2753int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2754{
2755 struct clk_notifier *cn = NULL;
2756 int ret = -EINVAL;
2757
2758 if (!clk || !nb)
2759 return -EINVAL;
2760
eab89f69 2761 clk_prepare_lock();
b2476490
MT
2762
2763 list_for_each_entry(cn, &clk_notifier_list, node)
2764 if (cn->clk == clk)
2765 break;
2766
2767 if (cn->clk == clk) {
2768 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2769
035a61c3 2770 clk->core->notifier_count--;
b2476490
MT
2771
2772 /* XXX the notifier code should handle this better */
2773 if (!cn->notifier_head.head) {
2774 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2775 list_del(&cn->node);
b2476490
MT
2776 kfree(cn);
2777 }
2778
2779 } else {
2780 ret = -ENOENT;
2781 }
2782
eab89f69 2783 clk_prepare_unlock();
b2476490
MT
2784
2785 return ret;
2786}
2787EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2788
2789#ifdef CONFIG_OF
2790/**
2791 * struct of_clk_provider - Clock provider registration structure
2792 * @link: Entry in global list of clock providers
2793 * @node: Pointer to device tree node of clock provider
2794 * @get: Get clock callback. Returns NULL or a struct clk for the
2795 * given clock specifier
2796 * @data: context pointer to be passed into @get callback
2797 */
2798struct of_clk_provider {
2799 struct list_head link;
2800
2801 struct device_node *node;
2802 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2803 void *data;
2804};
2805
f2f6c255
PG
2806static const struct of_device_id __clk_of_table_sentinel
2807 __used __section(__clk_of_table_end);
2808
766e6a4e 2809static LIST_HEAD(of_clk_providers);
d6782c26
SN
2810static DEFINE_MUTEX(of_clk_mutex);
2811
2812/* of_clk_provider list locking helpers */
2813void of_clk_lock(void)
2814{
2815 mutex_lock(&of_clk_mutex);
2816}
2817
2818void of_clk_unlock(void)
2819{
2820 mutex_unlock(&of_clk_mutex);
2821}
766e6a4e
GL
2822
2823struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2824 void *data)
2825{
2826 return data;
2827}
2828EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2829
494bfec9
SG
2830struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2831{
2832 struct clk_onecell_data *clk_data = data;
2833 unsigned int idx = clkspec->args[0];
2834
2835 if (idx >= clk_data->clk_num) {
2836 pr_err("%s: invalid clock index %d\n", __func__, idx);
2837 return ERR_PTR(-EINVAL);
2838 }
2839
2840 return clk_data->clks[idx];
2841}
2842EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2843
766e6a4e
GL
2844/**
2845 * of_clk_add_provider() - Register a clock provider for a node
2846 * @np: Device node pointer associated with clock provider
2847 * @clk_src_get: callback for decoding clock
2848 * @data: context pointer for @clk_src_get callback.
2849 */
2850int of_clk_add_provider(struct device_node *np,
2851 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2852 void *data),
2853 void *data)
2854{
2855 struct of_clk_provider *cp;
86be408b 2856 int ret;
766e6a4e
GL
2857
2858 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2859 if (!cp)
2860 return -ENOMEM;
2861
2862 cp->node = of_node_get(np);
2863 cp->data = data;
2864 cp->get = clk_src_get;
2865
d6782c26 2866 mutex_lock(&of_clk_mutex);
766e6a4e 2867 list_add(&cp->link, &of_clk_providers);
d6782c26 2868 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2869 pr_debug("Added clock from %s\n", np->full_name);
2870
86be408b
SN
2871 ret = of_clk_set_defaults(np, true);
2872 if (ret < 0)
2873 of_clk_del_provider(np);
2874
2875 return ret;
766e6a4e
GL
2876}
2877EXPORT_SYMBOL_GPL(of_clk_add_provider);
2878
2879/**
2880 * of_clk_del_provider() - Remove a previously registered clock provider
2881 * @np: Device node pointer associated with clock provider
2882 */
2883void of_clk_del_provider(struct device_node *np)
2884{
2885 struct of_clk_provider *cp;
2886
d6782c26 2887 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2888 list_for_each_entry(cp, &of_clk_providers, link) {
2889 if (cp->node == np) {
2890 list_del(&cp->link);
2891 of_node_put(cp->node);
2892 kfree(cp);
2893 break;
2894 }
2895 }
d6782c26 2896 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2897}
2898EXPORT_SYMBOL_GPL(of_clk_del_provider);
2899
73e0e496
SB
2900struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
2901 const char *dev_id, const char *con_id)
766e6a4e
GL
2902{
2903 struct of_clk_provider *provider;
a34cd466 2904 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e
GL
2905
2906 /* Check if we have such a provider in our array */
766e6a4e
GL
2907 list_for_each_entry(provider, &of_clk_providers, link) {
2908 if (provider->node == clkspec->np)
2909 clk = provider->get(clkspec, provider->data);
73e0e496
SB
2910 if (!IS_ERR(clk)) {
2911 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
2912 con_id);
2913
2914 if (!IS_ERR(clk) && !__clk_get(clk)) {
2915 __clk_free_clk(clk);
2916 clk = ERR_PTR(-ENOENT);
2917 }
2918
766e6a4e 2919 break;
73e0e496 2920 }
766e6a4e 2921 }
d6782c26
SN
2922
2923 return clk;
2924}
2925
2926struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
2927{
2928 struct clk *clk;
2929
2930 mutex_lock(&of_clk_mutex);
73e0e496 2931 clk = __of_clk_get_from_provider(clkspec, NULL, __func__);
d6782c26 2932 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2933
2934 return clk;
2935}
2936
f6102742
MT
2937int of_clk_get_parent_count(struct device_node *np)
2938{
2939 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
2940}
2941EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
2942
766e6a4e
GL
2943const char *of_clk_get_parent_name(struct device_node *np, int index)
2944{
2945 struct of_phandle_args clkspec;
7a0fc1a3 2946 struct property *prop;
766e6a4e 2947 const char *clk_name;
7a0fc1a3
BD
2948 const __be32 *vp;
2949 u32 pv;
766e6a4e 2950 int rc;
7a0fc1a3 2951 int count;
766e6a4e
GL
2952
2953 if (index < 0)
2954 return NULL;
2955
2956 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
2957 &clkspec);
2958 if (rc)
2959 return NULL;
2960
7a0fc1a3
BD
2961 index = clkspec.args_count ? clkspec.args[0] : 0;
2962 count = 0;
2963
2964 /* if there is an indices property, use it to transfer the index
2965 * specified into an array offset for the clock-output-names property.
2966 */
2967 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
2968 if (index == pv) {
2969 index = count;
2970 break;
2971 }
2972 count++;
2973 }
2974
766e6a4e 2975 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 2976 index,
766e6a4e
GL
2977 &clk_name) < 0)
2978 clk_name = clkspec.np->name;
2979
2980 of_node_put(clkspec.np);
2981 return clk_name;
2982}
2983EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
2984
1771b10d
GC
2985struct clock_provider {
2986 of_clk_init_cb_t clk_init_cb;
2987 struct device_node *np;
2988 struct list_head node;
2989};
2990
2991static LIST_HEAD(clk_provider_list);
2992
2993/*
2994 * This function looks for a parent clock. If there is one, then it
2995 * checks that the provider for this parent clock was initialized, in
2996 * this case the parent clock will be ready.
2997 */
2998static int parent_ready(struct device_node *np)
2999{
3000 int i = 0;
3001
3002 while (true) {
3003 struct clk *clk = of_clk_get(np, i);
3004
3005 /* this parent is ready we can check the next one */
3006 if (!IS_ERR(clk)) {
3007 clk_put(clk);
3008 i++;
3009 continue;
3010 }
3011
3012 /* at least one parent is not ready, we exit now */
3013 if (PTR_ERR(clk) == -EPROBE_DEFER)
3014 return 0;
3015
3016 /*
3017 * Here we make assumption that the device tree is
3018 * written correctly. So an error means that there is
3019 * no more parent. As we didn't exit yet, then the
3020 * previous parent are ready. If there is no clock
3021 * parent, no need to wait for them, then we can
3022 * consider their absence as being ready
3023 */
3024 return 1;
3025 }
3026}
3027
766e6a4e
GL
3028/**
3029 * of_clk_init() - Scan and init clock providers from the DT
3030 * @matches: array of compatible values and init functions for providers.
3031 *
1771b10d 3032 * This function scans the device tree for matching clock providers
e5ca8fb4 3033 * and calls their initialization functions. It also does it by trying
1771b10d 3034 * to follow the dependencies.
766e6a4e
GL
3035 */
3036void __init of_clk_init(const struct of_device_id *matches)
3037{
7f7ed584 3038 const struct of_device_id *match;
766e6a4e 3039 struct device_node *np;
1771b10d
GC
3040 struct clock_provider *clk_provider, *next;
3041 bool is_init_done;
3042 bool force = false;
766e6a4e 3043
f2f6c255 3044 if (!matches)
819b4861 3045 matches = &__clk_of_table;
f2f6c255 3046
1771b10d 3047 /* First prepare the list of the clocks providers */
7f7ed584 3048 for_each_matching_node_and_match(np, matches, &match) {
1771b10d
GC
3049 struct clock_provider *parent =
3050 kzalloc(sizeof(struct clock_provider), GFP_KERNEL);
3051
3052 parent->clk_init_cb = match->data;
3053 parent->np = np;
3f6d439f 3054 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3055 }
3056
3057 while (!list_empty(&clk_provider_list)) {
3058 is_init_done = false;
3059 list_for_each_entry_safe(clk_provider, next,
3060 &clk_provider_list, node) {
3061 if (force || parent_ready(clk_provider->np)) {
86be408b 3062
1771b10d 3063 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3064 of_clk_set_defaults(clk_provider->np, true);
3065
1771b10d
GC
3066 list_del(&clk_provider->node);
3067 kfree(clk_provider);
3068 is_init_done = true;
3069 }
3070 }
3071
3072 /*
e5ca8fb4 3073 * We didn't manage to initialize any of the
1771b10d
GC
3074 * remaining providers during the last loop, so now we
3075 * initialize all the remaining ones unconditionally
3076 * in case the clock parent was not mandatory
3077 */
3078 if (!is_init_done)
3079 force = true;
766e6a4e
GL
3080 }
3081}
3082#endif
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