clk: s3c2410: Constify platform_device_id
[deliverable/linux.git] / drivers / clk / clk.c
CommitLineData
b2476490
MT
1/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */
11
b09d6d99 12#include <linux/clk-provider.h>
86be408b 13#include <linux/clk/clk-conf.h>
b2476490
MT
14#include <linux/module.h>
15#include <linux/mutex.h>
16#include <linux/spinlock.h>
17#include <linux/err.h>
18#include <linux/list.h>
19#include <linux/slab.h>
766e6a4e 20#include <linux/of.h>
46c8773a 21#include <linux/device.h>
f2f6c255 22#include <linux/init.h>
533ddeb1 23#include <linux/sched.h>
b2476490 24
d6782c26
SN
25#include "clk.h"
26
b2476490
MT
27static DEFINE_SPINLOCK(enable_lock);
28static DEFINE_MUTEX(prepare_lock);
29
533ddeb1
MT
30static struct task_struct *prepare_owner;
31static struct task_struct *enable_owner;
32
33static int prepare_refcnt;
34static int enable_refcnt;
35
b2476490
MT
36static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list);
39
b09d6d99
MT
40/*** private data structures ***/
41
42struct clk_core {
43 const char *name;
44 const struct clk_ops *ops;
45 struct clk_hw *hw;
46 struct module *owner;
47 struct clk_core *parent;
48 const char **parent_names;
49 struct clk_core **parents;
50 u8 num_parents;
51 u8 new_parent_index;
52 unsigned long rate;
1c8e6004 53 unsigned long req_rate;
b09d6d99
MT
54 unsigned long new_rate;
55 struct clk_core *new_parent;
56 struct clk_core *new_child;
57 unsigned long flags;
58 unsigned int enable_count;
59 unsigned int prepare_count;
60 unsigned long accuracy;
61 int phase;
62 struct hlist_head children;
63 struct hlist_node child_node;
64 struct hlist_node debug_node;
1c8e6004 65 struct hlist_head clks;
b09d6d99
MT
66 unsigned int notifier_count;
67#ifdef CONFIG_DEBUG_FS
68 struct dentry *dentry;
69#endif
70 struct kref ref;
71};
72
dfc202ea
SB
73#define CREATE_TRACE_POINTS
74#include <trace/events/clk.h>
75
b09d6d99
MT
76struct clk {
77 struct clk_core *core;
78 const char *dev_id;
79 const char *con_id;
1c8e6004
TV
80 unsigned long min_rate;
81 unsigned long max_rate;
50595f8b 82 struct hlist_node clks_node;
b09d6d99
MT
83};
84
eab89f69
MT
85/*** locking ***/
86static void clk_prepare_lock(void)
87{
533ddeb1
MT
88 if (!mutex_trylock(&prepare_lock)) {
89 if (prepare_owner == current) {
90 prepare_refcnt++;
91 return;
92 }
93 mutex_lock(&prepare_lock);
94 }
95 WARN_ON_ONCE(prepare_owner != NULL);
96 WARN_ON_ONCE(prepare_refcnt != 0);
97 prepare_owner = current;
98 prepare_refcnt = 1;
eab89f69
MT
99}
100
101static void clk_prepare_unlock(void)
102{
533ddeb1
MT
103 WARN_ON_ONCE(prepare_owner != current);
104 WARN_ON_ONCE(prepare_refcnt == 0);
105
106 if (--prepare_refcnt)
107 return;
108 prepare_owner = NULL;
eab89f69
MT
109 mutex_unlock(&prepare_lock);
110}
111
112static unsigned long clk_enable_lock(void)
113{
114 unsigned long flags;
533ddeb1
MT
115
116 if (!spin_trylock_irqsave(&enable_lock, flags)) {
117 if (enable_owner == current) {
118 enable_refcnt++;
119 return flags;
120 }
121 spin_lock_irqsave(&enable_lock, flags);
122 }
123 WARN_ON_ONCE(enable_owner != NULL);
124 WARN_ON_ONCE(enable_refcnt != 0);
125 enable_owner = current;
126 enable_refcnt = 1;
eab89f69
MT
127 return flags;
128}
129
130static void clk_enable_unlock(unsigned long flags)
131{
533ddeb1
MT
132 WARN_ON_ONCE(enable_owner != current);
133 WARN_ON_ONCE(enable_refcnt == 0);
134
135 if (--enable_refcnt)
136 return;
137 enable_owner = NULL;
eab89f69
MT
138 spin_unlock_irqrestore(&enable_lock, flags);
139}
140
4dff95dc
SB
141static bool clk_core_is_prepared(struct clk_core *core)
142{
143 /*
144 * .is_prepared is optional for clocks that can prepare
145 * fall back to software usage counter if it is missing
146 */
147 if (!core->ops->is_prepared)
148 return core->prepare_count;
b2476490 149
4dff95dc
SB
150 return core->ops->is_prepared(core->hw);
151}
b2476490 152
4dff95dc
SB
153static bool clk_core_is_enabled(struct clk_core *core)
154{
155 /*
156 * .is_enabled is only mandatory for clocks that gate
157 * fall back to software usage counter if .is_enabled is missing
158 */
159 if (!core->ops->is_enabled)
160 return core->enable_count;
6b44c854 161
4dff95dc
SB
162 return core->ops->is_enabled(core->hw);
163}
6b44c854 164
4dff95dc 165static void clk_unprepare_unused_subtree(struct clk_core *core)
1af599df 166{
4dff95dc
SB
167 struct clk_core *child;
168
169 lockdep_assert_held(&prepare_lock);
170
171 hlist_for_each_entry(child, &core->children, child_node)
172 clk_unprepare_unused_subtree(child);
173
174 if (core->prepare_count)
1af599df
PG
175 return;
176
4dff95dc
SB
177 if (core->flags & CLK_IGNORE_UNUSED)
178 return;
179
180 if (clk_core_is_prepared(core)) {
181 trace_clk_unprepare(core);
182 if (core->ops->unprepare_unused)
183 core->ops->unprepare_unused(core->hw);
184 else if (core->ops->unprepare)
185 core->ops->unprepare(core->hw);
186 trace_clk_unprepare_complete(core);
187 }
1af599df
PG
188}
189
4dff95dc 190static void clk_disable_unused_subtree(struct clk_core *core)
1af599df 191{
035a61c3 192 struct clk_core *child;
4dff95dc 193 unsigned long flags;
1af599df 194
4dff95dc 195 lockdep_assert_held(&prepare_lock);
1af599df 196
4dff95dc
SB
197 hlist_for_each_entry(child, &core->children, child_node)
198 clk_disable_unused_subtree(child);
1af599df 199
4dff95dc
SB
200 flags = clk_enable_lock();
201
202 if (core->enable_count)
203 goto unlock_out;
204
205 if (core->flags & CLK_IGNORE_UNUSED)
206 goto unlock_out;
207
208 /*
209 * some gate clocks have special needs during the disable-unused
210 * sequence. call .disable_unused if available, otherwise fall
211 * back to .disable
212 */
213 if (clk_core_is_enabled(core)) {
214 trace_clk_disable(core);
215 if (core->ops->disable_unused)
216 core->ops->disable_unused(core->hw);
217 else if (core->ops->disable)
218 core->ops->disable(core->hw);
219 trace_clk_disable_complete(core);
220 }
221
222unlock_out:
223 clk_enable_unlock(flags);
1af599df
PG
224}
225
4dff95dc
SB
226static bool clk_ignore_unused;
227static int __init clk_ignore_unused_setup(char *__unused)
1af599df 228{
4dff95dc
SB
229 clk_ignore_unused = true;
230 return 1;
231}
232__setup("clk_ignore_unused", clk_ignore_unused_setup);
1af599df 233
4dff95dc
SB
234static int clk_disable_unused(void)
235{
236 struct clk_core *core;
237
238 if (clk_ignore_unused) {
239 pr_warn("clk: Not disabling unused clocks\n");
240 return 0;
241 }
1af599df 242
eab89f69 243 clk_prepare_lock();
1af599df 244
4dff95dc
SB
245 hlist_for_each_entry(core, &clk_root_list, child_node)
246 clk_disable_unused_subtree(core);
247
248 hlist_for_each_entry(core, &clk_orphan_list, child_node)
249 clk_disable_unused_subtree(core);
250
251 hlist_for_each_entry(core, &clk_root_list, child_node)
252 clk_unprepare_unused_subtree(core);
253
254 hlist_for_each_entry(core, &clk_orphan_list, child_node)
255 clk_unprepare_unused_subtree(core);
1af599df 256
eab89f69 257 clk_prepare_unlock();
1af599df
PG
258
259 return 0;
260}
4dff95dc 261late_initcall_sync(clk_disable_unused);
1af599df 262
4dff95dc 263/*** helper functions ***/
1af599df 264
4dff95dc 265const char *__clk_get_name(struct clk *clk)
1af599df 266{
4dff95dc 267 return !clk ? NULL : clk->core->name;
1af599df 268}
4dff95dc 269EXPORT_SYMBOL_GPL(__clk_get_name);
1af599df 270
4dff95dc
SB
271struct clk_hw *__clk_get_hw(struct clk *clk)
272{
273 return !clk ? NULL : clk->core->hw;
274}
275EXPORT_SYMBOL_GPL(__clk_get_hw);
1af599df 276
4dff95dc 277u8 __clk_get_num_parents(struct clk *clk)
bddca894 278{
4dff95dc
SB
279 return !clk ? 0 : clk->core->num_parents;
280}
281EXPORT_SYMBOL_GPL(__clk_get_num_parents);
bddca894 282
4dff95dc
SB
283struct clk *__clk_get_parent(struct clk *clk)
284{
285 if (!clk)
286 return NULL;
287
288 /* TODO: Create a per-user clk and change callers to call clk_put */
289 return !clk->core->parent ? NULL : clk->core->parent->hw->clk;
bddca894 290}
4dff95dc 291EXPORT_SYMBOL_GPL(__clk_get_parent);
bddca894 292
4dff95dc
SB
293static struct clk_core *__clk_lookup_subtree(const char *name,
294 struct clk_core *core)
bddca894 295{
035a61c3 296 struct clk_core *child;
4dff95dc 297 struct clk_core *ret;
bddca894 298
4dff95dc
SB
299 if (!strcmp(core->name, name))
300 return core;
bddca894 301
4dff95dc
SB
302 hlist_for_each_entry(child, &core->children, child_node) {
303 ret = __clk_lookup_subtree(name, child);
304 if (ret)
305 return ret;
bddca894
PG
306 }
307
4dff95dc 308 return NULL;
bddca894
PG
309}
310
4dff95dc 311static struct clk_core *clk_core_lookup(const char *name)
bddca894 312{
4dff95dc
SB
313 struct clk_core *root_clk;
314 struct clk_core *ret;
bddca894 315
4dff95dc
SB
316 if (!name)
317 return NULL;
bddca894 318
4dff95dc
SB
319 /* search the 'proper' clk tree first */
320 hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
321 ret = __clk_lookup_subtree(name, root_clk);
322 if (ret)
323 return ret;
bddca894
PG
324 }
325
4dff95dc
SB
326 /* if not found, then search the orphan tree */
327 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
328 ret = __clk_lookup_subtree(name, root_clk);
329 if (ret)
330 return ret;
331 }
bddca894 332
4dff95dc 333 return NULL;
bddca894
PG
334}
335
4dff95dc
SB
336static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
337 u8 index)
bddca894 338{
4dff95dc
SB
339 if (!core || index >= core->num_parents)
340 return NULL;
341 else if (!core->parents)
342 return clk_core_lookup(core->parent_names[index]);
343 else if (!core->parents[index])
344 return core->parents[index] =
345 clk_core_lookup(core->parent_names[index]);
346 else
347 return core->parents[index];
bddca894
PG
348}
349
4dff95dc 350struct clk *clk_get_parent_by_index(struct clk *clk, u8 index)
b2476490 351{
4dff95dc 352 struct clk_core *parent;
b2476490 353
4dff95dc
SB
354 if (!clk)
355 return NULL;
b2476490 356
4dff95dc 357 parent = clk_core_get_parent_by_index(clk->core, index);
5279fc40 358
4dff95dc
SB
359 return !parent ? NULL : parent->hw->clk;
360}
361EXPORT_SYMBOL_GPL(clk_get_parent_by_index);
e59c5371 362
4dff95dc
SB
363unsigned int __clk_get_enable_count(struct clk *clk)
364{
365 return !clk ? 0 : clk->core->enable_count;
366}
b2476490 367
4dff95dc
SB
368static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
369{
370 unsigned long ret;
b2476490 371
4dff95dc
SB
372 if (!core) {
373 ret = 0;
374 goto out;
375 }
b2476490 376
4dff95dc 377 ret = core->rate;
b2476490 378
4dff95dc
SB
379 if (core->flags & CLK_IS_ROOT)
380 goto out;
c646cbf1 381
4dff95dc
SB
382 if (!core->parent)
383 ret = 0;
b2476490 384
b2476490
MT
385out:
386 return ret;
387}
388
4dff95dc 389unsigned long __clk_get_rate(struct clk *clk)
b2476490 390{
4dff95dc
SB
391 if (!clk)
392 return 0;
6314b679 393
4dff95dc
SB
394 return clk_core_get_rate_nolock(clk->core);
395}
396EXPORT_SYMBOL_GPL(__clk_get_rate);
b2476490 397
4dff95dc
SB
398static unsigned long __clk_get_accuracy(struct clk_core *core)
399{
400 if (!core)
401 return 0;
b2476490 402
4dff95dc 403 return core->accuracy;
b2476490
MT
404}
405
4dff95dc 406unsigned long __clk_get_flags(struct clk *clk)
fcb0ee6a 407{
4dff95dc 408 return !clk ? 0 : clk->core->flags;
fcb0ee6a 409}
4dff95dc 410EXPORT_SYMBOL_GPL(__clk_get_flags);
fcb0ee6a 411
4dff95dc 412bool __clk_is_prepared(struct clk *clk)
fb2b3c9f 413{
4dff95dc
SB
414 if (!clk)
415 return false;
fb2b3c9f 416
4dff95dc 417 return clk_core_is_prepared(clk->core);
fb2b3c9f 418}
fb2b3c9f 419
4dff95dc 420bool __clk_is_enabled(struct clk *clk)
b2476490 421{
4dff95dc
SB
422 if (!clk)
423 return false;
b2476490 424
4dff95dc
SB
425 return clk_core_is_enabled(clk->core);
426}
427EXPORT_SYMBOL_GPL(__clk_is_enabled);
b2476490 428
4dff95dc
SB
429static bool mux_is_better_rate(unsigned long rate, unsigned long now,
430 unsigned long best, unsigned long flags)
431{
432 if (flags & CLK_MUX_ROUND_CLOSEST)
433 return abs(now - rate) < abs(best - rate);
1af599df 434
4dff95dc
SB
435 return now <= rate && now > best;
436}
bddca894 437
4dff95dc
SB
438static long
439clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate,
440 unsigned long min_rate,
441 unsigned long max_rate,
442 unsigned long *best_parent_rate,
443 struct clk_hw **best_parent_p,
444 unsigned long flags)
445{
446 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
447 int i, num_parents;
448 unsigned long parent_rate, best = 0;
b2476490 449
4dff95dc
SB
450 /* if NO_REPARENT flag set, pass through to current parent */
451 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
452 parent = core->parent;
453 if (core->flags & CLK_SET_RATE_PARENT)
454 best = __clk_determine_rate(parent ? parent->hw : NULL,
455 rate, min_rate, max_rate);
456 else if (parent)
457 best = clk_core_get_rate_nolock(parent);
458 else
459 best = clk_core_get_rate_nolock(core);
460 goto out;
461 }
b2476490 462
4dff95dc
SB
463 /* find the parent that can provide the fastest rate <= rate */
464 num_parents = core->num_parents;
465 for (i = 0; i < num_parents; i++) {
466 parent = clk_core_get_parent_by_index(core, i);
467 if (!parent)
468 continue;
469 if (core->flags & CLK_SET_RATE_PARENT)
470 parent_rate = __clk_determine_rate(parent->hw, rate,
471 min_rate,
472 max_rate);
473 else
474 parent_rate = clk_core_get_rate_nolock(parent);
475 if (mux_is_better_rate(rate, parent_rate, best, flags)) {
476 best_parent = parent;
477 best = parent_rate;
478 }
479 }
b2476490 480
4dff95dc
SB
481out:
482 if (best_parent)
483 *best_parent_p = best_parent->hw;
484 *best_parent_rate = best;
b2476490 485
4dff95dc 486 return best;
b33d212f 487}
4dff95dc
SB
488
489struct clk *__clk_lookup(const char *name)
fcb0ee6a 490{
4dff95dc
SB
491 struct clk_core *core = clk_core_lookup(name);
492
493 return !core ? NULL : core->hw->clk;
fcb0ee6a 494}
b2476490 495
4dff95dc
SB
496static void clk_core_get_boundaries(struct clk_core *core,
497 unsigned long *min_rate,
498 unsigned long *max_rate)
1c155b3d 499{
4dff95dc 500 struct clk *clk_user;
1c155b3d 501
4dff95dc
SB
502 *min_rate = 0;
503 *max_rate = ULONG_MAX;
496eadf8 504
4dff95dc
SB
505 hlist_for_each_entry(clk_user, &core->clks, clks_node)
506 *min_rate = max(*min_rate, clk_user->min_rate);
1c155b3d 507
4dff95dc
SB
508 hlist_for_each_entry(clk_user, &core->clks, clks_node)
509 *max_rate = min(*max_rate, clk_user->max_rate);
510}
1c155b3d 511
4dff95dc
SB
512/*
513 * Helper for finding best parent to provide a given frequency. This can be used
514 * directly as a determine_rate callback (e.g. for a mux), or from a more
515 * complex clock that may combine a mux with other operations.
516 */
517long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
518 unsigned long min_rate,
519 unsigned long max_rate,
520 unsigned long *best_parent_rate,
521 struct clk_hw **best_parent_p)
522{
523 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
524 best_parent_rate,
525 best_parent_p, 0);
1c155b3d 526}
4dff95dc 527EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
1c155b3d 528
4dff95dc
SB
529long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
530 unsigned long min_rate,
531 unsigned long max_rate,
532 unsigned long *best_parent_rate,
533 struct clk_hw **best_parent_p)
b2476490 534{
4dff95dc
SB
535 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
536 best_parent_rate,
537 best_parent_p,
538 CLK_MUX_ROUND_CLOSEST);
539}
540EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
b2476490 541
4dff95dc 542/*** clk api ***/
496eadf8 543
4dff95dc
SB
544static void clk_core_unprepare(struct clk_core *core)
545{
546 if (!core)
547 return;
b2476490 548
4dff95dc
SB
549 if (WARN_ON(core->prepare_count == 0))
550 return;
b2476490 551
4dff95dc
SB
552 if (--core->prepare_count > 0)
553 return;
b2476490 554
4dff95dc 555 WARN_ON(core->enable_count > 0);
b2476490 556
4dff95dc 557 trace_clk_unprepare(core);
b2476490 558
4dff95dc
SB
559 if (core->ops->unprepare)
560 core->ops->unprepare(core->hw);
561
562 trace_clk_unprepare_complete(core);
563 clk_core_unprepare(core->parent);
b2476490
MT
564}
565
4dff95dc
SB
566/**
567 * clk_unprepare - undo preparation of a clock source
568 * @clk: the clk being unprepared
569 *
570 * clk_unprepare may sleep, which differentiates it from clk_disable. In a
571 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
572 * if the operation may sleep. One example is a clk which is accessed over
573 * I2c. In the complex case a clk gate operation may require a fast and a slow
574 * part. It is this reason that clk_unprepare and clk_disable are not mutually
575 * exclusive. In fact clk_disable must be called before clk_unprepare.
576 */
577void clk_unprepare(struct clk *clk)
1e435256 578{
4dff95dc
SB
579 if (IS_ERR_OR_NULL(clk))
580 return;
581
582 clk_prepare_lock();
583 clk_core_unprepare(clk->core);
584 clk_prepare_unlock();
1e435256 585}
4dff95dc 586EXPORT_SYMBOL_GPL(clk_unprepare);
1e435256 587
4dff95dc 588static int clk_core_prepare(struct clk_core *core)
b2476490 589{
4dff95dc 590 int ret = 0;
b2476490 591
4dff95dc 592 if (!core)
1e435256 593 return 0;
1e435256 594
4dff95dc
SB
595 if (core->prepare_count == 0) {
596 ret = clk_core_prepare(core->parent);
597 if (ret)
598 return ret;
b2476490 599
4dff95dc 600 trace_clk_prepare(core);
b2476490 601
4dff95dc
SB
602 if (core->ops->prepare)
603 ret = core->ops->prepare(core->hw);
b2476490 604
4dff95dc 605 trace_clk_prepare_complete(core);
1c155b3d 606
4dff95dc
SB
607 if (ret) {
608 clk_core_unprepare(core->parent);
609 return ret;
610 }
611 }
1c155b3d 612
4dff95dc 613 core->prepare_count++;
b2476490
MT
614
615 return 0;
616}
b2476490 617
4dff95dc
SB
618/**
619 * clk_prepare - prepare a clock source
620 * @clk: the clk being prepared
621 *
622 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
623 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
624 * operation may sleep. One example is a clk which is accessed over I2c. In
625 * the complex case a clk ungate operation may require a fast and a slow part.
626 * It is this reason that clk_prepare and clk_enable are not mutually
627 * exclusive. In fact clk_prepare must be called before clk_enable.
628 * Returns 0 on success, -EERROR otherwise.
629 */
630int clk_prepare(struct clk *clk)
b2476490 631{
4dff95dc 632 int ret;
b2476490 633
4dff95dc
SB
634 if (!clk)
635 return 0;
b2476490 636
4dff95dc
SB
637 clk_prepare_lock();
638 ret = clk_core_prepare(clk->core);
639 clk_prepare_unlock();
640
641 return ret;
b2476490 642}
4dff95dc 643EXPORT_SYMBOL_GPL(clk_prepare);
b2476490 644
4dff95dc 645static void clk_core_disable(struct clk_core *core)
b2476490 646{
4dff95dc
SB
647 if (!core)
648 return;
035a61c3 649
4dff95dc
SB
650 if (WARN_ON(core->enable_count == 0))
651 return;
b2476490 652
4dff95dc
SB
653 if (--core->enable_count > 0)
654 return;
035a61c3 655
4dff95dc 656 trace_clk_disable(core);
035a61c3 657
4dff95dc
SB
658 if (core->ops->disable)
659 core->ops->disable(core->hw);
035a61c3 660
4dff95dc 661 trace_clk_disable_complete(core);
035a61c3 662
4dff95dc 663 clk_core_disable(core->parent);
035a61c3 664}
7ef3dcc8 665
4dff95dc
SB
666/**
667 * clk_disable - gate a clock
668 * @clk: the clk being gated
669 *
670 * clk_disable must not sleep, which differentiates it from clk_unprepare. In
671 * a simple case, clk_disable can be used instead of clk_unprepare to gate a
672 * clk if the operation is fast and will never sleep. One example is a
673 * SoC-internal clk which is controlled via simple register writes. In the
674 * complex case a clk gate operation may require a fast and a slow part. It is
675 * this reason that clk_unprepare and clk_disable are not mutually exclusive.
676 * In fact clk_disable must be called before clk_unprepare.
677 */
678void clk_disable(struct clk *clk)
b2476490 679{
4dff95dc
SB
680 unsigned long flags;
681
682 if (IS_ERR_OR_NULL(clk))
683 return;
684
685 flags = clk_enable_lock();
686 clk_core_disable(clk->core);
687 clk_enable_unlock(flags);
b2476490 688}
4dff95dc 689EXPORT_SYMBOL_GPL(clk_disable);
b2476490 690
4dff95dc 691static int clk_core_enable(struct clk_core *core)
b2476490 692{
4dff95dc 693 int ret = 0;
b2476490 694
4dff95dc
SB
695 if (!core)
696 return 0;
b2476490 697
4dff95dc
SB
698 if (WARN_ON(core->prepare_count == 0))
699 return -ESHUTDOWN;
b2476490 700
4dff95dc
SB
701 if (core->enable_count == 0) {
702 ret = clk_core_enable(core->parent);
b2476490 703
4dff95dc
SB
704 if (ret)
705 return ret;
b2476490 706
4dff95dc 707 trace_clk_enable(core);
035a61c3 708
4dff95dc
SB
709 if (core->ops->enable)
710 ret = core->ops->enable(core->hw);
035a61c3 711
4dff95dc
SB
712 trace_clk_enable_complete(core);
713
714 if (ret) {
715 clk_core_disable(core->parent);
716 return ret;
717 }
718 }
719
720 core->enable_count++;
721 return 0;
035a61c3 722}
b2476490 723
4dff95dc
SB
724/**
725 * clk_enable - ungate a clock
726 * @clk: the clk being ungated
727 *
728 * clk_enable must not sleep, which differentiates it from clk_prepare. In a
729 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
730 * if the operation will never sleep. One example is a SoC-internal clk which
731 * is controlled via simple register writes. In the complex case a clk ungate
732 * operation may require a fast and a slow part. It is this reason that
733 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare
734 * must be called before clk_enable. Returns 0 on success, -EERROR
735 * otherwise.
736 */
737int clk_enable(struct clk *clk)
5279fc40 738{
4dff95dc
SB
739 unsigned long flags;
740 int ret;
741
742 if (!clk)
5279fc40
BB
743 return 0;
744
4dff95dc
SB
745 flags = clk_enable_lock();
746 ret = clk_core_enable(clk->core);
747 clk_enable_unlock(flags);
5279fc40 748
4dff95dc 749 return ret;
b2476490 750}
4dff95dc 751EXPORT_SYMBOL_GPL(clk_enable);
b2476490 752
4dff95dc
SB
753static unsigned long clk_core_round_rate_nolock(struct clk_core *core,
754 unsigned long rate,
755 unsigned long min_rate,
756 unsigned long max_rate)
3d6ee287 757{
4dff95dc
SB
758 unsigned long parent_rate = 0;
759 struct clk_core *parent;
760 struct clk_hw *parent_hw;
761
762 lockdep_assert_held(&prepare_lock);
3d6ee287 763
d6968fca 764 if (!core)
4dff95dc 765 return 0;
3d6ee287 766
4dff95dc
SB
767 parent = core->parent;
768 if (parent)
769 parent_rate = parent->rate;
3d6ee287 770
4dff95dc
SB
771 if (core->ops->determine_rate) {
772 parent_hw = parent ? parent->hw : NULL;
773 return core->ops->determine_rate(core->hw, rate,
774 min_rate, max_rate,
775 &parent_rate, &parent_hw);
776 } else if (core->ops->round_rate)
777 return core->ops->round_rate(core->hw, rate, &parent_rate);
778 else if (core->flags & CLK_SET_RATE_PARENT)
779 return clk_core_round_rate_nolock(core->parent, rate, min_rate,
780 max_rate);
781 else
782 return core->rate;
3d6ee287
UH
783}
784
4dff95dc
SB
785/**
786 * __clk_determine_rate - get the closest rate actually supported by a clock
787 * @hw: determine the rate of this clock
788 * @rate: target rate
789 * @min_rate: returned rate must be greater than this rate
790 * @max_rate: returned rate must be less than this rate
791 *
6e5ab41b 792 * Useful for clk_ops such as .set_rate and .determine_rate.
4dff95dc
SB
793 */
794unsigned long __clk_determine_rate(struct clk_hw *hw,
795 unsigned long rate,
796 unsigned long min_rate,
797 unsigned long max_rate)
035a61c3 798{
4dff95dc
SB
799 if (!hw)
800 return 0;
035a61c3 801
4dff95dc 802 return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate);
035a61c3 803}
4dff95dc 804EXPORT_SYMBOL_GPL(__clk_determine_rate);
035a61c3 805
4dff95dc
SB
806/**
807 * __clk_round_rate - round the given rate for a clk
808 * @clk: round the rate of this clock
809 * @rate: the rate which is to be rounded
810 *
6e5ab41b 811 * Useful for clk_ops such as .set_rate
4dff95dc
SB
812 */
813unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)
b2476490 814{
4dff95dc
SB
815 unsigned long min_rate;
816 unsigned long max_rate;
b2476490 817
4dff95dc
SB
818 if (!clk)
819 return 0;
b2476490 820
4dff95dc 821 clk_core_get_boundaries(clk->core, &min_rate, &max_rate);
b2476490 822
4dff95dc 823 return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate);
b2476490 824}
4dff95dc 825EXPORT_SYMBOL_GPL(__clk_round_rate);
035a61c3 826
4dff95dc
SB
827/**
828 * clk_round_rate - round the given rate for a clk
829 * @clk: the clk for which we are rounding a rate
830 * @rate: the rate which is to be rounded
831 *
832 * Takes in a rate as input and rounds it to a rate that the clk can actually
833 * use which is then returned. If clk doesn't support round_rate operation
834 * then the parent rate is returned.
835 */
836long clk_round_rate(struct clk *clk, unsigned long rate)
035a61c3 837{
4dff95dc
SB
838 unsigned long ret;
839
035a61c3 840 if (!clk)
4dff95dc 841 return 0;
035a61c3 842
4dff95dc
SB
843 clk_prepare_lock();
844 ret = __clk_round_rate(clk, rate);
845 clk_prepare_unlock();
846
847 return ret;
035a61c3 848}
4dff95dc 849EXPORT_SYMBOL_GPL(clk_round_rate);
b2476490 850
4dff95dc
SB
851/**
852 * __clk_notify - call clk notifier chain
853 * @core: clk that is changing rate
854 * @msg: clk notifier type (see include/linux/clk.h)
855 * @old_rate: old clk rate
856 * @new_rate: new clk rate
857 *
858 * Triggers a notifier call chain on the clk rate-change notification
859 * for 'clk'. Passes a pointer to the struct clk and the previous
860 * and current rates to the notifier callback. Intended to be called by
861 * internal clock code only. Returns NOTIFY_DONE from the last driver
862 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
863 * a driver returns that.
864 */
865static int __clk_notify(struct clk_core *core, unsigned long msg,
866 unsigned long old_rate, unsigned long new_rate)
b2476490 867{
4dff95dc
SB
868 struct clk_notifier *cn;
869 struct clk_notifier_data cnd;
870 int ret = NOTIFY_DONE;
b2476490 871
4dff95dc
SB
872 cnd.old_rate = old_rate;
873 cnd.new_rate = new_rate;
b2476490 874
4dff95dc
SB
875 list_for_each_entry(cn, &clk_notifier_list, node) {
876 if (cn->clk->core == core) {
877 cnd.clk = cn->clk;
878 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
879 &cnd);
880 }
b2476490
MT
881 }
882
4dff95dc 883 return ret;
b2476490
MT
884}
885
4dff95dc
SB
886/**
887 * __clk_recalc_accuracies
888 * @core: first clk in the subtree
889 *
890 * Walks the subtree of clks starting with clk and recalculates accuracies as
891 * it goes. Note that if a clk does not implement the .recalc_accuracy
6e5ab41b 892 * callback then it is assumed that the clock will take on the accuracy of its
4dff95dc 893 * parent.
4dff95dc
SB
894 */
895static void __clk_recalc_accuracies(struct clk_core *core)
b2476490 896{
4dff95dc
SB
897 unsigned long parent_accuracy = 0;
898 struct clk_core *child;
b2476490 899
4dff95dc 900 lockdep_assert_held(&prepare_lock);
b2476490 901
4dff95dc
SB
902 if (core->parent)
903 parent_accuracy = core->parent->accuracy;
b2476490 904
4dff95dc
SB
905 if (core->ops->recalc_accuracy)
906 core->accuracy = core->ops->recalc_accuracy(core->hw,
907 parent_accuracy);
908 else
909 core->accuracy = parent_accuracy;
b2476490 910
4dff95dc
SB
911 hlist_for_each_entry(child, &core->children, child_node)
912 __clk_recalc_accuracies(child);
b2476490
MT
913}
914
4dff95dc 915static long clk_core_get_accuracy(struct clk_core *core)
e366fdd7 916{
4dff95dc 917 unsigned long accuracy;
15a02c1f 918
4dff95dc
SB
919 clk_prepare_lock();
920 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
921 __clk_recalc_accuracies(core);
15a02c1f 922
4dff95dc
SB
923 accuracy = __clk_get_accuracy(core);
924 clk_prepare_unlock();
e366fdd7 925
4dff95dc 926 return accuracy;
e366fdd7 927}
15a02c1f 928
4dff95dc
SB
929/**
930 * clk_get_accuracy - return the accuracy of clk
931 * @clk: the clk whose accuracy is being returned
932 *
933 * Simply returns the cached accuracy of the clk, unless
934 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
935 * issued.
936 * If clk is NULL then returns 0.
937 */
938long clk_get_accuracy(struct clk *clk)
035a61c3 939{
4dff95dc
SB
940 if (!clk)
941 return 0;
035a61c3 942
4dff95dc 943 return clk_core_get_accuracy(clk->core);
035a61c3 944}
4dff95dc 945EXPORT_SYMBOL_GPL(clk_get_accuracy);
035a61c3 946
4dff95dc
SB
947static unsigned long clk_recalc(struct clk_core *core,
948 unsigned long parent_rate)
1c8e6004 949{
4dff95dc
SB
950 if (core->ops->recalc_rate)
951 return core->ops->recalc_rate(core->hw, parent_rate);
952 return parent_rate;
1c8e6004
TV
953}
954
4dff95dc
SB
955/**
956 * __clk_recalc_rates
957 * @core: first clk in the subtree
958 * @msg: notification type (see include/linux/clk.h)
959 *
960 * Walks the subtree of clks starting with clk and recalculates rates as it
961 * goes. Note that if a clk does not implement the .recalc_rate callback then
962 * it is assumed that the clock will take on the rate of its parent.
963 *
964 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
965 * if necessary.
15a02c1f 966 */
4dff95dc 967static void __clk_recalc_rates(struct clk_core *core, unsigned long msg)
15a02c1f 968{
4dff95dc
SB
969 unsigned long old_rate;
970 unsigned long parent_rate = 0;
971 struct clk_core *child;
e366fdd7 972
4dff95dc 973 lockdep_assert_held(&prepare_lock);
15a02c1f 974
4dff95dc 975 old_rate = core->rate;
b2476490 976
4dff95dc
SB
977 if (core->parent)
978 parent_rate = core->parent->rate;
b2476490 979
4dff95dc 980 core->rate = clk_recalc(core, parent_rate);
b2476490 981
4dff95dc
SB
982 /*
983 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
984 * & ABORT_RATE_CHANGE notifiers
985 */
986 if (core->notifier_count && msg)
987 __clk_notify(core, msg, old_rate, core->rate);
b2476490 988
4dff95dc
SB
989 hlist_for_each_entry(child, &core->children, child_node)
990 __clk_recalc_rates(child, msg);
991}
b2476490 992
4dff95dc
SB
993static unsigned long clk_core_get_rate(struct clk_core *core)
994{
995 unsigned long rate;
dfc202ea 996
4dff95dc 997 clk_prepare_lock();
b2476490 998
4dff95dc
SB
999 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1000 __clk_recalc_rates(core, 0);
1001
1002 rate = clk_core_get_rate_nolock(core);
1003 clk_prepare_unlock();
1004
1005 return rate;
b2476490
MT
1006}
1007
1008/**
4dff95dc
SB
1009 * clk_get_rate - return the rate of clk
1010 * @clk: the clk whose rate is being returned
b2476490 1011 *
4dff95dc
SB
1012 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1013 * is set, which means a recalc_rate will be issued.
1014 * If clk is NULL then returns 0.
b2476490 1015 */
4dff95dc 1016unsigned long clk_get_rate(struct clk *clk)
b2476490 1017{
4dff95dc
SB
1018 if (!clk)
1019 return 0;
63589e92 1020
4dff95dc 1021 return clk_core_get_rate(clk->core);
b2476490 1022}
4dff95dc 1023EXPORT_SYMBOL_GPL(clk_get_rate);
b2476490 1024
4dff95dc
SB
1025static int clk_fetch_parent_index(struct clk_core *core,
1026 struct clk_core *parent)
b2476490 1027{
4dff95dc 1028 int i;
b2476490 1029
4dff95dc
SB
1030 if (!core->parents) {
1031 core->parents = kcalloc(core->num_parents,
1032 sizeof(struct clk *), GFP_KERNEL);
1033 if (!core->parents)
1034 return -ENOMEM;
1035 }
dfc202ea 1036
4dff95dc
SB
1037 /*
1038 * find index of new parent clock using cached parent ptrs,
1039 * or if not yet cached, use string name comparison and cache
1040 * them now to avoid future calls to clk_core_lookup.
1041 */
1042 for (i = 0; i < core->num_parents; i++) {
1043 if (core->parents[i] == parent)
1044 return i;
dfc202ea 1045
4dff95dc
SB
1046 if (core->parents[i])
1047 continue;
dfc202ea 1048
4dff95dc
SB
1049 if (!strcmp(core->parent_names[i], parent->name)) {
1050 core->parents[i] = clk_core_lookup(parent->name);
1051 return i;
b2476490
MT
1052 }
1053 }
1054
4dff95dc 1055 return -EINVAL;
b2476490
MT
1056}
1057
4dff95dc 1058static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
b2476490 1059{
4dff95dc 1060 hlist_del(&core->child_node);
035a61c3 1061
4dff95dc
SB
1062 if (new_parent) {
1063 /* avoid duplicate POST_RATE_CHANGE notifications */
1064 if (new_parent->new_child == core)
1065 new_parent->new_child = NULL;
b2476490 1066
4dff95dc
SB
1067 hlist_add_head(&core->child_node, &new_parent->children);
1068 } else {
1069 hlist_add_head(&core->child_node, &clk_orphan_list);
1070 }
dfc202ea 1071
4dff95dc 1072 core->parent = new_parent;
035a61c3
TV
1073}
1074
4dff95dc
SB
1075static struct clk_core *__clk_set_parent_before(struct clk_core *core,
1076 struct clk_core *parent)
b2476490
MT
1077{
1078 unsigned long flags;
4dff95dc 1079 struct clk_core *old_parent = core->parent;
b2476490 1080
4dff95dc
SB
1081 /*
1082 * Migrate prepare state between parents and prevent race with
1083 * clk_enable().
1084 *
1085 * If the clock is not prepared, then a race with
1086 * clk_enable/disable() is impossible since we already have the
1087 * prepare lock (future calls to clk_enable() need to be preceded by
1088 * a clk_prepare()).
1089 *
1090 * If the clock is prepared, migrate the prepared state to the new
1091 * parent and also protect against a race with clk_enable() by
1092 * forcing the clock and the new parent on. This ensures that all
1093 * future calls to clk_enable() are practically NOPs with respect to
1094 * hardware and software states.
1095 *
1096 * See also: Comment for clk_set_parent() below.
1097 */
1098 if (core->prepare_count) {
1099 clk_core_prepare(parent);
1100 clk_core_enable(parent);
1101 clk_core_enable(core);
1102 }
63589e92 1103
4dff95dc 1104 /* update the clk tree topology */
eab89f69 1105 flags = clk_enable_lock();
4dff95dc 1106 clk_reparent(core, parent);
eab89f69 1107 clk_enable_unlock(flags);
4dff95dc
SB
1108
1109 return old_parent;
b2476490 1110}
b2476490 1111
4dff95dc
SB
1112static void __clk_set_parent_after(struct clk_core *core,
1113 struct clk_core *parent,
1114 struct clk_core *old_parent)
b2476490 1115{
4dff95dc
SB
1116 /*
1117 * Finish the migration of prepare state and undo the changes done
1118 * for preventing a race with clk_enable().
1119 */
1120 if (core->prepare_count) {
1121 clk_core_disable(core);
1122 clk_core_disable(old_parent);
1123 clk_core_unprepare(old_parent);
1124 }
1125}
b2476490 1126
4dff95dc
SB
1127static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
1128 u8 p_index)
1129{
1130 unsigned long flags;
1131 int ret = 0;
1132 struct clk_core *old_parent;
b2476490 1133
4dff95dc 1134 old_parent = __clk_set_parent_before(core, parent);
b2476490 1135
4dff95dc 1136 trace_clk_set_parent(core, parent);
b2476490 1137
4dff95dc
SB
1138 /* change clock input source */
1139 if (parent && core->ops->set_parent)
1140 ret = core->ops->set_parent(core->hw, p_index);
dfc202ea 1141
4dff95dc 1142 trace_clk_set_parent_complete(core, parent);
dfc202ea 1143
4dff95dc
SB
1144 if (ret) {
1145 flags = clk_enable_lock();
1146 clk_reparent(core, old_parent);
1147 clk_enable_unlock(flags);
dfc202ea 1148
4dff95dc
SB
1149 if (core->prepare_count) {
1150 clk_core_disable(core);
1151 clk_core_disable(parent);
1152 clk_core_unprepare(parent);
b2476490 1153 }
4dff95dc 1154 return ret;
b2476490
MT
1155 }
1156
4dff95dc
SB
1157 __clk_set_parent_after(core, parent, old_parent);
1158
b2476490
MT
1159 return 0;
1160}
1161
1162/**
4dff95dc
SB
1163 * __clk_speculate_rates
1164 * @core: first clk in the subtree
1165 * @parent_rate: the "future" rate of clk's parent
b2476490 1166 *
4dff95dc
SB
1167 * Walks the subtree of clks starting with clk, speculating rates as it
1168 * goes and firing off PRE_RATE_CHANGE notifications as necessary.
1169 *
1170 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
1171 * pre-rate change notifications and returns early if no clks in the
1172 * subtree have subscribed to the notifications. Note that if a clk does not
1173 * implement the .recalc_rate callback then it is assumed that the clock will
1174 * take on the rate of its parent.
b2476490 1175 */
4dff95dc
SB
1176static int __clk_speculate_rates(struct clk_core *core,
1177 unsigned long parent_rate)
b2476490 1178{
4dff95dc
SB
1179 struct clk_core *child;
1180 unsigned long new_rate;
1181 int ret = NOTIFY_DONE;
b2476490 1182
4dff95dc 1183 lockdep_assert_held(&prepare_lock);
864e160a 1184
4dff95dc
SB
1185 new_rate = clk_recalc(core, parent_rate);
1186
1187 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
1188 if (core->notifier_count)
1189 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1190
1191 if (ret & NOTIFY_STOP_MASK) {
1192 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
1193 __func__, core->name, ret);
1194 goto out;
1195 }
1196
1197 hlist_for_each_entry(child, &core->children, child_node) {
1198 ret = __clk_speculate_rates(child, new_rate);
1199 if (ret & NOTIFY_STOP_MASK)
1200 break;
1201 }
b2476490 1202
4dff95dc 1203out:
b2476490
MT
1204 return ret;
1205}
b2476490 1206
4dff95dc
SB
1207static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
1208 struct clk_core *new_parent, u8 p_index)
b2476490 1209{
4dff95dc 1210 struct clk_core *child;
b2476490 1211
4dff95dc
SB
1212 core->new_rate = new_rate;
1213 core->new_parent = new_parent;
1214 core->new_parent_index = p_index;
1215 /* include clk in new parent's PRE_RATE_CHANGE notifications */
1216 core->new_child = NULL;
1217 if (new_parent && new_parent != core->parent)
1218 new_parent->new_child = core;
496eadf8 1219
4dff95dc
SB
1220 hlist_for_each_entry(child, &core->children, child_node) {
1221 child->new_rate = clk_recalc(child, new_rate);
1222 clk_calc_subtree(child, child->new_rate, NULL, 0);
1223 }
1224}
b2476490 1225
4dff95dc
SB
1226/*
1227 * calculate the new rates returning the topmost clock that has to be
1228 * changed.
1229 */
1230static struct clk_core *clk_calc_new_rates(struct clk_core *core,
1231 unsigned long rate)
1232{
1233 struct clk_core *top = core;
1234 struct clk_core *old_parent, *parent;
1235 struct clk_hw *parent_hw;
1236 unsigned long best_parent_rate = 0;
1237 unsigned long new_rate;
1238 unsigned long min_rate;
1239 unsigned long max_rate;
1240 int p_index = 0;
1241 long ret;
1242
1243 /* sanity */
1244 if (IS_ERR_OR_NULL(core))
1245 return NULL;
1246
1247 /* save parent rate, if it exists */
1248 parent = old_parent = core->parent;
71472c0c 1249 if (parent)
4dff95dc 1250 best_parent_rate = parent->rate;
71472c0c 1251
4dff95dc
SB
1252 clk_core_get_boundaries(core, &min_rate, &max_rate);
1253
1254 /* find the closest rate and parent clk/rate */
d6968fca 1255 if (core->ops->determine_rate) {
646cafc6 1256 parent_hw = parent ? parent->hw : NULL;
4dff95dc
SB
1257 ret = core->ops->determine_rate(core->hw, rate,
1258 min_rate,
1259 max_rate,
1260 &best_parent_rate,
1261 &parent_hw);
1262 if (ret < 0)
1263 return NULL;
1c8e6004 1264
4dff95dc
SB
1265 new_rate = ret;
1266 parent = parent_hw ? parent_hw->core : NULL;
1267 } else if (core->ops->round_rate) {
1268 ret = core->ops->round_rate(core->hw, rate,
1269 &best_parent_rate);
1270 if (ret < 0)
1271 return NULL;
035a61c3 1272
4dff95dc
SB
1273 new_rate = ret;
1274 if (new_rate < min_rate || new_rate > max_rate)
1275 return NULL;
1276 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1277 /* pass-through clock without adjustable parent */
1278 core->new_rate = core->rate;
1279 return NULL;
1280 } else {
1281 /* pass-through clock with adjustable parent */
1282 top = clk_calc_new_rates(parent, rate);
1283 new_rate = parent->new_rate;
1284 goto out;
1285 }
1c8e6004 1286
4dff95dc
SB
1287 /* some clocks must be gated to change parent */
1288 if (parent != old_parent &&
1289 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1290 pr_debug("%s: %s not gated but wants to reparent\n",
1291 __func__, core->name);
1292 return NULL;
1293 }
b2476490 1294
4dff95dc
SB
1295 /* try finding the new parent index */
1296 if (parent && core->num_parents > 1) {
1297 p_index = clk_fetch_parent_index(core, parent);
1298 if (p_index < 0) {
1299 pr_debug("%s: clk %s can not be parent of clk %s\n",
1300 __func__, parent->name, core->name);
1301 return NULL;
1302 }
1303 }
b2476490 1304
4dff95dc
SB
1305 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
1306 best_parent_rate != parent->rate)
1307 top = clk_calc_new_rates(parent, best_parent_rate);
035a61c3 1308
4dff95dc
SB
1309out:
1310 clk_calc_subtree(core, new_rate, parent, p_index);
b2476490 1311
4dff95dc 1312 return top;
b2476490 1313}
b2476490 1314
4dff95dc
SB
1315/*
1316 * Notify about rate changes in a subtree. Always walk down the whole tree
1317 * so that in case of an error we can walk down the whole tree again and
1318 * abort the change.
b2476490 1319 */
4dff95dc
SB
1320static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
1321 unsigned long event)
b2476490 1322{
4dff95dc 1323 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
b2476490
MT
1324 int ret = NOTIFY_DONE;
1325
4dff95dc
SB
1326 if (core->rate == core->new_rate)
1327 return NULL;
b2476490 1328
4dff95dc
SB
1329 if (core->notifier_count) {
1330 ret = __clk_notify(core, event, core->rate, core->new_rate);
1331 if (ret & NOTIFY_STOP_MASK)
1332 fail_clk = core;
b2476490
MT
1333 }
1334
4dff95dc
SB
1335 hlist_for_each_entry(child, &core->children, child_node) {
1336 /* Skip children who will be reparented to another clock */
1337 if (child->new_parent && child->new_parent != core)
1338 continue;
1339 tmp_clk = clk_propagate_rate_change(child, event);
1340 if (tmp_clk)
1341 fail_clk = tmp_clk;
1342 }
5279fc40 1343
4dff95dc
SB
1344 /* handle the new child who might not be in core->children yet */
1345 if (core->new_child) {
1346 tmp_clk = clk_propagate_rate_change(core->new_child, event);
1347 if (tmp_clk)
1348 fail_clk = tmp_clk;
1349 }
5279fc40 1350
4dff95dc 1351 return fail_clk;
5279fc40
BB
1352}
1353
4dff95dc
SB
1354/*
1355 * walk down a subtree and set the new rates notifying the rate
1356 * change on the way
1357 */
1358static void clk_change_rate(struct clk_core *core)
035a61c3 1359{
4dff95dc
SB
1360 struct clk_core *child;
1361 struct hlist_node *tmp;
1362 unsigned long old_rate;
1363 unsigned long best_parent_rate = 0;
1364 bool skip_set_rate = false;
1365 struct clk_core *old_parent;
035a61c3 1366
4dff95dc 1367 old_rate = core->rate;
035a61c3 1368
4dff95dc
SB
1369 if (core->new_parent)
1370 best_parent_rate = core->new_parent->rate;
1371 else if (core->parent)
1372 best_parent_rate = core->parent->rate;
035a61c3 1373
4dff95dc
SB
1374 if (core->new_parent && core->new_parent != core->parent) {
1375 old_parent = __clk_set_parent_before(core, core->new_parent);
1376 trace_clk_set_parent(core, core->new_parent);
5279fc40 1377
4dff95dc
SB
1378 if (core->ops->set_rate_and_parent) {
1379 skip_set_rate = true;
1380 core->ops->set_rate_and_parent(core->hw, core->new_rate,
1381 best_parent_rate,
1382 core->new_parent_index);
1383 } else if (core->ops->set_parent) {
1384 core->ops->set_parent(core->hw, core->new_parent_index);
1385 }
5279fc40 1386
4dff95dc
SB
1387 trace_clk_set_parent_complete(core, core->new_parent);
1388 __clk_set_parent_after(core, core->new_parent, old_parent);
1389 }
8f2c2db1 1390
4dff95dc 1391 trace_clk_set_rate(core, core->new_rate);
b2476490 1392
4dff95dc
SB
1393 if (!skip_set_rate && core->ops->set_rate)
1394 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
496eadf8 1395
4dff95dc 1396 trace_clk_set_rate_complete(core, core->new_rate);
b2476490 1397
4dff95dc 1398 core->rate = clk_recalc(core, best_parent_rate);
b2476490 1399
4dff95dc
SB
1400 if (core->notifier_count && old_rate != core->rate)
1401 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
b2476490
MT
1402
1403 /*
4dff95dc
SB
1404 * Use safe iteration, as change_rate can actually swap parents
1405 * for certain clock types.
b2476490 1406 */
4dff95dc
SB
1407 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
1408 /* Skip children who will be reparented to another clock */
1409 if (child->new_parent && child->new_parent != core)
1410 continue;
1411 clk_change_rate(child);
1412 }
b2476490 1413
4dff95dc
SB
1414 /* handle the new child who might not be in core->children yet */
1415 if (core->new_child)
1416 clk_change_rate(core->new_child);
b2476490
MT
1417}
1418
4dff95dc
SB
1419static int clk_core_set_rate_nolock(struct clk_core *core,
1420 unsigned long req_rate)
a093bde2 1421{
4dff95dc
SB
1422 struct clk_core *top, *fail_clk;
1423 unsigned long rate = req_rate;
1424 int ret = 0;
a093bde2 1425
4dff95dc
SB
1426 if (!core)
1427 return 0;
a093bde2 1428
4dff95dc
SB
1429 /* bail early if nothing to do */
1430 if (rate == clk_core_get_rate_nolock(core))
1431 return 0;
a093bde2 1432
4dff95dc
SB
1433 if ((core->flags & CLK_SET_RATE_GATE) && core->prepare_count)
1434 return -EBUSY;
a093bde2 1435
4dff95dc
SB
1436 /* calculate new rates and get the topmost changed clock */
1437 top = clk_calc_new_rates(core, rate);
1438 if (!top)
1439 return -EINVAL;
1440
1441 /* notify that we are about to change rates */
1442 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1443 if (fail_clk) {
1444 pr_debug("%s: failed to set %s rate\n", __func__,
1445 fail_clk->name);
1446 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1447 return -EBUSY;
1448 }
1449
1450 /* change the rates */
1451 clk_change_rate(top);
1452
1453 core->req_rate = req_rate;
1454
1455 return ret;
a093bde2 1456}
035a61c3
TV
1457
1458/**
4dff95dc
SB
1459 * clk_set_rate - specify a new rate for clk
1460 * @clk: the clk whose rate is being changed
1461 * @rate: the new rate for clk
035a61c3 1462 *
4dff95dc
SB
1463 * In the simplest case clk_set_rate will only adjust the rate of clk.
1464 *
1465 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
1466 * propagate up to clk's parent; whether or not this happens depends on the
1467 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged
1468 * after calling .round_rate then upstream parent propagation is ignored. If
1469 * *parent_rate comes back with a new rate for clk's parent then we propagate
1470 * up to clk's parent and set its rate. Upward propagation will continue
1471 * until either a clk does not support the CLK_SET_RATE_PARENT flag or
1472 * .round_rate stops requesting changes to clk's parent_rate.
1473 *
1474 * Rate changes are accomplished via tree traversal that also recalculates the
1475 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
1476 *
1477 * Returns 0 on success, -EERROR otherwise.
035a61c3 1478 */
4dff95dc 1479int clk_set_rate(struct clk *clk, unsigned long rate)
035a61c3 1480{
4dff95dc
SB
1481 int ret;
1482
035a61c3
TV
1483 if (!clk)
1484 return 0;
1485
4dff95dc
SB
1486 /* prevent racing with updates to the clock topology */
1487 clk_prepare_lock();
da0f0b2c 1488
4dff95dc 1489 ret = clk_core_set_rate_nolock(clk->core, rate);
da0f0b2c 1490
4dff95dc 1491 clk_prepare_unlock();
4935b22c 1492
4dff95dc 1493 return ret;
4935b22c 1494}
4dff95dc 1495EXPORT_SYMBOL_GPL(clk_set_rate);
4935b22c 1496
4dff95dc
SB
1497/**
1498 * clk_set_rate_range - set a rate range for a clock source
1499 * @clk: clock source
1500 * @min: desired minimum clock rate in Hz, inclusive
1501 * @max: desired maximum clock rate in Hz, inclusive
1502 *
1503 * Returns success (0) or negative errno.
1504 */
1505int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
4935b22c 1506{
4dff95dc 1507 int ret = 0;
4935b22c 1508
4dff95dc
SB
1509 if (!clk)
1510 return 0;
903efc55 1511
4dff95dc
SB
1512 if (min > max) {
1513 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1514 __func__, clk->core->name, clk->dev_id, clk->con_id,
1515 min, max);
1516 return -EINVAL;
903efc55 1517 }
4935b22c 1518
4dff95dc 1519 clk_prepare_lock();
4935b22c 1520
4dff95dc
SB
1521 if (min != clk->min_rate || max != clk->max_rate) {
1522 clk->min_rate = min;
1523 clk->max_rate = max;
1524 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4935b22c
JH
1525 }
1526
4dff95dc 1527 clk_prepare_unlock();
4935b22c 1528
4dff95dc 1529 return ret;
3fa2252b 1530}
4dff95dc 1531EXPORT_SYMBOL_GPL(clk_set_rate_range);
3fa2252b 1532
4dff95dc
SB
1533/**
1534 * clk_set_min_rate - set a minimum clock rate for a clock source
1535 * @clk: clock source
1536 * @rate: desired minimum clock rate in Hz, inclusive
1537 *
1538 * Returns success (0) or negative errno.
1539 */
1540int clk_set_min_rate(struct clk *clk, unsigned long rate)
3fa2252b 1541{
4dff95dc
SB
1542 if (!clk)
1543 return 0;
1544
1545 return clk_set_rate_range(clk, rate, clk->max_rate);
3fa2252b 1546}
4dff95dc 1547EXPORT_SYMBOL_GPL(clk_set_min_rate);
3fa2252b 1548
4dff95dc
SB
1549/**
1550 * clk_set_max_rate - set a maximum clock rate for a clock source
1551 * @clk: clock source
1552 * @rate: desired maximum clock rate in Hz, inclusive
1553 *
1554 * Returns success (0) or negative errno.
1555 */
1556int clk_set_max_rate(struct clk *clk, unsigned long rate)
3fa2252b 1557{
4dff95dc
SB
1558 if (!clk)
1559 return 0;
4935b22c 1560
4dff95dc 1561 return clk_set_rate_range(clk, clk->min_rate, rate);
4935b22c 1562}
4dff95dc 1563EXPORT_SYMBOL_GPL(clk_set_max_rate);
4935b22c 1564
b2476490 1565/**
4dff95dc
SB
1566 * clk_get_parent - return the parent of a clk
1567 * @clk: the clk whose parent gets returned
b2476490 1568 *
4dff95dc 1569 * Simply returns clk->parent. Returns NULL if clk is NULL.
b2476490 1570 */
4dff95dc 1571struct clk *clk_get_parent(struct clk *clk)
b2476490 1572{
4dff95dc 1573 struct clk *parent;
b2476490 1574
4dff95dc
SB
1575 clk_prepare_lock();
1576 parent = __clk_get_parent(clk);
1577 clk_prepare_unlock();
496eadf8 1578
4dff95dc
SB
1579 return parent;
1580}
1581EXPORT_SYMBOL_GPL(clk_get_parent);
b2476490 1582
4dff95dc
SB
1583/*
1584 * .get_parent is mandatory for clocks with multiple possible parents. It is
1585 * optional for single-parent clocks. Always call .get_parent if it is
1586 * available and WARN if it is missing for multi-parent clocks.
1587 *
1588 * For single-parent clocks without .get_parent, first check to see if the
1589 * .parents array exists, and if so use it to avoid an expensive tree
1590 * traversal. If .parents does not exist then walk the tree.
1591 */
1592static struct clk_core *__clk_init_parent(struct clk_core *core)
1593{
1594 struct clk_core *ret = NULL;
1595 u8 index;
b2476490 1596
4dff95dc
SB
1597 /* handle the trivial cases */
1598
1599 if (!core->num_parents)
b2476490
MT
1600 goto out;
1601
4dff95dc
SB
1602 if (core->num_parents == 1) {
1603 if (IS_ERR_OR_NULL(core->parent))
1604 core->parent = clk_core_lookup(core->parent_names[0]);
1605 ret = core->parent;
1606 goto out;
b2476490
MT
1607 }
1608
4dff95dc
SB
1609 if (!core->ops->get_parent) {
1610 WARN(!core->ops->get_parent,
1611 "%s: multi-parent clocks must implement .get_parent\n",
1612 __func__);
1613 goto out;
1614 };
1615
1616 /*
1617 * Do our best to cache parent clocks in core->parents. This prevents
1618 * unnecessary and expensive lookups. We don't set core->parent here;
1619 * that is done by the calling function.
1620 */
1621
1622 index = core->ops->get_parent(core->hw);
1623
1624 if (!core->parents)
1625 core->parents =
1626 kcalloc(core->num_parents, sizeof(struct clk *),
1627 GFP_KERNEL);
1628
1629 ret = clk_core_get_parent_by_index(core, index);
1630
b2476490
MT
1631out:
1632 return ret;
1633}
1634
4dff95dc
SB
1635static void clk_core_reparent(struct clk_core *core,
1636 struct clk_core *new_parent)
b2476490 1637{
4dff95dc
SB
1638 clk_reparent(core, new_parent);
1639 __clk_recalc_accuracies(core);
1640 __clk_recalc_rates(core, POST_RATE_CHANGE);
b2476490
MT
1641}
1642
4dff95dc
SB
1643/**
1644 * clk_has_parent - check if a clock is a possible parent for another
1645 * @clk: clock source
1646 * @parent: parent clock source
1647 *
1648 * This function can be used in drivers that need to check that a clock can be
1649 * the parent of another without actually changing the parent.
1650 *
1651 * Returns true if @parent is a possible parent for @clk, false otherwise.
b2476490 1652 */
4dff95dc 1653bool clk_has_parent(struct clk *clk, struct clk *parent)
b2476490 1654{
4dff95dc
SB
1655 struct clk_core *core, *parent_core;
1656 unsigned int i;
b2476490 1657
4dff95dc
SB
1658 /* NULL clocks should be nops, so return success if either is NULL. */
1659 if (!clk || !parent)
1660 return true;
7452b219 1661
4dff95dc
SB
1662 core = clk->core;
1663 parent_core = parent->core;
71472c0c 1664
4dff95dc
SB
1665 /* Optimize for the case where the parent is already the parent. */
1666 if (core->parent == parent_core)
1667 return true;
1c8e6004 1668
4dff95dc
SB
1669 for (i = 0; i < core->num_parents; i++)
1670 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1671 return true;
03bc10ab 1672
4dff95dc
SB
1673 return false;
1674}
1675EXPORT_SYMBOL_GPL(clk_has_parent);
03bc10ab 1676
4dff95dc
SB
1677static int clk_core_set_parent(struct clk_core *core, struct clk_core *parent)
1678{
1679 int ret = 0;
1680 int p_index = 0;
1681 unsigned long p_rate = 0;
1682
1683 if (!core)
1684 return 0;
1685
1686 /* prevent racing with updates to the clock topology */
1687 clk_prepare_lock();
1688
1689 if (core->parent == parent)
1690 goto out;
1691
1692 /* verify ops for for multi-parent clks */
1693 if ((core->num_parents > 1) && (!core->ops->set_parent)) {
1694 ret = -ENOSYS;
63f5c3b2 1695 goto out;
7452b219
MT
1696 }
1697
4dff95dc
SB
1698 /* check that we are allowed to re-parent if the clock is in use */
1699 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1700 ret = -EBUSY;
1701 goto out;
b2476490
MT
1702 }
1703
71472c0c 1704 /* try finding the new parent index */
4dff95dc 1705 if (parent) {
d6968fca 1706 p_index = clk_fetch_parent_index(core, parent);
4dff95dc 1707 p_rate = parent->rate;
f1c8b2ed 1708 if (p_index < 0) {
71472c0c 1709 pr_debug("%s: clk %s can not be parent of clk %s\n",
4dff95dc
SB
1710 __func__, parent->name, core->name);
1711 ret = p_index;
1712 goto out;
71472c0c 1713 }
b2476490
MT
1714 }
1715
4dff95dc
SB
1716 /* propagate PRE_RATE_CHANGE notifications */
1717 ret = __clk_speculate_rates(core, p_rate);
b2476490 1718
4dff95dc
SB
1719 /* abort if a driver objects */
1720 if (ret & NOTIFY_STOP_MASK)
1721 goto out;
b2476490 1722
4dff95dc
SB
1723 /* do the re-parent */
1724 ret = __clk_set_parent(core, parent, p_index);
b2476490 1725
4dff95dc
SB
1726 /* propagate rate an accuracy recalculation accordingly */
1727 if (ret) {
1728 __clk_recalc_rates(core, ABORT_RATE_CHANGE);
1729 } else {
1730 __clk_recalc_rates(core, POST_RATE_CHANGE);
1731 __clk_recalc_accuracies(core);
b2476490
MT
1732 }
1733
4dff95dc
SB
1734out:
1735 clk_prepare_unlock();
71472c0c 1736
4dff95dc
SB
1737 return ret;
1738}
b2476490 1739
4dff95dc
SB
1740/**
1741 * clk_set_parent - switch the parent of a mux clk
1742 * @clk: the mux clk whose input we are switching
1743 * @parent: the new input to clk
1744 *
1745 * Re-parent clk to use parent as its new input source. If clk is in
1746 * prepared state, the clk will get enabled for the duration of this call. If
1747 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1748 * that, the reparenting is glitchy in hardware, etc), use the
1749 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1750 *
1751 * After successfully changing clk's parent clk_set_parent will update the
1752 * clk topology, sysfs topology and propagate rate recalculation via
1753 * __clk_recalc_rates.
1754 *
1755 * Returns 0 on success, -EERROR otherwise.
1756 */
1757int clk_set_parent(struct clk *clk, struct clk *parent)
1758{
1759 if (!clk)
1760 return 0;
1761
1762 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
b2476490 1763}
4dff95dc 1764EXPORT_SYMBOL_GPL(clk_set_parent);
b2476490 1765
4dff95dc
SB
1766/**
1767 * clk_set_phase - adjust the phase shift of a clock signal
1768 * @clk: clock signal source
1769 * @degrees: number of degrees the signal is shifted
1770 *
1771 * Shifts the phase of a clock signal by the specified
1772 * degrees. Returns 0 on success, -EERROR otherwise.
1773 *
1774 * This function makes no distinction about the input or reference
1775 * signal that we adjust the clock signal phase against. For example
1776 * phase locked-loop clock signal generators we may shift phase with
1777 * respect to feedback clock signal input, but for other cases the
1778 * clock phase may be shifted with respect to some other, unspecified
1779 * signal.
1780 *
1781 * Additionally the concept of phase shift does not propagate through
1782 * the clock tree hierarchy, which sets it apart from clock rates and
1783 * clock accuracy. A parent clock phase attribute does not have an
1784 * impact on the phase attribute of a child clock.
b2476490 1785 */
4dff95dc 1786int clk_set_phase(struct clk *clk, int degrees)
b2476490 1787{
4dff95dc 1788 int ret = -EINVAL;
b2476490 1789
4dff95dc
SB
1790 if (!clk)
1791 return 0;
b2476490 1792
4dff95dc
SB
1793 /* sanity check degrees */
1794 degrees %= 360;
1795 if (degrees < 0)
1796 degrees += 360;
bf47b4fd 1797
4dff95dc 1798 clk_prepare_lock();
3fa2252b 1799
4dff95dc 1800 trace_clk_set_phase(clk->core, degrees);
3fa2252b 1801
4dff95dc
SB
1802 if (clk->core->ops->set_phase)
1803 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
3fa2252b 1804
4dff95dc 1805 trace_clk_set_phase_complete(clk->core, degrees);
dfc202ea 1806
4dff95dc
SB
1807 if (!ret)
1808 clk->core->phase = degrees;
b2476490 1809
4dff95dc 1810 clk_prepare_unlock();
dfc202ea 1811
4dff95dc
SB
1812 return ret;
1813}
1814EXPORT_SYMBOL_GPL(clk_set_phase);
b2476490 1815
4dff95dc
SB
1816static int clk_core_get_phase(struct clk_core *core)
1817{
1818 int ret;
b2476490 1819
4dff95dc
SB
1820 clk_prepare_lock();
1821 ret = core->phase;
1822 clk_prepare_unlock();
71472c0c 1823
4dff95dc 1824 return ret;
b2476490
MT
1825}
1826
4dff95dc
SB
1827/**
1828 * clk_get_phase - return the phase shift of a clock signal
1829 * @clk: clock signal source
1830 *
1831 * Returns the phase shift of a clock node in degrees, otherwise returns
1832 * -EERROR.
1833 */
1834int clk_get_phase(struct clk *clk)
1c8e6004 1835{
4dff95dc 1836 if (!clk)
1c8e6004
TV
1837 return 0;
1838
4dff95dc
SB
1839 return clk_core_get_phase(clk->core);
1840}
1841EXPORT_SYMBOL_GPL(clk_get_phase);
1c8e6004 1842
4dff95dc
SB
1843/**
1844 * clk_is_match - check if two clk's point to the same hardware clock
1845 * @p: clk compared against q
1846 * @q: clk compared against p
1847 *
1848 * Returns true if the two struct clk pointers both point to the same hardware
1849 * clock node. Put differently, returns true if struct clk *p and struct clk *q
1850 * share the same struct clk_core object.
1851 *
1852 * Returns false otherwise. Note that two NULL clks are treated as matching.
1853 */
1854bool clk_is_match(const struct clk *p, const struct clk *q)
1855{
1856 /* trivial case: identical struct clk's or both NULL */
1857 if (p == q)
1858 return true;
1c8e6004 1859
4dff95dc
SB
1860 /* true if clk->core pointers match. Avoid derefing garbage */
1861 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
1862 if (p->core == q->core)
1863 return true;
1c8e6004 1864
4dff95dc
SB
1865 return false;
1866}
1867EXPORT_SYMBOL_GPL(clk_is_match);
1c8e6004 1868
4dff95dc 1869/*** debugfs support ***/
1c8e6004 1870
4dff95dc
SB
1871#ifdef CONFIG_DEBUG_FS
1872#include <linux/debugfs.h>
1c8e6004 1873
4dff95dc
SB
1874static struct dentry *rootdir;
1875static int inited = 0;
1876static DEFINE_MUTEX(clk_debug_lock);
1877static HLIST_HEAD(clk_debug_list);
1c8e6004 1878
4dff95dc
SB
1879static struct hlist_head *all_lists[] = {
1880 &clk_root_list,
1881 &clk_orphan_list,
1882 NULL,
1883};
1884
1885static struct hlist_head *orphan_list[] = {
1886 &clk_orphan_list,
1887 NULL,
1888};
1889
1890static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
1891 int level)
b2476490 1892{
4dff95dc
SB
1893 if (!c)
1894 return;
b2476490 1895
4dff95dc
SB
1896 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
1897 level * 3 + 1, "",
1898 30 - level * 3, c->name,
1899 c->enable_count, c->prepare_count, clk_core_get_rate(c),
1900 clk_core_get_accuracy(c), clk_core_get_phase(c));
1901}
89ac8d7a 1902
4dff95dc
SB
1903static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
1904 int level)
1905{
1906 struct clk_core *child;
b2476490 1907
4dff95dc
SB
1908 if (!c)
1909 return;
b2476490 1910
4dff95dc 1911 clk_summary_show_one(s, c, level);
0e1c0301 1912
4dff95dc
SB
1913 hlist_for_each_entry(child, &c->children, child_node)
1914 clk_summary_show_subtree(s, child, level + 1);
1c8e6004 1915}
b2476490 1916
4dff95dc 1917static int clk_summary_show(struct seq_file *s, void *data)
1c8e6004 1918{
4dff95dc
SB
1919 struct clk_core *c;
1920 struct hlist_head **lists = (struct hlist_head **)s->private;
1c8e6004 1921
4dff95dc
SB
1922 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
1923 seq_puts(s, "----------------------------------------------------------------------------------------\n");
b2476490 1924
1c8e6004
TV
1925 clk_prepare_lock();
1926
4dff95dc
SB
1927 for (; *lists; lists++)
1928 hlist_for_each_entry(c, *lists, child_node)
1929 clk_summary_show_subtree(s, c, 0);
b2476490 1930
eab89f69 1931 clk_prepare_unlock();
b2476490 1932
4dff95dc 1933 return 0;
b2476490 1934}
1c8e6004 1935
1c8e6004 1936
4dff95dc 1937static int clk_summary_open(struct inode *inode, struct file *file)
1c8e6004 1938{
4dff95dc 1939 return single_open(file, clk_summary_show, inode->i_private);
1c8e6004 1940}
b2476490 1941
4dff95dc
SB
1942static const struct file_operations clk_summary_fops = {
1943 .open = clk_summary_open,
1944 .read = seq_read,
1945 .llseek = seq_lseek,
1946 .release = single_release,
1947};
b2476490 1948
4dff95dc
SB
1949static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
1950{
1951 if (!c)
1952 return;
b2476490 1953
7cb81136 1954 /* This should be JSON format, i.e. elements separated with a comma */
4dff95dc
SB
1955 seq_printf(s, "\"%s\": { ", c->name);
1956 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
1957 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
7cb81136
SW
1958 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c));
1959 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c));
4dff95dc 1960 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
b2476490 1961}
b2476490 1962
4dff95dc 1963static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
b2476490 1964{
4dff95dc 1965 struct clk_core *child;
b2476490 1966
4dff95dc
SB
1967 if (!c)
1968 return;
b2476490 1969
4dff95dc 1970 clk_dump_one(s, c, level);
b2476490 1971
4dff95dc
SB
1972 hlist_for_each_entry(child, &c->children, child_node) {
1973 seq_printf(s, ",");
1974 clk_dump_subtree(s, child, level + 1);
b2476490
MT
1975 }
1976
4dff95dc 1977 seq_printf(s, "}");
b2476490
MT
1978}
1979
4dff95dc 1980static int clk_dump(struct seq_file *s, void *data)
4e88f3de 1981{
4dff95dc
SB
1982 struct clk_core *c;
1983 bool first_node = true;
1984 struct hlist_head **lists = (struct hlist_head **)s->private;
4e88f3de 1985
4dff95dc 1986 seq_printf(s, "{");
4e88f3de 1987
4dff95dc 1988 clk_prepare_lock();
035a61c3 1989
4dff95dc
SB
1990 for (; *lists; lists++) {
1991 hlist_for_each_entry(c, *lists, child_node) {
1992 if (!first_node)
1993 seq_puts(s, ",");
1994 first_node = false;
1995 clk_dump_subtree(s, c, 0);
1996 }
1997 }
4e88f3de 1998
4dff95dc 1999 clk_prepare_unlock();
4e88f3de 2000
4dff95dc
SB
2001 seq_printf(s, "}");
2002 return 0;
4e88f3de 2003}
4e88f3de 2004
4dff95dc
SB
2005
2006static int clk_dump_open(struct inode *inode, struct file *file)
b2476490 2007{
4dff95dc
SB
2008 return single_open(file, clk_dump, inode->i_private);
2009}
b2476490 2010
4dff95dc
SB
2011static const struct file_operations clk_dump_fops = {
2012 .open = clk_dump_open,
2013 .read = seq_read,
2014 .llseek = seq_lseek,
2015 .release = single_release,
2016};
89ac8d7a 2017
4dff95dc
SB
2018static int clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
2019{
2020 struct dentry *d;
2021 int ret = -ENOMEM;
b2476490 2022
4dff95dc
SB
2023 if (!core || !pdentry) {
2024 ret = -EINVAL;
b2476490 2025 goto out;
4dff95dc 2026 }
b2476490 2027
4dff95dc
SB
2028 d = debugfs_create_dir(core->name, pdentry);
2029 if (!d)
b61c43c0 2030 goto out;
b61c43c0 2031
4dff95dc
SB
2032 core->dentry = d;
2033
2034 d = debugfs_create_u32("clk_rate", S_IRUGO, core->dentry,
2035 (u32 *)&core->rate);
2036 if (!d)
2037 goto err_out;
2038
2039 d = debugfs_create_u32("clk_accuracy", S_IRUGO, core->dentry,
2040 (u32 *)&core->accuracy);
2041 if (!d)
2042 goto err_out;
2043
2044 d = debugfs_create_u32("clk_phase", S_IRUGO, core->dentry,
2045 (u32 *)&core->phase);
2046 if (!d)
2047 goto err_out;
031dcc9b 2048
4dff95dc
SB
2049 d = debugfs_create_x32("clk_flags", S_IRUGO, core->dentry,
2050 (u32 *)&core->flags);
2051 if (!d)
2052 goto err_out;
031dcc9b 2053
4dff95dc
SB
2054 d = debugfs_create_u32("clk_prepare_count", S_IRUGO, core->dentry,
2055 (u32 *)&core->prepare_count);
2056 if (!d)
2057 goto err_out;
b2476490 2058
4dff95dc
SB
2059 d = debugfs_create_u32("clk_enable_count", S_IRUGO, core->dentry,
2060 (u32 *)&core->enable_count);
2061 if (!d)
2062 goto err_out;
b2476490 2063
4dff95dc
SB
2064 d = debugfs_create_u32("clk_notifier_count", S_IRUGO, core->dentry,
2065 (u32 *)&core->notifier_count);
2066 if (!d)
2067 goto err_out;
b2476490 2068
4dff95dc
SB
2069 if (core->ops->debug_init) {
2070 ret = core->ops->debug_init(core->hw, core->dentry);
2071 if (ret)
2072 goto err_out;
5279fc40 2073 }
b2476490 2074
4dff95dc
SB
2075 ret = 0;
2076 goto out;
b2476490 2077
4dff95dc
SB
2078err_out:
2079 debugfs_remove_recursive(core->dentry);
2080 core->dentry = NULL;
2081out:
b2476490
MT
2082 return ret;
2083}
035a61c3
TV
2084
2085/**
6e5ab41b
SB
2086 * clk_debug_register - add a clk node to the debugfs clk directory
2087 * @core: the clk being added to the debugfs clk directory
035a61c3 2088 *
6e5ab41b
SB
2089 * Dynamically adds a clk to the debugfs clk directory if debugfs has been
2090 * initialized. Otherwise it bails out early since the debugfs clk directory
4dff95dc 2091 * will be created lazily by clk_debug_init as part of a late_initcall.
035a61c3 2092 */
4dff95dc 2093static int clk_debug_register(struct clk_core *core)
035a61c3 2094{
4dff95dc 2095 int ret = 0;
035a61c3 2096
4dff95dc
SB
2097 mutex_lock(&clk_debug_lock);
2098 hlist_add_head(&core->debug_node, &clk_debug_list);
2099
2100 if (!inited)
2101 goto unlock;
2102
2103 ret = clk_debug_create_one(core, rootdir);
2104unlock:
2105 mutex_unlock(&clk_debug_lock);
2106
2107 return ret;
035a61c3 2108}
b2476490 2109
4dff95dc 2110 /**
6e5ab41b
SB
2111 * clk_debug_unregister - remove a clk node from the debugfs clk directory
2112 * @core: the clk being removed from the debugfs clk directory
e59c5371 2113 *
6e5ab41b
SB
2114 * Dynamically removes a clk and all its child nodes from the
2115 * debugfs clk directory if clk->dentry points to debugfs created by
4dff95dc 2116 * clk_debug_register in __clk_init.
e59c5371 2117 */
4dff95dc 2118static void clk_debug_unregister(struct clk_core *core)
e59c5371 2119{
4dff95dc
SB
2120 mutex_lock(&clk_debug_lock);
2121 hlist_del_init(&core->debug_node);
2122 debugfs_remove_recursive(core->dentry);
2123 core->dentry = NULL;
2124 mutex_unlock(&clk_debug_lock);
2125}
e59c5371 2126
4dff95dc
SB
2127struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
2128 void *data, const struct file_operations *fops)
2129{
2130 struct dentry *d = NULL;
e59c5371 2131
4dff95dc
SB
2132 if (hw->core->dentry)
2133 d = debugfs_create_file(name, mode, hw->core->dentry, data,
2134 fops);
e59c5371 2135
4dff95dc
SB
2136 return d;
2137}
2138EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
e59c5371 2139
4dff95dc 2140/**
6e5ab41b 2141 * clk_debug_init - lazily populate the debugfs clk directory
4dff95dc 2142 *
6e5ab41b
SB
2143 * clks are often initialized very early during boot before memory can be
2144 * dynamically allocated and well before debugfs is setup. This function
2145 * populates the debugfs clk directory once at boot-time when we know that
2146 * debugfs is setup. It should only be called once at boot-time, all other clks
2147 * added dynamically will be done so with clk_debug_register.
4dff95dc
SB
2148 */
2149static int __init clk_debug_init(void)
2150{
2151 struct clk_core *core;
2152 struct dentry *d;
dfc202ea 2153
4dff95dc 2154 rootdir = debugfs_create_dir("clk", NULL);
e59c5371 2155
4dff95dc
SB
2156 if (!rootdir)
2157 return -ENOMEM;
dfc202ea 2158
4dff95dc
SB
2159 d = debugfs_create_file("clk_summary", S_IRUGO, rootdir, &all_lists,
2160 &clk_summary_fops);
2161 if (!d)
2162 return -ENOMEM;
e59c5371 2163
4dff95dc
SB
2164 d = debugfs_create_file("clk_dump", S_IRUGO, rootdir, &all_lists,
2165 &clk_dump_fops);
2166 if (!d)
2167 return -ENOMEM;
e59c5371 2168
4dff95dc
SB
2169 d = debugfs_create_file("clk_orphan_summary", S_IRUGO, rootdir,
2170 &orphan_list, &clk_summary_fops);
2171 if (!d)
2172 return -ENOMEM;
e59c5371 2173
4dff95dc
SB
2174 d = debugfs_create_file("clk_orphan_dump", S_IRUGO, rootdir,
2175 &orphan_list, &clk_dump_fops);
2176 if (!d)
2177 return -ENOMEM;
e59c5371 2178
4dff95dc
SB
2179 mutex_lock(&clk_debug_lock);
2180 hlist_for_each_entry(core, &clk_debug_list, debug_node)
2181 clk_debug_create_one(core, rootdir);
e59c5371 2182
4dff95dc
SB
2183 inited = 1;
2184 mutex_unlock(&clk_debug_lock);
e59c5371 2185
4dff95dc
SB
2186 return 0;
2187}
2188late_initcall(clk_debug_init);
2189#else
2190static inline int clk_debug_register(struct clk_core *core) { return 0; }
2191static inline void clk_debug_reparent(struct clk_core *core,
2192 struct clk_core *new_parent)
035a61c3 2193{
035a61c3 2194}
4dff95dc 2195static inline void clk_debug_unregister(struct clk_core *core)
3d3801ef 2196{
3d3801ef 2197}
4dff95dc 2198#endif
3d3801ef 2199
b2476490
MT
2200/**
2201 * __clk_init - initialize the data structures in a struct clk
2202 * @dev: device initializing this clk, placeholder for now
2203 * @clk: clk being initialized
2204 *
035a61c3 2205 * Initializes the lists in struct clk_core, queries the hardware for the
b2476490 2206 * parent and rate and sets them both.
b2476490 2207 */
b09d6d99 2208static int __clk_init(struct device *dev, struct clk *clk_user)
b2476490 2209{
d1302a36 2210 int i, ret = 0;
035a61c3 2211 struct clk_core *orphan;
b67bfe0d 2212 struct hlist_node *tmp2;
d6968fca 2213 struct clk_core *core;
1c8e6004 2214 unsigned long rate;
b2476490 2215
035a61c3 2216 if (!clk_user)
d1302a36 2217 return -EINVAL;
b2476490 2218
d6968fca 2219 core = clk_user->core;
035a61c3 2220
eab89f69 2221 clk_prepare_lock();
b2476490
MT
2222
2223 /* check to see if a clock with this name is already registered */
d6968fca 2224 if (clk_core_lookup(core->name)) {
d1302a36 2225 pr_debug("%s: clk %s already initialized\n",
d6968fca 2226 __func__, core->name);
d1302a36 2227 ret = -EEXIST;
b2476490 2228 goto out;
d1302a36 2229 }
b2476490 2230
d4d7e3dd 2231 /* check that clk_ops are sane. See Documentation/clk.txt */
d6968fca
SB
2232 if (core->ops->set_rate &&
2233 !((core->ops->round_rate || core->ops->determine_rate) &&
2234 core->ops->recalc_rate)) {
71472c0c 2235 pr_warning("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
d6968fca 2236 __func__, core->name);
d1302a36 2237 ret = -EINVAL;
d4d7e3dd
MT
2238 goto out;
2239 }
2240
d6968fca 2241 if (core->ops->set_parent && !core->ops->get_parent) {
d4d7e3dd 2242 pr_warning("%s: %s must implement .get_parent & .set_parent\n",
d6968fca 2243 __func__, core->name);
d1302a36 2244 ret = -EINVAL;
d4d7e3dd
MT
2245 goto out;
2246 }
2247
d6968fca
SB
2248 if (core->ops->set_rate_and_parent &&
2249 !(core->ops->set_parent && core->ops->set_rate)) {
3fa2252b 2250 pr_warn("%s: %s must implement .set_parent & .set_rate\n",
d6968fca 2251 __func__, core->name);
3fa2252b
SB
2252 ret = -EINVAL;
2253 goto out;
2254 }
2255
b2476490 2256 /* throw a WARN if any entries in parent_names are NULL */
d6968fca
SB
2257 for (i = 0; i < core->num_parents; i++)
2258 WARN(!core->parent_names[i],
b2476490 2259 "%s: invalid NULL in %s's .parent_names\n",
d6968fca 2260 __func__, core->name);
b2476490
MT
2261
2262 /*
2263 * Allocate an array of struct clk *'s to avoid unnecessary string
2264 * look-ups of clk's possible parents. This can fail for clocks passed
d6968fca 2265 * in to clk_init during early boot; thus any access to core->parents[]
b2476490
MT
2266 * must always check for a NULL pointer and try to populate it if
2267 * necessary.
2268 *
d6968fca
SB
2269 * If core->parents is not NULL we skip this entire block. This allows
2270 * for clock drivers to statically initialize core->parents.
b2476490 2271 */
d6968fca
SB
2272 if (core->num_parents > 1 && !core->parents) {
2273 core->parents = kcalloc(core->num_parents, sizeof(struct clk *),
96a7ed90 2274 GFP_KERNEL);
b2476490 2275 /*
035a61c3 2276 * clk_core_lookup returns NULL for parents that have not been
b2476490
MT
2277 * clk_init'd; thus any access to clk->parents[] must check
2278 * for a NULL pointer. We can always perform lazy lookups for
2279 * missing parents later on.
2280 */
d6968fca
SB
2281 if (core->parents)
2282 for (i = 0; i < core->num_parents; i++)
2283 core->parents[i] =
2284 clk_core_lookup(core->parent_names[i]);
b2476490
MT
2285 }
2286
d6968fca 2287 core->parent = __clk_init_parent(core);
b2476490
MT
2288
2289 /*
d6968fca 2290 * Populate core->parent if parent has already been __clk_init'd. If
b2476490
MT
2291 * parent has not yet been __clk_init'd then place clk in the orphan
2292 * list. If clk has set the CLK_IS_ROOT flag then place it in the root
2293 * clk list.
2294 *
2295 * Every time a new clk is clk_init'd then we walk the list of orphan
2296 * clocks and re-parent any that are children of the clock currently
2297 * being clk_init'd.
2298 */
d6968fca
SB
2299 if (core->parent)
2300 hlist_add_head(&core->child_node,
2301 &core->parent->children);
2302 else if (core->flags & CLK_IS_ROOT)
2303 hlist_add_head(&core->child_node, &clk_root_list);
b2476490 2304 else
d6968fca 2305 hlist_add_head(&core->child_node, &clk_orphan_list);
b2476490 2306
5279fc40
BB
2307 /*
2308 * Set clk's accuracy. The preferred method is to use
2309 * .recalc_accuracy. For simple clocks and lazy developers the default
2310 * fallback is to use the parent's accuracy. If a clock doesn't have a
2311 * parent (or is orphaned) then accuracy is set to zero (perfect
2312 * clock).
2313 */
d6968fca
SB
2314 if (core->ops->recalc_accuracy)
2315 core->accuracy = core->ops->recalc_accuracy(core->hw,
2316 __clk_get_accuracy(core->parent));
2317 else if (core->parent)
2318 core->accuracy = core->parent->accuracy;
5279fc40 2319 else
d6968fca 2320 core->accuracy = 0;
5279fc40 2321
9824cf73
MR
2322 /*
2323 * Set clk's phase.
2324 * Since a phase is by definition relative to its parent, just
2325 * query the current clock phase, or just assume it's in phase.
2326 */
d6968fca
SB
2327 if (core->ops->get_phase)
2328 core->phase = core->ops->get_phase(core->hw);
9824cf73 2329 else
d6968fca 2330 core->phase = 0;
9824cf73 2331
b2476490
MT
2332 /*
2333 * Set clk's rate. The preferred method is to use .recalc_rate. For
2334 * simple clocks and lazy developers the default fallback is to use the
2335 * parent's rate. If a clock doesn't have a parent (or is orphaned)
2336 * then rate is set to zero.
2337 */
d6968fca
SB
2338 if (core->ops->recalc_rate)
2339 rate = core->ops->recalc_rate(core->hw,
2340 clk_core_get_rate_nolock(core->parent));
2341 else if (core->parent)
2342 rate = core->parent->rate;
b2476490 2343 else
1c8e6004 2344 rate = 0;
d6968fca 2345 core->rate = core->req_rate = rate;
b2476490
MT
2346
2347 /*
2348 * walk the list of orphan clocks and reparent any that are children of
2349 * this clock
2350 */
b67bfe0d 2351 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
12d29886 2352 if (orphan->num_parents && orphan->ops->get_parent) {
1f61e5f1 2353 i = orphan->ops->get_parent(orphan->hw);
d6968fca
SB
2354 if (!strcmp(core->name, orphan->parent_names[i]))
2355 clk_core_reparent(orphan, core);
1f61e5f1
MF
2356 continue;
2357 }
2358
b2476490 2359 for (i = 0; i < orphan->num_parents; i++)
d6968fca
SB
2360 if (!strcmp(core->name, orphan->parent_names[i])) {
2361 clk_core_reparent(orphan, core);
b2476490
MT
2362 break;
2363 }
1f61e5f1 2364 }
b2476490
MT
2365
2366 /*
2367 * optional platform-specific magic
2368 *
2369 * The .init callback is not used by any of the basic clock types, but
2370 * exists for weird hardware that must perform initialization magic.
2371 * Please consider other ways of solving initialization problems before
24ee1a08 2372 * using this callback, as its use is discouraged.
b2476490 2373 */
d6968fca
SB
2374 if (core->ops->init)
2375 core->ops->init(core->hw);
b2476490 2376
d6968fca 2377 kref_init(&core->ref);
b2476490 2378out:
eab89f69 2379 clk_prepare_unlock();
b2476490 2380
89f7e9de 2381 if (!ret)
d6968fca 2382 clk_debug_register(core);
89f7e9de 2383
d1302a36 2384 return ret;
b2476490
MT
2385}
2386
035a61c3
TV
2387struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
2388 const char *con_id)
0197b3ea 2389{
0197b3ea
SK
2390 struct clk *clk;
2391
035a61c3
TV
2392 /* This is to allow this function to be chained to others */
2393 if (!hw || IS_ERR(hw))
2394 return (struct clk *) hw;
0197b3ea 2395
035a61c3
TV
2396 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2397 if (!clk)
2398 return ERR_PTR(-ENOMEM);
2399
2400 clk->core = hw->core;
2401 clk->dev_id = dev_id;
2402 clk->con_id = con_id;
1c8e6004
TV
2403 clk->max_rate = ULONG_MAX;
2404
2405 clk_prepare_lock();
50595f8b 2406 hlist_add_head(&clk->clks_node, &hw->core->clks);
1c8e6004 2407 clk_prepare_unlock();
0197b3ea
SK
2408
2409 return clk;
2410}
035a61c3 2411
73e0e496 2412void __clk_free_clk(struct clk *clk)
1c8e6004
TV
2413{
2414 clk_prepare_lock();
50595f8b 2415 hlist_del(&clk->clks_node);
1c8e6004
TV
2416 clk_prepare_unlock();
2417
2418 kfree(clk);
2419}
0197b3ea 2420
293ba3b4
SB
2421/**
2422 * clk_register - allocate a new clock, register it and return an opaque cookie
2423 * @dev: device that is registering this clock
2424 * @hw: link to hardware-specific clock data
2425 *
2426 * clk_register is the primary interface for populating the clock tree with new
2427 * clock nodes. It returns a pointer to the newly allocated struct clk which
2428 * cannot be dereferenced by driver code but may be used in conjuction with the
2429 * rest of the clock API. In the event of an error clk_register will return an
2430 * error code; drivers must test for an error code after calling clk_register.
2431 */
2432struct clk *clk_register(struct device *dev, struct clk_hw *hw)
b2476490 2433{
d1302a36 2434 int i, ret;
d6968fca 2435 struct clk_core *core;
293ba3b4 2436
d6968fca
SB
2437 core = kzalloc(sizeof(*core), GFP_KERNEL);
2438 if (!core) {
293ba3b4
SB
2439 ret = -ENOMEM;
2440 goto fail_out;
2441 }
b2476490 2442
d6968fca
SB
2443 core->name = kstrdup_const(hw->init->name, GFP_KERNEL);
2444 if (!core->name) {
0197b3ea
SK
2445 ret = -ENOMEM;
2446 goto fail_name;
2447 }
d6968fca 2448 core->ops = hw->init->ops;
ac2df527 2449 if (dev && dev->driver)
d6968fca
SB
2450 core->owner = dev->driver->owner;
2451 core->hw = hw;
2452 core->flags = hw->init->flags;
2453 core->num_parents = hw->init->num_parents;
2454 hw->core = core;
b2476490 2455
d1302a36 2456 /* allocate local copy in case parent_names is __initdata */
d6968fca 2457 core->parent_names = kcalloc(core->num_parents, sizeof(char *),
96a7ed90 2458 GFP_KERNEL);
d1302a36 2459
d6968fca 2460 if (!core->parent_names) {
d1302a36
MT
2461 ret = -ENOMEM;
2462 goto fail_parent_names;
2463 }
2464
2465
2466 /* copy each string name in case parent_names is __initdata */
d6968fca
SB
2467 for (i = 0; i < core->num_parents; i++) {
2468 core->parent_names[i] = kstrdup_const(hw->init->parent_names[i],
0197b3ea 2469 GFP_KERNEL);
d6968fca 2470 if (!core->parent_names[i]) {
d1302a36
MT
2471 ret = -ENOMEM;
2472 goto fail_parent_names_copy;
2473 }
2474 }
2475
d6968fca 2476 INIT_HLIST_HEAD(&core->clks);
1c8e6004 2477
035a61c3
TV
2478 hw->clk = __clk_create_clk(hw, NULL, NULL);
2479 if (IS_ERR(hw->clk)) {
035a61c3
TV
2480 ret = PTR_ERR(hw->clk);
2481 goto fail_parent_names_copy;
2482 }
2483
2484 ret = __clk_init(dev, hw->clk);
d1302a36 2485 if (!ret)
035a61c3 2486 return hw->clk;
b2476490 2487
1c8e6004 2488 __clk_free_clk(hw->clk);
035a61c3 2489 hw->clk = NULL;
b2476490 2490
d1302a36
MT
2491fail_parent_names_copy:
2492 while (--i >= 0)
d6968fca
SB
2493 kfree_const(core->parent_names[i]);
2494 kfree(core->parent_names);
d1302a36 2495fail_parent_names:
d6968fca 2496 kfree_const(core->name);
0197b3ea 2497fail_name:
d6968fca 2498 kfree(core);
d1302a36
MT
2499fail_out:
2500 return ERR_PTR(ret);
b2476490
MT
2501}
2502EXPORT_SYMBOL_GPL(clk_register);
2503
6e5ab41b 2504/* Free memory allocated for a clock. */
fcb0ee6a
SN
2505static void __clk_release(struct kref *ref)
2506{
d6968fca
SB
2507 struct clk_core *core = container_of(ref, struct clk_core, ref);
2508 int i = core->num_parents;
fcb0ee6a 2509
496eadf8
KK
2510 lockdep_assert_held(&prepare_lock);
2511
d6968fca 2512 kfree(core->parents);
fcb0ee6a 2513 while (--i >= 0)
d6968fca 2514 kfree_const(core->parent_names[i]);
fcb0ee6a 2515
d6968fca
SB
2516 kfree(core->parent_names);
2517 kfree_const(core->name);
2518 kfree(core);
fcb0ee6a
SN
2519}
2520
2521/*
2522 * Empty clk_ops for unregistered clocks. These are used temporarily
2523 * after clk_unregister() was called on a clock and until last clock
2524 * consumer calls clk_put() and the struct clk object is freed.
2525 */
2526static int clk_nodrv_prepare_enable(struct clk_hw *hw)
2527{
2528 return -ENXIO;
2529}
2530
2531static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
2532{
2533 WARN_ON_ONCE(1);
2534}
2535
2536static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
2537 unsigned long parent_rate)
2538{
2539 return -ENXIO;
2540}
2541
2542static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
2543{
2544 return -ENXIO;
2545}
2546
2547static const struct clk_ops clk_nodrv_ops = {
2548 .enable = clk_nodrv_prepare_enable,
2549 .disable = clk_nodrv_disable_unprepare,
2550 .prepare = clk_nodrv_prepare_enable,
2551 .unprepare = clk_nodrv_disable_unprepare,
2552 .set_rate = clk_nodrv_set_rate,
2553 .set_parent = clk_nodrv_set_parent,
2554};
2555
1df5c939
MB
2556/**
2557 * clk_unregister - unregister a currently registered clock
2558 * @clk: clock to unregister
1df5c939 2559 */
fcb0ee6a
SN
2560void clk_unregister(struct clk *clk)
2561{
2562 unsigned long flags;
2563
6314b679
SB
2564 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2565 return;
2566
035a61c3 2567 clk_debug_unregister(clk->core);
fcb0ee6a
SN
2568
2569 clk_prepare_lock();
2570
035a61c3
TV
2571 if (clk->core->ops == &clk_nodrv_ops) {
2572 pr_err("%s: unregistered clock: %s\n", __func__,
2573 clk->core->name);
6314b679 2574 return;
fcb0ee6a
SN
2575 }
2576 /*
2577 * Assign empty clock ops for consumers that might still hold
2578 * a reference to this clock.
2579 */
2580 flags = clk_enable_lock();
035a61c3 2581 clk->core->ops = &clk_nodrv_ops;
fcb0ee6a
SN
2582 clk_enable_unlock(flags);
2583
035a61c3
TV
2584 if (!hlist_empty(&clk->core->children)) {
2585 struct clk_core *child;
874f224c 2586 struct hlist_node *t;
fcb0ee6a
SN
2587
2588 /* Reparent all children to the orphan list. */
035a61c3
TV
2589 hlist_for_each_entry_safe(child, t, &clk->core->children,
2590 child_node)
2591 clk_core_set_parent(child, NULL);
fcb0ee6a
SN
2592 }
2593
035a61c3 2594 hlist_del_init(&clk->core->child_node);
fcb0ee6a 2595
035a61c3 2596 if (clk->core->prepare_count)
fcb0ee6a 2597 pr_warn("%s: unregistering prepared clock: %s\n",
035a61c3
TV
2598 __func__, clk->core->name);
2599 kref_put(&clk->core->ref, __clk_release);
6314b679 2600
fcb0ee6a
SN
2601 clk_prepare_unlock();
2602}
1df5c939
MB
2603EXPORT_SYMBOL_GPL(clk_unregister);
2604
46c8773a
SB
2605static void devm_clk_release(struct device *dev, void *res)
2606{
293ba3b4 2607 clk_unregister(*(struct clk **)res);
46c8773a
SB
2608}
2609
2610/**
2611 * devm_clk_register - resource managed clk_register()
2612 * @dev: device that is registering this clock
2613 * @hw: link to hardware-specific clock data
2614 *
2615 * Managed clk_register(). Clocks returned from this function are
2616 * automatically clk_unregister()ed on driver detach. See clk_register() for
2617 * more information.
2618 */
2619struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
2620{
2621 struct clk *clk;
293ba3b4 2622 struct clk **clkp;
46c8773a 2623
293ba3b4
SB
2624 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
2625 if (!clkp)
46c8773a
SB
2626 return ERR_PTR(-ENOMEM);
2627
293ba3b4
SB
2628 clk = clk_register(dev, hw);
2629 if (!IS_ERR(clk)) {
2630 *clkp = clk;
2631 devres_add(dev, clkp);
46c8773a 2632 } else {
293ba3b4 2633 devres_free(clkp);
46c8773a
SB
2634 }
2635
2636 return clk;
2637}
2638EXPORT_SYMBOL_GPL(devm_clk_register);
2639
2640static int devm_clk_match(struct device *dev, void *res, void *data)
2641{
2642 struct clk *c = res;
2643 if (WARN_ON(!c))
2644 return 0;
2645 return c == data;
2646}
2647
2648/**
2649 * devm_clk_unregister - resource managed clk_unregister()
2650 * @clk: clock to unregister
2651 *
2652 * Deallocate a clock allocated with devm_clk_register(). Normally
2653 * this function will not need to be called and the resource management
2654 * code will ensure that the resource is freed.
2655 */
2656void devm_clk_unregister(struct device *dev, struct clk *clk)
2657{
2658 WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));
2659}
2660EXPORT_SYMBOL_GPL(devm_clk_unregister);
2661
ac2df527
SN
2662/*
2663 * clkdev helpers
2664 */
2665int __clk_get(struct clk *clk)
2666{
035a61c3
TV
2667 struct clk_core *core = !clk ? NULL : clk->core;
2668
2669 if (core) {
2670 if (!try_module_get(core->owner))
00efcb1c 2671 return 0;
ac2df527 2672
035a61c3 2673 kref_get(&core->ref);
00efcb1c 2674 }
ac2df527
SN
2675 return 1;
2676}
2677
2678void __clk_put(struct clk *clk)
2679{
10cdfe54
TV
2680 struct module *owner;
2681
00efcb1c 2682 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
ac2df527
SN
2683 return;
2684
fcb0ee6a 2685 clk_prepare_lock();
1c8e6004 2686
50595f8b 2687 hlist_del(&clk->clks_node);
ec02ace8
TV
2688 if (clk->min_rate > clk->core->req_rate ||
2689 clk->max_rate < clk->core->req_rate)
2690 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2691
1c8e6004
TV
2692 owner = clk->core->owner;
2693 kref_put(&clk->core->ref, __clk_release);
2694
fcb0ee6a
SN
2695 clk_prepare_unlock();
2696
10cdfe54 2697 module_put(owner);
035a61c3 2698
035a61c3 2699 kfree(clk);
ac2df527
SN
2700}
2701
b2476490
MT
2702/*** clk rate change notifiers ***/
2703
2704/**
2705 * clk_notifier_register - add a clk rate change notifier
2706 * @clk: struct clk * to watch
2707 * @nb: struct notifier_block * with callback info
2708 *
2709 * Request notification when clk's rate changes. This uses an SRCU
2710 * notifier because we want it to block and notifier unregistrations are
2711 * uncommon. The callbacks associated with the notifier must not
2712 * re-enter into the clk framework by calling any top-level clk APIs;
2713 * this will cause a nested prepare_lock mutex.
2714 *
5324fda7
SB
2715 * In all notification cases cases (pre, post and abort rate change) the
2716 * original clock rate is passed to the callback via struct
2717 * clk_notifier_data.old_rate and the new frequency is passed via struct
b2476490
MT
2718 * clk_notifier_data.new_rate.
2719 *
b2476490
MT
2720 * clk_notifier_register() must be called from non-atomic context.
2721 * Returns -EINVAL if called with null arguments, -ENOMEM upon
2722 * allocation failure; otherwise, passes along the return value of
2723 * srcu_notifier_chain_register().
2724 */
2725int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2726{
2727 struct clk_notifier *cn;
2728 int ret = -ENOMEM;
2729
2730 if (!clk || !nb)
2731 return -EINVAL;
2732
eab89f69 2733 clk_prepare_lock();
b2476490
MT
2734
2735 /* search the list of notifiers for this clk */
2736 list_for_each_entry(cn, &clk_notifier_list, node)
2737 if (cn->clk == clk)
2738 break;
2739
2740 /* if clk wasn't in the notifier list, allocate new clk_notifier */
2741 if (cn->clk != clk) {
2742 cn = kzalloc(sizeof(struct clk_notifier), GFP_KERNEL);
2743 if (!cn)
2744 goto out;
2745
2746 cn->clk = clk;
2747 srcu_init_notifier_head(&cn->notifier_head);
2748
2749 list_add(&cn->node, &clk_notifier_list);
2750 }
2751
2752 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2753
035a61c3 2754 clk->core->notifier_count++;
b2476490
MT
2755
2756out:
eab89f69 2757 clk_prepare_unlock();
b2476490
MT
2758
2759 return ret;
2760}
2761EXPORT_SYMBOL_GPL(clk_notifier_register);
2762
2763/**
2764 * clk_notifier_unregister - remove a clk rate change notifier
2765 * @clk: struct clk *
2766 * @nb: struct notifier_block * with callback info
2767 *
2768 * Request no further notification for changes to 'clk' and frees memory
2769 * allocated in clk_notifier_register.
2770 *
2771 * Returns -EINVAL if called with null arguments; otherwise, passes
2772 * along the return value of srcu_notifier_chain_unregister().
2773 */
2774int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2775{
2776 struct clk_notifier *cn = NULL;
2777 int ret = -EINVAL;
2778
2779 if (!clk || !nb)
2780 return -EINVAL;
2781
eab89f69 2782 clk_prepare_lock();
b2476490
MT
2783
2784 list_for_each_entry(cn, &clk_notifier_list, node)
2785 if (cn->clk == clk)
2786 break;
2787
2788 if (cn->clk == clk) {
2789 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2790
035a61c3 2791 clk->core->notifier_count--;
b2476490
MT
2792
2793 /* XXX the notifier code should handle this better */
2794 if (!cn->notifier_head.head) {
2795 srcu_cleanup_notifier_head(&cn->notifier_head);
72b5322f 2796 list_del(&cn->node);
b2476490
MT
2797 kfree(cn);
2798 }
2799
2800 } else {
2801 ret = -ENOENT;
2802 }
2803
eab89f69 2804 clk_prepare_unlock();
b2476490
MT
2805
2806 return ret;
2807}
2808EXPORT_SYMBOL_GPL(clk_notifier_unregister);
766e6a4e
GL
2809
2810#ifdef CONFIG_OF
2811/**
2812 * struct of_clk_provider - Clock provider registration structure
2813 * @link: Entry in global list of clock providers
2814 * @node: Pointer to device tree node of clock provider
2815 * @get: Get clock callback. Returns NULL or a struct clk for the
2816 * given clock specifier
2817 * @data: context pointer to be passed into @get callback
2818 */
2819struct of_clk_provider {
2820 struct list_head link;
2821
2822 struct device_node *node;
2823 struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
2824 void *data;
2825};
2826
f2f6c255
PG
2827static const struct of_device_id __clk_of_table_sentinel
2828 __used __section(__clk_of_table_end);
2829
766e6a4e 2830static LIST_HEAD(of_clk_providers);
d6782c26
SN
2831static DEFINE_MUTEX(of_clk_mutex);
2832
766e6a4e
GL
2833struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
2834 void *data)
2835{
2836 return data;
2837}
2838EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
2839
494bfec9
SG
2840struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
2841{
2842 struct clk_onecell_data *clk_data = data;
2843 unsigned int idx = clkspec->args[0];
2844
2845 if (idx >= clk_data->clk_num) {
2846 pr_err("%s: invalid clock index %d\n", __func__, idx);
2847 return ERR_PTR(-EINVAL);
2848 }
2849
2850 return clk_data->clks[idx];
2851}
2852EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
2853
766e6a4e
GL
2854/**
2855 * of_clk_add_provider() - Register a clock provider for a node
2856 * @np: Device node pointer associated with clock provider
2857 * @clk_src_get: callback for decoding clock
2858 * @data: context pointer for @clk_src_get callback.
2859 */
2860int of_clk_add_provider(struct device_node *np,
2861 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
2862 void *data),
2863 void *data)
2864{
2865 struct of_clk_provider *cp;
86be408b 2866 int ret;
766e6a4e
GL
2867
2868 cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
2869 if (!cp)
2870 return -ENOMEM;
2871
2872 cp->node = of_node_get(np);
2873 cp->data = data;
2874 cp->get = clk_src_get;
2875
d6782c26 2876 mutex_lock(&of_clk_mutex);
766e6a4e 2877 list_add(&cp->link, &of_clk_providers);
d6782c26 2878 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2879 pr_debug("Added clock from %s\n", np->full_name);
2880
86be408b
SN
2881 ret = of_clk_set_defaults(np, true);
2882 if (ret < 0)
2883 of_clk_del_provider(np);
2884
2885 return ret;
766e6a4e
GL
2886}
2887EXPORT_SYMBOL_GPL(of_clk_add_provider);
2888
2889/**
2890 * of_clk_del_provider() - Remove a previously registered clock provider
2891 * @np: Device node pointer associated with clock provider
2892 */
2893void of_clk_del_provider(struct device_node *np)
2894{
2895 struct of_clk_provider *cp;
2896
d6782c26 2897 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2898 list_for_each_entry(cp, &of_clk_providers, link) {
2899 if (cp->node == np) {
2900 list_del(&cp->link);
2901 of_node_put(cp->node);
2902 kfree(cp);
2903 break;
2904 }
2905 }
d6782c26 2906 mutex_unlock(&of_clk_mutex);
766e6a4e
GL
2907}
2908EXPORT_SYMBOL_GPL(of_clk_del_provider);
2909
73e0e496
SB
2910struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
2911 const char *dev_id, const char *con_id)
766e6a4e
GL
2912{
2913 struct of_clk_provider *provider;
a34cd466 2914 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
766e6a4e 2915
306c342f
SB
2916 if (!clkspec)
2917 return ERR_PTR(-EINVAL);
2918
766e6a4e 2919 /* Check if we have such a provider in our array */
306c342f 2920 mutex_lock(&of_clk_mutex);
766e6a4e
GL
2921 list_for_each_entry(provider, &of_clk_providers, link) {
2922 if (provider->node == clkspec->np)
2923 clk = provider->get(clkspec, provider->data);
73e0e496
SB
2924 if (!IS_ERR(clk)) {
2925 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
2926 con_id);
2927
2928 if (!IS_ERR(clk) && !__clk_get(clk)) {
2929 __clk_free_clk(clk);
2930 clk = ERR_PTR(-ENOENT);
2931 }
2932
766e6a4e 2933 break;
73e0e496 2934 }
766e6a4e 2935 }
306c342f 2936 mutex_unlock(&of_clk_mutex);
d6782c26
SN
2937
2938 return clk;
2939}
2940
306c342f
SB
2941/**
2942 * of_clk_get_from_provider() - Lookup a clock from a clock provider
2943 * @clkspec: pointer to a clock specifier data structure
2944 *
2945 * This function looks up a struct clk from the registered list of clock
2946 * providers, an input is a clock specifier data structure as returned
2947 * from the of_parse_phandle_with_args() function call.
2948 */
d6782c26
SN
2949struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
2950{
306c342f 2951 return __of_clk_get_from_provider(clkspec, NULL, __func__);
766e6a4e
GL
2952}
2953
f6102742
MT
2954int of_clk_get_parent_count(struct device_node *np)
2955{
2956 return of_count_phandle_with_args(np, "clocks", "#clock-cells");
2957}
2958EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
2959
766e6a4e
GL
2960const char *of_clk_get_parent_name(struct device_node *np, int index)
2961{
2962 struct of_phandle_args clkspec;
7a0fc1a3 2963 struct property *prop;
766e6a4e 2964 const char *clk_name;
7a0fc1a3
BD
2965 const __be32 *vp;
2966 u32 pv;
766e6a4e 2967 int rc;
7a0fc1a3 2968 int count;
766e6a4e
GL
2969
2970 if (index < 0)
2971 return NULL;
2972
2973 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
2974 &clkspec);
2975 if (rc)
2976 return NULL;
2977
7a0fc1a3
BD
2978 index = clkspec.args_count ? clkspec.args[0] : 0;
2979 count = 0;
2980
2981 /* if there is an indices property, use it to transfer the index
2982 * specified into an array offset for the clock-output-names property.
2983 */
2984 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
2985 if (index == pv) {
2986 index = count;
2987 break;
2988 }
2989 count++;
2990 }
2991
766e6a4e 2992 if (of_property_read_string_index(clkspec.np, "clock-output-names",
7a0fc1a3 2993 index,
766e6a4e
GL
2994 &clk_name) < 0)
2995 clk_name = clkspec.np->name;
2996
2997 of_node_put(clkspec.np);
2998 return clk_name;
2999}
3000EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
3001
1771b10d
GC
3002struct clock_provider {
3003 of_clk_init_cb_t clk_init_cb;
3004 struct device_node *np;
3005 struct list_head node;
3006};
3007
3008static LIST_HEAD(clk_provider_list);
3009
3010/*
3011 * This function looks for a parent clock. If there is one, then it
3012 * checks that the provider for this parent clock was initialized, in
3013 * this case the parent clock will be ready.
3014 */
3015static int parent_ready(struct device_node *np)
3016{
3017 int i = 0;
3018
3019 while (true) {
3020 struct clk *clk = of_clk_get(np, i);
3021
3022 /* this parent is ready we can check the next one */
3023 if (!IS_ERR(clk)) {
3024 clk_put(clk);
3025 i++;
3026 continue;
3027 }
3028
3029 /* at least one parent is not ready, we exit now */
3030 if (PTR_ERR(clk) == -EPROBE_DEFER)
3031 return 0;
3032
3033 /*
3034 * Here we make assumption that the device tree is
3035 * written correctly. So an error means that there is
3036 * no more parent. As we didn't exit yet, then the
3037 * previous parent are ready. If there is no clock
3038 * parent, no need to wait for them, then we can
3039 * consider their absence as being ready
3040 */
3041 return 1;
3042 }
3043}
3044
766e6a4e
GL
3045/**
3046 * of_clk_init() - Scan and init clock providers from the DT
3047 * @matches: array of compatible values and init functions for providers.
3048 *
1771b10d 3049 * This function scans the device tree for matching clock providers
e5ca8fb4 3050 * and calls their initialization functions. It also does it by trying
1771b10d 3051 * to follow the dependencies.
766e6a4e
GL
3052 */
3053void __init of_clk_init(const struct of_device_id *matches)
3054{
7f7ed584 3055 const struct of_device_id *match;
766e6a4e 3056 struct device_node *np;
1771b10d
GC
3057 struct clock_provider *clk_provider, *next;
3058 bool is_init_done;
3059 bool force = false;
766e6a4e 3060
f2f6c255 3061 if (!matches)
819b4861 3062 matches = &__clk_of_table;
f2f6c255 3063
1771b10d 3064 /* First prepare the list of the clocks providers */
7f7ed584 3065 for_each_matching_node_and_match(np, matches, &match) {
1771b10d
GC
3066 struct clock_provider *parent =
3067 kzalloc(sizeof(struct clock_provider), GFP_KERNEL);
3068
3069 parent->clk_init_cb = match->data;
3070 parent->np = np;
3f6d439f 3071 list_add_tail(&parent->node, &clk_provider_list);
1771b10d
GC
3072 }
3073
3074 while (!list_empty(&clk_provider_list)) {
3075 is_init_done = false;
3076 list_for_each_entry_safe(clk_provider, next,
3077 &clk_provider_list, node) {
3078 if (force || parent_ready(clk_provider->np)) {
86be408b 3079
1771b10d 3080 clk_provider->clk_init_cb(clk_provider->np);
86be408b
SN
3081 of_clk_set_defaults(clk_provider->np, true);
3082
1771b10d
GC
3083 list_del(&clk_provider->node);
3084 kfree(clk_provider);
3085 is_init_done = true;
3086 }
3087 }
3088
3089 /*
e5ca8fb4 3090 * We didn't manage to initialize any of the
1771b10d
GC
3091 * remaining providers during the last loop, so now we
3092 * initialize all the remaining ones unconditionally
3093 * in case the clock parent was not mandatory
3094 */
3095 if (!is_init_done)
3096 force = true;
766e6a4e
GL
3097 }
3098}
3099#endif
This page took 0.326124 seconds and 5 git commands to generate.