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a49e6c4b LY |
1 | /* |
2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | #include <linux/clk-provider.h> | |
13 | #include <linux/err.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/slab.h> | |
16 | #include "clk.h" | |
17 | ||
a49e6c4b LY |
18 | /** |
19 | * struct clk_fixup_mux - imx integer fixup multiplexer clock | |
20 | * @mux: the parent class | |
21 | * @ops: pointer to clk_ops of parent class | |
22 | * @fixup: a hook to fixup the write value | |
23 | * | |
24 | * The imx fixup multiplexer clock is a subclass of basic clk_mux | |
25 | * with an addtional fixup hook. | |
26 | */ | |
27 | struct clk_fixup_mux { | |
28 | struct clk_mux mux; | |
29 | const struct clk_ops *ops; | |
30 | void (*fixup)(u32 *val); | |
31 | }; | |
32 | ||
33 | static inline struct clk_fixup_mux *to_clk_fixup_mux(struct clk_hw *hw) | |
34 | { | |
35 | struct clk_mux *mux = to_clk_mux(hw); | |
36 | ||
37 | return container_of(mux, struct clk_fixup_mux, mux); | |
38 | } | |
39 | ||
40 | static u8 clk_fixup_mux_get_parent(struct clk_hw *hw) | |
41 | { | |
42 | struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw); | |
43 | ||
44 | return fixup_mux->ops->get_parent(&fixup_mux->mux.hw); | |
45 | } | |
46 | ||
47 | static int clk_fixup_mux_set_parent(struct clk_hw *hw, u8 index) | |
48 | { | |
49 | struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw); | |
50 | struct clk_mux *mux = to_clk_mux(hw); | |
51 | unsigned long flags = 0; | |
52 | u32 val; | |
53 | ||
54 | spin_lock_irqsave(mux->lock, flags); | |
55 | ||
56 | val = readl(mux->reg); | |
57 | val &= ~(mux->mask << mux->shift); | |
58 | val |= index << mux->shift; | |
59 | fixup_mux->fixup(&val); | |
60 | writel(val, mux->reg); | |
61 | ||
62 | spin_unlock_irqrestore(mux->lock, flags); | |
63 | ||
64 | return 0; | |
65 | } | |
66 | ||
67 | static const struct clk_ops clk_fixup_mux_ops = { | |
68 | .get_parent = clk_fixup_mux_get_parent, | |
69 | .set_parent = clk_fixup_mux_set_parent, | |
70 | }; | |
71 | ||
72 | struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, | |
73 | u8 shift, u8 width, const char **parents, | |
74 | int num_parents, void (*fixup)(u32 *val)) | |
75 | { | |
76 | struct clk_fixup_mux *fixup_mux; | |
77 | struct clk *clk; | |
78 | struct clk_init_data init; | |
79 | ||
80 | if (!fixup) | |
81 | return ERR_PTR(-EINVAL); | |
82 | ||
83 | fixup_mux = kzalloc(sizeof(*fixup_mux), GFP_KERNEL); | |
84 | if (!fixup_mux) | |
85 | return ERR_PTR(-ENOMEM); | |
86 | ||
87 | init.name = name; | |
88 | init.ops = &clk_fixup_mux_ops; | |
89 | init.parent_names = parents; | |
90 | init.num_parents = num_parents; | |
bdb1b5f2 | 91 | init.flags = 0; |
a49e6c4b LY |
92 | |
93 | fixup_mux->mux.reg = reg; | |
94 | fixup_mux->mux.shift = shift; | |
95 | fixup_mux->mux.mask = BIT(width) - 1; | |
96 | fixup_mux->mux.lock = &imx_ccm_lock; | |
97 | fixup_mux->mux.hw.init = &init; | |
98 | fixup_mux->ops = &clk_mux_ops; | |
99 | fixup_mux->fixup = fixup; | |
100 | ||
101 | clk = clk_register(NULL, &fixup_mux->mux.hw); | |
102 | if (IS_ERR(clk)) | |
103 | kfree(fixup_mux); | |
104 | ||
105 | return clk; | |
106 | } |