Commit | Line | Data |
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af75655c | 1 | /* |
cfda5901 | 2 | * Copyright (C) 2012 Altera Corporation |
af75655c JI |
3 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles |
4 | * | |
cfda5901 DN |
5 | * Modified from mach-picoxcell/time.c |
6 | * | |
af75655c JI |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
cfda5901 DN |
11 | * This program is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
af75655c | 18 | */ |
9115df89 | 19 | #include <linux/delay.h> |
af75655c JI |
20 | #include <linux/dw_apb_timer.h> |
21 | #include <linux/of.h> | |
22 | #include <linux/of_address.h> | |
23 | #include <linux/of_irq.h> | |
a8b447f2 | 24 | #include <linux/clk.h> |
38ff87f7 | 25 | #include <linux/sched_clock.h> |
af75655c | 26 | |
1cf0203a | 27 | static void __init timer_get_base_and_rate(struct device_node *np, |
af75655c JI |
28 | void __iomem **base, u32 *rate) |
29 | { | |
a8b447f2 HS |
30 | struct clk *timer_clk; |
31 | struct clk *pclk; | |
32 | ||
af75655c JI |
33 | *base = of_iomap(np, 0); |
34 | ||
35 | if (!*base) | |
36 | panic("Unable to map regs for %s", np->name); | |
37 | ||
a8b447f2 HS |
38 | /* |
39 | * Not all implementations use a periphal clock, so don't panic | |
40 | * if it's not present | |
41 | */ | |
42 | pclk = of_clk_get_by_name(np, "pclk"); | |
43 | if (!IS_ERR(pclk)) | |
44 | if (clk_prepare_enable(pclk)) | |
45 | pr_warn("pclk for %s is present, but could not be activated\n", | |
46 | np->name); | |
47 | ||
48 | timer_clk = of_clk_get_by_name(np, "timer"); | |
49 | if (IS_ERR(timer_clk)) | |
50 | goto try_clock_freq; | |
51 | ||
52 | if (!clk_prepare_enable(timer_clk)) { | |
53 | *rate = clk_get_rate(timer_clk); | |
54 | return; | |
55 | } | |
56 | ||
57 | try_clock_freq: | |
cfda5901 | 58 | if (of_property_read_u32(np, "clock-freq", rate) && |
1cf0203a | 59 | of_property_read_u32(np, "clock-frequency", rate)) |
a8b447f2 | 60 | panic("No clock nor clock-frequency property for %s", np->name); |
af75655c JI |
61 | } |
62 | ||
1cf0203a | 63 | static void __init add_clockevent(struct device_node *event_timer) |
af75655c JI |
64 | { |
65 | void __iomem *iobase; | |
66 | struct dw_apb_clock_event_device *ced; | |
67 | u32 irq, rate; | |
68 | ||
69 | irq = irq_of_parse_and_map(event_timer, 0); | |
1a33bd2b | 70 | if (irq == 0) |
af75655c JI |
71 | panic("No IRQ for clock event timer"); |
72 | ||
73 | timer_get_base_and_rate(event_timer, &iobase, &rate); | |
74 | ||
75 | ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq, | |
76 | rate); | |
77 | if (!ced) | |
78 | panic("Unable to initialise clockevent device"); | |
79 | ||
80 | dw_apb_clockevent_register(ced); | |
81 | } | |
82 | ||
a1198f83 HS |
83 | static void __iomem *sched_io_base; |
84 | static u32 sched_rate; | |
85 | ||
1cf0203a | 86 | static void __init add_clocksource(struct device_node *source_timer) |
af75655c JI |
87 | { |
88 | void __iomem *iobase; | |
89 | struct dw_apb_clocksource *cs; | |
90 | u32 rate; | |
91 | ||
92 | timer_get_base_and_rate(source_timer, &iobase, &rate); | |
93 | ||
94 | cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate); | |
95 | if (!cs) | |
96 | panic("Unable to initialise clocksource device"); | |
97 | ||
98 | dw_apb_clocksource_start(cs); | |
99 | dw_apb_clocksource_register(cs); | |
af75655c | 100 | |
a1198f83 HS |
101 | /* |
102 | * Fallback to use the clocksource as sched_clock if no separate | |
103 | * timer is found. sched_io_base then points to the current_value | |
104 | * register of the clocksource timer. | |
105 | */ | |
106 | sched_io_base = iobase + 0x04; | |
107 | sched_rate = rate; | |
108 | } | |
af75655c | 109 | |
0d24d1f2 | 110 | static u64 notrace read_sched_clock(void) |
af75655c | 111 | { |
3a10013b | 112 | return ~readl_relaxed(sched_io_base); |
af75655c JI |
113 | } |
114 | ||
cfda5901 | 115 | static const struct of_device_id sptimer_ids[] __initconst = { |
af75655c JI |
116 | { .compatible = "picochip,pc3x2-rtc" }, |
117 | { /* Sentinel */ }, | |
118 | }; | |
119 | ||
1cf0203a | 120 | static void __init init_sched_clock(void) |
af75655c JI |
121 | { |
122 | struct device_node *sched_timer; | |
af75655c | 123 | |
cfda5901 | 124 | sched_timer = of_find_matching_node(NULL, sptimer_ids); |
a1198f83 HS |
125 | if (sched_timer) { |
126 | timer_get_base_and_rate(sched_timer, &sched_io_base, | |
127 | &sched_rate); | |
128 | of_node_put(sched_timer); | |
129 | } | |
af75655c | 130 | |
fa8296ae | 131 | sched_clock_register(read_sched_clock, 32, sched_rate); |
af75655c JI |
132 | } |
133 | ||
9115df89 JZ |
134 | #ifdef CONFIG_ARM |
135 | static unsigned long dw_apb_delay_timer_read(void) | |
136 | { | |
137 | return ~readl_relaxed(sched_io_base); | |
138 | } | |
139 | ||
140 | static struct delay_timer dw_apb_delay_timer = { | |
141 | .read_current_timer = dw_apb_delay_timer_read, | |
142 | }; | |
143 | #endif | |
144 | ||
10021488 HS |
145 | static int num_called; |
146 | static void __init dw_apb_timer_init(struct device_node *timer) | |
af75655c | 147 | { |
10021488 HS |
148 | switch (num_called) { |
149 | case 0: | |
150 | pr_debug("%s: found clockevent timer\n", __func__); | |
151 | add_clockevent(timer); | |
10021488 HS |
152 | break; |
153 | case 1: | |
154 | pr_debug("%s: found clocksource timer\n", __func__); | |
155 | add_clocksource(timer); | |
10021488 | 156 | init_sched_clock(); |
9115df89 JZ |
157 | #ifdef CONFIG_ARM |
158 | dw_apb_delay_timer.freq = sched_rate; | |
159 | register_current_timer_delay(&dw_apb_delay_timer); | |
160 | #endif | |
10021488 HS |
161 | break; |
162 | default: | |
163 | break; | |
164 | } | |
af75655c | 165 | |
10021488 | 166 | num_called++; |
af75655c | 167 | } |
10021488 | 168 | CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init); |
9ab4727c DN |
169 | CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init); |
170 | CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init); | |
171 | CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init); |