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af75655c | 1 | /* |
cfda5901 | 2 | * Copyright (C) 2012 Altera Corporation |
af75655c JI |
3 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles |
4 | * | |
cfda5901 DN |
5 | * Modified from mach-picoxcell/time.c |
6 | * | |
af75655c JI |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
cfda5901 DN |
11 | * This program is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
af75655c JI |
18 | */ |
19 | #include <linux/dw_apb_timer.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/of_address.h> | |
22 | #include <linux/of_irq.h> | |
a8b447f2 | 23 | #include <linux/clk.h> |
af75655c JI |
24 | |
25 | #include <asm/mach/time.h> | |
26 | #include <asm/sched_clock.h> | |
27 | ||
af75655c JI |
28 | static void timer_get_base_and_rate(struct device_node *np, |
29 | void __iomem **base, u32 *rate) | |
30 | { | |
a8b447f2 HS |
31 | struct clk *timer_clk; |
32 | struct clk *pclk; | |
33 | ||
af75655c JI |
34 | *base = of_iomap(np, 0); |
35 | ||
36 | if (!*base) | |
37 | panic("Unable to map regs for %s", np->name); | |
38 | ||
a8b447f2 HS |
39 | /* |
40 | * Not all implementations use a periphal clock, so don't panic | |
41 | * if it's not present | |
42 | */ | |
43 | pclk = of_clk_get_by_name(np, "pclk"); | |
44 | if (!IS_ERR(pclk)) | |
45 | if (clk_prepare_enable(pclk)) | |
46 | pr_warn("pclk for %s is present, but could not be activated\n", | |
47 | np->name); | |
48 | ||
49 | timer_clk = of_clk_get_by_name(np, "timer"); | |
50 | if (IS_ERR(timer_clk)) | |
51 | goto try_clock_freq; | |
52 | ||
53 | if (!clk_prepare_enable(timer_clk)) { | |
54 | *rate = clk_get_rate(timer_clk); | |
55 | return; | |
56 | } | |
57 | ||
58 | try_clock_freq: | |
cfda5901 DN |
59 | if (of_property_read_u32(np, "clock-freq", rate) && |
60 | of_property_read_u32(np, "clock-frequency", rate)) | |
a8b447f2 | 61 | panic("No clock nor clock-frequency property for %s", np->name); |
af75655c JI |
62 | } |
63 | ||
cfda5901 | 64 | static void add_clockevent(struct device_node *event_timer) |
af75655c JI |
65 | { |
66 | void __iomem *iobase; | |
67 | struct dw_apb_clock_event_device *ced; | |
68 | u32 irq, rate; | |
69 | ||
70 | irq = irq_of_parse_and_map(event_timer, 0); | |
71 | if (irq == NO_IRQ) | |
72 | panic("No IRQ for clock event timer"); | |
73 | ||
74 | timer_get_base_and_rate(event_timer, &iobase, &rate); | |
75 | ||
76 | ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq, | |
77 | rate); | |
78 | if (!ced) | |
79 | panic("Unable to initialise clockevent device"); | |
80 | ||
81 | dw_apb_clockevent_register(ced); | |
82 | } | |
83 | ||
a1198f83 HS |
84 | static void __iomem *sched_io_base; |
85 | static u32 sched_rate; | |
86 | ||
cfda5901 | 87 | static void add_clocksource(struct device_node *source_timer) |
af75655c JI |
88 | { |
89 | void __iomem *iobase; | |
90 | struct dw_apb_clocksource *cs; | |
91 | u32 rate; | |
92 | ||
93 | timer_get_base_and_rate(source_timer, &iobase, &rate); | |
94 | ||
95 | cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate); | |
96 | if (!cs) | |
97 | panic("Unable to initialise clocksource device"); | |
98 | ||
99 | dw_apb_clocksource_start(cs); | |
100 | dw_apb_clocksource_register(cs); | |
af75655c | 101 | |
a1198f83 HS |
102 | /* |
103 | * Fallback to use the clocksource as sched_clock if no separate | |
104 | * timer is found. sched_io_base then points to the current_value | |
105 | * register of the clocksource timer. | |
106 | */ | |
107 | sched_io_base = iobase + 0x04; | |
108 | sched_rate = rate; | |
109 | } | |
af75655c | 110 | |
cfda5901 | 111 | static u32 read_sched_clock(void) |
af75655c | 112 | { |
2f0778af | 113 | return __raw_readl(sched_io_base); |
af75655c JI |
114 | } |
115 | ||
cfda5901 | 116 | static const struct of_device_id sptimer_ids[] __initconst = { |
af75655c | 117 | { .compatible = "picochip,pc3x2-rtc" }, |
cfda5901 | 118 | { .compatible = "snps,dw-apb-timer-sp" }, |
af75655c JI |
119 | { /* Sentinel */ }, |
120 | }; | |
121 | ||
cfda5901 | 122 | static void init_sched_clock(void) |
af75655c JI |
123 | { |
124 | struct device_node *sched_timer; | |
af75655c | 125 | |
cfda5901 | 126 | sched_timer = of_find_matching_node(NULL, sptimer_ids); |
a1198f83 HS |
127 | if (sched_timer) { |
128 | timer_get_base_and_rate(sched_timer, &sched_io_base, | |
129 | &sched_rate); | |
130 | of_node_put(sched_timer); | |
131 | } | |
af75655c | 132 | |
a1198f83 | 133 | setup_sched_clock(read_sched_clock, 32, sched_rate); |
af75655c JI |
134 | } |
135 | ||
cfda5901 | 136 | static const struct of_device_id osctimer_ids[] __initconst = { |
af75655c | 137 | { .compatible = "picochip,pc3x2-timer" }, |
cfda5901 | 138 | { .compatible = "snps,dw-apb-timer-osc" }, |
af75655c JI |
139 | {}, |
140 | }; | |
141 | ||
6bb27d73 | 142 | void __init dw_apb_timer_init(void) |
af75655c JI |
143 | { |
144 | struct device_node *event_timer, *source_timer; | |
145 | ||
cfda5901 | 146 | event_timer = of_find_matching_node(NULL, osctimer_ids); |
af75655c JI |
147 | if (!event_timer) |
148 | panic("No timer for clockevent"); | |
cfda5901 | 149 | add_clockevent(event_timer); |
af75655c | 150 | |
cfda5901 | 151 | source_timer = of_find_matching_node(event_timer, osctimer_ids); |
af75655c JI |
152 | if (!source_timer) |
153 | panic("No timer for clocksource"); | |
cfda5901 | 154 | add_clocksource(source_timer); |
af75655c JI |
155 | |
156 | of_node_put(source_timer); | |
157 | ||
cfda5901 | 158 | init_sched_clock(); |
af75655c | 159 | } |