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f1189989 TF |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * http://www.samsung.com/ | |
4 | * | |
5 | * samsung - Common hr-timer support (s3c and s5p) | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/interrupt.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/err.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/clockchips.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/of.h> | |
20 | #include <linux/of_address.h> | |
21 | #include <linux/of_irq.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/slab.h> | |
24 | ||
25 | #include <clocksource/samsung_pwm.h> | |
26 | ||
27 | #include <asm/sched_clock.h> | |
28 | ||
29 | /* | |
30 | * Clocksource driver | |
31 | */ | |
32 | ||
33 | #define REG_TCFG0 0x00 | |
34 | #define REG_TCFG1 0x04 | |
35 | #define REG_TCON 0x08 | |
36 | #define REG_TINT_CSTAT 0x44 | |
37 | ||
38 | #define REG_TCNTB(chan) (0x0c + 12 * (chan)) | |
39 | #define REG_TCMPB(chan) (0x10 + 12 * (chan)) | |
40 | ||
41 | #define TCFG0_PRESCALER_MASK 0xff | |
42 | #define TCFG0_PRESCALER1_SHIFT 8 | |
43 | ||
44 | #define TCFG1_SHIFT(x) ((x) * 4) | |
45 | #define TCFG1_MUX_MASK 0xf | |
46 | ||
47 | #define TCON_START(chan) (1 << (4 * (chan) + 0)) | |
48 | #define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1)) | |
49 | #define TCON_INVERT(chan) (1 << (4 * (chan) + 2)) | |
50 | #define TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3)) | |
51 | ||
7aac482e TF |
52 | DEFINE_SPINLOCK(samsung_pwm_lock); |
53 | EXPORT_SYMBOL(samsung_pwm_lock); | |
54 | ||
f1189989 TF |
55 | struct samsung_timer_source { |
56 | unsigned int event_id; | |
57 | unsigned int source_id; | |
58 | unsigned int tcnt_max; | |
59 | unsigned int tscaler_div; | |
60 | unsigned int tdiv; | |
61 | }; | |
62 | ||
63 | static struct samsung_pwm *pwm; | |
64 | static struct clk *timerclk; | |
65 | static struct samsung_timer_source timer_source; | |
66 | static unsigned long clock_count_per_tick; | |
67 | ||
68 | static void samsung_timer_set_prescale(struct samsung_pwm *pwm, | |
69 | unsigned int channel, u16 prescale) | |
70 | { | |
71 | unsigned long flags; | |
72 | u8 shift = 0; | |
73 | u32 reg; | |
74 | ||
75 | if (channel >= 2) | |
76 | shift = TCFG0_PRESCALER1_SHIFT; | |
77 | ||
7aac482e | 78 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 TF |
79 | |
80 | reg = readl(pwm->base + REG_TCFG0); | |
81 | reg &= ~(TCFG0_PRESCALER_MASK << shift); | |
82 | reg |= (prescale - 1) << shift; | |
83 | writel(reg, pwm->base + REG_TCFG0); | |
84 | ||
7aac482e | 85 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
86 | } |
87 | ||
88 | static void samsung_timer_set_divisor(struct samsung_pwm *pwm, | |
89 | unsigned int channel, u8 divisor) | |
90 | { | |
91 | u8 shift = TCFG1_SHIFT(channel); | |
92 | unsigned long flags; | |
93 | u32 reg; | |
94 | u8 bits; | |
95 | ||
96 | bits = (fls(divisor) - 1) - pwm->variant.div_base; | |
97 | ||
7aac482e | 98 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 TF |
99 | |
100 | reg = readl(pwm->base + REG_TCFG1); | |
101 | reg &= ~(TCFG1_MUX_MASK << shift); | |
102 | reg |= bits << shift; | |
103 | writel(reg, pwm->base + REG_TCFG1); | |
104 | ||
7aac482e | 105 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
106 | } |
107 | ||
108 | static void samsung_time_stop(unsigned int channel) | |
109 | { | |
110 | unsigned long tcon; | |
111 | unsigned long flags; | |
112 | ||
113 | if (channel > 0) | |
114 | ++channel; | |
115 | ||
7aac482e | 116 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 TF |
117 | |
118 | tcon = __raw_readl(pwm->base + REG_TCON); | |
119 | tcon &= ~TCON_START(channel); | |
120 | __raw_writel(tcon, pwm->base + REG_TCON); | |
121 | ||
7aac482e | 122 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
123 | } |
124 | ||
125 | static void samsung_time_setup(unsigned int channel, unsigned long tcnt) | |
126 | { | |
127 | unsigned long tcon; | |
128 | unsigned long flags; | |
129 | unsigned int tcon_chan = channel; | |
130 | ||
131 | if (tcon_chan > 0) | |
132 | ++tcon_chan; | |
133 | ||
7aac482e | 134 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 TF |
135 | |
136 | tcon = __raw_readl(pwm->base + REG_TCON); | |
137 | ||
138 | tcnt--; | |
139 | ||
140 | tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan)); | |
141 | tcon |= TCON_MANUALUPDATE(tcon_chan); | |
142 | ||
143 | __raw_writel(tcnt, pwm->base + REG_TCNTB(channel)); | |
144 | __raw_writel(tcnt, pwm->base + REG_TCMPB(channel)); | |
145 | __raw_writel(tcon, pwm->base + REG_TCON); | |
146 | ||
7aac482e | 147 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
148 | } |
149 | ||
150 | static void samsung_time_start(unsigned int channel, bool periodic) | |
151 | { | |
152 | unsigned long tcon; | |
153 | unsigned long flags; | |
154 | ||
155 | if (channel > 0) | |
156 | ++channel; | |
157 | ||
7aac482e | 158 | spin_lock_irqsave(&samsung_pwm_lock, flags); |
f1189989 TF |
159 | |
160 | tcon = __raw_readl(pwm->base + REG_TCON); | |
161 | ||
162 | tcon &= ~TCON_MANUALUPDATE(channel); | |
163 | tcon |= TCON_START(channel); | |
164 | ||
165 | if (periodic) | |
166 | tcon |= TCON_AUTORELOAD(channel); | |
167 | else | |
168 | tcon &= ~TCON_AUTORELOAD(channel); | |
169 | ||
170 | __raw_writel(tcon, pwm->base + REG_TCON); | |
171 | ||
7aac482e | 172 | spin_unlock_irqrestore(&samsung_pwm_lock, flags); |
f1189989 TF |
173 | } |
174 | ||
175 | static int samsung_set_next_event(unsigned long cycles, | |
176 | struct clock_event_device *evt) | |
177 | { | |
178 | samsung_time_setup(timer_source.event_id, cycles); | |
179 | samsung_time_start(timer_source.event_id, false); | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
184 | static void samsung_timer_resume(void) | |
185 | { | |
186 | /* event timer restart */ | |
187 | samsung_time_setup(timer_source.event_id, clock_count_per_tick); | |
188 | samsung_time_start(timer_source.event_id, true); | |
189 | ||
190 | /* source timer restart */ | |
191 | samsung_time_setup(timer_source.source_id, timer_source.tcnt_max); | |
192 | samsung_time_start(timer_source.source_id, true); | |
193 | } | |
194 | ||
195 | static void samsung_set_mode(enum clock_event_mode mode, | |
196 | struct clock_event_device *evt) | |
197 | { | |
198 | samsung_time_stop(timer_source.event_id); | |
199 | ||
200 | switch (mode) { | |
201 | case CLOCK_EVT_MODE_PERIODIC: | |
202 | samsung_time_setup(timer_source.event_id, clock_count_per_tick); | |
203 | samsung_time_start(timer_source.event_id, true); | |
204 | break; | |
205 | ||
206 | case CLOCK_EVT_MODE_ONESHOT: | |
207 | break; | |
208 | ||
209 | case CLOCK_EVT_MODE_UNUSED: | |
210 | case CLOCK_EVT_MODE_SHUTDOWN: | |
211 | break; | |
212 | ||
213 | case CLOCK_EVT_MODE_RESUME: | |
214 | samsung_timer_resume(); | |
215 | break; | |
216 | } | |
217 | } | |
218 | ||
219 | static struct clock_event_device time_event_device = { | |
220 | .name = "samsung_event_timer", | |
221 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | |
222 | .rating = 200, | |
223 | .set_next_event = samsung_set_next_event, | |
224 | .set_mode = samsung_set_mode, | |
225 | }; | |
226 | ||
227 | static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id) | |
228 | { | |
229 | struct clock_event_device *evt = dev_id; | |
230 | ||
231 | if (pwm->variant.has_tint_cstat) { | |
232 | u32 mask = (1 << timer_source.event_id); | |
233 | writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT); | |
234 | } | |
235 | ||
236 | evt->event_handler(evt); | |
237 | ||
238 | return IRQ_HANDLED; | |
239 | } | |
240 | ||
241 | static struct irqaction samsung_clock_event_irq = { | |
242 | .name = "samsung_time_irq", | |
243 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | |
244 | .handler = samsung_clock_event_isr, | |
245 | .dev_id = &time_event_device, | |
246 | }; | |
247 | ||
248 | static void __init samsung_clockevent_init(void) | |
249 | { | |
250 | unsigned long pclk; | |
251 | unsigned long clock_rate; | |
252 | unsigned int irq_number; | |
253 | ||
254 | pclk = clk_get_rate(timerclk); | |
255 | ||
256 | samsung_timer_set_prescale(pwm, timer_source.event_id, | |
257 | timer_source.tscaler_div); | |
258 | samsung_timer_set_divisor(pwm, timer_source.event_id, | |
259 | timer_source.tdiv); | |
260 | ||
261 | clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv); | |
262 | clock_count_per_tick = clock_rate / HZ; | |
263 | ||
264 | time_event_device.cpumask = cpumask_of(0); | |
265 | clockevents_config_and_register(&time_event_device, clock_rate, 1, -1); | |
266 | ||
267 | irq_number = pwm->irq[timer_source.event_id]; | |
268 | setup_irq(irq_number, &samsung_clock_event_irq); | |
269 | ||
270 | if (pwm->variant.has_tint_cstat) { | |
271 | u32 mask = (1 << timer_source.event_id); | |
272 | writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT); | |
273 | } | |
274 | } | |
275 | ||
276 | static void __iomem *samsung_timer_reg(void) | |
277 | { | |
278 | switch (timer_source.source_id) { | |
279 | case 0: | |
280 | case 1: | |
281 | case 2: | |
282 | case 3: | |
283 | return pwm->base + timer_source.source_id * 0x0c + 0x14; | |
284 | ||
285 | case 4: | |
286 | return pwm->base + 0x40; | |
287 | ||
288 | default: | |
289 | BUG(); | |
290 | } | |
291 | } | |
292 | ||
293 | /* | |
294 | * Override the global weak sched_clock symbol with this | |
295 | * local implementation which uses the clocksource to get some | |
296 | * better resolution when scheduling the kernel. We accept that | |
297 | * this wraps around for now, since it is just a relative time | |
298 | * stamp. (Inspired by U300 implementation.) | |
299 | */ | |
300 | static u32 notrace samsung_read_sched_clock(void) | |
301 | { | |
302 | void __iomem *reg = samsung_timer_reg(); | |
303 | ||
304 | if (!reg) | |
305 | return 0; | |
306 | ||
307 | return ~__raw_readl(reg); | |
308 | } | |
309 | ||
310 | static void __init samsung_clocksource_init(void) | |
311 | { | |
312 | void __iomem *reg = samsung_timer_reg(); | |
313 | unsigned long pclk; | |
314 | unsigned long clock_rate; | |
315 | int ret; | |
316 | ||
317 | pclk = clk_get_rate(timerclk); | |
318 | ||
319 | samsung_timer_set_prescale(pwm, timer_source.source_id, | |
320 | timer_source.tscaler_div); | |
321 | samsung_timer_set_divisor(pwm, timer_source.source_id, | |
322 | timer_source.tdiv); | |
323 | ||
324 | clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv); | |
325 | ||
326 | samsung_time_setup(timer_source.source_id, timer_source.tcnt_max); | |
327 | samsung_time_start(timer_source.source_id, true); | |
328 | ||
329 | setup_sched_clock(samsung_read_sched_clock, | |
330 | pwm->variant.bits, clock_rate); | |
331 | ||
332 | ret = clocksource_mmio_init(reg, "samsung_clocksource_timer", | |
333 | clock_rate, 250, pwm->variant.bits, | |
334 | clocksource_mmio_readl_down); | |
335 | if (ret) | |
336 | panic("samsung_clocksource_timer: can't register clocksource\n"); | |
337 | } | |
338 | ||
339 | static void __init samsung_timer_resources(void) | |
340 | { | |
341 | timerclk = clk_get(NULL, "timers"); | |
342 | if (IS_ERR(timerclk)) | |
343 | panic("failed to get timers clock for timer"); | |
344 | ||
345 | clk_prepare_enable(timerclk); | |
346 | ||
347 | timer_source.tcnt_max = (1UL << pwm->variant.bits) - 1; | |
348 | if (pwm->variant.bits == 16) { | |
349 | timer_source.tscaler_div = 25; | |
350 | timer_source.tdiv = 2; | |
351 | } else { | |
352 | timer_source.tscaler_div = 2; | |
353 | timer_source.tdiv = 1; | |
354 | } | |
355 | } | |
356 | ||
357 | /* | |
358 | * PWM master driver | |
359 | */ | |
360 | static void __init samsung_pwm_clocksource_init(void) | |
361 | { | |
362 | u8 mask; | |
363 | int channel; | |
364 | ||
365 | if (!pwm) | |
366 | panic("no pwm clocksource device found"); | |
367 | ||
368 | mask = ~pwm->variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1); | |
369 | channel = fls(mask) - 1; | |
370 | if (channel < 0) | |
371 | panic("failed to find PWM channel for clocksource"); | |
372 | timer_source.source_id = channel; | |
373 | ||
374 | mask &= ~(1 << channel); | |
375 | channel = fls(mask) - 1; | |
376 | if (channel < 0) | |
377 | panic("failed to find PWM channel for clock event"); | |
378 | timer_source.event_id = channel; | |
379 | ||
380 | samsung_timer_resources(); | |
381 | samsung_clockevent_init(); | |
382 | samsung_clocksource_init(); | |
383 | } | |
384 | ||
385 | static void __init samsung_pwm_alloc(struct device_node *np, | |
386 | const struct samsung_pwm_variant *variant) | |
387 | { | |
388 | struct resource res; | |
389 | struct property *prop; | |
390 | const __be32 *cur; | |
391 | u32 val; | |
392 | int i; | |
393 | ||
394 | pwm = kzalloc(sizeof(*pwm), GFP_KERNEL); | |
395 | if (!pwm) { | |
396 | pr_err("%s: could not allocate PWM device struct\n", __func__); | |
397 | return; | |
398 | } | |
399 | memcpy(&pwm->variant, variant, sizeof(pwm->variant)); | |
f1189989 TF |
400 | for (i = 0; i < SAMSUNG_PWM_NUM; ++i) |
401 | pwm->irq[i] = irq_of_parse_and_map(np, i); | |
402 | ||
403 | of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) { | |
404 | if (val >= SAMSUNG_PWM_NUM) { | |
405 | pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n", | |
406 | __func__); | |
407 | continue; | |
408 | } | |
409 | pwm->variant.output_mask |= 1 << val; | |
410 | } | |
411 | ||
412 | of_address_to_resource(np, 0, &res); | |
413 | if (!request_mem_region(res.start, | |
414 | resource_size(&res), "samsung-pwm")) { | |
415 | pr_err("%s: failed to request IO mem region\n", __func__); | |
416 | return; | |
417 | } | |
418 | ||
419 | pwm->base = ioremap(res.start, resource_size(&res)); | |
420 | if (!pwm->base) { | |
421 | pr_err("%s: failed to map PWM registers\n", __func__); | |
422 | release_mem_region(res.start, resource_size(&res)); | |
423 | return; | |
424 | } | |
425 | ||
426 | samsung_pwm_clocksource_init(); | |
427 | } | |
428 | ||
429 | static const struct samsung_pwm_variant s3c24xx_variant = { | |
430 | .bits = 16, | |
431 | .div_base = 1, | |
432 | .has_tint_cstat = false, | |
433 | .tclk_mask = (1 << 4), | |
434 | }; | |
435 | ||
436 | static void __init s3c2410_pwm_clocksource_init(struct device_node *np) | |
437 | { | |
438 | samsung_pwm_alloc(np, &s3c24xx_variant); | |
439 | } | |
440 | CLOCKSOURCE_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init); | |
441 | ||
442 | static const struct samsung_pwm_variant s3c64xx_variant = { | |
443 | .bits = 32, | |
444 | .div_base = 0, | |
445 | .has_tint_cstat = true, | |
446 | .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5), | |
447 | }; | |
448 | ||
449 | static void __init s3c64xx_pwm_clocksource_init(struct device_node *np) | |
450 | { | |
451 | samsung_pwm_alloc(np, &s3c64xx_variant); | |
452 | } | |
453 | CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init); | |
454 | ||
455 | static const struct samsung_pwm_variant s5p64x0_variant = { | |
456 | .bits = 32, | |
457 | .div_base = 0, | |
458 | .has_tint_cstat = true, | |
459 | .tclk_mask = 0, | |
460 | }; | |
461 | ||
462 | static void __init s5p64x0_pwm_clocksource_init(struct device_node *np) | |
463 | { | |
464 | samsung_pwm_alloc(np, &s5p64x0_variant); | |
465 | } | |
466 | CLOCKSOURCE_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init); | |
467 | ||
468 | static const struct samsung_pwm_variant s5p_variant = { | |
469 | .bits = 32, | |
470 | .div_base = 0, | |
471 | .has_tint_cstat = true, | |
472 | .tclk_mask = (1 << 5), | |
473 | }; | |
474 | ||
475 | static void __init s5p_pwm_clocksource_init(struct device_node *np) | |
476 | { | |
477 | samsung_pwm_alloc(np, &s5p_variant); | |
478 | } | |
479 | CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init); |