[deliverable/linux.git] / drivers / clocksource / zevio-timer.c

/*
 *  linux/drivers/clocksource/zevio-timer.c
 *
 *  Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2, as
 * published by the Free Software Foundation.
 *
 */

#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/cpumask.h>
#include <linux/interrupt.h>
#include <linux/slab.h>

#define IO_CURRENT_VAL	0x00
#define IO_DIVIDER	0x04
#define IO_CONTROL	0x08

#define IO_TIMER1	0x00
#define IO_TIMER2	0x0C

#define IO_MATCH_BEGIN	0x18
#define IO_MATCH(x)	(IO_MATCH_BEGIN + ((x) << 2))

#define IO_INTR_STS	0x00
#define IO_INTR_ACK	0x00
#define IO_INTR_MSK	0x04

#define CNTL_STOP_TIMER	(1 << 4)
#define CNTL_RUN_TIMER	(0 << 4)

#define CNTL_INC	(1 << 3)
#define CNTL_DEC	(0 << 3)

#define CNTL_TOZERO	0
#define CNTL_MATCH(x)	((x) + 1)
#define CNTL_FOREVER	7

/* There are 6 match registers but we only use one. */
#define TIMER_MATCH	0

#define TIMER_INTR_MSK	(1 << (TIMER_MATCH))
#define TIMER_INTR_ALL	0x3F

struct zevio_timer {
	void __iomem *base;
	void __iomem *timer1, *timer2;
	void __iomem *interrupt_regs;

	struct clk *clk;
	struct clock_event_device clkevt;
	struct irqaction clkevt_irq;

	char clocksource_name[64];
	char clockevent_name[64];
};

static int zevio_timer_set_event(unsigned long delta,
				 struct clock_event_device *dev)
{
	struct zevio_timer *timer = container_of(dev, struct zevio_timer,
						 clkevt);

	writel(delta, timer->timer1 + IO_CURRENT_VAL);
	writel(CNTL_RUN_TIMER | CNTL_DEC | CNTL_MATCH(TIMER_MATCH),
			timer->timer1 + IO_CONTROL);

	return 0;
}

static void zevio_timer_set_mode(enum clock_event_mode mode,
				 struct clock_event_device *dev)
{
	struct zevio_timer *timer = container_of(dev, struct zevio_timer,
						 clkevt);

	switch (mode) {
	case CLOCK_EVT_MODE_RESUME:
	case CLOCK_EVT_MODE_ONESHOT:
		/* Enable timer interrupts */
		writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_MSK);
		writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
		break;
	case CLOCK_EVT_MODE_SHUTDOWN:
	case CLOCK_EVT_MODE_UNUSED:
		/* Disable timer interrupts */
		writel(0, timer->interrupt_regs + IO_INTR_MSK);
		writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
		/* Stop timer */
		writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
		break;
	case CLOCK_EVT_MODE_PERIODIC:
	default:
		/* Unsupported */
		break;
	}
}

static irqreturn_t zevio_timer_interrupt(int irq, void *dev_id)
{
	struct zevio_timer *timer = dev_id;
	u32 intr;

	intr = readl(timer->interrupt_regs + IO_INTR_ACK);
	if (!(intr & TIMER_INTR_MSK))
		return IRQ_NONE;

	writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_ACK);
	writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);

	if (timer->clkevt.event_handler)
		timer->clkevt.event_handler(&timer->clkevt);

	return IRQ_HANDLED;
}

static int __init zevio_timer_add(struct device_node *node)
{
	struct zevio_timer *timer;
	struct resource res;
	int irqnr, ret;

	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
	if (!timer)
		return -ENOMEM;

	timer->base = of_iomap(node, 0);
	if (!timer->base) {
		ret = -EINVAL;
		goto error_free;
	}
	timer->timer1 = timer->base + IO_TIMER1;
	timer->timer2 = timer->base + IO_TIMER2;

	timer->clk = of_clk_get(node, 0);
	if (IS_ERR(timer->clk)) {
		ret = PTR_ERR(timer->clk);
		pr_err("Timer clock not found! (error %d)\n", ret);
		goto error_unmap;
	}

	timer->interrupt_regs = of_iomap(node, 1);
	irqnr = irq_of_parse_and_map(node, 0);

	of_address_to_resource(node, 0, &res);
	scnprintf(timer->clocksource_name, sizeof(timer->clocksource_name),
			"%llx.%s_clocksource",
			(unsigned long long)res.start, node->name);

	scnprintf(timer->clockevent_name, sizeof(timer->clockevent_name),
			"%llx.%s_clockevent",
			(unsigned long long)res.start, node->name);

	if (timer->interrupt_regs && irqnr) {
		timer->clkevt.name		= timer->clockevent_name;
		timer->clkevt.set_next_event	= zevio_timer_set_event;
		timer->clkevt.set_mode		= zevio_timer_set_mode;
		timer->clkevt.rating		= 200;
		timer->clkevt.cpumask		= cpu_all_mask;
		timer->clkevt.features		= CLOCK_EVT_FEAT_ONESHOT;
		timer->clkevt.irq		= irqnr;

		writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
		writel(0, timer->timer1 + IO_DIVIDER);

		/* Start with timer interrupts disabled */
		writel(0, timer->interrupt_regs + IO_INTR_MSK);
		writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);

		/* Interrupt to occur when timer value matches 0 */
		writel(0, timer->base + IO_MATCH(TIMER_MATCH));

		timer->clkevt_irq.name		= timer->clockevent_name;
		timer->clkevt_irq.handler	= zevio_timer_interrupt;
		timer->clkevt_irq.dev_id	= timer;
		timer->clkevt_irq.flags		= IRQF_TIMER | IRQF_IRQPOLL;

		setup_irq(irqnr, &timer->clkevt_irq);

		clockevents_config_and_register(&timer->clkevt,
				clk_get_rate(timer->clk), 0x0001, 0xffff);
		pr_info("Added %s as clockevent\n", timer->clockevent_name);
	}

	writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL);
	writel(0, timer->timer2 + IO_CURRENT_VAL);
	writel(0, timer->timer2 + IO_DIVIDER);
	writel(CNTL_RUN_TIMER | CNTL_FOREVER | CNTL_INC,
			timer->timer2 + IO_CONTROL);

	clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL,
			timer->clocksource_name,
			clk_get_rate(timer->clk),
			200, 16,
			clocksource_mmio_readw_up);

	pr_info("Added %s as clocksource\n", timer->clocksource_name);

	return 0;
error_unmap:
	iounmap(timer->base);
error_free:
	kfree(timer);
	return ret;
}

static void __init zevio_timer_init(struct device_node *node)
{
	BUG_ON(zevio_timer_add(node));
}

CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);
Commit	Line	Data
77ba83bb DT	1	/*
	2	* linux/drivers/clocksource/zevio-timer.c
	3	*
	4	* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2, as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11
	12	#include <linux/io.h>
	13	#include <linux/irq.h>
	14	#include <linux/of.h>
	15	#include <linux/of_address.h>
	16	#include <linux/of_irq.h>
	17	#include <linux/clk.h>
	18	#include <linux/clockchips.h>
	19	#include <linux/cpumask.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/slab.h>
	22
	23	#define IO_CURRENT_VAL 0x00
	24	#define IO_DIVIDER 0x04
	25	#define IO_CONTROL 0x08
	26
	27	#define IO_TIMER1 0x00
	28	#define IO_TIMER2 0x0C
	29
	30	#define IO_MATCH_BEGIN 0x18
	31	#define IO_MATCH(x) (IO_MATCH_BEGIN + ((x) << 2))
	32
	33	#define IO_INTR_STS 0x00
	34	#define IO_INTR_ACK 0x00
	35	#define IO_INTR_MSK 0x04
	36
	37	#define CNTL_STOP_TIMER (1 << 4)
	38	#define CNTL_RUN_TIMER (0 << 4)
	39
	40	#define CNTL_INC (1 << 3)
	41	#define CNTL_DEC (0 << 3)
	42
	43	#define CNTL_TOZERO 0
	44	#define CNTL_MATCH(x) ((x) + 1)
	45	#define CNTL_FOREVER 7
	46
	47	/* There are 6 match registers but we only use one. */
	48	#define TIMER_MATCH 0
	49
	50	#define TIMER_INTR_MSK (1 << (TIMER_MATCH))
	51	#define TIMER_INTR_ALL 0x3F
	52
	53	struct zevio_timer {
	54	void __iomem *base;
	55	void __iomem timer1, timer2;
	56	void __iomem *interrupt_regs;
	57
	58	struct clk *clk;
	59	struct clock_event_device clkevt;
	60	struct irqaction clkevt_irq;
	61
	62	char clocksource_name[64];
	63	char clockevent_name[64];
	64	};
65
66	static int zevio_timer_set_event(unsigned long delta,
67	struct clock_event_device *dev)
68	{
69	struct zevio_timer *timer = container_of(dev, struct zevio_timer,
70	clkevt);
71
72	writel(delta, timer->timer1 + IO_CURRENT_VAL);
73	writel(CNTL_RUN_TIMER \| CNTL_DEC \| CNTL_MATCH(TIMER_MATCH),
74	timer->timer1 + IO_CONTROL);
75
76	return 0;
77	}
78
79	static void zevio_timer_set_mode(enum clock_event_mode mode,
80	struct clock_event_device *dev)
81	{
82	struct zevio_timer *timer = container_of(dev, struct zevio_timer,
83	clkevt);
84
85	switch (mode) {
86	case CLOCK_EVT_MODE_RESUME:
87	case CLOCK_EVT_MODE_ONESHOT:
88	/* Enable timer interrupts */
89	writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_MSK);
90	writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
91	break;
92	case CLOCK_EVT_MODE_SHUTDOWN:
93	case CLOCK_EVT_MODE_UNUSED:
94	/* Disable timer interrupts */
95	writel(0, timer->interrupt_regs + IO_INTR_MSK);
96	writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
97	/* Stop timer */
98	writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
99	break;
100	case CLOCK_EVT_MODE_PERIODIC:
101	default:
102	/* Unsupported */
103	break;
104	}
105	}
106
107	static irqreturn_t zevio_timer_interrupt(int irq, void *dev_id)
108	{
109	struct zevio_timer *timer = dev_id;
110	u32 intr;
111
112	intr = readl(timer->interrupt_regs + IO_INTR_ACK);
113	if (!(intr & TIMER_INTR_MSK))
114	return IRQ_NONE;
115
116	writel(TIMER_INTR_MSK, timer->interrupt_regs + IO_INTR_ACK);
117	writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
118
119	if (timer->clkevt.event_handler)
120	timer->clkevt.event_handler(&timer->clkevt);
121
122	return IRQ_HANDLED;
123	}
124
125	static int __init zevio_timer_add(struct device_node *node)
126	{
127	struct zevio_timer *timer;
128	struct resource res;
129	int irqnr, ret;
130
131	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
132	if (!timer)
133	return -ENOMEM;
134
135	timer->base = of_iomap(node, 0);
136	if (!timer->base) {
137	ret = -EINVAL;
138	goto error_free;
139	}
140	timer->timer1 = timer->base + IO_TIMER1;
141	timer->timer2 = timer->base + IO_TIMER2;
142
143	timer->clk = of_clk_get(node, 0);
144	if (IS_ERR(timer->clk)) {
145	ret = PTR_ERR(timer->clk);
146	pr_err("Timer clock not found! (error %d)\n", ret);
147	goto error_unmap;
148	}
149
150	timer->interrupt_regs = of_iomap(node, 1);
151	irqnr = irq_of_parse_and_map(node, 0);
152
153	of_address_to_resource(node, 0, &res);
154	scnprintf(timer->clocksource_name, sizeof(timer->clocksource_name),
155	"%llx.%s_clocksource",
156	(unsigned long long)res.start, node->name);
157
158	scnprintf(timer->clockevent_name, sizeof(timer->clockevent_name),
159	"%llx.%s_clockevent",
160	(unsigned long long)res.start, node->name);
161
162	if (timer->interrupt_regs && irqnr) {
163	timer->clkevt.name = timer->clockevent_name;
164	timer->clkevt.set_next_event = zevio_timer_set_event;
165	timer->clkevt.set_mode = zevio_timer_set_mode;
166	timer->clkevt.rating = 200;
167	timer->clkevt.cpumask = cpu_all_mask;
168	timer->clkevt.features = CLOCK_EVT_FEAT_ONESHOT;
169	timer->clkevt.irq = irqnr;
170
171	writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL);
172	writel(0, timer->timer1 + IO_DIVIDER);
173
174	/* Start with timer interrupts disabled */
175	writel(0, timer->interrupt_regs + IO_INTR_MSK);
176	writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK);
177
178	/* Interrupt to occur when timer value matches 0 */
179	writel(0, timer->base + IO_MATCH(TIMER_MATCH));
180
181	timer->clkevt_irq.name = timer->clockevent_name;
182	timer->clkevt_irq.handler = zevio_timer_interrupt;
183	timer->clkevt_irq.dev_id = timer;
184	timer->clkevt_irq.flags = IRQF_TIMER \| IRQF_IRQPOLL;
185
186	setup_irq(irqnr, &timer->clkevt_irq);
187
188	clockevents_config_and_register(&timer->clkevt,
189	clk_get_rate(timer->clk), 0x0001, 0xffff);
190	pr_info("Added %s as clockevent\n", timer->clockevent_name);
191	}
192
193	writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL);
194	writel(0, timer->timer2 + IO_CURRENT_VAL);
195	writel(0, timer->timer2 + IO_DIVIDER);
196	writel(CNTL_RUN_TIMER \| CNTL_FOREVER \| CNTL_INC,
197	timer->timer2 + IO_CONTROL);
198
199	clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL,
200	timer->clocksource_name,
201	clk_get_rate(timer->clk),
202	200, 16,
203	clocksource_mmio_readw_up);
204
205	pr_info("Added %s as clocksource\n", timer->clocksource_name);
206
207	return 0;
208	error_unmap:
209	iounmap(timer->base);
210	error_free:
211	kfree(timer);
212	return ret;
213	}
214
9afa27ce AS	215	static void __init zevio_timer_init(struct device_node *node)
	216	{
	217	BUG_ON(zevio_timer_add(node));
	218	}
	219
	220	CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init);