Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
3a58df35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
8adcc0c6 | 35 | #include <linux/dmi.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
1da177e4 LT |
37 | |
38 | #include <linux/acpi.h> | |
3a58df35 DJ |
39 | #include <linux/io.h> |
40 | #include <linux/delay.h> | |
41 | #include <linux/uaccess.h> | |
42 | ||
1da177e4 LT |
43 | #include <acpi/processor.h> |
44 | ||
dde9f7ba | 45 | #include <asm/msr.h> |
fe27cb35 VP |
46 | #include <asm/processor.h> |
47 | #include <asm/cpufeature.h> | |
a2fed573 | 48 | #include "mperf.h" |
fe27cb35 | 49 | |
1da177e4 LT |
50 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); |
51 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
52 | MODULE_LICENSE("GPL"); | |
53 | ||
dde9f7ba VP |
54 | enum { |
55 | UNDEFINED_CAPABLE = 0, | |
56 | SYSTEM_INTEL_MSR_CAPABLE, | |
57 | SYSTEM_IO_CAPABLE, | |
58 | }; | |
59 | ||
60 | #define INTEL_MSR_RANGE (0xffff) | |
61 | ||
fe27cb35 | 62 | struct acpi_cpufreq_data { |
64be7eed VP |
63 | struct acpi_processor_performance *acpi_data; |
64 | struct cpufreq_frequency_table *freq_table; | |
65 | unsigned int resume; | |
66 | unsigned int cpu_feature; | |
1da177e4 LT |
67 | }; |
68 | ||
f1625066 | 69 | static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data); |
ea348f3e | 70 | |
50109292 | 71 | /* acpi_perf_data is a pointer to percpu data. */ |
3f6c4df7 | 72 | static struct acpi_processor_performance __percpu *acpi_perf_data; |
1da177e4 LT |
73 | |
74 | static struct cpufreq_driver acpi_cpufreq_driver; | |
75 | ||
d395bf12 VP |
76 | static unsigned int acpi_pstate_strict; |
77 | ||
dde9f7ba VP |
78 | static int check_est_cpu(unsigned int cpuid) |
79 | { | |
92cb7612 | 80 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); |
dde9f7ba | 81 | |
0de51088 | 82 | return cpu_has(cpu, X86_FEATURE_EST); |
dde9f7ba VP |
83 | } |
84 | ||
dde9f7ba | 85 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
fe27cb35 | 86 | { |
64be7eed VP |
87 | struct acpi_processor_performance *perf; |
88 | int i; | |
fe27cb35 VP |
89 | |
90 | perf = data->acpi_data; | |
91 | ||
3a58df35 | 92 | for (i = 0; i < perf->state_count; i++) { |
fe27cb35 VP |
93 | if (value == perf->states[i].status) |
94 | return data->freq_table[i].frequency; | |
95 | } | |
96 | return 0; | |
97 | } | |
98 | ||
dde9f7ba VP |
99 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
100 | { | |
101 | int i; | |
a6f6e6e6 | 102 | struct acpi_processor_performance *perf; |
dde9f7ba VP |
103 | |
104 | msr &= INTEL_MSR_RANGE; | |
a6f6e6e6 VP |
105 | perf = data->acpi_data; |
106 | ||
3a58df35 | 107 | for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { |
a6f6e6e6 | 108 | if (msr == perf->states[data->freq_table[i].index].status) |
dde9f7ba VP |
109 | return data->freq_table[i].frequency; |
110 | } | |
111 | return data->freq_table[0].frequency; | |
112 | } | |
113 | ||
dde9f7ba VP |
114 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) |
115 | { | |
116 | switch (data->cpu_feature) { | |
64be7eed | 117 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba | 118 | return extract_msr(val, data); |
64be7eed | 119 | case SYSTEM_IO_CAPABLE: |
dde9f7ba | 120 | return extract_io(val, data); |
64be7eed | 121 | default: |
dde9f7ba VP |
122 | return 0; |
123 | } | |
124 | } | |
125 | ||
dde9f7ba VP |
126 | struct msr_addr { |
127 | u32 reg; | |
128 | }; | |
129 | ||
fe27cb35 VP |
130 | struct io_addr { |
131 | u16 port; | |
132 | u8 bit_width; | |
133 | }; | |
134 | ||
135 | struct drv_cmd { | |
dde9f7ba | 136 | unsigned int type; |
bfa318ad | 137 | const struct cpumask *mask; |
3a58df35 DJ |
138 | union { |
139 | struct msr_addr msr; | |
140 | struct io_addr io; | |
141 | } addr; | |
fe27cb35 VP |
142 | u32 val; |
143 | }; | |
144 | ||
01599fca AM |
145 | /* Called via smp_call_function_single(), on the target CPU */ |
146 | static void do_drv_read(void *_cmd) | |
1da177e4 | 147 | { |
72859081 | 148 | struct drv_cmd *cmd = _cmd; |
dde9f7ba VP |
149 | u32 h; |
150 | ||
151 | switch (cmd->type) { | |
64be7eed | 152 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
153 | rdmsr(cmd->addr.msr.reg, cmd->val, h); |
154 | break; | |
64be7eed | 155 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
156 | acpi_os_read_port((acpi_io_address)cmd->addr.io.port, |
157 | &cmd->val, | |
158 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 159 | break; |
64be7eed | 160 | default: |
dde9f7ba VP |
161 | break; |
162 | } | |
fe27cb35 | 163 | } |
1da177e4 | 164 | |
01599fca AM |
165 | /* Called via smp_call_function_many(), on the target CPUs */ |
166 | static void do_drv_write(void *_cmd) | |
fe27cb35 | 167 | { |
72859081 | 168 | struct drv_cmd *cmd = _cmd; |
13424f65 | 169 | u32 lo, hi; |
dde9f7ba VP |
170 | |
171 | switch (cmd->type) { | |
64be7eed | 172 | case SYSTEM_INTEL_MSR_CAPABLE: |
13424f65 VP |
173 | rdmsr(cmd->addr.msr.reg, lo, hi); |
174 | lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE); | |
175 | wrmsr(cmd->addr.msr.reg, lo, hi); | |
dde9f7ba | 176 | break; |
64be7eed | 177 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
178 | acpi_os_write_port((acpi_io_address)cmd->addr.io.port, |
179 | cmd->val, | |
180 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 181 | break; |
64be7eed | 182 | default: |
dde9f7ba VP |
183 | break; |
184 | } | |
fe27cb35 | 185 | } |
1da177e4 | 186 | |
95dd7227 | 187 | static void drv_read(struct drv_cmd *cmd) |
fe27cb35 | 188 | { |
4a28395d | 189 | int err; |
fe27cb35 VP |
190 | cmd->val = 0; |
191 | ||
4a28395d AM |
192 | err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1); |
193 | WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ | |
fe27cb35 VP |
194 | } |
195 | ||
196 | static void drv_write(struct drv_cmd *cmd) | |
197 | { | |
ea34f43a LT |
198 | int this_cpu; |
199 | ||
200 | this_cpu = get_cpu(); | |
201 | if (cpumask_test_cpu(this_cpu, cmd->mask)) | |
202 | do_drv_write(cmd); | |
01599fca | 203 | smp_call_function_many(cmd->mask, do_drv_write, cmd, 1); |
ea34f43a | 204 | put_cpu(); |
fe27cb35 | 205 | } |
1da177e4 | 206 | |
4d8bb537 | 207 | static u32 get_cur_val(const struct cpumask *mask) |
fe27cb35 | 208 | { |
64be7eed VP |
209 | struct acpi_processor_performance *perf; |
210 | struct drv_cmd cmd; | |
1da177e4 | 211 | |
4d8bb537 | 212 | if (unlikely(cpumask_empty(mask))) |
fe27cb35 | 213 | return 0; |
1da177e4 | 214 | |
f1625066 | 215 | switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) { |
dde9f7ba VP |
216 | case SYSTEM_INTEL_MSR_CAPABLE: |
217 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
218 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
219 | break; | |
220 | case SYSTEM_IO_CAPABLE: | |
221 | cmd.type = SYSTEM_IO_CAPABLE; | |
f1625066 | 222 | perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data; |
dde9f7ba VP |
223 | cmd.addr.io.port = perf->control_register.address; |
224 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
225 | break; | |
226 | default: | |
227 | return 0; | |
228 | } | |
229 | ||
bfa318ad | 230 | cmd.mask = mask; |
fe27cb35 | 231 | drv_read(&cmd); |
1da177e4 | 232 | |
2d06d8c4 | 233 | pr_debug("get_cur_val = %u\n", cmd.val); |
fe27cb35 VP |
234 | |
235 | return cmd.val; | |
236 | } | |
1da177e4 | 237 | |
fe27cb35 VP |
238 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
239 | { | |
f1625066 | 240 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu); |
64be7eed | 241 | unsigned int freq; |
e56a727b | 242 | unsigned int cached_freq; |
fe27cb35 | 243 | |
2d06d8c4 | 244 | pr_debug("get_cur_freq_on_cpu (%d)\n", cpu); |
fe27cb35 VP |
245 | |
246 | if (unlikely(data == NULL || | |
64be7eed | 247 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 | 248 | return 0; |
1da177e4 LT |
249 | } |
250 | ||
e56a727b | 251 | cached_freq = data->freq_table[data->acpi_data->state].frequency; |
e39ad415 | 252 | freq = extract_freq(get_cur_val(cpumask_of(cpu)), data); |
e56a727b VP |
253 | if (freq != cached_freq) { |
254 | /* | |
255 | * The dreaded BIOS frequency change behind our back. | |
256 | * Force set the frequency on next target call. | |
257 | */ | |
258 | data->resume = 1; | |
259 | } | |
260 | ||
2d06d8c4 | 261 | pr_debug("cur freq = %u\n", freq); |
1da177e4 | 262 | |
fe27cb35 | 263 | return freq; |
1da177e4 LT |
264 | } |
265 | ||
72859081 | 266 | static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq, |
64be7eed | 267 | struct acpi_cpufreq_data *data) |
fe27cb35 | 268 | { |
64be7eed VP |
269 | unsigned int cur_freq; |
270 | unsigned int i; | |
1da177e4 | 271 | |
3a58df35 | 272 | for (i = 0; i < 100; i++) { |
fe27cb35 VP |
273 | cur_freq = extract_freq(get_cur_val(mask), data); |
274 | if (cur_freq == freq) | |
275 | return 1; | |
276 | udelay(10); | |
277 | } | |
278 | return 0; | |
279 | } | |
280 | ||
281 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
64be7eed | 282 | unsigned int target_freq, unsigned int relation) |
1da177e4 | 283 | { |
f1625066 | 284 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
64be7eed VP |
285 | struct acpi_processor_performance *perf; |
286 | struct cpufreq_freqs freqs; | |
64be7eed | 287 | struct drv_cmd cmd; |
8edc59d9 VP |
288 | unsigned int next_state = 0; /* Index into freq_table */ |
289 | unsigned int next_perf_state = 0; /* Index into perf table */ | |
64be7eed VP |
290 | unsigned int i; |
291 | int result = 0; | |
fe27cb35 | 292 | |
2d06d8c4 | 293 | pr_debug("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); |
fe27cb35 VP |
294 | |
295 | if (unlikely(data == NULL || | |
95dd7227 | 296 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 VP |
297 | return -ENODEV; |
298 | } | |
1da177e4 | 299 | |
fe27cb35 | 300 | perf = data->acpi_data; |
1da177e4 | 301 | result = cpufreq_frequency_table_target(policy, |
64be7eed VP |
302 | data->freq_table, |
303 | target_freq, | |
304 | relation, &next_state); | |
4d8bb537 MT |
305 | if (unlikely(result)) { |
306 | result = -ENODEV; | |
307 | goto out; | |
308 | } | |
1da177e4 | 309 | |
fe27cb35 | 310 | next_perf_state = data->freq_table[next_state].index; |
7650b281 | 311 | if (perf->state == next_perf_state) { |
fe27cb35 | 312 | if (unlikely(data->resume)) { |
2d06d8c4 | 313 | pr_debug("Called after resume, resetting to P%d\n", |
64be7eed | 314 | next_perf_state); |
fe27cb35 VP |
315 | data->resume = 0; |
316 | } else { | |
2d06d8c4 | 317 | pr_debug("Already at target state (P%d)\n", |
64be7eed | 318 | next_perf_state); |
4d8bb537 | 319 | goto out; |
fe27cb35 | 320 | } |
09b4d1ee VP |
321 | } |
322 | ||
64be7eed VP |
323 | switch (data->cpu_feature) { |
324 | case SYSTEM_INTEL_MSR_CAPABLE: | |
325 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
326 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
13424f65 | 327 | cmd.val = (u32) perf->states[next_perf_state].control; |
64be7eed VP |
328 | break; |
329 | case SYSTEM_IO_CAPABLE: | |
330 | cmd.type = SYSTEM_IO_CAPABLE; | |
331 | cmd.addr.io.port = perf->control_register.address; | |
332 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
333 | cmd.val = (u32) perf->states[next_perf_state].control; | |
334 | break; | |
335 | default: | |
4d8bb537 MT |
336 | result = -ENODEV; |
337 | goto out; | |
64be7eed | 338 | } |
09b4d1ee | 339 | |
4d8bb537 | 340 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
fe27cb35 | 341 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
bfa318ad | 342 | cmd.mask = policy->cpus; |
fe27cb35 | 343 | else |
bfa318ad | 344 | cmd.mask = cpumask_of(policy->cpu); |
09b4d1ee | 345 | |
8edc59d9 VP |
346 | freqs.old = perf->states[perf->state].core_frequency * 1000; |
347 | freqs.new = data->freq_table[next_state].frequency; | |
6b72e393 | 348 | for_each_cpu(i, policy->cpus) { |
fe27cb35 VP |
349 | freqs.cpu = i; |
350 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 351 | } |
1da177e4 | 352 | |
fe27cb35 | 353 | drv_write(&cmd); |
09b4d1ee | 354 | |
fe27cb35 | 355 | if (acpi_pstate_strict) { |
4d8bb537 | 356 | if (!check_freqs(cmd.mask, freqs.new, data)) { |
2d06d8c4 | 357 | pr_debug("acpi_cpufreq_target failed (%d)\n", |
64be7eed | 358 | policy->cpu); |
4d8bb537 MT |
359 | result = -EAGAIN; |
360 | goto out; | |
09b4d1ee VP |
361 | } |
362 | } | |
363 | ||
6b72e393 | 364 | for_each_cpu(i, policy->cpus) { |
fe27cb35 VP |
365 | freqs.cpu = i; |
366 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
367 | } | |
368 | perf->state = next_perf_state; | |
369 | ||
4d8bb537 | 370 | out: |
fe27cb35 | 371 | return result; |
1da177e4 LT |
372 | } |
373 | ||
64be7eed | 374 | static int acpi_cpufreq_verify(struct cpufreq_policy *policy) |
1da177e4 | 375 | { |
f1625066 | 376 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
1da177e4 | 377 | |
2d06d8c4 | 378 | pr_debug("acpi_cpufreq_verify\n"); |
1da177e4 | 379 | |
fe27cb35 | 380 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
381 | } |
382 | ||
1da177e4 | 383 | static unsigned long |
64be7eed | 384 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 385 | { |
64be7eed | 386 | struct acpi_processor_performance *perf = data->acpi_data; |
09b4d1ee | 387 | |
1da177e4 LT |
388 | if (cpu_khz) { |
389 | /* search the closest match to cpu_khz */ | |
390 | unsigned int i; | |
391 | unsigned long freq; | |
09b4d1ee | 392 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 393 | |
3a58df35 | 394 | for (i = 0; i < (perf->state_count-1); i++) { |
1da177e4 | 395 | freq = freqn; |
95dd7227 | 396 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 397 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 398 | perf->state = i; |
64be7eed | 399 | return freq; |
1da177e4 LT |
400 | } |
401 | } | |
95dd7227 | 402 | perf->state = perf->state_count-1; |
64be7eed | 403 | return freqn; |
09b4d1ee | 404 | } else { |
1da177e4 | 405 | /* assume CPU is at P0... */ |
09b4d1ee VP |
406 | perf->state = 0; |
407 | return perf->states[0].core_frequency * 1000; | |
408 | } | |
1da177e4 LT |
409 | } |
410 | ||
2fdf66b4 RR |
411 | static void free_acpi_perf_data(void) |
412 | { | |
413 | unsigned int i; | |
414 | ||
415 | /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ | |
416 | for_each_possible_cpu(i) | |
417 | free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) | |
418 | ->shared_cpu_map); | |
419 | free_percpu(acpi_perf_data); | |
420 | } | |
421 | ||
09b4d1ee VP |
422 | /* |
423 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
424 | * | |
425 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
426 | * in order to determine correct frequency and voltage pairings. We can | |
427 | * do _PDC and _PSD and find out the processor dependency for the | |
428 | * actual init that will happen later... | |
429 | */ | |
50109292 | 430 | static int __init acpi_cpufreq_early_init(void) |
09b4d1ee | 431 | { |
2fdf66b4 | 432 | unsigned int i; |
2d06d8c4 | 433 | pr_debug("acpi_cpufreq_early_init\n"); |
09b4d1ee | 434 | |
50109292 FY |
435 | acpi_perf_data = alloc_percpu(struct acpi_processor_performance); |
436 | if (!acpi_perf_data) { | |
2d06d8c4 | 437 | pr_debug("Memory allocation error for acpi_perf_data.\n"); |
50109292 | 438 | return -ENOMEM; |
09b4d1ee | 439 | } |
2fdf66b4 | 440 | for_each_possible_cpu(i) { |
eaa95840 | 441 | if (!zalloc_cpumask_var_node( |
80855f73 MT |
442 | &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, |
443 | GFP_KERNEL, cpu_to_node(i))) { | |
2fdf66b4 RR |
444 | |
445 | /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ | |
446 | free_acpi_perf_data(); | |
447 | return -ENOMEM; | |
448 | } | |
449 | } | |
09b4d1ee VP |
450 | |
451 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
452 | acpi_processor_preregister_performance(acpi_perf_data); |
453 | return 0; | |
09b4d1ee VP |
454 | } |
455 | ||
95625b8f | 456 | #ifdef CONFIG_SMP |
8adcc0c6 VP |
457 | /* |
458 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
459 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
460 | * detected, this has a side effect of making CPU run at a different speed | |
461 | * than OS intended it to run at. Detect it and handle it cleanly. | |
462 | */ | |
463 | static int bios_with_sw_any_bug; | |
464 | ||
1855256c | 465 | static int sw_any_bug_found(const struct dmi_system_id *d) |
8adcc0c6 VP |
466 | { |
467 | bios_with_sw_any_bug = 1; | |
468 | return 0; | |
469 | } | |
470 | ||
1855256c | 471 | static const struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
472 | { |
473 | .callback = sw_any_bug_found, | |
474 | .ident = "Supermicro Server X6DLP", | |
475 | .matches = { | |
476 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
477 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
478 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
479 | }, | |
480 | }, | |
481 | { } | |
482 | }; | |
1a8e42fa PB |
483 | |
484 | static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) | |
485 | { | |
293afe44 JV |
486 | /* Intel Xeon Processor 7100 Series Specification Update |
487 | * http://www.intel.com/Assets/PDF/specupdate/314554.pdf | |
1a8e42fa PB |
488 | * AL30: A Machine Check Exception (MCE) Occurring during an |
489 | * Enhanced Intel SpeedStep Technology Ratio Change May Cause | |
293afe44 | 490 | * Both Processor Cores to Lock Up. */ |
1a8e42fa PB |
491 | if (c->x86_vendor == X86_VENDOR_INTEL) { |
492 | if ((c->x86 == 15) && | |
493 | (c->x86_model == 6) && | |
293afe44 JV |
494 | (c->x86_mask == 8)) { |
495 | printk(KERN_INFO "acpi-cpufreq: Intel(R) " | |
496 | "Xeon(R) 7100 Errata AL30, processors may " | |
497 | "lock up on frequency changes: disabling " | |
498 | "acpi-cpufreq.\n"); | |
1a8e42fa | 499 | return -ENODEV; |
293afe44 | 500 | } |
1a8e42fa PB |
501 | } |
502 | return 0; | |
503 | } | |
95625b8f | 504 | #endif |
8adcc0c6 | 505 | |
64be7eed | 506 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 507 | { |
64be7eed VP |
508 | unsigned int i; |
509 | unsigned int valid_states = 0; | |
510 | unsigned int cpu = policy->cpu; | |
511 | struct acpi_cpufreq_data *data; | |
64be7eed | 512 | unsigned int result = 0; |
92cb7612 | 513 | struct cpuinfo_x86 *c = &cpu_data(policy->cpu); |
64be7eed | 514 | struct acpi_processor_performance *perf; |
293afe44 JV |
515 | #ifdef CONFIG_SMP |
516 | static int blacklisted; | |
517 | #endif | |
1da177e4 | 518 | |
2d06d8c4 | 519 | pr_debug("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 520 | |
1a8e42fa | 521 | #ifdef CONFIG_SMP |
293afe44 JV |
522 | if (blacklisted) |
523 | return blacklisted; | |
524 | blacklisted = acpi_cpufreq_blacklist(c); | |
525 | if (blacklisted) | |
526 | return blacklisted; | |
1a8e42fa PB |
527 | #endif |
528 | ||
fe27cb35 | 529 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 | 530 | if (!data) |
64be7eed | 531 | return -ENOMEM; |
1da177e4 | 532 | |
b36128c8 | 533 | data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu); |
f1625066 | 534 | per_cpu(acfreq_data, cpu) = data; |
1da177e4 | 535 | |
95dd7227 | 536 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
fe27cb35 | 537 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
1da177e4 | 538 | |
fe27cb35 | 539 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
540 | if (result) |
541 | goto err_free; | |
542 | ||
09b4d1ee | 543 | perf = data->acpi_data; |
09b4d1ee | 544 | policy->shared_type = perf->shared_type; |
95dd7227 | 545 | |
46f18e3a | 546 | /* |
95dd7227 | 547 | * Will let policy->cpus know about dependency only when software |
46f18e3a VP |
548 | * coordination is required. |
549 | */ | |
550 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 551 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
835481d9 | 552 | cpumask_copy(policy->cpus, perf->shared_cpu_map); |
8adcc0c6 | 553 | } |
835481d9 | 554 | cpumask_copy(policy->related_cpus, perf->shared_cpu_map); |
8adcc0c6 VP |
555 | |
556 | #ifdef CONFIG_SMP | |
557 | dmi_check_system(sw_any_bug_dmi_table); | |
835481d9 | 558 | if (bios_with_sw_any_bug && cpumask_weight(policy->cpus) == 1) { |
8adcc0c6 | 559 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; |
835481d9 | 560 | cpumask_copy(policy->cpus, cpu_core_mask(cpu)); |
8adcc0c6 VP |
561 | } |
562 | #endif | |
09b4d1ee | 563 | |
1da177e4 | 564 | /* capability check */ |
09b4d1ee | 565 | if (perf->state_count <= 1) { |
2d06d8c4 | 566 | pr_debug("No P-States\n"); |
1da177e4 LT |
567 | result = -ENODEV; |
568 | goto err_unreg; | |
569 | } | |
09b4d1ee | 570 | |
fe27cb35 VP |
571 | if (perf->control_register.space_id != perf->status_register.space_id) { |
572 | result = -ENODEV; | |
573 | goto err_unreg; | |
574 | } | |
575 | ||
576 | switch (perf->control_register.space_id) { | |
64be7eed | 577 | case ACPI_ADR_SPACE_SYSTEM_IO: |
2d06d8c4 | 578 | pr_debug("SYSTEM IO addr space\n"); |
dde9f7ba VP |
579 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
580 | break; | |
64be7eed | 581 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
2d06d8c4 | 582 | pr_debug("HARDWARE addr space\n"); |
dde9f7ba VP |
583 | if (!check_est_cpu(cpu)) { |
584 | result = -ENODEV; | |
585 | goto err_unreg; | |
586 | } | |
587 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 | 588 | break; |
64be7eed | 589 | default: |
2d06d8c4 | 590 | pr_debug("Unknown addr space %d\n", |
64be7eed | 591 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
592 | result = -ENODEV; |
593 | goto err_unreg; | |
594 | } | |
595 | ||
95dd7227 DJ |
596 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * |
597 | (perf->state_count+1), GFP_KERNEL); | |
1da177e4 LT |
598 | if (!data->freq_table) { |
599 | result = -ENOMEM; | |
600 | goto err_unreg; | |
601 | } | |
602 | ||
603 | /* detect transition latency */ | |
604 | policy->cpuinfo.transition_latency = 0; | |
3a58df35 | 605 | for (i = 0; i < perf->state_count; i++) { |
64be7eed VP |
606 | if ((perf->states[i].transition_latency * 1000) > |
607 | policy->cpuinfo.transition_latency) | |
608 | policy->cpuinfo.transition_latency = | |
609 | perf->states[i].transition_latency * 1000; | |
1da177e4 | 610 | } |
1da177e4 | 611 | |
a59d1637 PV |
612 | /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ |
613 | if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && | |
614 | policy->cpuinfo.transition_latency > 20 * 1000) { | |
a59d1637 | 615 | policy->cpuinfo.transition_latency = 20 * 1000; |
61c8c67e JP |
616 | printk_once(KERN_INFO |
617 | "P-state transition latency capped at 20 uS\n"); | |
a59d1637 PV |
618 | } |
619 | ||
1da177e4 | 620 | /* table init */ |
3a58df35 DJ |
621 | for (i = 0; i < perf->state_count; i++) { |
622 | if (i > 0 && perf->states[i].core_frequency >= | |
3cdf552b | 623 | data->freq_table[valid_states-1].frequency / 1000) |
fe27cb35 VP |
624 | continue; |
625 | ||
626 | data->freq_table[valid_states].index = i; | |
627 | data->freq_table[valid_states].frequency = | |
64be7eed | 628 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 629 | valid_states++; |
1da177e4 | 630 | } |
3d4a7ef3 | 631 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
8edc59d9 | 632 | perf->state = 0; |
1da177e4 LT |
633 | |
634 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
95dd7227 | 635 | if (result) |
1da177e4 | 636 | goto err_freqfree; |
1da177e4 | 637 | |
d876dfbb TR |
638 | if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) |
639 | printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n"); | |
640 | ||
a507ac4b | 641 | switch (perf->control_register.space_id) { |
64be7eed | 642 | case ACPI_ADR_SPACE_SYSTEM_IO: |
dde9f7ba VP |
643 | /* Current speed is unknown and not detectable by IO port */ |
644 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
645 | break; | |
64be7eed | 646 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 647 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
a507ac4b | 648 | policy->cur = get_cur_freq_on_cpu(cpu); |
dde9f7ba | 649 | break; |
64be7eed | 650 | default: |
dde9f7ba VP |
651 | break; |
652 | } | |
653 | ||
1da177e4 LT |
654 | /* notify BIOS that we exist */ |
655 | acpi_processor_notify_smm(THIS_MODULE); | |
656 | ||
dfde5d62 | 657 | /* Check for APERF/MPERF support in hardware */ |
92e03c41 | 658 | if (boot_cpu_has(X86_FEATURE_APERFMPERF)) |
a2fed573 | 659 | acpi_cpufreq_driver.getavg = cpufreq_get_measured_perf; |
dfde5d62 | 660 | |
2d06d8c4 | 661 | pr_debug("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 662 | for (i = 0; i < perf->state_count; i++) |
2d06d8c4 | 663 | pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 664 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
665 | (u32) perf->states[i].core_frequency, |
666 | (u32) perf->states[i].power, | |
667 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
668 | |
669 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
64be7eed | 670 | |
4b31e774 DB |
671 | /* |
672 | * the first call to ->target() should result in us actually | |
673 | * writing something to the appropriate registers. | |
674 | */ | |
675 | data->resume = 1; | |
64be7eed | 676 | |
fe27cb35 | 677 | return result; |
1da177e4 | 678 | |
95dd7227 | 679 | err_freqfree: |
1da177e4 | 680 | kfree(data->freq_table); |
95dd7227 | 681 | err_unreg: |
09b4d1ee | 682 | acpi_processor_unregister_performance(perf, cpu); |
95dd7227 | 683 | err_free: |
1da177e4 | 684 | kfree(data); |
f1625066 | 685 | per_cpu(acfreq_data, cpu) = NULL; |
1da177e4 | 686 | |
64be7eed | 687 | return result; |
1da177e4 LT |
688 | } |
689 | ||
64be7eed | 690 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 691 | { |
f1625066 | 692 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
1da177e4 | 693 | |
2d06d8c4 | 694 | pr_debug("acpi_cpufreq_cpu_exit\n"); |
1da177e4 LT |
695 | |
696 | if (data) { | |
697 | cpufreq_frequency_table_put_attr(policy->cpu); | |
f1625066 | 698 | per_cpu(acfreq_data, policy->cpu) = NULL; |
64be7eed VP |
699 | acpi_processor_unregister_performance(data->acpi_data, |
700 | policy->cpu); | |
dab5fff1 | 701 | kfree(data->freq_table); |
1da177e4 LT |
702 | kfree(data); |
703 | } | |
704 | ||
64be7eed | 705 | return 0; |
1da177e4 LT |
706 | } |
707 | ||
64be7eed | 708 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 709 | { |
f1625066 | 710 | struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu); |
1da177e4 | 711 | |
2d06d8c4 | 712 | pr_debug("acpi_cpufreq_resume\n"); |
1da177e4 LT |
713 | |
714 | data->resume = 1; | |
715 | ||
64be7eed | 716 | return 0; |
1da177e4 LT |
717 | } |
718 | ||
64be7eed | 719 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 LT |
720 | &cpufreq_freq_attr_scaling_available_freqs, |
721 | NULL, | |
722 | }; | |
723 | ||
724 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
e2f74f35 TR |
725 | .verify = acpi_cpufreq_verify, |
726 | .target = acpi_cpufreq_target, | |
727 | .bios_limit = acpi_processor_get_bios_limit, | |
728 | .init = acpi_cpufreq_cpu_init, | |
729 | .exit = acpi_cpufreq_cpu_exit, | |
730 | .resume = acpi_cpufreq_resume, | |
731 | .name = "acpi-cpufreq", | |
732 | .owner = THIS_MODULE, | |
733 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
734 | }; |
735 | ||
64be7eed | 736 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 737 | { |
50109292 FY |
738 | int ret; |
739 | ||
ee297533 YL |
740 | if (acpi_disabled) |
741 | return 0; | |
742 | ||
2d06d8c4 | 743 | pr_debug("acpi_cpufreq_init\n"); |
1da177e4 | 744 | |
50109292 FY |
745 | ret = acpi_cpufreq_early_init(); |
746 | if (ret) | |
747 | return ret; | |
09b4d1ee | 748 | |
847aef6f AM |
749 | ret = cpufreq_register_driver(&acpi_cpufreq_driver); |
750 | if (ret) | |
2fdf66b4 | 751 | free_acpi_perf_data(); |
847aef6f AM |
752 | |
753 | return ret; | |
1da177e4 LT |
754 | } |
755 | ||
64be7eed | 756 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 | 757 | { |
2d06d8c4 | 758 | pr_debug("acpi_cpufreq_exit\n"); |
1da177e4 LT |
759 | |
760 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
761 | ||
50f4ddd4 | 762 | free_acpi_perf_data(); |
1da177e4 LT |
763 | } |
764 | ||
d395bf12 | 765 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed | 766 | MODULE_PARM_DESC(acpi_pstate_strict, |
95dd7227 DJ |
767 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
768 | "performed during frequency changes."); | |
1da177e4 LT |
769 | |
770 | late_initcall(acpi_cpufreq_init); | |
771 | module_exit(acpi_cpufreq_exit); | |
772 | ||
773 | MODULE_ALIAS("acpi"); |