[deliverable/linux.git] / drivers / cpufreq / cris-etraxfs-cpufreq.c

#include <linux/init.h>
#include <linux/module.h>
#include <linux/cpufreq.h>
#include <hwregs/reg_map.h>
#include <arch/hwregs/reg_rdwr.h>
#include <arch/hwregs/config_defs.h>
#include <arch/hwregs/bif_core_defs.h>

static int
cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
			 void *data);

static struct notifier_block cris_sdram_freq_notifier_block = {
	.notifier_call = cris_sdram_freq_notifier
};

static struct cpufreq_frequency_table cris_freq_table[] = {
	{0x01, 6000},
	{0x02, 200000},
	{0, CPUFREQ_TABLE_END},
};

static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
{
	reg_config_rw_clk_ctrl clk_ctrl;
	clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
	return clk_ctrl.pll ? 200000 : 6000;
}

static int cris_freq_target(struct cpufreq_policy *policy, unsigned int state)
{
	struct cpufreq_freqs freqs;
	reg_config_rw_clk_ctrl clk_ctrl;
	clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);

	freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
	freqs.new = cris_freq_table[state].frequency;

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);

	local_irq_disable();

	/* Even though we may be SMP they will share the same clock
	 * so all settings are made on CPU0. */
	if (cris_freq_table[state].frequency == 200000)
		clk_ctrl.pll = 1;
	else
		clk_ctrl.pll = 0;
	REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);

	local_irq_enable();

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);

	return 0;
}

static int cris_freq_cpu_init(struct cpufreq_policy *policy)
{
	return cpufreq_generic_init(policy, cris_freq_table, 1000000);
}

static struct cpufreq_driver cris_freq_driver = {
	.get = cris_freq_get_cpu_frequency,
	.verify = cpufreq_generic_frequency_table_verify,
	.target_index = cris_freq_target,
	.init = cris_freq_cpu_init,
	.exit = cpufreq_generic_exit,
	.name = "cris_freq",
	.attr = cpufreq_generic_attr,
};

static int __init cris_freq_init(void)
{
	int ret;
	ret = cpufreq_register_driver(&cris_freq_driver);
	cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
				  CPUFREQ_TRANSITION_NOTIFIER);
	return ret;
}

static int
cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
			 void *data)
{
	int i;
	struct cpufreq_freqs *freqs = data;
	if (val == CPUFREQ_PRECHANGE) {
		reg_bif_core_rw_sdram_timing timing =
		    REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
		timing.cpd = (freqs->new == 200000 ? 0 : 1);

		if (freqs->new == 200000)
			for (i = 0; i < 50000; i++) ;
		REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
	}
	return 0;
}

module_init(cris_freq_init);
Commit	Line	Data
035e111f JN	1	#include <linux/init.h>
	2	#include <linux/module.h>
	3	#include <linux/cpufreq.h>
	4	#include <hwregs/reg_map.h>
556dcee7 JN	5	#include <arch/hwregs/reg_rdwr.h>
	6	#include <arch/hwregs/config_defs.h>
	7	#include <arch/hwregs/bif_core_defs.h>
035e111f JN	8
	9	static int
	10	cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
	11	void *data);
	12
	13	static struct notifier_block cris_sdram_freq_notifier_block = {
	14	.notifier_call = cris_sdram_freq_notifier
	15	};
	16
	17	static struct cpufreq_frequency_table cris_freq_table[] = {
	18	{0x01, 6000},
	19	{0x02, 200000},
	20	{0, CPUFREQ_TABLE_END},
	21	};
	22
	23	static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
	24	{
	25	reg_config_rw_clk_ctrl clk_ctrl;
	26	clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
	27	return clk_ctrl.pll ? 200000 : 6000;
	28	}
	29
9c0ebcf7	30	static int cris_freq_target(struct cpufreq_policy *policy, unsigned int state)
035e111f	31	{
035e111f JN	32	struct cpufreq_freqs freqs;
	33	reg_config_rw_clk_ctrl clk_ctrl;
	34	clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
	35
b43a7ffb VK	36	freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
b43a7ffb VK	37	freqs.new = cris_freq_table[state].frequency;
035e111f	38
b43a7ffb	39	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
035e111f JN	40
	41	local_irq_disable();
	42
	43	/* Even though we may be SMP they will share the same clock
	44	* so all settings are made on CPU0. */
	45	if (cris_freq_table[state].frequency == 200000)
	46	clk_ctrl.pll = 1;
	47	else
	48	clk_ctrl.pll = 0;
	49	REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
	50
	51	local_irq_enable();
	52
b43a7ffb	53	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
035e111f JN	54
	55	return 0;
	56	}
	57
	58	static int cris_freq_cpu_init(struct cpufreq_policy *policy)
	59	{
1870e111	60	return cpufreq_generic_init(policy, cris_freq_table, 1000000);
035e111f JN	61	}
035e111f JN	62
035e111f JN	63	static struct cpufreq_driver cris_freq_driver = {
035e111f JN	64	.get = cris_freq_get_cpu_frequency,
361db10f	65	.verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7	66	.target_index = cris_freq_target,
035e111f	67	.init = cris_freq_cpu_init,
361db10f	68	.exit = cpufreq_generic_exit,
035e111f	69	.name = "cris_freq",
361db10f	70	.attr = cpufreq_generic_attr,
035e111f JN	71	};
	72
	73	static int __init cris_freq_init(void)
	74	{
	75	int ret;
	76	ret = cpufreq_register_driver(&cris_freq_driver);
	77	cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
	78	CPUFREQ_TRANSITION_NOTIFIER);
	79	return ret;
	80	}
	81
	82	static int
	83	cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
	84	void *data)
	85	{
	86	int i;
	87	struct cpufreq_freqs *freqs = data;
	88	if (val == CPUFREQ_PRECHANGE) {
	89	reg_bif_core_rw_sdram_timing timing =
	90	REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
	91	timing.cpd = (freqs->new == 200000 ? 0 : 1);
	92
	93	if (freqs->new == 200000)
	94	for (i = 0; i < 50000; i++) ;
	95	REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
	96	}
	97	return 0;
	98	}
	99
	100	module_init(cris_freq_init);