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6601b803 SN |
1 | /* |
2 | * CPU frequency scaling for DaVinci | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * Based on linux/arch/arm/plat-omap/cpu-omap.c. Original Copyright follows: | |
7 | * | |
8 | * Copyright (C) 2005 Nokia Corporation | |
9 | * Written by Tony Lindgren <tony@atomide.com> | |
10 | * | |
11 | * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | |
12 | * | |
13 | * Copyright (C) 2007-2008 Texas Instruments, Inc. | |
14 | * Updated to support OMAP3 | |
15 | * Rajendra Nayak <rnayak@ti.com> | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License version 2 as | |
19 | * published by the Free Software Foundation. | |
20 | */ | |
21 | #include <linux/types.h> | |
22 | #include <linux/cpufreq.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/err.h> | |
25 | #include <linux/clk.h> | |
26 | #include <linux/platform_device.h> | |
dc28094b | 27 | #include <linux/export.h> |
6601b803 SN |
28 | |
29 | #include <mach/hardware.h> | |
30 | #include <mach/cpufreq.h> | |
31 | #include <mach/common.h> | |
32 | ||
6601b803 SN |
33 | struct davinci_cpufreq { |
34 | struct device *dev; | |
35 | struct clk *armclk; | |
30a2c5d2 SN |
36 | struct clk *asyncclk; |
37 | unsigned long asyncrate; | |
6601b803 SN |
38 | }; |
39 | static struct davinci_cpufreq cpufreq; | |
40 | ||
41 | static int davinci_verify_speed(struct cpufreq_policy *policy) | |
42 | { | |
43 | struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; | |
44 | struct cpufreq_frequency_table *freq_table = pdata->freq_table; | |
45 | struct clk *armclk = cpufreq.armclk; | |
46 | ||
47 | if (freq_table) | |
48 | return cpufreq_frequency_table_verify(policy, freq_table); | |
49 | ||
50 | if (policy->cpu) | |
51 | return -EINVAL; | |
52 | ||
be49e346 | 53 | cpufreq_verify_within_cpu_limits(policy); |
6601b803 SN |
54 | policy->min = clk_round_rate(armclk, policy->min * 1000) / 1000; |
55 | policy->max = clk_round_rate(armclk, policy->max * 1000) / 1000; | |
56 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | |
57 | policy->cpuinfo.max_freq); | |
58 | return 0; | |
59 | } | |
60 | ||
61 | static unsigned int davinci_getspeed(unsigned int cpu) | |
62 | { | |
63 | if (cpu) | |
64 | return 0; | |
65 | ||
66 | return clk_get_rate(cpufreq.armclk) / 1000; | |
67 | } | |
68 | ||
69 | static int davinci_target(struct cpufreq_policy *policy, | |
70 | unsigned int target_freq, unsigned int relation) | |
71 | { | |
72 | int ret = 0; | |
73 | unsigned int idx; | |
74 | struct cpufreq_freqs freqs; | |
75 | struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; | |
76 | struct clk *armclk = cpufreq.armclk; | |
77 | ||
6601b803 SN |
78 | freqs.old = davinci_getspeed(0); |
79 | freqs.new = clk_round_rate(armclk, target_freq * 1000) / 1000; | |
6601b803 SN |
80 | |
81 | if (freqs.old == freqs.new) | |
82 | return ret; | |
83 | ||
d870df68 | 84 | dev_dbg(cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new); |
6601b803 SN |
85 | |
86 | ret = cpufreq_frequency_table_target(policy, pdata->freq_table, | |
87 | freqs.new, relation, &idx); | |
88 | if (ret) | |
89 | return -EINVAL; | |
90 | ||
b43a7ffb | 91 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
6601b803 SN |
92 | |
93 | /* if moving to higher frequency, up the voltage beforehand */ | |
fca97b33 SN |
94 | if (pdata->set_voltage && freqs.new > freqs.old) { |
95 | ret = pdata->set_voltage(idx); | |
96 | if (ret) | |
97 | goto out; | |
98 | } | |
6601b803 SN |
99 | |
100 | ret = clk_set_rate(armclk, idx); | |
fca97b33 SN |
101 | if (ret) |
102 | goto out; | |
6601b803 | 103 | |
30a2c5d2 SN |
104 | if (cpufreq.asyncclk) { |
105 | ret = clk_set_rate(cpufreq.asyncclk, cpufreq.asyncrate); | |
106 | if (ret) | |
107 | goto out; | |
108 | } | |
109 | ||
6601b803 SN |
110 | /* if moving to lower freq, lower the voltage after lowering freq */ |
111 | if (pdata->set_voltage && freqs.new < freqs.old) | |
112 | pdata->set_voltage(idx); | |
113 | ||
fca97b33 | 114 | out: |
f20b97d9 VK |
115 | if (ret) |
116 | freqs.new = freqs.old; | |
117 | ||
b43a7ffb | 118 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
6601b803 SN |
119 | |
120 | return ret; | |
121 | } | |
122 | ||
079db590 | 123 | static int davinci_cpu_init(struct cpufreq_policy *policy) |
6601b803 SN |
124 | { |
125 | int result = 0; | |
126 | struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; | |
127 | struct cpufreq_frequency_table *freq_table = pdata->freq_table; | |
128 | ||
129 | if (policy->cpu != 0) | |
130 | return -EINVAL; | |
131 | ||
13d5e27a SN |
132 | /* Finish platform specific initialization */ |
133 | if (pdata->init) { | |
134 | result = pdata->init(); | |
135 | if (result) | |
136 | return result; | |
137 | } | |
138 | ||
6601b803 SN |
139 | /* |
140 | * Time measurement across the target() function yields ~1500-1800us | |
141 | * time taken with no drivers on notification list. | |
25985edc | 142 | * Setting the latency to 2000 us to accommodate addition of drivers |
6601b803 SN |
143 | * to pre/post change notification list. |
144 | */ | |
af8c4cfa | 145 | return cpufreq_generic_init(policy, freq_table, 2000 * 1000); |
6601b803 SN |
146 | } |
147 | ||
6601b803 SN |
148 | static struct cpufreq_driver davinci_driver = { |
149 | .flags = CPUFREQ_STICKY, | |
150 | .verify = davinci_verify_speed, | |
151 | .target = davinci_target, | |
152 | .get = davinci_getspeed, | |
153 | .init = davinci_cpu_init, | |
39d0c362 | 154 | .exit = cpufreq_generic_exit, |
6601b803 | 155 | .name = "davinci", |
39d0c362 | 156 | .attr = cpufreq_generic_attr, |
6601b803 SN |
157 | }; |
158 | ||
159 | static int __init davinci_cpufreq_probe(struct platform_device *pdev) | |
160 | { | |
161 | struct davinci_cpufreq_config *pdata = pdev->dev.platform_data; | |
30a2c5d2 | 162 | struct clk *asyncclk; |
6601b803 SN |
163 | |
164 | if (!pdata) | |
165 | return -EINVAL; | |
166 | if (!pdata->freq_table) | |
167 | return -EINVAL; | |
168 | ||
169 | cpufreq.dev = &pdev->dev; | |
170 | ||
171 | cpufreq.armclk = clk_get(NULL, "arm"); | |
172 | if (IS_ERR(cpufreq.armclk)) { | |
173 | dev_err(cpufreq.dev, "Unable to get ARM clock\n"); | |
174 | return PTR_ERR(cpufreq.armclk); | |
175 | } | |
176 | ||
30a2c5d2 SN |
177 | asyncclk = clk_get(cpufreq.dev, "async"); |
178 | if (!IS_ERR(asyncclk)) { | |
179 | cpufreq.asyncclk = asyncclk; | |
180 | cpufreq.asyncrate = clk_get_rate(asyncclk); | |
181 | } | |
182 | ||
6601b803 SN |
183 | return cpufreq_register_driver(&davinci_driver); |
184 | } | |
185 | ||
186 | static int __exit davinci_cpufreq_remove(struct platform_device *pdev) | |
187 | { | |
188 | clk_put(cpufreq.armclk); | |
189 | ||
30a2c5d2 SN |
190 | if (cpufreq.asyncclk) |
191 | clk_put(cpufreq.asyncclk); | |
192 | ||
6601b803 SN |
193 | return cpufreq_unregister_driver(&davinci_driver); |
194 | } | |
195 | ||
196 | static struct platform_driver davinci_cpufreq_driver = { | |
197 | .driver = { | |
198 | .name = "cpufreq-davinci", | |
199 | .owner = THIS_MODULE, | |
200 | }, | |
201 | .remove = __exit_p(davinci_cpufreq_remove), | |
202 | }; | |
203 | ||
3aa3e840 | 204 | int __init davinci_cpufreq_init(void) |
6601b803 SN |
205 | { |
206 | return platform_driver_probe(&davinci_cpufreq_driver, | |
207 | davinci_cpufreq_probe); | |
208 | } | |
6601b803 | 209 |