Merge tag 'rdma-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland...
[deliverable/linux.git] / drivers / cpufreq / db8500-cpufreq.c
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7c1a70e9 1/*
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2 * Copyright (C) STMicroelectronics 2009
3 * Copyright (C) ST-Ericsson SA 2010
4 *
5 * License Terms: GNU General Public License v2
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6 * Author: Sundar Iyer <sundar.iyer@stericsson.com>
7 * Author: Martin Persson <martin.persson@stericsson.com>
8 * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
9 *
10 */
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11#include <linux/kernel.h>
12#include <linux/cpufreq.h>
13#include <linux/delay.h>
72b2fd5c 14#include <linux/slab.h>
73180f85 15#include <linux/mfd/dbx500-prcmu.h>
72b2fd5c 16#include <mach/id.h>
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17
18static struct cpufreq_frequency_table freq_table[] = {
19 [0] = {
20 .index = 0,
6283e328 21 .frequency = 200000,
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22 },
23 [1] = {
24 .index = 1,
c72fe851 25 .frequency = 400000,
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26 },
27 [2] = {
28 .index = 2,
c72fe851 29 .frequency = 800000,
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30 },
31 [3] = {
6283e328 32 /* Used for MAX_OPP, if available */
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33 .index = 3,
34 .frequency = CPUFREQ_TABLE_END,
35 },
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36 [4] = {
37 .index = 4,
38 .frequency = CPUFREQ_TABLE_END,
39 },
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40};
41
72b2fd5c 42static enum arm_opp idx2opp[] = {
6283e328 43 ARM_EXTCLK,
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44 ARM_50_OPP,
45 ARM_100_OPP,
46 ARM_MAX_OPP
47};
48
49static struct freq_attr *db8500_cpufreq_attr[] = {
50 &cpufreq_freq_attr_scaling_available_freqs,
51 NULL,
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52};
53
72b2fd5c 54static int db8500_cpufreq_verify_speed(struct cpufreq_policy *policy)
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55{
56 return cpufreq_frequency_table_verify(policy, freq_table);
57}
58
72b2fd5c 59static int db8500_cpufreq_target(struct cpufreq_policy *policy,
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60 unsigned int target_freq,
61 unsigned int relation)
62{
63 struct cpufreq_freqs freqs;
72b2fd5c 64 unsigned int idx;
7c1a70e9 65
72b2fd5c 66 /* scale the target frequency to one of the extremes supported */
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67 if (target_freq < policy->cpuinfo.min_freq)
68 target_freq = policy->cpuinfo.min_freq;
69 if (target_freq > policy->cpuinfo.max_freq)
70 target_freq = policy->cpuinfo.max_freq;
71
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72 /* Lookup the next frequency */
73 if (cpufreq_frequency_table_target
74 (policy, freq_table, target_freq, relation, &idx)) {
75 return -EINVAL;
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76 }
77
78 freqs.old = policy->cur;
72b2fd5c 79 freqs.new = freq_table[idx].frequency;
7c1a70e9 80
72b2fd5c 81 if (freqs.old == freqs.new)
7c1a70e9 82 return 0;
7c1a70e9 83
72b2fd5c 84 /* pre-change notification */
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85 for_each_cpu(freqs.cpu, policy->cpus)
86 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
7c1a70e9 87
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88 /* request the PRCM unit for opp change */
89 if (prcmu_set_arm_opp(idx2opp[idx])) {
90 pr_err("db8500-cpufreq: Failed to set OPP level\n");
91 return -EINVAL;
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92 }
93
72b2fd5c 94 /* post change notification */
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95 for_each_cpu(freqs.cpu, policy->cpus)
96 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
7c1a70e9 97
72b2fd5c 98 return 0;
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99}
100
72b2fd5c 101static unsigned int db8500_cpufreq_getspeed(unsigned int cpu)
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102{
103 int i;
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104 /* request the prcm to get the current ARM opp */
105 for (i = 0; prcmu_get_arm_opp() != idx2opp[i]; i++)
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106 ;
107 return freq_table[i].frequency;
108}
109
72b2fd5c 110static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy)
7c1a70e9 111{
eb0b38a5 112 int i, res;
7c1a70e9 113
72b2fd5c 114 BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table));
7c1a70e9 115
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116 if (prcmu_has_arm_maxopp())
117 freq_table[3].frequency = 1000000;
118
6283e328 119 pr_info("db8500-cpufreq : Available frequencies:\n");
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120 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
121 pr_info(" %d Mhz\n", freq_table[i].frequency/1000);
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122
123 /* get policy fields based on the table */
124 res = cpufreq_frequency_table_cpuinfo(policy, freq_table);
125 if (!res)
126 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
127 else {
72b2fd5c 128 pr_err("db8500-cpufreq : Failed to read policy table\n");
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129 return res;
130 }
131
132 policy->min = policy->cpuinfo.min_freq;
133 policy->max = policy->cpuinfo.max_freq;
72b2fd5c 134 policy->cur = db8500_cpufreq_getspeed(policy->cpu);
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135 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
136
137 /*
138 * FIXME : Need to take time measurement across the target()
139 * function with no/some/all drivers in the notification
140 * list.
141 */
72b2fd5c 142 policy->cpuinfo.transition_latency = 20 * 1000; /* in ns */
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143
144 /* policy sharing between dual CPUs */
88d8cd52 145 cpumask_copy(policy->cpus, cpu_present_mask);
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146
147 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
148
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149 return 0;
150}
151
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152static struct cpufreq_driver db8500_cpufreq_driver = {
153 .flags = CPUFREQ_STICKY,
154 .verify = db8500_cpufreq_verify_speed,
155 .target = db8500_cpufreq_target,
156 .get = db8500_cpufreq_getspeed,
157 .init = db8500_cpufreq_init,
158 .name = "DB8500",
159 .attr = db8500_cpufreq_attr,
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160};
161
72b2fd5c 162static int __init db8500_cpufreq_register(void)
7c1a70e9 163{
bc71c096 164 if (!cpu_is_u8500_family())
72b2fd5c 165 return -ENODEV;
7c1a70e9 166
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167 pr_info("cpufreq for DB8500 started\n");
168 return cpufreq_register_driver(&db8500_cpufreq_driver);
7c1a70e9 169}
72b2fd5c 170device_initcall(db8500_cpufreq_register);
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