Commit | Line | Data |
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7c1a70e9 | 1 | /* |
7c1a70e9 MP |
2 | * Copyright (C) STMicroelectronics 2009 |
3 | * Copyright (C) ST-Ericsson SA 2010 | |
4 | * | |
5 | * License Terms: GNU General Public License v2 | |
7c1a70e9 MP |
6 | * Author: Sundar Iyer <sundar.iyer@stericsson.com> |
7 | * Author: Martin Persson <martin.persson@stericsson.com> | |
8 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | |
9 | * | |
10 | */ | |
7c1a70e9 MP |
11 | #include <linux/kernel.h> |
12 | #include <linux/cpufreq.h> | |
13 | #include <linux/delay.h> | |
72b2fd5c | 14 | #include <linux/slab.h> |
650c2a21 | 15 | #include <linux/mfd/db8500-prcmu.h> |
72b2fd5c | 16 | #include <mach/id.h> |
7c1a70e9 MP |
17 | |
18 | static struct cpufreq_frequency_table freq_table[] = { | |
19 | [0] = { | |
20 | .index = 0, | |
72b2fd5c | 21 | .frequency = 300000, |
7c1a70e9 MP |
22 | }, |
23 | [1] = { | |
24 | .index = 1, | |
72b2fd5c | 25 | .frequency = 600000, |
7c1a70e9 MP |
26 | }, |
27 | [2] = { | |
72b2fd5c | 28 | /* Used for MAX_OPP, if available */ |
7c1a70e9 | 29 | .index = 2, |
72b2fd5c | 30 | .frequency = CPUFREQ_TABLE_END, |
7c1a70e9 MP |
31 | }, |
32 | [3] = { | |
7c1a70e9 MP |
33 | .index = 3, |
34 | .frequency = CPUFREQ_TABLE_END, | |
35 | }, | |
7c1a70e9 MP |
36 | }; |
37 | ||
72b2fd5c LW |
38 | static enum arm_opp idx2opp[] = { |
39 | ARM_50_OPP, | |
40 | ARM_100_OPP, | |
41 | ARM_MAX_OPP | |
42 | }; | |
43 | ||
44 | static struct freq_attr *db8500_cpufreq_attr[] = { | |
45 | &cpufreq_freq_attr_scaling_available_freqs, | |
46 | NULL, | |
7c1a70e9 MP |
47 | }; |
48 | ||
72b2fd5c | 49 | static int db8500_cpufreq_verify_speed(struct cpufreq_policy *policy) |
7c1a70e9 MP |
50 | { |
51 | return cpufreq_frequency_table_verify(policy, freq_table); | |
52 | } | |
53 | ||
72b2fd5c | 54 | static int db8500_cpufreq_target(struct cpufreq_policy *policy, |
7c1a70e9 MP |
55 | unsigned int target_freq, |
56 | unsigned int relation) | |
57 | { | |
58 | struct cpufreq_freqs freqs; | |
72b2fd5c | 59 | unsigned int idx; |
7c1a70e9 | 60 | |
72b2fd5c | 61 | /* scale the target frequency to one of the extremes supported */ |
7c1a70e9 MP |
62 | if (target_freq < policy->cpuinfo.min_freq) |
63 | target_freq = policy->cpuinfo.min_freq; | |
64 | if (target_freq > policy->cpuinfo.max_freq) | |
65 | target_freq = policy->cpuinfo.max_freq; | |
66 | ||
72b2fd5c LW |
67 | /* Lookup the next frequency */ |
68 | if (cpufreq_frequency_table_target | |
69 | (policy, freq_table, target_freq, relation, &idx)) { | |
70 | return -EINVAL; | |
7c1a70e9 MP |
71 | } |
72 | ||
73 | freqs.old = policy->cur; | |
72b2fd5c | 74 | freqs.new = freq_table[idx].frequency; |
7c1a70e9 MP |
75 | freqs.cpu = policy->cpu; |
76 | ||
72b2fd5c | 77 | if (freqs.old == freqs.new) |
7c1a70e9 | 78 | return 0; |
7c1a70e9 | 79 | |
72b2fd5c | 80 | /* pre-change notification */ |
7c1a70e9 MP |
81 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
82 | ||
72b2fd5c LW |
83 | /* request the PRCM unit for opp change */ |
84 | if (prcmu_set_arm_opp(idx2opp[idx])) { | |
85 | pr_err("db8500-cpufreq: Failed to set OPP level\n"); | |
86 | return -EINVAL; | |
7c1a70e9 MP |
87 | } |
88 | ||
72b2fd5c | 89 | /* post change notification */ |
7c1a70e9 MP |
90 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
91 | ||
72b2fd5c | 92 | return 0; |
7c1a70e9 MP |
93 | } |
94 | ||
72b2fd5c | 95 | static unsigned int db8500_cpufreq_getspeed(unsigned int cpu) |
7c1a70e9 MP |
96 | { |
97 | int i; | |
72b2fd5c LW |
98 | /* request the prcm to get the current ARM opp */ |
99 | for (i = 0; prcmu_get_arm_opp() != idx2opp[i]; i++) | |
7c1a70e9 MP |
100 | ; |
101 | return freq_table[i].frequency; | |
102 | } | |
103 | ||
72b2fd5c | 104 | static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) |
7c1a70e9 MP |
105 | { |
106 | int res; | |
72b2fd5c | 107 | int i; |
7c1a70e9 | 108 | |
72b2fd5c | 109 | BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table)); |
7c1a70e9 | 110 | |
72b2fd5c LW |
111 | if (cpu_is_u8500v2() && !prcmu_is_u8400()) { |
112 | freq_table[0].frequency = 400000; | |
113 | freq_table[1].frequency = 800000; | |
7c1a70e9 | 114 | if (prcmu_has_arm_maxopp()) |
72b2fd5c | 115 | freq_table[2].frequency = 1000000; |
7c1a70e9 MP |
116 | } |
117 | ||
118 | /* get policy fields based on the table */ | |
119 | res = cpufreq_frequency_table_cpuinfo(policy, freq_table); | |
120 | if (!res) | |
121 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | |
122 | else { | |
72b2fd5c | 123 | pr_err("db8500-cpufreq : Failed to read policy table\n"); |
7c1a70e9 MP |
124 | return res; |
125 | } | |
126 | ||
127 | policy->min = policy->cpuinfo.min_freq; | |
128 | policy->max = policy->cpuinfo.max_freq; | |
72b2fd5c LW |
129 | policy->cur = db8500_cpufreq_getspeed(policy->cpu); |
130 | ||
131 | for (i = 0; freq_table[i].frequency != policy->cur; i++) | |
132 | ; | |
133 | ||
7c1a70e9 MP |
134 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; |
135 | ||
136 | /* | |
137 | * FIXME : Need to take time measurement across the target() | |
138 | * function with no/some/all drivers in the notification | |
139 | * list. | |
140 | */ | |
72b2fd5c | 141 | policy->cpuinfo.transition_latency = 20 * 1000; /* in ns */ |
7c1a70e9 MP |
142 | |
143 | /* policy sharing between dual CPUs */ | |
144 | cpumask_copy(policy->cpus, &cpu_present_map); | |
145 | ||
146 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
147 | ||
7c1a70e9 MP |
148 | return 0; |
149 | } | |
150 | ||
72b2fd5c LW |
151 | static struct cpufreq_driver db8500_cpufreq_driver = { |
152 | .flags = CPUFREQ_STICKY, | |
153 | .verify = db8500_cpufreq_verify_speed, | |
154 | .target = db8500_cpufreq_target, | |
155 | .get = db8500_cpufreq_getspeed, | |
156 | .init = db8500_cpufreq_init, | |
157 | .name = "DB8500", | |
158 | .attr = db8500_cpufreq_attr, | |
7c1a70e9 MP |
159 | }; |
160 | ||
72b2fd5c | 161 | static int __init db8500_cpufreq_register(void) |
7c1a70e9 | 162 | { |
72b2fd5c LW |
163 | if (!cpu_is_u8500v20_or_later()) |
164 | return -ENODEV; | |
7c1a70e9 | 165 | |
72b2fd5c LW |
166 | pr_info("cpufreq for DB8500 started\n"); |
167 | return cpufreq_register_driver(&db8500_cpufreq_driver); | |
7c1a70e9 | 168 | } |
72b2fd5c | 169 | device_initcall(db8500_cpufreq_register); |