cpufreq: Introduce macros for cpufreq_frequency_table iteration
[deliverable/linux.git] / drivers / cpufreq / exynos-cpufreq.c
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1/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
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12#include <linux/kernel.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/slab.h>
17#include <linux/regulator/consumer.h>
18#include <linux/cpufreq.h>
d568b6f7 19#include <linux/platform_device.h>
a125a17f 20
6c523c61 21#include <plat/cpu.h>
a125a17f 22
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23#include "exynos-cpufreq.h"
24
a125a17f 25static struct exynos_dvfs_info *exynos_info;
a125a17f 26static struct regulator *arm_regulator;
a125a17f 27static unsigned int locking_frequency;
a125a17f 28
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29static int exynos_cpufreq_get_index(unsigned int freq)
30{
31 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
32 int index;
33
34 for (index = 0;
35 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
36 if (freq_table[index].frequency == freq)
37 break;
38
39 if (freq_table[index].frequency == CPUFREQ_TABLE_END)
40 return -EINVAL;
41
42 return index;
43}
44
45static int exynos_cpufreq_scale(unsigned int target_freq)
a125a17f 46{
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47 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
48 unsigned int *volt_table = exynos_info->volt_table;
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49 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
50 unsigned int arm_volt, safe_arm_volt = 0;
a125a17f 51 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
d4019f0a 52 unsigned int old_freq;
d271d077 53 int index, old_index;
0e0e425f 54 int ret = 0;
a125a17f 55
d4019f0a 56 old_freq = policy->cur;
a125a17f 57
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58 /*
59 * The policy max have been changed so that we cannot get proper
60 * old_index with cpufreq_frequency_table_target(). Thus, ignore
0585123e 61 * policy and get the index from the raw frequency table.
53df1ad5 62 */
d4019f0a 63 old_index = exynos_cpufreq_get_index(old_freq);
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64 if (old_index < 0) {
65 ret = old_index;
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66 goto out;
67 }
68
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69 index = exynos_cpufreq_get_index(target_freq);
70 if (index < 0) {
71 ret = index;
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72 goto out;
73 }
74
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75 /*
76 * ARM clock source will be changed APLL to MPLL temporary
77 * To support this level, need to control regulator for
78 * required voltage level
79 */
80 if (exynos_info->need_apll_change != NULL) {
81 if (exynos_info->need_apll_change(old_index, index) &&
82 (freq_table[index].frequency < mpll_freq_khz) &&
83 (freq_table[old_index].frequency < mpll_freq_khz))
84 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
85 }
86 arm_volt = volt_table[index];
87
a125a17f 88 /* When the new frequency is higher than current frequency */
d4019f0a 89 if ((target_freq > old_freq) && !safe_arm_volt) {
a125a17f 90 /* Firstly, voltage up to increase frequency */
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91 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
92 if (ret) {
93 pr_err("%s: failed to set cpu voltage to %d\n",
94 __func__, arm_volt);
d4019f0a 95 return ret;
0e0e425f 96 }
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97 }
98
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99 if (safe_arm_volt) {
100 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
a125a17f 101 safe_arm_volt);
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102 if (ret) {
103 pr_err("%s: failed to set cpu voltage to %d\n",
104 __func__, safe_arm_volt);
d4019f0a 105 return ret;
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106 }
107 }
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108
109 exynos_info->set_freq(old_index, index);
a125a17f 110
a125a17f 111 /* When the new frequency is lower than current frequency */
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112 if ((target_freq < old_freq) ||
113 ((target_freq > old_freq) && safe_arm_volt)) {
a125a17f 114 /* down the voltage after frequency change */
006454ae 115 ret = regulator_set_voltage(arm_regulator, arm_volt,
a125a17f 116 arm_volt);
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117 if (ret) {
118 pr_err("%s: failed to set cpu voltage to %d\n",
119 __func__, arm_volt);
120 goto out;
121 }
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122 }
123
0e0e425f 124out:
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125 cpufreq_cpu_put(policy);
126
127 return ret;
128}
129
9c0ebcf7 130static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
0e0e425f 131{
d248bb89 132 return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency);
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133}
134
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135static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
136{
652ed95d 137 policy->clk = exynos_info->cpu_clk;
d248bb89 138 policy->suspend_freq = locking_frequency;
b249abae 139 return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
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140}
141
142static struct cpufreq_driver exynos_driver = {
ae6b4271 143 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
eea6181e 144 .verify = cpufreq_generic_frequency_table_verify,
9c0ebcf7 145 .target_index = exynos_target,
652ed95d 146 .get = cpufreq_generic_get,
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147 .init = exynos_cpufreq_cpu_init,
148 .name = "exynos_cpufreq",
eea6181e 149 .attr = cpufreq_generic_attr,
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150#ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
151 .boost_supported = true,
152#endif
a125a17f 153#ifdef CONFIG_PM
d248bb89 154 .suspend = cpufreq_generic_suspend,
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155#endif
156};
157
d568b6f7 158static int exynos_cpufreq_probe(struct platform_device *pdev)
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159{
160 int ret = -EINVAL;
161
d5b73cd8 162 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
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163 if (!exynos_info)
164 return -ENOMEM;
165
166 if (soc_is_exynos4210())
167 ret = exynos4210_cpufreq_init(exynos_info);
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168 else if (soc_is_exynos4212() || soc_is_exynos4412())
169 ret = exynos4x12_cpufreq_init(exynos_info);
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170 else if (soc_is_exynos5250())
171 ret = exynos5250_cpufreq_init(exynos_info);
a125a17f 172 else
c1585207 173 return 0;
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174
175 if (ret)
176 goto err_vdd_arm;
177
178 if (exynos_info->set_freq == NULL) {
179 pr_err("%s: No set_freq function (ERR)\n", __func__);
180 goto err_vdd_arm;
181 }
182
183 arm_regulator = regulator_get(NULL, "vdd_arm");
184 if (IS_ERR(arm_regulator)) {
185 pr_err("%s: failed to get resource vdd_arm\n", __func__);
186 goto err_vdd_arm;
187 }
188
d248bb89 189 /* Done here as we want to capture boot frequency */
652ed95d 190 locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
6e45eb12 191
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192 if (!cpufreq_register_driver(&exynos_driver))
193 return 0;
a125a17f 194
d248bb89 195 pr_err("%s: failed to register cpufreq driver\n", __func__);
184cddd1 196 regulator_put(arm_regulator);
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197err_vdd_arm:
198 kfree(exynos_info);
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199 return -EINVAL;
200}
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201
202static struct platform_driver exynos_cpufreq_platdrv = {
203 .driver = {
204 .name = "exynos-cpufreq",
205 .owner = THIS_MODULE,
206 },
207 .probe = exynos_cpufreq_probe,
208};
209module_platform_driver(exynos_cpufreq_platdrv);
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